構造体定義書 - arbelprm_srq_context

Little Endian

struct arbelprm_srq_context_st

No.	名称	属性	説明
1	arbelprm_srq_context_st		Little Endian
	srqn[0x00018]	pseudo_bit_t	SRQ number
	log_srq_size[0x00004]	pseudo_bit_t	Log2 of the Number of WQEs in the Receive Queue.
	state[0x00004]	pseudo_bit_t	SRQ State:
	l_key[0x00020]	pseudo_bit_t	memory key (L-Key) to be used to access WQEs.
	srq_db_record_index[0x00020]	pseudo_bit_t	Index in the UAR Context Table Entry containing the doorbell record for the receive queue.
	usr_page[0x00018]	pseudo_bit_t	Index (offset) of user page allocated for this SRQ (see "non_privileged Access to the HCA Hardware"). Not valid (reserved) in E
	reserved0[0x00005]	pseudo_bit_t
	log_rq_stride[0x00003]	pseudo_bit_t	Stride (max WQE size) on the receive queue. WQ entry is 16*(2^log_RQ_stride) bytes.
	wqe_addr_h[0x00020]	pseudo_bit_t	Bits 63:32 of WQE address (WQE base address)
	reserved1[0x00006]	pseudo_bit_t
	srq_wqe_base_adr_l[0x0001a]	pseudo_bit_t	While opening (creating) the SRQ, this field should contain the address of first descriptor to be posted.
	pd[0x00018]	pseudo_bit_t	SRQ protection domain.
	reserved2[0x00008]	pseudo_bit_t
	wqe_cnt[0x00010]	pseudo_bit_t	WQE count on the SRQ.
	lwm[0x00010]	pseudo_bit_t	Limit Water Mark - if the LWM is not zero, and the wqe_cnt drops below LWM when a WQE is dequeued from the SRQ, then a SRQ limi
	srq_wqe_counter[0x00010]	pseudo_bit_t	A 16bits counter that is incremented for each WQE posted to the SQ.
	reserved3[0x00010]	pseudo_bit_t
	reserved4[0x00060]	pseudo_bit_t

arbelprm_srq_context_st