#define一覧 - Csharp

No.	名称	値	ファイル名	説明
1	VERSION	VERSION_IPYXD	initiator_ctl.c
2	RANDOM_NUM_GENERATOR	"/dev/urandom"	initiator_iname.c
3	INITIATOR_NAME_MAXLEN	256	initiator_iname.c
4	CONNECTION_TIMEOUT	10	comm.c
5	TIMEOUT	3000	comm.c	3 seconds
6	BUF_LEN	10000	core-iscsi.c
7	DevAttrReg	1	core-iscsi.c
8	DevAttrQry	2	core-iscsi.c
9	DevDereg	4	core-iscsi.c
10	ENTITY_PROTOCOL_ISCSI	2	core-iscsi.c
11	NODE_TYPE_CONTROL	4	core-iscsi.c
12	NODE_TYPE_INITIATOR	2	core-iscsi.c
13	NODE_TYPE_TARGET	1	core-iscsi.c
14	MAX_RETRY_COUNT	2	core-iscsi.c
15	CONNECTION_TIMEOUT	10	core-iscsi.c
16	PRINT	printf	core-iscsi.c
17	TIMEOUT	1000	core-iscsi.c
18	MAX_ESI_ENTRIES	(100)	isns.c
19	DWORD	unsigned int	main.c
20	HANDLE	pthread_t*	main.c
21	MENU_SIZE	6	menu.c
22	HEX_DUMP_BYTES_PER_LINE	(16)	util.c
23	VERSION	VERSION_IPYXD	initiator_ctl.c
24	RANDOM_NUM_GENERATOR	"/dev/urandom"	initiator_iname.c
25	INITIATOR_NAME_MAXLEN	256	initiator_iname.c
26	CONNECTION_TIMEOUT	10	comm.c
27	TIMEOUT	3000	comm.c	3 seconds
28	BUF_LEN	10000	core-iscsi.c
29	DevAttrReg	1	core-iscsi.c
30	DevAttrQry	2	core-iscsi.c
31	DevDereg	4	core-iscsi.c
32	ENTITY_PROTOCOL_ISCSI	2	core-iscsi.c
33	NODE_TYPE_CONTROL	4	core-iscsi.c
34	NODE_TYPE_INITIATOR	2	core-iscsi.c
35	NODE_TYPE_TARGET	1	core-iscsi.c
36	MAX_RETRY_COUNT	2	core-iscsi.c
37	CONNECTION_TIMEOUT	10	core-iscsi.c
38	PRINT	printf	core-iscsi.c
39	TIMEOUT	1000	core-iscsi.c
40	MAX_ESI_ENTRIES	(100)	isns.c
41	DWORD	unsigned int	main.c
42	HANDLE	pthread_t*	main.c
43	MENU_SIZE	6	menu.c
44	HEX_DUMP_BYTES_PER_LINE	(16)	util.c
45	VERSION	VERSION_IPYXD	initiator_ctl.c
46	RANDOM_NUM_GENERATOR	"/dev/urandom"	initiator_iname.c
47	INITIATOR_NAME_MAXLEN	256	initiator_iname.c
48	CONNECTION_TIMEOUT	10	comm.c
49	TIMEOUT	3000	comm.c	3 seconds
50	BUF_LEN	10000	core-iscsi.c
51	DevAttrReg	1	core-iscsi.c
52	DevAttrQry	2	core-iscsi.c
53	DevDereg	4	core-iscsi.c
54	ENTITY_PROTOCOL_ISCSI	2	core-iscsi.c
55	NODE_TYPE_CONTROL	4	core-iscsi.c
56	NODE_TYPE_INITIATOR	2	core-iscsi.c
57	NODE_TYPE_TARGET	1	core-iscsi.c
58	MAX_RETRY_COUNT	2	core-iscsi.c
59	CONNECTION_TIMEOUT	10	core-iscsi.c
60	PRINT	printf	core-iscsi.c
61	TIMEOUT	1000	core-iscsi.c
62	MAX_ESI_ENTRIES	(100)	isns.c
63	DWORD	unsigned int	main.c
64	HANDLE	pthread_t*	main.c
65	MENU_SIZE	6	menu.c
66	HEX_DUMP_BYTES_PER_LINE	(16)	util.c
67	VERSION	VERSION_IPYXD	initiator_ctl.c
68	RANDOM_NUM_GENERATOR	"/dev/urandom"	initiator_iname.c
69	INITIATOR_NAME_MAXLEN	256	initiator_iname.c
70	CONNECTION_TIMEOUT	10	comm.c
71	TIMEOUT	3000	comm.c	3 seconds
72	BUF_LEN	10000	core-iscsi.c
73	DevAttrReg	1	core-iscsi.c
74	DevAttrQry	2	core-iscsi.c
75	DevDereg	4	core-iscsi.c
76	ENTITY_PROTOCOL_ISCSI	2	core-iscsi.c
77	NODE_TYPE_CONTROL	4	core-iscsi.c
78	NODE_TYPE_INITIATOR	2	core-iscsi.c
79	NODE_TYPE_TARGET	1	core-iscsi.c
80	MAX_RETRY_COUNT	2	core-iscsi.c
81	CONNECTION_TIMEOUT	10	core-iscsi.c
82	PRINT	printf	core-iscsi.c
83	TIMEOUT	1000	core-iscsi.c
84	MAX_ESI_ENTRIES	(100)	isns.c
85	DWORD	unsigned int	main.c
86	HANDLE	pthread_t*	main.c
87	MENU_SIZE	6	menu.c
88	HEX_DUMP_BYTES_PER_LINE	(16)	util.c
89	VERSION	VERSION_IPYXD	initiator_ctl.c
90	RANDOM_NUM_GENERATOR	"/dev/urandom"	initiator_iname.c
91	INITIATOR_NAME_MAXLEN	256	initiator_iname.c
92	CONNECTION_TIMEOUT	10	comm.c
93	TIMEOUT	3000	comm.c	3 seconds
94	BUF_LEN	10000	core-iscsi.c
95	DevAttrReg	1	core-iscsi.c
96	DevAttrQry	2	core-iscsi.c
97	DevDereg	4	core-iscsi.c
98	ENTITY_PROTOCOL_ISCSI	2	core-iscsi.c
99	NODE_TYPE_CONTROL	4	core-iscsi.c
100	NODE_TYPE_INITIATOR	2	core-iscsi.c
101	NODE_TYPE_TARGET	1	core-iscsi.c
102	MAX_RETRY_COUNT	2	core-iscsi.c
103	CONNECTION_TIMEOUT	10	core-iscsi.c
104	PRINT	printf	core-iscsi.c
105	TIMEOUT	1000	core-iscsi.c
106	MAX_ESI_ENTRIES	(100)	isns.c
107	DWORD	unsigned int	main.c
108	HANDLE	pthread_t*	main.c
109	MENU_SIZE	6	menu.c
110	HEX_DUMP_BYTES_PER_LINE	(16)	util.c
111	DO_DIRECT_MOUNT	1	syslinux-nomtools.c	Call mount(2) directly
112	DO_DIRECT_MOUNT	0	syslinux-nomtools.c	Call /bin/mount instead
113	_XOPEN_SOURCE	500	syslinux-nomtools.c	For pread() pwrite()
114	_PATH_MOUNT	"/bin/mount"	syslinux-nomtools.c
115	_PATH_UMOUNT	"/bin/umount"	syslinux-nomtools.c
116	_XOPEN_SOURCE	500	syslinux.c	Required on glibc 2.x
117	_XOPEN_SOURCE	500	syslxmod.c	Required on glibc 2.x
118	bsHead	bsJump	syslxmod.c
119	bsHeadLen	(bsBytesPerSec-bsHead)	syslxmod.c
120	bsCodeLen	(bsSignature-bsCode)	syslxmod.c
121	TYPE	int	atoi.c
122	NAME	atoi	atoi.c
123	TYPE	long	atol.c
124	NAME	atol	atol.c
125	TYPE	long long	atoll.c
126	NAME	atoll	atoll.c
127	BUFFER_SIZE	16384	fprintf.c
128	BUFFER_SIZE	16384	printf.c
129	LONG_BIT	(CHAR_BIT*sizeof(long))	strspn.c
130	TYPE	intmax_t	strtoimax.c
131	NAME	strtoimax	strtoimax.c
132	TYPE	signed long	strtol.c
133	NAME	strtol	strtol.c
134	TYPE	signed long long	strtoll.c
135	NAME	strtoll	strtoll.c
136	TYPE	unsigned long	strtoul.c
137	NAME	strtoul	strtoul.c
138	TYPE	unsigned long long	strtoull.c
139	NAME	strtoull	strtoull.c
140	TYPE	uintmax_t	strtoumax.c
141	NAME	strtoumax	strtoumax.c
142	BUFFER_SIZE	32768	vfprintf.c
143	MIN_RANK	rank_char	vsnprintf.c
144	MAX_RANK	rank_longlong	vsnprintf.c
145	INTMAX_RANK	rank_longlong	vsnprintf.c
146	SIZE_T_RANK	rank_long	vsnprintf.c
147	PTRDIFF_T_RANK	rank_long	vsnprintf.c
148	LONG_BIT	(CHAR_BIT*sizeof(long))	vsscanf.c
149	MIN_RANK	rank_char	vsscanf.c
150	MAX_RANK	rank_longlong	vsscanf.c
151	INTMAX_RANK	rank_longlong	vsscanf.c
152	SIZE_T_RANK	rank_long	vsscanf.c
153	PTRDIFF_T_RANK	rank_long	vsscanf.c
154	BIOS_CURXY	((struct curxy *)0x450)	ansicon_write.c	Array for each page
155	BIOS_ROWS	((uint8_t )0x484)	ansicon_write.c	Minus one; if zero use 24 (= 25 lines)
156	BIOS_COLS	((uint16_t )0x44A)	ansicon_write.c
157	BIOS_PAGE	((uint8_t )0x462)	ansicon_write.c
158	MAX_PARMS	16	ansicon_write.c
159	MAXLEN	8	get_key.c
160	NCODES	((int)(sizeof keycodes/sizeof(struct keycode)))	get_key.c
161	SECTOR	512	chain.c	bytes/sector
162	ZEROPAD	1	conio.c	pad with zero
163	SIGN	2	conio.c	unsigned/signed long
164	PLUS	4	conio.c	show plus
165	SPACE	8	conio.c	space if plus
166	LEFT	16	conio.c	left justified
167	SPECIAL	32	conio.c	0x
168	LARGE	64	conio.c	use 'ABCDEF' instead of 'abcdef'
169	MAXRANGES	64	e820func.c
170	slide	window	inflate.c
171	wp	outcnt	inflate.c
172	BMAX	16	inflate.c	maximum bit length of any code (16 for explode)
173	N_MAX	288	inflate.c	maximum number of codes in any set
174	CRC_VALUE	(crc ^ 0xffffffffL)	inflate.c
175	ASCII_FLAG	0x01	inflate.c	bit 0 set: file probably ASCII text
176	CONTINUATION	0x02	inflate.c	bit 1 set: continuation of multi-part gzip file
177	EXTRA_FIELD	0x04	inflate.c	bit 2 set: extra field present
178	ORIG_NAME	0x08	inflate.c	bit 3 set: original file name present
179	COMMENT	0x10	inflate.c	bit 4 set: file comment present
180	ENCRYPTED	0x20	inflate.c	bit 5 set: file is encrypted
181	RESERVED	0xC0	inflate.c	bit 6,7: reserved
182	BIOS_INT13	(0x13*4)	setup.c	INT 13h vector
183	BIOS_INT15	(0x15*4)	setup.c	INT 15h vector
184	BIOS_INT1E	(0x1E*4)	setup.c	INT 1Eh vector
185	BIOS_INT40	(0x40*4)	setup.c	INT 13h vector
186	BIOS_INT41	(0x41*4)	setup.c	INT 41h vector
187	BIOS_INT46	(0x46*4)	setup.c	INT 46h vector
188	BIOS_BASEMEM	0x413	setup.c	Amount of DOS memory
189	BIOS_EQUIP	0x410	setup.c	BIOS equipment list
190	BIOS_HD_COUNT	0x475	setup.c	Number of hard drives present
191	CMD_NOTFOUND	((char *)-1)	setup.c	Not found
192	CMD_BOOL	((char *)-2)	setup.c	Found boolean option
193	UNZIP_ALIGN	512	setup.c
194	known_geometries	(sizeof(geometries)/sizeof(struct geometry))	setup.c
195	STACK_NEEDED	512	setup.c	Number of bytes of stack
196	STATIC	static	unzip.c
197	WSIZE	0x8000	unzip.c	Window size must be at least 32k,
198	ASCII_FLAG	0x01	unzip.c	bit 0 set: file probably ASCII text
199	CONTINUATION	0x02	unzip.c	bit 1 set: continuation of multi-part gzip file
200	EXTRA_FIELD	0x04	unzip.c	bit 2 set: extra field present
201	ORIG_NAME	0x08	unzip.c	bit 3 set: original file name present
202	COMMENT	0x10	unzip.c	bit 4 set: file comment present
203	ENCRYPTED	0x20	unzip.c	bit 5 set: file is encrypted
204	RESERVED	0xC0	unzip.c	bit 6,7: reserved
205	ASCII_FLAG	0x01	unzip.c	bit 0 set: file probably ASCII text
206	CONTINUATION	0x02	unzip.c	bit 1 set: continuation of multi-part gzip file
207	EXTRA_FIELD	0x04	unzip.c	bit 2 set: extra field present
208	ORIG_NAME	0x08	unzip.c	bit 3 set: original file name present
209	COMMENT	0x10	unzip.c	bit 4 set: file comment present
210	ENCRYPTED	0x20	unzip.c	bit 5 set: file is encrypted
211	RESERVED	0xC0	unzip.c	bit 6,7: reserved
212	PK_ENCRYPTED	0x01	unzip.c	bit 0 set: file is encrypted
213	PK_DATADESC	0x08	unzip.c	bit 3 set: file has trailing "data
214	PK_UNSUPPORTED	0xFFF0	unzip.c	All other bits must be zero
215	GETSTRATTR	0x07	biosio.c
216	NULL	((void *) 0)	complex.c
217	INFLINE	22	complex.c
218	NULL	((void *)0)	heap.c
219	NULL	((void *) 0)	main.c
220	NULL	((void *) 0)	simple.c
221	NULL	((void *)0)	c32echo.c
222	NULL	((void *)0)	conio.c
223	NULL	((void *)0)	fd.c
224	NULL	((void *)0)	filetest.c
225	NULL	((void *)0)	hello.c
226	NULL	((void *)0)	hello2.c
227	ZEROPAD	1	printf.c	pad with zero
228	SIGN	2	printf.c	unsigned/signed long
229	PLUS	4	printf.c	show plus
230	SPACE	8	printf.c	space if plus
231	LEFT	16	printf.c	left justified
232	SPECIAL	32	printf.c	0x
233	LARGE	64	printf.c	use 'ABCDEF' instead of 'abcdef'
234	NULL	((void *) 0)	complex.c
235	INFLINE	22	complex.c
236	PWDLINE	3	complex.c
237	PWDPROMPT	21	complex.c
238	PWDCOLUMN	60	complex.c
239	PWDATTR	0x74	complex.c
240	EDITPROMPT	21	complex.c
241	NULL	((void *) 0)	display.c
242	NULL	((void *) 0)	simple.c
243	NULL	((void *) 0)	test.c
244	MAX_CMD_LINE_LENGTH	514	test.c
245	GUEST_USER	"guest"	test.c
246	QUIT_CMD	0	test.c
247	RPT_CMD	1	test.c
248	NULL	((void *) 0)	test2.c
249	MAX_CMD_LINE_LENGTH	514	test2.c
250	GUEST_USER	"guest"	test2.c
251	QUIT_CMD	0	test2.c
252	RPT_CMD	1	test2.c
253	NULL	((void *) 0)	des.c
254	MAX_LINE	512	passwords.c
255	X86_INT_DB	1	main.c
256	X86_INT_BP	3	main.c
257	COM32_IDT	((void*)0x100000)	main.c
258	COM32_LOAD_ADDR	((void*)0x101000)	main.c
259	STACK_SIZE	0x1000	main.c
260	COMCONSOLE	0x3f8	serial.c
261	COMSPEED	9600	serial.c
262	COMDATA	8	serial.c
263	COMPARITY	0	serial.c
264	COMSTOP	1	serial.c
265	UART_BASE	( COMCONSOLE )	serial.c
266	UART_BAUD	( COMSPEED )	serial.c
267	COMBRD	(115200/UART_BAUD)	serial.c
268	UART_LCS	( ( ( (COMDATA) - 5 ) << 0 ) \| \ ( ( (COMPARITY) ) << 3 ) \| \ ( ( (COMSTOP) - 1 ) << 2 ) )	serial.c
269	UART_RBR	0x00	serial.c
270	UART_TBR	0x00	serial.c
271	UART_IER	0x01	serial.c
272	UART_IIR	0x02	serial.c
273	UART_FCR	0x02	serial.c
274	UART_LCR	0x03	serial.c
275	UART_MCR	0x04	serial.c
276	UART_DLL	0x00	serial.c
277	UART_DLM	0x01	serial.c
278	UART_LSR	0x05	serial.c
279	UART_LSR_TEMPT	0x40	serial.c	Transmitter empty
280	UART_LSR_THRE	0x20	serial.c	Transmit-hold-register empty
281	UART_LSR_BI	0x10	serial.c	Break interrupt indicator
282	UART_LSR_FE	0x08	serial.c	Frame error indicator
283	UART_LSR_PE	0x04	serial.c	Parity error indicator
284	UART_LSR_OE	0x02	serial.c	Overrun error indicator
285	UART_LSR_DR	0x01	serial.c	Receiver data ready
286	UART_MSR	0x06	serial.c
287	UART_SCR	0x07	serial.c
288	MAX_CONFIG_LINE_LEN	2048	gfxboot.c
289	MAX_CMDLINE_LEN	2048	gfxboot.c
290	REALMODE_BUF_SIZE	4096	gfxboot.c
291	GFX_MEMORY_SIZE	7	gfxboot.c
292	CHUNK_SIZE	(64 << 10)	gfxboot.c
293	GFX_CB_INIT	0	gfxboot.c
294	GFX_CB_DONE	1	gfxboot.c
295	GFX_CB_INPUT	2	gfxboot.c
296	GFX_CB_MENU_INIT	3	gfxboot.c
297	GFX_CB_INFOBOX_INIT	4	gfxboot.c
298	GFX_CB_INFOBOX_DONE	5	gfxboot.c
299	GFX_CB_PROGRESS_INIT	6	gfxboot.c
300	GFX_CB_PROGRESS_DONE	7	gfxboot.c
301	GFX_CB_PROGRESS_UPDATE	8	gfxboot.c
302	GFX_CB_PROGRESS_LIMIT	9	gfxboot.c	unused
303	GFX_CB_PASSWORD_INIT	10	gfxboot.c
304	GFX_CB_PASSWORD_DONE	11	gfxboot.c
305	SMAP	0x534d4150	memory.c	ASCII "SMAP"
306	MAX_NB_RETRIES	6	util.c
307	E820MAX	128	hdt-menu-memory.c
308	TYPE	int	atoi.c
309	NAME	atoi	atoi.c
310	TYPE	long	atol.c
311	NAME	atol	atol.c
312	TYPE	long long	atoll.c
313	NAME	atoll	atoll.c
314	DEBUG	1	dprintf.c
315	BUFFER_SIZE	16384	fprintf.c
316	E820_MEM_MAX	0xfff00000	malloc.c	4 GB - 1 MB
317	BUFFER_SIZE	16384	printf.c
318	LONG_BIT	(CHAR_BIT*sizeof(long))	strspn.c
319	TYPE	intmax_t	strtoimax.c
320	NAME	strtoimax	strtoimax.c
321	TYPE	signed long	strtol.c
322	NAME	strtol	strtol.c
323	TYPE	signed long long	strtoll.c
324	NAME	strtoll	strtoll.c
325	TYPE	unsigned long	strtoul.c
326	NAME	strtoul	strtoul.c
327	TYPE	unsigned long long	strtoull.c
328	NAME	strtoull	strtoull.c
329	TYPE	uintmax_t	strtoumax.c
330	NAME	strtoumax	strtoumax.c
331	DEBUG	1	vdprintf.c
332	BUFFER_SIZE	32768	vdprintf.c
333	BUFFER_SIZE	32768	vfprintf.c
334	MIN_RANK	rank_char	vsnprintf.c
335	MAX_RANK	rank_longlong	vsnprintf.c
336	INTMAX_RANK	rank_longlong	vsnprintf.c
337	SIZE_T_RANK	rank_long	vsnprintf.c
338	PTRDIFF_T_RANK	rank_long	vsnprintf.c
339	LONG_BIT	(CHAR_BIT*sizeof(long))	vsscanf.c
340	MIN_RANK	rank_char	vsscanf.c
341	MAX_RANK	rank_longlong	vsscanf.c
342	INTMAX_RANK	rank_longlong	vsscanf.c
343	SIZE_T_RANK	rank_long	vsscanf.c
344	PTRDIFF_T_RANK	rank_long	vsscanf.c
345	FAST_FLOAT	float	jidctflt.c
346	DCTSIZE	8	jidctflt.c
347	DCTSIZE2	(DCTSIZE*DCTSIZE)	jidctflt.c
348	PNG_BYTES_TO_CHECK	4	example.c
349	_mmx_supported	mmx_supported	pnggccrd.c
350	_const4	const4	pnggccrd.c
351	_const6	const6	pnggccrd.c
352	_mask8_0	mask8_0	pnggccrd.c
353	_mask16_1	mask16_1	pnggccrd.c
354	_mask16_0	mask16_0	pnggccrd.c
355	_mask24_2	mask24_2	pnggccrd.c
356	_mask24_1	mask24_1	pnggccrd.c
357	_mask24_0	mask24_0	pnggccrd.c
358	_mask32_3	mask32_3	pnggccrd.c
359	_mask32_2	mask32_2	pnggccrd.c
360	_mask32_1	mask32_1	pnggccrd.c
361	_mask32_0	mask32_0	pnggccrd.c
362	_mask48_5	mask48_5	pnggccrd.c
363	_mask48_4	mask48_4	pnggccrd.c
364	_mask48_3	mask48_3	pnggccrd.c
365	_mask48_2	mask48_2	pnggccrd.c
366	_mask48_1	mask48_1	pnggccrd.c
367	_mask48_0	mask48_0	pnggccrd.c
368	_LBCarryMask	LBCarryMask	pnggccrd.c
369	_HBClearMask	HBClearMask	pnggccrd.c
370	_ActiveMask	ActiveMask	pnggccrd.c
371	_ActiveMask2	ActiveMask2	pnggccrd.c
372	_ActiveMaskEnd	ActiveMaskEnd	pnggccrd.c
373	_ShiftBpp	ShiftBpp	pnggccrd.c
374	_ShiftRem	ShiftRem	pnggccrd.c
375	_unmask	unmask	pnggccrd.c
376	_FullLength	FullLength	pnggccrd.c
377	_MMXLength	MMXLength	pnggccrd.c
378	_dif	dif	pnggccrd.c
379	_patemp	patemp	pnggccrd.c
380	_pbtemp	pbtemp	pnggccrd.c
381	_pctemp	pctemp	pnggccrd.c
382	BPP2	2	pnggccrd.c
383	BPP3	3	pnggccrd.c	bytes per pixel (a.k.a. pixel_bytes)
384	BPP4	4	pnggccrd.c
385	BPP6	6	pnggccrd.c	(defined only to help avoid cut-and-paste errors)
386	BPP8	8	pnggccrd.c
387	png_malloc_warn	png_malloc	pngmem.c
388	PNG_READ_SIG_MODE	0	pngpread.c
389	PNG_READ_CHUNK_MODE	1	pngpread.c
390	PNG_READ_IDAT_MODE	2	pngpread.c
391	PNG_SKIP_MODE	3	pngpread.c
392	PNG_READ_tEXt_MODE	4	pngpread.c
393	PNG_READ_zTXt_MODE	5	pngpread.c
394	PNG_READ_DONE_MODE	6	pngpread.c
395	PNG_READ_iTXt_MODE	7	pngpread.c
396	PNG_ERROR_MODE	8	pngpread.c
397	NEAR_BUF_SIZE	1024	pngrio.c
398	PNG_DEBUG	0	pngtest.c
399	STDERR	stdout	pngtest.c	for DOS
400	NEAR_BUF_SIZE	1024	pngtest.c
401	NEAR_BUF_SIZE	1024	pngtest.c
402	NEAR_BUF_SIZE	1024	pngwio.c
403	PNG_MAXSUM	(((png_uint_32)(-1)) >> 1)	pngwutil.c
404	PNG_HISHIFT	10	pngwutil.c
405	PNG_LOMASK	((png_uint_32)0xffffL)	pngwutil.c
406	PNG_HIMASK	((png_uint_32)(~PNG_LOMASK >> PNG_HISHIFT))	pngwutil.c
407	TYPE	uint8_t	readb.c
408	BIOSCALL	0xb108	readb.c
409	TYPE	uint32_t	readl.c
410	BIOSCALL	0xb10a	readl.c
411	TYPE	uint16_t	readw.c
412	BIOSCALL	0xb109	readw.c
413	dprintf	printf	scan.c
414	MAX_LINE	512	scan.c
415	TYPE	uint8_t	writeb.c
416	BIOSCALL	0xb10b	writeb.c
417	TYPE	uint32_t	writel.c
418	BIOSCALL	0xb10d	writel.c
419	TYPE	uint16_t	writew.c
420	BIOSCALL	0xb10c	writew.c
421	BIOS_CURXY	((struct curxy *)0x450)	ansicon_write.c	Array for each page
422	BIOS_ROWS	((uint8_t )0x484)	ansicon_write.c	Minus one; if zero use 24 (= 25 lines)
423	BIOS_COLS	((uint16_t )0x44A)	ansicon_write.c
424	BIOS_PAGE	((uint8_t )0x462)	ansicon_write.c
425	CR0_PE	0x00000001	x86_init_fpu.c
426	CR0_MP	0x00000002	x86_init_fpu.c
427	CR0_EM	0x00000004	x86_init_fpu.c
428	CR0_TS	0x00000008	x86_init_fpu.c
429	CR0_ET	0x00000010	x86_init_fpu.c
430	CR0_NE	0x00000020	x86_init_fpu.c
431	CR0_WP	0x00010000	x86_init_fpu.c
432	CR0_AM	0x00040000	x86_init_fpu.c
433	CR0_NW	0x20000000	x86_init_fpu.c
434	CR0_CD	0x40000000	x86_init_fpu.c
435	CR0_PG	0x80000000	x86_init_fpu.c
436	LSS16_MAGIC	0x1413f33d	background.c
437	VBIOS_START	0xc0000	i915resolution.c
438	VBIOS_SIZE	0x10000	i915resolution.c
439	MODE_TABLE_OFFSET_845G	617	i915resolution.c
440	VERSION	"0.5.3"	i915resolution.c
441	ATI_SIGNATURE1	"ATI MOBILITY RADEON"	i915resolution.c
442	ATI_SIGNATURE2	"ATI Technologies Inc"	i915resolution.c
443	NVIDIA_SIGNATURE	"NVIDIA Corp"	i915resolution.c
444	INTEL_SIGNATURE	"Intel Corp"	i915resolution.c
445	INCREMENTAL_CHUNK	1024*1024	floadfile.c
446	CPIO_MAGIC	"070701"	initramfs_file.c
447	INCREMENTAL_CHUNK	1024*1024	loadfile.c
448	DEBUG	0	load_linux.c
449	dprintf	printf	load_linux.c
450	BOOT_MAGIC	0xAA55	load_linux.c
451	LINUX_MAGIC	('H' + ('d' << 8) + ('r' << 16) + ('S' << 24))	load_linux.c
452	OLD_CMDLINE_MAGIC	0xA33F	load_linux.c
453	LOAD_HIGH	0x01	load_linux.c
454	CAN_USE_HEAP	0x80	load_linux.c
455	DEBUG	1	movebits.c
456	DEBUG	0	movebits.c
457	dprintf	printf	movebits.c
458	DEBUG	0	shuffle.c
459	dprintf	printf	shuffle.c
460	dprintf2	printf	shuffle.c
461	DESC_BLOCK_SIZE	256	shuffle.c
462	INCREMENTAL_CHUNK	1024*1024	zloadfile.c
463	DEBUG	1	zonelist.c
464	DEBUG	0	zonelist.c
465	dprintf	printf	zonelist.c
466	BASE	65521UL	adler32.c	largest prime smaller than 65536
467	NMAX	5552	adler32.c
468	local	static	crc32.c
469	TBLS	8	crc32.c
470	TBLS	1	crc32.c
471	DO1	crc = crc_table[0][((int)crc ^ (*buf++)) & 0xff] ^ (crc >> 8)	crc32.c
472	DO8	DO1; DO1; DO1; DO1; DO1; DO1; DO1; DO1	crc32.c
473	DOLIT4	c ^= *buf4++; \ c = crc_table[3][c & 0xff] ^ crc_table[2][(c >> 8) & 0xff] ^ \ crc_table[1][(c >> 16) & 0xff] ^ crc_table[0][c	crc32.c
474	DOLIT32	DOLIT4; DOLIT4; DOLIT4; DOLIT4; DOLIT4; DOLIT4; DOLIT4; DOLIT4	crc32.c
475	DOBIG4	c ^= *++buf4; \ c = crc_table[4][c & 0xff] ^ crc_table[5][(c >> 8) & 0xff] ^ \ crc_table[6][(c >> 16) & 0xff] ^ crc_table[7][c	crc32.c
476	DOBIG32	DOBIG4; DOBIG4; DOBIG4; DOBIG4; DOBIG4; DOBIG4; DOBIG4; DOBIG4	crc32.c
477	NIL	0	deflate.c
478	TOO_FAR	4096	deflate.c
479	MIN_LOOKAHEAD	(MAX_MATCH+MIN_MATCH+1)	deflate.c
480	EQUAL	0	deflate.c
481	OFF	0	inffast.c
482	OFF	1	inffast.c
483	MAXBITS	15	inftrees.c
484	MAX_BL_BITS	7	trees.c
485	END_BLOCK	256	trees.c
486	REP_3_6	16	trees.c
487	REPZ_3_10	17	trees.c
488	REPZ_11_138	18	trees.c
489	Buf_size	(8 * 2*sizeof(char))	trees.c
490	DIST_CODE_LEN	512	trees.c	see definition of array dist_code below
491	SMALLEST	1	trees.c
492	verbose	0	zutil.c
493	MAX_PTR	10	zutil.c
494	_halloc	halloc	zutil.c
495	_hfree	hfree	zutil.c
496	MAXLEN	8	get_key.c
497	NCODES	((int)(sizeof keycodes/sizeof(struct keycode)))	get_key.c
498	KEY_TIMEOUT	((CLK_TCK+9)/10)	get_key.c
499	Encode	memcpy	md5.c
500	Decode	memcpy	md5.c
501	SALT_LEN_MAX	16	sha256crypt.c
502	ROUNDS_DEFAULT	5000	sha256crypt.c
503	ROUNDS_MIN	1000	sha256crypt.c
504	ROUNDS_MAX	999999999	sha256crypt.c
505	ntests	(sizeof (tests) / sizeof (tests[0]))	sha256crypt.c
506	ntests2	(sizeof (tests2) / sizeof (tests2[0]))	sha256crypt.c
507	SALT_LEN_MAX	16	sha512crypt.c
508	ROUNDS_DEFAULT	5000	sha512crypt.c
509	ROUNDS_MIN	1000	sha512crypt.c
510	ROUNDS_MAX	999999999	sha512crypt.c
511	ntests	(sizeof (tests) / sizeof (tests[0]))	sha512crypt.c
512	ntests2	(sizeof (tests2) / sizeof (tests2[0]))	sha512crypt.c
513	RANGE_ALLOC_BLOCK	128	mem.c
514	NCOLORS	(sizeof default_colors/sizeof default_colors[0])	colors.c
515	WIDTH	(cm->mparm[P_WIDTH])	menumain.c
516	MARGIN	(cm->mparm[P_MARGIN])	menumain.c
517	PASSWD_MARGIN	(cm->mparm[P_PASSWD_MARGIN])	menumain.c
518	MENU_ROWS	(cm->mparm[P_MENU_ROWS])	menumain.c
519	TABMSG_ROW	(cm->mparm[P_TABMSG_ROW]+VSHIFT)	menumain.c
520	CMDLINE_ROW	(cm->mparm[P_CMDLINE_ROW]+VSHIFT)	menumain.c
521	END_ROW	(cm->mparm[P_END_ROW])	menumain.c
522	PASSWD_ROW	(cm->mparm[P_PASSWD_ROW]+VSHIFT)	menumain.c
523	TIMEOUT_ROW	(cm->mparm[P_TIMEOUT_ROW]+VSHIFT)	menumain.c
524	HELPMSG_ROW	(cm->mparm[P_HELPMSG_ROW]+VSHIFT)	menumain.c
525	HELPMSGEND_ROW	(cm->mparm[P_HELPMSGEND_ROW])	menumain.c
526	HSHIFT	(cm->mparm[P_HSHIFT])	menumain.c
527	VSHIFT	(cm->mparm[P_VSHIFT])	menumain.c
528	HIDDEN_ROW	(cm->mparm[P_HIDDEN_ROW])	menumain.c
529	MAX_LINE	4096	readconfig.c
530	SECTOR	512	chain.c	bytes/sector
531	MIN_STACK	512	elf.c
532	DEBUG	0	elf.c
533	dprintf	printf	elf.c
534	dprintf	printf	ethersel.c
535	MAX_LINE	512	ethersel.c
536	dprintf	printf	pcitest.c
537	MIN_STACK	512	pmload.c
538	DEBUG	0	pmload.c
539	dprintf	printf	pmload.c
540	DEBUG	0	sdi.c
541	dprintf	printf	sdi.c
542	SDI_LOAD_ADDR	(16 << 20)	sdi.c	16 MB
543	SDI_SIGNATURE	('$' + ('S' << 8) + ('D' << 16) + ('I' << 24))	sdi.c
544	APP_LONGNAME	"Read-Only Shell"	rosh.c
545	APP_NAME	"rosh"	rosh.c
546	APP_AUTHOR	"Gene Cumm"	rosh.c
547	APP_YEAR	"2008"	rosh.c
548	APP_VER	"beta-b032"	rosh.c
549	CPUID_CHUNK	128	cpuid.c
550	E820_CHUNK	128	memmap.c
551	ALLOC_CHUNK	65536	zout.c
552	ZEROPAD	1	printf.c	pad with zero
553	SIGN	2	printf.c	unsigned/signed long
554	PLUS	4	printf.c	show plus
555	SPACE	8	printf.c	space if plus
556	LEFT	16	printf.c	left justified
557	SPECIAL	32	printf.c	0x
558	LARGE	64	printf.c	use 'ABCDEF' instead of 'abcdef'
559	dprintf	printf	syslinux.c
560	statfs	_kernel_statfs	main.c	HACK to deal with broken 2.4 distros
561	dprintf	printf	main.c
562	BLKGETSIZE64	_IOR(0x12,114,size_t)	main.c
563	LDLINUX_MAGIC	0x3eb202fe	main.c
564	bsHead	bsJump	main.c
565	bsHeadLen	(bsOemName-bsHead)	main.c
566	bsCode	bs32Code	main.c	The common safe choice
567	bsCodeLen	(bsSignature-bs32Code)	main.c
568	EXT2_SUPER_OFFSET	1024	main.c
569	boot_block	extlinux_bootsect	main.c
570	boot_block_len	extlinux_bootsect_len	main.c
571	boot_image	extlinux_image	main.c
572	boot_image_len	extlinux_image_len	main.c
573	BOOTINFO_VERSION	1	freebsd_loader.c
574	NODEV	(-1)	freebsd_loader.c	non-existent device
575	PAGE_SHIFT	12	freebsd_loader.c	LOG2(PAGE_SIZE)
576	PAGE_SIZE	(1<<PAGE_SHIFT)	freebsd_loader.c	bytes/page
577	PAGE_MASK	(PAGE_SIZE-1)	freebsd_loader.c
578	N_BIOS_GEOM	8	freebsd_loader.c
579	max_align	( ( unsigned int ) _max_align )	relocate.c
580	MAX_ADDR	(0xfff00000UL)	relocate.c
581	TIMER2_TICKS_PER_SEC	1193180U	timer2.c
582	PPC_PORTB	0x61	timer2.c
583	PPCB_T2OUT	0x20	timer2.c	Bit 5
584	PPCB_SPKR	0x02	timer2.c	Bit 1
585	PPCB_T2GATE	0x01	timer2.c	Bit 0
586	TIMER2_PORT	0x42	timer2.c
587	TIMER_MODE_PORT	0x43	timer2.c
588	TIMER0_SEL	0x00	timer2.c
589	TIMER1_SEL	0x40	timer2.c
590	TIMER2_SEL	0x80	timer2.c
591	READBACK_SEL	0xC0	timer2.c
592	LATCH_COUNT	0x00	timer2.c
593	LOBYTE_ACCESS	0x10	timer2.c
594	HIBYTE_ACCESS	0x20	timer2.c
595	WORD_ACCESS	0x30	timer2.c
596	MODE0	0x00	timer2.c
597	MODE1	0x02	timer2.c
598	MODE2	0x04	timer2.c
599	MODE3	0x06	timer2.c
600	MODE4	0x08	timer2.c
601	MODE5	0x0A	timer2.c
602	BINARY_COUNT	0x00	timer2.c
603	BCD_COUNT	0x01	timer2.c
604	VIDBUFFER	0xB8000	video_subr.c
605	LOAD_DEBUG	0	wince_loader.c
606	BOOT_ARG_PTR_LOCATION	0x001FFFFC	wince_loader.c
607	PSIZE	(1500)	wince_loader.c	Max Packet Size
608	DSIZE	(PSIZE+12)	wince_loader.c
609	undi_loader	__use_data16 ( undi_loader )	undiload.c
610	undi_loader_entry	__use_data16 ( undi_loader_entry )	undiload.c
611	UNDI_HACK_EB54	0x0001	undinet.c
612	undiisr_irq	__use_data16 ( undiisr_irq )	undinet.c
613	undiisr_next_handler	__use_data16 ( undiisr_next_handler )	undinet.c
614	undiisr_trigger_count	__use_data16 ( undiisr_trigger_count )	undinet.c
615	undinet_tbd	__use_data16 ( undinet_tbd )	undinet.c
616	ATTR_BOLD	0x08	bios_console.c
617	ATTR_FCOL_MASK	0x07	bios_console.c
618	ATTR_FCOL_BLACK	0x00	bios_console.c
619	ATTR_FCOL_BLUE	0x01	bios_console.c
620	ATTR_FCOL_GREEN	0x02	bios_console.c
621	ATTR_FCOL_CYAN	0x03	bios_console.c
622	ATTR_FCOL_RED	0x04	bios_console.c
623	ATTR_FCOL_MAGENTA	0x05	bios_console.c
624	ATTR_FCOL_YELLOW	0x06	bios_console.c
625	ATTR_FCOL_WHITE	0x07	bios_console.c
626	ATTR_BCOL_MASK	0x70	bios_console.c
627	ATTR_BCOL_BLACK	0x00	bios_console.c
628	ATTR_BCOL_BLUE	0x10	bios_console.c
629	ATTR_BCOL_GREEN	0x20	bios_console.c
630	ATTR_BCOL_CYAN	0x30	bios_console.c
631	ATTR_BCOL_RED	0x40	bios_console.c
632	ATTR_BCOL_MAGENTA	0x50	bios_console.c
633	ATTR_BCOL_YELLOW	0x60	bios_console.c
634	ATTR_BCOL_WHITE	0x70	bios_console.c
635	ATTR_DEFAULT	ATTR_FCOL_WHITE	bios_console.c
636	BIOS_KEY_MIN	0x42	bios_console.c
637	real_int15_vector	__use_text16 ( real_int15_vector )	fakee820.c
638	E820_TYPE_RAM	1	fakee820.c	*< Normal memory
639	E820_TYPE_RSVD	2	fakee820.c	*< Reserved and unavailable
640	E820_TYPE_ACPI	3	fakee820.c	*< ACPI reclaim memory
641	E820_TYPE_NVS	4	fakee820.c	*< ACPI NVS memory
642	e820map	__use_text16 ( e820map )	fakee820.c
643	K_RDWR	0x60	gateA20.c	keyboard data & cmds (read/write)
644	K_STATUS	0x64	gateA20.c	keyboard status
645	K_CMD	0x64	gateA20.c	keybd ctlr command (write-only)
646	K_OBUF_FUL	0x01	gateA20.c	output buffer full
647	K_IBUF_FUL	0x02	gateA20.c	input buffer full
648	KC_CMD_WIN	0xd0	gateA20.c	read output port
649	KC_CMD_WOUT	0xd1	gateA20.c	write output port
650	KC_CMD_NULL	0xff	gateA20.c	null command ("pulse nothing")
651	KB_SET_A20	0xdf	gateA20.c	enable A20,
652	KB_UNSET_A20	0xdd	gateA20.c	enable A20,
653	SCP_A	0x92	gateA20.c	System Control Port A
654	A20_MAX_RETRIES	32	gateA20.c
655	A20_INT15_RETRIES	32	gateA20.c
656	A20_KBC_RETRIES	(2^21)	gateA20.c
657	A20_SCPA_RETRIES	(2^21)	gateA20.c
658	FAKE_E820	0	hidemem.c
659	ALIGN_HIDDEN	4096	hidemem.c	4kB page alignment should be enough
660	hidemem_base	__use_data16 ( hidemem_base )	hidemem.c
661	hidemem_umalloc	__use_data16 ( hidemem_umalloc )	hidemem.c
662	hidemem_textdata	__use_data16 ( hidemem_textdata )	hidemem.c
663	int15_vector	__use_text16 ( int15_vector )	hidemem.c
664	_text16_memsz	( ( unsigned int ) _text16_memsz )	hidemem.c
665	_data16_memsz	( ( unsigned int ) _data16_memsz )	hidemem.c
666	SMAP	( 0x534d4150 )	memmap.c
667	E820_TYPE_RAM	1	memmap.c	*< Normal memory
668	E820_TYPE_RESERVED	2	memmap.c	*< Reserved and unavailable
669	E820_TYPE_ACPI	3	memmap.c	*< ACPI reclaim memory
670	E820_TYPE_NVS	4	memmap.c	*< ACPI NVS memory
671	E820_ATTR_ENABLED	0x00000001UL	memmap.c
672	E820_ATTR_NONVOLATILE	0x00000002UL	memmap.c
673	E820_ATTR_UNKNOWN	0xfffffffcUL	memmap.c
674	E820_MIN_SIZE	20	memmap.c
675	e820buf	__use_data16 ( e820buf )	memmap.c
676	PNP_BIOS_SIGNATURE	( ( '$' << 0 ) + ( 'P' << 8 ) + ( 'n' << 16 ) + ( 'P' << 24 ) )	pnpbios.c
677	COMBOOT_PSP_CMDLINE_OFFSET	0x81	comboot.c
678	COMBOOT_MAX_CMDLINE_LEN	125	comboot.c
679	ISO9660_BLKSIZE	2048	eltorito.c
680	ELTORITO_VOL_DESC_OFFSET	( 17 * ISO9660_BLKSIZE )	eltorito.c
681	ELTORITO_BOOTABLE	0x88	eltorito.c
682	MAX_MODULES	8	multiboot.c
683	MB_MAX_CMDLINE	512	multiboot.c
684	MB_SUPPORTED_FLAGS	( MB_FLAG_PGALIGN \| MB_FLAG_MEMMAP \| \ MB_FLAG_VIDMODE \| MB_FLAG_RAW )	multiboot.c
685	MB_COMPULSORY_FLAGS	0x0000ffff	multiboot.c
686	MB_OPTIONAL_FLAGS	0xffff0000	multiboot.c
687	MB_UNSUPPORTED_FLAGS	( MB_COMPULSORY_FLAGS & ~MB_SUPPORTED_FLAGS )	multiboot.c
688	mb_cmdlines	__use_data16 ( mb_cmdlines )	multiboot.c
689	mbinfo	__use_data16 ( mbinfo )	multiboot.c
690	mb_bootloader_name	__use_data16 ( mb_bootloader_name )	multiboot.c
691	mbmemmap	__use_data16 ( mbmemmap )	multiboot.c
692	mbmodules	__use_data16 ( mbmodules )	multiboot.c
693	NBI_MAGIC	0x1B031336UL	nbi.c
694	NBI_HEADER_LENGTH	512	nbi.c
695	NBI_LOADADDR_ABS	0x00	nbi.c
696	NBI_LOADADDR_AFTER	0x01	nbi.c
697	NBI_LOADADDR_END	0x02	nbi.c
698	NBI_LOADADDR_BEFORE	0x03	nbi.c
699	abftab	__use_data16 ( abftab )	abft.c
700	ibftab	__use_data16 ( ibftab )	ibft.c
701	int13_vector	__use_text16 ( int13_vector )	int13.c
702	EM_ALIGN	( 4 * 1024 )	memtop_umalloc.c
703	UNOWHERE	( ~UNULL )	memtop_umalloc.c
704	sbftab	__use_data16 ( sbftab )	sbft.c
705	pxe_int_1a_vector	__use_text16 ( pxe_int_1a_vector )	pxe_call.c
706	pxe_exit_hook	__use_data16 ( pxe_exit_hook )	pxe_file.c
707	cached_info	__use_data16 ( cached_info )	pxe_preboot.c
708	PXE_TFTP_URI_LEN	256	pxe_tftp.c
709	pxeparent_params	__use_data16 ( pxeparent_params )	pxeparent.c
710	pxeparent_entry_point	__use_data16 ( pxeparent_entry_point )	pxeparent.c
711	com32_regs	__use_data16 ( com32_regs )	com32_call.c
712	com32_int_vector	__use_data16 ( com32_int_vector )	com32_call.c
713	com32_farcall_proc	__use_data16 ( com32_farcall_proc )	com32_call.c
714	syslinux_version	__use_data16 ( syslinux_version )	comboot_call.c
715	syslinux_copyright	__use_data16 ( syslinux_copyright )	comboot_call.c
716	syslinux_configuration_file	__use_data16 ( syslinux_configuration_file )	comboot_call.c
717	comboot_feature_flags	__use_data16 ( comboot_feature_flags )	comboot_call.c
718	comboot_initial_regs	__use_text16 ( comboot_initial_regs )	comboot_call.c
719	int20_vector	__use_text16 ( int20_vector )	comboot_call.c
720	int21_vector	__use_text16 ( int21_vector )	comboot_call.c
721	int22_vector	__use_text16 ( int22_vector )	comboot_call.c
722	BUILD_SERIAL_STR	" #" XSTR(BUILD_SERIAL_NUM)	config.c
723	BUILD_SERIAL_STR	""	config.c
724	BUILD_ID_STR	" " BUILD_ID	config.c
725	BUILD_ID_STR	""	config.c
726	BUILD_STRING	" [build" BUILD_ID_STR BUILD_SERIAL_STR "]"	config.c
727	BUILD_STRING	""	config.c
728	CHAR_256	0	btext.c
729	cmapsz	(16*256)	btext.c
730	cmapsz	(16*96)	btext.c
731	GUARD_SYMBOL	( ( 'M' << 24 ) \| ( 'I' << 16 ) \| ( 'N' << 8 ) \| 'E' )	debug.c
732	NUM_AUTO_COLOURS	6	debug.c
733	GETKEY_TIMEOUT	( TICKS_PER_SEC / 4 )	getkey.c
734	IS_VADEM	0x0001	i82365.c
735	IS_CIRRUS	0x0002	i82365.c
736	IS_TI	0x0004	i82365.c
737	IS_O2MICRO	0x0008	i82365.c
738	IS_VIA	0x0010	i82365.c
739	IS_TOPIC	0x0020	i82365.c
740	IS_RICOH	0x0040	i82365.c
741	IS_UNKNOWN	0x0400	i82365.c
742	IS_VG_PWR	0x0800	i82365.c
743	IS_DF_PWR	0x1000	i82365.c
744	IS_PCI	0x2000	i82365.c
745	IS_ALIVE	0x8000	i82365.c
746	NORMAL	"\033[0m"	main.c
747	BOLD	"\033[1m"	main.c
748	CYAN	"\033[36m"	main.c
749	MIN_MEMBLOCK_SIZE	( ( size_t ) ( 1 << ( fls ( sizeof ( struct memory_block ) - 1 ) ) ) )	malloc.c
750	NOWHERE	( ( void * ) ~( ( intptr_t ) 0 ) )	malloc.c
751	HEAP_SIZE	( 512 * 1024 )	malloc.c
752	CODE_STATUS	"alpha"	pcmcia.c
753	CODE_VERSION	"0.1.3"	pcmcia.c
754	NUM_DRIVERS	(sizeof(driver)/(sizeof(struct driver_interact_t)))	pcmcia.c
755	SHIFT	1	pc_kbd.c
756	CONTROL	2	pc_kbd.c
757	CAPS	4	pc_kbd.c
758	LACP_DEBUG	0	proto_eth_slow.c
759	SLOW_DST_MAC	"\x01\x80\xc2\x00\x00\x02"	proto_eth_slow.c
760	SLOW_SUBTYPE_LACP	1	proto_eth_slow.c
761	SLOW_SUBTYPE_MARKER	2	proto_eth_slow.c
762	LACP_CMP_LEN	(2 + 6 + 2 + 2 + 2)	proto_eth_slow.c
763	LACP_CP_LEN	(2 + 6 + 2 + 2 + 2 + 1)	proto_eth_slow.c
764	FAST_PERIODIC_TIME	(1*TICKS_PER_SEC)	proto_eth_slow.c
765	SLOW_PERIODIC_TIME	(30*TICKS_PER_SEC)	proto_eth_slow.c
766	SHORT_TIMEOUT_TIME	(3*FAST_PERIODIC_TIME)	proto_eth_slow.c
767	LONG_TIMEOUT_TIME	(3*SLOW_PERIODIC_TIME)	proto_eth_slow.c
768	CHURN_DETECTION_TIME	(60*TICKS_PER_SEC)	proto_eth_slow.c
769	AGGREGATE_WAIT_TIME	(2*TICKS_PER_SEC)	proto_eth_slow.c
770	LACP_ACTIVITY	(1 << 0)	proto_eth_slow.c
771	LACP_TIMEOUT	(1 << 1)	proto_eth_slow.c
772	LACP_AGGREGATION	(1 << 2)	proto_eth_slow.c
773	LACP_SYNCHRONIZATION	(1 << 3)	proto_eth_slow.c
774	LACP_COLLECTING	(1 << 4)	proto_eth_slow.c
775	LACP_DISTRIBUTING	(1 << 5)	proto_eth_slow.c
776	LACP_DEFAULTED	(1 << 6)	proto_eth_slow.c
777	LACP_EXPIRED	(1 << 7)	proto_eth_slow.c
778	UNSELECTED	0	proto_eth_slow.c
779	STANDBY	1	proto_eth_slow.c
780	SELECTED	2	proto_eth_slow.c
781	LACP_NTT_MASK	(LACP_ACTIVITY \| LACP_TIMEOUT \| \ LACP_SYNCHRONIZATION \| LACP_AGGREGATION)	proto_eth_slow.c
782	COMCONSOLE	0x3f8	serial.c
783	COMSPEED	9600	serial.c
784	COMDATA	8	serial.c
785	COMPARITY	0	serial.c
786	COMSTOP	1	serial.c
787	UART_BASE	( COMCONSOLE )	serial.c
788	UART_BAUD	( COMSPEED )	serial.c
789	COMBRD	(115200/UART_BAUD)	serial.c
790	UART_LCS	( ( ( (COMDATA) - 5 ) << 0 ) \| \ ( ( (COMPARITY) ) << 3 ) \| \ ( ( (COMSTOP) - 1 ) << 2 ) )	serial.c
791	UART_RBR	0x00	serial.c
792	UART_TBR	0x00	serial.c
793	UART_IER	0x01	serial.c
794	UART_IIR	0x02	serial.c
795	UART_FCR	0x02	serial.c
796	UART_LCR	0x03	serial.c
797	UART_MCR	0x04	serial.c
798	UART_DLL	0x00	serial.c
799	UART_DLM	0x01	serial.c
800	UART_LSR	0x05	serial.c
801	UART_LSR_TEMPT	0x40	serial.c	Transmitter empty
802	UART_LSR_THRE	0x20	serial.c	Transmit-hold-register empty
803	UART_LSR_BI	0x10	serial.c	Break interrupt indicator
804	UART_LSR_FE	0x08	serial.c	Frame error indicator
805	UART_LSR_PE	0x04	serial.c	Parity error indicator
806	UART_LSR_OE	0x02	serial.c	Overrun error indicator
807	UART_LSR_DR	0x01	serial.c	Receiver data ready
808	UART_MSR	0x06	serial.c
809	UART_SCR	0x07	serial.c
810	settings_root	generic_settings_root.settings	settings.c
811	CHAR_LEN	0	vsprintf.c	*< "hh" length modifier
812	SHORT_LEN	1	vsprintf.c	*< "h" length modifier
813	INT_LEN	2	vsprintf.c	*< no length modifier
814	LONG_LEN	3	vsprintf.c	*< "l" length modifier
815	LONGLONG_LEN	4	vsprintf.c	*< "ll" length modifier
816	SIZE_T_LEN	5	vsprintf.c	*< "z" length modifier
817	LCASE	0x20	vsprintf.c
818	ALT_FORM	0x02	vsprintf.c
819	CRCPOLY	0xedb88320	crc32.c
820	mt	0x80808080	aes.c
821	ml	0x7f7f7f7f	aes.c
822	mh	0xfefefefe	aes.c
823	mm	0x1b1b1b1b	aes.c
824	SELECT_SLAVE	0	spi_bit.c
825	DESELECT_SLAVE	SPI_MODE_SSPOL	spi_bit.c
826	SCSI_MAX_DUMMY_READ_CAP	10	scsi.c
827	ISA_EXTRA_PROBE_ADDR_COUNT	( sizeof ( isa_extra_probe_addrs ) / sizeof ( isa_extra_probe_addrs[0] ) )	isa.c
828	ISAPNP_CARD_ID_FMT	"ID %04x:%04x (\"%s\") serial %x"	isapnp.c
829	ISAPNP_DEV_ID_FMT	"ID %04x:%04x (\"%s\")"	isapnp.c
830	LINDA_SEND_BUF_TOGGLE	0x80	linda.c
831	LINDA_EPB_ALL_CHANNELS	31	linda.c
832	LINDA_SERDES_PARAM_END	{ 0, 0, 0 }	linda.c
833	HZ	100	3c515.c
834	CORKSCREW	1	3c515.c
835	AUTOMEDIA	1	3c515.c
836	TX_RING_SIZE	16	3c515.c
837	RX_RING_SIZE	16	3c515.c
838	PKT_BUF_SZ	1536	3c515.c	Size of each temporary Rx buffer.
839	DRIVER_DEBUG	1	3c515.c
840	CORKSCREW_ID	10	3c515.c
841	EL3_CMD	0x0e	3c515.c
842	EL3_STATUS	0x0e	3c515.c
843	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c515.c
844	NUM_TX_SLOTS	2	amd8111e.c
845	NUM_RX_SLOTS	4	amd8111e.c
846	TX_SLOTS_MASK	1	amd8111e.c
847	RX_SLOTS_MASK	3	amd8111e.c
848	TX_BUF_LEN	1536	amd8111e.c
849	RX_BUF_LEN	1536	amd8111e.c
850	TX_PKT_LEN_MAX	(ETH_FRAME_LEN - ETH_HLEN)	amd8111e.c
851	RX_PKT_LEN_MIN	60	amd8111e.c
852	RX_PKT_LEN_MAX	ETH_FRAME_LEN	amd8111e.c
853	TX_TIMEOUT	3000	amd8111e.c
854	TX_PROCESS_TIME	10	amd8111e.c
855	TX_RETRY	(TX_TIMEOUT / TX_PROCESS_TIME)	amd8111e.c
856	PHY_RW_RETRY	10	amd8111e.c
857	TX_DESC_COUNT	32	atl1e.c	TX descriptors, minimum 32
858	RX_MEM_SIZE	8192	atl1e.c	RX area size, minimum 8kb
859	MAX_FRAME_SIZE	1500	atl1e.c	Maximum MTU supported, minimum 1500
860	PREAMBLE_LEN	7	atl1e.c
861	RX_JUMBO_THRESH	((MAX_FRAME_SIZE + ETH_HLEN + \ VLAN_HLEN + ETH_FCS_LEN + 7) >> 3)	atl1e.c
862	IMT_VAL	100	atl1e.c	interrupt moderator timer, us
863	ICT_VAL	50000	atl1e.c	interrupt clear timer, us
864	SMB_TIMER	200000	atl1e.c
865	RRD_THRESH	1	atl1e.c	packets to queue before interrupt
866	TPD_BURST	5	atl1e.c
867	TPD_THRESH	(TX_DESC_COUNT / 2)	atl1e.c
868	RX_COUNT_DOWN	4	atl1e.c
869	TX_COUNT_DOWN	(IMT_VAL * 4 / 3)	atl1e.c
870	DMAR_DLY_CNT	15	atl1e.c
871	DMAW_DLY_CNT	4	atl1e.c
872	PCI_DEVICE_ID_ATTANSIC_L1E	0x1026	atl1e.c
873	EBUSY	1	bnx2.c
874	ENODEV	2	bnx2.c
875	EINVAL	3	bnx2.c
876	ENOMEM	4	bnx2.c
877	EIO	5	bnx2.c
878	ETHTOOL_ALL_FIBRE_SPEED	(ADVERTISED_1000baseT_Full)	bnx2.c
879	ETHTOOL_ALL_COPPER_SPEED	(ADVERTISED_10baseT_Half \| ADVERTISED_10baseT_Full \| \ ADVERTISED_100baseT_Half \| ADVERTISED_100baseT_Full \| \ ADVERTISED_1	bnx2.c
880	PHY_ALL_10_100_SPEED	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL \| ADVERTISE_CSMA)	bnx2.c
881	PHY_ALL_1000_SPEED	(ADVERTISE_1000HALF \| ADVERTISE_1000FULL)	bnx2.c
882	TX_TIME_OUT	2*TICKS_PER_SEC	davicom.c
883	EEPROM_ADDRLEN	6	davicom.c
884	EEPROM_SIZE	32	davicom.c	1 << EEPROM_ADDRLEN
885	EE_WRITE_CMD	(5 << addr_len)	davicom.c
886	EE_READ_CMD	(6 << addr_len)	davicom.c
887	EE_ERASE_CMD	(7 << addr_len)	davicom.c
888	EE_SHIFT_CLK	0x02	davicom.c	EEPROM shift clock.
889	EE_CS	0x01	davicom.c	EEPROM chip select.
890	EE_DATA_WRITE	0x04	davicom.c	EEPROM chip data in.
891	EE_WRITE_0	0x01	davicom.c
892	EE_WRITE_1	0x05	davicom.c
893	EE_DATA_READ	0x08	davicom.c	EEPROM chip data out.
894	EE_ENB	(0x4800 \| EE_CS)	davicom.c
895	PHY_DATA_0	0x0	davicom.c
896	PHY_DATA_1	0x20000	davicom.c
897	MDCLKH	0x10000	davicom.c
898	BUFLEN	1536	davicom.c
899	NTXD	2	davicom.c
900	NRXD	4	davicom.c
901	txd	davicom_bufs.txd	davicom.c
902	txb	davicom_bufs.txb	davicom.c
903	rxd	davicom_bufs.rxd	davicom.c
904	rxb	davicom_bufs.rxb	davicom.c
905	DEPCA_NICSR	0x00	depca.c	Network interface CSR
906	DEPCA_RBI	0x02	depca.c	RAM buffer index (2k buffer mode)
907	DEPCA_DATA	0x04	depca.c	LANCE registers' data port
908	DEPCA_ADDR	0x06	depca.c	LANCE registers' address port
909	DEPCA_HBASE	0x08	depca.c	EISA high memory base address reg.
910	DEPCA_PROM	0x0c	depca.c	Ethernet address ROM data port
911	DEPCA_CNFG	0x0c	depca.c	EISA Configuration port
912	DEPCA_RBSA	0x0e	depca.c	RAM buffer starting address (2k buff.)
913	CSR0	0	depca.c
914	CSR1	1	depca.c
915	CSR2	2	depca.c
916	CSR3	3	depca.c
917	TO	0x0100	depca.c	Time Out for remote boot
918	SHE	0x0080	depca.c	SHadow memory Enable
919	BS	0x0040	depca.c	Bank Select
920	BUF	0x0020	depca.c	BUFfer size (1->32k, 0->64k)
921	RBE	0x0010	depca.c	Remote Boot Enable (1->net boot)
922	AAC	0x0008	depca.c	Address ROM Address Counter (1->enable)
923	_128KB	0x0008	depca.c	128kB Network RAM (1->enable)
924	IM	0x0004	depca.c	Interrupt Mask (1->mask)
925	IEN	0x0002	depca.c	Interrupt tristate ENable (1->enable)
926	LED	0x0001	depca.c	LED control
927	ERR	0x8000	depca.c	Error summary
928	BABL	0x4000	depca.c	Babble transmitter timeout error
929	CERR	0x2000	depca.c	Collision Error
930	MISS	0x1000	depca.c	Missed packet
931	MERR	0x0800	depca.c	Memory Error
932	RINT	0x0400	depca.c	Receiver Interrupt
933	TINT	0x0200	depca.c	Transmit Interrupt
934	IDON	0x0100	depca.c	Initialization Done
935	INTR	0x0080	depca.c	Interrupt Flag
936	INEA	0x0040	depca.c	Interrupt Enable
937	RXON	0x0020	depca.c	Receiver on
938	TXON	0x0010	depca.c	Transmitter on
939	TDMD	0x0008	depca.c	Transmit Demand
940	STOP	0x0004	depca.c	Stop
941	STRT	0x0002	depca.c	Start
942	INIT	0x0001	depca.c	Initialize
943	INTM	0xff00	depca.c	Interrupt Mask
944	INTE	0xfff0	depca.c	Interrupt Enable
945	BSWP	0x0004	depca.c	Byte SWaP
946	ACON	0x0002	depca.c	ALE control
947	BCON	0x0001	depca.c	Byte CONtrol
948	PROM	0x8000	depca.c	Promiscuous Mode
949	EMBA	0x0080	depca.c	Enable Modified Back-off Algorithm
950	INTL	0x0040	depca.c	Internal Loopback
951	DRTY	0x0020	depca.c	Disable Retry
952	COLL	0x0010	depca.c	Force Collision
953	DTCR	0x0008	depca.c	Disable Transmit CRC
954	LOOP	0x0004	depca.c	Loopback
955	DTX	0x0002	depca.c	Disable the Transmitter
956	DRX	0x0001	depca.c	Disable the Receiver
957	R_OWN	0x80000000	depca.c	Owner bit 0 = host, 1 = lance
958	R_ERR	0x4000	depca.c	Error Summary
959	R_FRAM	0x2000	depca.c	Framing Error
960	R_OFLO	0x1000	depca.c	Overflow Error
961	R_CRC	0x0800	depca.c	CRC Error
962	R_BUFF	0x0400	depca.c	Buffer Error
963	R_STP	0x0200	depca.c	Start of Packet
964	R_ENP	0x0100	depca.c	End of Packet
965	T_OWN	0x80000000	depca.c	Owner bit 0 = host, 1 = lance
966	T_ERR	0x4000	depca.c	Error Summary
967	T_ADD_FCS	0x2000	depca.c	More the 1 retry needed to Xmit
968	T_MORE	0x1000	depca.c	>1 retry to transmit packet
969	T_ONE	0x0800	depca.c	1 try needed to transmit the packet
970	T_DEF	0x0400	depca.c	Deferred
971	T_STP	0x02000000	depca.c	Start of Packet
972	T_ENP	0x01000000	depca.c	End of Packet
973	T_FLAGS	0xff000000	depca.c	TX Flags Field
974	TMD3_BUFF	0x8000	depca.c	BUFFer error
975	TMD3_UFLO	0x4000	depca.c	UnderFLOw error
976	TMD3_RES	0x2000	depca.c	REServed
977	TMD3_LCOL	0x1000	depca.c	Late COLlision
978	TMD3_LCAR	0x0800	depca.c	Loss of CARrier
979	TMD3_RTRY	0x0400	depca.c	ReTRY error
980	PROBE_LENGTH	32	depca.c
981	NUM_RX_DESC	2	depca.c	Number of RX descriptors
982	NUM_TX_DESC	2	depca.c	Number of TX descriptors
983	RX_BUFF_SZ	1536	depca.c	Buffer size for each Rx buffer
984	TX_BUFF_SZ	1536	depca.c	Buffer size for each Tx buffer
985	DEPCA_MODEL	DEPCA	depca.c
986	DEPCA_RAM_BASE	0xd0000	depca.c
987	ALIGN4	((u32)4 - 1)	depca.c	1 longword align
988	ALIGN8	((u32)8 - 1)	depca.c	2 longword (quadword) align
989	ALIGN	ALIGN8	depca.c	Keep the LANCE happy...
990	LA_MASK	0x0000ffff	depca.c	LANCE address mask for mapping network RAM
991	PCI_DM9132_ID	0x91321282	dmfe.c	Davicom DM9132 ID
992	PCI_DM9102_ID	0x91021282	dmfe.c	Davicom DM9102 ID
993	PCI_DM9100_ID	0x91001282	dmfe.c	Davicom DM9100 ID
994	PCI_DM9009_ID	0x90091282	dmfe.c	Davicom DM9009 ID
995	DM9102_IO_SIZE	0x80	dmfe.c
996	DM9102A_IO_SIZE	0x100	dmfe.c
997	TX_MAX_SEND_CNT	0x1	dmfe.c	Maximum tx packet per time
998	TX_DESC_CNT	0x10	dmfe.c	Allocated Tx descriptors
999	RX_DESC_CNT	0x20	dmfe.c	Allocated Rx descriptors
1000	TX_FREE_DESC_CNT	(TX_DESC_CNT - 2)	dmfe.c	Max TX packet count
1001	TX_WAKE_DESC_CNT	(TX_DESC_CNT - 3)	dmfe.c	TX wakeup count
1002	DESC_ALL_CNT	(TX_DESC_CNT + RX_DESC_CNT)	dmfe.c
1003	TX_BUF_ALLOC	0x600	dmfe.c
1004	RX_ALLOC_SIZE	0x620	dmfe.c
1005	DM910X_RESET	1	dmfe.c
1006	CR0_DEFAULT	0x00E00000	dmfe.c	TX & RX burst mode
1007	CR6_DEFAULT	0x00080000	dmfe.c	HD
1008	CR7_DEFAULT	0x180c1	dmfe.c
1009	CR15_DEFAULT	0x06	dmfe.c	TxJabber RxWatchdog
1010	TDES0_ERR_MASK	0x4302	dmfe.c	TXJT, LC, EC, FUE
1011	MAX_PACKET_SIZE	1514	dmfe.c
1012	DMFE_MAX_MULTICAST	14	dmfe.c
1013	RX_COPY_SIZE	100	dmfe.c
1014	MAX_CHECK_PACKET	0x8000	dmfe.c
1015	DM9801_NOISE_FLOOR	8	dmfe.c
1016	DM9802_NOISE_FLOOR	5	dmfe.c
1017	DMFE_10MHF	0	dmfe.c
1018	DMFE_100MHF	1	dmfe.c
1019	DMFE_10MFD	4	dmfe.c
1020	DMFE_100MFD	5	dmfe.c
1021	DMFE_AUTO	8	dmfe.c
1022	DMFE_1M_HPNA	0x10	dmfe.c
1023	DMFE_TXTH_72	0x400000	dmfe.c	TX TH 72 byte
1024	DMFE_TXTH_96	0x404000	dmfe.c	TX TH 96 byte
1025	DMFE_TXTH_128	0x0000	dmfe.c	TX TH 128 byte
1026	DMFE_TXTH_256	0x4000	dmfe.c	TX TH 256 byte
1027	DMFE_TXTH_512	0x8000	dmfe.c	TX TH 512 byte
1028	DMFE_TXTH_1K	0xC000	dmfe.c	TX TH 1K byte
1029	DMFE_TIMER_WUT	(jiffies + HZ * 1)	dmfe.c	timer wakeup time : 1 second
1030	DMFE_TX_TIMEOUT	((3*HZ)/2)	dmfe.c	tx packet time-out time 1.5 s"
1031	DMFE_TX_KICK	(HZ/2)	dmfe.c	tx packet Kick-out time 0.5 s"
1032	CR9_SROM_READ	0x4800	dmfe.c
1033	CR9_SRCS	0x1	dmfe.c
1034	CR9_SRCLK	0x2	dmfe.c
1035	CR9_CRDOUT	0x8	dmfe.c
1036	SROM_DATA_0	0x0	dmfe.c
1037	SROM_DATA_1	0x4	dmfe.c
1038	PHY_DATA_1	0x20000	dmfe.c
1039	PHY_DATA_0	0x00000	dmfe.c
1040	MDCLKH	0x10000	dmfe.c
1041	PHY_POWER_DOWN	0x800	dmfe.c
1042	SROM_V41_CODE	0x14	dmfe.c
1043	DEVICE	net_device	dmfe.c
1044	txd	dmfe_bufs.txd	dmfe.c
1045	txb	dmfe_bufs.txb	dmfe.c
1046	rxd	dmfe_bufs.rxd	dmfe.c
1047	rxb	dmfe_bufs.rxb	dmfe.c
1048	board_found	1	dmfe.c
1049	valid_link	0	dmfe.c
1050	LAN595	0	eepro.c
1051	LAN595TX	1	eepro.c
1052	LAN595FX	2	eepro.c
1053	LAN595FX_10ISA	3	eepro.c
1054	SLOW_DOWN	inb(0x80);	eepro.c
1055	SA_ADDR0	0x00	eepro.c	Etherexpress Pro/10
1056	SA_ADDR1	0xaa	eepro.c
1057	SA_ADDR2	0x00	eepro.c
1058	ee_PnP	0	eepro.c	Plug 'n Play enable bit
1059	ee_Word1	1	eepro.c	Word 1?
1060	ee_BusWidth	2	eepro.c	8/16 bit
1061	ee_FlashAddr	3	eepro.c	Flash Address
1062	ee_FlashMask	0x7	eepro.c	Mask
1063	ee_AutoIO	6	eepro.c
1064	ee_reserved0	7	eepro.c	=0!
1065	ee_Flash	8	eepro.c	Flash there?
1066	ee_AutoNeg	9	eepro.c	Auto Negotiation enabled?
1067	ee_IO0	10	eepro.c	IO Address LSB
1068	ee_IO0Mask	0x	eepro.c	...
1069	ee_IO1	15	eepro.c	IO MSB
1070	ee_IntSel	0	eepro.c	Interrupt
1071	ee_IntMask	0x7	eepro.c
1072	ee_LI	3	eepro.c	Link Integrity 0= enabled
1073	ee_PC	4	eepro.c	Polarity Correction 0= enabled
1074	ee_TPE_AUI	5	eepro.c	PortSelection 1=TPE
1075	ee_Jabber	6	eepro.c	Jabber prevention 0= enabled
1076	ee_AutoPort	7	eepro.c	Auto Port Selection 1= Disabled
1077	ee_SMOUT	8	eepro.c	SMout Pin Control 0= Input
1078	ee_PROM	9	eepro.c	Flash EPROM / PROM 0=Flash
1079	ee_reserved1	10	eepro.c	.. 12 =0!
1080	ee_AltReady	13	eepro.c	Alternate Ready, 0=normal
1081	ee_reserved2	14	eepro.c	=0!
1082	ee_Duplex	15	eepro.c
1083	ee_IA5	0	eepro.c	bit start for individual Addr Byte 5
1084	ee_IA4	8	eepro.c	bit start for individual Addr Byte 5
1085	ee_IA3	0	eepro.c	bit start for individual Addr Byte 5
1086	ee_IA2	8	eepro.c	bit start for individual Addr Byte 5
1087	ee_IA1	0	eepro.c	bit start for individual Addr Byte 5
1088	ee_IA0	8	eepro.c	bit start for individual Addr Byte 5
1089	ee_BNC_TPE	0	eepro.c	0=TPE
1090	ee_BootType	1	eepro.c	00=None, 01=IPX, 10=ODI, 11=NDIS
1091	ee_BootTypeMask	0x3	eepro.c
1092	ee_NumConn	3	eepro.c	Number of Connections 0= One or Two
1093	ee_FlashSock	4	eepro.c	Presence of Flash Socket 0= Present
1094	ee_PortTPE	5	eepro.c
1095	ee_PortBNC	6	eepro.c
1096	ee_PortAUI	7	eepro.c
1097	ee_PowerMgt	10	eepro.c	0= disabled
1098	ee_CP	13	eepro.c	Concurrent Processing
1099	ee_CPMask	0x7	eepro.c
1100	ee_Stepping	0	eepro.c	Stepping info
1101	ee_StepMask	0x0F	eepro.c
1102	ee_BoardID	4	eepro.c	Manucaturer Board ID, reserved
1103	ee_BoardMask	0x0FFF	eepro.c
1104	ee_INT_TO_IRQ	0	eepro.c	int to IRQ Mapping = 0x1EB8 for Pro/10+
1105	ee_FX_INT2IRQ	0x1EB8	eepro.c	the _only_ mapping allowed for FX chips
1106	ee_SIZE	0x40	eepro.c	total EEprom Size
1107	ee_Checksum	0xBABA	eepro.c	initial and final value for adding checksum
1108	ee_addr_vendor	0x10	eepro.c	Word offset for EISA Vendor ID
1109	ee_addr_id	0x11	eepro.c	Word offset for Card ID
1110	ee_addr_SN	0x12	eepro.c	Serial Number
1111	ee_addr_CRC_8	0x14	eepro.c	CRC over last thee Bytes
1112	ee_vendor_intel0	0x25	eepro.c	Vendor ID Intel
1113	ee_vendor_intel1	0xD4	eepro.c
1114	ee_id_eepro10p0	0x10	eepro.c	ID for eepro/10+
1115	ee_id_eepro10p1	0x31	eepro.c
1116	RAM_SIZE	0x8000	eepro.c
1117	RCV_HEADER	8	eepro.c
1118	RCV_DEFAULT_RAM	0x6000	eepro.c
1119	RCV_RAM	rcv_ram	eepro.c
1120	XMT_HEADER	8	eepro.c
1121	XMT_RAM	(RAM_SIZE - RCV_RAM)	eepro.c
1122	XMT_START	((rcv_start + RCV_RAM) % RAM_SIZE)	eepro.c
1123	RCV_LOWER_LIMIT	(rcv_start >> 8)	eepro.c
1124	RCV_UPPER_LIMIT	(((rcv_start + RCV_RAM) - 2) >> 8)	eepro.c
1125	XMT_LOWER_LIMIT	(XMT_START >> 8)	eepro.c
1126	XMT_UPPER_LIMIT	(((XMT_START + XMT_RAM) - 2) >> 8)	eepro.c
1127	RCV_START_PRO	0x00	eepro.c
1128	RCV_START_10	XMT_RAM	eepro.c
1129	RCV_DONE	0x0008	eepro.c
1130	RX_OK	0x2000	eepro.c
1131	RX_ERROR	0x0d81	eepro.c
1132	TX_DONE_BIT	0x0080	eepro.c
1133	CHAIN_BIT	0x8000	eepro.c
1134	XMT_STATUS	0x02	eepro.c
1135	XMT_CHAIN	0x04	eepro.c
1136	XMT_COUNT	0x06	eepro.c
1137	BANK0_SELECT	0x00	eepro.c
1138	BANK1_SELECT	0x40	eepro.c
1139	BANK2_SELECT	0x80	eepro.c
1140	COMMAND_REG	0x00	eepro.c	Register 0
1141	MC_SETUP	0x03	eepro.c
1142	XMT_CMD	0x04	eepro.c
1143	DIAGNOSE_CMD	0x07	eepro.c
1144	RCV_ENABLE_CMD	0x08	eepro.c
1145	RCV_DISABLE_CMD	0x0a	eepro.c
1146	STOP_RCV_CMD	0x0b	eepro.c
1147	RESET_CMD	0x0e	eepro.c
1148	POWER_DOWN_CMD	0x18	eepro.c
1149	RESUME_XMT_CMD	0x1c	eepro.c
1150	SEL_RESET_CMD	0x1e	eepro.c
1151	STATUS_REG	0x01	eepro.c	Register 1
1152	RX_INT	0x02	eepro.c
1153	TX_INT	0x04	eepro.c
1154	EXEC_STATUS	0x30	eepro.c
1155	ID_REG	0x02	eepro.c	Register 2
1156	R_ROBIN_BITS	0xc0	eepro.c	round robin counter
1157	ID_REG_MASK	0x2c	eepro.c
1158	ID_REG_SIG	0x24	eepro.c
1159	AUTO_ENABLE	0x10	eepro.c
1160	INT_MASK_REG	0x03	eepro.c	Register 3
1161	RX_STOP_MASK	0x01	eepro.c
1162	RX_MASK	0x02	eepro.c
1163	TX_MASK	0x04	eepro.c
1164	EXEC_MASK	0x08	eepro.c
1165	ALL_MASK	0x0f	eepro.c
1166	IO_32_BIT	0x10	eepro.c
1167	RCV_BAR	0x04	eepro.c	The following are word (16-bit) registers
1168	RCV_STOP	0x06	eepro.c
1169	XMT_BAR_PRO	0x0a	eepro.c
1170	XMT_BAR_10	0x0b	eepro.c
1171	HOST_ADDRESS_REG	0x0c	eepro.c
1172	IO_PORT	0x0e	eepro.c
1173	IO_PORT_32_BIT	0x0c	eepro.c
1174	REG1	0x01	eepro.c
1175	WORD_WIDTH	0x02	eepro.c
1176	INT_ENABLE	0x80	eepro.c
1177	INT_NO_REG	0x02	eepro.c
1178	RCV_LOWER_LIMIT_REG	0x08	eepro.c
1179	RCV_UPPER_LIMIT_REG	0x09	eepro.c
1180	XMT_LOWER_LIMIT_REG_PRO	0x0a	eepro.c
1181	XMT_UPPER_LIMIT_REG_PRO	0x0b	eepro.c
1182	XMT_LOWER_LIMIT_REG_10	0x0b	eepro.c
1183	XMT_UPPER_LIMIT_REG_10	0x0a	eepro.c
1184	XMT_Chain_Int	0x20	eepro.c	Interrupt at the end of the transmit chain
1185	XMT_Chain_ErrStop	0x40	eepro.c	Interrupt at the end of the chain even if there are errors
1186	RCV_Discard_BadFrame	0x80	eepro.c	Throw bad frames away, and continue to receive others
1187	REG2	0x02	eepro.c
1188	PRMSC_Mode	0x01	eepro.c
1189	Multi_IA	0x20	eepro.c
1190	REG3	0x03	eepro.c
1191	TPE_BIT	0x04	eepro.c
1192	BNC_BIT	0x20	eepro.c
1193	REG13	0x0d	eepro.c
1194	FDX	0x00	eepro.c
1195	A_N_ENABLE	0x02	eepro.c
1196	I_ADD_REG0	0x04	eepro.c
1197	I_ADD_REG1	0x05	eepro.c
1198	I_ADD_REG2	0x06	eepro.c
1199	I_ADD_REG3	0x07	eepro.c
1200	I_ADD_REG4	0x08	eepro.c
1201	I_ADD_REG5	0x09	eepro.c
1202	EEPROM_REG_PRO	0x0a	eepro.c
1203	EEPROM_REG_10	0x0b	eepro.c
1204	EESK	0x01	eepro.c
1205	EECS	0x02	eepro.c
1206	EEDI	0x04	eepro.c
1207	EEDO	0x08	eepro.c
1208	EE_READ_CMD	(6 << 6)	eepro.c
1209	INTERRUPT_MASK	( SCBMaskEarlyRx \| SCBMaskFlowCtl )	eepro100.c
1210	RFD_STATUS	( RFD_OK \| RFDRxCol \| RFDRxErr \| RFDShort \| \ RFDDMAOverrun \| RFDNoBufs \| RFDCRCError )	eepro100.c
1211	TX_RING_SIZE	2	epic100.c	use at least 2 buffers for TX
1212	RX_RING_SIZE	2	epic100.c
1213	PKT_BUF_SZ	1536	epic100.c	Size of each temporary Tx/Rx buffer.
1214	EPIC_DEBUG	0	epic100.c	debug level
1215	TD_STDFLAGS	TD_LASTDESC	epic100.c
1216	rx_ring	epic100_bufs.rx_ring	epic100.c
1217	tx_ring	epic100_bufs.tx_ring	epic100.c
1218	rx_packet	epic100_bufs.rx_packet	epic100.c
1219	tx_packet	epic100_bufs.tx_packet	epic100.c
1220	EE_SHIFT_CLK	0x04	epic100.c	EEPROM shift clock.
1221	EE_CS	0x02	epic100.c	EEPROM chip select.
1222	EE_DATA_WRITE	0x08	epic100.c	EEPROM chip data in.
1223	EE_WRITE_0	0x01	epic100.c
1224	EE_WRITE_1	0x09	epic100.c
1225	EE_DATA_READ	0x10	epic100.c	EEPROM chip data out.
1226	EE_ENB	(0x0001 \| EE_CS)	epic100.c
1227	EE_WRITE_CMD	(5 << 6)	epic100.c
1228	EE_READ_CMD	(6 << 6)	epic100.c
1229	EE_ERASE_CMD	(7 << 6)	epic100.c
1230	MII_READOP	1	epic100.c
1231	MII_WRITEOP	2	epic100.c
1232	FALCON_USE_IO_BAR	0	etherfabric.c
1233	HZ	100	etherfabric.c
1234	EFAB_BYTE	1	etherfabric.c
1235	GMII_PSSR	0x11	etherfabric.c	PHY-specific status register
1236	LPA_EF_1000FULL	0x00020000	etherfabric.c
1237	LPA_EF_1000HALF	0x00010000	etherfabric.c
1238	LPA_EF_10000FULL	0x00040000	etherfabric.c
1239	LPA_EF_10000HALF	0x00080000	etherfabric.c
1240	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	etherfabric.c
1241	LPA_EF_1000	( LPA_EF_1000FULL \| LPA_EF_1000HALF )	etherfabric.c
1242	LPA_EF_10000	( LPA_EF_10000FULL \| LPA_EF_10000HALF )	etherfabric.c
1243	LPA_EF_DUPLEX	( LPA_10FULL \| LPA_100FULL \| LPA_EF_1000FULL \| \ LPA_EF_10000FULL )	etherfabric.c
1244	LPA_OTHER	~( LPA_10FULL \| LPA_10HALF \| LPA_100FULL \| \ LPA_100HALF \| LPA_EF_1000FULL \| LPA_EF_1000HALF )	etherfabric.c
1245	PSSR_LSTATUS	0x0400	etherfabric.c	Bit 10 - link status
1246	MDIO_MMD_PMAPMD	(1)	etherfabric.c
1247	MDIO_MMD_WIS	(2)	etherfabric.c
1248	MDIO_MMD_PCS	(3)	etherfabric.c
1249	MDIO_MMD_PHYXS	(4)	etherfabric.c
1250	MDIO_MMD_DTEXS	(5)	etherfabric.c
1251	MDIO_MMD_TC	(6)	etherfabric.c
1252	MDIO_MMD_AN	(7)	etherfabric.c
1253	MDIO_MMDREG_CTRL1	(0)	etherfabric.c
1254	MDIO_MMDREG_STAT1	(1)	etherfabric.c
1255	MDIO_MMDREG_DEVS0	(5)	etherfabric.c
1256	MDIO_MMDREG_STAT2	(8)	etherfabric.c
1257	MDIO_MMDREG_CTRL1_RESET_LBN	(15)	etherfabric.c
1258	MDIO_MMDREG_CTRL1_RESET_WIDTH	(1)	etherfabric.c
1259	MDIO_MMDREG_STAT1_FAULT_LBN	(7)	etherfabric.c
1260	MDIO_MMDREG_STAT1_FAULT_WIDTH	(1)	etherfabric.c
1261	MDIO_MMDREG_STAT1_LINK_LBN	(2)	etherfabric.c
1262	MDIO_MMDREG_STAT1_LINK_WIDTH	(1)	etherfabric.c
1263	MDIO_MMDREG_DEVS0_DTEXS	DEV_PRESENT_BIT(MDIO_MMD_DTEXS)	etherfabric.c
1264	MDIO_MMDREG_DEVS0_PHYXS	DEV_PRESENT_BIT(MDIO_MMD_PHYXS)	etherfabric.c
1265	MDIO_MMDREG_DEVS0_PCS	DEV_PRESENT_BIT(MDIO_MMD_PCS)	etherfabric.c
1266	MDIO_MMDREG_DEVS0_WIS	DEV_PRESENT_BIT(MDIO_MMD_WIS)	etherfabric.c
1267	MDIO_MMDREG_DEVS0_PMAPMD	DEV_PRESENT_BIT(MDIO_MMD_PMAPMD)	etherfabric.c
1268	MDIO_MMDREG_DEVS0_AN	DEV_PRESENT_BIT(MDIO_MMD_AN)	etherfabric.c
1269	MDIO_MMDREG_STAT2_PRESENT_VAL	(2)	etherfabric.c
1270	MDIO_MMDREG_STAT2_PRESENT_LBN	(14)	etherfabric.c
1271	MDIO_MMDREG_STAT2_PRESENT_WIDTH	(2)	etherfabric.c
1272	MDIO_PHYXS_LANE_STATE	(0x18)	etherfabric.c
1273	MDIO_PHYXS_LANE_ALIGNED_LBN	(12)	etherfabric.c
1274	MDIO_PHYXS_LANE_SYNC0_LBN	(0)	etherfabric.c
1275	MDIO_PHYXS_LANE_SYNC1_LBN	(1)	etherfabric.c
1276	MDIO_PHYXS_LANE_SYNC2_LBN	(2)	etherfabric.c
1277	MDIO_PHYXS_LANE_SYNC3_LBN	(3)	etherfabric.c
1278	MDIO45_RESET_TRIES	100	etherfabric.c
1279	MDIO45_RESET_SPINTIME	10	etherfabric.c
1280	FCN_IOM_IND_ADR_REG	0x0	etherfabric.c
1281	FCN_IOM_IND_DAT_REG	0x4	etherfabric.c
1282	FCN_ADR_REGION_REG_KER	0x00	etherfabric.c
1283	FCN_ADR_REGION0_LBN	0	etherfabric.c
1284	FCN_ADR_REGION0_WIDTH	18	etherfabric.c
1285	FCN_ADR_REGION1_LBN	32	etherfabric.c
1286	FCN_ADR_REGION1_WIDTH	18	etherfabric.c
1287	FCN_ADR_REGION2_LBN	64	etherfabric.c
1288	FCN_ADR_REGION2_WIDTH	18	etherfabric.c
1289	FCN_ADR_REGION3_LBN	96	etherfabric.c
1290	FCN_ADR_REGION3_WIDTH	18	etherfabric.c
1291	FCN_INT_EN_REG_KER	0x0010	etherfabric.c
1292	FCN_MEM_PERR_INT_EN_KER_LBN	5	etherfabric.c
1293	FCN_MEM_PERR_INT_EN_KER_WIDTH	1	etherfabric.c
1294	FCN_KER_INT_CHAR_LBN	4	etherfabric.c
1295	FCN_KER_INT_CHAR_WIDTH	1	etherfabric.c
1296	FCN_KER_INT_KER_LBN	3	etherfabric.c
1297	FCN_KER_INT_KER_WIDTH	1	etherfabric.c
1298	FCN_ILL_ADR_ERR_INT_EN_KER_LBN	2	etherfabric.c
1299	FCN_ILL_ADR_ERR_INT_EN_KER_WIDT	1	etherfabric.c
1300	FCN_SRM_PERR_INT_EN_KER_LBN	1	etherfabric.c
1301	FCN_SRM_PERR_INT_EN_KER_WIDTH	1	etherfabric.c
1302	FCN_DRV_INT_EN_KER_LBN	0	etherfabric.c
1303	FCN_DRV_INT_EN_KER_WIDTH	1	etherfabric.c
1304	FCN_INT_ADR_REG_KER	0x0030	etherfabric.c
1305	FCN_INT_ADR_KER_LBN	0	etherfabric.c
1306	FCN_INT_ADR_KER_WIDTH	EFAB_DMA_TYPE_WIDTH ( 64 )	etherfabric.c
1307	INT_ISR0_B0	0x90	etherfabric.c
1308	INT_ISR1_B0	0xA0	etherfabric.c
1309	FCN_INT_ACK_KER_REG_A1	0x0050	etherfabric.c
1310	INT_ACK_DUMMY_DATA_LBN	0	etherfabric.c
1311	INT_ACK_DUMMY_DATA_WIDTH	32	etherfabric.c
1312	WORK_AROUND_BROKEN_PCI_READS_RE	0x0070	etherfabric.c
1313	FCN_HW_INIT_REG_KER	0x00c0	etherfabric.c
1314	FCN_BCSR_TARGET_MASK_LBN	101	etherfabric.c
1315	FCN_BCSR_TARGET_MASK_WIDTH	4	etherfabric.c
1316	FCN_EE_SPI_HCMD_REG	0x0100	etherfabric.c
1317	FCN_EE_SPI_HCMD_CMD_EN_LBN	31	etherfabric.c
1318	FCN_EE_SPI_HCMD_CMD_EN_WIDTH	1	etherfabric.c
1319	FCN_EE_WR_TIMER_ACTIVE_LBN	28	etherfabric.c
1320	FCN_EE_WR_TIMER_ACTIVE_WIDTH	1	etherfabric.c
1321	FCN_EE_SPI_HCMD_SF_SEL_LBN	24	etherfabric.c
1322	FCN_EE_SPI_HCMD_SF_SEL_WIDTH	1	etherfabric.c
1323	FCN_EE_SPI_EEPROM	0	etherfabric.c
1324	FCN_EE_SPI_FLASH	1	etherfabric.c
1325	FCN_EE_SPI_HCMD_DABCNT_LBN	16	etherfabric.c
1326	FCN_EE_SPI_HCMD_DABCNT_WIDTH	5	etherfabric.c
1327	FCN_EE_SPI_HCMD_READ_LBN	15	etherfabric.c
1328	FCN_EE_SPI_HCMD_READ_WIDTH	1	etherfabric.c
1329	FCN_EE_SPI_READ	1	etherfabric.c
1330	FCN_EE_SPI_WRITE	0	etherfabric.c
1331	FCN_EE_SPI_HCMD_DUBCNT_LBN	12	etherfabric.c
1332	FCN_EE_SPI_HCMD_DUBCNT_WIDTH	2	etherfabric.c
1333	FCN_EE_SPI_HCMD_ADBCNT_LBN	8	etherfabric.c
1334	FCN_EE_SPI_HCMD_ADBCNT_WIDTH	2	etherfabric.c
1335	FCN_EE_SPI_HCMD_ENC_LBN	0	etherfabric.c
1336	FCN_EE_SPI_HCMD_ENC_WIDTH	8	etherfabric.c
1337	FCN_EE_SPI_HADR_REG	0x0110	etherfabric.c
1338	FCN_EE_SPI_HADR_DUBYTE_LBN	24	etherfabric.c
1339	FCN_EE_SPI_HADR_DUBYTE_WIDTH	8	etherfabric.c
1340	FCN_EE_SPI_HADR_ADR_LBN	0	etherfabric.c
1341	FCN_EE_SPI_HADR_ADR_WIDTH	24	etherfabric.c
1342	FCN_EE_SPI_HDATA_REG	0x0120	etherfabric.c
1343	FCN_EE_SPI_HDATA3_LBN	96	etherfabric.c
1344	FCN_EE_SPI_HDATA3_WIDTH	32	etherfabric.c
1345	FCN_EE_SPI_HDATA2_LBN	64	etherfabric.c
1346	FCN_EE_SPI_HDATA2_WIDTH	32	etherfabric.c
1347	FCN_EE_SPI_HDATA1_LBN	32	etherfabric.c
1348	FCN_EE_SPI_HDATA1_WIDTH	32	etherfabric.c
1349	FCN_EE_SPI_HDATA0_LBN	0	etherfabric.c
1350	FCN_EE_SPI_HDATA0_WIDTH	32	etherfabric.c
1351	FCN_EE_VPD_CFG_REG	0x0140	etherfabric.c
1352	FCN_EE_VPD_EN_LBN	0	etherfabric.c
1353	FCN_EE_VPD_EN_WIDTH	1	etherfabric.c
1354	FCN_EE_VPD_EN_AD9_MODE_LBN	1	etherfabric.c
1355	FCN_EE_VPD_EN_AD9_MODE_WIDTH	1	etherfabric.c
1356	FCN_EE_EE_CLOCK_DIV_LBN	112	etherfabric.c
1357	FCN_EE_EE_CLOCK_DIV_WIDTH	7	etherfabric.c
1358	FCN_EE_SF_CLOCK_DIV_LBN	120	etherfabric.c
1359	FCN_EE_SF_CLOCK_DIV_WIDTH	7	etherfabric.c
1360	FCN_NIC_STAT_REG	0x0200	etherfabric.c
1361	FCN_ONCHIP_SRAM_LBN	16	etherfabric.c
1362	FCN_ONCHIP_SRAM_WIDTH	1	etherfabric.c
1363	FCN_SF_PRST_LBN	9	etherfabric.c
1364	FCN_SF_PRST_WIDTH	1	etherfabric.c
1365	FCN_EE_PRST_LBN	8	etherfabric.c
1366	FCN_EE_PRST_WIDTH	1	etherfabric.c
1367	FCN_EE_STRAP_LBN	7	etherfabric.c
1368	FCN_EE_STRAP_WIDTH	1	etherfabric.c
1369	FCN_PCI_PCIX_MODE_LBN	4	etherfabric.c
1370	FCN_PCI_PCIX_MODE_WIDTH	3	etherfabric.c
1371	FCN_PCI_PCIX_MODE_PCI33_DECODE	0	etherfabric.c
1372	FCN_PCI_PCIX_MODE_PCI66_DECODE	1	etherfabric.c
1373	FCN_PCI_PCIX_MODE_PCIX66_DECODE	5	etherfabric.c
1374	FCN_PCI_PCIX_MODE_PCIX100_DECOD	6	etherfabric.c
1375	FCN_PCI_PCIX_MODE_PCIX133_DECOD	7	etherfabric.c
1376	FCN_STRAP_ISCSI_EN_LBN	3	etherfabric.c
1377	FCN_STRAP_ISCSI_EN_WIDTH	1	etherfabric.c
1378	FCN_STRAP_PINS_LBN	0	etherfabric.c
1379	FCN_STRAP_PINS_WIDTH	3	etherfabric.c
1380	FCN_STRAP_10G_LBN	2	etherfabric.c
1381	FCN_STRAP_10G_WIDTH	1	etherfabric.c
1382	FCN_STRAP_DUAL_PORT_LBN	1	etherfabric.c
1383	FCN_STRAP_DUAL_PORT_WIDTH	1	etherfabric.c
1384	FCN_STRAP_PCIE_LBN	0	etherfabric.c
1385	FCN_STRAP_PCIE_WIDTH	1	etherfabric.c
1386	FALCON_REV_A0	0	etherfabric.c
1387	FALCON_REV_A1	1	etherfabric.c
1388	FALCON_REV_B0	2	etherfabric.c
1389	FCN_GPIO_CTL_REG_KER	0x0210	etherfabric.c
1390	FCN_GPIO_CTL_REG_KER	0x0210	etherfabric.c
1391	FCN_GPIO3_OEN_LBN	27	etherfabric.c
1392	FCN_GPIO3_OEN_WIDTH	1	etherfabric.c
1393	FCN_GPIO2_OEN_LBN	26	etherfabric.c
1394	FCN_GPIO2_OEN_WIDTH	1	etherfabric.c
1395	FCN_GPIO1_OEN_LBN	25	etherfabric.c
1396	FCN_GPIO1_OEN_WIDTH	1	etherfabric.c
1397	FCN_GPIO0_OEN_LBN	24	etherfabric.c
1398	FCN_GPIO0_OEN_WIDTH	1	etherfabric.c
1399	FCN_GPIO3_OUT_LBN	19	etherfabric.c
1400	FCN_GPIO3_OUT_WIDTH	1	etherfabric.c
1401	FCN_GPIO2_OUT_LBN	18	etherfabric.c
1402	FCN_GPIO2_OUT_WIDTH	1	etherfabric.c
1403	FCN_GPIO1_OUT_LBN	17	etherfabric.c
1404	FCN_GPIO1_OUT_WIDTH	1	etherfabric.c
1405	FCN_GPIO0_OUT_LBN	16	etherfabric.c
1406	FCN_GPIO0_OUT_WIDTH	1	etherfabric.c
1407	FCN_GPIO3_IN_LBN	11	etherfabric.c
1408	FCN_GPIO3_IN_WIDTH	1	etherfabric.c
1409	FCN_GPIO2_IN_LBN	10	etherfabric.c
1410	FCN_GPIO2_IN_WIDTH	1	etherfabric.c
1411	FCN_GPIO1_IN_LBN	9	etherfabric.c
1412	FCN_GPIO1_IN_WIDTH	1	etherfabric.c
1413	FCN_GPIO0_IN_LBN	8	etherfabric.c
1414	FCN_GPIO0_IN_WIDTH	1	etherfabric.c
1415	FCN_FLASH_PRESENT_LBN	7	etherfabric.c
1416	FCN_FLASH_PRESENT_WIDTH	1	etherfabric.c
1417	FCN_EEPROM_PRESENT_LBN	6	etherfabric.c
1418	FCN_EEPROM_PRESENT_WIDTH	1	etherfabric.c
1419	FCN_BOOTED_USING_NVDEVICE_LBN	3	etherfabric.c
1420	FCN_BOOTED_USING_NVDEVICE_WIDTH	1	etherfabric.c
1421	FCN_NV_MAGIC_NUMBER	0xFA1C	etherfabric.c
1422	FCN_GLB_CTL_REG_KER	0x0220	etherfabric.c
1423	FCN_EXT_PHY_RST_CTL_LBN	63	etherfabric.c
1424	FCN_EXT_PHY_RST_CTL_WIDTH	1	etherfabric.c
1425	FCN_PCIE_SD_RST_CTL_LBN	61	etherfabric.c
1426	FCN_PCIE_SD_RST_CTL_WIDTH	1	etherfabric.c
1427	FCN_PCIE_STCK_RST_CTL_LBN	59	etherfabric.c
1428	FCN_PCIE_STCK_RST_CTL_WIDTH	1	etherfabric.c
1429	FCN_PCIE_NSTCK_RST_CTL_LBN	58	etherfabric.c
1430	FCN_PCIE_NSTCK_RST_CTL_WIDTH	1	etherfabric.c
1431	FCN_PCIE_CORE_RST_CTL_LBN	57	etherfabric.c
1432	FCN_PCIE_CORE_RST_CTL_WIDTH	1	etherfabric.c
1433	FCN_EE_RST_CTL_LBN	49	etherfabric.c
1434	FCN_EE_RST_CTL_WIDTH	1	etherfabric.c
1435	FCN_RST_EXT_PHY_LBN	31	etherfabric.c
1436	FCN_RST_EXT_PHY_WIDTH	1	etherfabric.c
1437	FCN_EXT_PHY_RST_DUR_LBN	1	etherfabric.c
1438	FCN_EXT_PHY_RST_DUR_WIDTH	3	etherfabric.c
1439	FCN_SWRST_LBN	0	etherfabric.c
1440	FCN_SWRST_WIDTH	1	etherfabric.c
1441	INCLUDE_IN_RESET	0	etherfabric.c
1442	EXCLUDE_FROM_RESET	1	etherfabric.c
1443	FCN_ALTERA_BUILD_REG_KER	0x0300	etherfabric.c
1444	FCN_VER_MAJOR_LBN	24	etherfabric.c
1445	FCN_VER_MAJOR_WIDTH	8	etherfabric.c
1446	FCN_VER_MINOR_LBN	16	etherfabric.c
1447	FCN_VER_MINOR_WIDTH	8	etherfabric.c
1448	FCN_VER_BUILD_LBN	0	etherfabric.c
1449	FCN_VER_BUILD_WIDTH	16	etherfabric.c
1450	FCN_VER_ALL_LBN	0	etherfabric.c
1451	FCN_VER_ALL_WIDTH	32	etherfabric.c
1452	FCN_SPARE_REG_KER	0x310	etherfabric.c
1453	FCN_MEM_PERR_EN_TX_DATA_LBN	72	etherfabric.c
1454	FCN_MEM_PERR_EN_TX_DATA_WIDTH	2	etherfabric.c
1455	FCN_TIMER_CMD_REG_KER	0x420	etherfabric.c
1456	FCN_TIMER_MODE_LBN	12	etherfabric.c
1457	FCN_TIMER_MODE_WIDTH	2	etherfabric.c
1458	FCN_TIMER_MODE_DIS	0	etherfabric.c
1459	FCN_TIMER_MODE_INT_HLDOFF	1	etherfabric.c
1460	FCN_TIMER_VAL_LBN	0	etherfabric.c
1461	FCN_TIMER_VAL_WIDTH	12	etherfabric.c
1462	FCN_RX_CFG_REG_KER	0x800	etherfabric.c
1463	FCN_RX_XOFF_EN_LBN	0	etherfabric.c
1464	FCN_RX_XOFF_EN_WIDTH	1	etherfabric.c
1465	FCN_SRM_RX_DC_CFG_REG_KER	0x610	etherfabric.c
1466	FCN_SRM_RX_DC_BASE_ADR_LBN	0	etherfabric.c
1467	FCN_SRM_RX_DC_BASE_ADR_WIDTH	21	etherfabric.c
1468	FCN_SRM_TX_DC_CFG_REG_KER	0x620	etherfabric.c
1469	FCN_SRM_TX_DC_BASE_ADR_LBN	0	etherfabric.c
1470	FCN_SRM_TX_DC_BASE_ADR_WIDTH	21	etherfabric.c
1471	FCN_SRM_CFG_REG_KER	0x630	etherfabric.c
1472	FCN_SRAM_OOB_ADR_INTEN_LBN	5	etherfabric.c
1473	FCN_SRAM_OOB_ADR_INTEN_WIDTH	1	etherfabric.c
1474	FCN_SRAM_OOB_BUF_INTEN_LBN	4	etherfabric.c
1475	FCN_SRAM_OOB_BUF_INTEN_WIDTH	1	etherfabric.c
1476	FCN_SRAM_OOB_BT_INIT_EN_LBN	3	etherfabric.c
1477	FCN_SRAM_OOB_BT_INIT_EN_WIDTH	1	etherfabric.c
1478	FCN_SRM_NUM_BANK_LBN	2	etherfabric.c
1479	FCN_SRM_NUM_BANK_WIDTH	1	etherfabric.c
1480	FCN_SRM_BANK_SIZE_LBN	0	etherfabric.c
1481	FCN_SRM_BANK_SIZE_WIDTH	2	etherfabric.c
1482	FCN_SRM_NUM_BANKS_AND_BANK_SIZE	0	etherfabric.c
1483	FCN_SRM_NUM_BANKS_AND_BANK_SIZE	3	etherfabric.c
1484	FCN_RX_CFG_REG_KER	0x800	etherfabric.c
1485	FCN_RX_INGR_EN_B0_LBN	47	etherfabric.c
1486	FCN_RX_INGR_EN_B0_WIDTH	1	etherfabric.c
1487	FCN_RX_USR_BUF_SIZE_B0_LBN	19	etherfabric.c
1488	FCN_RX_USR_BUF_SIZE_B0_WIDTH	9	etherfabric.c
1489	FCN_RX_XON_MAC_TH_B0_LBN	10	etherfabric.c
1490	FCN_RX_XON_MAC_TH_B0_WIDTH	9	etherfabric.c
1491	FCN_RX_XOFF_MAC_TH_B0_LBN	1	etherfabric.c
1492	FCN_RX_XOFF_MAC_TH_B0_WIDTH	9	etherfabric.c
1493	FCN_RX_XOFF_MAC_EN_B0_LBN	0	etherfabric.c
1494	FCN_RX_XOFF_MAC_EN_B0_WIDTH	1	etherfabric.c
1495	FCN_RX_USR_BUF_SIZE_A1_LBN	11	etherfabric.c
1496	FCN_RX_USR_BUF_SIZE_A1_WIDTH	9	etherfabric.c
1497	FCN_RX_XON_MAC_TH_A1_LBN	6	etherfabric.c
1498	FCN_RX_XON_MAC_TH_A1_WIDTH	5	etherfabric.c
1499	FCN_RX_XOFF_MAC_TH_A1_LBN	1	etherfabric.c
1500	FCN_RX_XOFF_MAC_TH_A1_WIDTH	5	etherfabric.c
1501	FCN_RX_XOFF_MAC_EN_A1_LBN	0	etherfabric.c
1502	FCN_RX_XOFF_MAC_EN_A1_WIDTH	1	etherfabric.c
1503	FCN_RX_USR_BUF_SIZE_A1_LBN	11	etherfabric.c
1504	FCN_RX_USR_BUF_SIZE_A1_WIDTH	9	etherfabric.c
1505	FCN_RX_XOFF_MAC_EN_A1_LBN	0	etherfabric.c
1506	FCN_RX_XOFF_MAC_EN_A1_WIDTH	1	etherfabric.c
1507	FCN_RX_FILTER_CTL_REG_KER	0x810	etherfabric.c
1508	FCN_UDP_FULL_SRCH_LIMIT_LBN	32	etherfabric.c
1509	FCN_UDP_FULL_SRCH_LIMIT_WIDTH	8	etherfabric.c
1510	FCN_NUM_KER_LBN	24	etherfabric.c
1511	FCN_NUM_KER_WIDTH	2	etherfabric.c
1512	FCN_UDP_WILD_SRCH_LIMIT_LBN	16	etherfabric.c
1513	FCN_UDP_WILD_SRCH_LIMIT_WIDTH	8	etherfabric.c
1514	FCN_TCP_WILD_SRCH_LIMIT_LBN	8	etherfabric.c
1515	FCN_TCP_WILD_SRCH_LIMIT_WIDTH	8	etherfabric.c
1516	FCN_TCP_FULL_SRCH_LIMIT_LBN	0	etherfabric.c
1517	FCN_TCP_FULL_SRCH_LIMIT_WIDTH	8	etherfabric.c
1518	FCN_RX_FLUSH_DESCQ_REG_KER	0x0820	etherfabric.c
1519	FCN_RX_FLUSH_DESCQ_CMD_LBN	24	etherfabric.c
1520	FCN_RX_FLUSH_DESCQ_CMD_WIDTH	1	etherfabric.c
1521	FCN_RX_FLUSH_DESCQ_LBN	0	etherfabric.c
1522	FCN_RX_FLUSH_DESCQ_WIDTH	12	etherfabric.c
1523	FCN_RX_DESC_UPD_REG_KER	0x0830	etherfabric.c
1524	FCN_RX_DESC_WPTR_LBN	96	etherfabric.c
1525	FCN_RX_DESC_WPTR_WIDTH	12	etherfabric.c
1526	FCN_RX_DESC_UPD_REG_KER_DWORD	( FCN_RX_DESC_UPD_REG_KER + 12 )	etherfabric.c
1527	FCN_RX_DESC_WPTR_DWORD_LBN	0	etherfabric.c
1528	FCN_RX_DESC_WPTR_DWORD_WIDTH	12	etherfabric.c
1529	FCN_RX_DC_CFG_REG_KER	0x840	etherfabric.c
1530	FCN_RX_DC_SIZE_LBN	0	etherfabric.c
1531	FCN_RX_DC_SIZE_WIDTH	2	etherfabric.c
1532	FCN_RX_SELF_RST_REG_KER	0x890	etherfabric.c
1533	FCN_RX_ISCSI_DIS_LBN	17	etherfabric.c
1534	FCN_RX_ISCSI_DIS_WIDTH	1	etherfabric.c
1535	FCN_RX_NODESC_WAIT_DIS_LBN	9	etherfabric.c
1536	FCN_RX_NODESC_WAIT_DIS_WIDTH	1	etherfabric.c
1537	FCN_RX_RECOVERY_EN_LBN	8	etherfabric.c
1538	FCN_RX_RECOVERY_EN_WIDTH	1	etherfabric.c
1539	FCN_TX_FLUSH_DESCQ_REG_KER	0x0a00	etherfabric.c
1540	FCN_TX_FLUSH_DESCQ_CMD_LBN	12	etherfabric.c
1541	FCN_TX_FLUSH_DESCQ_CMD_WIDTH	1	etherfabric.c
1542	FCN_TX_FLUSH_DESCQ_LBN	0	etherfabric.c
1543	FCN_TX_FLUSH_DESCQ_WIDTH	12	etherfabric.c
1544	FCN_TX_CFG2_REG_KER	0xa80	etherfabric.c
1545	FCN_TX_DIS_NON_IP_EV_LBN	17	etherfabric.c
1546	FCN_TX_DIS_NON_IP_EV_WIDTH	1	etherfabric.c
1547	FCN_TX_DESC_UPD_REG_KER	0x0a10	etherfabric.c
1548	FCN_TX_DESC_WPTR_LBN	96	etherfabric.c
1549	FCN_TX_DESC_WPTR_WIDTH	12	etherfabric.c
1550	FCN_TX_DESC_UPD_REG_KER_DWORD	( FCN_TX_DESC_UPD_REG_KER + 12 )	etherfabric.c
1551	FCN_TX_DESC_WPTR_DWORD_LBN	0	etherfabric.c
1552	FCN_TX_DESC_WPTR_DWORD_WIDTH	12	etherfabric.c
1553	FCN_TX_DC_CFG_REG_KER	0xa20	etherfabric.c
1554	FCN_TX_DC_SIZE_LBN	0	etherfabric.c
1555	FCN_TX_DC_SIZE_WIDTH	2	etherfabric.c
1556	FCN_MD_TXD_REG_KER	0xc00	etherfabric.c
1557	FCN_MD_TXD_LBN	0	etherfabric.c
1558	FCN_MD_TXD_WIDTH	16	etherfabric.c
1559	FCN_MD_RXD_REG_KER	0xc10	etherfabric.c
1560	FCN_MD_RXD_LBN	0	etherfabric.c
1561	FCN_MD_RXD_WIDTH	16	etherfabric.c
1562	FCN_MD_CS_REG_KER	0xc20	etherfabric.c
1563	FCN_MD_GC_LBN	4	etherfabric.c
1564	FCN_MD_GC_WIDTH	1	etherfabric.c
1565	FCN_MD_RIC_LBN	2	etherfabric.c
1566	FCN_MD_RIC_WIDTH	1	etherfabric.c
1567	FCN_MD_RDC_LBN	1	etherfabric.c
1568	FCN_MD_RDC_WIDTH	1	etherfabric.c
1569	FCN_MD_WRC_LBN	0	etherfabric.c
1570	FCN_MD_WRC_WIDTH	1	etherfabric.c
1571	FCN_MD_PHY_ADR_REG_KER	0xc30	etherfabric.c
1572	FCN_MD_PHY_ADR_LBN	0	etherfabric.c
1573	FCN_MD_PHY_ADR_WIDTH	16	etherfabric.c
1574	FCN_MD_ID_REG_KER	0xc40	etherfabric.c
1575	FCN_MD_PRT_ADR_LBN	11	etherfabric.c
1576	FCN_MD_PRT_ADR_WIDTH	5	etherfabric.c
1577	FCN_MD_DEV_ADR_LBN	6	etherfabric.c
1578	FCN_MD_DEV_ADR_WIDTH	5	etherfabric.c
1579	FCN_MD_STAT_REG_KER	0xc50	etherfabric.c
1580	FCN_MD_PINT_LBN	4	etherfabric.c
1581	FCN_MD_PINT_WIDTH	1	etherfabric.c
1582	FCN_MD_DONE_LBN	3	etherfabric.c
1583	FCN_MD_DONE_WIDTH	1	etherfabric.c
1584	FCN_MD_BSERR_LBN	2	etherfabric.c
1585	FCN_MD_BSERR_WIDTH	1	etherfabric.c
1586	FCN_MD_LNFL_LBN	1	etherfabric.c
1587	FCN_MD_LNFL_WIDTH	1	etherfabric.c
1588	FCN_MD_BSY_LBN	0	etherfabric.c
1589	FCN_MD_BSY_WIDTH	1	etherfabric.c
1590	FCN_MAC0_CTRL_REG_KER	0xc80	etherfabric.c
1591	FCN_MAC1_CTRL_REG_KER	0xc90	etherfabric.c
1592	FCN_MAC_XOFF_VAL_LBN	16	etherfabric.c
1593	FCN_MAC_XOFF_VAL_WIDTH	16	etherfabric.c
1594	FCN_MAC_BCAD_ACPT_LBN	4	etherfabric.c
1595	FCN_MAC_BCAD_ACPT_WIDTH	1	etherfabric.c
1596	FCN_MAC_UC_PROM_LBN	3	etherfabric.c
1597	FCN_MAC_UC_PROM_WIDTH	1	etherfabric.c
1598	FCN_MAC_LINK_STATUS_LBN	2	etherfabric.c
1599	FCN_MAC_LINK_STATUS_WIDTH	1	etherfabric.c
1600	FCN_MAC_SPEED_LBN	0	etherfabric.c
1601	FCN_MAC_SPEED_WIDTH	2	etherfabric.c
1602	XX_TXDRV_DEQ_DEFAULT	0xe	etherfabric.c	deq=.6
1603	XX_TXDRV_DTX_DEFAULT	0x5	etherfabric.c	1.25
1604	XX_SD_CTL_DRV_DEFAULT	0	etherfabric.c	20mA
1605	FALCON_GMAC_REGBANK	0xe00	etherfabric.c
1606	FALCON_GMAC_REGBANK_SIZE	0x200	etherfabric.c
1607	FALCON_GMAC_REG_SIZE	0x10	etherfabric.c
1608	FALCON_XMAC_REGBANK	0x1200	etherfabric.c
1609	FALCON_XMAC_REGBANK_SIZE	0x200	etherfabric.c
1610	FALCON_XMAC_REG_SIZE	0x10	etherfabric.c
1611	FCN_XM_ADR_LO_REG_MAC	0x00	etherfabric.c
1612	FCN_XM_ADR_3_LBN	24	etherfabric.c
1613	FCN_XM_ADR_3_WIDTH	8	etherfabric.c
1614	FCN_XM_ADR_2_LBN	16	etherfabric.c
1615	FCN_XM_ADR_2_WIDTH	8	etherfabric.c
1616	FCN_XM_ADR_1_LBN	8	etherfabric.c
1617	FCN_XM_ADR_1_WIDTH	8	etherfabric.c
1618	FCN_XM_ADR_0_LBN	0	etherfabric.c
1619	FCN_XM_ADR_0_WIDTH	8	etherfabric.c
1620	FCN_XM_ADR_HI_REG_MAC	0x01	etherfabric.c
1621	FCN_XM_ADR_5_LBN	8	etherfabric.c
1622	FCN_XM_ADR_5_WIDTH	8	etherfabric.c
1623	FCN_XM_ADR_4_LBN	0	etherfabric.c
1624	FCN_XM_ADR_4_WIDTH	8	etherfabric.c
1625	FCN_XM_GLB_CFG_REG_MAC	0x02	etherfabric.c
1626	FCN_XM_RX_STAT_EN_LBN	11	etherfabric.c
1627	FCN_XM_RX_STAT_EN_WIDTH	1	etherfabric.c
1628	FCN_XM_TX_STAT_EN_LBN	10	etherfabric.c
1629	FCN_XM_TX_STAT_EN_WIDTH	1	etherfabric.c
1630	FCN_XM_RX_JUMBO_MODE_LBN	6	etherfabric.c
1631	FCN_XM_RX_JUMBO_MODE_WIDTH	1	etherfabric.c
1632	FCN_XM_CORE_RST_LBN	0	etherfabric.c
1633	FCN_XM_CORE_RST_WIDTH	1	etherfabric.c
1634	FCN_XM_TX_CFG_REG_MAC	0x03	etherfabric.c
1635	FCN_XM_IPG_LBN	16	etherfabric.c
1636	FCN_XM_IPG_WIDTH	4	etherfabric.c
1637	FCN_XM_FCNTL_LBN	10	etherfabric.c
1638	FCN_XM_FCNTL_WIDTH	1	etherfabric.c
1639	FCN_XM_TXCRC_LBN	8	etherfabric.c
1640	FCN_XM_TXCRC_WIDTH	1	etherfabric.c
1641	FCN_XM_AUTO_PAD_LBN	5	etherfabric.c
1642	FCN_XM_AUTO_PAD_WIDTH	1	etherfabric.c
1643	FCN_XM_TX_PRMBL_LBN	2	etherfabric.c
1644	FCN_XM_TX_PRMBL_WIDTH	1	etherfabric.c
1645	FCN_XM_TXEN_LBN	1	etherfabric.c
1646	FCN_XM_TXEN_WIDTH	1	etherfabric.c
1647	FCN_XM_RX_CFG_REG_MAC	0x04	etherfabric.c
1648	FCN_XM_PASS_CRC_ERR_LBN	25	etherfabric.c
1649	FCN_XM_PASS_CRC_ERR_WIDTH	1	etherfabric.c
1650	FCN_XM_AUTO_DEPAD_LBN	8	etherfabric.c
1651	FCN_XM_AUTO_DEPAD_WIDTH	1	etherfabric.c
1652	FCN_XM_RXEN_LBN	1	etherfabric.c
1653	FCN_XM_RXEN_WIDTH	1	etherfabric.c
1654	FCN_XM_MGT_INT_MSK_REG_MAC_B0	0x5	etherfabric.c
1655	FCN_XM_MSK_PRMBLE_ERR_LBN	2	etherfabric.c
1656	FCN_XM_MSK_PRMBLE_ERR_WIDTH	1	etherfabric.c
1657	FCN_XM_MSK_RMTFLT_LBN	1	etherfabric.c
1658	FCN_XM_MSK_RMTFLT_WIDTH	1	etherfabric.c
1659	FCN_XM_MSK_LCLFLT_LBN	0	etherfabric.c
1660	FCN_XM_MSK_LCLFLT_WIDTH	1	etherfabric.c
1661	FCN_XM_FC_REG_MAC	0x7	etherfabric.c
1662	FCN_XM_PAUSE_TIME_LBN	16	etherfabric.c
1663	FCN_XM_PAUSE_TIME_WIDTH	16	etherfabric.c
1664	FCN_XM_DIS_FCNTL_LBN	0	etherfabric.c
1665	FCN_XM_DIS_FCNTL_WIDTH	1	etherfabric.c
1666	FCN_XM_TX_PARAM_REG_MAC	0x0d	etherfabric.c
1667	FCN_XM_TX_JUMBO_MODE_LBN	31	etherfabric.c
1668	FCN_XM_TX_JUMBO_MODE_WIDTH	1	etherfabric.c
1669	FCN_XM_MAX_TX_FRM_SIZE_LBN	16	etherfabric.c
1670	FCN_XM_MAX_TX_FRM_SIZE_WIDTH	14	etherfabric.c
1671	FCN_XM_ACPT_ALL_MCAST_LBN	11	etherfabric.c
1672	FCN_XM_ACPT_ALL_MCAST_WIDTH	1	etherfabric.c
1673	FCN_XM_RX_PARAM_REG_MAC	0x0e	etherfabric.c
1674	FCN_XM_MAX_RX_FRM_SIZE_LBN	0	etherfabric.c
1675	FCN_XM_MAX_RX_FRM_SIZE_WIDTH	14	etherfabric.c
1676	FCN_XM_MGT_INT_REG_MAC_B0	0x0f	etherfabric.c
1677	FCN_XM_PRMBLE_ERR	2	etherfabric.c
1678	FCN_XM_PRMBLE_WIDTH	1	etherfabric.c
1679	FCN_XM_RMTFLT_LBN	1	etherfabric.c
1680	FCN_XM_RMTFLT_WIDTH	1	etherfabric.c
1681	FCN_XM_LCLFLT_LBN	0	etherfabric.c
1682	FCN_XM_LCLFLT_WIDTH	1	etherfabric.c
1683	FCN_XX_ALIGN_DONE_LBN	20	etherfabric.c
1684	FCN_XX_ALIGN_DONE_WIDTH	1	etherfabric.c
1685	FCN_XX_CORE_STAT_REG_MAC	0x16	etherfabric.c
1686	FCN_XX_SYNC_STAT_LBN	16	etherfabric.c
1687	FCN_XX_SYNC_STAT_WIDTH	4	etherfabric.c
1688	FCN_XX_SYNC_STAT_DECODE_SYNCED	0xf	etherfabric.c
1689	FCN_XX_COMMA_DET_LBN	12	etherfabric.c
1690	FCN_XX_COMMA_DET_WIDTH	4	etherfabric.c
1691	FCN_XX_COMMA_DET_RESET	0xf	etherfabric.c
1692	FCN_XX_CHARERR_LBN	4	etherfabric.c
1693	FCN_XX_CHARERR_WIDTH	4	etherfabric.c
1694	FCN_XX_CHARERR_RESET	0xf	etherfabric.c
1695	FCN_XX_DISPERR_LBN	0	etherfabric.c
1696	FCN_XX_DISPERR_WIDTH	4	etherfabric.c
1697	FCN_XX_DISPERR_RESET	0xf	etherfabric.c
1698	FCN_XX_PWR_RST_REG_MAC	0x10	etherfabric.c
1699	FCN_XX_PWRDND_EN_LBN	15	etherfabric.c
1700	FCN_XX_PWRDND_EN_WIDTH	1	etherfabric.c
1701	FCN_XX_PWRDNC_EN_LBN	14	etherfabric.c
1702	FCN_XX_PWRDNC_EN_WIDTH	1	etherfabric.c
1703	FCN_XX_PWRDNB_EN_LBN	13	etherfabric.c
1704	FCN_XX_PWRDNB_EN_WIDTH	1	etherfabric.c
1705	FCN_XX_PWRDNA_EN_LBN	12	etherfabric.c
1706	FCN_XX_PWRDNA_EN_WIDTH	1	etherfabric.c
1707	FCN_XX_RSTPLLCD_EN_LBN	9	etherfabric.c
1708	FCN_XX_RSTPLLCD_EN_WIDTH	1	etherfabric.c
1709	FCN_XX_RSTPLLAB_EN_LBN	8	etherfabric.c
1710	FCN_XX_RSTPLLAB_EN_WIDTH	1	etherfabric.c
1711	FCN_XX_RESETD_EN_LBN	7	etherfabric.c
1712	FCN_XX_RESETD_EN_WIDTH	1	etherfabric.c
1713	FCN_XX_RESETC_EN_LBN	6	etherfabric.c
1714	FCN_XX_RESETC_EN_WIDTH	1	etherfabric.c
1715	FCN_XX_RESETB_EN_LBN	5	etherfabric.c
1716	FCN_XX_RESETB_EN_WIDTH	1	etherfabric.c
1717	FCN_XX_RESETA_EN_LBN	4	etherfabric.c
1718	FCN_XX_RESETA_EN_WIDTH	1	etherfabric.c
1719	FCN_XX_RSTXGXSRX_EN_LBN	2	etherfabric.c
1720	FCN_XX_RSTXGXSRX_EN_WIDTH	1	etherfabric.c
1721	FCN_XX_RSTXGXSTX_EN_LBN	1	etherfabric.c
1722	FCN_XX_RSTXGXSTX_EN_WIDTH	1	etherfabric.c
1723	FCN_XX_RST_XX_EN_LBN	0	etherfabric.c
1724	FCN_XX_RST_XX_EN_WIDTH	1	etherfabric.c
1725	FCN_XX_SD_CTL_REG_MAC	0x11	etherfabric.c
1726	FCN_XX_TERMADJ1_LBN	17	etherfabric.c
1727	FCN_XX_TERMADJ1_WIDTH	1	etherfabric.c
1728	FCN_XX_TERMADJ0_LBN	16	etherfabric.c
1729	FCN_XX_TERMADJ0_WIDTH	1	etherfabric.c
1730	FCN_XX_HIDRVD_LBN	15	etherfabric.c
1731	FCN_XX_HIDRVD_WIDTH	1	etherfabric.c
1732	FCN_XX_LODRVD_LBN	14	etherfabric.c
1733	FCN_XX_LODRVD_WIDTH	1	etherfabric.c
1734	FCN_XX_HIDRVC_LBN	13	etherfabric.c
1735	FCN_XX_HIDRVC_WIDTH	1	etherfabric.c
1736	FCN_XX_LODRVC_LBN	12	etherfabric.c
1737	FCN_XX_LODRVC_WIDTH	1	etherfabric.c
1738	FCN_XX_HIDRVB_LBN	11	etherfabric.c
1739	FCN_XX_HIDRVB_WIDTH	1	etherfabric.c
1740	FCN_XX_LODRVB_LBN	10	etherfabric.c
1741	FCN_XX_LODRVB_WIDTH	1	etherfabric.c
1742	FCN_XX_HIDRVA_LBN	9	etherfabric.c
1743	FCN_XX_HIDRVA_WIDTH	1	etherfabric.c
1744	FCN_XX_LODRVA_LBN	8	etherfabric.c
1745	FCN_XX_LODRVA_WIDTH	1	etherfabric.c
1746	FCN_XX_LPBKD_LBN	3	etherfabric.c
1747	FCN_XX_LPBKD_WIDTH	1	etherfabric.c
1748	FCN_XX_LPBKC_LBN	2	etherfabric.c
1749	FCN_XX_LPBKC_WIDTH	1	etherfabric.c
1750	FCN_XX_LPBKB_LBN	1	etherfabric.c
1751	FCN_XX_LPBKB_WIDTH	1	etherfabric.c
1752	FCN_XX_LPBKA_LBN	0	etherfabric.c
1753	FCN_XX_LPBKA_WIDTH	1	etherfabric.c
1754	FCN_XX_TXDRV_CTL_REG_MAC	0x12	etherfabric.c
1755	FCN_XX_DEQD_LBN	28	etherfabric.c
1756	FCN_XX_DEQD_WIDTH	4	etherfabric.c
1757	FCN_XX_DEQC_LBN	24	etherfabric.c
1758	FCN_XX_DEQC_WIDTH	4	etherfabric.c
1759	FCN_XX_DEQB_LBN	20	etherfabric.c
1760	FCN_XX_DEQB_WIDTH	4	etherfabric.c
1761	FCN_XX_DEQA_LBN	16	etherfabric.c
1762	FCN_XX_DEQA_WIDTH	4	etherfabric.c
1763	FCN_XX_DTXD_LBN	12	etherfabric.c
1764	FCN_XX_DTXD_WIDTH	4	etherfabric.c
1765	FCN_XX_DTXC_LBN	8	etherfabric.c
1766	FCN_XX_DTXC_WIDTH	4	etherfabric.c
1767	FCN_XX_DTXB_LBN	4	etherfabric.c
1768	FCN_XX_DTXB_WIDTH	4	etherfabric.c
1769	FCN_XX_DTXA_LBN	0	etherfabric.c
1770	FCN_XX_DTXA_WIDTH	4	etherfabric.c
1771	FCN_RX_FILTER_TBL0	0xF00000	etherfabric.c
1772	FCN_RX_DESC_PTR_TBL_KER_A1	0x11800	etherfabric.c
1773	FCN_RX_DESC_PTR_TBL_KER_B0	0xF40000	etherfabric.c
1774	FCN_RX_ISCSI_DDIG_EN_LBN	88	etherfabric.c
1775	FCN_RX_ISCSI_DDIG_EN_WIDTH	1	etherfabric.c
1776	FCN_RX_ISCSI_HDIG_EN_LBN	87	etherfabric.c
1777	FCN_RX_ISCSI_HDIG_EN_WIDTH	1	etherfabric.c
1778	FCN_RX_DESCQ_BUF_BASE_ID_LBN	36	etherfabric.c
1779	FCN_RX_DESCQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
1780	FCN_RX_DESCQ_EVQ_ID_LBN	24	etherfabric.c
1781	FCN_RX_DESCQ_EVQ_ID_WIDTH	12	etherfabric.c
1782	FCN_RX_DESCQ_OWNER_ID_LBN	10	etherfabric.c
1783	FCN_RX_DESCQ_OWNER_ID_WIDTH	14	etherfabric.c
1784	FCN_RX_DESCQ_SIZE_LBN	3	etherfabric.c
1785	FCN_RX_DESCQ_SIZE_WIDTH	2	etherfabric.c
1786	FCN_RX_DESCQ_SIZE_4K	3	etherfabric.c
1787	FCN_RX_DESCQ_SIZE_2K	2	etherfabric.c
1788	FCN_RX_DESCQ_SIZE_1K	1	etherfabric.c
1789	FCN_RX_DESCQ_SIZE_512	0	etherfabric.c
1790	FCN_RX_DESCQ_TYPE_LBN	2	etherfabric.c
1791	FCN_RX_DESCQ_TYPE_WIDTH	1	etherfabric.c
1792	FCN_RX_DESCQ_JUMBO_LBN	1	etherfabric.c
1793	FCN_RX_DESCQ_JUMBO_WIDTH	1	etherfabric.c
1794	FCN_RX_DESCQ_EN_LBN	0	etherfabric.c
1795	FCN_RX_DESCQ_EN_WIDTH	1	etherfabric.c
1796	FCN_TX_DESC_PTR_TBL_KER_A1	0x11900	etherfabric.c
1797	FCN_TX_DESC_PTR_TBL_KER_B0	0xF50000	etherfabric.c
1798	FCN_TX_NON_IP_DROP_DIS_B0_LBN	91	etherfabric.c
1799	FCN_TX_NON_IP_DROP_DIS_B0_WIDTH	1	etherfabric.c
1800	FCN_TX_DESCQ_EN_LBN	88	etherfabric.c
1801	FCN_TX_DESCQ_EN_WIDTH	1	etherfabric.c
1802	FCN_TX_ISCSI_DDIG_EN_LBN	87	etherfabric.c
1803	FCN_TX_ISCSI_DDIG_EN_WIDTH	1	etherfabric.c
1804	FCN_TX_ISCSI_HDIG_EN_LBN	86	etherfabric.c
1805	FCN_TX_ISCSI_HDIG_EN_WIDTH	1	etherfabric.c
1806	FCN_TX_DESCQ_BUF_BASE_ID_LBN	36	etherfabric.c
1807	FCN_TX_DESCQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
1808	FCN_TX_DESCQ_EVQ_ID_LBN	24	etherfabric.c
1809	FCN_TX_DESCQ_EVQ_ID_WIDTH	12	etherfabric.c
1810	FCN_TX_DESCQ_OWNER_ID_LBN	10	etherfabric.c
1811	FCN_TX_DESCQ_OWNER_ID_WIDTH	14	etherfabric.c
1812	FCN_TX_DESCQ_SIZE_LBN	3	etherfabric.c
1813	FCN_TX_DESCQ_SIZE_WIDTH	2	etherfabric.c
1814	FCN_TX_DESCQ_SIZE_4K	3	etherfabric.c
1815	FCN_TX_DESCQ_SIZE_2K	2	etherfabric.c
1816	FCN_TX_DESCQ_SIZE_1K	1	etherfabric.c
1817	FCN_TX_DESCQ_SIZE_512	0	etherfabric.c
1818	FCN_TX_DESCQ_TYPE_LBN	1	etherfabric.c
1819	FCN_TX_DESCQ_TYPE_WIDTH	2	etherfabric.c
1820	FCN_TX_DESCQ_FLUSH_LBN	0	etherfabric.c
1821	FCN_TX_DESCQ_FLUSH_WIDTH	1	etherfabric.c
1822	FCN_EVQ_PTR_TBL_KER_A1	0x11a00	etherfabric.c
1823	FCN_EVQ_PTR_TBL_KER_B0	0xf60000	etherfabric.c
1824	FCN_EVQ_EN_LBN	23	etherfabric.c
1825	FCN_EVQ_EN_WIDTH	1	etherfabric.c
1826	FCN_EVQ_SIZE_LBN	20	etherfabric.c
1827	FCN_EVQ_SIZE_WIDTH	3	etherfabric.c
1828	FCN_EVQ_SIZE_32K	6	etherfabric.c
1829	FCN_EVQ_SIZE_16K	5	etherfabric.c
1830	FCN_EVQ_SIZE_8K	4	etherfabric.c
1831	FCN_EVQ_SIZE_4K	3	etherfabric.c
1832	FCN_EVQ_SIZE_2K	2	etherfabric.c
1833	FCN_EVQ_SIZE_1K	1	etherfabric.c
1834	FCN_EVQ_SIZE_512	0	etherfabric.c
1835	FCN_EVQ_BUF_BASE_ID_LBN	0	etherfabric.c
1836	FCN_EVQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
1837	FCN_RX_RSS_INDIR_TBL_B0	0xFB0000	etherfabric.c
1838	FCN_EVQ_RPTR_REG_KER_A1	0x11b00	etherfabric.c
1839	FCN_EVQ_RPTR_REG_KER_B0	0xfa0000	etherfabric.c
1840	FCN_EVQ_RPTR_LBN	0	etherfabric.c
1841	FCN_EVQ_RPTR_WIDTH	14	etherfabric.c
1842	FCN_EVQ_RPTR_REG_KER_DWORD_A1	( FCN_EVQ_RPTR_REG_KER_A1 + 0 )	etherfabric.c
1843	FCN_EVQ_RPTR_REG_KER_DWORD_B0	( FCN_EVQ_RPTR_REG_KER_B0 + 0 )	etherfabric.c
1844	FCN_EVQ_RPTR_DWORD_LBN	0	etherfabric.c
1845	FCN_EVQ_RPTR_DWORD_WIDTH	14	etherfabric.c
1846	FCN_BUF_FULL_TBL_KER_A1	0x18000	etherfabric.c
1847	FCN_BUF_FULL_TBL_KER_B0	0x800000	etherfabric.c
1848	FCN_IP_DAT_BUF_SIZE_LBN	50	etherfabric.c
1849	FCN_IP_DAT_BUF_SIZE_WIDTH	1	etherfabric.c
1850	FCN_IP_DAT_BUF_SIZE_8K	1	etherfabric.c
1851	FCN_IP_DAT_BUF_SIZE_4K	0	etherfabric.c
1852	FCN_BUF_ADR_FBUF_LBN	14	etherfabric.c
1853	FCN_BUF_ADR_FBUF_WIDTH	34	etherfabric.c
1854	FCN_BUF_OWNER_ID_FBUF_LBN	0	etherfabric.c
1855	FCN_BUF_OWNER_ID_FBUF_WIDTH	14	etherfabric.c
1856	FCN_MAC_DATA_LBN	0	etherfabric.c
1857	FCN_MAC_DATA_WIDTH	32	etherfabric.c
1858	FCN_TX_KER_PORT_LBN	63	etherfabric.c
1859	FCN_TX_KER_PORT_WIDTH	1	etherfabric.c
1860	FCN_TX_KER_BYTE_CNT_LBN	48	etherfabric.c
1861	FCN_TX_KER_BYTE_CNT_WIDTH	14	etherfabric.c
1862	FCN_TX_KER_BUF_ADR_LBN	0	etherfabric.c
1863	FCN_TX_KER_BUF_ADR_WIDTH	EFAB_DMA_TYPE_WIDTH ( 46 )	etherfabric.c
1864	FCN_RX_KER_BUF_SIZE_LBN	48	etherfabric.c
1865	FCN_RX_KER_BUF_SIZE_WIDTH	14	etherfabric.c
1866	FCN_RX_KER_BUF_ADR_LBN	0	etherfabric.c
1867	FCN_RX_KER_BUF_ADR_WIDTH	EFAB_DMA_TYPE_WIDTH ( 46 )	etherfabric.c
1868	FCN_EV_CODE_LBN	60	etherfabric.c
1869	FCN_EV_CODE_WIDTH	4	etherfabric.c
1870	FCN_RX_IP_EV_DECODE	0	etherfabric.c
1871	FCN_TX_IP_EV_DECODE	2	etherfabric.c
1872	FCN_DRIVER_EV_DECODE	5	etherfabric.c
1873	FCN_RX_EV_PKT_OK_LBN	56	etherfabric.c
1874	FCN_RX_EV_PKT_OK_WIDTH	1	etherfabric.c
1875	FCN_RX_PORT_LBN	30	etherfabric.c
1876	FCN_RX_PORT_WIDTH	1	etherfabric.c
1877	FCN_RX_EV_BYTE_CNT_LBN	16	etherfabric.c
1878	FCN_RX_EV_BYTE_CNT_WIDTH	14	etherfabric.c
1879	FCN_RX_EV_DESC_PTR_LBN	0	etherfabric.c
1880	FCN_RX_EV_DESC_PTR_WIDTH	12	etherfabric.c
1881	FCN_TX_EV_DESC_PTR_LBN	0	etherfabric.c
1882	FCN_TX_EV_DESC_PTR_WIDTH	12	etherfabric.c
1883	FALCON_SPI_MAX_LEN	16	etherfabric.c
1884	GM_CFG1_REG_MAC	0x00	etherfabric.c
1885	GM_SW_RST_LBN	31	etherfabric.c
1886	GM_SW_RST_WIDTH	1	etherfabric.c
1887	GM_RX_FC_EN_LBN	5	etherfabric.c
1888	GM_RX_FC_EN_WIDTH	1	etherfabric.c
1889	GM_TX_FC_EN_LBN	4	etherfabric.c
1890	GM_TX_FC_EN_WIDTH	1	etherfabric.c
1891	GM_RX_EN_LBN	2	etherfabric.c
1892	GM_RX_EN_WIDTH	1	etherfabric.c
1893	GM_TX_EN_LBN	0	etherfabric.c
1894	GM_TX_EN_WIDTH	1	etherfabric.c
1895	GM_CFG2_REG_MAC	0x01	etherfabric.c
1896	GM_PAMBL_LEN_LBN	12	etherfabric.c
1897	GM_PAMBL_LEN_WIDTH	4	etherfabric.c
1898	GM_IF_MODE_LBN	8	etherfabric.c
1899	GM_IF_MODE_WIDTH	2	etherfabric.c
1900	GM_PAD_CRC_EN_LBN	2	etherfabric.c
1901	GM_PAD_CRC_EN_WIDTH	1	etherfabric.c
1902	GM_FD_LBN	0	etherfabric.c
1903	GM_FD_WIDTH	1	etherfabric.c
1904	GM_MAX_FLEN_REG_MAC	0x04	etherfabric.c
1905	GM_MAX_FLEN_LBN	0	etherfabric.c
1906	GM_MAX_FLEN_WIDTH	16	etherfabric.c
1907	GM_MII_MGMT_CFG_REG_MAC	0x08	etherfabric.c
1908	GM_MGMT_CLK_SEL_LBN	0	etherfabric.c
1909	GM_MGMT_CLK_SEL_WIDTH	3	etherfabric.c
1910	GM_MII_MGMT_CMD_REG_MAC	0x09	etherfabric.c
1911	GM_MGMT_SCAN_CYC_LBN	1	etherfabric.c
1912	GM_MGMT_SCAN_CYC_WIDTH	1	etherfabric.c
1913	GM_MGMT_RD_CYC_LBN	0	etherfabric.c
1914	GM_MGMT_RD_CYC_WIDTH	1	etherfabric.c
1915	GM_MII_MGMT_ADR_REG_MAC	0x0a	etherfabric.c
1916	GM_MGMT_PHY_ADDR_LBN	8	etherfabric.c
1917	GM_MGMT_PHY_ADDR_WIDTH	5	etherfabric.c
1918	GM_MGMT_REG_ADDR_LBN	0	etherfabric.c
1919	GM_MGMT_REG_ADDR_WIDTH	5	etherfabric.c
1920	GM_MII_MGMT_CTL_REG_MAC	0x0b	etherfabric.c
1921	GM_MGMT_CTL_LBN	0	etherfabric.c
1922	GM_MGMT_CTL_WIDTH	16	etherfabric.c
1923	GM_MII_MGMT_STAT_REG_MAC	0x0c	etherfabric.c
1924	GM_MGMT_STAT_LBN	0	etherfabric.c
1925	GM_MGMT_STAT_WIDTH	16	etherfabric.c
1926	GM_MII_MGMT_IND_REG_MAC	0x0d	etherfabric.c
1927	GM_MGMT_BUSY_LBN	0	etherfabric.c
1928	GM_MGMT_BUSY_WIDTH	1	etherfabric.c
1929	GM_ADR1_REG_MAC	0x10	etherfabric.c
1930	GM_HWADDR_5_LBN	24	etherfabric.c
1931	GM_HWADDR_5_WIDTH	8	etherfabric.c
1932	GM_HWADDR_4_LBN	16	etherfabric.c
1933	GM_HWADDR_4_WIDTH	8	etherfabric.c
1934	GM_HWADDR_3_LBN	8	etherfabric.c
1935	GM_HWADDR_3_WIDTH	8	etherfabric.c
1936	GM_HWADDR_2_LBN	0	etherfabric.c
1937	GM_HWADDR_2_WIDTH	8	etherfabric.c
1938	GM_ADR2_REG_MAC	0x11	etherfabric.c
1939	GM_HWADDR_1_LBN	24	etherfabric.c
1940	GM_HWADDR_1_WIDTH	8	etherfabric.c
1941	GM_HWADDR_0_LBN	16	etherfabric.c
1942	GM_HWADDR_0_WIDTH	8	etherfabric.c
1943	GMF_CFG0_REG_MAC	0x12	etherfabric.c
1944	GMF_FTFENREQ_LBN	12	etherfabric.c
1945	GMF_FTFENREQ_WIDTH	1	etherfabric.c
1946	GMF_STFENREQ_LBN	11	etherfabric.c
1947	GMF_STFENREQ_WIDTH	1	etherfabric.c
1948	GMF_FRFENREQ_LBN	10	etherfabric.c
1949	GMF_FRFENREQ_WIDTH	1	etherfabric.c
1950	GMF_SRFENREQ_LBN	9	etherfabric.c
1951	GMF_SRFENREQ_WIDTH	1	etherfabric.c
1952	GMF_WTMENREQ_LBN	8	etherfabric.c
1953	GMF_WTMENREQ_WIDTH	1	etherfabric.c
1954	GMF_CFG1_REG_MAC	0x13	etherfabric.c
1955	GMF_CFGFRTH_LBN	16	etherfabric.c
1956	GMF_CFGFRTH_WIDTH	5	etherfabric.c
1957	GMF_CFGXOFFRTX_LBN	0	etherfabric.c
1958	GMF_CFGXOFFRTX_WIDTH	16	etherfabric.c
1959	GMF_CFG2_REG_MAC	0x14	etherfabric.c
1960	GMF_CFGHWM_LBN	16	etherfabric.c
1961	GMF_CFGHWM_WIDTH	6	etherfabric.c
1962	GMF_CFGLWM_LBN	0	etherfabric.c
1963	GMF_CFGLWM_WIDTH	6	etherfabric.c
1964	GMF_CFG3_REG_MAC	0x15	etherfabric.c
1965	GMF_CFGHWMFT_LBN	16	etherfabric.c
1966	GMF_CFGHWMFT_WIDTH	6	etherfabric.c
1967	GMF_CFGFTTH_LBN	0	etherfabric.c
1968	GMF_CFGFTTH_WIDTH	6	etherfabric.c
1969	GMF_CFG4_REG_MAC	0x16	etherfabric.c
1970	GMF_HSTFLTRFRM_PAUSE_LBN	12	etherfabric.c
1971	GMF_HSTFLTRFRM_PAUSE_WIDTH	12	etherfabric.c
1972	GMF_CFG5_REG_MAC	0x17	etherfabric.c
1973	GMF_CFGHDPLX_LBN	22	etherfabric.c
1974	GMF_CFGHDPLX_WIDTH	1	etherfabric.c
1975	GMF_CFGBYTMODE_LBN	19	etherfabric.c
1976	GMF_CFGBYTMODE_WIDTH	1	etherfabric.c
1977	GMF_HSTDRPLT64_LBN	18	etherfabric.c
1978	GMF_HSTDRPLT64_WIDTH	1	etherfabric.c
1979	GMF_HSTFLTRFRMDC_PAUSE_LBN	12	etherfabric.c
1980	GMF_HSTFLTRFRMDC_PAUSE_WIDTH	1	etherfabric.c
1981	XFP_REQUIRED_DEVS	( MDIO_MMDREG_DEVS0_PCS \| \ MDIO_MMDREG_DEVS0_PMAPMD \| \ MDIO_MMDREG_DEVS0_PHYXS )	etherfabric.c
1982	TXC_GLRGS_GLCMD	(0xc004)	etherfabric.c
1983	TXC_GLCMD_LMTSWRST_LBN	(14)	etherfabric.c
1984	TXC_ALRGS_ATXAMP0	(0xc041)	etherfabric.c
1985	TXC_ALRGS_ATXAMP1	(0xc042)	etherfabric.c
1986	TXC_ATXAMP_LANE02_LBN	(3)	etherfabric.c
1987	TXC_ATXAMP_LANE13_LBN	(11)	etherfabric.c
1988	TXC_ATXAMP_1280_mV	(0)	etherfabric.c
1989	TXC_ATXAMP_1200_mV	(8)	etherfabric.c
1990	TXC_ATXAMP_1120_mV	(12)	etherfabric.c
1991	TXC_ATXAMP_1060_mV	(14)	etherfabric.c
1992	TXC_ATXAMP_0820_mV	(25)	etherfabric.c
1993	TXC_ATXAMP_0720_mV	(26)	etherfabric.c
1994	TXC_ATXAMP_0580_mV	(27)	etherfabric.c
1995	TXC_ATXAMP_0440_mV	(28)	etherfabric.c
1996	TXC_ATXAMP_0820_BOTH	( (TXC_ATXAMP_0820_mV << TXC_ATXAMP_LANE02_LBN) \| \ (TXC_ATXAMP_0820_mV << TXC_ATXAMP_LANE13_LBN) )	etherfabric.c
1997	TXC_ATXAMP_DEFAULT	(0x6060)	etherfabric.c	From databook
1998	TXC_ALRGS_ATXPRE0	(0xc043)	etherfabric.c
1999	TXC_ALRGS_ATXPRE1	(0xc044)	etherfabric.c
2000	TXC_ATXPRE_NONE	(0)	etherfabric.c
2001	TXC_ATXPRE_DEFAULT	(0x1010)	etherfabric.c	From databook
2002	TXC_REQUIRED_DEVS	( MDIO_MMDREG_DEVS0_PCS \| \ MDIO_MMDREG_DEVS0_PMAPMD \| \ MDIO_MMDREG_DEVS0_PHYXS )	etherfabric.c
2003	TENXPRESS_REQUIRED_DEVS	( MDIO_MMDREG_DEVS0_PMAPMD \| \ MDIO_MMDREG_DEVS0_PCS \| \ MDIO_MMDREG_DEVS0_PHYXS )	etherfabric.c
2004	PCS_TEST_SELECT_REG	0xd807	etherfabric.c	PRM 10.5.8
2005	CLK312_EN_LBN	3	etherfabric.c
2006	CLK312_EN_WIDTH	1	etherfabric.c
2007	PCS_CLOCK_CTRL_REG	0xd801	etherfabric.c
2008	PLL312_RST_N_LBN	2	etherfabric.c
2009	PMA_PMD_EXT_CTRL_REG	49152	etherfabric.c
2010	PMA_PMD_EXT_SSR_LBN	15	etherfabric.c
2011	PCS_BOOT_STATUS_REG	0xd000	etherfabric.c
2012	PCS_BOOT_FATAL_ERR_LBN	0	etherfabric.c
2013	PCS_BOOT_PROGRESS_LBN	1	etherfabric.c
2014	PCS_BOOT_PROGRESS_WIDTH	2	etherfabric.c
2015	PCS_BOOT_COMPLETE_LBN	3	etherfabric.c
2016	PCS_SOFT_RST2_REG	0xd806	etherfabric.c
2017	SERDES_RST_N_LBN	13	etherfabric.c
2018	XGXS_RST_N_LBN	12	etherfabric.c
2019	PM8358_REQUIRED_DEVS	(MDIO_MMDREG_DEVS0_DTEXS)	etherfabric.c
2020	PMC_MASTER_REG	(0xd000)	etherfabric.c
2021	PMC_MASTER_ANLG_CTRL	(1<< 11)	etherfabric.c
2022	PMC_MCONF2_REG	(0xd002)	etherfabric.c
2023	PMC_MCONF2_TEDGE	(1 << 2)	etherfabric.c
2024	PMC_MCONF2_REDGE	(1 << 3)	etherfabric.c
2025	PMC_ANALOG_RX_CFG0	(0xd025)	etherfabric.c
2026	PMC_ANALOG_RX_CFG1	(0xd02d)	etherfabric.c
2027	PMC_ANALOG_RX_CFG2	(0xd035)	etherfabric.c
2028	PMC_ANALOG_RX_CFG3	(0xd03d)	etherfabric.c
2029	PMC_ANALOG_RX_TERM	(1 << 15)	etherfabric.c	Bit 15 of RX CFG: 0 for 100 ohms float,
2030	PMC_ANALOG_RX_EQ_MASK	(3 << 8)	etherfabric.c
2031	PMC_ANALOG_RX_EQ_NONE	(0 << 8)	etherfabric.c
2032	PMC_ANALOG_RX_EQ_HALF	(1 << 8)	etherfabric.c
2033	PMC_ANALOG_RX_EQ_FULL	(2 << 8)	etherfabric.c
2034	PMC_ANALOG_RX_EQ_RSVD	(3 << 8)	etherfabric.c
2035	MAX_TEMP_THRESH	90	etherfabric.c
2036	PCA9539	0x74	etherfabric.c
2037	P0_IN	0x00	etherfabric.c
2038	P0_OUT	0x02	etherfabric.c
2039	P0_CONFIG	0x06	etherfabric.c
2040	P0_EN_1V0X_LBN	0	etherfabric.c
2041	P0_EN_1V0X_WIDTH	1	etherfabric.c
2042	P0_EN_1V2_LBN	1	etherfabric.c
2043	P0_EN_1V2_WIDTH	1	etherfabric.c
2044	P0_EN_2V5_LBN	2	etherfabric.c
2045	P0_EN_2V5_WIDTH	1	etherfabric.c
2046	P0_EN_3V3X_LBN	3	etherfabric.c
2047	P0_EN_3V3X_WIDTH	1	etherfabric.c
2048	P0_EN_5V_LBN	4	etherfabric.c
2049	P0_EN_5V_WIDTH	1	etherfabric.c
2050	P0_X_TRST_LBN	6	etherfabric.c
2051	P0_X_TRST_WIDTH	1	etherfabric.c
2052	P1_IN	0x01	etherfabric.c
2053	P1_CONFIG	0x07	etherfabric.c
2054	P1_AFE_PWD_LBN	0	etherfabric.c
2055	P1_AFE_PWD_WIDTH	1	etherfabric.c
2056	P1_DSP_PWD25_LBN	1	etherfabric.c
2057	P1_DSP_PWD25_WIDTH	1	etherfabric.c
2058	P1_SPARE_LBN	4	etherfabric.c
2059	P1_SPARE_WIDTH	4	etherfabric.c
2060	MAX6647	0x4e	etherfabric.c
2061	RSL	0x02	etherfabric.c
2062	RLHN	0x05	etherfabric.c
2063	WLHO	0x0b	etherfabric.c
2064	FALCON_MAC_ADDRESS_OFFSET	0x310	etherfabric.c
2065	SF_NV_CONFIG_BASE	0x300	etherfabric.c
2066	SF_NV_CONFIG_EXTRA	0xA0	etherfabric.c
2067	drv_version	"v1.2"	forcedeth.c
2068	drv_date	"05-14-2005"	forcedeth.c
2069	ETH_DATA_LEN	1500	forcedeth.c
2070	PCI_DEVICE_ID_NVIDIA_NVENET_1	0x01c3	forcedeth.c
2071	PCI_DEVICE_ID_NVIDIA_NVENET_2	0x0066	forcedeth.c
2072	PCI_DEVICE_ID_NVIDIA_NVENET_4	0x0086	forcedeth.c
2073	PCI_DEVICE_ID_NVIDIA_NVENET_5	0x008c	forcedeth.c
2074	PCI_DEVICE_ID_NVIDIA_NVENET_3	0x00d6	forcedeth.c
2075	PCI_DEVICE_ID_NVIDIA_NVENET_7	0x00df	forcedeth.c
2076	PCI_DEVICE_ID_NVIDIA_NVENET_6	0x00e6	forcedeth.c
2077	PCI_DEVICE_ID_NVIDIA_NVENET_8	0x0056	forcedeth.c
2078	PCI_DEVICE_ID_NVIDIA_NVENET_9	0x0057	forcedeth.c
2079	PCI_DEVICE_ID_NVIDIA_NVENET_10	0x0037	forcedeth.c
2080	PCI_DEVICE_ID_NVIDIA_NVENET_11	0x0038	forcedeth.c
2081	PCI_DEVICE_ID_NVIDIA_NVENET_15	0x0373	forcedeth.c
2082	DEV_NEED_LASTPACKET1	0x0001	forcedeth.c	set LASTPACKET1 in tx flags
2083	DEV_IRQMASK_1	0x0002	forcedeth.c	use NVREG_IRQMASK_WANTED_1 for irq mask
2084	DEV_IRQMASK_2	0x0004	forcedeth.c	use NVREG_IRQMASK_WANTED_2 for irq mask
2085	DEV_NEED_TIMERIRQ	0x0008	forcedeth.c	set the timer irq flag in the irq mask
2086	DEV_NEED_LINKTIMER	0x0010	forcedeth.c	poll link settings. Relies on the timer irq
2087	FLAG_MASK_V1	0xffff0000	forcedeth.c
2088	FLAG_MASK_V2	0xffffc000	forcedeth.c
2089	LEN_MASK_V1	(0xffffffff ^ FLAG_MASK_V1)	forcedeth.c
2090	LEN_MASK_V2	(0xffffffff ^ FLAG_MASK_V2)	forcedeth.c
2091	NV_TX_LASTPACKET	(1<<16)	forcedeth.c
2092	NV_TX_RETRYERROR	(1<<19)	forcedeth.c
2093	NV_TX_LASTPACKET1	(1<<24)	forcedeth.c
2094	NV_TX_DEFERRED	(1<<26)	forcedeth.c
2095	NV_TX_CARRIERLOST	(1<<27)	forcedeth.c
2096	NV_TX_LATECOLLISION	(1<<28)	forcedeth.c
2097	NV_TX_UNDERFLOW	(1<<29)	forcedeth.c
2098	NV_TX_ERROR	(1<<30)	forcedeth.c
2099	NV_TX_VALID	(1<<31)	forcedeth.c
2100	NV_TX2_LASTPACKET	(1<<29)	forcedeth.c
2101	NV_TX2_RETRYERROR	(1<<18)	forcedeth.c
2102	NV_TX2_LASTPACKET1	(1<<23)	forcedeth.c
2103	NV_TX2_DEFERRED	(1<<25)	forcedeth.c
2104	NV_TX2_CARRIERLOST	(1<<26)	forcedeth.c
2105	NV_TX2_LATECOLLISION	(1<<27)	forcedeth.c
2106	NV_TX2_UNDERFLOW	(1<<28)	forcedeth.c
2107	NV_TX2_ERROR	(1<<30)	forcedeth.c
2108	NV_TX2_VALID	(1<<31)	forcedeth.c
2109	NV_RX_DESCRIPTORVALID	(1<<16)	forcedeth.c
2110	NV_RX_MISSEDFRAME	(1<<17)	forcedeth.c
2111	NV_RX_SUBSTRACT1	(1<<18)	forcedeth.c
2112	NV_RX_ERROR1	(1<<23)	forcedeth.c
2113	NV_RX_ERROR2	(1<<24)	forcedeth.c
2114	NV_RX_ERROR3	(1<<25)	forcedeth.c
2115	NV_RX_ERROR4	(1<<26)	forcedeth.c
2116	NV_RX_CRCERR	(1<<27)	forcedeth.c
2117	NV_RX_OVERFLOW	(1<<28)	forcedeth.c
2118	NV_RX_FRAMINGERR	(1<<29)	forcedeth.c
2119	NV_RX_ERROR	(1<<30)	forcedeth.c
2120	NV_RX_AVAIL	(1<<31)	forcedeth.c
2121	NV_RX2_CHECKSUMMASK	(0x1C000000)	forcedeth.c
2122	NV_RX2_CHECKSUMOK1	(0x10000000)	forcedeth.c
2123	NV_RX2_CHECKSUMOK2	(0x14000000)	forcedeth.c
2124	NV_RX2_CHECKSUMOK3	(0x18000000)	forcedeth.c
2125	NV_RX2_DESCRIPTORVALID	(1<<29)	forcedeth.c
2126	NV_RX2_SUBSTRACT1	(1<<25)	forcedeth.c
2127	NV_RX2_ERROR1	(1<<18)	forcedeth.c
2128	NV_RX2_ERROR2	(1<<19)	forcedeth.c
2129	NV_RX2_ERROR3	(1<<20)	forcedeth.c
2130	NV_RX2_ERROR4	(1<<21)	forcedeth.c
2131	NV_RX2_CRCERR	(1<<22)	forcedeth.c
2132	NV_RX2_OVERFLOW	(1<<23)	forcedeth.c
2133	NV_RX2_FRAMINGERR	(1<<24)	forcedeth.c
2134	NV_RX2_ERROR	(1<<30)	forcedeth.c
2135	NV_RX2_AVAIL	(1<<31)	forcedeth.c
2136	NV_PCI_REGSZ	0x270	forcedeth.c
2137	NV_TXRX_RESET_DELAY	4	forcedeth.c
2138	NV_TXSTOP_DELAY1	10	forcedeth.c
2139	NV_TXSTOP_DELAY1MAX	500000	forcedeth.c
2140	NV_TXSTOP_DELAY2	100	forcedeth.c
2141	NV_RXSTOP_DELAY1	10	forcedeth.c
2142	NV_RXSTOP_DELAY1MAX	500000	forcedeth.c
2143	NV_RXSTOP_DELAY2	100	forcedeth.c
2144	NV_SETUP5_DELAY	5	forcedeth.c
2145	NV_SETUP5_DELAYMAX	50000	forcedeth.c
2146	NV_POWERUP_DELAY	5	forcedeth.c
2147	NV_POWERUP_DELAYMAX	5000	forcedeth.c
2148	NV_MIIBUSY_DELAY	50	forcedeth.c
2149	NV_MIIPHY_DELAY	10	forcedeth.c
2150	NV_MIIPHY_DELAYMAX	10000	forcedeth.c
2151	NV_WAKEUPPATTERNS	5	forcedeth.c
2152	NV_WAKEUPMASKENTRIES	4	forcedeth.c
2153	NV_WATCHDOG_TIMEO	(5*HZ)	forcedeth.c
2154	RX_RING	4	forcedeth.c
2155	TX_RING	2	forcedeth.c
2156	TX_LIMIT_STOP	63	forcedeth.c
2157	TX_LIMIT_START	62	forcedeth.c
2158	RX_NIC_BUFSIZE	(ETH_DATA_LEN + 64)	forcedeth.c
2159	RX_ALLOC_BUFSIZE	(ETH_DATA_LEN + 128)	forcedeth.c
2160	OOM_REFILL	(1+HZ/20)	forcedeth.c
2161	POLL_WAIT	(1+HZ/100)	forcedeth.c
2162	LINK_TIMEOUT	(3*HZ)	forcedeth.c
2163	DESC_VER_1	0x0	forcedeth.c
2164	DESC_VER_2	(0x02100\|NVREG_TXRXCTL_RXCHECK)	forcedeth.c
2165	PHY_OUI_MARVELL	0x5043	forcedeth.c
2166	PHY_OUI_CICADA	0x03f1	forcedeth.c
2167	PHYID1_OUI_MASK	0x03ff	forcedeth.c
2168	PHYID1_OUI_SHFT	6	forcedeth.c
2169	PHYID2_OUI_MASK	0xfc00	forcedeth.c
2170	PHYID2_OUI_SHFT	10	forcedeth.c
2171	PHY_INIT1	0x0f000	forcedeth.c
2172	PHY_INIT2	0x0e00	forcedeth.c
2173	PHY_INIT3	0x01000	forcedeth.c
2174	PHY_INIT4	0x0200	forcedeth.c
2175	PHY_INIT5	0x0004	forcedeth.c
2176	PHY_INIT6	0x02000	forcedeth.c
2177	PHY_GIGABIT	0x0100	forcedeth.c
2178	PHY_TIMEOUT	0x1	forcedeth.c
2179	PHY_ERROR	0x2	forcedeth.c
2180	PHY_100	0x1	forcedeth.c
2181	PHY_1000	0x2	forcedeth.c
2182	PHY_HALF	0x100	forcedeth.c
2183	MAC_ADDR_CORRECT	0x01	forcedeth.c
2184	tx_ring	forcedeth_bufs.tx_ring	forcedeth.c
2185	rx_ring	forcedeth_bufs.rx_ring	forcedeth.c
2186	txb	forcedeth_bufs.txb	forcedeth.c
2187	rxb	forcedeth_bufs.rxb	forcedeth.c
2188	MII_READ	(-1)	forcedeth.c
2189	IORESOURCE_MEM	0x00000200	forcedeth.c
2190	board_found	1	forcedeth.c
2191	valid_link	0	forcedeth.c
2192	IPOIB_NUM_SEND_WQES	2	ipoib.c
2193	IPOIB_NUM_RECV_WQES	4	ipoib.c
2194	IPOIB_NUM_CQES	8	ipoib.c
2195	EINPROGRESS_JOINING	( EINPROGRESS \| EUNIQ_01 )	ipoib.c
2196	IPOIB_NUM_CACHED_PEERS	4	ipoib.c
2197	TX_RING_SIZE	2	mtd80x.c
2198	TX_QUEUE_LEN	10	mtd80x.c	Limit ring entries actually used.
2199	RX_RING_SIZE	4	mtd80x.c
2200	HZ	100	mtd80x.c
2201	TX_TIME_OUT	(6*HZ)	mtd80x.c
2202	PKT_BUF_SZ	1536	mtd80x.c
2203	MASK_MIIR_MII_READ	0x00000000	mtd80x.c
2204	MASK_MIIR_MII_WRITE	0x00000008	mtd80x.c
2205	MASK_MIIR_MII_MDO	0x00000004	mtd80x.c
2206	MASK_MIIR_MII_MDI	0x00000002	mtd80x.c
2207	MASK_MIIR_MII_MDC	0x00000001	mtd80x.c
2208	OP_READ	0x6000	mtd80x.c	ST:01+OP:10+PHYAD+REGAD+TA:Z0
2209	OP_WRITE	0x5002	mtd80x.c	ST:01+OP:01+PHYAD+REGAD+TA:10
2210	MysonPHYID	0xd0000302	mtd80x.c
2211	MysonPHYID0	0x0302	mtd80x.c
2212	StatusRegister	18	mtd80x.c
2213	SPEED100	0x0400	mtd80x.c	bit10
2214	FULLMODE	0x0800	mtd80x.c	bit11
2215	SeeqPHYID0	0x0016	mtd80x.c
2216	MIIRegister18	18	mtd80x.c
2217	SPD_DET_100	0x80	mtd80x.c
2218	DPLX_DET_FULL	0x40	mtd80x.c
2219	AhdocPHYID0	0x0022	mtd80x.c
2220	DiagnosticReg	18	mtd80x.c
2221	DPLX_FULL	0x0800	mtd80x.c
2222	Speed_100	0x0400	mtd80x.c
2223	MarvellPHYID0	0x0141	mtd80x.c
2224	LevelOnePHYID0	0x0013	mtd80x.c
2225	MII1000BaseTControlReg	9	mtd80x.c
2226	MII1000BaseTStatusReg	10	mtd80x.c
2227	SpecificReg	17	mtd80x.c
2228	PHYAbletoPerform1000FullDuplex	0x0200	mtd80x.c
2229	PHYAbletoPerform1000HalfDuplex	0x0100	mtd80x.c
2230	PHY1000AbilityMask	0x300	mtd80x.c
2231	SpeedMask	0x0c000	mtd80x.c
2232	Speed_1000M	0x08000	mtd80x.c
2233	Speed_100M	0x4000	mtd80x.c
2234	Speed_10M	0	mtd80x.c
2235	Full_Duplex	0x2000	mtd80x.c
2236	LXT1000_100M	0x08000	mtd80x.c
2237	LXT1000_1000M	0x0c000	mtd80x.c
2238	LXT1000_Full	0x200	mtd80x.c
2239	PS10	0x00080000	mtd80x.c
2240	FD	0x00100000	mtd80x.c
2241	PS1000	0x00010000	mtd80x.c
2242	LinkIsUp	0x0004	mtd80x.c
2243	LinkIsUp2	0x00040000	mtd80x.c
2244	txb	mtd80x_bufs.txb	mtd80x.c
2245	rxb	mtd80x_bufs.rxb	mtd80x.c
2246	MYRI10GE_TRANSMIT_WRAP	1U	myri10ge.c
2247	MYRI10GE_RECEIVE_WRAP	7U	myri10ge.c
2248	MYRI10GE_RECEIVE_COMPLETION_WRA	31U	myri10ge.c
2249	VS_ADDR	( vs + 0x18 )	myri10ge.c
2250	VS_DATA	( vs + 0x14 )	myri10ge.c
2251	VS_MODE	( vs + 0x10 )	myri10ge.c
2252	VS_MODE_READ32	0x3	myri10ge.c
2253	VS_MODE_LOCATE	0x8	myri10ge.c
2254	VS_LOCATE_STRING_SPECS	0x3	myri10ge.c
2255	INCLUDE_NE	1	ne.c
2256	NE_SCAN	0x300,0x280,0x320,0x340,0x380	ne.c
2257	ASIC_PIO	NE_DATA	ne2k_isa.c
2258	HZ	100	ns83820.c
2259	USE_64BIT_ADDR	"+"	ns83820.c
2260	TRY_DAC	1	ns83820.c
2261	TRY_DAC	0	ns83820.c
2262	RX_BUF_SIZE	1500	ns83820.c	8192
2263	NR_RX_DESC	64	ns83820.c
2264	NR_TX_DESC	1	ns83820.c
2265	REAL_RX_BUF_SIZE	(RX_BUF_SIZE + 14 + 6)	ns83820.c	rx/tx mac addr + type
2266	MIN_TX_DESC_FREE	8	ns83820.c
2267	CFGCS	0x04	ns83820.c
2268	CR_TXE	0x00000001	ns83820.c
2269	CR_TXD	0x00000002	ns83820.c
2270	CR_RXE	0x00000004	ns83820.c
2271	CR_RXD	0x00000008	ns83820.c
2272	CR_TXR	0x00000010	ns83820.c
2273	CR_RXR	0x00000020	ns83820.c
2274	CR_SWI	0x00000080	ns83820.c
2275	CR_RST	0x00000100	ns83820.c
2276	PTSCR_EEBIST_FAIL	0x00000001	ns83820.c
2277	PTSCR_EEBIST_EN	0x00000002	ns83820.c
2278	PTSCR_EELOAD_EN	0x00000004	ns83820.c
2279	PTSCR_RBIST_FAIL	0x000001b8	ns83820.c
2280	PTSCR_RBIST_DONE	0x00000200	ns83820.c
2281	PTSCR_RBIST_EN	0x00000400	ns83820.c
2282	PTSCR_RBIST_RST	0x00002000	ns83820.c
2283	MEAR_EEDI	0x00000001	ns83820.c
2284	MEAR_EEDO	0x00000002	ns83820.c
2285	MEAR_EECLK	0x00000004	ns83820.c
2286	MEAR_EESEL	0x00000008	ns83820.c
2287	MEAR_MDIO	0x00000010	ns83820.c
2288	MEAR_MDDIR	0x00000020	ns83820.c
2289	MEAR_MDC	0x00000040	ns83820.c
2290	ISR_TXDESC3	0x40000000	ns83820.c
2291	ISR_TXDESC2	0x20000000	ns83820.c
2292	ISR_TXDESC1	0x10000000	ns83820.c
2293	ISR_TXDESC0	0x08000000	ns83820.c
2294	ISR_RXDESC3	0x04000000	ns83820.c
2295	ISR_RXDESC2	0x02000000	ns83820.c
2296	ISR_RXDESC1	0x01000000	ns83820.c
2297	ISR_RXDESC0	0x00800000	ns83820.c
2298	ISR_TXRCMP	0x00400000	ns83820.c
2299	ISR_RXRCMP	0x00200000	ns83820.c
2300	ISR_DPERR	0x00100000	ns83820.c
2301	ISR_SSERR	0x00080000	ns83820.c
2302	ISR_RMABT	0x00040000	ns83820.c
2303	ISR_RTABT	0x00020000	ns83820.c
2304	ISR_RXSOVR	0x00010000	ns83820.c
2305	ISR_HIBINT	0x00008000	ns83820.c
2306	ISR_PHY	0x00004000	ns83820.c
2307	ISR_PME	0x00002000	ns83820.c
2308	ISR_SWI	0x00001000	ns83820.c
2309	ISR_MIB	0x00000800	ns83820.c
2310	ISR_TXURN	0x00000400	ns83820.c
2311	ISR_TXIDLE	0x00000200	ns83820.c
2312	ISR_TXERR	0x00000100	ns83820.c
2313	ISR_TXDESC	0x00000080	ns83820.c
2314	ISR_TXOK	0x00000040	ns83820.c
2315	ISR_RXORN	0x00000020	ns83820.c
2316	ISR_RXIDLE	0x00000010	ns83820.c
2317	ISR_RXEARLY	0x00000008	ns83820.c
2318	ISR_RXERR	0x00000004	ns83820.c
2319	ISR_RXDESC	0x00000002	ns83820.c
2320	ISR_RXOK	0x00000001	ns83820.c
2321	TXCFG_CSI	0x80000000	ns83820.c
2322	TXCFG_HBI	0x40000000	ns83820.c
2323	TXCFG_MLB	0x20000000	ns83820.c
2324	TXCFG_ATP	0x10000000	ns83820.c
2325	TXCFG_ECRETRY	0x00800000	ns83820.c
2326	TXCFG_BRST_DIS	0x00080000	ns83820.c
2327	TXCFG_MXDMA1024	0x00000000	ns83820.c
2328	TXCFG_MXDMA512	0x00700000	ns83820.c
2329	TXCFG_MXDMA256	0x00600000	ns83820.c
2330	TXCFG_MXDMA128	0x00500000	ns83820.c
2331	TXCFG_MXDMA64	0x00400000	ns83820.c
2332	TXCFG_MXDMA32	0x00300000	ns83820.c
2333	TXCFG_MXDMA16	0x00200000	ns83820.c
2334	TXCFG_MXDMA8	0x00100000	ns83820.c
2335	CFG_LNKSTS	0x80000000	ns83820.c
2336	CFG_SPDSTS	0x60000000	ns83820.c
2337	CFG_SPDSTS1	0x40000000	ns83820.c
2338	CFG_SPDSTS0	0x20000000	ns83820.c
2339	CFG_DUPSTS	0x10000000	ns83820.c
2340	CFG_TBI_EN	0x01000000	ns83820.c
2341	CFG_MODE_1000	0x00400000	ns83820.c
2342	CFG_AUTO_1000	0x00200000	ns83820.c
2343	CFG_PINT_CTL	0x001c0000	ns83820.c
2344	CFG_PINT_DUPSTS	0x00100000	ns83820.c
2345	CFG_PINT_LNKSTS	0x00080000	ns83820.c
2346	CFG_PINT_SPDSTS	0x00040000	ns83820.c
2347	CFG_TMRTEST	0x00020000	ns83820.c
2348	CFG_MRM_DIS	0x00010000	ns83820.c
2349	CFG_MWI_DIS	0x00008000	ns83820.c
2350	CFG_T64ADDR	0x00004000	ns83820.c
2351	CFG_PCI64_DET	0x00002000	ns83820.c
2352	CFG_DATA64_EN	0x00001000	ns83820.c
2353	CFG_M64ADDR	0x00000800	ns83820.c
2354	CFG_PHY_RST	0x00000400	ns83820.c
2355	CFG_PHY_DIS	0x00000200	ns83820.c
2356	CFG_EXTSTS_EN	0x00000100	ns83820.c
2357	CFG_REQALG	0x00000080	ns83820.c
2358	CFG_SB	0x00000040	ns83820.c
2359	CFG_POW	0x00000020	ns83820.c
2360	CFG_EXD	0x00000010	ns83820.c
2361	CFG_PESEL	0x00000008	ns83820.c
2362	CFG_BROM_DIS	0x00000004	ns83820.c
2363	CFG_EXT_125	0x00000002	ns83820.c
2364	CFG_BEM	0x00000001	ns83820.c
2365	EXTSTS_UDPPKT	0x00200000	ns83820.c
2366	EXTSTS_TCPPKT	0x00080000	ns83820.c
2367	EXTSTS_IPPKT	0x00020000	ns83820.c
2368	SPDSTS_POLARITY	(CFG_SPDSTS1 \| CFG_SPDSTS0 \| CFG_DUPSTS \| (lnksts ? CFG_LNKSTS : 0))	ns83820.c
2369	MIBC_MIBS	0x00000008	ns83820.c
2370	MIBC_ACLR	0x00000004	ns83820.c
2371	MIBC_FRZ	0x00000002	ns83820.c
2372	MIBC_WRN	0x00000001	ns83820.c
2373	PCR_PSEN	(1 << 31)	ns83820.c
2374	PCR_PS_MCAST	(1 << 30)	ns83820.c
2375	PCR_PS_DA	(1 << 29)	ns83820.c
2376	PCR_STHI_8	(3 << 23)	ns83820.c
2377	PCR_STLO_4	(1 << 23)	ns83820.c
2378	PCR_FFHI_8K	(3 << 21)	ns83820.c
2379	PCR_FFLO_4K	(1 << 21)	ns83820.c
2380	PCR_PAUSE_CNT	0xFFFE	ns83820.c
2381	RXCFG_AEP	0x80000000	ns83820.c
2382	RXCFG_ARP	0x40000000	ns83820.c
2383	RXCFG_STRIPCRC	0x20000000	ns83820.c
2384	RXCFG_RX_FD	0x10000000	ns83820.c
2385	RXCFG_ALP	0x08000000	ns83820.c
2386	RXCFG_AIRL	0x04000000	ns83820.c
2387	RXCFG_MXDMA512	0x00700000	ns83820.c
2388	RXCFG_DRTH	0x0000003e	ns83820.c
2389	RXCFG_DRTH0	0x00000002	ns83820.c
2390	RFCR_RFEN	0x80000000	ns83820.c
2391	RFCR_AAB	0x40000000	ns83820.c
2392	RFCR_AAM	0x20000000	ns83820.c
2393	RFCR_AAU	0x10000000	ns83820.c
2394	RFCR_APM	0x08000000	ns83820.c
2395	RFCR_APAT	0x07800000	ns83820.c
2396	RFCR_APAT3	0x04000000	ns83820.c
2397	RFCR_APAT2	0x02000000	ns83820.c
2398	RFCR_APAT1	0x01000000	ns83820.c
2399	RFCR_APAT0	0x00800000	ns83820.c
2400	RFCR_AARP	0x00400000	ns83820.c
2401	RFCR_MHEN	0x00200000	ns83820.c
2402	RFCR_UHEN	0x00100000	ns83820.c
2403	RFCR_ULM	0x00080000	ns83820.c
2404	VRCR_RUDPE	0x00000080	ns83820.c
2405	VRCR_RTCPE	0x00000040	ns83820.c
2406	VRCR_RIPE	0x00000020	ns83820.c
2407	VRCR_IPEN	0x00000010	ns83820.c
2408	VRCR_DUTF	0x00000008	ns83820.c
2409	VRCR_DVTF	0x00000004	ns83820.c
2410	VRCR_VTREN	0x00000002	ns83820.c
2411	VRCR_VTDEN	0x00000001	ns83820.c
2412	VTCR_PPCHK	0x00000008	ns83820.c
2413	VTCR_GCHK	0x00000004	ns83820.c
2414	VTCR_VPPTI	0x00000002	ns83820.c
2415	VTCR_VGTI	0x00000001	ns83820.c
2416	CR	0x00	ns83820.c
2417	CFG	0x04	ns83820.c
2418	MEAR	0x08	ns83820.c
2419	PTSCR	0x0c	ns83820.c
2420	ISR	0x10	ns83820.c
2421	IMR	0x14	ns83820.c
2422	IER	0x18	ns83820.c
2423	IHR	0x1c	ns83820.c
2424	TXDP	0x20	ns83820.c
2425	TXDP_HI	0x24	ns83820.c
2426	TXCFG	0x28	ns83820.c
2427	GPIOR	0x2c	ns83820.c
2428	RXDP	0x30	ns83820.c
2429	RXDP_HI	0x34	ns83820.c
2430	RXCFG	0x38	ns83820.c
2431	PQCR	0x3c	ns83820.c
2432	WCSR	0x40	ns83820.c
2433	PCR	0x44	ns83820.c
2434	RFCR	0x48	ns83820.c
2435	RFDR	0x4c	ns83820.c
2436	SRR	0x58	ns83820.c
2437	VRCR	0xbc	ns83820.c
2438	VTCR	0xc0	ns83820.c
2439	VDR	0xc4	ns83820.c
2440	CCSR	0xcc	ns83820.c
2441	TBICR	0xe0	ns83820.c
2442	TBISR	0xe4	ns83820.c
2443	TANAR	0xe8	ns83820.c
2444	TANLPAR	0xec	ns83820.c
2445	TANER	0xf0	ns83820.c
2446	TESR	0xf4	ns83820.c
2447	TBICR_MR_AN_ENABLE	0x00001000	ns83820.c
2448	TBICR_MR_RESTART_AN	0x00000200	ns83820.c
2449	TBISR_MR_LINK_STATUS	0x00000020	ns83820.c
2450	TBISR_MR_AN_COMPLETE	0x00000004	ns83820.c
2451	TANAR_PS2	0x00000100	ns83820.c
2452	TANAR_PS1	0x00000080	ns83820.c
2453	TANAR_HALF_DUP	0x00000040	ns83820.c
2454	TANAR_FULL_DUP	0x00000020	ns83820.c
2455	GPIOR_GP5_OE	0x00000200	ns83820.c
2456	GPIOR_GP4_OE	0x00000100	ns83820.c
2457	GPIOR_GP3_OE	0x00000080	ns83820.c
2458	GPIOR_GP2_OE	0x00000040	ns83820.c
2459	GPIOR_GP1_OE	0x00000020	ns83820.c
2460	GPIOR_GP3_OUT	0x00000004	ns83820.c
2461	GPIOR_GP1_OUT	0x00000001	ns83820.c
2462	LINK_AUTONEGOTIATE	0x01	ns83820.c
2463	LINK_DOWN	0x02	ns83820.c
2464	LINK_UP	0x04	ns83820.c
2465	HW_ADDR_LEN	8	ns83820.c
2466	HW_ADDR_LEN	4	ns83820.c
2467	CMDSTS_OWN	0x80000000	ns83820.c
2468	CMDSTS_MORE	0x40000000	ns83820.c
2469	CMDSTS_INTR	0x20000000	ns83820.c
2470	CMDSTS_ERR	0x10000000	ns83820.c
2471	CMDSTS_OK	0x08000000	ns83820.c
2472	CMDSTS_LEN_MASK	0x0000ffff	ns83820.c
2473	CMDSTS_DEST_MASK	0x01800000	ns83820.c
2474	CMDSTS_DEST_SELF	0x00800000	ns83820.c
2475	CMDSTS_DEST_MULTI	0x01000000	ns83820.c
2476	DESC_SIZE	8	ns83820.c	Should be cache line sized
2477	tx_ring	ns83820_bufs.tx_ring	ns83820.c
2478	rx_ring	ns83820_bufs.rx_ring	ns83820.c
2479	txb	ns83820_bufs.txb	ns83820.c
2480	rxb	ns83820_bufs.rxb	ns83820.c
2481	board_found	1	ns83820.c
2482	valid_link	0	ns83820.c
2483	ASIC_PIO	WD_IAR	ns8390.c
2484	eth_probe	wd_probe	ns8390.c
2485	drv_version	"v1.3"	pcnet32.c
2486	drv_date	"03-29-2004"	pcnet32.c
2487	PCNET32_PORT_AUI	0x00	pcnet32.c
2488	PCNET32_PORT_10BT	0x01	pcnet32.c
2489	PCNET32_PORT_GPSI	0x02	pcnet32.c
2490	PCNET32_PORT_MII	0x03	pcnet32.c
2491	PCNET32_PORT_PORTSEL	0x03	pcnet32.c
2492	PCNET32_PORT_ASEL	0x04	pcnet32.c
2493	PCNET32_PORT_100	0x40	pcnet32.c
2494	PCNET32_PORT_FD	0x80	pcnet32.c
2495	PCNET32_DMA_MASK	0xffffffff	pcnet32.c
2496	MAX_UNITS	8	pcnet32.c	More are supported, limit only on options
2497	PCNET32_LOG_TX_BUFFERS	1	pcnet32.c
2498	PCNET32_LOG_RX_BUFFERS	2	pcnet32.c
2499	TX_RING_SIZE	(1 << (PCNET32_LOG_TX_BUFFERS))	pcnet32.c
2500	TX_RING_MOD_MASK	(TX_RING_SIZE - 1)	pcnet32.c
2501	TX_RING_LEN_BITS	0x0000	pcnet32.c	PCNET32_LOG_TX_BUFFERS) << 12)
2502	RX_RING_SIZE	(1 << (PCNET32_LOG_RX_BUFFERS))	pcnet32.c
2503	RX_RING_MOD_MASK	(RX_RING_SIZE - 1)	pcnet32.c
2504	RX_RING_LEN_BITS	((PCNET32_LOG_RX_BUFFERS) << 4)	pcnet32.c
2505	PKT_BUF_SZ	1544	pcnet32.c
2506	PCNET32_WIO_RDP	0x10	pcnet32.c
2507	PCNET32_WIO_RAP	0x12	pcnet32.c
2508	PCNET32_WIO_RESET	0x14	pcnet32.c
2509	PCNET32_WIO_BDP	0x16	pcnet32.c
2510	PCNET32_DWIO_RDP	0x10	pcnet32.c
2511	PCNET32_DWIO_RAP	0x14	pcnet32.c
2512	PCNET32_DWIO_RESET	0x18	pcnet32.c
2513	PCNET32_DWIO_BDP	0x1C	pcnet32.c
2514	PCNET32_TOTAL_SIZE	0x20	pcnet32.c
2515	MII_CNT	4	pcnet32.c
2516	MAX_JOIN_INFO_COUNT	2	prism2.c
2517	WLAN_HOSTIF	WLAN_PLX	prism2.c
2518	BAP_TIMEOUT	( 5000 )	prism2.c
2519	PLX_LOCAL_CONFIG_REGISTER_BASE	( PCI_BASE_ADDRESS_1 )	prism2.c
2520	PLX_LOCAL_ADDRESS_SPACE_0_BASE	( PCI_BASE_ADDRESS_2 )	prism2.c
2521	PLX_LOCAL_ADDRESS_SPACE_1_BASE	( PCI_BASE_ADDRESS_3 )	prism2.c
2522	PLX_LOCAL_ADDRESS_SPACE_2_BASE	( PCI_BASE_ADDRESS_4 )	prism2.c
2523	PLX_LOCAL_ADDRESS_SPACE_3_BASE	( PCI_BASE_ADDRESS_5 )	prism2.c
2524	PRISM2_PLX_ATTR_MEM_BASE	( PLX_LOCAL_ADDRESS_SPACE_0_BASE )	prism2.c
2525	PRISM2_PLX_IO_BASE	( PLX_LOCAL_ADDRESS_SPACE_1_BASE )	prism2.c
2526	PRISM2_PCI_MEM_BASE	( PCI_BASE_ADDRESS_0 )	prism2.c
2527	CISTPL_VERS_1	( 0x15 )	prism2.c
2528	CISTPL_END	( 0xff )	prism2.c
2529	CIS_STEP	( 2 )	prism2.c
2530	CISTPL_HEADER_LEN	( 2 * CIS_STEP )	prism2.c
2531	CISTPL_LEN_OFF	( 1 * CIS_STEP )	prism2.c
2532	CISTPL_VERS_1_STR_OFF	( 4 * CIS_STEP )	prism2.c
2533	COR_OFFSET	( 0x3e0 )	prism2.c	COR attribute offset of Prism2 PC card
2534	COR_VALUE	( 0x41 )	prism2.c	Enable PC card with irq in level trigger (but interrupts disabled)
2535	WLAN_IEEE_OUI_LEN	3	prism2.c
2536	WLAN_HOSTIF	WLAN_PCI	prism2_pci.c
2537	WLAN_HOSTIF	WLAN_PLX	prism2_plx.c
2538	R8168_CPCMD_QUIRK_MASK	(\ EnableBist \| \ Mac_dbgo_oe \| \ Force_half_dup \| \ Force_rxflow_en \| \ Force_txflow_en \| \ Cxpl_dbg_sel \| \ ASF \| \ PktCntrDi	r8169.c
2539	R810X_CPCMD_QUIRK_MASK	(\ EnableBist \| \ Mac_dbgo_oe \| \ Force_half_dup \| \ Force_half_dup \| \ Force_txflow_en \| \ Cxpl_dbg_sel \| \ ASF \| \ PktCntrDis	r8169.c
2540	TX_RING_SIZE	4	rtl8139.c
2541	TX_FIFO_THRESH	256	rtl8139.c	In bytes, rounded down to 32 byte units.
2542	RX_FIFO_THRESH	4	rtl8139.c	Rx buffer level before first PCI xfer.
2543	RX_DMA_BURST	4	rtl8139.c	Maximum PCI burst, '4' is 256 bytes
2544	TX_DMA_BURST	4	rtl8139.c	Calculate as 16<<val.
2545	TX_IPG	3	rtl8139.c	This is the only valid value
2546	RX_BUF_LEN_IDX	0	rtl8139.c	0, 1, 2 is allowed - 8,16,32K rx buffer
2547	RX_BUF_LEN	( (8192 << RX_BUF_LEN_IDX) )	rtl8139.c
2548	RX_BUF_PAD	4	rtl8139.c
2549	EE_M1	0x80	rtl8139.c	Mode select bit 1
2550	EE_M0	0x40	rtl8139.c	Mode select bit 0
2551	EE_CS	0x08	rtl8139.c	EEPROM chip select
2552	EE_SK	0x04	rtl8139.c	EEPROM shift clock
2553	EE_DI	0x02	rtl8139.c	Data in
2554	EE_DO	0x01	rtl8139.c	Data out
2555	EE_MAC	7	rtl8139.c
2556	txd	sis900_bufs.txd	sis900.c
2557	rxd	sis900_bufs.rxd	sis900.c
2558	txb	sis900_bufs.txb	sis900.c
2559	rxb	sis900_bufs.rxb	sis900.c
2560	DRV_NAME	"sky2"	sky2.c
2561	DRV_VERSION	"1.22"	sky2.c
2562	PFX	DRV_NAME " "	sky2.c
2563	RX_LE_SIZE	128	sky2.c
2564	RX_LE_BYTES	(RX_LE_SIZE*sizeof(struct sky2_rx_le))	sky2.c
2565	RX_RING_ALIGN	4096	sky2.c
2566	RX_PENDING	(RX_LE_SIZE/6 - 2)	sky2.c
2567	TX_RING_SIZE	128	sky2.c
2568	TX_PENDING	(TX_RING_SIZE - 1)	sky2.c
2569	TX_RING_ALIGN	4096	sky2.c
2570	MAX_SKB_TX_LE	4	sky2.c
2571	STATUS_RING_SIZE	512	sky2.c	2 ports * (TX + RX)
2572	STATUS_LE_BYTES	(STATUS_RING_SIZE*sizeof(struct sky2_status_le))	sky2.c
2573	STATUS_RING_ALIGN	4096	sky2.c
2574	PHY_RETRIES	1000	sky2.c
2575	SKY2_EEPROM_MAGIC	0x9955aabb	sky2.c
2576	LINUX_OUT_MACROS	1	smc9000.c
2577	SMC9000_DEBUG	0	smc9000.c
2578	PRINTK2	printf	smc9000.c
2579	_outb	outb	smc9000.c
2580	_outw	outw	smc9000.c
2581	drv_version	"v1.12"	sundance.c
2582	drv_date	"2004-03-21"	sundance.c
2583	HZ	100	sundance.c
2584	TX_RING_SIZE	2	sundance.c
2585	TX_QUEUE_LEN	10	sundance.c	Limit ring entries actually used.
2586	RX_RING_SIZE	4	sundance.c
2587	TX_TIME_OUT	(4*HZ)	sundance.c
2588	PKT_BUF_SZ	1536	sundance.c
2589	rxb	rx_tx_buf.rxb	sundance.c
2590	txb	rx_tx_buf.txb	sundance.c
2591	EEPROM_SIZE	128	sundance.c
2592	PCI_IOTYPE	(PCI_USES_MASTER \| PCI_USES_IO \| PCI_ADDR0)	sundance.c
2593	MII_CNT	4	sundance.c
2594	EEPROM_SA_OFFSET	0x10	sundance.c
2595	DEFAULT_INTR	(IntrRxDMADone \| IntrPCIErr \| \ IntrDrvRqst \| IntrTxDone \| StatsMax \| \ LinkChange)	sundance.c
2596	MDIO_EnbIn	(0)	sundance.c
2597	MDIO_WRITE0	(MDIO_EnbOutput)	sundance.c
2598	MDIO_WRITE1	(MDIO_Data \| MDIO_EnbOutput)	sundance.c
2599	SUPPORT_COPPER_PHY	1	tg3.c
2600	SUPPORT_FIBER_PHY	1	tg3.c
2601	SUPPORT_LINK_REPORT	1	tg3.c
2602	SUPPORT_PARTNO_STR	1	tg3.c
2603	SUPPORT_PHY_STR	1	tg3.c
2604	TG3_RX_RING_SIZE	512	tg3.c
2605	TG3_DEF_RX_RING_PENDING	20	tg3.c	RX_RING_PENDING seems to be o.k. at 20 and 200
2606	TG3_RX_RCB_RING_SIZE	1024	tg3.c
2607	TG3_TX_RING_SIZE	512	tg3.c
2608	TG3_DEF_TX_RING_PENDING	(TG3_TX_RING_SIZE - 1)	tg3.c
2609	TG3_RX_RING_BYTES	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RING_SIZE)	tg3.c
2610	TG3_RX_RCB_RING_BYTES	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RCB_RING_SIZE)	tg3.c
2611	TG3_TX_RING_BYTES	(sizeof(struct tg3_tx_buffer_desc) * TG3_TX_RING_SIZE)	tg3.c
2612	RX_PKT_BUF_SZ	(1536 + 2 + 64)	tg3.c
2613	PHY_BUSY_LOOPS	5000	tg3.c
2614	ANEG_OK	0	tg3.c
2615	ANEG_DONE	1	tg3.c
2616	ANEG_TIMER_ENAB	2	tg3.c
2617	ANEG_FAILED	-1	tg3.c
2618	ANEG_STATE_SETTLE_TIME	10000	tg3.c
2619	MAX_WAIT_CNT	1000	tg3.c
2620	drv_version	"v1.4"	tlan.c
2621	drv_date	"01-17-2004"	tlan.c
2622	HZ	100	tlan.c
2623	TX_TIME_OUT	(6*HZ)	tlan.c
2624	tx_ring	tlan_buffers.tx_ring	tlan.c
2625	txb	tlan_buffers.txb	tlan.c
2626	rx_ring	tlan_buffers.rx_ring	tlan.c
2627	rxb	tlan_buffers.rxb	tlan.c
2628	board_found	1	tlan.c
2629	valid_link	0	tlan.c
2630	TX_TIME_OUT	2*TICKS_PER_SEC	tulip.c
2631	TULIP_IOTYPE	PCI_USES_MASTER \| PCI_USES_IO \| PCI_ADDR0	tulip.c
2632	TULIP_SIZE	0x80	tulip.c
2633	FULL_DUPLEX_MAGIC	0x6969	tulip.c
2634	MEDIA_MASK	31	tulip.c
2635	EEPROM_ADDRLEN	6	tulip.c
2636	EEPROM_SIZE	128	tulip.c	2 << EEPROM_ADDRLEN
2637	EE_WRITE_CMD	(5 << addr_len)	tulip.c
2638	EE_READ_CMD	(6 << addr_len)	tulip.c
2639	EE_ERASE_CMD	(7 << addr_len)	tulip.c
2640	EE_SHIFT_CLK	0x02	tulip.c	EEPROM shift clock.
2641	EE_CS	0x01	tulip.c	EEPROM chip select.
2642	EE_DATA_WRITE	0x04	tulip.c	EEPROM chip data in.
2643	EE_WRITE_0	0x01	tulip.c
2644	EE_WRITE_1	0x05	tulip.c
2645	EE_DATA_READ	0x08	tulip.c	EEPROM chip data out.
2646	EE_ENB	(0x4800 \| EE_CS)	tulip.c
2647	BUFLEN	1536	tulip.c
2648	DESC_RING_WRAP	0x02000000	tulip.c
2649	TX_RING_SIZE	2	tulip.c
2650	RX_RING_SIZE	4	tulip.c
2651	tx_ring	tulip_bss.tx_ring	tulip.c
2652	txb	tulip_bss.txb	tulip.c
2653	rx_ring	tulip_bss.rx_ring	tulip.c
2654	rxb	tulip_bss.rxb	tulip.c
2655	MDIO_SHIFT_CLK	0x10000	tulip.c
2656	MDIO_DATA_WRITE0	0x00000	tulip.c
2657	MDIO_DATA_WRITE1	0x20000	tulip.c
2658	MDIO_ENB	0x00000	tulip.c	Ignore the 0x02000 databook setting.
2659	MDIO_ENB_IN	0x40000	tulip.c
2660	MDIO_DATA_READ	0x80000	tulip.c
2661	W_MAX_TIMEOUT	0x0FFFU	via-rhine.c
2662	RX_BUF_LEN_IDX	3	via-rhine.c	0==8K, 1==16K, 2==32K, 3==64K
2663	RX_BUF_LEN	(8192 << RX_BUF_LEN_IDX)	via-rhine.c
2664	TX_BUF_SIZE	1536	via-rhine.c
2665	RX_BUF_SIZE	1536	via-rhine.c
2666	TX_FIFO_THRESH	256	via-rhine.c	In bytes, rounded down to 32 byte units.
2667	RX_FIFO_THRESH	4	via-rhine.c	Rx buffer level before first PCI xfer.
2668	RX_DMA_BURST	4	via-rhine.c	Maximum PCI burst, '4' is 256 bytes
2669	TX_DMA_BURST	4	via-rhine.c
2670	TX_TIMEOUT	((2000*HZ)/1000)	via-rhine.c
2671	byPAR0	ioaddr	via-rhine.c
2672	byRCR	ioaddr + 6	via-rhine.c
2673	byTCR	ioaddr + 7	via-rhine.c
2674	byCR0	ioaddr + 8	via-rhine.c
2675	byCR1	ioaddr + 9	via-rhine.c
2676	byISR0	ioaddr + 0x0c	via-rhine.c
2677	byISR1	ioaddr + 0x0d	via-rhine.c
2678	byIMR0	ioaddr + 0x0e	via-rhine.c
2679	byIMR1	ioaddr + 0x0f	via-rhine.c
2680	byMAR0	ioaddr + 0x10	via-rhine.c
2681	byMAR1	ioaddr + 0x11	via-rhine.c
2682	byMAR2	ioaddr + 0x12	via-rhine.c
2683	byMAR3	ioaddr + 0x13	via-rhine.c
2684	byMAR4	ioaddr + 0x14	via-rhine.c
2685	byMAR5	ioaddr + 0x15	via-rhine.c
2686	byMAR6	ioaddr + 0x16	via-rhine.c
2687	byMAR7	ioaddr + 0x17	via-rhine.c
2688	dwCurrentRxDescAddr	ioaddr + 0x18	via-rhine.c
2689	dwCurrentTxDescAddr	ioaddr + 0x1c	via-rhine.c
2690	dwCurrentRDSE0	ioaddr + 0x20	via-rhine.c
2691	dwCurrentRDSE1	ioaddr + 0x24	via-rhine.c
2692	dwCurrentRDSE2	ioaddr + 0x28	via-rhine.c
2693	dwCurrentRDSE3	ioaddr + 0x2c	via-rhine.c
2694	dwNextRDSE0	ioaddr + 0x30	via-rhine.c
2695	dwNextRDSE1	ioaddr + 0x34	via-rhine.c
2696	dwNextRDSE2	ioaddr + 0x38	via-rhine.c
2697	dwNextRDSE3	ioaddr + 0x3c	via-rhine.c
2698	dwCurrentTDSE0	ioaddr + 0x40	via-rhine.c
2699	dwCurrentTDSE1	ioaddr + 0x44	via-rhine.c
2700	dwCurrentTDSE2	ioaddr + 0x48	via-rhine.c
2701	dwCurrentTDSE3	ioaddr + 0x4c	via-rhine.c
2702	dwNextTDSE0	ioaddr + 0x50	via-rhine.c
2703	dwNextTDSE1	ioaddr + 0x54	via-rhine.c
2704	dwNextTDSE2	ioaddr + 0x58	via-rhine.c
2705	dwNextTDSE3	ioaddr + 0x5c	via-rhine.c
2706	dwCurrRxDMAPtr	ioaddr + 0x60	via-rhine.c
2707	dwCurrTxDMAPtr	ioaddr + 0x64	via-rhine.c
2708	byMPHY	ioaddr + 0x6c	via-rhine.c
2709	byMIISR	ioaddr + 0x6d	via-rhine.c
2710	byBCR0	ioaddr + 0x6e	via-rhine.c
2711	byBCR1	ioaddr + 0x6f	via-rhine.c
2712	byMIICR	ioaddr + 0x70	via-rhine.c
2713	byMIIAD	ioaddr + 0x71	via-rhine.c
2714	wMIIDATA	ioaddr + 0x72	via-rhine.c
2715	byEECSR	ioaddr + 0x74	via-rhine.c
2716	byTEST	ioaddr + 0x75	via-rhine.c
2717	byGPIO	ioaddr + 0x76	via-rhine.c
2718	byCFGA	ioaddr + 0x78	via-rhine.c
2719	byCFGB	ioaddr + 0x79	via-rhine.c
2720	byCFGC	ioaddr + 0x7a	via-rhine.c
2721	byCFGD	ioaddr + 0x7b	via-rhine.c
2722	wTallyCntMPA	ioaddr + 0x7c	via-rhine.c
2723	wTallyCntCRC	ioaddr + 0x7d	via-rhine.c
2724	bySTICKHW	ioaddr + 0x83	via-rhine.c
2725	byWOLcrClr	ioaddr + 0xA4	via-rhine.c
2726	byWOLcgClr	ioaddr + 0xA7	via-rhine.c
2727	byPwrcsrClr	ioaddr + 0xAC	via-rhine.c
2728	RCR_RRFT2	0x80	via-rhine.c
2729	RCR_RRFT1	0x40	via-rhine.c
2730	RCR_RRFT0	0x20	via-rhine.c
2731	RCR_PROM	0x10	via-rhine.c
2732	RCR_AB	0x08	via-rhine.c
2733	RCR_AM	0x04	via-rhine.c
2734	RCR_AR	0x02	via-rhine.c
2735	RCR_SEP	0x01	via-rhine.c
2736	TCR_RTSF	0x80	via-rhine.c
2737	TCR_RTFT1	0x40	via-rhine.c
2738	TCR_RTFT0	0x20	via-rhine.c
2739	TCR_OFSET	0x08	via-rhine.c
2740	TCR_LB1	0x04	via-rhine.c	loopback[1]
2741	TCR_LB0	0x02	via-rhine.c	loopback[0]
2742	CR0_RDMD	0x40	via-rhine.c	rx descriptor polling demand
2743	CR0_TDMD	0x20	via-rhine.c	tx descriptor polling demand
2744	CR0_TXON	0x10	via-rhine.c
2745	CR0_RXON	0x08	via-rhine.c
2746	CR0_STOP	0x04	via-rhine.c	stop NIC, default = 1
2747	CR0_STRT	0x02	via-rhine.c	start NIC
2748	CR0_INIT	0x01	via-rhine.c	start init process
2749	CR1_SFRST	0x80	via-rhine.c	software reset
2750	CR1_RDMD1	0x40	via-rhine.c	RDMD1
2751	CR1_TDMD1	0x20	via-rhine.c	TDMD1
2752	CR1_KEYPAG	0x10	via-rhine.c	turn on par/key
2753	CR1_DPOLL	0x08	via-rhine.c	disable rx/tx auto polling
2754	CR1_FDX	0x04	via-rhine.c	full duplex mode
2755	CR1_ETEN	0x02	via-rhine.c	early tx mode
2756	CR1_EREN	0x01	via-rhine.c	early rx mode
2757	CR_RDMD	0x0040	via-rhine.c	rx descriptor polling demand
2758	CR_TDMD	0x0020	via-rhine.c	tx descriptor polling demand
2759	CR_TXON	0x0010	via-rhine.c
2760	CR_RXON	0x0008	via-rhine.c
2761	CR_STOP	0x0004	via-rhine.c	stop NIC, default = 1
2762	CR_STRT	0x0002	via-rhine.c	start NIC
2763	CR_INIT	0x0001	via-rhine.c	start init process
2764	CR_SFRST	0x8000	via-rhine.c	software reset
2765	CR_RDMD1	0x4000	via-rhine.c	RDMD1
2766	CR_TDMD1	0x2000	via-rhine.c	TDMD1
2767	CR_KEYPAG	0x1000	via-rhine.c	turn on par/key
2768	CR_DPOLL	0x0800	via-rhine.c	disable rx/tx auto polling
2769	CR_FDX	0x0400	via-rhine.c	full duplex mode
2770	CR_ETEN	0x0200	via-rhine.c	early tx mode
2771	CR_EREN	0x0100	via-rhine.c	early rx mode
2772	IMR0_CNTM	0x80	via-rhine.c
2773	IMR0_BEM	0x40	via-rhine.c
2774	IMR0_RUM	0x20	via-rhine.c
2775	IMR0_TUM	0x10	via-rhine.c
2776	IMR0_TXEM	0x08	via-rhine.c
2777	IMR0_RXEM	0x04	via-rhine.c
2778	IMR0_PTXM	0x02	via-rhine.c
2779	IMR0_PRXM	0x01	via-rhine.c
2780	IMRShadow	0x5AFF	via-rhine.c
2781	IMR1_INITM	0x80	via-rhine.c
2782	IMR1_SRCM	0x40	via-rhine.c
2783	IMR1_NBFM	0x10	via-rhine.c
2784	IMR1_PRAIM	0x08	via-rhine.c
2785	IMR1_RES0M	0x04	via-rhine.c
2786	IMR1_ETM	0x02	via-rhine.c
2787	IMR1_ERM	0x01	via-rhine.c
2788	ISR_INITI	0x8000	via-rhine.c
2789	ISR_SRCI	0x4000	via-rhine.c
2790	ISR_ABTI	0x2000	via-rhine.c
2791	ISR_NORBF	0x1000	via-rhine.c
2792	ISR_PKTRA	0x0800	via-rhine.c
2793	ISR_RES0	0x0400	via-rhine.c
2794	ISR_ETI	0x0200	via-rhine.c
2795	ISR_ERI	0x0100	via-rhine.c
2796	ISR_CNT	0x0080	via-rhine.c
2797	ISR_BE	0x0040	via-rhine.c
2798	ISR_RU	0x0020	via-rhine.c
2799	ISR_TU	0x0010	via-rhine.c
2800	ISR_TXE	0x0008	via-rhine.c
2801	ISR_RXE	0x0004	via-rhine.c
2802	ISR_PTX	0x0002	via-rhine.c
2803	ISR_PRX	0x0001	via-rhine.c
2804	ISR0_CNT	0x80	via-rhine.c
2805	ISR0_BE	0x40	via-rhine.c
2806	ISR0_RU	0x20	via-rhine.c
2807	ISR0_TU	0x10	via-rhine.c
2808	ISR0_TXE	0x08	via-rhine.c
2809	ISR0_RXE	0x04	via-rhine.c
2810	ISR0_PTX	0x02	via-rhine.c
2811	ISR0_PRX	0x01	via-rhine.c
2812	ISR1_INITI	0x80	via-rhine.c
2813	ISR1_SRCI	0x40	via-rhine.c
2814	ISR1_NORBF	0x10	via-rhine.c
2815	ISR1_PKTRA	0x08	via-rhine.c
2816	ISR1_ETI	0x02	via-rhine.c
2817	ISR1_ERI	0x01	via-rhine.c
2818	ISR_ABNORMAL	ISR_BE+ISR_RU+ISR_TU+ISR_CNT+ISR_NORBF+ISR_PKTRA	via-rhine.c
2819	MIISR_MIIERR	0x08	via-rhine.c
2820	MIISR_MRERR	0x04	via-rhine.c
2821	MIISR_LNKFL	0x02	via-rhine.c
2822	MIISR_SPEED	0x01	via-rhine.c
2823	MIICR_MAUTO	0x80	via-rhine.c
2824	MIICR_RCMD	0x40	via-rhine.c
2825	MIICR_WCMD	0x20	via-rhine.c
2826	MIICR_MDPM	0x10	via-rhine.c
2827	MIICR_MOUT	0x08	via-rhine.c
2828	MIICR_MDO	0x04	via-rhine.c
2829	MIICR_MDI	0x02	via-rhine.c
2830	MIICR_MDC	0x01	via-rhine.c
2831	EECSR_EEPR	0x80	via-rhine.c	eeprom programed status, 73h means programed
2832	EECSR_EMBP	0x40	via-rhine.c	eeprom embeded programming
2833	EECSR_AUTOLD	0x20	via-rhine.c	eeprom content reload
2834	EECSR_DPM	0x10	via-rhine.c	eeprom direct programming
2835	EECSR_CS	0x08	via-rhine.c	eeprom CS pin
2836	EECSR_SK	0x04	via-rhine.c	eeprom SK pin
2837	EECSR_DI	0x02	via-rhine.c	eeprom DI pin
2838	EECSR_DO	0x01	via-rhine.c	eeprom DO pin
2839	BCR0_CRFT2	0x20	via-rhine.c
2840	BCR0_CRFT1	0x10	via-rhine.c
2841	BCR0_CRFT0	0x08	via-rhine.c
2842	BCR0_DMAL2	0x04	via-rhine.c
2843	BCR0_DMAL1	0x02	via-rhine.c
2844	BCR0_DMAL0	0x01	via-rhine.c
2845	BCR1_CTSF	0x20	via-rhine.c
2846	BCR1_CTFT1	0x10	via-rhine.c
2847	BCR1_CTFT0	0x08	via-rhine.c
2848	BCR1_POT2	0x04	via-rhine.c
2849	BCR1_POT1	0x02	via-rhine.c
2850	BCR1_POT0	0x01	via-rhine.c
2851	CFGA_EELOAD	0x80	via-rhine.c	enable eeprom embeded and direct programming
2852	CFGA_JUMPER	0x40	via-rhine.c
2853	CFGA_MTGPIO	0x08	via-rhine.c
2854	CFGA_T10EN	0x02	via-rhine.c
2855	CFGA_AUTO	0x01	via-rhine.c
2856	CFGB_PD	0x80	via-rhine.c
2857	CFGB_POLEN	0x02	via-rhine.c
2858	CFGB_LNKEN	0x01	via-rhine.c
2859	CFGC_M10TIO	0x80	via-rhine.c
2860	CFGC_M10POL	0x40	via-rhine.c
2861	CFGC_PHY1	0x20	via-rhine.c
2862	CFGC_PHY0	0x10	via-rhine.c
2863	CFGC_BTSEL	0x08	via-rhine.c
2864	CFGC_BPS2	0x04	via-rhine.c	bootrom select[2]
2865	CFGC_BPS1	0x02	via-rhine.c	bootrom select[1]
2866	CFGC_BPS0	0x01	via-rhine.c	bootrom select[0]
2867	CFGD_GPIOEN	0x80	via-rhine.c
2868	CFGD_DIAG	0x40	via-rhine.c
2869	CFGD_MAGIC	0x10	via-rhine.c
2870	CFGD_RANDOM	0x08	via-rhine.c
2871	CFGD_CFDX	0x04	via-rhine.c
2872	CFGD_CEREN	0x02	via-rhine.c
2873	CFGD_CETEN	0x01	via-rhine.c
2874	RSR_RERR	0x00000001	via-rhine.c
2875	RSR_CRC	0x00000002	via-rhine.c
2876	RSR_FAE	0x00000004	via-rhine.c
2877	RSR_FOV	0x00000008	via-rhine.c
2878	RSR_LONG	0x00000010	via-rhine.c
2879	RSR_RUNT	0x00000020	via-rhine.c
2880	RSR_SERR	0x00000040	via-rhine.c
2881	RSR_BUFF	0x00000080	via-rhine.c
2882	RSR_EDP	0x00000100	via-rhine.c
2883	RSR_STP	0x00000200	via-rhine.c
2884	RSR_CHN	0x00000400	via-rhine.c
2885	RSR_PHY	0x00000800	via-rhine.c
2886	RSR_BAR	0x00001000	via-rhine.c
2887	RSR_MAR	0x00002000	via-rhine.c
2888	RSR_RXOK	0x00008000	via-rhine.c
2889	RSR_ABNORMAL	RSR_RERR+RSR_LONG+RSR_RUNT	via-rhine.c
2890	TSR_NCR0	0x00000001	via-rhine.c
2891	TSR_NCR1	0x00000002	via-rhine.c
2892	TSR_NCR2	0x00000004	via-rhine.c
2893	TSR_NCR3	0x00000008	via-rhine.c
2894	TSR_COLS	0x00000010	via-rhine.c
2895	TSR_CDH	0x00000080	via-rhine.c
2896	TSR_ABT	0x00000100	via-rhine.c
2897	TSR_OWC	0x00000200	via-rhine.c
2898	TSR_CRS	0x00000400	via-rhine.c
2899	TSR_UDF	0x00000800	via-rhine.c
2900	TSR_TBUFF	0x00001000	via-rhine.c
2901	TSR_SERR	0x00002000	via-rhine.c
2902	TSR_JAB	0x00004000	via-rhine.c
2903	TSR_TERR	0x00008000	via-rhine.c
2904	TSR_ABNORMAL	TSR_TERR+TSR_OWC+TSR_ABT+TSR_JAB+TSR_CRS	via-rhine.c
2905	TSR_OWN_BIT	0x80000000	via-rhine.c
2906	CB_DELAY_LOOP_WAIT	10	via-rhine.c	10ms
2907	W_IMR_MASK_VALUE	0x1BFF	via-rhine.c	initial value of IMR
2908	PKT_TYPE_DIRECTED	0x0001	via-rhine.c	obsolete, directed address is always accepted
2909	PKT_TYPE_MULTICAST	0x0002	via-rhine.c
2910	PKT_TYPE_ALL_MULTICAST	0x0004	via-rhine.c
2911	PKT_TYPE_BROADCAST	0x0008	via-rhine.c
2912	PKT_TYPE_PROMISCUOUS	0x0020	via-rhine.c
2913	PKT_TYPE_LONG	0x2000	via-rhine.c
2914	PKT_TYPE_RUNT	0x4000	via-rhine.c
2915	PKT_TYPE_ERROR	0x8000	via-rhine.c	accept error packets, e.g. CRC error
2916	NIC_LB_NONE	0x00	via-rhine.c
2917	NIC_LB_INTERNAL	0x01	via-rhine.c
2918	NIC_LB_PHY	0x02	via-rhine.c	MII or Internal-10BaseT loopback
2919	TX_RING_SIZE	2	via-rhine.c
2920	RX_RING_SIZE	2	via-rhine.c
2921	PKT_BUF_SZ	1536	via-rhine.c	Size of each temporary Rx buffer.
2922	PCI_REG_MODE3	0x53	via-rhine.c
2923	MODE3_MIION	0x04	via-rhine.c	in PCI_REG_MOD3 OF PCI space
2924	rhine_TOTAL_SIZE	0x80	via-rhine.c
2925	NUM_TX_DESC	2	via-rhine.c	Number of Tx descriptor registers.
2926	DEFAULT_INTR	(IntrRxDone \| IntrRxErr \| IntrRxEmpty\| IntrRxOverflow \| \ IntrRxDropped \| IntrRxNoBuf)	via-rhine.c
2927	IOSYNC	do { inb(nic->ioaddr + StationAddr); } while (0)	via-rhine.c
2928	PCI_D0	((int) 0)	via-velocity.c
2929	PCI_D1	((int) 1)	via-velocity.c
2930	PCI_D2	((int) 2)	via-velocity.c
2931	PCI_D3hot	((int) 3)	via-velocity.c
2932	PCI_D3cold	((int) 4)	via-velocity.c
2933	PCI_POWER_ERROR	((int) -1)	via-velocity.c
2934	VLAN_ID_MIN	0	via-velocity.c
2935	VLAN_ID_MAX	4095	via-velocity.c
2936	VLAN_ID_DEF	0	via-velocity.c
2937	RX_THRESH_MIN	0	via-velocity.c
2938	RX_THRESH_MAX	3	via-velocity.c
2939	RX_THRESH_DEF	0	via-velocity.c
2940	DMA_LENGTH_MIN	0	via-velocity.c
2941	DMA_LENGTH_MAX	7	via-velocity.c
2942	DMA_LENGTH_DEF	0	via-velocity.c
2943	TAGGING_DEF	0	via-velocity.c
2944	IP_ALIG_DEF	0	via-velocity.c
2945	TX_CSUM_DEF	1	via-velocity.c
2946	FLOW_CNTL_DEF	1	via-velocity.c
2947	FLOW_CNTL_MIN	1	via-velocity.c
2948	FLOW_CNTL_MAX	5	via-velocity.c
2949	MED_LNK_DEF	0	via-velocity.c
2950	MED_LNK_MIN	0	via-velocity.c
2951	MED_LNK_MAX	4	via-velocity.c
2952	VAL_PKT_LEN_DEF	0	via-velocity.c
2953	WOL_OPT_DEF	0	via-velocity.c
2954	WOL_OPT_MIN	0	via-velocity.c
2955	WOL_OPT_MAX	7	via-velocity.c
2956	INT_WORKS_DEF	20	via-velocity.c
2957	INT_WORKS_MIN	10	via-velocity.c
2958	INT_WORKS_MAX	64	via-velocity.c
2959	TX_TIMEOUT	(1000);	via-velocity.c
2960	IORESOURCE_IO	0x00000100	via-velocity.c	Resource type
2961	IORESOURCE_PREFETCH	0x00001000	via-velocity.c	No side effects
2962	IORESOURCE_MEM	0x00000200	via-velocity.c
2963	BAR_0	0	via-velocity.c
2964	BAR_1	1	via-velocity.c
2965	BAR_5	5	via-velocity.c
2966	PCI_BASE_ADDRESS_SPACE	0x01	via-velocity.c	0 = memory, 1 = I/O
2967	PCI_BASE_ADDRESS_SPACE_IO	0x01	via-velocity.c
2968	PCI_BASE_ADDRESS_SPACE_MEMORY	0x00	via-velocity.c
2969	PCI_BASE_ADDRESS_MEM_TYPE_MASK	0x06	via-velocity.c
2970	PCI_BASE_ADDRESS_MEM_TYPE_32	0x00	via-velocity.c	32 bit address
2971	PCI_BASE_ADDRESS_MEM_TYPE_1M	0x02	via-velocity.c	Below 1M [obsolete]
2972	PCI_BASE_ADDRESS_MEM_TYPE_64	0x04	via-velocity.c	64 bit address
2973	PCI_BASE_ADDRESS_MEM_PREFETCH	0x08	via-velocity.c	prefetchable?
2974	PCI_REG_COMMAND	0x04	via-velocity.c
2975	PCI_REG_MODE0	0x60	via-velocity.c
2976	PCI_REG_MODE1	0x61	via-velocity.c
2977	PCI_REG_MODE2	0x62	via-velocity.c
2978	PCI_REG_MODE3	0x63	via-velocity.c
2979	PCI_REG_DELAY_TIMER	0x64	via-velocity.c
2980	MODE2_PCEROPT	0x80	via-velocity.c	take PCI bus ERror as a fatal and shutdown from software control
2981	MODE2_TXQ16	0x40	via-velocity.c	TX write-back Queue control. 0->32 entries available in Tx write-back queue, 1->16 entries
2982	MODE2_TXPOST	0x08	via-velocity.c	(Not support in VT3119)
2983	MODE2_AUTOOPT	0x04	via-velocity.c	(VT3119 GHCI without such behavior)
2984	MODE2_MODE10T	0x02	via-velocity.c	used to control tx Threshold for 10M case
2985	MODE2_TCPLSOPT	0x01	via-velocity.c	TCP large send field update disable, hardware will not update related fields, leave it to software.
2986	MODE3_MIION	0x04	via-velocity.c	MII symbol codine error detect enable ??
2987	COMMAND_BUSM	0x04	via-velocity.c
2988	COMMAND_WAIT	0x80	via-velocity.c
2989	RX_BUF_NB	6	virtio-net.c
2990	TX_RING_SIZE	2	w89c840.c
2991	RX_RING_SIZE	2	w89c840.c
2992	TX_FIFO_SIZE	(2048)	w89c840.c
2993	TX_BUG_FIFO_LIMIT	(TX_FIFO_SIZE-1514-16)	w89c840.c
2994	TX_TIMEOUT	(10*1000)	w89c840.c
2995	PKT_BUF_SZ	1536	w89c840.c	Size of each temporary Rx buffer.
2996	W840_FLAGS	(PCI_USES_IO \| PCI_ADDR0 \| PCI_USES_MASTER)	w89c840.c
2997	W840_FLAGS	(PCI_USES_MEM \| PCI_ADDR1 \| PCI_USES_MASTER)	w89c840.c
2998	readb	inb	w89c840.c
2999	readw	inw	w89c840.c
3000	readl	inl	w89c840.c
3001	writeb	outb	w89c840.c
3002	writew	outw	w89c840.c
3003	writel	outl	w89c840.c
3004	PRIV_ALIGN	15	w89c840.c	Required alignment mask
3005	PRIV_ALIGN_BYTES	32	w89c840.c
3006	MDIO_WRITE0	(MDIO_EnbOutput)	w89c840.c
3007	MDIO_WRITE1	(MDIO_DataOut \| MDIO_EnbOutput)	w89c840.c
3008	WD_DEFAULT_MEM	0xCC000	wd.c
3009	ATH5K_CALIB_INTERVAL	10	ath5k.c	Calibrate PHY every 10 seconds
3010	ATH5K_RETRIES	4	ath5k.c	Number of times to retry packet sends
3011	ATH5K_DESC_ALIGN	16	ath5k.c	Alignment for TX/RX descriptors
3012	ATH5K_SPMBL_NO	1	ath5k.c
3013	ATH5K_SPMBL_YES	2	ath5k.c
3014	ATH5K_SPMBL_BOTH	3	ath5k.c
3015	ATH5K_NR_RATES	15	ath5k.c
3016	FCS_LEN	4	ath5k_desc.c
3017	PHN_MAX_NUM_PORTS	4	phantom.c
3018	PHN_CMDPEG_INIT_TIMEOUT_SEC	50	phantom.c
3019	PHN_RCVPEG_INIT_TIMEOUT_SEC	2	phantom.c
3020	PHN_ISSUE_CMD_TIMEOUT_MS	2000	phantom.c
3021	PHN_TEST_MEM_TIMEOUT_MS	100	phantom.c
3022	PHN_CLP_CMD_TIMEOUT_MS	500	phantom.c
3023	PHN_LINK_POLL_FREQUENCY	4096	phantom.c
3024	PHN_NUM_RDS	32	phantom.c
3025	PHN_RDS_MAX_FILL	16	phantom.c
3026	PHN_RX_BUFSIZE	( 32 + \ ETH_FRAME_LEN )	phantom.c
3027	PHN_NUM_SDS	32	phantom.c
3028	PHN_NUM_CDS	8	phantom.c
3029	PHN_CLP_TAG_MAGIC	0xc19c1900UL	phantom.c
3030	PHN_CLP_TAG_MAGIC_MASK	0xffffff00UL	phantom.c
3031	PHN_CLP_BLKSIZE	( sizeof ( union phantom_clp_data ) )	phantom.c
3032	GRF5101_ANTENNA	0xA3	rtl8180_grf5101.c
3033	MAXIM_ANTENNA	0xb3	rtl8180_max2820.c
3034	SA2400_ANTENNA	0x91	rtl8180_sa2400.c
3035	SA2400_DIG_ANAPARAM_PWR1_ON	0x8	rtl8180_sa2400.c
3036	SA2400_ANA_ANAPARAM_PWR1_ON	0x28	rtl8180_sa2400.c
3037	SA2400_ANAPARAM_PWR0_ON	0x3	rtl8180_sa2400.c
3038	SA2400_MAX_SENS	85	rtl8180_sa2400.c
3039	SA2400_REG4_FIRDAC_SHIFT	7	rtl8180_sa2400.c
3040	RTL8225_ANAPARAM_ON	0xa0000b59	rtl8185_rtl8225.c
3041	RTL8225_ANAPARAM2_ON	0x860dec11	rtl8185_rtl8225.c
3042	RTL8225_ANAPARAM_OFF	0xa00beb59	rtl8185_rtl8225.c
3043	RTL8225_ANAPARAM2_OFF	0x840dec11	rtl8185_rtl8225.c
3044	RTL818X_NR_B_RATES	4	rtl818x.c
3045	RTL818X_NR_RATES	12	rtl818x.c
3046	RTL818X_NR_RF_NAMES	11	rtl818x.c
3047	RTL_ROM	PCI_ROM	rtl818x.c
3048	READLINE_MAX	256	readline.c
3049	ERRFILE	0	strerror.c
3050	ERRFILE	ERRFILE_net80211	wireless_errors.c
3051	INPUT_DELAY	200	kb.c	half-blocking delay timer resolution (ms)
3052	INPUT_DELAY_TIMEOUT	1000	kb.c	half-blocking delay timeout
3053	MIN_SPACE_SIZE	2	slk.c
3054	SLK_MAX_LABEL_LEN	8	slk.c
3055	SLK_MAX_NUM_LABELS	12	slk.c
3056	SLK_MAX_NUM_SPACES	2	slk.c
3057	EDITBOX_MIN_CHARS	3	editbox.c
3058	CPAIR_NORMAL	1	login_ui.c
3059	CPAIR_LABEL	2	login_ui.c
3060	CPAIR_EDITBOX	3	login_ui.c
3061	USERNAME_LABEL_ROW	8	login_ui.c
3062	USERNAME_ROW	10	login_ui.c
3063	PASSWORD_LABEL_ROW	14	login_ui.c
3064	PASSWORD_ROW	16	login_ui.c
3065	LABEL_COL	36	login_ui.c
3066	EDITBOX_COL	30	login_ui.c
3067	EDITBOX_WIDTH	20	login_ui.c
3068	CPAIR_NORMAL	1	settings_ui.c
3069	CPAIR_SELECT	2	settings_ui.c
3070	CPAIR_EDIT	3	settings_ui.c
3071	CPAIR_ALERT	4	settings_ui.c
3072	TITLE_ROW	1	settings_ui.c
3073	SETTINGS_LIST_ROW	3	settings_ui.c
3074	SETTINGS_LIST_COL	1	settings_ui.c
3075	INFO_ROW	20	settings_ui.c
3076	ALERT_ROW	20	settings_ui.c
3077	INSTRUCTION_ROW	22	settings_ui.c
3078	INSTRUCTION_PAD	" "	settings_ui.c
3079	NUM_SETTINGS	table_num_entries ( SETTINGS )	settings_ui.c
3080	ATTR_BOLD	0x08	efi_console.c
3081	ATTR_FCOL_MASK	0x07	efi_console.c
3082	ATTR_FCOL_BLACK	0x00	efi_console.c
3083	ATTR_FCOL_BLUE	0x01	efi_console.c
3084	ATTR_FCOL_GREEN	0x02	efi_console.c
3085	ATTR_FCOL_CYAN	0x03	efi_console.c
3086	ATTR_FCOL_RED	0x04	efi_console.c
3087	ATTR_FCOL_MAGENTA	0x05	efi_console.c
3088	ATTR_FCOL_YELLOW	0x06	efi_console.c
3089	ATTR_FCOL_WHITE	0x07	efi_console.c
3090	ATTR_BCOL_MASK	0x70	efi_console.c
3091	ATTR_BCOL_BLACK	0x00	efi_console.c
3092	ATTR_BCOL_BLUE	0x10	efi_console.c
3093	ATTR_BCOL_GREEN	0x20	efi_console.c
3094	ATTR_BCOL_CYAN	0x30	efi_console.c
3095	ATTR_BCOL_RED	0x40	efi_console.c
3096	ATTR_BCOL_MAGENTA	0x50	efi_console.c
3097	ATTR_BCOL_YELLOW	0x60	efi_console.c
3098	ATTR_BCOL_WHITE	0x70	efi_console.c
3099	ATTR_DEFAULT	ATTR_FCOL_WHITE	efi_console.c
3100	MAX_PORT_ADDRESS	0xffff	efi_io.c
3101	EFI_TIMER0_SHIFT	12	efi_timer.c
3102	EFI_CALIBRATE_DELAY_MS	1	efi_timer.c
3103	UNOWHERE	( ~UNULL )	efi_umalloc.c
3104	SMBIOS_TAG_MAGIC	0x5B	smbios_settings.c	"SmBios"
3105	SMBIOS_EMPTY_TAG	( SMBIOS_TAG_MAGIC << 24 )	smbios_settings.c
3106	NUM_ARP_ENTRIES	4	arp.c
3107	arp_table_end	&arp_table[NUM_ARP_ENTRIES]	arp.c
3108	EINPROGRESS_INIT	( EINPROGRESS \| EUNIQ_01 )	infiniband.c
3109	EINPROGRESS_ARMED	( EINPROGRESS \| EUNIQ_02 )	infiniband.c
3110	NUM_NDP_ENTRIES	4	ndp.c
3111	ndp_table_end	&ndp_table[NUM_NDP_ENTRIES]	ndp.c
3112	EUNKNOWN_LINK_STATUS	EINPROGRESS	netdevice.c
3113	MIN_TIMEOUT	7	retry.c
3114	EINVAL_PKT_TOO_SHORT	( EINVAL \| EUNIQ_01 )	net80211.c
3115	EINVAL_PKT_VERSION	( EINVAL \| EUNIQ_02 )	net80211.c
3116	EINVAL_PKT_NOT_DATA	( EINVAL \| EUNIQ_03 )	net80211.c
3117	EINVAL_PKT_NOT_FROMDS	( EINVAL \| EUNIQ_04 )	net80211.c
3118	EINVAL_PKT_LLC_HEADER	( EINVAL \| EUNIQ_05 )	net80211.c
3119	EINVAL_CRYPTO_REQUEST	( EINVAL \| EUNIQ_06 )	net80211.c
3120	EINVAL_ACTIVE_SCAN	( EINVAL \| EUNIQ_07 )	net80211.c
3121	NET80211_PROBE_GATHER	1	net80211.c
3122	NET80211_PROBE_GATHER_ALL	2	net80211.c
3123	NET80211_PROBE_TIMEOUT	6	net80211.c
3124	ASSOC_TIMEOUT	TICKS_PER_SEC	net80211.c
3125	ASSOC_RETRIES	2	net80211.c
3126	LQ_SMOOTH	7	net80211.c
3127	RC_PKT_OK	0x3	rc80211.c
3128	RC_PKT_RETRIED_ONCE	0x2	rc80211.c
3129	RC_PKT_RETRIED_MULTI	0x1	rc80211.c
3130	RC_PKT_FAILED	0x0	rc80211.c
3131	RC_TX_FACTOR	4	rc80211.c
3132	RC_TX_EMERG_FAIL	3	rc80211.c
3133	RC_GOODNESS_MIN	85	rc80211.c
3134	RC_GOODNESS_MAX	95	rc80211.c
3135	RC_UNCERTAINTY_THRESH	4	rc80211.c
3136	TX	0	rc80211.c
3137	RX	1	rc80211.c
3138	END_MAGIC	0xFFFFFFFF	sec80211.c
3139	WEP_IV_LEN	3	wep.c
3140	WEP_KID_LEN	1	wep.c
3141	WEP_ICV_LEN	4	wep.c
3142	WEP_MAX_KEY	16	wep.c
3143	WEP_HEADER_LEN	4	wep.c
3144	WEP_TRAILER_LEN	4	wep.c
3145	WEP_OVERHEAD	8	wep.c
3146	CCMP_HEAD_LEN	8	wpa_ccmp.c
3147	CCMP_MIC_LEN	8	wpa_ccmp.c
3148	CCMP_NONCE_LEN	13	wpa_ccmp.c
3149	CCMP_AAD_LEN	22	wpa_ccmp.c
3150	CCMP_AAD_FC_MASK	0xC38F	wpa_ccmp.c
3151	CCMP_AAD_SEQ_MASK	0x000F	wpa_ccmp.c
3152	PN_MSB	1	wpa_ccmp.c
3153	PN_LSB	0	wpa_ccmp.c
3154	TKIP_HEAD_LEN	8	wpa_tkip.c
3155	TKIP_FOOT_LEN	12	wpa_tkip.c
3156	TKIP_MIC_LEN	8	wpa_tkip.c
3157	TKIP_ICV_LEN	4	wpa_tkip.c
3158	IB_CMRC_NUM_SEND_WQES	4	ib_cmrc.c
3159	IB_CMRC_NUM_RECV_WQES	2	ib_cmrc.c
3160	IB_CMRC_NUM_CQES	8	ib_cmrc.c
3161	IB_MI_NUM_SEND_WQES	4	ib_mi.c
3162	IB_MI_NUM_RECV_WQES	2	ib_mi.c
3163	IB_MI_NUM_CQES	8	ib_mi.c
3164	IB_MI_TID_MAGIC	( ( 'g' << 24 ) \| ( 'P' << 16 ) \| ( 'X' << 8 ) \| 'E' )	ib_mi.c
3165	IB_NUM_CACHED_PATHS	4	ib_pathrec.c
3166	EINVAL_BYTE_STRING_LEN	( EINVAL \| EUNIQ_01 )	ib_srp.c
3167	EINVAL_BYTE_STRING	( EINVAL \| EUNIQ_02 )	ib_srp.c
3168	EINVAL_INTEGER	( EINVAL \| EUNIQ_03 )	ib_srp.c
3169	EINVAL_RP_TOO_SHORT	( EINVAL \| EUNIQ_04 )	ib_srp.c
3170	IB_SRP_NUM_RP_COMPONENTS	( sizeof ( ib_srp_rp_parser ) / sizeof ( ib_srp_rp_parser[0] ) )	ib_srp.c
3171	DHCP_OFFER_IP	1	dhcp.c
3172	DHCP_OFFER_PXE	2	dhcp.c
3173	DHCP_MAX_OFFERS	6	dhcp.c
3174	SLAM_DEFAULT_PORT	10000	slam.c
3175	SLAM_DEFAULT_MULTICAST_IP	( ( 239 << 24 ) \| ( 255 << 16 ) \| ( 1 << 8 ) \| ( 1 << 0 ) )	slam.c
3176	SLAM_DEFAULT_MULTICAST_PORT	10000	slam.c
3177	SLAM_MAX_HEADER_LEN	( 7 + 7 + \ 7 )	slam.c	block_size
3178	SLAM_MAX_BLOCKS_PER_NACK	4	slam.c
3179	SLAM_MAX_NACK_LEN	( 7 + 7 + 1 )	slam.c	block #blocks NUL
3180	SLAM_SLAVE_TIMEOUT	( 1 * TICKS_PER_SEC )	slam.c
3181	ETFTP_INVALID_BLKSIZE	EUNIQ_01	tftp.c
3182	ETFTP_INVALID_TSIZE	EUNIQ_02	tftp.c
3183	ETFTP_MC_NO_PORT	EUNIQ_03	tftp.c
3184	ETFTP_MC_NO_MC	EUNIQ_04	tftp.c
3185	ETFTP_MC_INVALID_MC	EUNIQ_05	tftp.c
3186	ETFTP_MC_INVALID_IP	EUNIQ_06	tftp.c
3187	ETFTP_MC_INVALID_PORT	EUNIQ_07	tftp.c
3188	MTFTP_MAX_TIMEOUTS	3	tftp.c
3189	__regparm	__attribute__ (( regparm(3) ))	memcpy_test.c
3190	URI_MAX_LEN	1024	uri_test.c
3191	LINK_WAIT_MS	15000	dhcpmgmt.c
3192	NR_CRYPTO_TYPES	( sizeof ( crypto_types ) / sizeof ( crypto_types[0] ) )	iwmgmt.c
3193	NR_AUTH_TYPES	( sizeof ( auth_types ) / sizeof ( auth_types[0] ) )	iwmgmt.c
3194	ERRFILE	ERRFILE_net80211	iwmgmt.c
3195	CPAIR_NORMAL	1	pxemenu.c
3196	CPAIR_SELECT	2	pxemenu.c
3197	EFI_FILE_ALIGN	0x20	elf2efi.c
3198	SNAPLEN	1600	hijack.c
3199	HAVE_PCAP_INJECT	0	hijack.c
3200	DEBUG	0	iccfix.c
3201	ELF_EHDR	Elf32_Ehdr	iccfix.c
3202	ELF_SHDR	Elf32_Shdr	iccfix.c
3203	ICCFIX	iccfix32	iccfix.c
3204	ELF_EHDR	Elf64_Ehdr	iccfix.c
3205	ELF_SHDR	Elf64_Shdr	iccfix.c
3206	ICCFIX	iccfix64	iccfix.c
3207	UCLPACK_COMPAT	0	nrv2b.c
3208	NDEBUG	1	nrv2b.c
3209	wterr	0	nrv2b.c
3210	ENDIAN	0	nrv2b.c
3211	BITSIZE	32	nrv2b.c
3212	N	(65536ul)	nrv2b.c	size of ring buffer
3213	THRESHOLD	1	nrv2b.c	lower limit for match length
3214	F	2048	nrv2b.c	upper limit for match length
3215	M2_MAX_OFFSET	0xd00	nrv2b.c
3216	UCL_E_OK	0	nrv2b.c
3217	UCL_E_INVALID_ARGUMENT	1	nrv2b.c
3218	UCL_E_OUT_OF_MEMORY	2	nrv2b.c
3219	UCL_E_ERROR	3	nrv2b.c
3220	SWD_HSIZE	16384	nrv2b.c
3221	SWD_MAX_CHAIN	2048	nrv2b.c
3222	SWD_BEST_OFF	1	nrv2b.c
3223	NIL2	UINT_MAX	nrv2b.c
3224	DEBUG	0	zbin.c
3225	ADV_MAGIC1	0x5a2d2fa5	setadv.c	Head signature
3226	ADV_MAGIC2	0xa3041767	setadv.c	Total checksum
3227	ADV_MAGIC3	0xdd28bf64	setadv.c	Tail signature
3228	_XOPEN_SOURCE	500	syslxmod.c	Required on glibc 2.x
3229	LDLINUX_MAGIC	0x3eb202fe	syslxmod.c
3230	bsHead	bsJump	syslxmod.c
3231	bsHeadLen	(bsOemName-bsHead)	syslxmod.c
3232	bsCode	bs32Code	syslxmod.c	The common safe choice
3233	bsCodeLen	(bsSignature-bs32Code)	syslxmod.c
3234	DO_DIRECT_MOUNT	1	syslinux.c
3235	DO_DIRECT_MOUNT	0	syslinux.c	glibc has broken losetup ioctls
3236	_XOPEN_SOURCE	500	syslinux.c	For pread() pwrite()
3237	_FILE_OFFSET_BITS	64	syslinux.c
3238	FAT_IOCTL_SET_ATTRIBUTES	_IOW('r', 0x11, uint32_t)	syslinux.c
3239	_PATH_MOUNT	"/bin/mount"	syslinux.c
3240	_PATH_UMOUNT	"/bin/umount"	syslinux.c
3241	_PATH_TMP	"/tmp/"	syslinux.c
3242	ZEROPAD	1	conio.c	pad with zero
3243	SIGN	2	conio.c	unsigned/signed long
3244	PLUS	4	conio.c	show plus
3245	SPACE	8	conio.c	space if plus
3246	LEFT	16	conio.c	left justified
3247	SPECIAL	32	conio.c	0x
3248	LARGE	64	conio.c	use 'ABCDEF' instead of 'abcdef'
3249	MAXRANGES	1024	e820func.c
3250	slide	window	inflate.c
3251	wp	outcnt	inflate.c
3252	BMAX	16	inflate.c	maximum bit length of any code (16 for explode)
3253	N_MAX	288	inflate.c	maximum number of codes in any set
3254	CRC_VALUE	(crc ^ 0xffffffffL)	inflate.c
3255	ASCII_FLAG	0x01	inflate.c	bit 0 set: file probably ASCII text
3256	CONTINUATION	0x02	inflate.c	bit 1 set: continuation of multi-part gzip file
3257	EXTRA_FIELD	0x04	inflate.c	bit 2 set: extra field present
3258	ORIG_NAME	0x08	inflate.c	bit 3 set: original file name present
3259	COMMENT	0x10	inflate.c	bit 4 set: file comment present
3260	ENCRYPTED	0x20	inflate.c	bit 5 set: file is encrypted
3261	RESERVED	0xC0	inflate.c	bit 6,7: reserved
3262	CMD_NOTFOUND	((char *)-1)	setup.c	Not found
3263	CMD_BOOL	((char *)-2)	setup.c	Found boolean option
3264	UNZIP_ALIGN	512	setup.c
3265	STATIC	static	unzip.c
3266	WSIZE	0x8000	unzip.c	Window size must be at least 32k,
3267	ASCII_FLAG	0x01	unzip.c	bit 0 set: file probably ASCII text
3268	CONTINUATION	0x02	unzip.c	bit 1 set: continuation of multi-part gzip file
3269	EXTRA_FIELD	0x04	unzip.c	bit 2 set: extra field present
3270	ORIG_NAME	0x08	unzip.c	bit 3 set: original file name present
3271	COMMENT	0x10	unzip.c	bit 4 set: file comment present
3272	ENCRYPTED	0x20	unzip.c	bit 5 set: file is encrypted
3273	RESERVED	0xC0	unzip.c	bit 6,7: reserved
3274	ASCII_FLAG	0x01	unzip.c	bit 0 set: file probably ASCII text
3275	CONTINUATION	0x02	unzip.c	bit 1 set: continuation of multi-part gzip file
3276	EXTRA_FIELD	0x04	unzip.c	bit 2 set: extra field present
3277	ORIG_NAME	0x08	unzip.c	bit 3 set: original file name present
3278	COMMENT	0x10	unzip.c	bit 4 set: file comment present
3279	ENCRYPTED	0x20	unzip.c	bit 5 set: file is encrypted
3280	RESERVED	0xC0	unzip.c	bit 6,7: reserved
3281	PK_ENCRYPTED	0x01	unzip.c	bit 0 set: file is encrypted
3282	PK_DATADESC	0x08	unzip.c	bit 3 set: file has trailing "data
3283	PK_UNSUPPORTED	0xFFF0	unzip.c	All other bits must be zero
3284	dprintf	printf	main.c
3285	ZEROPAD	1	printf.c	pad with zero
3286	SIGN	2	printf.c	unsigned/signed long
3287	PLUS	4	printf.c	show plus
3288	SPACE	8	printf.c	space if plus
3289	LEFT	16	printf.c	left justified
3290	SPECIAL	32	printf.c	0x
3291	LARGE	64	printf.c	use 'ABCDEF' instead of 'abcdef'
3292	_XOPEN_SOURCE	500	syslinux.c	Required on glibc 2.x
3293	NULL	((void *)0)	c32echo.c
3294	NULL	((void *)0)	conio.c
3295	NULL	((void *)0)	fd.c
3296	NULL	((void *)0)	filetest.c
3297	NULL	((void *)0)	hello.c
3298	NULL	((void *)0)	hello2.c
3299	ZEROPAD	1	printf.c	pad with zero
3300	SIGN	2	printf.c	unsigned/signed long
3301	PLUS	4	printf.c	show plus
3302	SPACE	8	printf.c	space if plus
3303	LEFT	16	printf.c	left justified
3304	SPECIAL	32	printf.c	0x
3305	LARGE	64	printf.c	use 'ABCDEF' instead of 'abcdef'
3306	NULL	((void *) 0)	complex.c
3307	INFLINE	22	complex.c
3308	PWDLINE	3	complex.c
3309	PWDPROMPT	21	complex.c
3310	PWDCOLUMN	60	complex.c
3311	PWDATTR	0x74	complex.c
3312	EDITPROMPT	21	complex.c
3313	NULL	((void *) 0)	display.c
3314	NULL	((void *) 0)	simple.c
3315	NULL	((void *) 0)	test.c
3316	MAX_CMD_LINE_LENGTH	514	test.c
3317	GUEST_USER	"guest"	test.c
3318	QUIT_CMD	0	test.c
3319	RPT_CMD	1	test.c
3320	NULL	((void *) 0)	test2.c
3321	MAX_CMD_LINE_LENGTH	514	test2.c
3322	GUEST_USER	"guest"	test2.c
3323	QUIT_CMD	0	test2.c
3324	RPT_CMD	1	test2.c
3325	NULL	((void *) 0)	des.c
3326	MAX_LINE	512	passwords.c
3327	X86_INT_DB	1	main.c
3328	X86_INT_BP	3	main.c
3329	COM32_IDT	((void*)0x100000)	main.c
3330	COM32_LOAD_ADDR	((void*)0x101000)	main.c
3331	STACK_SIZE	0x1000	main.c
3332	COMCONSOLE	0x3f8	serial.c
3333	COMSPEED	9600	serial.c
3334	COMDATA	8	serial.c
3335	COMPARITY	0	serial.c
3336	COMSTOP	1	serial.c
3337	UART_BASE	( COMCONSOLE )	serial.c
3338	UART_BAUD	( COMSPEED )	serial.c
3339	COMBRD	(115200/UART_BAUD)	serial.c
3340	UART_LCS	( ( ( (COMDATA) - 5 ) << 0 ) \| \ ( ( (COMPARITY) ) << 3 ) \| \ ( ( (COMSTOP) - 1 ) << 2 ) )	serial.c
3341	UART_RBR	0x00	serial.c
3342	UART_TBR	0x00	serial.c
3343	UART_IER	0x01	serial.c
3344	UART_IIR	0x02	serial.c
3345	UART_FCR	0x02	serial.c
3346	UART_LCR	0x03	serial.c
3347	UART_MCR	0x04	serial.c
3348	UART_DLL	0x00	serial.c
3349	UART_DLM	0x01	serial.c
3350	UART_LSR	0x05	serial.c
3351	UART_LSR_TEMPT	0x40	serial.c	Transmitter empty
3352	UART_LSR_THRE	0x20	serial.c	Transmit-hold-register empty
3353	UART_LSR_BI	0x10	serial.c	Break interrupt indicator
3354	UART_LSR_FE	0x08	serial.c	Frame error indicator
3355	UART_LSR_PE	0x04	serial.c	Parity error indicator
3356	UART_LSR_OE	0x02	serial.c	Overrun error indicator
3357	UART_LSR_DR	0x01	serial.c	Receiver data ready
3358	UART_MSR	0x06	serial.c
3359	UART_SCR	0x07	serial.c
3360	MAX_CONFIG_LINE_LEN	2048	gfxboot.c
3361	MAX_CMDLINE_LEN	2048	gfxboot.c
3362	REALMODE_BUF_SIZE	4096	gfxboot.c
3363	GFX_MEMORY_SIZE	7	gfxboot.c
3364	CHUNK_SIZE	(64 << 10)	gfxboot.c
3365	GFX_CB_INIT	0	gfxboot.c
3366	GFX_CB_DONE	1	gfxboot.c
3367	GFX_CB_INPUT	2	gfxboot.c
3368	GFX_CB_MENU_INIT	3	gfxboot.c
3369	GFX_CB_INFOBOX_INIT	4	gfxboot.c
3370	GFX_CB_INFOBOX_DONE	5	gfxboot.c
3371	GFX_CB_PROGRESS_INIT	6	gfxboot.c
3372	GFX_CB_PROGRESS_DONE	7	gfxboot.c
3373	GFX_CB_PROGRESS_UPDATE	8	gfxboot.c
3374	GFX_CB_PROGRESS_LIMIT	9	gfxboot.c	unused
3375	GFX_CB_PASSWORD_INIT	10	gfxboot.c
3376	GFX_CB_PASSWORD_DONE	11	gfxboot.c
3377	SMAP	0x534d4150	memory.c	ASCII "SMAP"
3378	MAX_NB_RETRIES	6	util.c
3379	E820MAX	128	hdt-menu-memory.c
3380	TYPE	int	atoi.c
3381	NAME	atoi	atoi.c
3382	TYPE	long	atol.c
3383	NAME	atol	atol.c
3384	TYPE	long long	atoll.c
3385	NAME	atoll	atoll.c
3386	DEBUG	1	dprintf.c
3387	BUFFER_SIZE	16384	fprintf.c
3388	E820_MEM_MAX	0xfff00000	malloc.c	4 GB - 1 MB
3389	BUFFER_SIZE	16384	printf.c
3390	VIRTUAL_CS	0x08	librm.h
3391	VIRTUAL_DS	0x10	librm.h
3392	PHYSICAL_CS	0x18	librm.h
3393	PHYSICAL_DS	0x20	librm.h
3394	REAL_CS	0x28	librm.h
3395	REAL_DS	0x30	librm.h
3396	LONG_CS	0x38	librm.h
3397	LONG_DS	0x40	librm.h
3398	UACCESS_PREFIX_librm	__librm_	librm.h
3399	rm_cs	__use_data16 ( rm_cs )	librm.h
3400	rm_ds	__use_text16 ( rm_ds )	librm.h
3401	LIMITS_H	1	limits.h
3402	CHAR_BIT	8	limits.h
3403	SCHAR_MIN	(-128)	limits.h
3404	SCHAR_MAX	127	limits.h
3405	UCHAR_MAX	255	limits.h
3406	CHAR_MIN	SCHAR_MIN	limits.h
3407	CHAR_MAX	SCHAR_MAX	limits.h
3408	SHRT_MIN	(-32768)	limits.h
3409	SHRT_MAX	32767	limits.h
3410	USHRT_MAX	65535	limits.h
3411	INT_MIN	(-INT_MAX - 1)	limits.h
3412	INT_MAX	2147483647	limits.h
3413	UINT_MAX	4294967295U	limits.h
3414	INT_MAX	2147483647	limits.h
3415	INT_MIN	(-INT_MAX - 1)	limits.h
3416	UINT_MAX	4294967295U	limits.h
3417	LONG_MAX	2147483647	limits.h
3418	LONG_MIN	(-LONG_MAX - 1L)	limits.h
3419	ULONG_MAX	4294967295UL	limits.h
3420	LLONG_MAX	9223372036854775807LL	limits.h
3421	LLONG_MIN	(-LONG_MAX - 1LL)	limits.h
3422	ULLONG_MAX	18446744073709551615ULL	limits.h
3423	MULTIBOOT_HEADER_MAGIC	0x1BADB002	multiboot.h
3424	MB_FLAG_PGALIGN	0x00000001	multiboot.h
3425	MB_FLAG_MEMMAP	0x00000002	multiboot.h
3426	MB_FLAG_VIDMODE	0x00000004	multiboot.h
3427	MB_FLAG_RAW	0x00010000	multiboot.h
3428	MULTIBOOT_BOOTLOADER_MAGIC	0x2BADB002	multiboot.h
3429	MBI_FLAG_MEM	0x00000001	multiboot.h
3430	MBI_FLAG_BOOTDEV	0x00000002	multiboot.h
3431	MBI_FLAG_CMDLINE	0x00000004	multiboot.h
3432	MBI_FLAG_MODS	0x00000008	multiboot.h
3433	MBI_FLAG_AOUT	0x00000010	multiboot.h
3434	MBI_FLAG_ELF	0x00000020	multiboot.h
3435	MBI_FLAG_MMAP	0x00000040	multiboot.h
3436	MBI_FLAG_DRIVES	0x00000080	multiboot.h
3437	MBI_FLAG_CFGTBL	0x00000100	multiboot.h
3438	MBI_FLAG_LOADER	0x00000200	multiboot.h
3439	MBI_FLAG_APM	0x00000400	multiboot.h
3440	MBI_FLAG_VBE	0x00000800	multiboot.h
3441	MBMEM_RAM	1	multiboot.h
3442	IRQ_PIC_CUTOFF	8	pic8259.h
3443	PIC1_ICW1	0x20	pic8259.h
3444	PIC1_OCW2	0x20	pic8259.h
3445	PIC1_OCW3	0x20	pic8259.h
3446	PIC1_ICR	0x20	pic8259.h
3447	PIC1_IRR	0x20	pic8259.h
3448	PIC1_ISR	0x20	pic8259.h
3449	PIC1_ICW2	0x21	pic8259.h
3450	PIC1_ICW3	0x21	pic8259.h
3451	PIC1_ICW4	0x21	pic8259.h
3452	PIC1_IMR	0x21	pic8259.h
3453	PIC2_ICW1	0xa0	pic8259.h
3454	PIC2_OCW2	0xa0	pic8259.h
3455	PIC2_OCW3	0xa0	pic8259.h
3456	PIC2_ICR	0xa0	pic8259.h
3457	PIC2_IRR	0xa0	pic8259.h
3458	PIC2_ISR	0xa0	pic8259.h
3459	PIC2_ICW2	0xa1	pic8259.h
3460	PIC2_ICW3	0xa1	pic8259.h
3461	PIC2_ICW4	0xa1	pic8259.h
3462	PIC2_IMR	0xa1	pic8259.h
3463	OCW3_ID	0x08	pic8259.h
3464	OCW3_READ_IRR	0x03	pic8259.h
3465	OCW3_READ_ISR	0x02	pic8259.h
3466	ICR_EOI_NON_SPECIFIC	0x20	pic8259.h
3467	ICR_EOI_NOP	0x40	pic8259.h
3468	ICR_EOI_SPECIFIC	0x60	pic8259.h
3469	ICR_EOI_SET_PRIORITY	0xc0	pic8259.h
3470	CHAINED_IRQ	2	pic8259.h
3471	IRQ_MAX	15	pic8259.h
3472	IRQ_NONE	-1U	pic8259.h
3473	BIOS_SEG	0xf000	pnpbios.h
3474	ROM_SIGNATURE	0xaa55	pxe.h
3475	UNDI_ROM_ID_SIGNATURE	( ( 'U' << 0 ) + ( 'N' << 8 ) + ( 'D' << 16 ) + ( 'I' << 24 ) )	pxe.h
3476	PCIR_SIGNATURE	( ( 'P' << 0 ) + ( 'C' << 8 ) + ( 'I' << 16 ) + ( 'R' << 24 ) )	pxe.h
3477	PXENV_UNLOAD_STACK	0x0070	pxe_api.h
3478	PXENV_GET_CACHED_INFO	0x0071	pxe_api.h
3479	PXENV_PACKET_TYPE_DHCP_DISCOVER	1	pxe_api.h
3480	PXENV_PACKET_TYPE_DHCP_ACK	2	pxe_api.h
3481	PXENV_PACKET_TYPE_CACHED_REPLY	3	pxe_api.h
3482	BOOTP_REQ	1	pxe_api.h	*< A BOOTP request packet
3483	BOOTP_REP	2	pxe_api.h	*< A BOOTP reply packet
3484	BOOTP_BCAST	0x8000	pxe_api.h
3485	VM_RFC1048	0x63825363L	pxe_api.h	*< DHCP magic cookie
3486	BOOTP_DHCPVEND	1024	pxe_api.h
3487	PXENV_RESTART_TFTP	0x0073	pxe_api.h
3488	PXENV_START_UNDI	0x0000	pxe_api.h
3489	PXENV_STOP_UNDI	0x0015	pxe_api.h
3490	PXENV_START_BASE	0x0075	pxe_api.h
3491	PXENV_STOP_BASE	0x0076	pxe_api.h
3492	PXENV_TFTP_OPEN	0x0020	pxe_api.h
3493	PXENV_TFTP_CLOSE	0x0021	pxe_api.h
3494	PXENV_TFTP_READ	0x0022	pxe_api.h
3495	PXENV_TFTP_READ_FILE	0x0023	pxe_api.h
3496	PXENV_TFTP_GET_FSIZE	0x0025	pxe_api.h
3497	PXENV_UDP_OPEN	0x0030	pxe_api.h
3498	PXENV_UDP_CLOSE	0x0031	pxe_api.h
3499	PXENV_UDP_WRITE	0x0033	pxe_api.h
3500	PXENV_UDP_READ	0x0032	pxe_api.h
3501	PXENV_UNDI_STARTUP	0x0001	pxe_api.h
3502	PXENV_BUS_ISA	0	pxe_api.h	*< ISA bus type
3503	PXENV_BUS_EISA	1	pxe_api.h	*< EISA bus type
3504	PXENV_BUS_MCA	2	pxe_api.h	*< MCA bus type
3505	PXENV_BUS_PCI	3	pxe_api.h	*< PCI bus type
3506	PXENV_BUS_VESA	4	pxe_api.h	*< VESA bus type
3507	PXENV_BUS_PCMCIA	5	pxe_api.h	*< PCMCIA bus type
3508	PXENV_UNDI_CLEANUP	0x0002	pxe_api.h
3509	PXENV_UNDI_INITIALIZE	0x0003	pxe_api.h
3510	PXENV_UNDI_RESET_ADAPTER	0x0004	pxe_api.h
3511	MAXNUM_MCADDR	8	pxe_api.h
3512	PXENV_UNDI_SHUTDOWN	0x0005	pxe_api.h
3513	PXENV_UNDI_OPEN	0x0006	pxe_api.h
3514	FLTR_DIRECTED	0x0001	pxe_api.h
3515	FLTR_BRDCST	0x0002	pxe_api.h
3516	FLTR_PRMSCS	0x0004	pxe_api.h
3517	FLTR_SRC_RTG	0x0008	pxe_api.h
3518	PXENV_UNDI_CLOSE	0x0007	pxe_api.h
3519	PXENV_UNDI_TRANSMIT	0x0008	pxe_api.h
3520	P_UNKNOWN	0	pxe_api.h	*< Media header already filled in
3521	P_IP	1	pxe_api.h	*< IP protocol
3522	P_ARP	2	pxe_api.h	*< ARP protocol
3523	P_RARP	3	pxe_api.h	*< RARP protocol
3524	P_OTHER	4	pxe_api.h	*< Other protocol
3525	XMT_DESTADDR	0x0000	pxe_api.h	*< Unicast packet
3526	XMT_BROADCAST	0x0001	pxe_api.h	*< Broadcast packet
3527	MAX_DATA_BLKS	8	pxe_api.h
3528	PXENV_UNDI_SET_MCAST_ADDRESS	0x0009	pxe_api.h
3529	PXENV_UNDI_SET_STATION_ADDRESS	0x000a	pxe_api.h
3530	PXENV_UNDI_SET_PACKET_FILTER	0x000b	pxe_api.h
3531	PXENV_UNDI_GET_INFORMATION	0x000c	pxe_api.h
3532	ETHER_TYPE	1	pxe_api.h	*< Ethernet (10Mb)
3533	EXP_ETHER_TYPE	2	pxe_api.h	*< Experimental Ethernet (3Mb)
3534	AX25_TYPE	3	pxe_api.h	*< Amateur Radio AX.25
3535	TOKEN_RING_TYPE	4	pxe_api.h	*< Proteon ProNET Token Ring
3536	CHAOS_TYPE	5	pxe_api.h	*< Chaos
3537	IEEE_TYPE	6	pxe_api.h	*< IEEE 802 Networks
3538	ARCNET_TYPE	7	pxe_api.h	*< ARCNET
3539	PXENV_UNDI_GET_STATISTICS	0x000d	pxe_api.h
3540	PXENV_UNDI_CLEAR_STATISTICS	0x000e	pxe_api.h
3541	PXENV_UNDI_INITIATE_DIAGS	0x000f	pxe_api.h
3542	PXENV_UNDI_FORCE_INTERRUPT	0x0010	pxe_api.h
3543	PXENV_UNDI_GET_MCAST_ADDRESS	0x0011	pxe_api.h
3544	PXENV_UNDI_GET_NIC_TYPE	0x0012	pxe_api.h
3545	PCI_NIC	2	pxe_api.h	*< PCI network card
3546	PnP_NIC	3	pxe_api.h	*< ISAPnP network card
3547	CardBus_NIC	4	pxe_api.h	*< CardBus network card
3548	PXENV_UNDI_GET_IFACE_INFO	0x0013	pxe_api.h
3549	SUPPORTED_BROADCAST	0x0001	pxe_api.h
3550	SUPPORTED_MULTICAST	0x0002	pxe_api.h
3551	SUPPORTED_GROUP	0x0004	pxe_api.h
3552	SUPPORTED_PROMISCUOUS	0x0008	pxe_api.h
3553	SUPPORTED_SET_STATION_ADDRESS	0x0010	pxe_api.h
3554	SUPPORTED_DIAGNOSTICS	0x0040	pxe_api.h
3555	SUPPORTED_RESET	0x0400	pxe_api.h
3556	SUPPORTED_OPEN_CLOSE	0x0800	pxe_api.h
3557	SUPPORTED_IRQ	0x1000	pxe_api.h
3558	PXENV_UNDI_GET_STATE	0x0015	pxe_api.h
3559	PXE_UNDI_GET_STATE_STARTED	1	pxe_api.h
3560	PXE_UNDI_GET_STATE_INITIALIZED	2	pxe_api.h
3561	PXE_UNDI_GET_STATE_OPENED	3	pxe_api.h
3562	PXENV_UNDI_ISR	0x0014	pxe_api.h
3563	PXENV_UNDI_ISR_IN_START	1	pxe_api.h
3564	PXENV_UNDI_ISR_IN_PROCESS	2	pxe_api.h
3565	PXENV_UNDI_ISR_IN_GET_NEXT	3	pxe_api.h
3566	PXENV_UNDI_ISR_OUT_OURS	0	pxe_api.h
3567	PXENV_UNDI_ISR_OUT_NOT_OURS	1	pxe_api.h
3568	PXENV_UNDI_ISR_OUT_DONE	0	pxe_api.h
3569	PXENV_UNDI_ISR_OUT_TRANSMIT	2	pxe_api.h
3570	PXENV_UNDI_ISR_OUT_RECEIVE	3	pxe_api.h
3571	PXENV_UNDI_ISR_OUT_BUSY	4	pxe_api.h
3572	P_DIRECTED	0	pxe_api.h
3573	P_BROADCAST	1	pxe_api.h
3574	P_MULTICAST	2	pxe_api.h
3575	PXENV_FILE_OPEN	0x00e0	pxe_api.h
3576	PXENV_FILE_CLOSE	0x00e1	pxe_api.h
3577	PXENV_FILE_SELECT	0x00e2	pxe_api.h
3578	RDY_READ	0x0001	pxe_api.h
3579	PXENV_FILE_READ	0x00e3	pxe_api.h
3580	PXENV_GET_FILE_SIZE	0x00e4	pxe_api.h
3581	PXENV_FILE_EXEC	0x00e5	pxe_api.h
3582	PXENV_FILE_API_CHECK	0x00e6	pxe_api.h
3583	PXENV_FILE_EXIT_HOOK	0x00e7	pxe_api.h
3584	PXE_LOAD_SEGMENT	0	pxe_call.h
3585	PXE_LOAD_OFFSET	0x7c00	pxe_call.h
3586	PXE_LOAD_PHYS	( ( PXE_LOAD_SEGMENT << 4 ) + PXE_LOAD_OFFSET )	pxe_call.h
3587	ppxe	__use_text16 ( ppxe )	pxe_call.h
3588	pxenv	__use_text16 ( pxenv )	pxe_call.h
3589	PXENV_EXIT_SUCCESS	0x0000	pxe_types.h	*< No error occurred
3590	PXENV_EXIT_FAILURE	0x0001	pxe_types.h	*< An error occurred
3591	MAC_ADDR_LEN	16	pxe_types.h
3592	CF	( 1 << 0 )	registers.h
3593	PF	( 1 << 2 )	registers.h
3594	AF	( 1 << 4 )	registers.h
3595	ZF	( 1 << 6 )	registers.h
3596	SF	( 1 << 7 )	registers.h
3597	OF	( 1 << 11 )	registers.h
3598	UNDI_NO_PCI_BUSDEVFN	0xffff	undi.h
3599	UNDI_NO_ISAPNP_CSN	0xffff	undi.h
3600	UNDI_NO_ISAPNP_READ_PORT	0xffff	undi.h
3601	UNDI_FL_STARTED	0x0001	undi.h
3602	UNDI_FL_INITIALIZED	0x0002	undi.h
3603	UNDI_FL_KEEP_ALL	0x0004	undi.h
3604	preloaded_undi	__use_data16 ( preloaded_undi )	undipreload.h
3605	VGA_H_INCL	1	vga.h
3606	u8	unsigned char	vga.h
3607	u16	unsigned short	vga.h
3608	u32	unsigned int	vga.h
3609	__u32	u32	vga.h
3610	VERROR	-1	vga.h
3611	CHAR_HEIGHT	16	vga.h
3612	LINES	25	vga.h
3613	COLS	80	vga.h
3614	SYNC_HOR_HIGH_ACT	1	vga.h	horizontal sync high active
3615	SYNC_VERT_HIGH_ACT	2	vga.h	vertical sync high active
3616	SYNC_EXT	4	vga.h	external sync
3617	SYNC_COMP_HIGH_ACT	8	vga.h	composite sync high active
3618	SYNC_BROADCAST	16	vga.h	broadcast video timings
3619	SYNC_ON_GREEN	32	vga.h	sync on green
3620	VMODE_NONINTERLACED	0	vga.h	non interlaced
3621	VMODE_INTERLACED	1	vga.h	interlaced
3622	VMODE_DOUBLE	2	vga.h	double scan
3623	VMODE_MASK	255	vga.h
3624	VMODE_YWRAP	256	vga.h	ywrap instead of panning
3625	VMODE_SMOOTH_XPAN	512	vga.h	smooth xpan possible (internally used)
3626	VMODE_CONUPDATE	512	vga.h	don't update x/yoffset
3627	CRT_DC	0x3D5	vga.h	CRT Controller Data Register - color emulation
3628	CRT_DM	0x3B5	vga.h	CRT Controller Data Register - mono emulation
3629	ATT_R	0x3C1	vga.h	Attribute Controller Data Read Register
3630	GRA_D	0x3CF	vga.h	Graphics Controller Data Register
3631	SEQ_D	0x3C5	vga.h	Sequencer Data Register
3632	MIS_R	0x3CC	vga.h	Misc Output Read Register
3633	MIS_W	0x3C2	vga.h	Misc Output Write Register
3634	IS1_RC	0x3DA	vga.h	Input Status Register 1 - color emulation
3635	IS1_RM	0x3BA	vga.h	Input Status Register 1 - mono emulation
3636	PEL_D	0x3C9	vga.h	PEL Data Register
3637	PEL_MSK	0x3C6	vga.h	PEL mask register
3638	GRA_E0	0x3CC	vga.h	Graphics enable processor 0
3639	GRA_E1	0x3CA	vga.h	Graphics enable processor 1
3640	CRT_IC	0x3D4	vga.h	CRT Controller Index - color emulation
3641	CRT_IM	0x3B4	vga.h	CRT Controller Index - mono emulation
3642	ATT_IW	0x3C0	vga.h	Attribute Controller Index & Data Write Register
3643	GRA_I	0x3CE	vga.h	Graphics Controller Index
3644	SEQ_I	0x3C4	vga.h	Sequencer Index
3645	PEL_IW	0x3C8	vga.h	PEL Write Index
3646	PEL_IR	0x3C7	vga.h	PEL Read Index
3647	CRTC_C	25	vga.h	25 CRT Controller Registers sequentially set
3648	ATT_C	21	vga.h	21 Attribute Controller Registers
3649	GRA_C	9	vga.h	9 Graphics Controller Registers
3650	SEQ_C	5	vga.h	5 Sequencer Registers
3651	MIS_C	1	vga.h	1 Misc Output Register
3652	CRTC_H_TOTAL	0	vga.h
3653	CRTC_H_DISP	1	vga.h
3654	CRTC_H_BLANK_START	2	vga.h
3655	CRTC_H_BLANK_END	3	vga.h
3656	CRTC_H_SYNC_START	4	vga.h
3657	CRTC_H_SYNC_END	5	vga.h
3658	CRTC_V_TOTAL	6	vga.h
3659	CRTC_OVERFLOW	7	vga.h
3660	CRTC_PRESET_ROW	8	vga.h
3661	CRTC_MAX_SCAN	9	vga.h
3662	CRTC_CURSOR_START	0x0A	vga.h
3663	CRTC_CURSOR_END	0x0B	vga.h
3664	CRTC_START_HI	0x0C	vga.h
3665	CRTC_START_LO	0x0D	vga.h
3666	CRTC_CURSOR_HI	0x0E	vga.h
3667	CRTC_CURSOR_LO	0x0F	vga.h
3668	CRTC_V_SYNC_START	0x10	vga.h
3669	CRTC_V_SYNC_END	0x11	vga.h
3670	CRTC_V_DISP_END	0x12	vga.h
3671	CRTC_OFFSET	0x13	vga.h
3672	CRTC_UNDERLINE	0x14	vga.h
3673	CRTC_V_BLANK_START	0x15	vga.h
3674	CRTC_V_BLANK_END	0x16	vga.h
3675	CRTC_MODE	0x17	vga.h
3676	CRTC_LINE_COMPARE	0x18	vga.h
3677	ATC_MODE	0x10	vga.h
3678	ATC_OVERSCAN	0x11	vga.h
3679	ATC_PLANE_ENABLE	0x12	vga.h
3680	ATC_PEL	0x13	vga.h
3681	ATC_COLOR_PAGE	0x14	vga.h
3682	SEQ_CLOCK_MODE	0x01	vga.h
3683	SEQ_PLANE_WRITE	0x02	vga.h
3684	SEQ_CHARACTER_MAP	0x03	vga.h
3685	SEQ_MEMORY_MODE	0x04	vga.h
3686	GDC_SR_VALUE	0x00	vga.h
3687	GDC_SR_ENABLE	0x01	vga.h
3688	GDC_COMPARE_VALUE	0x02	vga.h
3689	GDC_DATA_ROTATE	0x03	vga.h
3690	GDC_PLANE_READ	0x04	vga.h
3691	GDC_MODE	0x05	vga.h
3692	GDC_MISC	0x06	vga.h
3693	GDC_COMPARE_MASK	0x07	vga.h
3694	GDC_BIT_MASK	0x08	vga.h
3695	VGA_ATTR_CLR_RED	0x4	vga.h
3696	VGA_ATTR_CLR_GRN	0x2	vga.h
3697	VGA_ATTR_CLR_BLU	0x1	vga.h
3698	VGA_ATTR_CLR_YEL	(VGA_ATTR_CLR_RED \| VGA_ATTR_CLR_GRN)	vga.h
3699	VGA_ATTR_CLR_CYN	(VGA_ATTR_CLR_GRN \| VGA_ATTR_CLR_BLU)	vga.h
3700	VGA_ATTR_CLR_MAG	(VGA_ATTR_CLR_BLU \| VGA_ATTR_CLR_RED)	vga.h
3701	VGA_ATTR_CLR_BLK	0	vga.h
3702	VGA_ATTR_CLR_WHT	(VGA_ATTR_CLR_RED \| VGA_ATTR_CLR_GRN \| VGA_ATTR_CLR_BLU)	vga.h
3703	VGA_ATTR_BNK	0x80	vga.h
3704	VGA_ATTR_ITN	0x08	vga.h
3705	__asmcall	__attribute__ (( cdecl, regparm(0) ))	compiler.h
3706	__libgcc	__attribute__ (( cdecl ))	compiler.h
3707	X86_FEATURE_FPU	0	cpu.h	Onboard FPU
3708	X86_FEATURE_VME	1	cpu.h	Virtual Mode Extensions
3709	X86_FEATURE_DE	2	cpu.h	Debugging Extensions
3710	X86_FEATURE_PSE	3	cpu.h	Page Size Extensions
3711	X86_FEATURE_TSC	4	cpu.h	Time Stamp Counter
3712	X86_FEATURE_MSR	5	cpu.h	Model-Specific Registers, RDMSR, WRMSR
3713	X86_FEATURE_PAE	6	cpu.h	Physical Address Extensions
3714	X86_FEATURE_MCE	7	cpu.h	Machine Check Architecture
3715	X86_FEATURE_CX8	8	cpu.h	CMPXCHG8 instruction
3716	X86_FEATURE_APIC	9	cpu.h	Onboard APIC
3717	X86_FEATURE_SEP	11	cpu.h	SYSENTER/SYSEXIT
3718	X86_FEATURE_MTRR	12	cpu.h	Memory Type Range Registers
3719	X86_FEATURE_PGE	13	cpu.h	Page Global Enable
3720	X86_FEATURE_MCA	14	cpu.h	Machine Check Architecture
3721	X86_FEATURE_CMOV	15	cpu.h	CMOV instruction (FCMOVCC and FCOMI too if FPU present)
3722	X86_FEATURE_PAT	16	cpu.h	Page Attribute Table
3723	X86_FEATURE_PSE36	17	cpu.h	36-bit PSEs
3724	X86_FEATURE_PN	18	cpu.h	Processor serial number
3725	X86_FEATURE_CLFLSH	19	cpu.h	Supports the CLFLUSH instruction
3726	X86_FEATURE_DTES	21	cpu.h	Debug Trace Store
3727	X86_FEATURE_ACPI	22	cpu.h	ACPI via MSR
3728	X86_FEATURE_MMX	23	cpu.h	Multimedia Extensions
3729	X86_FEATURE_FXSR	24	cpu.h	FXSAVE and FXRSTOR instructions (fast save and restore
3730	X86_FEATURE_XMM	25	cpu.h	Streaming SIMD Extensions
3731	X86_FEATURE_XMM2	26	cpu.h	Streaming SIMD Extensions-2
3732	X86_FEATURE_SELFSNOOP	27	cpu.h	CPU self snoop
3733	X86_FEATURE_HT	28	cpu.h	Hyper-Threading
3734	X86_FEATURE_ACC	29	cpu.h	Automatic clock control
3735	X86_FEATURE_IA64	30	cpu.h	IA-64 processor
3736	X86_FEATURE_SYSCALL	11	cpu.h	SYSCALL/SYSRET
3737	X86_FEATURE_MMXEXT	22	cpu.h	AMD MMX extensions
3738	X86_FEATURE_LM	29	cpu.h	Long Mode (x86-64)
3739	X86_FEATURE_3DNOWEXT	30	cpu.h	AMD 3DNow! extensions
3740	X86_FEATURE_3DNOW	31	cpu.h	3DNow!
3741	X86_EFLAGS_CF	0x00000001	cpu.h	Carry Flag
3742	X86_EFLAGS_PF	0x00000004	cpu.h	Parity Flag
3743	X86_EFLAGS_AF	0x00000010	cpu.h	Auxillary carry Flag
3744	X86_EFLAGS_ZF	0x00000040	cpu.h	Zero Flag
3745	X86_EFLAGS_SF	0x00000080	cpu.h	Sign Flag
3746	X86_EFLAGS_TF	0x00000100	cpu.h	Trap Flag
3747	X86_EFLAGS_IF	0x00000200	cpu.h	Interrupt Flag
3748	X86_EFLAGS_DF	0x00000400	cpu.h	Direction Flag
3749	X86_EFLAGS_OF	0x00000800	cpu.h	Overflow Flag
3750	X86_EFLAGS_IOPL	0x00003000	cpu.h	IOPL mask
3751	X86_EFLAGS_NT	0x00004000	cpu.h	Nested Task
3752	X86_EFLAGS_RF	0x00010000	cpu.h	Resume Flag
3753	X86_EFLAGS_VM	0x00020000	cpu.h	Virtual Mode
3754	X86_EFLAGS_AC	0x00040000	cpu.h	Alignment Check
3755	X86_EFLAGS_VIF	0x00080000	cpu.h	Virtual Interrupt Flag
3756	X86_EFLAGS_VIP	0x00100000	cpu.h	Virtual Interrupt Pending
3757	X86_EFLAGS_ID	0x00200000	cpu.h	CPUID detection flag
3758	ELTORITO_PLATFORM	ELTORITO_PLATFORM_X86	eltorito.h
3759	__BYTE_ORDER	__LITTLE_ENDIAN	endian.h
3760	ERRFILE_memtop_umalloc	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00000000 )	errfile.h
3761	ERRFILE_memmap	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00010000 )	errfile.h
3762	ERRFILE_pnpbios	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00020000 )	errfile.h
3763	ERRFILE_bios_smbios	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00030000 )	errfile.h
3764	ERRFILE_biosint	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00040000 )	errfile.h
3765	ERRFILE_int13	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00050000 )	errfile.h
3766	ERRFILE_pxeparent	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00060000 )	errfile.h
3767	ERRFILE_bootsector	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00000000 )	errfile.h
3768	ERRFILE_bzimage	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00010000 )	errfile.h
3769	ERRFILE_eltorito	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00020000 )	errfile.h
3770	ERRFILE_multiboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00030000 )	errfile.h
3771	ERRFILE_nbi	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00040000 )	errfile.h
3772	ERRFILE_pxe_image	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00050000 )	errfile.h
3773	ERRFILE_elfboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00060000 )	errfile.h
3774	ERRFILE_comboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00070000 )	errfile.h
3775	ERRFILE_com32	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00080000 )	errfile.h
3776	ERRFILE_comboot_resolv	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00090000 )	errfile.h
3777	ERRFILE_comboot_call	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x000a0000 )	errfile.h
3778	ERRFILE_undi	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00000000 )	errfile.h
3779	ERRFILE_undiload	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00010000 )	errfile.h
3780	ERRFILE_undinet	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00020000 )	errfile.h
3781	ERRFILE_undionly	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00030000 )	errfile.h
3782	ERRFILE_undirom	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00040000 )	errfile.h
3783	ERRFILE_timer_rdtsc	( ERRFILE_ARCH \| ERRFILE_DRIVER \| 0x00000000 )	errfile.h
3784	ERRFILE_timer_bios	( ERRFILE_ARCH \| ERRFILE_DRIVER \| 0x00010000 )	errfile.h
3785	ABFT_SIG	"aBFT"	abft.h
3786	NAP_PREFIX_pcbios	__pcbios_	bios_nap.h
3787	SMBIOS_PREFIX_pcbios	__pcbios_	bios_smbios.h
3788	TIMER_PREFIX_pcbios	__pcbios_	bios_timer.h
3789	IBFT_SIG	"iBFT"	ibft.h
3790	IBFT_STRUCTURE_ID_CONTROL	0x01	ibft.h
3791	IBFT_FL_CONTROL_SINGLE_LOGIN_ON	0x01	ibft.h
3792	IBFT_STRUCTURE_ID_INITIATOR	0x02	ibft.h
3793	IBFT_FL_INITIATOR_BLOCK_VALID	0x01	ibft.h
3794	IBFT_FL_INITIATOR_FIRMWARE_BOOT	0x02	ibft.h
3795	IBFT_STRUCTURE_ID_NIC	0x03	ibft.h
3796	IBFT_FL_NIC_BLOCK_VALID	0x01	ibft.h
3797	IBFT_FL_NIC_FIRMWARE_BOOT_SELEC	0x02	ibft.h
3798	IBFT_FL_NIC_GLOBAL	0x04	ibft.h
3799	IBFT_STRUCTURE_ID_TARGET	0x04	ibft.h
3800	IBFT_FL_TARGET_BLOCK_VALID	0x01	ibft.h
3801	IBFT_FL_TARGET_FIRMWARE_BOOT_SE	0x02	ibft.h
3802	IBFT_FL_TARGET_USE_CHAP	0x04	ibft.h
3803	IBFT_FL_TARGET_USE_RCHAP	0x08	ibft.h
3804	IBFT_CHAP_NONE	0	ibft.h	*< No CHAP authentication
3805	IBFT_CHAP_ONE_WAY	1	ibft.h	*< One-way CHAP
3806	IBFT_CHAP_MUTUAL	2	ibft.h	*< Mutual CHAP
3807	IBFT_STRINGS_SIZE	384	ibft.h
3808	UMALLOC_PREFIX_memtop	__memtop_	memtop_umalloc.h
3809	TIMER_PREFIX_rdtsc	__rdtsc_	rdtsc_timer.h
3810	TSC_SHIFT	8	rdtsc_timer.h
3811	SBFT_SIG	"sBFT"	sbft.h
3812	IOAPI_PREFIX_x86	__x86_	x86_io.h
3813	PCIAPI_PREFIX_pcbios	__pcbios_	pcibios.h
3814	PCIBIOS_INSTALLATION_CHECK	0xb1010000	pcibios.h
3815	PCIBIOS_READ_CONFIG_BYTE	0xb1080000	pcibios.h
3816	PCIBIOS_READ_CONFIG_WORD	0xb1090000	pcibios.h
3817	PCIBIOS_READ_CONFIG_DWORD	0xb10a0000	pcibios.h
3818	PCIBIOS_WRITE_CONFIG_BYTE	0xb10b0000	pcibios.h
3819	PCIBIOS_WRITE_CONFIG_WORD	0xb10c0000	pcibios.h
3820	PCIBIOS_WRITE_CONFIG_DWORD	0xb10d0000	pcibios.h
3821	PCIAPI_PREFIX_direct	__direct_	pcidirect.h
3822	PCIDIRECT_CONFIG_ADDRESS	0xcf8	pcidirect.h
3823	PCIDIRECT_CONFIG_DATA	0xcfc	pcidirect.h
3824	NAP_PREFIX_efix86	__efix86_	efix86_nap.h
3825	LIMITS_H	1	limits.h
3826	CHAR_BIT	8	limits.h
3827	SCHAR_MIN	(-128)	limits.h
3828	SCHAR_MAX	127	limits.h
3829	UCHAR_MAX	255	limits.h
3830	CHAR_MIN	SCHAR_MIN	limits.h
3831	CHAR_MAX	SCHAR_MAX	limits.h
3832	SHRT_MIN	(-32768)	limits.h
3833	SHRT_MAX	32767	limits.h
3834	USHRT_MAX	65535	limits.h
3835	INT_MIN	(-INT_MAX - 1)	limits.h
3836	INT_MAX	2147483647	limits.h
3837	UINT_MAX	4294967295U	limits.h
3838	INT_MAX	2147483647	limits.h
3839	INT_MIN	(-INT_MAX - 1)	limits.h
3840	UINT_MAX	4294967295U	limits.h
3841	LONG_MAX	9223372036854775807L	limits.h
3842	LONG_MIN	(-LONG_MAX - 1L)	limits.h
3843	ULONG_MAX	18446744073709551615UL	limits.h
3844	LLONG_MAX	9223372036854775807LL	limits.h
3845	LLONG_MIN	(-LONG_MAX - 1LL)	limits.h
3846	ULLONG_MAX	18446744073709551615ULL	limits.h
3847	__asmcall	__attribute__ (( regparm(0) ))	compiler.h
3848	__BYTE_ORDER	__LITTLE_ENDIAN	endian.h
3849	PRODUCT_NAME	""	general.h
3850	PRODUCT_SHORT_NAME	"gPXE"	general.h
3851	BANNER_TIMEOUT	0	general.h	Tenths of a second for which the shell
3852	COM1	0x3f8	serial.h
3853	COM2	0x2f8	serial.h
3854	COM3	0x3e8	serial.h
3855	COM4	0x2e8	serial.h
3856	COMCONSOLE	COM1	serial.h	I/O port address
3857	COMSPEED	115200	serial.h	Baud rate
3858	COMDATA	8	serial.h	Data bits
3859	COMPARITY	0	serial.h	Parity: 0=None, 1=Odd, 2=Even
3860	COMSTOP	1	serial.h	Stop bits
3861	BIGINT_M_OFFSET	0	bigint_impl.h	*< Normal modulo offset.
3862	BIGINT_P_OFFSET	1	bigint_impl.h	*< p modulo offset.
3863	BIGINT_Q_OFFSET	2	bigint_impl.h	*< q module offset.
3864	BIGINT_NUM_MODS	3	bigint_impl.h	*< The number of modulus constants used.
3865	BIGINT_NUM_MODS	1	bigint_impl.h
3866	COMP_RADIX	4294967296i64	bigint_impl.h
3867	COMP_BIG_MSB	0x8000000000000000i64	bigint_impl.h
3868	COMP_RADIX	4294967296ULL	bigint_impl.h	*< Max component + 1
3869	COMP_BIG_MSB	0x8000000000000000ULL	bigint_impl.h	*< (Max dbl comp + 1)/ 2
3870	COMP_BIT_SIZE	32	bigint_impl.h	*< Number of bits in a component.
3871	COMP_BYTE_SIZE	4	bigint_impl.h	*< Number of bytes in a component.
3872	COMP_NUM_NIBBLES	8	bigint_impl.h	*< Used For diagnostics only.
3873	PERMANENT	0x7FFF55AA	bigint_impl.h	*< A magic number for permanents.
3874	V1	v->comps[v->size-1]	bigint_impl.h	*< v1 for division
3875	V2	v->comps[v->size-2]	bigint_impl.h	*< v2 for division
3876	CONFIG_SSL_CERT_VERIFICATION	1	os_port.h
3877	CONFIG_SSL_MAX_CERTS	1	os_port.h
3878	CONFIG_X509_MAX_CA_CERTS	1	os_port.h
3879	CONFIG_SSL_EXPIRY_TIME	24	os_port.h
3880	CONFIG_SSL_ENABLE_CLIENT	1	os_port.h
3881	CONFIG_BIGINT_CLASSICAL	1	os_port.h
3882	ARBEL_NUM_PORTS	2	arbel.h
3883	ARBEL_PORT_BASE	1	arbel.h
3884	ARBEL_PCI_CONFIG_BAR	PCI_BASE_ADDRESS_0	arbel.h
3885	ARBEL_PCI_CONFIG_BAR_SIZE	0x100000	arbel.h
3886	ARBEL_PCI_UAR_BAR	PCI_BASE_ADDRESS_2	arbel.h
3887	ARBEL_PCI_UAR_IDX	1	arbel.h
3888	ARBEL_PCI_UAR_SIZE	0x1000	arbel.h
3889	ARBEL_UAR_RES_NONE	0x00	arbel.h
3890	ARBEL_UAR_RES_CQ_CI	0x01	arbel.h
3891	ARBEL_UAR_RES_CQ_ARM	0x02	arbel.h
3892	ARBEL_UAR_RES_SQ	0x03	arbel.h
3893	ARBEL_UAR_RES_RQ	0x04	arbel.h
3894	ARBEL_UAR_RES_GROUP_SEP	0x07	arbel.h
3895	ARBEL_OPCODE_SEND	0x0a	arbel.h
3896	ARBEL_OPCODE_RECV_ERROR	0xfe	arbel.h
3897	ARBEL_OPCODE_SEND_ERROR	0xff	arbel.h
3898	ARBEL_HCR_QUERY_DEV_LIM	0x0003	arbel.h
3899	ARBEL_HCR_QUERY_FW	0x0004	arbel.h
3900	ARBEL_HCR_INIT_HCA	0x0007	arbel.h
3901	ARBEL_HCR_CLOSE_HCA	0x0008	arbel.h
3902	ARBEL_HCR_INIT_IB	0x0009	arbel.h
3903	ARBEL_HCR_CLOSE_IB	0x000a	arbel.h
3904	ARBEL_HCR_SW2HW_MPT	0x000d	arbel.h
3905	ARBEL_HCR_MAP_EQ	0x0012	arbel.h
3906	ARBEL_HCR_SW2HW_EQ	0x0013	arbel.h
3907	ARBEL_HCR_HW2SW_EQ	0x0014	arbel.h
3908	ARBEL_HCR_SW2HW_CQ	0x0016	arbel.h
3909	ARBEL_HCR_HW2SW_CQ	0x0017	arbel.h
3910	ARBEL_HCR_RST2INIT_QPEE	0x0019	arbel.h
3911	ARBEL_HCR_INIT2RTR_QPEE	0x001a	arbel.h
3912	ARBEL_HCR_RTR2RTS_QPEE	0x001b	arbel.h
3913	ARBEL_HCR_RTS2RTS_QPEE	0x001c	arbel.h
3914	ARBEL_HCR_2RST_QPEE	0x0021	arbel.h
3915	ARBEL_HCR_MAD_IFC	0x0024	arbel.h
3916	ARBEL_HCR_READ_MGM	0x0025	arbel.h
3917	ARBEL_HCR_WRITE_MGM	0x0026	arbel.h
3918	ARBEL_HCR_MGID_HASH	0x0027	arbel.h
3919	ARBEL_HCR_RUN_FW	0x0ff6	arbel.h
3920	ARBEL_HCR_DISABLE_LAM	0x0ff7	arbel.h
3921	ARBEL_HCR_ENABLE_LAM	0x0ff8	arbel.h
3922	ARBEL_HCR_UNMAP_ICM	0x0ff9	arbel.h
3923	ARBEL_HCR_MAP_ICM	0x0ffa	arbel.h
3924	ARBEL_HCR_UNMAP_ICM_AUX	0x0ffb	arbel.h
3925	ARBEL_HCR_MAP_ICM_AUX	0x0ffc	arbel.h
3926	ARBEL_HCR_SET_ICM_SIZE	0x0ffd	arbel.h
3927	ARBEL_HCR_UNMAP_FA	0x0ffe	arbel.h
3928	ARBEL_HCR_MAP_FA	0x0fff	arbel.h
3929	ARBEL_ST_UD	0x03	arbel.h
3930	ARBEL_MTU_2048	0x04	arbel.h
3931	ARBEL_NO_EQ	64	arbel.h
3932	ARBEL_INVALID_LKEY	0x00000100UL	arbel.h
3933	ARBEL_PAGE_SIZE	4096	arbel.h
3934	ARBEL_DB_POST_SND_OFFSET	0x10	arbel.h
3935	ARBEL_QPEE_OPT_PARAM_QKEY	0x00000020UL	arbel.h
3936	ARBEL_MAP_EQ	( 0UL << 31 )	arbel.h
3937	ARBEL_UNMAP_EQ	( 1UL << 31 )	arbel.h
3938	ARBEL_EV_PORT_STATE_CHANGE	0x09	arbel.h
3939	ARBEL_MAX_GATHER	1	arbel.h
3940	ARBEL_MAX_SCATTER	1	arbel.h
3941	ARBEL_SEND_WQE_ALIGN	128	arbel.h
3942	ARBEL_RECV_WQE_ALIGN	64	arbel.h
3943	ARBEL_MAX_QPS	8	arbel.h
3944	ARBEL_QPN_BASE	0x550000	arbel.h
3945	ARBEL_MAX_CQS	8	arbel.h
3946	ARBEL_MAX_EQS	64	arbel.h
3947	ARBEL_NUM_EQES	4	arbel.h
3948	ARBEL_GLOBAL_PD	0x123456	arbel.h
3949	ARBEL_MKEY_PREFIX	0x77000000UL	arbel.h
3950	ARBEL_HCR_BASE	0x80680	arbel.h
3951	ARBEL_HCR_MAX_WAIT_MS	2000	arbel.h
3952	ARBEL_MBOX_ALIGN	4096	arbel.h
3953	ARBEL_MBOX_SIZE	512	arbel.h
3954	ARBEL_HCR_IN_MBOX	0x00001000UL	arbel.h
3955	ARBEL_HCR_OUT_MBOX	0x00002000UL	arbel.h
3956	ARBEL_MAX_DOORBELL_RECORDS	512	arbel.h
3957	ARBEL_GROUP_SEPARATOR_DOORBELL	( ARBEL_MAX_CQS + ARBEL_MAX_QPS )	arbel.h
3958	HERMON_MAX_PORTS	2	hermon.h
3959	HERMON_PORT_BASE	1	hermon.h
3960	HERMON_PCI_CONFIG_BAR	PCI_BASE_ADDRESS_0	hermon.h
3961	HERMON_PCI_CONFIG_BAR_SIZE	0x100000	hermon.h
3962	HERMON_PCI_UAR_BAR	PCI_BASE_ADDRESS_2	hermon.h
3963	HERMON_RESET_OFFSET	0x0f0010	hermon.h
3964	HERMON_RESET_MAGIC	0x01000000UL	hermon.h
3965	HERMON_RESET_WAIT_TIME_MS	1000	hermon.h
3966	HERMON_OPCODE_NOP	0x00	hermon.h
3967	HERMON_OPCODE_SEND	0x0a	hermon.h
3968	HERMON_OPCODE_RECV_ERROR	0xfe	hermon.h
3969	HERMON_OPCODE_SEND_ERROR	0xff	hermon.h
3970	HERMON_HCR_QUERY_DEV_CAP	0x0003	hermon.h
3971	HERMON_HCR_QUERY_FW	0x0004	hermon.h
3972	HERMON_HCR_INIT_HCA	0x0007	hermon.h
3973	HERMON_HCR_CLOSE_HCA	0x0008	hermon.h
3974	HERMON_HCR_INIT_PORT	0x0009	hermon.h
3975	HERMON_HCR_CLOSE_PORT	0x000a	hermon.h
3976	HERMON_HCR_SW2HW_MPT	0x000d	hermon.h
3977	HERMON_HCR_WRITE_MTT	0x0011	hermon.h
3978	HERMON_HCR_MAP_EQ	0x0012	hermon.h
3979	HERMON_HCR_SW2HW_EQ	0x0013	hermon.h
3980	HERMON_HCR_HW2SW_EQ	0x0014	hermon.h
3981	HERMON_HCR_QUERY_EQ	0x0015	hermon.h
3982	HERMON_HCR_SW2HW_CQ	0x0016	hermon.h
3983	HERMON_HCR_HW2SW_CQ	0x0017	hermon.h
3984	HERMON_HCR_RST2INIT_QP	0x0019	hermon.h
3985	HERMON_HCR_INIT2RTR_QP	0x001a	hermon.h
3986	HERMON_HCR_RTR2RTS_QP	0x001b	hermon.h
3987	HERMON_HCR_RTS2RTS_QP	0x001c	hermon.h
3988	HERMON_HCR_2RST_QP	0x0021	hermon.h
3989	HERMON_HCR_QUERY_QP	0x0022	hermon.h
3990	HERMON_HCR_CONF_SPECIAL_QP	0x0023	hermon.h
3991	HERMON_HCR_MAD_IFC	0x0024	hermon.h
3992	HERMON_HCR_READ_MCG	0x0025	hermon.h
3993	HERMON_HCR_WRITE_MCG	0x0026	hermon.h
3994	HERMON_HCR_MGID_HASH	0x0027	hermon.h
3995	HERMON_HCR_SENSE_PORT	0x004d	hermon.h
3996	HERMON_HCR_RUN_FW	0x0ff6	hermon.h
3997	HERMON_HCR_DISABLE_LAM	0x0ff7	hermon.h
3998	HERMON_HCR_ENABLE_LAM	0x0ff8	hermon.h
3999	HERMON_HCR_UNMAP_ICM	0x0ff9	hermon.h
4000	HERMON_HCR_MAP_ICM	0x0ffa	hermon.h
4001	HERMON_HCR_UNMAP_ICM_AUX	0x0ffb	hermon.h
4002	HERMON_HCR_MAP_ICM_AUX	0x0ffc	hermon.h
4003	HERMON_HCR_SET_ICM_SIZE	0x0ffd	hermon.h
4004	HERMON_HCR_UNMAP_FA	0x0ffe	hermon.h
4005	HERMON_HCR_MAP_FA	0x0fff	hermon.h
4006	HERMON_ST_RC	0x00	hermon.h
4007	HERMON_ST_UD	0x03	hermon.h
4008	HERMON_ST_MLX	0x07	hermon.h
4009	HERMON_MTU_2048	0x04	hermon.h
4010	HERMON_INVALID_LKEY	0x00000100UL	hermon.h
4011	HERMON_PAGE_SIZE	4096	hermon.h
4012	HERMON_DB_POST_SND_OFFSET	0x14	hermon.h
4013	HERMON_QP_OPT_PARAM_PM_STATE	0x00000400UL	hermon.h
4014	HERMON_QP_OPT_PARAM_QKEY	0x00000020UL	hermon.h
4015	HERMON_QP_OPT_PARAM_ALT_PATH	0x00000001UL	hermon.h
4016	HERMON_MAP_EQ	( 0UL << 31 )	hermon.h
4017	HERMON_UNMAP_EQ	( 1UL << 31 )	hermon.h
4018	HERMON_EV_PORT_STATE_CHANGE	0x09	hermon.h
4019	HERMON_SCHED_QP0	0x3f	hermon.h
4020	HERMON_SCHED_DEFAULT	0x83	hermon.h
4021	HERMON_PM_STATE_ARMED	0x00	hermon.h
4022	HERMON_PM_STATE_REARM	0x01	hermon.h
4023	HERMON_PM_STATE_MIGRATED	0x03	hermon.h
4024	HERMON_RETRY_MAX	0x07	hermon.h
4025	HERMON_PORT_TYPE_IB	1	hermon.h
4026	HERMON_MAX_GATHER	2	hermon.h
4027	HERMON_MAX_SCATTER	1	hermon.h
4028	HERMON_CMPT_MAX_ENTRIES	( 1 << 24 )	hermon.h
4029	HERMON_UAR_NON_EQ_PAGE	128	hermon.h
4030	HERMON_MAX_MTTS	64	hermon.h
4031	HERMON_SEND_WQE_ALIGN	128	hermon.h
4032	HERMON_RECV_WQE_ALIGN	16	hermon.h
4033	HERMON_NUM_SPECIAL_QPS	8	hermon.h
4034	HERMON_RSVD_SPECIAL_QPS	( ( HERMON_NUM_SPECIAL_QPS << 1 ) - 1 )	hermon.h
4035	HERMON_MAX_QPS	8	hermon.h
4036	HERMON_QPN_RANDOM_MASK	0xfff000	hermon.h
4037	HERMON_MAX_CQS	8	hermon.h
4038	HERMON_MAX_EQS	8	hermon.h
4039	HERMON_NUM_EQES	4	hermon.h
4040	HERMON_GLOBAL_PD	0x123456	hermon.h
4041	HERMON_MKEY_PREFIX	0x77000000UL	hermon.h
4042	HERMON_HCR_BASE	0x80680	hermon.h
4043	HERMON_HCR_MAX_WAIT_MS	2000	hermon.h
4044	HERMON_MBOX_ALIGN	4096	hermon.h
4045	HERMON_MBOX_SIZE	512	hermon.h
4046	HERMON_HCR_IN_MBOX	0x00001000UL	hermon.h
4047	HERMON_HCR_OUT_MBOX	0x00002000UL	hermon.h
4048	LINDA_SENDBUFAVAIL_ALIGN	64	linda.h
4049	LINDA_BAR0_SIZE	0x400000	linda.h
4050	LINDA_GPIO_SCL	0	linda.h
4051	LINDA_GPIO_SDA	1	linda.h
4052	LINDA_EEPROM_GUID_OFFSET	3	linda.h
4053	LINDA_EEPROM_GUID_SIZE	8	linda.h
4054	LINDA_EEPROM_SERIAL_OFFSET	12	linda.h
4055	LINDA_EEPROM_SERIAL_SIZE	12	linda.h
4056	LINDA_MAX_SEND_BUFS	32	linda.h
4057	LINDA_SEND_BUF_SIZE	4096	linda.h
4058	LINDA_NUM_CONTEXTS	5	linda.h
4059	LINDA_EAGER_ARRAY_SIZE_5CTX_0	2048	linda.h
4060	LINDA_EAGER_ARRAY_SIZE_5CTX_OTH	4096	linda.h
4061	LINDA_EAGER_ARRAY_SIZE_9CTX_0	2048	linda.h
4062	LINDA_EAGER_ARRAY_SIZE_9CTX_OTH	2048	linda.h
4063	LINDA_EAGER_ARRAY_SIZE_17CTX_0	2048	linda.h
4064	LINDA_EAGER_ARRAY_SIZE_17CTX_OT	1024	linda.h
4065	LINDA_EAGER_BUFFER_ALIGN	2048	linda.h
4066	LINDA_RECV_HEADER_COUNT	8	linda.h
4067	LINDA_RECV_HEADER_SIZE	96	linda.h
4068	LINDA_RECV_HEADERS_SIZE	( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT )	linda.h
4069	LINDA_RECV_HEADERS_ALIGN	64	linda.h
4070	LINDA_RECV_PAYLOAD_SIZE	2048	linda.h
4071	LINDA_QP_IDETH	0xdead0	linda.h
4072	LINDA_EPB_REQUEST_MAX_WAIT_US	500	linda.h
4073	LINDA_EPB_XACT_MAX_WAIT_US	500	linda.h
4074	LINDA_EPB_CS_SERDES	1	linda.h
4075	LINDA_EPB_CS_UC	2	linda.h
4076	LINDA_EPB_WRITE	0	linda.h
4077	LINDA_EPB_READ	1	linda.h
4078	LINDA_EPB_UC_CHANNEL	6	linda.h
4079	LINDA_EPB_UC_CTL	LINDA_EPB_UC_LOC ( 0 )	linda.h
4080	LINDA_EPB_UC_CTL_WRITE	1	linda.h
4081	LINDA_EPB_UC_CTL_READ	2	linda.h
4082	LINDA_EPB_UC_ADDR_LO	LINDA_EPB_UC_LOC ( 2 )	linda.h
4083	LINDA_EPB_UC_ADDR_HI	LINDA_EPB_UC_LOC ( 3 )	linda.h
4084	LINDA_EPB_UC_DATA	LINDA_EPB_UC_LOC ( 4 )	linda.h
4085	LINDA_EPB_UC_CHUNK_SIZE	64	linda.h
4086	LINDA_TRIM_DONE_MAX_WAIT_MS	1000	linda.h
4087	LINDA_LINK_STATE_MAX_WAIT_US	20	linda.h
4088	QIB_7220_Revision_offset	0x00000000UL	qib_7220_regs.h
4089	QIB_7220_Control_offset	0x00000008UL	qib_7220_regs.h
4090	QIB_7220_PageAlign_offset	0x00000010UL	qib_7220_regs.h
4091	QIB_7220_PortCnt_offset	0x00000018UL	qib_7220_regs.h
4092	QIB_7220_DbgPortSel_offset	0x00000020UL	qib_7220_regs.h
4093	QIB_7220_DebugSigsIntSel_offset	0x00000028UL	qib_7220_regs.h
4094	QIB_7220_SendRegBase_offset	0x00000030UL	qib_7220_regs.h
4095	QIB_7220_UserRegBase_offset	0x00000038UL	qib_7220_regs.h
4096	QIB_7220_CntrRegBase_offset	0x00000040UL	qib_7220_regs.h
4097	QIB_7220_Scratch_offset	0x00000048UL	qib_7220_regs.h
4098	QIB_7220_REG_000050_offset	0x00000050UL	qib_7220_regs.h
4099	QIB_7220_IntBlocked_offset	0x00000060UL	qib_7220_regs.h
4100	QIB_7220_IntMask_offset	0x00000068UL	qib_7220_regs.h
4101	QIB_7220_IntStatus_offset	0x00000070UL	qib_7220_regs.h
4102	QIB_7220_IntClear_offset	0x00000078UL	qib_7220_regs.h
4103	QIB_7220_ErrMask_offset	0x00000080UL	qib_7220_regs.h
4104	QIB_7220_ErrStatus_offset	0x00000088UL	qib_7220_regs.h
4105	QIB_7220_ErrClear_offset	0x00000090UL	qib_7220_regs.h
4106	QIB_7220_HwErrMask_offset	0x00000098UL	qib_7220_regs.h
4107	QIB_7220_HwErrStatus_offset	0x000000a0UL	qib_7220_regs.h
4108	QIB_7220_HwErrClear_offset	0x000000a8UL	qib_7220_regs.h
4109	QIB_7220_HwDiagCtrl_offset	0x000000b0UL	qib_7220_regs.h
4110	QIB_7220_REG_0000B8_offset	0x000000b8UL	qib_7220_regs.h
4111	QIB_7220_IBCStatus_offset	0x000000c0UL	qib_7220_regs.h
4112	QIB_7220_IBCCtrl_offset	0x000000c8UL	qib_7220_regs.h
4113	QIB_7220_EXTStatus_offset	0x000000d0UL	qib_7220_regs.h
4114	QIB_7220_EXTCtrl_offset	0x000000d8UL	qib_7220_regs.h
4115	QIB_7220_GPIOOut_offset	0x000000e0UL	qib_7220_regs.h
4116	QIB_7220_GPIOMask_offset	0x000000e8UL	qib_7220_regs.h
4117	QIB_7220_GPIOStatus_offset	0x000000f0UL	qib_7220_regs.h
4118	QIB_7220_GPIOClear_offset	0x000000f8UL	qib_7220_regs.h
4119	QIB_7220_RcvCtrl_offset	0x00000100UL	qib_7220_regs.h
4120	QIB_7220_RcvBTHQP_offset	0x00000108UL	qib_7220_regs.h
4121	QIB_7220_RcvHdrSize_offset	0x00000110UL	qib_7220_regs.h
4122	QIB_7220_RcvHdrCnt_offset	0x00000118UL	qib_7220_regs.h
4123	QIB_7220_RcvHdrEntSize_offset	0x00000120UL	qib_7220_regs.h
4124	QIB_7220_RcvTIDBase_offset	0x00000128UL	qib_7220_regs.h
4125	QIB_7220_RcvTIDCnt_offset	0x00000130UL	qib_7220_regs.h
4126	QIB_7220_RcvEgrBase_offset	0x00000138UL	qib_7220_regs.h
4127	QIB_7220_RcvEgrCnt_offset	0x00000140UL	qib_7220_regs.h
4128	QIB_7220_RcvBufBase_offset	0x00000148UL	qib_7220_regs.h
4129	QIB_7220_RcvBufSize_offset	0x00000150UL	qib_7220_regs.h
4130	QIB_7220_RxIntMemBase_offset	0x00000158UL	qib_7220_regs.h
4131	QIB_7220_RxIntMemSize_offset	0x00000160UL	qib_7220_regs.h
4132	QIB_7220_RcvPartitionKey_offset	0x00000168UL	qib_7220_regs.h
4133	QIB_7220_RcvQPMulticastPort_off	0x00000170UL	qib_7220_regs.h
4134	QIB_7220_RcvPktLEDCnt_offset	0x00000178UL	qib_7220_regs.h
4135	QIB_7220_IBCDDRCtrl_offset	0x00000180UL	qib_7220_regs.h
4136	QIB_7220_HRTBT_GUID_offset	0x00000188UL	qib_7220_regs.h
4137	QIB_7220_IB_SDTEST_IF_TX_offset	0x00000190UL	qib_7220_regs.h
4138	QIB_7220_IB_SDTEST_IF_RX_offset	0x00000198UL	qib_7220_regs.h
4139	QIB_7220_IBCDDRCtrl2_offset	0x000001a0UL	qib_7220_regs.h
4140	QIB_7220_IBCDDRStatus_offset	0x000001a8UL	qib_7220_regs.h
4141	QIB_7220_JIntReload_offset	0x000001b0UL	qib_7220_regs.h
4142	QIB_7220_IBNCModeCtrl_offset	0x000001b8UL	qib_7220_regs.h
4143	QIB_7220_SendCtrl_offset	0x000001c0UL	qib_7220_regs.h
4144	QIB_7220_SendBufBase_offset	0x000001c8UL	qib_7220_regs.h
4145	QIB_7220_SendBufSize_offset	0x000001d0UL	qib_7220_regs.h
4146	QIB_7220_SendBufCnt_offset	0x000001d8UL	qib_7220_regs.h
4147	QIB_7220_SendBufAvailAddr_offse	0x000001e0UL	qib_7220_regs.h
4148	QIB_7220_TxIntMemBase_offset	0x000001e8UL	qib_7220_regs.h
4149	QIB_7220_TxIntMemSize_offset	0x000001f0UL	qib_7220_regs.h
4150	QIB_7220_SendDmaBase_offset	0x000001f8UL	qib_7220_regs.h
4151	QIB_7220_SendDmaLenGen_offset	0x00000200UL	qib_7220_regs.h
4152	QIB_7220_SendDmaTail_offset	0x00000208UL	qib_7220_regs.h
4153	QIB_7220_SendDmaHead_offset	0x00000210UL	qib_7220_regs.h
4154	QIB_7220_SendDmaHeadAddr_offset	0x00000218UL	qib_7220_regs.h
4155	QIB_7220_SendDmaBufMask0_offset	0x00000220UL	qib_7220_regs.h
4156	QIB_7220_SendDmaStatus_offset	0x00000238UL	qib_7220_regs.h
4157	QIB_7220_SendBufErr0_offset	0x00000240UL	qib_7220_regs.h
4158	QIB_7220_REG_000258_offset	0x00000258UL	qib_7220_regs.h
4159	QIB_7220_AvailUpdCount_offset	0x00000268UL	qib_7220_regs.h
4160	QIB_7220_RcvHdrAddr0_offset	0x00000270UL	qib_7220_regs.h
4161	QIB_7220_REG_0002F8_offset	0x000002f8UL	qib_7220_regs.h
4162	QIB_7220_RcvHdrTailAddr0_offset	0x00000300UL	qib_7220_regs.h
4163	QIB_7220_REG_000388_offset	0x00000388UL	qib_7220_regs.h
4164	QIB_7220_ibsd_epb_access_ctrl_o	0x000003c0UL	qib_7220_regs.h
4165	QIB_7220_ibsd_epb_transaction_r	0x000003c8UL	qib_7220_regs.h
4166	QIB_7220_REG_0003D0_offset	0x000003d0UL	qib_7220_regs.h
4167	QIB_7220_XGXSCfg_offset	0x000003d8UL	qib_7220_regs.h
4168	QIB_7220_IBSerDesCtrl_offset	0x000003e0UL	qib_7220_regs.h
4169	QIB_7220_EEPCtlStat_offset	0x000003e8UL	qib_7220_regs.h
4170	QIB_7220_EEPAddrCmd_offset	0x000003f0UL	qib_7220_regs.h
4171	QIB_7220_EEPData_offset	0x000003f8UL	qib_7220_regs.h
4172	QIB_7220_pciesd_epb_access_ctrl	0x00000400UL	qib_7220_regs.h
4173	QIB_7220_pciesd_epb_transaction	0x00000408UL	qib_7220_regs.h
4174	QIB_7220_efuse_control_reg_offs	0x00000410UL	qib_7220_regs.h
4175	QIB_7220_efuse_rddata0_reg_offs	0x00000418UL	qib_7220_regs.h
4176	QIB_7220_procmon_register_offse	0x00000438UL	qib_7220_regs.h
4177	QIB_7220_PcieRbufTestReg0_offse	0x00000440UL	qib_7220_regs.h
4178	QIB_7220_PcieRBufTestReg1_offse	0x00000448UL	qib_7220_regs.h
4179	QIB_7220_SPC_JTAG_ACCESS_REG_of	0x00000460UL	qib_7220_regs.h
4180	QIB_7220_LAControlReg_offset	0x00000468UL	qib_7220_regs.h
4181	QIB_7220_GPIODebugSelReg_offset	0x00000470UL	qib_7220_regs.h
4182	QIB_7220_DebugPortValueReg_offs	0x00000478UL	qib_7220_regs.h
4183	QIB_7220_SendDmaBufUsed0_offset	0x00000480UL	qib_7220_regs.h
4184	QIB_7220_SendDmaReqTagUsed_offs	0x00000498UL	qib_7220_regs.h
4185	QIB_7220_efuse_pgm_data0_offset	0x000004a0UL	qib_7220_regs.h
4186	QIB_7220_MEM_0004B0_offset	0x000004b0UL	qib_7220_regs.h
4187	QIB_7220_SerDes_DDSRXEQ0_offset	0x00000500UL	qib_7220_regs.h
4188	QIB_7220_MEM_0005F0_offset	0x000005f0UL	qib_7220_regs.h
4189	QIB_7220_LAMemory_offset	0x00000600UL	qib_7220_regs.h
4190	QIB_7220_MEM_0007F0_offset	0x000007f0UL	qib_7220_regs.h
4191	QIB_7220_SendBufAvail0_offset	0x00001000UL	qib_7220_regs.h
4192	QIB_7220_MEM_001028_offset	0x00001028UL	qib_7220_regs.h
4193	QIB_7220_LBIntCnt_offset	0x00013000UL	qib_7220_regs.h
4194	QIB_7220_LBFlowStallCnt_offset	0x00013008UL	qib_7220_regs.h
4195	QIB_7220_TxSDmaDescCnt_offset	0x00013010UL	qib_7220_regs.h
4196	QIB_7220_TxUnsupVLErrCnt_offset	0x00013018UL	qib_7220_regs.h
4197	QIB_7220_TxDataPktCnt_offset	0x00013020UL	qib_7220_regs.h
4198	QIB_7220_TxFlowPktCnt_offset	0x00013028UL	qib_7220_regs.h
4199	QIB_7220_TxDwordCnt_offset	0x00013030UL	qib_7220_regs.h
4200	QIB_7220_TxLenErrCnt_offset	0x00013038UL	qib_7220_regs.h
4201	QIB_7220_TxMaxMinLenErrCnt_offs	0x00013040UL	qib_7220_regs.h
4202	QIB_7220_TxUnderrunCnt_offset	0x00013048UL	qib_7220_regs.h
4203	QIB_7220_TxFlowStallCnt_offset	0x00013050UL	qib_7220_regs.h
4204	QIB_7220_TxDroppedPktCnt_offset	0x00013058UL	qib_7220_regs.h
4205	QIB_7220_RxDroppedPktCnt_offset	0x00013060UL	qib_7220_regs.h
4206	QIB_7220_RxDataPktCnt_offset	0x00013068UL	qib_7220_regs.h
4207	QIB_7220_RxFlowPktCnt_offset	0x00013070UL	qib_7220_regs.h
4208	QIB_7220_RxDwordCnt_offset	0x00013078UL	qib_7220_regs.h
4209	QIB_7220_RxLenErrCnt_offset	0x00013080UL	qib_7220_regs.h
4210	QIB_7220_RxMaxMinLenErrCnt_offs	0x00013088UL	qib_7220_regs.h
4211	QIB_7220_RxICRCErrCnt_offset	0x00013090UL	qib_7220_regs.h
4212	QIB_7220_RxVCRCErrCnt_offset	0x00013098UL	qib_7220_regs.h
4213	QIB_7220_RxFlowCtrlViolCnt_offs	0x000130a0UL	qib_7220_regs.h
4214	QIB_7220_RxVersionErrCnt_offset	0x000130a8UL	qib_7220_regs.h
4215	QIB_7220_RxLinkMalformCnt_offse	0x000130b0UL	qib_7220_regs.h
4216	QIB_7220_RxEBPCnt_offset	0x000130b8UL	qib_7220_regs.h
4217	QIB_7220_RxLPCRCErrCnt_offset	0x000130c0UL	qib_7220_regs.h
4218	QIB_7220_RxBufOvflCnt_offset	0x000130c8UL	qib_7220_regs.h
4219	QIB_7220_RxTIDFullErrCnt_offset	0x000130d0UL	qib_7220_regs.h
4220	QIB_7220_RxTIDValidErrCnt_offse	0x000130d8UL	qib_7220_regs.h
4221	QIB_7220_RxPKeyMismatchCnt_offs	0x000130e0UL	qib_7220_regs.h
4222	QIB_7220_RxP0HdrEgrOvflCnt_offs	0x000130e8UL	qib_7220_regs.h
4223	QIB_7220_IBStatusChangeCnt_offs	0x00013170UL	qib_7220_regs.h
4224	QIB_7220_IBLinkErrRecoveryCnt_o	0x00013178UL	qib_7220_regs.h
4225	QIB_7220_IBLinkDownedCnt_offset	0x00013180UL	qib_7220_regs.h
4226	QIB_7220_IBSymbolErrCnt_offset	0x00013188UL	qib_7220_regs.h
4227	QIB_7220_RxVL15DroppedPktCnt_of	0x00013190UL	qib_7220_regs.h
4228	QIB_7220_RxOtherLocalPhyErrCnt_	0x00013198UL	qib_7220_regs.h
4229	QIB_7220_PcieRetryBufDiagQwordC	0x000131a0UL	qib_7220_regs.h
4230	QIB_7220_ExcessBufferOvflCnt_of	0x000131a8UL	qib_7220_regs.h
4231	QIB_7220_LocalLinkIntegrityErrC	0x000131b0UL	qib_7220_regs.h
4232	QIB_7220_RxVlErrCnt_offset	0x000131b8UL	qib_7220_regs.h
4233	QIB_7220_RxDlidFltrCnt_offset	0x000131c0UL	qib_7220_regs.h
4234	QIB_7220_CNT_0131C8_offset	0x000131c8UL	qib_7220_regs.h
4235	QIB_7220_PSStat_offset	0x00013200UL	qib_7220_regs.h
4236	QIB_7220_PSStart_offset	0x00013208UL	qib_7220_regs.h
4237	QIB_7220_PSInterval_offset	0x00013210UL	qib_7220_regs.h
4238	QIB_7220_PSRcvDataCount_offset	0x00013218UL	qib_7220_regs.h
4239	QIB_7220_PSRcvPktsCount_offset	0x00013220UL	qib_7220_regs.h
4240	QIB_7220_PSXmitDataCount_offset	0x00013228UL	qib_7220_regs.h
4241	QIB_7220_PSXmitPktsCount_offset	0x00013230UL	qib_7220_regs.h
4242	QIB_7220_PSXmitWaitCount_offset	0x00013238UL	qib_7220_regs.h
4243	QIB_7220_CNT_013240_offset	0x00013240UL	qib_7220_regs.h
4244	QIB_7220_RcvEgrArray_offset	0x00014000UL	qib_7220_regs.h
4245	QIB_7220_MEM_038000_offset	0x00038000UL	qib_7220_regs.h
4246	QIB_7220_RcvTIDArray0_offset	0x00053000UL	qib_7220_regs.h
4247	QIB_7220_PIOLaunchFIFO_offset	0x00064000UL	qib_7220_regs.h
4248	QIB_7220_MEM_064480_offset	0x00064480UL	qib_7220_regs.h
4249	QIB_7220_SendPIOpbcCache_offset	0x00064800UL	qib_7220_regs.h
4250	QIB_7220_MEM_064C80_offset	0x00064c80UL	qib_7220_regs.h
4251	QIB_7220_PreLaunchFIFO_offset	0x00065000UL	qib_7220_regs.h
4252	QIB_7220_MEM_065080_offset	0x00065080UL	qib_7220_regs.h
4253	QIB_7220_ScoreBoard_offset	0x00065400UL	qib_7220_regs.h
4254	QIB_7220_MEM_065440_offset	0x00065440UL	qib_7220_regs.h
4255	QIB_7220_DescriptorFIFO_offset	0x00065800UL	qib_7220_regs.h
4256	QIB_7220_MEM_065880_offset	0x00065880UL	qib_7220_regs.h
4257	QIB_7220_RcvBuf1_offset	0x00072000UL	qib_7220_regs.h
4258	QIB_7220_MEM_074800_offset	0x00074800UL	qib_7220_regs.h
4259	QIB_7220_RcvBuf2_offset	0x00075000UL	qib_7220_regs.h
4260	QIB_7220_MEM_076400_offset	0x00076400UL	qib_7220_regs.h
4261	QIB_7220_RcvFlags_offset	0x00077000UL	qib_7220_regs.h
4262	QIB_7220_MEM_078400_offset	0x00078400UL	qib_7220_regs.h
4263	QIB_7220_RcvLookupBuf1_offset	0x00079000UL	qib_7220_regs.h
4264	QIB_7220_MEM_07A400_offset	0x0007a400UL	qib_7220_regs.h
4265	QIB_7220_RcvDMADatBuf_offset	0x0007b000UL	qib_7220_regs.h
4266	QIB_7220_RcvDMAHdrBuf_offset	0x0007b800UL	qib_7220_regs.h
4267	QIB_7220_MiscRXEIntMem_offset	0x0007c000UL	qib_7220_regs.h
4268	QIB_7220_MEM_07D400_offset	0x0007d400UL	qib_7220_regs.h
4269	QIB_7220_PCIERcvBuf_offset	0x00080000UL	qib_7220_regs.h
4270	QIB_7220_PCIERetryBuf_offset	0x00084000UL	qib_7220_regs.h
4271	QIB_7220_PCIERcvBufRdToWrAddr_o	0x00088000UL	qib_7220_regs.h
4272	QIB_7220_PCIECplBuf_offset	0x00090000UL	qib_7220_regs.h
4273	QIB_7220_IBSerDesMappTable_offs	0x00094000UL	qib_7220_regs.h
4274	QIB_7220_MEM_095000_offset	0x00095000UL	qib_7220_regs.h
4275	QIB_7220_SendBuf0_MA_offset	0x00100000UL	qib_7220_regs.h
4276	QIB_7220_MEM_1A0000_offset	0x001a0000UL	qib_7220_regs.h
4277	QIB_7220_RcvHdrTail0_offset	0x00200000UL	qib_7220_regs.h
4278	QIB_7220_RcvHdrHead0_offset	0x00200008UL	qib_7220_regs.h
4279	QIB_7220_RcvEgrIndexTail0_offse	0x00200010UL	qib_7220_regs.h
4280	QIB_7220_RcvEgrIndexHead0_offse	0x00200018UL	qib_7220_regs.h
4281	QIB_7220_MEM_200020_offset	0x00200020UL	qib_7220_regs.h
4282	QIB_7220_RcvHdrTail1_offset	0x00210000UL	qib_7220_regs.h
4283	QIB_7220_RcvHdrHead1_offset	0x00210008UL	qib_7220_regs.h
4284	QIB_7220_RcvEgrIndexTail1_offse	0x00210010UL	qib_7220_regs.h
4285	QIB_7220_RcvEgrIndexHead1_offse	0x00210018UL	qib_7220_regs.h
4286	QIB_7220_MEM_210020_offset	0x00210020UL	qib_7220_regs.h
4287	QIB_7220_RcvHdrTail2_offset	0x00220000UL	qib_7220_regs.h
4288	QIB_7220_RcvHdrHead2_offset	0x00220008UL	qib_7220_regs.h
4289	QIB_7220_RcvEgrIndexTail2_offse	0x00220010UL	qib_7220_regs.h
4290	QIB_7220_RcvEgrIndexHead2_offse	0x00220018UL	qib_7220_regs.h
4291	QIB_7220_MEM_220020_offset	0x00220020UL	qib_7220_regs.h
4292	QIB_7220_RcvHdrTail3_offset	0x00230000UL	qib_7220_regs.h
4293	QIB_7220_RcvHdrHead3_offset	0x00230008UL	qib_7220_regs.h
4294	QIB_7220_RcvEgrIndexTail3_offse	0x00230010UL	qib_7220_regs.h
4295	QIB_7220_RcvEgrIndexHead3_offse	0x00230018UL	qib_7220_regs.h
4296	QIB_7220_MEM_230020_offset	0x00230020UL	qib_7220_regs.h
4297	QIB_7220_RcvHdrTail4_offset	0x00240000UL	qib_7220_regs.h
4298	QIB_7220_RcvHdrHead4_offset	0x00240008UL	qib_7220_regs.h
4299	QIB_7220_RcvEgrIndexTail4_offse	0x00240010UL	qib_7220_regs.h
4300	QIB_7220_RcvEgrIndexHead4_offse	0x00240018UL	qib_7220_regs.h
4301	QIB_7220_MEM_240020_offset	0x00240020UL	qib_7220_regs.h
4302	QIB_7220_RcvHdrTail5_offset	0x00250000UL	qib_7220_regs.h
4303	QIB_7220_RcvHdrHead5_offset	0x00250008UL	qib_7220_regs.h
4304	QIB_7220_RcvEgrIndexTail5_offse	0x00250010UL	qib_7220_regs.h
4305	QIB_7220_RcvEgrIndexHead5_offse	0x00250018UL	qib_7220_regs.h
4306	QIB_7220_MEM_250020_offset	0x00250020UL	qib_7220_regs.h
4307	QIB_7220_RcvHdrTail6_offset	0x00260000UL	qib_7220_regs.h
4308	QIB_7220_RcvHdrHead6_offset	0x00260008UL	qib_7220_regs.h
4309	QIB_7220_RcvEgrIndexTail6_offse	0x00260010UL	qib_7220_regs.h
4310	QIB_7220_RcvEgrIndexHead6_offse	0x00260018UL	qib_7220_regs.h
4311	QIB_7220_MEM_260020_offset	0x00260020UL	qib_7220_regs.h
4312	QIB_7220_RcvHdrTail7_offset	0x00270000UL	qib_7220_regs.h
4313	QIB_7220_RcvHdrHead7_offset	0x00270008UL	qib_7220_regs.h
4314	QIB_7220_RcvEgrIndexTail7_offse	0x00270010UL	qib_7220_regs.h
4315	QIB_7220_RcvEgrIndexHead7_offse	0x00270018UL	qib_7220_regs.h
4316	QIB_7220_MEM_270020_offset	0x00270020UL	qib_7220_regs.h
4317	QIB_7220_RcvHdrTail8_offset	0x00280000UL	qib_7220_regs.h
4318	QIB_7220_RcvHdrHead8_offset	0x00280008UL	qib_7220_regs.h
4319	QIB_7220_RcvEgrIndexTail8_offse	0x00280010UL	qib_7220_regs.h
4320	QIB_7220_RcvEgrIndexHead8_offse	0x00280018UL	qib_7220_regs.h
4321	QIB_7220_MEM_280020_offset	0x00280020UL	qib_7220_regs.h
4322	QIB_7220_RcvHdrTail9_offset	0x00290000UL	qib_7220_regs.h
4323	QIB_7220_RcvHdrHead9_offset	0x00290008UL	qib_7220_regs.h
4324	QIB_7220_RcvEgrIndexTail9_offse	0x00290010UL	qib_7220_regs.h
4325	QIB_7220_RcvEgrIndexHead9_offse	0x00290018UL	qib_7220_regs.h
4326	QIB_7220_MEM_290020_offset	0x00290020UL	qib_7220_regs.h
4327	QIB_7220_RcvHdrTail10_offset	0x002a0000UL	qib_7220_regs.h
4328	QIB_7220_RcvHdrHead10_offset	0x002a0008UL	qib_7220_regs.h
4329	QIB_7220_RcvEgrIndexTail10_offs	0x002a0010UL	qib_7220_regs.h
4330	QIB_7220_RcvEgrIndexHead10_offs	0x002a0018UL	qib_7220_regs.h
4331	QIB_7220_MEM_2A0020_offset	0x002a0020UL	qib_7220_regs.h
4332	QIB_7220_RcvHdrTail11_offset	0x002b0000UL	qib_7220_regs.h
4333	QIB_7220_RcvHdrHead11_offset	0x002b0008UL	qib_7220_regs.h
4334	QIB_7220_RcvEgrIndexTail11_offs	0x002b0010UL	qib_7220_regs.h
4335	QIB_7220_RcvEgrIndexHead11_offs	0x002b0018UL	qib_7220_regs.h
4336	QIB_7220_MEM_2B0020_offset	0x002b0020UL	qib_7220_regs.h
4337	QIB_7220_RcvHdrTail12_offset	0x002c0000UL	qib_7220_regs.h
4338	QIB_7220_RcvHdrHead12_offset	0x002c0008UL	qib_7220_regs.h
4339	QIB_7220_RcvEgrIndexTail12_offs	0x002c0010UL	qib_7220_regs.h
4340	QIB_7220_RcvEgrIndexHead12_offs	0x002c0018UL	qib_7220_regs.h
4341	QIB_7220_MEM_2C0020_offset	0x002c0020UL	qib_7220_regs.h
4342	QIB_7220_RcvHdrTail13_offset	0x002d0000UL	qib_7220_regs.h
4343	QIB_7220_RcvHdrHead13_offset	0x002d0008UL	qib_7220_regs.h
4344	QIB_7220_RcvEgrIndexTail13_offs	0x002d0010UL	qib_7220_regs.h
4345	QIB_7220_RcvEgrIndexHead13_offs	0x002d0018UL	qib_7220_regs.h
4346	QIB_7220_MEM_2D0020_offset	0x002d0020UL	qib_7220_regs.h
4347	QIB_7220_RcvHdrTail14_offset	0x002e0000UL	qib_7220_regs.h
4348	QIB_7220_RcvHdrHead14_offset	0x002e0008UL	qib_7220_regs.h
4349	QIB_7220_RcvEgrIndexTail14_offs	0x002e0010UL	qib_7220_regs.h
4350	QIB_7220_RcvEgrIndexHead14_offs	0x002e0018UL	qib_7220_regs.h
4351	QIB_7220_MEM_2E0020_offset	0x002e0020UL	qib_7220_regs.h
4352	QIB_7220_RcvHdrTail15_offset	0x002f0000UL	qib_7220_regs.h
4353	QIB_7220_RcvHdrHead15_offset	0x002f0008UL	qib_7220_regs.h
4354	QIB_7220_RcvEgrIndexTail15_offs	0x002f0010UL	qib_7220_regs.h
4355	QIB_7220_RcvEgrIndexHead15_offs	0x002f0018UL	qib_7220_regs.h
4356	QIB_7220_MEM_2F0020_offset	0x002f0020UL	qib_7220_regs.h
4357	QIB_7220_RcvHdrTail16_offset	0x00300000UL	qib_7220_regs.h
4358	QIB_7220_RcvHdrHead16_offset	0x00300008UL	qib_7220_regs.h
4359	QIB_7220_RcvEgrIndexTail16_offs	0x00300010UL	qib_7220_regs.h
4360	QIB_7220_RcvEgrIndexHead16_offs	0x00300018UL	qib_7220_regs.h
4361	QIB_7220_MEM_300020_offset	0x00300020UL	qib_7220_regs.h
4362	TX_INIT_RATE	16	3c509.h
4363	TX_INIT_MAX_RATE	64	3c509.h
4364	RX_INIT_LATENCY	64	3c509.h
4365	RX_INIT_EARLY_THRESH	64	3c509.h
4366	MIN_RX_EARLY_THRESHF	16	3c509.h	not less than ether_header
4367	MIN_RX_EARLY_THRESHL	4	3c509.h
4368	EEPROMSIZE	0x40	3c509.h
4369	MAX_EEPROMBUSY	1000	3c509.h
4370	EP_ID_PORT_START	0x110	3c509.h	avoid 0x100 to avoid conflict with SB16
4371	EP_ID_PORT_INC	0x10	3c509.h
4372	EP_ID_PORT_END	0x200	3c509.h
4373	EP_TAG_MAX	0x7	3c509.h	must be 2^n - 1
4374	EEPROM_CMD_RD	0x0080	3c509.h	Read: Address required (5 bits)
4375	EEPROM_CMD_WR	0x0040	3c509.h	Write: Address required (5 bits)
4376	EEPROM_CMD_ERASE	0x00c0	3c509.h	Erase: Address required (5 bits)
4377	EEPROM_CMD_EWEN	0x0030	3c509.h	Erase/Write Enable: No data required
4378	EEPROM_BUSY	(1<<15)	3c509.h
4379	EEPROM_TST_MODE	(1<<14)	3c509.h
4380	EEPROM_NODE_ADDR_0	0x0	3c509.h	Word
4381	EEPROM_NODE_ADDR_1	0x1	3c509.h	Word
4382	EEPROM_NODE_ADDR_2	0x2	3c509.h	Word
4383	EEPROM_PROD_ID	0x3	3c509.h	0x9[0-f]50
4384	EEPROM_MFG_ID	0x7	3c509.h	0x6d50
4385	EEPROM_ADDR_CFG	0x8	3c509.h	Base addr
4386	EEPROM_RESOURCE_CFG	0x9	3c509.h	IRQ. Bits 12-15
4387	EP_COMMAND	0x0e	3c509.h	Write. BASE+0x0e is always a
4388	EP_STATUS	0x0e	3c509.h	Read. BASE+0x0e is always status
4389	EP_WINDOW	0x0f	3c509.h	Read. BASE+0x0f is always window
4390	EP_W0_EEPROM_DATA	0x0c	3c509.h
4391	EP_W0_EEPROM_COMMAND	0x0a	3c509.h
4392	EP_W0_RESOURCE_CFG	0x08	3c509.h
4393	EP_W0_ADDRESS_CFG	0x06	3c509.h
4394	EP_W0_CONFIG_CTRL	0x04	3c509.h
4395	EP_W0_PRODUCT_ID	0x02	3c509.h
4396	EP_W0_MFG_ID	0x00	3c509.h
4397	EP_W1_TX_PIO_WR_2	0x02	3c509.h
4398	EP_W1_TX_PIO_WR_1	0x00	3c509.h
4399	EP_W1_FREE_TX	0x0c	3c509.h
4400	EP_W1_TX_STATUS	0x0b	3c509.h	byte
4401	EP_W1_TIMER	0x0a	3c509.h	byte
4402	EP_W1_RX_STATUS	0x08	3c509.h
4403	EP_W1_RX_PIO_RD_2	0x02	3c509.h
4404	EP_W1_RX_PIO_RD_1	0x00	3c509.h
4405	EP_W2_ADDR_5	0x05	3c509.h
4406	EP_W2_ADDR_4	0x04	3c509.h
4407	EP_W2_ADDR_3	0x03	3c509.h
4408	EP_W2_ADDR_2	0x02	3c509.h
4409	EP_W2_ADDR_1	0x01	3c509.h
4410	EP_W2_ADDR_0	0x00	3c509.h
4411	EP_W3_FREE_TX	0x0c	3c509.h
4412	EP_W3_FREE_RX	0x0a	3c509.h
4413	EP_W4_MEDIA_TYPE	0x0a	3c509.h
4414	EP_W4_CTRLR_STATUS	0x08	3c509.h
4415	EP_W4_NET_DIAG	0x06	3c509.h
4416	EP_W4_FIFO_DIAG	0x04	3c509.h
4417	EP_W4_HOST_DIAG	0x02	3c509.h
4418	EP_W4_TX_DIAG	0x00	3c509.h
4419	EP_W5_READ_0_MASK	0x0c	3c509.h
4420	EP_W5_INTR_MASK	0x0a	3c509.h
4421	EP_W5_RX_FILTER	0x08	3c509.h
4422	EP_W5_RX_EARLY_THRESH	0x06	3c509.h
4423	EP_W5_TX_AVAIL_THRESH	0x02	3c509.h
4424	EP_W5_TX_START_THRESH	0x00	3c509.h
4425	TX_TOTAL_OK	0x0c	3c509.h
4426	RX_TOTAL_OK	0x0a	3c509.h
4427	TX_DEFERRALS	0x08	3c509.h
4428	RX_FRAMES_OK	0x07	3c509.h
4429	TX_FRAMES_OK	0x06	3c509.h
4430	RX_OVERRUNS	0x05	3c509.h
4431	TX_COLLISIONS	0x04	3c509.h
4432	TX_AFTER_1_COLLISION	0x03	3c509.h
4433	TX_AFTER_X_COLLISIONS	0x02	3c509.h
4434	TX_NO_SQE	0x01	3c509.h
4435	TX_CD_LOST	0x00	3c509.h
4436	GLOBAL_RESET	(unsigned short) 0x0000	3c509.h	Wait at least 1ms
4437	WINDOW_SELECT	(unsigned short) (0x1<<11)	3c509.h
4438	START_TRANSCEIVER	(unsigned short) (0x2<<11)	3c509.h	Read ADDR_CFG reg to
4439	RX_DISABLE	(unsigned short) (0x3<<11)	3c509.h	state disabled on
4440	RX_ENABLE	(unsigned short) (0x4<<11)	3c509.h
4441	RX_RESET	(unsigned short) (0x5<<11)	3c509.h
4442	RX_DISCARD_TOP_PACK	(unsigned short) (0x8<<11)	3c509.h
4443	TX_ENABLE	(unsigned short) (0x9<<11)	3c509.h
4444	TX_DISABLE	(unsigned short) (0xa<<11)	3c509.h
4445	TX_RESET	(unsigned short) (0xb<<11)	3c509.h
4446	REQ_INTR	(unsigned short) (0xc<<11)	3c509.h
4447	SET_INTR_MASK	(unsigned short) (0xe<<11)	3c509.h
4448	SET_RD_0_MASK	(unsigned short) (0xf<<11)	3c509.h
4449	SET_RX_FILTER	(unsigned short) (0x10<<11)	3c509.h
4450	FIL_INDIVIDUAL	(unsigned short) (0x1)	3c509.h
4451	FIL_GROUP	(unsigned short) (0x2)	3c509.h
4452	FIL_BRDCST	(unsigned short) (0x4)	3c509.h
4453	FIL_ALL	(unsigned short) (0x8)	3c509.h
4454	SET_RX_EARLY_THRESH	(unsigned short) (0x11<<11)	3c509.h
4455	SET_TX_AVAIL_THRESH	(unsigned short) (0x12<<11)	3c509.h
4456	SET_TX_START_THRESH	(unsigned short) (0x13<<11)	3c509.h
4457	STATS_ENABLE	(unsigned short) (0x15<<11)	3c509.h
4458	STATS_DISABLE	(unsigned short) (0x16<<11)	3c509.h
4459	STOP_TRANSCEIVER	(unsigned short) (0x17<<11)	3c509.h
4460	ACK_INTR	(unsigned short) (0x6800)	3c509.h
4461	C_INTR_LATCH	(unsigned short) (ACK_INTR\|0x1)	3c509.h
4462	C_CARD_FAILURE	(unsigned short) (ACK_INTR\|0x2)	3c509.h
4463	C_TX_COMPLETE	(unsigned short) (ACK_INTR\|0x4)	3c509.h
4464	C_TX_AVAIL	(unsigned short) (ACK_INTR\|0x8)	3c509.h
4465	C_RX_COMPLETE	(unsigned short) (ACK_INTR\|0x10)	3c509.h
4466	C_RX_EARLY	(unsigned short) (ACK_INTR\|0x20)	3c509.h
4467	C_INT_RQD	(unsigned short) (ACK_INTR\|0x40)	3c509.h
4468	C_UPD_STATS	(unsigned short) (ACK_INTR\|0x80)	3c509.h
4469	S_INTR_LATCH	(unsigned short) (0x1)	3c509.h
4470	S_CARD_FAILURE	(unsigned short) (0x2)	3c509.h
4471	S_TX_COMPLETE	(unsigned short) (0x4)	3c509.h
4472	S_TX_AVAIL	(unsigned short) (0x8)	3c509.h
4473	S_RX_COMPLETE	(unsigned short) (0x10)	3c509.h
4474	S_RX_EARLY	(unsigned short) (0x20)	3c509.h
4475	S_INT_RQD	(unsigned short) (0x40)	3c509.h
4476	S_UPD_STATS	(unsigned short) (0x80)	3c509.h
4477	S_5_INTS	(S_CARD_FAILURE\|S_TX_COMPLETE\|\ S_TX_AVAIL\|S_RX_COMPLETE\|S_RX_EARLY)	3c509.h
4478	S_COMMAND_IN_PROGRESS	(unsigned short) (0x1000)	3c509.h
4479	ERR_RX_INCOMPLETE	(unsigned short) (0x1<<15)	3c509.h
4480	ERR_RX	(unsigned short) (0x1<<14)	3c509.h
4481	ERR_RX_OVERRUN	(unsigned short) (0x8<<11)	3c509.h
4482	ERR_RX_RUN_PKT	(unsigned short) (0xb<<11)	3c509.h
4483	ERR_RX_ALIGN	(unsigned short) (0xc<<11)	3c509.h
4484	ERR_RX_CRC	(unsigned short) (0xd<<11)	3c509.h
4485	ERR_RX_OVERSIZE	(unsigned short) (0x9<<11)	3c509.h
4486	ERR_RX_DRIBBLE	(unsigned short) (0x2<<11)	3c509.h
4487	TXS_COMPLETE	0x80	3c509.h
4488	TXS_SUCCES_INTR_REQ	0x40	3c509.h
4489	TXS_JABBER	0x20	3c509.h
4490	TXS_UNDERRUN	0x10	3c509.h
4491	TXS_MAX_COLLISION	0x8	3c509.h
4492	TXS_STATUS_OVERFLOW	0x4	3c509.h
4493	IS_AUI	(1<<13)	3c509.h
4494	IS_BNC	(1<<12)	3c509.h
4495	IS_UTP	(1<<9)	3c509.h
4496	ENABLE_DRQ_IRQ	0x0001	3c509.h
4497	W0_P4_CMD_RESET_ADAPTER	0x4	3c509.h
4498	W0_P4_CMD_ENABLE_ADAPTER	0x1	3c509.h
4499	ENABLE_UTP	0xc0	3c509.h
4500	DISABLE_UTP	0x0	3c509.h
4501	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c509.h
4502	RX_ERROR	0x4000	3c509.h
4503	RX_INCOMPLETE	0x8000	3c509.h
4504	MFG_ID	0x6d50	3c509.h	in EEPROM and W0 ADDR_CONFIG
4505	PROD_ID	0x9150	3c509.h
4506	AUI	0x1	3c509.h
4507	BNC	0x2	3c509.h
4508	UTP	0x4	3c509.h
4509	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c509.h
4510	TX_INIT_RATE	16	3c595.h
4511	TX_INIT_MAX_RATE	64	3c595.h
4512	RX_INIT_LATENCY	64	3c595.h
4513	RX_INIT_EARLY_THRESH	64	3c595.h
4514	MIN_RX_EARLY_THRESHF	16	3c595.h	not less than ether_header
4515	MIN_RX_EARLY_THRESHL	4	3c595.h
4516	EEPROMSIZE	0x40	3c595.h
4517	MAX_EEPROMBUSY	1000	3c595.h
4518	VX_LAST_TAG	0xd7	3c595.h
4519	VX_MAX_BOARDS	16	3c595.h
4520	VX_ID_PORT	0x100	3c595.h
4521	BASE	(eth_nic_base)	3c595.h
4522	EEPROM_CMD_RD	0x0080	3c595.h	Read: Address required (5 bits)
4523	EEPROM_CMD_WR	0x0040	3c595.h	Write: Address required (5 bits)
4524	EEPROM_CMD_ERASE	0x00c0	3c595.h	Erase: Address required (5 bits)
4525	EEPROM_CMD_EWEN	0x0030	3c595.h	Erase/Write Enable: No data required
4526	EEPROM_BUSY	(1<<15)	3c595.h
4527	EEPROM_NODE_ADDR_0	0x0	3c595.h	Word
4528	EEPROM_NODE_ADDR_1	0x1	3c595.h	Word
4529	EEPROM_NODE_ADDR_2	0x2	3c595.h	Word
4530	EEPROM_PROD_ID	0x3	3c595.h	0x9[0-f]50
4531	EEPROM_MFG_ID	0x7	3c595.h	0x6d50
4532	EEPROM_ADDR_CFG	0x8	3c595.h	Base addr
4533	EEPROM_RESOURCE_CFG	0x9	3c595.h	IRQ. Bits 12-15
4534	EEPROM_OEM_ADDR_0	0xa	3c595.h	Word
4535	EEPROM_OEM_ADDR_1	0xb	3c595.h	Word
4536	EEPROM_OEM_ADDR_2	0xc	3c595.h	Word
4537	EEPROM_SOFT_INFO_2	0xf	3c595.h	Software information 2
4538	NO_RX_OVN_ANOMALY	(1<<5)	3c595.h
4539	VX_COMMAND	0x0e	3c595.h	Write. BASE+0x0e is always a
4540	VX_STATUS	0x0e	3c595.h	Read. BASE+0x0e is always status
4541	VX_WINDOW	0x0f	3c595.h	Read. BASE+0x0f is always window
4542	VX_W0_EEPROM_DATA	0x0c	3c595.h
4543	VX_W0_EEPROM_COMMAND	0x0a	3c595.h
4544	VX_W0_RESOURCE_CFG	0x08	3c595.h
4545	VX_W0_ADDRESS_CFG	0x06	3c595.h
4546	VX_W0_CONFIG_CTRL	0x04	3c595.h
4547	VX_W0_PRODUCT_ID	0x02	3c595.h
4548	VX_W0_MFG_ID	0x00	3c595.h
4549	VX_W1_TX_PIO_WR_2	0x02	3c595.h
4550	VX_W1_TX_PIO_WR_1	0x00	3c595.h
4551	VX_W1_FREE_TX	0x0c	3c595.h
4552	VX_W1_TX_STATUS	0x0b	3c595.h	byte
4553	VX_W1_TIMER	0x0a	3c595.h	byte
4554	VX_W1_RX_STATUS	0x08	3c595.h
4555	VX_W1_RX_PIO_RD_2	0x02	3c595.h
4556	VX_W1_RX_PIO_RD_1	0x00	3c595.h
4557	VX_W2_ADDR_5	0x05	3c595.h
4558	VX_W2_ADDR_4	0x04	3c595.h
4559	VX_W2_ADDR_3	0x03	3c595.h
4560	VX_W2_ADDR_2	0x02	3c595.h
4561	VX_W2_ADDR_1	0x01	3c595.h
4562	VX_W2_ADDR_0	0x00	3c595.h
4563	VX_W3_INTERNAL_CFG	0x00	3c595.h
4564	VX_W3_RESET_OPT	0x08	3c595.h
4565	VX_W3_FREE_TX	0x0c	3c595.h
4566	VX_W3_FREE_RX	0x0a	3c595.h
4567	VX_W4_MEDIA_TYPE	0x0a	3c595.h
4568	VX_W4_CTRLR_STATUS	0x08	3c595.h
4569	VX_W4_NET_DIAG	0x06	3c595.h
4570	VX_W4_FIFO_DIAG	0x04	3c595.h
4571	VX_W4_HOST_DIAG	0x02	3c595.h
4572	VX_W4_TX_DIAG	0x00	3c595.h
4573	VX_W5_READ_0_MASK	0x0c	3c595.h
4574	VX_W5_INTR_MASK	0x0a	3c595.h
4575	VX_W5_RX_FILTER	0x08	3c595.h
4576	VX_W5_RX_EARLY_THRESH	0x06	3c595.h
4577	VX_W5_TX_AVAIL_THRESH	0x02	3c595.h
4578	VX_W5_TX_START_THRESH	0x00	3c595.h
4579	TX_TOTAL_OK	0x0c	3c595.h
4580	RX_TOTAL_OK	0x0a	3c595.h
4581	TX_DEFERRALS	0x08	3c595.h
4582	RX_FRAMES_OK	0x07	3c595.h
4583	TX_FRAMES_OK	0x06	3c595.h
4584	RX_OVERRUNS	0x05	3c595.h
4585	TX_COLLISIONS	0x04	3c595.h
4586	TX_AFTER_1_COLLISION	0x03	3c595.h
4587	TX_AFTER_X_COLLISIONS	0x02	3c595.h
4588	TX_NO_SQE	0x01	3c595.h
4589	TX_CD_LOST	0x00	3c595.h
4590	GLOBAL_RESET	(unsigned short) 0x0000	3c595.h	Wait at least 1ms
4591	WINDOW_SELECT	(unsigned short) (0x1<<11)	3c595.h
4592	START_TRANSCEIVER	(unsigned short) (0x2<<11)	3c595.h	Read ADDR_CFG reg to
4593	RX_DISABLE	(unsigned short) (0x3<<11)	3c595.h	state disabled on
4594	RX_ENABLE	(unsigned short) (0x4<<11)	3c595.h
4595	RX_RESET	(unsigned short) (0x5<<11)	3c595.h
4596	RX_DISCARD_TOP_PACK	(unsigned short) (0x8<<11)	3c595.h
4597	TX_ENABLE	(unsigned short) (0x9<<11)	3c595.h
4598	TX_DISABLE	(unsigned short) (0xa<<11)	3c595.h
4599	TX_RESET	(unsigned short) (0xb<<11)	3c595.h
4600	REQ_INTR	(unsigned short) (0xc<<11)	3c595.h
4601	ACK_INTR	(unsigned short) (0x6800)	3c595.h
4602	C_INTR_LATCH	(unsigned short) (ACK_INTR\|0x1)	3c595.h
4603	C_CARD_FAILURE	(unsigned short) (ACK_INTR\|0x2)	3c595.h
4604	C_TX_COMPLETE	(unsigned short) (ACK_INTR\|0x4)	3c595.h
4605	C_TX_AVAIL	(unsigned short) (ACK_INTR\|0x8)	3c595.h
4606	C_RX_COMPLETE	(unsigned short) (ACK_INTR\|0x10)	3c595.h
4607	C_RX_EARLY	(unsigned short) (ACK_INTR\|0x20)	3c595.h
4608	C_INT_RQD	(unsigned short) (ACK_INTR\|0x40)	3c595.h
4609	C_UPD_STATS	(unsigned short) (ACK_INTR\|0x80)	3c595.h
4610	SET_INTR_MASK	(unsigned short) (0xe<<11)	3c595.h
4611	SET_RD_0_MASK	(unsigned short) (0xf<<11)	3c595.h
4612	SET_RX_FILTER	(unsigned short) (0x10<<11)	3c595.h
4613	FIL_INDIVIDUAL	(unsigned short) (0x1)	3c595.h
4614	FIL_MULTICAST	(unsigned short) (0x02)	3c595.h
4615	FIL_BRDCST	(unsigned short) (0x04)	3c595.h
4616	FIL_PROMISC	(unsigned short) (0x08)	3c595.h
4617	SET_RX_EARLY_THRESH	(unsigned short) (0x11<<11)	3c595.h
4618	SET_TX_AVAIL_THRESH	(unsigned short) (0x12<<11)	3c595.h
4619	SET_TX_START_THRESH	(unsigned short) (0x13<<11)	3c595.h
4620	STATS_ENABLE	(unsigned short) (0x15<<11)	3c595.h
4621	STATS_DISABLE	(unsigned short) (0x16<<11)	3c595.h
4622	STOP_TRANSCEIVER	(unsigned short) (0x17<<11)	3c595.h
4623	S_INTR_LATCH	(unsigned short) (0x1)	3c595.h
4624	S_CARD_FAILURE	(unsigned short) (0x2)	3c595.h
4625	S_TX_COMPLETE	(unsigned short) (0x4)	3c595.h
4626	S_TX_AVAIL	(unsigned short) (0x8)	3c595.h
4627	S_RX_COMPLETE	(unsigned short) (0x10)	3c595.h
4628	S_RX_EARLY	(unsigned short) (0x20)	3c595.h
4629	S_INT_RQD	(unsigned short) (0x40)	3c595.h
4630	S_UPD_STATS	(unsigned short) (0x80)	3c595.h
4631	S_COMMAND_IN_PROGRESS	(unsigned short) (0x1000)	3c595.h
4632	VX_BUSY_WAIT	while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS)	3c595.h
4633	ACF_CONNECTOR_BITS	14	3c595.h
4634	ACF_CONNECTOR_UTP	0	3c595.h
4635	ACF_CONNECTOR_AUI	1	3c595.h
4636	ACF_CONNECTOR_BNC	3	3c595.h
4637	INTERNAL_CONNECTOR_BITS	20	3c595.h
4638	INTERNAL_CONNECTOR_MASK	0x01700000	3c595.h
4639	ERR_INCOMPLETE	(unsigned short) (0x8000)	3c595.h
4640	ERR_RX	(unsigned short) (0x4000)	3c595.h
4641	ERR_MASK	(unsigned short) (0x7800)	3c595.h
4642	ERR_OVERRUN	(unsigned short) (0x4000)	3c595.h
4643	ERR_RUNT	(unsigned short) (0x5800)	3c595.h
4644	ERR_ALIGNMENT	(unsigned short) (0x6000)	3c595.h
4645	ERR_CRC	(unsigned short) (0x6800)	3c595.h
4646	ERR_OVERSIZE	(unsigned short) (0x4800)	3c595.h
4647	ERR_DRIBBLE	(unsigned short) (0x1000)	3c595.h
4648	TXS_COMPLETE	0x80	3c595.h
4649	TXS_INTR_REQ	0x40	3c595.h
4650	TXS_JABBER	0x20	3c595.h
4651	TXS_UNDERRUN	0x10	3c595.h
4652	TXS_MAX_COLLISION	0x8	3c595.h
4653	TXS_STATUS_OVERFLOW	0x4	3c595.h
4654	RS_AUI	(1<<5)	3c595.h
4655	RS_BNC	(1<<4)	3c595.h
4656	RS_UTP	(1<<3)	3c595.h
4657	RS_T4	(1<<0)	3c595.h
4658	RS_TX	(1<<1)	3c595.h
4659	RS_FX	(1<<2)	3c595.h
4660	RS_MII	(1<<6)	3c595.h
4661	FIFOS_RX_RECEIVING	(unsigned short) 0x8000	3c595.h
4662	FIFOS_RX_UNDERRUN	(unsigned short) 0x2000	3c595.h
4663	FIFOS_RX_STATUS_OVERRUN	(unsigned short) 0x1000	3c595.h
4664	FIFOS_RX_OVERRUN	(unsigned short) 0x0800	3c595.h
4665	FIFOS_TX_OVERRUN	(unsigned short) 0x0400	3c595.h
4666	TAG_ADAPTER	0xd0	3c595.h
4667	ACTIVATE_ADAPTER_TO_CONFIG	0xff	3c595.h
4668	ENABLE_DRQ_IRQ	0x0001	3c595.h
4669	MFG_ID	0x506d	3c595.h	`TCM'
4670	PROD_ID	0x5090	3c595.h
4671	JABBER_GUARD_ENABLE	0x40	3c595.h
4672	LINKBEAT_ENABLE	0x80	3c595.h
4673	ENABLE_UTP	(JABBER_GUARD_ENABLE \| LINKBEAT_ENABLE)	3c595.h
4674	DISABLE_UTP	0x0	3c595.h
4675	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c595.h
4676	RX_ERROR	0x4000	3c595.h
4677	RX_INCOMPLETE	0x8000	3c595.h
4678	TX_INDICATE	1<<15	3c595.h
4679	VX_IOSIZE	0x20	3c595.h
4680	VX_CONNECTORS	8	3c595.h
4681	XCVR_MAGIC	(0x5A00)	3c90x.h
4682	INT_INTERRUPTLATCH	(1<<0)	3c90x.h
4683	INT_HOSTERROR	(1<<1)	3c90x.h
4684	INT_TXCOMPLETE	(1<<2)	3c90x.h
4685	INT_RXCOMPLETE	(1<<4)	3c90x.h
4686	INT_RXEARLY	(1<<5)	3c90x.h
4687	INT_INTREQUESTED	(1<<6)	3c90x.h
4688	INT_UPDATESTATS	(1<<7)	3c90x.h
4689	INT_LINKEVENT	(1<<8)	3c90x.h
4690	INT_DNCOMPLETE	(1<<9)	3c90x.h
4691	INT_UPCOMPLETE	(1<<10)	3c90x.h
4692	INT_CMDINPROGRESS	(1<<12)	3c90x.h
4693	INT_WINDOWNUMBER	(7<<13)	3c90x.h
4694	TX_RING_SIZE	8	3c90x.h
4695	RX_RING_SIZE	8	3c90x.h
4696	TX_RING_ALIGN	16	3c90x.h
4697	RX_RING_ALIGN	16	3c90x.h
4698	RX_BUF_SIZE	1536	3c90x.h
4699	EEPROM_TIMEOUT	1 * 1000 * 1000	3c90x.h
4700	ASF_STAT	0x00	amd8111e.h	ASF status register
4701	CHIPID	0x04	amd8111e.h	Chip ID regsiter
4702	MIB_DATA	0x10	amd8111e.h	MIB data register
4703	MIB_ADDR	0x14	amd8111e.h	MIB address register
4704	STAT0	0x30	amd8111e.h	Status0 register
4705	INT0	0x38	amd8111e.h	Interrupt0 register
4706	INTEN0	0x40	amd8111e.h	Interrupt0 enable register
4707	CMD0	0x48	amd8111e.h	Command0 register
4708	CMD2	0x50	amd8111e.h	Command2 register
4709	CMD3	0x54	amd8111e.h	Command3 resiter
4710	CMD7	0x64	amd8111e.h	Command7 register
4711	CTRL1	0x6C	amd8111e.h	Control1 register
4712	CTRL2	0x70	amd8111e.h	Control2 register
4713	XMT_RING_LIMIT	0x7C	amd8111e.h	Transmit ring limit register
4714	AUTOPOLL0	0x88	amd8111e.h	Auto-poll0 register
4715	AUTOPOLL1	0x8A	amd8111e.h	Auto-poll1 register
4716	AUTOPOLL2	0x8C	amd8111e.h	Auto-poll2 register
4717	AUTOPOLL3	0x8E	amd8111e.h	Auto-poll3 register
4718	AUTOPOLL4	0x90	amd8111e.h	Auto-poll4 register
4719	AUTOPOLL5	0x92	amd8111e.h	Auto-poll5 register
4720	AP_VALUE	0x98	amd8111e.h	Auto-poll value register
4721	DLY_INT_A	0xA8	amd8111e.h	Group A delayed interrupt register
4722	DLY_INT_B	0xAC	amd8111e.h	Group B delayed interrupt register
4723	FLOW_CONTROL	0xC8	amd8111e.h	Flow control register
4724	PHY_ACCESS	0xD0	amd8111e.h	PHY access register
4725	STVAL	0xD8	amd8111e.h	Software timer value register
4726	XMT_RING_BASE_ADDR0	0x100	amd8111e.h	Transmit ring0 base addr register
4727	XMT_RING_BASE_ADDR1	0x108	amd8111e.h	Transmit ring1 base addr register
4728	XMT_RING_BASE_ADDR2	0x110	amd8111e.h	Transmit ring2 base addr register
4729	XMT_RING_BASE_ADDR3	0x118	amd8111e.h	Transmit ring2 base addr register
4730	RCV_RING_BASE_ADDR0	0x120	amd8111e.h	Transmit ring0 base addr register
4731	PMAT0	0x190	amd8111e.h	OnNow pattern register0
4732	PMAT1	0x194	amd8111e.h	OnNow pattern register1
4733	XMT_RING_LEN0	0x140	amd8111e.h	Transmit Ring0 length register
4734	XMT_RING_LEN1	0x144	amd8111e.h	Transmit Ring1 length register
4735	XMT_RING_LEN2	0x148	amd8111e.h	Transmit Ring2 length register
4736	XMT_RING_LEN3	0x14C	amd8111e.h	Transmit Ring3 length register
4737	RCV_RING_LEN0	0x150	amd8111e.h	Receive Ring0 length register
4738	SRAM_SIZE	0x178	amd8111e.h	SRAM size register
4739	SRAM_BOUNDARY	0x17A	amd8111e.h	SRAM boundary register
4740	PADR	0x160	amd8111e.h	Physical address register
4741	IFS1	0x18C	amd8111e.h	Inter-frame spacing Part1 register
4742	IFS	0x18D	amd8111e.h	Inter-frame spacing register
4743	IPG	0x18E	amd8111e.h	Inter-frame gap register
4744	LADRF	0x168	amd8111e.h	Logical address filter register
4745	PHY_SPEED_10	0x2	amd8111e.h
4746	PHY_SPEED_100	0x3	amd8111e.h
4747	rcv_miss_pkts	0x00	amd8111e.h
4748	rcv_octets	0x01	amd8111e.h
4749	rcv_broadcast_pkts	0x02	amd8111e.h
4750	rcv_multicast_pkts	0x03	amd8111e.h
4751	rcv_undersize_pkts	0x04	amd8111e.h
4752	rcv_oversize_pkts	0x05	amd8111e.h
4753	rcv_fragments	0x06	amd8111e.h
4754	rcv_jabbers	0x07	amd8111e.h
4755	rcv_unicast_pkts	0x08	amd8111e.h
4756	rcv_alignment_errors	0x09	amd8111e.h
4757	rcv_fcs_errors	0x0A	amd8111e.h
4758	rcv_good_octets	0x0B	amd8111e.h
4759	rcv_mac_ctrl	0x0C	amd8111e.h
4760	rcv_flow_ctrl	0x0D	amd8111e.h
4761	rcv_pkts_64_octets	0x0E	amd8111e.h
4762	rcv_pkts_65to127_octets	0x0F	amd8111e.h
4763	rcv_pkts_128to255_octets	0x10	amd8111e.h
4764	rcv_pkts_256to511_octets	0x11	amd8111e.h
4765	rcv_pkts_512to1023_octets	0x12	amd8111e.h
4766	rcv_pkts_1024to1518_octets	0x13	amd8111e.h
4767	rcv_unsupported_opcode	0x14	amd8111e.h
4768	rcv_symbol_errors	0x15	amd8111e.h
4769	rcv_drop_pkts_ring1	0x16	amd8111e.h
4770	rcv_drop_pkts_ring2	0x17	amd8111e.h
4771	rcv_drop_pkts_ring3	0x18	amd8111e.h
4772	rcv_drop_pkts_ring4	0x19	amd8111e.h
4773	rcv_jumbo_pkts	0x1A	amd8111e.h
4774	xmt_underrun_pkts	0x20	amd8111e.h
4775	xmt_octets	0x21	amd8111e.h
4776	xmt_packets	0x22	amd8111e.h
4777	xmt_broadcast_pkts	0x23	amd8111e.h
4778	xmt_multicast_pkts	0x24	amd8111e.h
4779	xmt_collisions	0x25	amd8111e.h
4780	xmt_unicast_pkts	0x26	amd8111e.h
4781	xmt_one_collision	0x27	amd8111e.h
4782	xmt_multiple_collision	0x28	amd8111e.h
4783	xmt_deferred_transmit	0x29	amd8111e.h
4784	xmt_late_collision	0x2A	amd8111e.h
4785	xmt_excessive_defer	0x2B	amd8111e.h
4786	xmt_loss_carrier	0x2C	amd8111e.h
4787	xmt_excessive_collision	0x2D	amd8111e.h
4788	xmt_back_pressure	0x2E	amd8111e.h
4789	xmt_flow_ctrl	0x2F	amd8111e.h
4790	xmt_pkts_64_octets	0x30	amd8111e.h
4791	xmt_pkts_65to127_octets	0x31	amd8111e.h
4792	xmt_pkts_128to255_octets	0x32	amd8111e.h
4793	xmt_pkts_256to511_octets	0x33	amd8111e.h
4794	xmt_pkts_512to1023_octets	0x34	amd8111e.h
4795	xmt_pkts_1024to1518_octet	0x35	amd8111e.h
4796	xmt_oversize_pkts	0x36	amd8111e.h
4797	xmt_jumbo_pkts	0x37	amd8111e.h
4798	DEFAULT_IPG	0x60	amd8111e.h
4799	IFS1_DELTA	36	amd8111e.h
4800	IPG_CONVERGE_JIFFIES	(HZ/2)	amd8111e.h
4801	IPG_STABLE_TIME	5	amd8111e.h
4802	MIN_IPG	96	amd8111e.h
4803	MAX_IPG	255	amd8111e.h
4804	IPG_STEP	16	amd8111e.h
4805	CSTATE	1	amd8111e.h
4806	SSTATE	2	amd8111e.h
4807	RESET_RX_FLAGS	0x0000	amd8111e.h
4808	TT_MASK	0x000c	amd8111e.h
4809	TCC_MASK	0x0003	amd8111e.h
4810	AMD8111E_REG_DUMP_LEN	13*sizeof(u32)	amd8111e.h
4811	CRC32	0xedb88320	amd8111e.h
4812	INITCRC	0xFFFFFFFF	amd8111e.h
4813	ETH_FCS_LEN	4	atl1e.h
4814	VLAN_HLEN	4	atl1e.h
4815	NET_IP_ALIGN	2	atl1e.h
4816	SPEED_0	0xffff	atl1e.h
4817	SPEED_10	10	atl1e.h
4818	SPEED_100	100	atl1e.h
4819	SPEED_1000	1000	atl1e.h
4820	HALF_DUPLEX	1	atl1e.h
4821	FULL_DUPLEX	2	atl1e.h
4822	AT_ERR_EEPROM	1	atl1e.h
4823	AT_ERR_PHY	2	atl1e.h
4824	AT_ERR_CONFIG	3	atl1e.h
4825	AT_ERR_PARAM	4	atl1e.h
4826	AT_ERR_MAC_TYPE	5	atl1e.h
4827	AT_ERR_PHY_TYPE	6	atl1e.h
4828	AT_ERR_PHY_SPEED	7	atl1e.h
4829	AT_ERR_PHY_RES	8	atl1e.h
4830	AT_ERR_TIMEOUT	9	atl1e.h
4831	AT_MAX_RECEIVE_QUEUE	4	atl1e.h
4832	AT_PAGE_NUM_PER_QUEUE	2	atl1e.h
4833	AT_TWSI_EEPROM_TIMEOUT	100	atl1e.h
4834	AT_HW_MAX_IDLE_DELAY	10	atl1e.h
4835	AT_REGS_LEN	75	atl1e.h
4836	AT_EEPROM_LEN	512	atl1e.h
4837	TPD_BUFLEN_MASK	0x3FFF	atl1e.h
4838	TPD_BUFLEN_SHIFT	0	atl1e.h
4839	TPD_EOP_MASK	0x0001	atl1e.h
4840	TPD_EOP_SHIFT	0	atl1e.h
4841	MAX_TX_BUF_LEN	0x2000	atl1e.h
4842	MAX_TX_BUF_SHIFT	13	atl1e.h
4843	RRS_RX_CSUM_MASK	0xFFFF	atl1e.h
4844	RRS_RX_CSUM_SHIFT	0	atl1e.h
4845	RRS_PKT_SIZE_MASK	0x3FFF	atl1e.h
4846	RRS_PKT_SIZE_SHIFT	16	atl1e.h
4847	RRS_CPU_NUM_MASK	0x0003	atl1e.h
4848	RRS_CPU_NUM_SHIFT	30	atl1e.h
4849	RRS_IS_RSS_IPV4	0x0001	atl1e.h
4850	RRS_IS_RSS_IPV4_TCP	0x0002	atl1e.h
4851	RRS_IS_RSS_IPV6	0x0004	atl1e.h
4852	RRS_IS_RSS_IPV6_TCP	0x0008	atl1e.h
4853	RRS_IS_IPV6	0x0010	atl1e.h
4854	RRS_IS_IP_FRAG	0x0020	atl1e.h
4855	RRS_IS_IP_DF	0x0040	atl1e.h
4856	RRS_IS_802_3	0x0080	atl1e.h
4857	RRS_IS_VLAN_TAG	0x0100	atl1e.h
4858	RRS_IS_ERR_FRAME	0x0200	atl1e.h
4859	RRS_IS_IPV4	0x0400	atl1e.h
4860	RRS_IS_UDP	0x0800	atl1e.h
4861	RRS_IS_TCP	0x1000	atl1e.h
4862	RRS_IS_BCAST	0x2000	atl1e.h
4863	RRS_IS_MCAST	0x4000	atl1e.h
4864	RRS_IS_PAUSE	0x8000	atl1e.h
4865	RRS_ERR_BAD_CRC	0x0001	atl1e.h
4866	RRS_ERR_CODE	0x0002	atl1e.h
4867	RRS_ERR_DRIBBLE	0x0004	atl1e.h
4868	RRS_ERR_RUNT	0x0008	atl1e.h
4869	RRS_ERR_RX_OVERFLOW	0x0010	atl1e.h
4870	RRS_ERR_TRUNC	0x0020	atl1e.h
4871	RRS_ERR_IP_CSUM	0x0040	atl1e.h
4872	RRS_ERR_L4_CSUM	0x0080	atl1e.h
4873	RRS_ERR_LENGTH	0x0100	atl1e.h
4874	RRS_ERR_DES_ADDR	0x0200	atl1e.h
4875	REG_PM_CTRLSTAT	0x44	atl1e.h
4876	REG_PCIE_CAP_LIST	0x58	atl1e.h
4877	REG_DEVICE_CAP	0x5C	atl1e.h
4878	DEVICE_CAP_MAX_PAYLOAD_MASK	0x7	atl1e.h
4879	DEVICE_CAP_MAX_PAYLOAD_SHIFT	0	atl1e.h
4880	REG_DEVICE_CTRL	0x60	atl1e.h
4881	DEVICE_CTRL_MAX_PAYLOAD_MASK	0x7	atl1e.h
4882	DEVICE_CTRL_MAX_PAYLOAD_SHIFT	5	atl1e.h
4883	DEVICE_CTRL_MAX_RREQ_SZ_MASK	0x7	atl1e.h
4884	DEVICE_CTRL_MAX_RREQ_SZ_SHIFT	12	atl1e.h
4885	REG_VPD_CAP	0x6C	atl1e.h
4886	VPD_CAP_ID_MASK	0xff	atl1e.h
4887	VPD_CAP_ID_SHIFT	0	atl1e.h
4888	VPD_CAP_NEXT_PTR_MASK	0xFF	atl1e.h
4889	VPD_CAP_NEXT_PTR_SHIFT	8	atl1e.h
4890	VPD_CAP_VPD_ADDR_MASK	0x7FFF	atl1e.h
4891	VPD_CAP_VPD_ADDR_SHIFT	16	atl1e.h
4892	VPD_CAP_VPD_FLAG	0x80000000	atl1e.h
4893	REG_VPD_DATA	0x70	atl1e.h
4894	REG_SPI_FLASH_CTRL	0x200	atl1e.h
4895	SPI_FLASH_CTRL_STS_NON_RDY	0x1	atl1e.h
4896	SPI_FLASH_CTRL_STS_WEN	0x2	atl1e.h
4897	SPI_FLASH_CTRL_STS_WPEN	0x80	atl1e.h
4898	SPI_FLASH_CTRL_DEV_STS_MASK	0xFF	atl1e.h
4899	SPI_FLASH_CTRL_DEV_STS_SHIFT	0	atl1e.h
4900	SPI_FLASH_CTRL_INS_MASK	0x7	atl1e.h
4901	SPI_FLASH_CTRL_INS_SHIFT	8	atl1e.h
4902	SPI_FLASH_CTRL_START	0x800	atl1e.h
4903	SPI_FLASH_CTRL_EN_VPD	0x2000	atl1e.h
4904	SPI_FLASH_CTRL_LDSTART	0x8000	atl1e.h
4905	SPI_FLASH_CTRL_CS_HI_MASK	0x3	atl1e.h
4906	SPI_FLASH_CTRL_CS_HI_SHIFT	16	atl1e.h
4907	SPI_FLASH_CTRL_CS_HOLD_MASK	0x3	atl1e.h
4908	SPI_FLASH_CTRL_CS_HOLD_SHIFT	18	atl1e.h
4909	SPI_FLASH_CTRL_CLK_LO_MASK	0x3	atl1e.h
4910	SPI_FLASH_CTRL_CLK_LO_SHIFT	20	atl1e.h
4911	SPI_FLASH_CTRL_CLK_HI_MASK	0x3	atl1e.h
4912	SPI_FLASH_CTRL_CLK_HI_SHIFT	22	atl1e.h
4913	SPI_FLASH_CTRL_CS_SETUP_MASK	0x3	atl1e.h
4914	SPI_FLASH_CTRL_CS_SETUP_SHIFT	24	atl1e.h
4915	SPI_FLASH_CTRL_EROM_PGSZ_MASK	0x3	atl1e.h
4916	SPI_FLASH_CTRL_EROM_PGSZ_SHIFT	26	atl1e.h
4917	SPI_FLASH_CTRL_WAIT_READY	0x10000000	atl1e.h
4918	REG_SPI_ADDR	0x204	atl1e.h
4919	REG_SPI_DATA	0x208	atl1e.h
4920	REG_SPI_FLASH_CONFIG	0x20C	atl1e.h
4921	SPI_FLASH_CONFIG_LD_ADDR_MASK	0xFFFFFF	atl1e.h
4922	SPI_FLASH_CONFIG_LD_ADDR_SHIFT	0	atl1e.h
4923	SPI_FLASH_CONFIG_VPD_ADDR_MASK	0x3	atl1e.h
4924	SPI_FLASH_CONFIG_VPD_ADDR_SHIFT	24	atl1e.h
4925	SPI_FLASH_CONFIG_LD_EXIST	0x4000000	atl1e.h
4926	REG_SPI_FLASH_OP_PROGRAM	0x210	atl1e.h
4927	REG_SPI_FLASH_OP_SC_ERASE	0x211	atl1e.h
4928	REG_SPI_FLASH_OP_CHIP_ERASE	0x212	atl1e.h
4929	REG_SPI_FLASH_OP_RDID	0x213	atl1e.h
4930	REG_SPI_FLASH_OP_WREN	0x214	atl1e.h
4931	REG_SPI_FLASH_OP_RDSR	0x215	atl1e.h
4932	REG_SPI_FLASH_OP_WRSR	0x216	atl1e.h
4933	REG_SPI_FLASH_OP_READ	0x217	atl1e.h
4934	REG_TWSI_CTRL	0x218	atl1e.h
4935	TWSI_CTRL_LD_OFFSET_MASK	0xFF	atl1e.h
4936	TWSI_CTRL_LD_OFFSET_SHIFT	0	atl1e.h
4937	TWSI_CTRL_LD_SLV_ADDR_MASK	0x7	atl1e.h
4938	TWSI_CTRL_LD_SLV_ADDR_SHIFT	8	atl1e.h
4939	TWSI_CTRL_SW_LDSTART	0x800	atl1e.h
4940	TWSI_CTRL_HW_LDSTART	0x1000	atl1e.h
4941	TWSI_CTRL_SMB_SLV_ADDR_MASK	0x0x7F	atl1e.h
4942	TWSI_CTRL_SMB_SLV_ADDR_SHIFT	15	atl1e.h
4943	TWSI_CTRL_LD_EXIST	0x400000	atl1e.h
4944	TWSI_CTRL_READ_FREQ_SEL_MASK	0x3	atl1e.h
4945	TWSI_CTRL_READ_FREQ_SEL_SHIFT	23	atl1e.h
4946	TWSI_CTRL_FREQ_SEL_100K	0	atl1e.h
4947	TWSI_CTRL_FREQ_SEL_200K	1	atl1e.h
4948	TWSI_CTRL_FREQ_SEL_300K	2	atl1e.h
4949	TWSI_CTRL_FREQ_SEL_400K	3	atl1e.h
4950	TWSI_CTRL_WRITE_FREQ_SEL_MASK	0x3	atl1e.h
4951	TWSI_CTRL_WRITE_FREQ_SEL_SHIFT	24	atl1e.h
4952	REG_PCIE_DEV_MISC_CTRL	0x21C	atl1e.h
4953	PCIE_DEV_MISC_CTRL_EXT_PIPE	0x2	atl1e.h
4954	PCIE_DEV_MISC_CTRL_RETRY_BUFDIS	0x1	atl1e.h
4955	PCIE_DEV_MISC_CTRL_SPIROM_EXIST	0x4	atl1e.h
4956	PCIE_DEV_MISC_CTRL_SERDES_ENDIA	0x8	atl1e.h
4957	PCIE_DEV_MISC_CTRL_SERDES_SEL_D	0x10	atl1e.h
4958	REG_PCIE_PHYMISC	0x1000	atl1e.h
4959	PCIE_PHYMISC_FORCE_RCV_DET	0x4	atl1e.h
4960	REG_LTSSM_TEST_MODE	0x12FC	atl1e.h
4961	LTSSM_TEST_MODE_DEF	0xE000	atl1e.h
4962	REG_MASTER_CTRL	0x1400	atl1e.h
4963	MASTER_CTRL_SOFT_RST	0x1	atl1e.h
4964	MASTER_CTRL_MTIMER_EN	0x2	atl1e.h
4965	MASTER_CTRL_ITIMER_EN	0x4	atl1e.h
4966	MASTER_CTRL_MANUAL_INT	0x8	atl1e.h
4967	MASTER_CTRL_ITIMER2_EN	0x20	atl1e.h
4968	MASTER_CTRL_INT_RDCLR	0x40	atl1e.h
4969	MASTER_CTRL_LED_MODE	0x200	atl1e.h
4970	MASTER_CTRL_REV_NUM_SHIFT	16	atl1e.h
4971	MASTER_CTRL_REV_NUM_MASK	0xff	atl1e.h
4972	MASTER_CTRL_DEV_ID_SHIFT	24	atl1e.h
4973	MASTER_CTRL_DEV_ID_MASK	0xff	atl1e.h
4974	REG_MANUAL_TIMER_INIT	0x1404	atl1e.h
4975	REG_IRQ_MODU_TIMER_INIT	0x1408	atl1e.h	w
4976	REG_IRQ_MODU_TIMER2_INIT	0x140A	atl1e.h	w
4977	REG_GPHY_CTRL	0x140C	atl1e.h
4978	GPHY_CTRL_EXT_RESET	1	atl1e.h
4979	GPHY_CTRL_PIPE_MOD	2	atl1e.h
4980	GPHY_CTRL_TEST_MODE_MASK	3	atl1e.h
4981	GPHY_CTRL_TEST_MODE_SHIFT	2	atl1e.h
4982	GPHY_CTRL_BERT_START	0x10	atl1e.h
4983	GPHY_CTRL_GATE_25M_EN	0x20	atl1e.h
4984	GPHY_CTRL_LPW_EXIT	0x40	atl1e.h
4985	GPHY_CTRL_PHY_IDDQ	0x80	atl1e.h
4986	GPHY_CTRL_PHY_IDDQ_DIS	0x100	atl1e.h
4987	GPHY_CTRL_PCLK_SEL_DIS	0x200	atl1e.h
4988	GPHY_CTRL_HIB_EN	0x400	atl1e.h
4989	GPHY_CTRL_HIB_PULSE	0x800	atl1e.h
4990	GPHY_CTRL_SEL_ANA_RST	0x1000	atl1e.h
4991	GPHY_CTRL_PHY_PLL_ON	0x2000	atl1e.h
4992	GPHY_CTRL_PWDOWN_HW	0x4000	atl1e.h
4993	GPHY_CTRL_DEFAULT	(\ GPHY_CTRL_PHY_PLL_ON \|\ GPHY_CTRL_SEL_ANA_RST \|\ GPHY_CTRL_HIB_PULSE \|\ GPHY_CTRL_HIB_EN)	atl1e.h
4994	GPHY_CTRL_PW_WOL_DIS	(\ GPHY_CTRL_PHY_PLL_ON \|\ GPHY_CTRL_SEL_ANA_RST \|\ GPHY_CTRL_HIB_PULSE \|\ GPHY_CTRL_HIB_EN \|\ GPHY_CTRL_PWDOWN_HW \|\ GPHY_CTRL	atl1e.h
4995	REG_CMBDISDMA_TIMER	0x140E	atl1e.h
4996	REG_IDLE_STATUS	0x1410	atl1e.h
4997	IDLE_STATUS_RXMAC	1	atl1e.h	1: RXMAC state machine is in non-IDLE state. 0: RXMAC is idling
4998	IDLE_STATUS_TXMAC	2	atl1e.h	1: TXMAC state machine is in non-IDLE state. 0: TXMAC is idling
4999	IDLE_STATUS_RXQ	4	atl1e.h	1: RXQ state machine is in non-IDLE state. 0: RXQ is idling
5000	IDLE_STATUS_TXQ	8	atl1e.h	1: TXQ state machine is in non-IDLE state. 0: TXQ is idling
5001	IDLE_STATUS_DMAR	0x10	atl1e.h	1: DMAR state machine is in non-IDLE state. 0: DMAR is idling
5002	IDLE_STATUS_DMAW	0x20	atl1e.h	1: DMAW state machine is in non-IDLE state. 0: DMAW is idling
5003	IDLE_STATUS_SMB	0x40	atl1e.h	1: SMB state machine is in non-IDLE state. 0: SMB is idling
5004	IDLE_STATUS_CMB	0x80	atl1e.h	1: CMB state machine is in non-IDLE state. 0: CMB is idling
5005	REG_MDIO_CTRL	0x1414	atl1e.h
5006	MDIO_DATA_MASK	0xffff	atl1e.h	On MDIO write, the 16-bit control data to write to PHY MII management register
5007	MDIO_DATA_SHIFT	0	atl1e.h	On MDIO read, the 16-bit status data that was read from the PHY MII management register
5008	MDIO_REG_ADDR_MASK	0x1f	atl1e.h	MDIO register address
5009	MDIO_REG_ADDR_SHIFT	16	atl1e.h
5010	MDIO_RW	0x200000	atl1e.h	1: read, 0: write
5011	MDIO_SUP_PREAMBLE	0x400000	atl1e.h	Suppress preamble
5012	MDIO_START	0x800000	atl1e.h	Write 1 to initiate the MDIO master. And this bit is self cleared after one cycle
5013	MDIO_CLK_SEL_SHIFT	24	atl1e.h
5014	MDIO_CLK_25_4	0	atl1e.h
5015	MDIO_CLK_25_6	2	atl1e.h
5016	MDIO_CLK_25_8	3	atl1e.h
5017	MDIO_CLK_25_10	4	atl1e.h
5018	MDIO_CLK_25_14	5	atl1e.h
5019	MDIO_CLK_25_20	6	atl1e.h
5020	MDIO_CLK_25_28	7	atl1e.h
5021	MDIO_BUSY	0x8000000	atl1e.h
5022	MDIO_AP_EN	0x10000000	atl1e.h
5023	MDIO_WAIT_TIMES	10	atl1e.h
5024	REG_PHY_STATUS	0x1418	atl1e.h
5025	PHY_STATUS_100M	0x20000	atl1e.h
5026	PHY_STATUS_EMI_CA	0x40000	atl1e.h
5027	REG_BIST0_CTRL	0x141c	atl1e.h
5028	BIST0_NOW	0x1	atl1e.h	1: To trigger BIST0 logic. This bit stays high during the
5029	BIST0_SRAM_FAIL	0x2	atl1e.h	1: The SRAM failure is un-repairable because it has address
5030	BIST0_FUSE_FLAG	0x4	atl1e.h	1: Indicating one cell has been fixed
5031	REG_BIST1_CTRL	0x1420	atl1e.h
5032	BIST1_NOW	0x1	atl1e.h	1: To trigger BIST0 logic. This bit stays high during the
5033	BIST1_SRAM_FAIL	0x2	atl1e.h	1: The SRAM failure is un-repairable because it has address
5034	BIST1_FUSE_FLAG	0x4	atl1e.h
5035	REG_SERDES_LOCK	0x1424	atl1e.h
5036	SERDES_LOCK_DETECT	1	atl1e.h	1: SerDes lock detected . This signal comes from Analog SerDes
5037	SERDES_LOCK_DETECT_EN	2	atl1e.h	1: Enable SerDes Lock detect function
5038	REG_MAC_CTRL	0x1480	atl1e.h
5039	MAC_CTRL_TX_EN	1	atl1e.h	1: Transmit Enable
5040	MAC_CTRL_RX_EN	2	atl1e.h	1: Receive Enable
5041	MAC_CTRL_TX_FLOW	4	atl1e.h	1: Transmit Flow Control Enable
5042	MAC_CTRL_RX_FLOW	8	atl1e.h	1: Receive Flow Control Enable
5043	MAC_CTRL_LOOPBACK	0x10	atl1e.h	1: Loop back at G/MII Interface
5044	MAC_CTRL_DUPLX	0x20	atl1e.h	1: Full-duplex mode 0: Half-duplex mode
5045	MAC_CTRL_ADD_CRC	0x40	atl1e.h	1: Instruct MAC to attach CRC on all egress Ethernet frames
5046	MAC_CTRL_PAD	0x80	atl1e.h	1: Instruct MAC to pad short frames to 60-bytes, and then attach CRC. This bit has higher priority over CRC_EN
5047	MAC_CTRL_LENCHK	0x100	atl1e.h	1: Instruct MAC to check if length field matches the real packet length
5048	MAC_CTRL_HUGE_EN	0x200	atl1e.h	1: receive Jumbo frame enable
5049	MAC_CTRL_PRMLEN_SHIFT	10	atl1e.h	Preamble length
5050	MAC_CTRL_PRMLEN_MASK	0xf	atl1e.h
5051	MAC_CTRL_RMV_VLAN	0x4000	atl1e.h	1: to remove VLAN Tag automatically from all receive packets
5052	MAC_CTRL_PROMIS_EN	0x8000	atl1e.h	1: Promiscuous Mode Enable
5053	MAC_CTRL_TX_PAUSE	0x10000	atl1e.h	1: transmit test pause
5054	MAC_CTRL_SCNT	0x20000	atl1e.h	1: shortcut slot time counter
5055	MAC_CTRL_SRST_TX	0x40000	atl1e.h	1: synchronized reset Transmit MAC module
5056	MAC_CTRL_TX_SIMURST	0x80000	atl1e.h	1: transmit simulation reset
5057	MAC_CTRL_SPEED_SHIFT	20	atl1e.h	10: gigabit 01:10M/100M
5058	MAC_CTRL_SPEED_MASK	0x300000	atl1e.h
5059	MAC_CTRL_SPEED_1000	2	atl1e.h
5060	MAC_CTRL_SPEED_10_100	1	atl1e.h
5061	MAC_CTRL_DBG_TX_BKPRESURE	0x400000	atl1e.h	1: transmit maximum backoff (half-duplex test bit)
5062	MAC_CTRL_TX_HUGE	0x800000	atl1e.h	1: transmit huge enable
5063	MAC_CTRL_RX_CHKSUM_EN	0x1000000	atl1e.h	1: RX checksum enable
5064	MAC_CTRL_MC_ALL_EN	0x2000000	atl1e.h	1: upload all multicast frame without error to system
5065	MAC_CTRL_BC_EN	0x4000000	atl1e.h	1: upload all broadcast frame without error to system
5066	MAC_CTRL_DBG	0x8000000	atl1e.h	1: upload all received frame to system (Debug Mode)
5067	REG_MAC_IPG_IFG	0x1484	atl1e.h
5068	MAC_IPG_IFG_IPGT_SHIFT	0	atl1e.h	Desired back to back inter-packet gap. The default is 96-bit time
5069	MAC_IPG_IFG_IPGT_MASK	0x7f	atl1e.h
5070	MAC_IPG_IFG_MIFG_SHIFT	8	atl1e.h	Minimum number of IFG to enforce in between RX frames
5071	MAC_IPG_IFG_MIFG_MASK	0xff	atl1e.h	Frame gap below such IFP is dropped
5072	MAC_IPG_IFG_IPGR1_SHIFT	16	atl1e.h	64bit Carrier-Sense window
5073	MAC_IPG_IFG_IPGR1_MASK	0x7f	atl1e.h
5074	MAC_IPG_IFG_IPGR2_SHIFT	24	atl1e.h	96-bit IPG window
5075	MAC_IPG_IFG_IPGR2_MASK	0x7f	atl1e.h
5076	REG_MAC_STA_ADDR	0x1488	atl1e.h
5077	REG_RX_HASH_TABLE	0x1490	atl1e.h
5078	REG_MAC_HALF_DUPLX_CTRL	0x1498	atl1e.h
5079	MAC_HALF_DUPLX_CTRL_LCOL_SHIFT	0	atl1e.h	Collision Window
5080	MAC_HALF_DUPLX_CTRL_LCOL_MASK	0x3ff	atl1e.h
5081	MAC_HALF_DUPLX_CTRL_RETRY_SHIFT	12	atl1e.h	Retransmission maximum, afterwards the packet will be discarded
5082	MAC_HALF_DUPLX_CTRL_RETRY_MASK	0xf	atl1e.h
5083	MAC_HALF_DUPLX_CTRL_EXC_DEF_EN	0x10000	atl1e.h	1: Allow the transmission of a packet which has been excessively deferred
5084	MAC_HALF_DUPLX_CTRL_NO_BACK_C	0x20000	atl1e.h	1: No back-off on collision, immediately start the retransmission
5085	MAC_HALF_DUPLX_CTRL_NO_BACK_P	0x40000	atl1e.h	1: No back-off on backpressure, immediately start the transmission after back pressure
5086	MAC_HALF_DUPLX_CTRL_ABEBE	0x80000	atl1e.h	1: Alternative Binary Exponential Back-off Enabled
5087	MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT	20	atl1e.h	Maximum binary exponential number
5088	MAC_HALF_DUPLX_CTRL_ABEBT_MASK	0xf	atl1e.h
5089	MAC_HALF_DUPLX_CTRL_JAMIPG_SHIF	24	atl1e.h	IPG to start JAM for collision based flow control in half-duplex
5090	MAC_HALF_DUPLX_CTRL_JAMIPG_MASK	0xf	atl1e.h	mode. In unit of 8-bit time
5091	REG_MTU	0x149c	atl1e.h
5092	REG_WOL_CTRL	0x14a0	atl1e.h
5093	WOL_PATTERN_EN	0x00000001	atl1e.h
5094	WOL_PATTERN_PME_EN	0x00000002	atl1e.h
5095	WOL_MAGIC_EN	0x00000004	atl1e.h
5096	WOL_MAGIC_PME_EN	0x00000008	atl1e.h
5097	WOL_LINK_CHG_EN	0x00000010	atl1e.h
5098	WOL_LINK_CHG_PME_EN	0x00000020	atl1e.h
5099	WOL_PATTERN_ST	0x00000100	atl1e.h
5100	WOL_MAGIC_ST	0x00000200	atl1e.h
5101	WOL_LINKCHG_ST	0x00000400	atl1e.h
5102	WOL_CLK_SWITCH_EN	0x00008000	atl1e.h
5103	WOL_PT0_EN	0x00010000	atl1e.h
5104	WOL_PT1_EN	0x00020000	atl1e.h
5105	WOL_PT2_EN	0x00040000	atl1e.h
5106	WOL_PT3_EN	0x00080000	atl1e.h
5107	WOL_PT4_EN	0x00100000	atl1e.h
5108	WOL_PT5_EN	0x00200000	atl1e.h
5109	WOL_PT6_EN	0x00400000	atl1e.h
5110	REG_WOL_PATTERN_LEN	0x14a4	atl1e.h
5111	WOL_PT_LEN_MASK	0x7f	atl1e.h
5112	WOL_PT0_LEN_SHIFT	0	atl1e.h
5113	WOL_PT1_LEN_SHIFT	8	atl1e.h
5114	WOL_PT2_LEN_SHIFT	16	atl1e.h
5115	WOL_PT3_LEN_SHIFT	24	atl1e.h
5116	WOL_PT4_LEN_SHIFT	0	atl1e.h
5117	WOL_PT5_LEN_SHIFT	8	atl1e.h
5118	WOL_PT6_LEN_SHIFT	16	atl1e.h
5119	REG_SRAM_TRD_ADDR	0x1518	atl1e.h
5120	REG_SRAM_TRD_LEN	0x151C	atl1e.h
5121	REG_SRAM_RXF_ADDR	0x1520	atl1e.h
5122	REG_SRAM_RXF_LEN	0x1524	atl1e.h
5123	REG_SRAM_TXF_ADDR	0x1528	atl1e.h
5124	REG_SRAM_TXF_LEN	0x152C	atl1e.h
5125	REG_SRAM_TCPH_ADDR	0x1530	atl1e.h
5126	REG_SRAM_PKTH_ADDR	0x1532	atl1e.h
5127	REG_LOAD_PTR	0x1534	atl1e.h	Software sets this bit after the initialization of the head and tail
5128	REG_RXF3_BASE_ADDR_HI	0x153C	atl1e.h
5129	REG_DESC_BASE_ADDR_HI	0x1540	atl1e.h
5130	REG_RXF0_BASE_ADDR_HI	0x1540	atl1e.h	share with DESC BASE ADDR HI
5131	REG_HOST_RXF0_PAGE0_LO	0x1544	atl1e.h
5132	REG_HOST_RXF0_PAGE1_LO	0x1548	atl1e.h
5133	REG_TPD_BASE_ADDR_LO	0x154C	atl1e.h
5134	REG_RXF1_BASE_ADDR_HI	0x1550	atl1e.h
5135	REG_RXF2_BASE_ADDR_HI	0x1554	atl1e.h
5136	REG_HOST_RXFPAGE_SIZE	0x1558	atl1e.h
5137	REG_TPD_RING_SIZE	0x155C	atl1e.h
5138	REG_RSS_KEY0	0x14B0	atl1e.h
5139	REG_RSS_KEY1	0x14B4	atl1e.h
5140	REG_RSS_KEY2	0x14B8	atl1e.h
5141	REG_RSS_KEY3	0x14BC	atl1e.h
5142	REG_RSS_KEY4	0x14C0	atl1e.h
5143	REG_RSS_KEY5	0x14C4	atl1e.h
5144	REG_RSS_KEY6	0x14C8	atl1e.h
5145	REG_RSS_KEY7	0x14CC	atl1e.h
5146	REG_RSS_KEY8	0x14D0	atl1e.h
5147	REG_RSS_KEY9	0x14D4	atl1e.h
5148	REG_IDT_TABLE4	0x14E0	atl1e.h
5149	REG_IDT_TABLE5	0x14E4	atl1e.h
5150	REG_IDT_TABLE6	0x14E8	atl1e.h
5151	REG_IDT_TABLE7	0x14EC	atl1e.h
5152	REG_IDT_TABLE0	0x1560	atl1e.h
5153	REG_IDT_TABLE1	0x1564	atl1e.h
5154	REG_IDT_TABLE2	0x1568	atl1e.h
5155	REG_IDT_TABLE3	0x156C	atl1e.h
5156	REG_IDT_TABLE	REG_IDT_TABLE0	atl1e.h
5157	REG_RSS_HASH_VALUE	0x1570	atl1e.h
5158	REG_RSS_HASH_FLAG	0x1574	atl1e.h
5159	REG_BASE_CPU_NUMBER	0x157C	atl1e.h
5160	REG_TXQ_CTRL	0x1580	atl1e.h
5161	TXQ_CTRL_NUM_TPD_BURST_MASK	0xF	atl1e.h
5162	TXQ_CTRL_NUM_TPD_BURST_SHIFT	0	atl1e.h
5163	TXQ_CTRL_EN	0x20	atl1e.h	1: Enable TXQ
5164	TXQ_CTRL_ENH_MODE	0x40	atl1e.h	Performance enhancement mode, in which up to two back-to-back DMA read commands might be dispatched.
5165	TXQ_CTRL_TXF_BURST_NUM_SHIFT	16	atl1e.h	Number of data byte to read in a cache-aligned burst. Each SRAM entry is 8-byte in length.
5166	TXQ_CTRL_TXF_BURST_NUM_MASK	0xffff	atl1e.h
5167	REG_TX_EARLY_TH	0x1584	atl1e.h	Jumbo frame threshold in QWORD unit. Packet greater than
5168	TX_TX_EARLY_TH_MASK	0x7ff	atl1e.h
5169	TX_TX_EARLY_TH_SHIFT	0	atl1e.h
5170	REG_RXQ_CTRL	0x15A0	atl1e.h
5171	RXQ_CTRL_PBA_ALIGN_32	0	atl1e.h	rx-packet alignment
5172	RXQ_CTRL_PBA_ALIGN_64	1	atl1e.h
5173	RXQ_CTRL_PBA_ALIGN_128	2	atl1e.h
5174	RXQ_CTRL_PBA_ALIGN_256	3	atl1e.h
5175	RXQ_CTRL_Q1_EN	0x10	atl1e.h
5176	RXQ_CTRL_Q2_EN	0x20	atl1e.h
5177	RXQ_CTRL_Q3_EN	0x40	atl1e.h
5178	RXQ_CTRL_IPV6_XSUM_VERIFY_EN	0x80	atl1e.h
5179	RXQ_CTRL_HASH_TLEN_SHIFT	8	atl1e.h
5180	RXQ_CTRL_HASH_TLEN_MASK	0xFF	atl1e.h
5181	RXQ_CTRL_HASH_TYPE_IPV4	0x10000	atl1e.h
5182	RXQ_CTRL_HASH_TYPE_IPV4_TCP	0x20000	atl1e.h
5183	RXQ_CTRL_HASH_TYPE_IPV6	0x40000	atl1e.h
5184	RXQ_CTRL_HASH_TYPE_IPV6_TCP	0x80000	atl1e.h
5185	RXQ_CTRL_RSS_MODE_DISABLE	0	atl1e.h
5186	RXQ_CTRL_RSS_MODE_SQSINT	0x4000000	atl1e.h
5187	RXQ_CTRL_RSS_MODE_MQUESINT	0x8000000	atl1e.h
5188	RXQ_CTRL_RSS_MODE_MQUEMINT	0xC000000	atl1e.h
5189	RXQ_CTRL_NIP_QUEUE_SEL_TBL	0x10000000	atl1e.h
5190	RXQ_CTRL_HASH_ENABLE	0x20000000	atl1e.h
5191	RXQ_CTRL_CUT_THRU_EN	0x40000000	atl1e.h
5192	RXQ_CTRL_EN	0x80000000	atl1e.h
5193	REG_RXQ_JMBOSZ_RRDTIM	0x15A4	atl1e.h
5194	RXQ_JMBOSZ_TH_MASK	0x7ff	atl1e.h
5195	RXQ_JMBOSZ_TH_SHIFT	0	atl1e.h	RRD retirement timer. Decrement by 1 after every 512ns passes
5196	RXQ_JMBO_LKAH_MASK	0xf	atl1e.h
5197	RXQ_JMBO_LKAH_SHIFT	11	atl1e.h
5198	REG_RXQ_RXF_PAUSE_THRESH	0x15A8	atl1e.h
5199	RXQ_RXF_PAUSE_TH_HI_SHIFT	0	atl1e.h
5200	RXQ_RXF_PAUSE_TH_HI_MASK	0xfff	atl1e.h
5201	RXQ_RXF_PAUSE_TH_LO_SHIFT	16	atl1e.h
5202	RXQ_RXF_PAUSE_TH_LO_MASK	0xfff	atl1e.h
5203	REG_DMA_CTRL	0x15C0	atl1e.h
5204	DMA_CTRL_DMAR_IN_ORDER	0x1	atl1e.h
5205	DMA_CTRL_DMAR_ENH_ORDER	0x2	atl1e.h
5206	DMA_CTRL_DMAR_OUT_ORDER	0x4	atl1e.h
5207	DMA_CTRL_RCB_VALUE	0x8	atl1e.h
5208	DMA_CTRL_DMAR_BURST_LEN_SHIFT	4	atl1e.h
5209	DMA_CTRL_DMAR_BURST_LEN_MASK	7	atl1e.h
5210	DMA_CTRL_DMAW_BURST_LEN_SHIFT	7	atl1e.h
5211	DMA_CTRL_DMAW_BURST_LEN_MASK	7	atl1e.h
5212	DMA_CTRL_DMAR_REQ_PRI	0x400	atl1e.h
5213	DMA_CTRL_DMAR_DLY_CNT_MASK	0x1F	atl1e.h
5214	DMA_CTRL_DMAR_DLY_CNT_SHIFT	11	atl1e.h
5215	DMA_CTRL_DMAW_DLY_CNT_MASK	0xF	atl1e.h
5216	DMA_CTRL_DMAW_DLY_CNT_SHIFT	16	atl1e.h
5217	DMA_CTRL_TXCMB_EN	0x100000	atl1e.h
5218	DMA_CTRL_RXCMB_EN	0x200000	atl1e.h
5219	REG_SMB_STAT_TIMER	0x15C4	atl1e.h
5220	REG_TRIG_RRD_THRESH	0x15CA	atl1e.h
5221	REG_TRIG_TPD_THRESH	0x15C8	atl1e.h
5222	REG_TRIG_TXTIMER	0x15CC	atl1e.h
5223	REG_TRIG_RXTIMER	0x15CE	atl1e.h
5224	REG_HOST_RXF1_PAGE0_LO	0x15D0	atl1e.h
5225	REG_HOST_RXF1_PAGE1_LO	0x15D4	atl1e.h
5226	REG_HOST_RXF2_PAGE0_LO	0x15D8	atl1e.h
5227	REG_HOST_RXF2_PAGE1_LO	0x15DC	atl1e.h
5228	REG_HOST_RXF3_PAGE0_LO	0x15E0	atl1e.h
5229	REG_HOST_RXF3_PAGE1_LO	0x15E4	atl1e.h
5230	REG_MB_RXF1_RADDR	0x15B4	atl1e.h
5231	REG_MB_RXF2_RADDR	0x15B8	atl1e.h
5232	REG_MB_RXF3_RADDR	0x15BC	atl1e.h
5233	REG_MB_TPD_PROD_IDX	0x15F0	atl1e.h
5234	REG_HOST_RXF0_PAGE0_VLD	0x15F4	atl1e.h
5235	HOST_RXF_VALID	1	atl1e.h
5236	HOST_RXF_PAGENO_SHIFT	1	atl1e.h
5237	HOST_RXF_PAGENO_MASK	0x7F	atl1e.h
5238	REG_HOST_RXF0_PAGE1_VLD	0x15F5	atl1e.h
5239	REG_HOST_RXF1_PAGE0_VLD	0x15F6	atl1e.h
5240	REG_HOST_RXF1_PAGE1_VLD	0x15F7	atl1e.h
5241	REG_HOST_RXF2_PAGE0_VLD	0x15F8	atl1e.h
5242	REG_HOST_RXF2_PAGE1_VLD	0x15F9	atl1e.h
5243	REG_HOST_RXF3_PAGE0_VLD	0x15FA	atl1e.h
5244	REG_HOST_RXF3_PAGE1_VLD	0x15FB	atl1e.h
5245	REG_ISR	0x1600	atl1e.h
5246	ISR_SMB	1	atl1e.h
5247	ISR_TIMER	2	atl1e.h	Interrupt when Timer is counted down to zero
5248	ISR_MANUAL	4	atl1e.h
5249	ISR_HW_RXF_OV	8	atl1e.h	RXF overflow interrupt
5250	ISR_HOST_RXF0_OV	0x10	atl1e.h
5251	ISR_HOST_RXF1_OV	0x20	atl1e.h
5252	ISR_HOST_RXF2_OV	0x40	atl1e.h
5253	ISR_HOST_RXF3_OV	0x80	atl1e.h
5254	ISR_TXF_UN	0x100	atl1e.h
5255	ISR_RX0_PAGE_FULL	0x200	atl1e.h
5256	ISR_DMAR_TO_RST	0x400	atl1e.h
5257	ISR_DMAW_TO_RST	0x800	atl1e.h
5258	ISR_GPHY	0x1000	atl1e.h
5259	ISR_TX_CREDIT	0x2000	atl1e.h
5260	ISR_GPHY_LPW	0x4000	atl1e.h	GPHY low power state interrupt
5261	ISR_RX_PKT	0x10000	atl1e.h	One packet received, triggered by RFD
5262	ISR_TX_PKT	0x20000	atl1e.h	One packet transmitted, triggered by TPD
5263	ISR_TX_DMA	0x40000	atl1e.h
5264	ISR_RX_PKT_1	0x80000	atl1e.h
5265	ISR_RX_PKT_2	0x100000	atl1e.h
5266	ISR_RX_PKT_3	0x200000	atl1e.h
5267	ISR_MAC_RX	0x400000	atl1e.h
5268	ISR_MAC_TX	0x800000	atl1e.h
5269	ISR_UR_DETECTED	0x1000000	atl1e.h
5270	ISR_FERR_DETECTED	0x2000000	atl1e.h
5271	ISR_NFERR_DETECTED	0x4000000	atl1e.h
5272	ISR_CERR_DETECTED	0x8000000	atl1e.h
5273	ISR_PHY_LINKDOWN	0x10000000	atl1e.h
5274	ISR_DIS_INT	0x80000000	atl1e.h
5275	REG_IMR	0x1604	atl1e.h
5276	IMR_NORMAL_MASK	(\ ISR_SMB \|\ ISR_TXF_UN \|\ ISR_HW_RXF_OV \|\ ISR_HOST_RXF0_OV\|\ ISR_MANUAL \|\ ISR_GPHY \|\ ISR_GPHY_L	atl1e.h
5277	ISR_TX_EVENT	(ISR_TXF_UN \| ISR_TX_PKT)	atl1e.h
5278	ISR_RX_EVENT	(ISR_HOST_RXF0_OV \| ISR_HW_RXF_OV \| ISR_RX_PKT)	atl1e.h
5279	REG_MAC_RX_STATUS_BIN	0x1700	atl1e.h
5280	REG_MAC_RX_STATUS_END	0x175c	atl1e.h
5281	REG_MAC_TX_STATUS_BIN	0x1760	atl1e.h
5282	REG_MAC_TX_STATUS_END	0x17c0	atl1e.h
5283	REG_HOST_RXF0_PAGEOFF	0x1800	atl1e.h
5284	REG_TPD_CONS_IDX	0x1804	atl1e.h
5285	REG_HOST_RXF1_PAGEOFF	0x1808	atl1e.h
5286	REG_HOST_RXF2_PAGEOFF	0x180C	atl1e.h
5287	REG_HOST_RXF3_PAGEOFF	0x1810	atl1e.h
5288	REG_HOST_RXF0_MB0_LO	0x1820	atl1e.h
5289	REG_HOST_RXF0_MB1_LO	0x1824	atl1e.h
5290	REG_HOST_RXF1_MB0_LO	0x1828	atl1e.h
5291	REG_HOST_RXF1_MB1_LO	0x182C	atl1e.h
5292	REG_HOST_RXF2_MB0_LO	0x1830	atl1e.h
5293	REG_HOST_RXF2_MB1_LO	0x1834	atl1e.h
5294	REG_HOST_RXF3_MB0_LO	0x1838	atl1e.h
5295	REG_HOST_RXF3_MB1_LO	0x183C	atl1e.h
5296	REG_HOST_TX_CMB_LO	0x1840	atl1e.h
5297	REG_HOST_SMB_ADDR_LO	0x1844	atl1e.h
5298	REG_DEBUG_DATA0	0x1900	atl1e.h
5299	REG_DEBUG_DATA1	0x1904	atl1e.h
5300	MII_BMCR	0x00	atl1e.h
5301	MII_BMSR	0x01	atl1e.h
5302	MII_PHYSID1	0x02	atl1e.h
5303	MII_PHYSID2	0x03	atl1e.h
5304	MII_ADVERTISE	0x04	atl1e.h
5305	MII_LPA	0x05	atl1e.h
5306	MII_EXPANSION	0x06	atl1e.h
5307	MII_AT001_CR	0x09	atl1e.h
5308	MII_AT001_SR	0x0A	atl1e.h
5309	MII_AT001_ESR	0x0F	atl1e.h
5310	MII_AT001_PSCR	0x10	atl1e.h
5311	MII_AT001_PSSR	0x11	atl1e.h
5312	MII_INT_CTRL	0x12	atl1e.h
5313	MII_INT_STATUS	0x13	atl1e.h
5314	MII_SMARTSPEED	0x14	atl1e.h
5315	MII_RERRCOUNTER	0x15	atl1e.h
5316	MII_SREVISION	0x16	atl1e.h
5317	MII_RESV1	0x17	atl1e.h
5318	MII_LBRERROR	0x18	atl1e.h
5319	MII_PHYADDR	0x19	atl1e.h
5320	MII_RESV2	0x1a	atl1e.h
5321	MII_TPISTATUS	0x1b	atl1e.h
5322	MII_NCONFIG	0x1c	atl1e.h
5323	MII_DBG_ADDR	0x1D	atl1e.h
5324	MII_DBG_DATA	0x1E	atl1e.h
5325	MII_CR_SPEED_SELECT_MSB	0x0040	atl1e.h	bits 6,13: 10=1000, 01=100, 00=10
5326	MII_CR_COLL_TEST_ENABLE	0x0080	atl1e.h	Collision test enable
5327	MII_CR_FULL_DUPLEX	0x0100	atl1e.h	FDX =1, half duplex =0
5328	MII_CR_RESTART_AUTO_NEG	0x0200	atl1e.h	Restart auto negotiation
5329	MII_CR_ISOLATE	0x0400	atl1e.h	Isolate PHY from MII
5330	MII_CR_POWER_DOWN	0x0800	atl1e.h	Power down
5331	MII_CR_AUTO_NEG_EN	0x1000	atl1e.h	Auto Neg Enable
5332	MII_CR_SPEED_SELECT_LSB	0x2000	atl1e.h	bits 6,13: 10=1000, 01=100, 00=10
5333	MII_CR_LOOPBACK	0x4000	atl1e.h	0 = normal, 1 = loopback
5334	MII_CR_RESET	0x8000	atl1e.h	0 = normal, 1 = PHY reset
5335	MII_CR_SPEED_MASK	0x2040	atl1e.h
5336	MII_CR_SPEED_1000	0x0040	atl1e.h
5337	MII_CR_SPEED_100	0x2000	atl1e.h
5338	MII_CR_SPEED_10	0x0000	atl1e.h
5339	MII_SR_EXTENDED_CAPS	0x0001	atl1e.h	Extended register capabilities
5340	MII_SR_JABBER_DETECT	0x0002	atl1e.h	Jabber Detected
5341	MII_SR_LINK_STATUS	0x0004	atl1e.h	Link Status 1 = link
5342	MII_SR_AUTONEG_CAPS	0x0008	atl1e.h	Auto Neg Capable
5343	MII_SR_REMOTE_FAULT	0x0010	atl1e.h	Remote Fault Detect
5344	MII_SR_AUTONEG_COMPLETE	0x0020	atl1e.h	Auto Neg Complete
5345	MII_SR_PREAMBLE_SUPPRESS	0x0040	atl1e.h	Preamble may be suppressed
5346	MII_SR_EXTENDED_STATUS	0x0100	atl1e.h	Ext. status info in Reg 0x0F
5347	MII_SR_100T2_HD_CAPS	0x0200	atl1e.h	100T2 Half Duplex Capable
5348	MII_SR_100T2_FD_CAPS	0x0400	atl1e.h	100T2 Full Duplex Capable
5349	MII_SR_10T_HD_CAPS	0x0800	atl1e.h	10T Half Duplex Capable
5350	MII_SR_10T_FD_CAPS	0x1000	atl1e.h	10T Full Duplex Capable
5351	MII_SR_100X_HD_CAPS	0x2000	atl1e.h	100X Half Duplex Capable
5352	MII_SR_100X_FD_CAPS	0x4000	atl1e.h	100X Full Duplex Capable
5353	MII_SR_100T4_CAPS	0x8000	atl1e.h	100T4 Capable
5354	MII_LPA_SLCT	0x001f	atl1e.h	Same as advertise selector
5355	MII_LPA_10HALF	0x0020	atl1e.h	Can do 10mbps half-duplex
5356	MII_LPA_10FULL	0x0040	atl1e.h	Can do 10mbps full-duplex
5357	MII_LPA_100HALF	0x0080	atl1e.h	Can do 100mbps half-duplex
5358	MII_LPA_100FULL	0x0100	atl1e.h	Can do 100mbps full-duplex
5359	MII_LPA_100BASE4	0x0200	atl1e.h	100BASE-T4
5360	MII_LPA_PAUSE	0x0400	atl1e.h	PAUSE
5361	MII_LPA_ASYPAUSE	0x0800	atl1e.h	Asymmetrical PAUSE
5362	MII_LPA_RFAULT	0x2000	atl1e.h	Link partner faulted
5363	MII_LPA_LPACK	0x4000	atl1e.h	Link partner acked us
5364	MII_LPA_NPAGE	0x8000	atl1e.h	Next page bit
5365	MII_AR_SELECTOR_FIELD	0x0001	atl1e.h	indicates IEEE 802.3 CSMA/CD
5366	MII_AR_10T_HD_CAPS	0x0020	atl1e.h	10T Half Duplex Capable
5367	MII_AR_10T_FD_CAPS	0x0040	atl1e.h	10T Full Duplex Capable
5368	MII_AR_100TX_HD_CAPS	0x0080	atl1e.h	100TX Half Duplex Capable
5369	MII_AR_100TX_FD_CAPS	0x0100	atl1e.h	100TX Full Duplex Capable
5370	MII_AR_100T4_CAPS	0x0200	atl1e.h	100T4 Capable
5371	MII_AR_PAUSE	0x0400	atl1e.h	Pause operation desired
5372	MII_AR_ASM_DIR	0x0800	atl1e.h	Asymmetric Pause Direction bit
5373	MII_AR_REMOTE_FAULT	0x2000	atl1e.h	Remote Fault detected
5374	MII_AR_NEXT_PAGE	0x8000	atl1e.h	Next Page ability supported
5375	MII_AR_SPEED_MASK	0x01E0	atl1e.h
5376	MII_AR_DEFAULT_CAP_MASK	0x0DE0	atl1e.h
5377	MII_AT001_CR_1000T_HD_CAPS	0x0100	atl1e.h	Advertise 1000T HD capability
5378	MII_AT001_CR_1000T_FD_CAPS	0x0200	atl1e.h	Advertise 1000T FD capability
5379	MII_AT001_CR_1000T_REPEATER_DTE	0x0400	atl1e.h	1=Repeater/switch device port
5380	MII_AT001_CR_1000T_MS_VALUE	0x0800	atl1e.h	1=Configure PHY as Master
5381	MII_AT001_CR_1000T_MS_ENABLE	0x1000	atl1e.h	1=Master/Slave manual config value
5382	MII_AT001_CR_1000T_TEST_MODE_NO	0x0000	atl1e.h	Normal Operation
5383	MII_AT001_CR_1000T_TEST_MODE_1	0x2000	atl1e.h	Transmit Waveform test
5384	MII_AT001_CR_1000T_TEST_MODE_2	0x4000	atl1e.h	Master Transmit Jitter test
5385	MII_AT001_CR_1000T_TEST_MODE_3	0x6000	atl1e.h	Slave Transmit Jitter test
5386	MII_AT001_CR_1000T_TEST_MODE_4	0x8000	atl1e.h	Transmitter Distortion test
5387	MII_AT001_CR_1000T_SPEED_MASK	0x0300	atl1e.h
5388	MII_AT001_CR_1000T_DEFAULT_CAP_	0x0300	atl1e.h
5389	MII_AT001_SR_1000T_LP_HD_CAPS	0x0400	atl1e.h	LP is 1000T HD capable
5390	MII_AT001_SR_1000T_LP_FD_CAPS	0x0800	atl1e.h	LP is 1000T FD capable
5391	MII_AT001_SR_1000T_REMOTE_RX_ST	0x1000	atl1e.h	Remote receiver OK
5392	MII_AT001_SR_1000T_LOCAL_RX_STA	0x2000	atl1e.h	Local receiver OK
5393	MII_AT001_SR_1000T_MS_CONFIG_RE	0x4000	atl1e.h	1=Local TX is Master, 0=Slave
5394	MII_AT001_SR_1000T_MS_CONFIG_FA	0x8000	atl1e.h	Master/Slave config fault
5395	MII_AT001_SR_1000T_REMOTE_RX_ST	12	atl1e.h
5396	MII_AT001_SR_1000T_LOCAL_RX_STA	13	atl1e.h
5397	MII_AT001_ESR_1000T_HD_CAPS	0x1000	atl1e.h	1000T HD capable
5398	MII_AT001_ESR_1000T_FD_CAPS	0x2000	atl1e.h	1000T FD capable
5399	MII_AT001_ESR_1000X_HD_CAPS	0x4000	atl1e.h	1000X HD capable
5400	MII_AT001_ESR_1000X_FD_CAPS	0x8000	atl1e.h	1000X FD capable
5401	MII_AT001_PSCR_JABBER_DISABLE	0x0001	atl1e.h	1=Jabber Function disabled
5402	MII_AT001_PSCR_POLARITY_REVERSA	0x0002	atl1e.h	1=Polarity Reversal enabled
5403	MII_AT001_PSCR_SQE_TEST	0x0004	atl1e.h	1=SQE Test enabled
5404	MII_AT001_PSCR_MAC_POWERDOWN	0x0008	atl1e.h
5405	MII_AT001_PSCR_CLK125_DISABLE	0x0010	atl1e.h	1=CLK125 low,
5406	MII_AT001_PSCR_MDI_MANUAL_MODE	0x0000	atl1e.h	MDI Crossover Mode bits 6:5
5407	MII_AT001_PSCR_MDIX_MANUAL_MODE	0x0020	atl1e.h	Manual MDIX configuration
5408	MII_AT001_PSCR_AUTO_X_1000T	0x0040	atl1e.h	1000BASE-T: Auto crossover,
5409	MII_AT001_PSCR_AUTO_X_MODE	0x0060	atl1e.h	Auto crossover enabled
5410	MII_AT001_PSCR_10BT_EXT_DIST_EN	0x0080	atl1e.h
5411	MII_AT001_PSCR_MII_5BIT_ENABLE	0x0100	atl1e.h
5412	MII_AT001_PSCR_SCRAMBLER_DISABL	0x0200	atl1e.h	1=Scrambler disable
5413	MII_AT001_PSCR_FORCE_LINK_GOOD	0x0400	atl1e.h	1=Force link good
5414	MII_AT001_PSCR_ASSERT_CRS_ON_TX	0x0800	atl1e.h	1=Assert CRS on Transmit
5415	MII_AT001_PSCR_POLARITY_REVERSA	1	atl1e.h
5416	MII_AT001_PSCR_AUTO_X_MODE_SHIF	5	atl1e.h
5417	MII_AT001_PSCR_10BT_EXT_DIST_EN	7	atl1e.h
5418	MII_AT001_PSSR_SPD_DPLX_RESOLVE	0x0800	atl1e.h	1=Speed & Duplex resolved
5419	MII_AT001_PSSR_DPLX	0x2000	atl1e.h	1=Duplex 0=Half Duplex
5420	MII_AT001_PSSR_SPEED	0xC000	atl1e.h	Speed, bits 14:15
5421	MII_AT001_PSSR_10MBS	0x0000	atl1e.h	00=10Mbs
5422	MII_AT001_PSSR_100MBS	0x4000	atl1e.h	01=100Mbs
5423	MII_AT001_PSSR_1000MBS	0x8000	atl1e.h	10=1000Mbs
5424	B44_DEVCTRL	0x0000UL	b44.h	Device Control
5425	DEVCTRL_MPM	0x00000040	b44.h	MP PME Enable (B0 only)
5426	DEVCTRL_PFE	0x00000080	b44.h	Pattern Filtering Enable
5427	DEVCTRL_IPP	0x00000400	b44.h	Internal EPHY Present
5428	DEVCTRL_EPR	0x00008000	b44.h	EPHY Reset
5429	DEVCTRL_PME	0x00001000	b44.h	PHY Mode Enable
5430	DEVCTRL_PMCE	0x00002000	b44.h	PHY Mode Clocks Enable
5431	DEVCTRL_PADDR	0x0007c000	b44.h	PHY Address
5432	DEVCTRL_PADDR_SHIFT	18	b44.h
5433	B44_BIST_STAT	0x000CUL	b44.h	Built-In Self-Test Status
5434	B44_WKUP_LEN	0x0010UL	b44.h	Wakeup Length
5435	WKUP_LEN_P0_MASK	0x0000007f	b44.h	Pattern 0
5436	WKUP_LEN_D0	0x00000080	b44.h
5437	WKUP_LEN_P1_MASK	0x00007f00	b44.h	Pattern 1
5438	WKUP_LEN_P1_SHIFT	8	b44.h
5439	WKUP_LEN_D1	0x00008000	b44.h
5440	WKUP_LEN_P2_MASK	0x007f0000	b44.h	Pattern 2
5441	WKUP_LEN_P2_SHIFT	16	b44.h
5442	WKUP_LEN_D2	0x00000000	b44.h
5443	WKUP_LEN_P3_MASK	0x7f000000	b44.h	Pattern 3
5444	WKUP_LEN_P3_SHIFT	24	b44.h
5445	WKUP_LEN_D3	0x80000000	b44.h
5446	WKUP_LEN_DISABLE	0x80808080	b44.h
5447	WKUP_LEN_ENABLE_TWO	0x80800000	b44.h
5448	WKUP_LEN_ENABLE_THREE	0x80000000	b44.h
5449	B44_ISTAT	0x0020UL	b44.h	Interrupt Status
5450	ISTAT_LS	0x00000020	b44.h	Link Change (B0 only)
5451	ISTAT_PME	0x00000040	b44.h	Power Management Event
5452	ISTAT_TO	0x00000080	b44.h	General Purpose Timeout
5453	ISTAT_DSCE	0x00000400	b44.h	Descriptor Error
5454	ISTAT_DATAE	0x00000800	b44.h	Data Error
5455	ISTAT_DPE	0x00001000	b44.h	Descr. Protocol Error
5456	ISTAT_RDU	0x00002000	b44.h	Receive Descr. Underflow
5457	ISTAT_RFO	0x00004000	b44.h	Receive FIFO Overflow
5458	ISTAT_TFU	0x00008000	b44.h	Transmit FIFO Underflow
5459	ISTAT_RX	0x00010000	b44.h	RX Interrupt
5460	ISTAT_TX	0x01000000	b44.h	TX Interrupt
5461	ISTAT_EMAC	0x04000000	b44.h	EMAC Interrupt
5462	ISTAT_MII_WRITE	0x08000000	b44.h	MII Write Interrupt
5463	ISTAT_MII_READ	0x10000000	b44.h	MII Read Interrupt
5464	ISTAT_ERRORS	(ISTAT_DSCE\|ISTAT_DATAE\|ISTAT_DPE\|\ ISTAT_RDU\|ISTAT_RFO\|ISTAT_TFU)	b44.h
5465	B44_IMASK	0x0024UL	b44.h	Interrupt Mask
5466	IMASK_DEF	(ISTAT_ERRORS \| ISTAT_RX \| ISTAT_TX)	b44.h
5467	IMASK_DISABLE	0	b44.h
5468	B44_GPTIMER	0x0028UL	b44.h	General Purpose Timer
5469	B44_ADDR_LO	0x0088UL	b44.h	ENET Address Lo (B0 only)
5470	B44_ADDR_HI	0x008CUL	b44.h	ENET Address Hi (B0 only)
5471	B44_FILT_ADDR	0x0090UL	b44.h	ENET Filter Address
5472	B44_FILT_DATA	0x0094UL	b44.h	ENET Filter Data
5473	B44_TXBURST	0x00A0UL	b44.h	TX Max Burst Length
5474	B44_RXBURST	0x00A4UL	b44.h	RX Max Burst Length
5475	B44_MAC_CTRL	0x00A8UL	b44.h	MAC Control
5476	MAC_CTRL_CRC32_ENAB	0x00000001	b44.h	CRC32 Generation Enable
5477	MAC_CTRL_PHY_PDOWN	0x00000004	b44.h	Onchip EPHY Powerdown
5478	MAC_CTRL_PHY_EDET	0x00000008	b44.h	Onchip EPHY Energy Detected
5479	MAC_CTRL_PHY_LEDCTRL	0x000000e0	b44.h	Onchip EPHY LED Control
5480	MAC_CTRL_PHY_LEDCTRL_SHIFT	5	b44.h
5481	B44_MAC_FLOW	0x00ACUL	b44.h	MAC Flow Control
5482	MAC_FLOW_RX_HI_WATER	0x000000ff	b44.h	Receive FIFO HI Water Mark
5483	MAC_FLOW_PAUSE_ENAB	0x00008000	b44.h	Enbl Pause Frm Generation
5484	B44_RCV_LAZY	0x0100UL	b44.h	Lazy Interrupt Control
5485	RCV_LAZY_TO_MASK	0x00ffffff	b44.h	Timeout
5486	RCV_LAZY_FC_MASK	0xff000000	b44.h	Frame Count
5487	RCV_LAZY_FC_SHIFT	24	b44.h
5488	B44_DMATX_CTRL	0x0200UL	b44.h	DMA TX Control
5489	DMATX_CTRL_ENABLE	0x00000001	b44.h	Enable
5490	DMATX_CTRL_SUSPEND	0x00000002	b44.h	Suepend Request
5491	DMATX_CTRL_LPBACK	0x00000004	b44.h	Loopback Enable
5492	DMATX_CTRL_FAIRPRIOR	0x00000008	b44.h	Fair Priority
5493	DMATX_CTRL_FLUSH	0x00000010	b44.h	Flush Request
5494	B44_DMATX_ADDR	0x0204UL	b44.h	DMA TX Descriptor Ring Addr
5495	B44_DMATX_PTR	0x0208UL	b44.h	DMA TX Last Posted Desc.
5496	B44_DMATX_STAT	0x020CUL	b44.h	DMA TX Cur Actve Desc. + Sts
5497	DMATX_STAT_CDMASK	0x00000fff	b44.h	Current Descriptor Mask
5498	DMATX_STAT_SMASK	0x0000f000	b44.h	State Mask
5499	DMATX_STAT_SDISABLED	0x00000000	b44.h	State Disabled
5500	DMATX_STAT_SACTIVE	0x00001000	b44.h	State Active
5501	DMATX_STAT_SIDLE	0x00002000	b44.h	State Idle Wait
5502	DMATX_STAT_SSTOPPED	0x00003000	b44.h	State Stopped
5503	DMATX_STAT_SSUSP	0x00004000	b44.h	State Suspend Pending
5504	DMATX_STAT_EMASK	0x000f0000	b44.h	Error Mask
5505	DMATX_STAT_ENONE	0x00000000	b44.h	Error None
5506	DMATX_STAT_EDPE	0x00010000	b44.h	Error Desc. Protocol Error
5507	DMATX_STAT_EDFU	0x00020000	b44.h	Error Data FIFO Underrun
5508	DMATX_STAT_EBEBR	0x00030000	b44.h	Bus Error on Buffer Read
5509	DMATX_STAT_EBEDA	0x00040000	b44.h	Bus Error on Desc. Access
5510	DMATX_STAT_FLUSHED	0x00100000	b44.h	Flushed
5511	B44_DMARX_CTRL	0x0210UL	b44.h	DMA RX Control
5512	DMARX_CTRL_ENABLE	0x00000001	b44.h	Enable
5513	DMARX_CTRL_ROMASK	0x000000fe	b44.h	Receive Offset Mask
5514	DMARX_CTRL_ROSHIFT	1	b44.h	Receive Offset Shift
5515	B44_DMARX_ADDR	0x0214UL	b44.h	DMA RX Descriptor Ring Addr
5516	B44_DMARX_PTR	0x0218UL	b44.h	DMA RX Last Posted Desc
5517	B44_DMARX_STAT	0x021CUL	b44.h	Cur Active Desc. + Status
5518	DMARX_STAT_CDMASK	0x00000fff	b44.h	Current Descriptor Mask
5519	DMARX_STAT_SMASK	0x0000f000	b44.h	State Mask
5520	DMARX_STAT_SDISABLED	0x00000000	b44.h	State Disbaled
5521	DMARX_STAT_SACTIVE	0x00001000	b44.h	State Active
5522	DMARX_STAT_SIDLE	0x00002000	b44.h	State Idle Wait
5523	DMARX_STAT_SSTOPPED	0x00003000	b44.h	State Stopped
5524	DMARX_STAT_EMASK	0x000f0000	b44.h	Error Mask
5525	DMARX_STAT_ENONE	0x00000000	b44.h	Error None
5526	DMARX_STAT_EDPE	0x00010000	b44.h	Error Desc. Protocol Error
5527	DMARX_STAT_EDFO	0x00020000	b44.h	Error Data FIFO Overflow
5528	DMARX_STAT_EBEBW	0x00030000	b44.h	Error on Buffer Write
5529	DMARX_STAT_EBEDA	0x00040000	b44.h	Bus Error on Desc. Access
5530	B44_DMAFIFO_AD	0x0220UL	b44.h	DMA FIFO Diag Address
5531	DMAFIFO_AD_OMASK	0x0000ffff	b44.h	Offset Mask
5532	DMAFIFO_AD_SMASK	0x000f0000	b44.h	Select Mask
5533	DMAFIFO_AD_SXDD	0x00000000	b44.h	Select Transmit DMA Data
5534	DMAFIFO_AD_SXDP	0x00010000	b44.h	Sel Transmit DMA Pointers
5535	DMAFIFO_AD_SRDD	0x00040000	b44.h	Select Receive DMA Data
5536	DMAFIFO_AD_SRDP	0x00050000	b44.h	Sel Receive DMA Pointers
5537	DMAFIFO_AD_SXFD	0x00080000	b44.h	Select Transmit FIFO Data
5538	DMAFIFO_AD_SXFP	0x00090000	b44.h	Sel Transmit FIFO Pointers
5539	DMAFIFO_AD_SRFD	0x000c0000	b44.h	Select Receive FIFO Data
5540	DMAFIFO_AD_SRFP	0x000c0000	b44.h	Sel Receive FIFO Pointers
5541	B44_DMAFIFO_LO	0x0224UL	b44.h	DMA FIFO Diag Low Data
5542	B44_DMAFIFO_HI	0x0228UL	b44.h	DMA FIFO Diag High Data
5543	B44_RXCONFIG	0x0400UL	b44.h	EMAC RX Config
5544	RXCONFIG_DBCAST	0x00000001	b44.h	Disable Broadcast
5545	RXCONFIG_ALLMULTI	0x00000002	b44.h	Accept All Multicast
5546	RXCONFIG_NORX_WHILE_TX	0x00000004	b44.h	Rcv Disble While TX
5547	RXCONFIG_PROMISC	0x00000008	b44.h	Promiscuous Enable
5548	RXCONFIG_LPBACK	0x00000010	b44.h	Loopback Enable
5549	RXCONFIG_FLOW	0x00000020	b44.h	Flow Control Enable
5550	RXCONFIG_FLOW_ACCEPT	0x00000040	b44.h	Accept UFC Frame
5551	RXCONFIG_RFILT	0x00000080	b44.h	Reject Filter
5552	B44_RXMAXLEN	0x0404UL	b44.h	EMAC RX Max Packet Length
5553	B44_TXMAXLEN	0x0408UL	b44.h	EMAC TX Max Packet Length
5554	B44_MDIO_CTRL	0x0410UL	b44.h	EMAC MDIO Control
5555	MDIO_CTRL_MAXF_MASK	0x0000007f	b44.h	MDC Frequency
5556	MDIO_CTRL_PREAMBLE	0x00000080	b44.h	MII Preamble Enable
5557	B44_MDIO_DATA	0x0414UL	b44.h	EMAC MDIO Data
5558	MDIO_DATA_DATA	0x0000ffff	b44.h	R/W Data
5559	MDIO_DATA_TA_MASK	0x00030000	b44.h	Turnaround Value
5560	MDIO_DATA_TA_SHIFT	16	b44.h
5561	MDIO_TA_VALID	2	b44.h
5562	MDIO_DATA_RA_MASK	0x007c0000	b44.h	Register Address
5563	MDIO_DATA_RA_SHIFT	18	b44.h
5564	MDIO_DATA_PMD_MASK	0x0f800000	b44.h	Physical Media Device
5565	MDIO_DATA_PMD_SHIFT	23	b44.h
5566	MDIO_DATA_OP_MASK	0x30000000	b44.h	Opcode
5567	MDIO_DATA_OP_SHIFT	28	b44.h
5568	MDIO_OP_WRITE	1	b44.h
5569	MDIO_OP_READ	2	b44.h
5570	MDIO_DATA_SB_MASK	0xc0000000	b44.h	Start Bits
5571	MDIO_DATA_SB_SHIFT	30	b44.h
5572	MDIO_DATA_SB_START	0x40000000	b44.h	Start Of Frame
5573	B44_EMAC_IMASK	0x0418UL	b44.h	EMAC Interrupt Mask
5574	B44_EMAC_ISTAT	0x041CUL	b44.h	EMAC Interrupt Status
5575	EMAC_INT_MII	0x00000001	b44.h	MII MDIO Interrupt
5576	EMAC_INT_MIB	0x00000002	b44.h	MIB Interrupt
5577	EMAC_INT_FLOW	0x00000003	b44.h	Flow Control Interrupt
5578	B44_CAM_DATA_LO	0x0420UL	b44.h	EMAC CAM Data Low
5579	B44_CAM_DATA_HI	0x0424UL	b44.h	EMAC CAM Data High
5580	CAM_DATA_HI_VALID	0x00010000	b44.h	Valid Bit
5581	B44_CAM_CTRL	0x0428UL	b44.h	EMAC CAM Control
5582	CAM_CTRL_ENABLE	0x00000001	b44.h	CAM Enable
5583	CAM_CTRL_MSEL	0x00000002	b44.h	Mask Select
5584	CAM_CTRL_READ	0x00000004	b44.h	Read
5585	CAM_CTRL_WRITE	0x00000008	b44.h	Read
5586	CAM_CTRL_INDEX_MASK	0x003f0000	b44.h	Index Mask
5587	CAM_CTRL_INDEX_SHIFT	16	b44.h
5588	CAM_CTRL_BUSY	0x80000000	b44.h	CAM Busy
5589	B44_ENET_CTRL	0x042CUL	b44.h	EMAC ENET Control
5590	ENET_CTRL_ENABLE	0x00000001	b44.h	EMAC Enable
5591	ENET_CTRL_DISABLE	0x00000002	b44.h	EMAC Disable
5592	ENET_CTRL_SRST	0x00000004	b44.h	EMAC Soft Reset
5593	ENET_CTRL_EPSEL	0x00000008	b44.h	External PHY Select
5594	B44_TX_CTRL	0x0430UL	b44.h	EMAC TX Control
5595	TX_CTRL_DUPLEX	0x00000001	b44.h	Full Duplex
5596	TX_CTRL_FMODE	0x00000002	b44.h	Flow Mode
5597	TX_CTRL_SBENAB	0x00000004	b44.h	Single Backoff Enable
5598	TX_CTRL_SMALL_SLOT	0x00000008	b44.h	Small Slottime
5599	B44_TX_HIWMARK	0x0434UL	b44.h	EMAC TX High Watermark
5600	TX_HIWMARK_DEFLT	56	b44.h	Default used in all drivers
5601	B44_MIB_CTRL	0x0438UL	b44.h	EMAC MIB Control
5602	MIB_CTRL_CLR_ON_READ	0x00000001	b44.h	Autoclear on Read
5603	B44_TX_GOOD_O	0x0500UL	b44.h	MIB TX Good Octets
5604	B44_TX_GOOD_P	0x0504UL	b44.h	MIB TX Good Packets
5605	B44_TX_O	0x0508UL	b44.h	MIB TX Octets
5606	B44_TX_P	0x050CUL	b44.h	MIB TX Packets
5607	B44_TX_BCAST	0x0510UL	b44.h	MIB TX Broadcast Packets
5608	B44_TX_MCAST	0x0514UL	b44.h	MIB TX Multicast Packets
5609	B44_TX_64	0x0518UL	b44.h	MIB TX <= 64 byte Packets
5610	B44_TX_65_127	0x051CUL	b44.h	MIB TX 65 to 127 byte Pkts
5611	B44_TX_128_255	0x0520UL	b44.h	MIB TX 128 to 255 byte Pkts
5612	B44_TX_256_511	0x0524UL	b44.h	MIB TX 256 to 511 byte Pkts
5613	B44_TX_512_1023	0x0528UL	b44.h	MIB TX 512 to 1023 byte Pkts
5614	B44_TX_1024_MAX	0x052CUL	b44.h	MIB TX 1024 to max byte Pkts
5615	B44_TX_JABBER	0x0530UL	b44.h	MIB TX Jabber Packets
5616	B44_TX_OSIZE	0x0534UL	b44.h	MIB TX Oversize Packets
5617	B44_TX_FRAG	0x0538UL	b44.h	MIB TX Fragment Packets
5618	B44_TX_URUNS	0x053CUL	b44.h	MIB TX Underruns
5619	B44_TX_TCOLS	0x0540UL	b44.h	MIB TX Total Collisions
5620	B44_TX_SCOLS	0x0544UL	b44.h	MIB TX Single Collisions
5621	B44_TX_MCOLS	0x0548UL	b44.h	MIB TX Multiple Collisions
5622	B44_TX_ECOLS	0x054CUL	b44.h	MIB TX Excessive Collisions
5623	B44_TX_LCOLS	0x0550UL	b44.h	MIB TX Late Collisions
5624	B44_TX_DEFERED	0x0554UL	b44.h	MIB TX Defered Packets
5625	B44_TX_CLOST	0x0558UL	b44.h	MIB TX Carrier Lost
5626	B44_TX_PAUSE	0x055CUL	b44.h	MIB TX Pause Packets
5627	B44_RX_GOOD_O	0x0580UL	b44.h	MIB RX Good Octets
5628	B44_RX_GOOD_P	0x0584UL	b44.h	MIB RX Good Packets
5629	B44_RX_O	0x0588UL	b44.h	MIB RX Octets
5630	B44_RX_P	0x058CUL	b44.h	MIB RX Packets
5631	B44_RX_BCAST	0x0590UL	b44.h	MIB RX Broadcast Packets
5632	B44_RX_MCAST	0x0594UL	b44.h	MIB RX Multicast Packets
5633	B44_RX_64	0x0598UL	b44.h	MIB RX <= 64 byte Packets
5634	B44_RX_65_127	0x059CUL	b44.h	MIB RX 65 to 127 byte Pkts
5635	B44_RX_128_255	0x05A0UL	b44.h	MIB RX 128 to 255 byte Pkts
5636	B44_RX_256_511	0x05A4UL	b44.h	MIB RX 256 to 511 byte Pkts
5637	B44_RX_512_1023	0x05A8UL	b44.h	MIB RX 512 to 1023 byte Pkts
5638	B44_RX_1024_MAX	0x05ACUL	b44.h	MIB RX 1024 to max byte Pkts
5639	B44_RX_JABBER	0x05B0UL	b44.h	MIB RX Jabber Packets
5640	B44_RX_OSIZE	0x05B4UL	b44.h	MIB RX Oversize Packets
5641	B44_RX_FRAG	0x05B8UL	b44.h	MIB RX Fragment Packets
5642	B44_RX_MISS	0x05BCUL	b44.h	MIB RX Missed Packets
5643	B44_RX_CRCA	0x05C0UL	b44.h	MIB RX CRC Align Errors
5644	B44_RX_USIZE	0x05C4UL	b44.h	MIB RX Undersize Packets
5645	B44_RX_CRC	0x05C8UL	b44.h	MIB RX CRC Errors
5646	B44_RX_ALIGN	0x05CCUL	b44.h	MIB RX Align Errors
5647	B44_RX_SYM	0x05D0UL	b44.h	MIB RX Symbol Errors
5648	B44_RX_PAUSE	0x05D4UL	b44.h	MIB RX Pause Packets
5649	B44_RX_NPAUSE	0x05D8UL	b44.h	MIB RX Non-Pause Packets
5650	B44_SBIMSTATE	0x0F90UL	b44.h	SB Initiator Agent State
5651	SBIMSTATE_PC	0x0000000f	b44.h	Pipe Count
5652	SBIMSTATE_AP_MASK	0x00000030	b44.h	Arbitration Priority
5653	SBIMSTATE_AP_BOTH	0x00000000	b44.h	both timeslices and token
5654	SBIMSTATE_AP_TS	0x00000010	b44.h	Use timeslices only
5655	SBIMSTATE_AP_TK	0x00000020	b44.h	Use token only
5656	SBIMSTATE_AP_RSV	0x00000030	b44.h	Reserved
5657	SBIMSTATE_IBE	0x00020000	b44.h	In Band Error
5658	SBIMSTATE_TO	0x00040000	b44.h	Timeout
5659	SBIMSTATE_BAD	( SBIMSTATE_IBE \| SBIMSTATE_TO )	b44.h
5660	B44_SBINTVEC	0x0F94UL	b44.h	SB Interrupt Mask
5661	SBINTVEC_PCI	0x00000001	b44.h	Enable interrupts for PCI
5662	SBINTVEC_ENET0	0x00000002	b44.h	Enable ints for enet 0
5663	SBINTVEC_ILINE20	0x00000004	b44.h	Enable ints for iline20
5664	SBINTVEC_CODEC	0x00000008	b44.h	Enable ints for v90 codec
5665	SBINTVEC_USB	0x00000010	b44.h	Enable intts for usb
5666	SBINTVEC_EXTIF	0x00000020	b44.h	Enable ints for ext i/f
5667	SBINTVEC_ENET1	0x00000040	b44.h	Enable ints for enet 1
5668	B44_SBTMSLOW	0x0F98UL	b44.h	SB Target State Low
5669	SBTMSLOW_RESET	0x00000001	b44.h	Reset
5670	SBTMSLOW_REJECT	0x00000002	b44.h	Reject
5671	SBTMSLOW_CLOCK	0x00010000	b44.h	Clock Enable
5672	SBTMSLOW_FGC	0x00020000	b44.h	Force Gated Clocks On
5673	SBTMSLOW_PE	0x40000000	b44.h	Power Management Enable
5674	SBTMSLOW_BE	0x80000000	b44.h	BIST Enable
5675	B44_SBTMSHIGH	0x0F9CUL	b44.h	SB Target State High
5676	SBTMSHIGH_SERR	0x00000001	b44.h	S-error
5677	SBTMSHIGH_INT	0x00000002	b44.h	Interrupt
5678	SBTMSHIGH_BUSY	0x00000004	b44.h	Busy
5679	SBTMSHIGH_GCR	0x20000000	b44.h	Gated Clock Request
5680	SBTMSHIGH_BISTF	0x40000000	b44.h	BIST Failed
5681	SBTMSHIGH_BISTD	0x80000000	b44.h	BIST Done
5682	B44_SBIDHIGH	0x0FFCUL	b44.h	SB Identification High
5683	SBIDHIGH_RC_MASK	0x0000000f	b44.h	Revision Code
5684	SBIDHIGH_CC_MASK	0x0000fff0	b44.h	Core Code
5685	SBIDHIGH_CC_SHIFT	4	b44.h
5686	SBIDHIGH_VC_MASK	0xffff0000	b44.h	Vendor Code
5687	SBIDHIGH_VC_SHIFT	16	b44.h
5688	SSB_PMCSR	0x44	b44.h
5689	SSB_PE	0x100	b44.h
5690	SSB_BAR0_WIN	0x80	b44.h
5691	SSB_BAR1_WIN	0x84	b44.h
5692	SSB_SPROM_CONTROL	0x88	b44.h
5693	SSB_BAR1_CONTROL	0x8c	b44.h
5694	SSB_CONTROL	0x0000UL	b44.h
5695	SSB_ARBCONTROL	0x0010UL	b44.h
5696	SSB_ISTAT	0x0020UL	b44.h
5697	SSB_IMASK	0x0024UL	b44.h
5698	SSB_MBOX	0x0028UL	b44.h
5699	SSB_BCAST_ADDR	0x0050UL	b44.h
5700	SSB_BCAST_DATA	0x0054UL	b44.h
5701	SSB_PCI_TRANS_0	0x0100UL	b44.h
5702	SSB_PCI_TRANS_1	0x0104UL	b44.h
5703	SSB_PCI_TRANS_2	0x0108UL	b44.h
5704	SSB_SPROM	0x0800UL	b44.h
5705	SSB_PCI_MEM	0x00000000	b44.h
5706	SSB_PCI_IO	0x00000001	b44.h
5707	SSB_PCI_CFG0	0x00000002	b44.h
5708	SSB_PCI_CFG1	0x00000003	b44.h
5709	SSB_PCI_PREF	0x00000004	b44.h
5710	SSB_PCI_BURST	0x00000008	b44.h
5711	SSB_PCI_MASK0	0xfc000000	b44.h
5712	SSB_PCI_MASK1	0xfc000000	b44.h
5713	SSB_PCI_MASK2	0xc0000000	b44.h
5714	B44_MII_AUXCTRL	24	b44.h	Auxiliary Control
5715	MII_AUXCTRL_DUPLEX	0x0001	b44.h	Full Duplex
5716	MII_AUXCTRL_SPEED	0x0002	b44.h	1=100Mbps, 0=10Mbps
5717	MII_AUXCTRL_FORCED	0x0004	b44.h	Forced 10/100
5718	B44_MII_ALEDCTRL	26	b44.h	Activity LED
5719	MII_ALEDCTRL_ALLMSK	0x7fff	b44.h
5720	B44_MII_TLEDCTRL	27	b44.h	Traffic Meter LED
5721	MII_TLEDCTRL_ENABLE	0x0040	b44.h
5722	B44_DMA_ALIGNMENT	4096	b44.h
5723	B44_30BIT_DMA_MASK	0x3fffffff	b44.h
5724	DESC_CTRL_LEN	0x00001fff	b44.h
5725	DESC_CTRL_CMASK	0x0ff00000	b44.h	Core specific bits
5726	DESC_CTRL_EOT	0x10000000	b44.h	End of Table
5727	DESC_CTRL_IOC	0x20000000	b44.h	Interrupt On Completion
5728	DESC_CTRL_EOF	0x40000000	b44.h	End of Frame
5729	DESC_CTRL_SOF	0x80000000	b44.h	Start of Frame
5730	RX_HEADER_LEN	28	b44.h
5731	RX_FLAG_OFIFO	0x00000001	b44.h	FIFO Overflow
5732	RX_FLAG_CRCERR	0x00000002	b44.h	CRC Error
5733	RX_FLAG_SERR	0x00000004	b44.h	Receive Symbol Error
5734	RX_FLAG_ODD	0x00000008	b44.h	Frame has odd number of nibbles
5735	RX_FLAG_LARGE	0x00000010	b44.h	Frame is > RX MAX Length
5736	RX_FLAG_MCAST	0x00000020	b44.h	Dest is Multicast Address
5737	RX_FLAG_BCAST	0x00000040	b44.h	Dest is Broadcast Address
5738	RX_FLAG_MISS	0x00000080	b44.h	Received due to promisc mode
5739	RX_FLAG_LAST	0x00000800	b44.h	Last buffer in frame
5740	RX_FLAG_ERRORS	(RX_FLAG_ODD \| RX_FLAG_SERR \|\ RX_FLAG_CRCERR \| RX_FLAG_OFIFO)	b44.h
5741	SB_PCI_DMA	0x40000000	b44.h
5742	BCM4400_PCI_CORE_ADDR	0x18002000	b44.h
5743	B44_MIN_MTU	60	b44.h
5744	B44_MAX_MTU	1500	b44.h
5745	B44_RING_SIZE	8	b44.h
5746	B44_RING_LAST	( B44_RING_SIZE - 1 )	b44.h
5747	B44_RX_RING_LEN_BYTES	( sizeof bp->rx[0] * B44_RING_SIZE )	b44.h
5748	B44_TX_RING_LEN_BYTES	( sizeof bp->tx[0] * B44_RING_SIZE )	b44.h
5749	RX_PKT_OFFSET	30	b44.h
5750	RX_PKT_BUF_SZ	(1536 + RX_PKT_OFFSET + 64)	b44.h
5751	B44_FULL_RESET	1	b44.h
5752	B44_FULL_RESET_SKIP_PHY	2	b44.h
5753	B44_PARTIAL_RESET	3	b44.h
5754	B44_CHIP_RESET_FULL	4	b44.h
5755	B44_CHIP_RESET_PARTIAL	5	b44.h
5756	SSB_CORE_DOWN	( SBTMSLOW_RESET \| SBTMSLOW_REJECT )	b44.h
5757	B44_REGS_SIZE	8192	b44.h
5758	L1_CACHE_BYTES	128	bnx2.h	Rough approximaition of the cache line size
5759	PCI_D0	((pci_power_t) 0)	bnx2.h
5760	PCI_D1	((pci_power_t) 1)	bnx2.h
5761	PCI_D2	((pci_power_t) 2)	bnx2.h
5762	PCI_D3hot	((pci_power_t) 3)	bnx2.h
5763	PCI_D3cold	((pci_power_t) 4)	bnx2.h
5764	PCI_UNKNOWN	((pci_power_t) 5)	bnx2.h
5765	PCI_POWER_ERROR	((pci_power_t) -1)	bnx2.h
5766	PCI_CAP_ID_PCIX	0x07	bnx2.h	PCI-X
5767	PCI_X_CMD	2	bnx2.h	Modes & Features
5768	PCI_X_CMD_ERO	0x0002	bnx2.h	Enable Relaxed Ordering
5769	ADVERTISED_10baseT_Half	(1 << 0)	bnx2.h
5770	ADVERTISED_10baseT_Full	(1 << 1)	bnx2.h
5771	ADVERTISED_100baseT_Half	(1 << 2)	bnx2.h
5772	ADVERTISED_100baseT_Full	(1 << 3)	bnx2.h
5773	ADVERTISED_1000baseT_Half	(1 << 4)	bnx2.h
5774	ADVERTISED_1000baseT_Full	(1 << 5)	bnx2.h
5775	ADVERTISED_Autoneg	(1 << 6)	bnx2.h
5776	ADVERTISED_TP	(1 << 7)	bnx2.h
5777	ADVERTISED_AUI	(1 << 8)	bnx2.h
5778	ADVERTISED_MII	(1 << 9)	bnx2.h
5779	ADVERTISED_FIBRE	(1 << 10)	bnx2.h
5780	ADVERTISED_BNC	(1 << 11)	bnx2.h
5781	DUPLEX_HALF	0x00	bnx2.h
5782	DUPLEX_FULL	0x01	bnx2.h
5783	DUPLEX_INVALID	0x02	bnx2.h
5784	PORT_TP	0x00	bnx2.h
5785	PORT_AUI	0x01	bnx2.h
5786	PORT_MII	0x02	bnx2.h
5787	PORT_FIBRE	0x03	bnx2.h
5788	PORT_BNC	0x04	bnx2.h
5789	XCVR_INTERNAL	0x00	bnx2.h
5790	XCVR_EXTERNAL	0x01	bnx2.h
5791	XCVR_DUMMY1	0x02	bnx2.h
5792	XCVR_DUMMY2	0x03	bnx2.h
5793	XCVR_DUMMY3	0x04	bnx2.h
5794	AUTONEG_DISABLE	0x00	bnx2.h
5795	AUTONEG_ENABLE	0x01	bnx2.h
5796	WAKE_PHY	(1 << 0)	bnx2.h
5797	WAKE_UCAST	(1 << 1)	bnx2.h
5798	WAKE_MCAST	(1 << 2)	bnx2.h
5799	WAKE_BCAST	(1 << 3)	bnx2.h
5800	WAKE_ARP	(1 << 4)	bnx2.h
5801	WAKE_MAGIC	(1 << 5)	bnx2.h
5802	WAKE_MAGICSECURE	(1 << 6)	bnx2.h	only meaningful if WAKE_MAGIC
5803	SPEED_10	10	bnx2.h
5804	SPEED_100	100	bnx2.h
5805	SPEED_1000	1000	bnx2.h
5806	SPEED_2500	2500	bnx2.h
5807	SPEED_INVALID	0	bnx2.h	XXX was 3
5808	DUPLEX_HALF	0x00	bnx2.h
5809	DUPLEX_FULL	0x01	bnx2.h
5810	DUPLEX_INVALID	0x02	bnx2.h
5811	PORT_TP	0x00	bnx2.h
5812	PORT_AUI	0x01	bnx2.h
5813	PORT_MII	0x02	bnx2.h
5814	PORT_FIBRE	0x03	bnx2.h
5815	PORT_BNC	0x04	bnx2.h
5816	XCVR_INTERNAL	0x00	bnx2.h
5817	XCVR_EXTERNAL	0x01	bnx2.h
5818	XCVR_DUMMY1	0x02	bnx2.h
5819	XCVR_DUMMY2	0x03	bnx2.h
5820	XCVR_DUMMY3	0x04	bnx2.h
5821	AUTONEG_DISABLE	0x00	bnx2.h
5822	AUTONEG_ENABLE	0x01	bnx2.h
5823	WAKE_PHY	(1 << 0)	bnx2.h
5824	WAKE_UCAST	(1 << 1)	bnx2.h
5825	WAKE_MCAST	(1 << 2)	bnx2.h
5826	WAKE_BCAST	(1 << 3)	bnx2.h
5827	WAKE_ARP	(1 << 4)	bnx2.h
5828	WAKE_MAGIC	(1 << 5)	bnx2.h
5829	WAKE_MAGICSECURE	(1 << 6)	bnx2.h	only meaningful if WAKE_MAGIC
5830	BNX2_L2CTX_TYPE	0x00000000	bnx2.h
5831	BNX2_L2CTX_TYPE_SIZE_L2	((0xc0/0x20)<<16)	bnx2.h
5832	BNX2_L2CTX_TYPE_TYPE	(0xf<<28)	bnx2.h
5833	BNX2_L2CTX_TYPE_TYPE_EMPTY	(0<<28)	bnx2.h
5834	BNX2_L2CTX_TYPE_TYPE_L2	(1<<28)	bnx2.h
5835	BNX2_L2CTX_TX_HOST_BIDX	0x00000088	bnx2.h
5836	BNX2_L2CTX_EST_NBD	0x00000088	bnx2.h
5837	BNX2_L2CTX_CMD_TYPE	0x00000088	bnx2.h
5838	BNX2_L2CTX_CMD_TYPE_TYPE	(0xf<<24)	bnx2.h
5839	BNX2_L2CTX_CMD_TYPE_TYPE_L2	(0<<24)	bnx2.h
5840	BNX2_L2CTX_CMD_TYPE_TYPE_TCP	(1<<24)	bnx2.h
5841	BNX2_L2CTX_TX_HOST_BSEQ	0x00000090	bnx2.h
5842	BNX2_L2CTX_TSCH_BSEQ	0x00000094	bnx2.h
5843	BNX2_L2CTX_TBDR_BSEQ	0x00000098	bnx2.h
5844	BNX2_L2CTX_TBDR_BOFF	0x0000009c	bnx2.h
5845	BNX2_L2CTX_TBDR_BIDX	0x0000009c	bnx2.h
5846	BNX2_L2CTX_TBDR_BHADDR_HI	0x000000a0	bnx2.h
5847	BNX2_L2CTX_TBDR_BHADDR_LO	0x000000a4	bnx2.h
5848	BNX2_L2CTX_TXP_BOFF	0x000000a8	bnx2.h
5849	BNX2_L2CTX_TXP_BIDX	0x000000a8	bnx2.h
5850	BNX2_L2CTX_TXP_BSEQ	0x000000ac	bnx2.h
5851	BNX2_L2CTX_BD_PRE_READ	0x00000000	bnx2.h
5852	BNX2_L2CTX_CTX_SIZE	0x00000000	bnx2.h
5853	BNX2_L2CTX_CTX_TYPE	0x00000000	bnx2.h
5854	BNX2_L2CTX_CTX_TYPE_SIZE_L2	((0x20/20)<<16)	bnx2.h
5855	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(0xf<<28)	bnx2.h
5856	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(0<<28)	bnx2.h
5857	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(1<<28)	bnx2.h
5858	BNX2_L2CTX_HOST_BDIDX	0x00000004	bnx2.h
5859	BNX2_L2CTX_HOST_BSEQ	0x00000008	bnx2.h
5860	BNX2_L2CTX_NX_BSEQ	0x0000000c	bnx2.h
5861	BNX2_L2CTX_NX_BDHADDR_HI	0x00000010	bnx2.h
5862	BNX2_L2CTX_NX_BDHADDR_LO	0x00000014	bnx2.h
5863	BNX2_L2CTX_NX_BDIDX	0x00000018	bnx2.h
5864	BNX2_PCICFG_MISC_CONFIG	0x00000068	bnx2.h
5865	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<2)	bnx2.h
5866	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<3)	bnx2.h
5867	BNX2_PCICFG_MISC_CONFIG_CLOCK_C	(1L<<5)	bnx2.h
5868	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<6)	bnx2.h
5869	BNX2_PCICFG_MISC_CONFIG_REG_WIN	(1L<<7)	bnx2.h
5870	BNX2_PCICFG_MISC_CONFIG_CORE_RS	(1L<<8)	bnx2.h
5871	BNX2_PCICFG_MISC_CONFIG_CORE_RS	(1L<<9)	bnx2.h
5872	BNX2_PCICFG_MISC_CONFIG_ASIC_ME	(0xffL<<16)	bnx2.h
5873	BNX2_PCICFG_MISC_CONFIG_ASIC_BA	(0xfL<<24)	bnx2.h
5874	BNX2_PCICFG_MISC_CONFIG_ASIC_ID	(0xfL<<28)	bnx2.h
5875	BNX2_PCICFG_MISC_STATUS	0x0000006c	bnx2.h
5876	BNX2_PCICFG_MISC_STATUS_INTA_VA	(1L<<0)	bnx2.h
5877	BNX2_PCICFG_MISC_STATUS_32BIT_D	(1L<<1)	bnx2.h
5878	BNX2_PCICFG_MISC_STATUS_M66EN	(1L<<2)	bnx2.h
5879	BNX2_PCICFG_MISC_STATUS_PCIX_DE	(1L<<3)	bnx2.h
5880	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(0x3L<<4)	bnx2.h
5881	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(0L<<4)	bnx2.h
5882	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(1L<<4)	bnx2.h
5883	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(2L<<4)	bnx2.h
5884	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(3L<<4)	bnx2.h
5885	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	0x00000070	bnx2.h
5886	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<0)	bnx2.h
5887	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<0)	bnx2.h
5888	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<0)	bnx2.h
5889	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<0)	bnx2.h
5890	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(3L<<0)	bnx2.h
5891	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<0)	bnx2.h
5892	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(5L<<0)	bnx2.h
5893	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(6L<<0)	bnx2.h
5894	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(7L<<0)	bnx2.h
5895	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<0)	bnx2.h
5896	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<6)	bnx2.h
5897	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<7)	bnx2.h
5898	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0x7L<<8)	bnx2.h
5899	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<8)	bnx2.h
5900	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<8)	bnx2.h
5901	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<8)	bnx2.h
5902	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<8)	bnx2.h
5903	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<11)	bnx2.h
5904	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<12)	bnx2.h
5905	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<12)	bnx2.h
5906	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<12)	bnx2.h
5907	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<12)	bnx2.h
5908	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<12)	bnx2.h
5909	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(8L<<12)	bnx2.h
5910	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<16)	bnx2.h
5911	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<17)	bnx2.h
5912	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<18)	bnx2.h
5913	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<19)	bnx2.h
5914	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfffL<<20)	bnx2.h
5915	BNX2_PCICFG_REG_WINDOW_ADDRESS	0x00000078	bnx2.h
5916	BNX2_PCICFG_REG_WINDOW	0x00000080	bnx2.h
5917	BNX2_PCICFG_INT_ACK_CMD	0x00000084	bnx2.h
5918	BNX2_PCICFG_INT_ACK_CMD_INDEX	(0xffffL<<0)	bnx2.h
5919	BNX2_PCICFG_INT_ACK_CMD_INDEX_V	(1L<<16)	bnx2.h
5920	BNX2_PCICFG_INT_ACK_CMD_USE_INT	(1L<<17)	bnx2.h
5921	BNX2_PCICFG_INT_ACK_CMD_MASK_IN	(1L<<18)	bnx2.h
5922	BNX2_PCICFG_STATUS_BIT_SET_CMD	0x00000088	bnx2.h
5923	BNX2_PCICFG_STATUS_BIT_CLEAR_CM	0x0000008c	bnx2.h
5924	BNX2_PCICFG_MAILBOX_QUEUE_ADDR	0x00000090	bnx2.h
5925	BNX2_PCICFG_MAILBOX_QUEUE_DATA	0x00000094	bnx2.h
5926	BNX2_PCI_GRC_WINDOW_ADDR	0x00000400	bnx2.h
5927	BNX2_PCI_GRC_WINDOW_ADDR_PCI_GR	(0x3ffffL<<8)	bnx2.h
5928	BNX2_PCI_CONFIG_1	0x00000404	bnx2.h
5929	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(0x7L<<8)	bnx2.h
5930	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(0L<<8)	bnx2.h
5931	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(1L<<8)	bnx2.h
5932	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(2L<<8)	bnx2.h
5933	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(3L<<8)	bnx2.h
5934	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(4L<<8)	bnx2.h
5935	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(5L<<8)	bnx2.h
5936	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(6L<<8)	bnx2.h
5937	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(7L<<8)	bnx2.h
5938	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(0x7L<<11)	bnx2.h
5939	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(0L<<11)	bnx2.h
5940	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(1L<<11)	bnx2.h
5941	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(2L<<11)	bnx2.h
5942	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(3L<<11)	bnx2.h
5943	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(4L<<11)	bnx2.h
5944	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(5L<<11)	bnx2.h
5945	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(6L<<11)	bnx2.h
5946	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(7L<<11)	bnx2.h
5947	BNX2_PCI_CONFIG_2	0x00000408	bnx2.h
5948	BNX2_PCI_CONFIG_2_BAR1_SIZE	(0xfL<<0)	bnx2.h
5949	BNX2_PCI_CONFIG_2_BAR1_SIZE_DIS	(0L<<0)	bnx2.h
5950	BNX2_PCI_CONFIG_2_BAR1_SIZE_64K	(1L<<0)	bnx2.h
5951	BNX2_PCI_CONFIG_2_BAR1_SIZE_128	(2L<<0)	bnx2.h
5952	BNX2_PCI_CONFIG_2_BAR1_SIZE_256	(3L<<0)	bnx2.h
5953	BNX2_PCI_CONFIG_2_BAR1_SIZE_512	(4L<<0)	bnx2.h
5954	BNX2_PCI_CONFIG_2_BAR1_SIZE_1M	(5L<<0)	bnx2.h
5955	BNX2_PCI_CONFIG_2_BAR1_SIZE_2M	(6L<<0)	bnx2.h
5956	BNX2_PCI_CONFIG_2_BAR1_SIZE_4M	(7L<<0)	bnx2.h
5957	BNX2_PCI_CONFIG_2_BAR1_SIZE_8M	(8L<<0)	bnx2.h
5958	BNX2_PCI_CONFIG_2_BAR1_SIZE_16M	(9L<<0)	bnx2.h
5959	BNX2_PCI_CONFIG_2_BAR1_SIZE_32M	(10L<<0)	bnx2.h
5960	BNX2_PCI_CONFIG_2_BAR1_SIZE_64M	(11L<<0)	bnx2.h
5961	BNX2_PCI_CONFIG_2_BAR1_SIZE_128	(12L<<0)	bnx2.h
5962	BNX2_PCI_CONFIG_2_BAR1_SIZE_256	(13L<<0)	bnx2.h
5963	BNX2_PCI_CONFIG_2_BAR1_SIZE_512	(14L<<0)	bnx2.h
5964	BNX2_PCI_CONFIG_2_BAR1_SIZE_1G	(15L<<0)	bnx2.h
5965	BNX2_PCI_CONFIG_2_BAR1_64ENA	(1L<<4)	bnx2.h
5966	BNX2_PCI_CONFIG_2_EXP_ROM_RETRY	(1L<<5)	bnx2.h
5967	BNX2_PCI_CONFIG_2_CFG_CYCLE_RET	(1L<<6)	bnx2.h
5968	BNX2_PCI_CONFIG_2_FIRST_CFG_DON	(1L<<7)	bnx2.h
5969	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE	(0xffL<<8)	bnx2.h
5970	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(0L<<8)	bnx2.h
5971	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(1L<<8)	bnx2.h
5972	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(2L<<8)	bnx2.h
5973	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(3L<<8)	bnx2.h
5974	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(4L<<8)	bnx2.h
5975	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(5L<<8)	bnx2.h
5976	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(6L<<8)	bnx2.h
5977	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(7L<<8)	bnx2.h
5978	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(8L<<8)	bnx2.h
5979	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(9L<<8)	bnx2.h
5980	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(10L<<8)	bnx2.h
5981	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(11L<<8)	bnx2.h
5982	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(12L<<8)	bnx2.h
5983	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(13L<<8)	bnx2.h
5984	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(14L<<8)	bnx2.h
5985	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(15L<<8)	bnx2.h
5986	BNX2_PCI_CONFIG_2_MAX_SPLIT_LIM	(0x1fL<<16)	bnx2.h
5987	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(0x3L<<21)	bnx2.h
5988	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(0L<<21)	bnx2.h
5989	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(1L<<21)	bnx2.h
5990	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(2L<<21)	bnx2.h
5991	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(3L<<21)	bnx2.h
5992	BNX2_PCI_CONFIG_2_FORCE_32_BIT_	(1L<<23)	bnx2.h
5993	BNX2_PCI_CONFIG_2_FORCE_32_BIT_	(1L<<24)	bnx2.h
5994	BNX2_PCI_CONFIG_2_KEEP_REQ_ASSE	(1L<<25)	bnx2.h
5995	BNX2_PCI_CONFIG_3	0x0000040c	bnx2.h
5996	BNX2_PCI_CONFIG_3_STICKY_BYTE	(0xffL<<0)	bnx2.h
5997	BNX2_PCI_CONFIG_3_FORCE_PME	(1L<<24)	bnx2.h
5998	BNX2_PCI_CONFIG_3_PME_STATUS	(1L<<25)	bnx2.h
5999	BNX2_PCI_CONFIG_3_PME_ENABLE	(1L<<26)	bnx2.h
6000	BNX2_PCI_CONFIG_3_PM_STATE	(0x3L<<27)	bnx2.h
6001	BNX2_PCI_CONFIG_3_VAUX_PRESET	(1L<<30)	bnx2.h
6002	BNX2_PCI_CONFIG_3_PCI_POWER	(1L<<31)	bnx2.h
6003	BNX2_PCI_PM_DATA_A	0x00000410	bnx2.h
6004	BNX2_PCI_PM_DATA_A_PM_DATA_0_PR	(0xffL<<0)	bnx2.h
6005	BNX2_PCI_PM_DATA_A_PM_DATA_1_PR	(0xffL<<8)	bnx2.h
6006	BNX2_PCI_PM_DATA_A_PM_DATA_2_PR	(0xffL<<16)	bnx2.h
6007	BNX2_PCI_PM_DATA_A_PM_DATA_3_PR	(0xffL<<24)	bnx2.h
6008	BNX2_PCI_PM_DATA_B	0x00000414	bnx2.h
6009	BNX2_PCI_PM_DATA_B_PM_DATA_4_PR	(0xffL<<0)	bnx2.h
6010	BNX2_PCI_PM_DATA_B_PM_DATA_5_PR	(0xffL<<8)	bnx2.h
6011	BNX2_PCI_PM_DATA_B_PM_DATA_6_PR	(0xffL<<16)	bnx2.h
6012	BNX2_PCI_PM_DATA_B_PM_DATA_7_PR	(0xffL<<24)	bnx2.h
6013	BNX2_PCI_SWAP_DIAG0	0x00000418	bnx2.h
6014	BNX2_PCI_SWAP_DIAG1	0x0000041c	bnx2.h
6015	BNX2_PCI_EXP_ROM_ADDR	0x00000420	bnx2.h
6016	BNX2_PCI_EXP_ROM_ADDR_ADDRESS	(0x3fffffL<<2)	bnx2.h
6017	BNX2_PCI_EXP_ROM_ADDR_REQ	(1L<<31)	bnx2.h
6018	BNX2_PCI_EXP_ROM_DATA	0x00000424	bnx2.h
6019	BNX2_PCI_VPD_INTF	0x00000428	bnx2.h
6020	BNX2_PCI_VPD_INTF_INTF_REQ	(1L<<0)	bnx2.h
6021	BNX2_PCI_VPD_ADDR_FLAG	0x0000042c	bnx2.h
6022	BNX2_PCI_VPD_ADDR_FLAG_ADDRESS	(0x1fff<<2)	bnx2.h
6023	BNX2_PCI_VPD_ADDR_FLAG_WR	(1<<15)	bnx2.h
6024	BNX2_PCI_VPD_DATA	0x00000430	bnx2.h
6025	BNX2_PCI_ID_VAL1	0x00000434	bnx2.h
6026	BNX2_PCI_ID_VAL1_DEVICE_ID	(0xffffL<<0)	bnx2.h
6027	BNX2_PCI_ID_VAL1_VENDOR_ID	(0xffffL<<16)	bnx2.h
6028	BNX2_PCI_ID_VAL2	0x00000438	bnx2.h
6029	BNX2_PCI_ID_VAL2_SUBSYSTEM_VEND	(0xffffL<<0)	bnx2.h
6030	BNX2_PCI_ID_VAL2_SUBSYSTEM_ID	(0xffffL<<16)	bnx2.h
6031	BNX2_PCI_ID_VAL3	0x0000043c	bnx2.h
6032	BNX2_PCI_ID_VAL3_CLASS_CODE	(0xffffffL<<0)	bnx2.h
6033	BNX2_PCI_ID_VAL3_REVISION_ID	(0xffL<<24)	bnx2.h
6034	BNX2_PCI_ID_VAL4	0x00000440	bnx2.h
6035	BNX2_PCI_ID_VAL4_CAP_ENA	(0xfL<<0)	bnx2.h
6036	BNX2_PCI_ID_VAL4_CAP_ENA_0	(0L<<0)	bnx2.h
6037	BNX2_PCI_ID_VAL4_CAP_ENA_1	(1L<<0)	bnx2.h
6038	BNX2_PCI_ID_VAL4_CAP_ENA_2	(2L<<0)	bnx2.h
6039	BNX2_PCI_ID_VAL4_CAP_ENA_3	(3L<<0)	bnx2.h
6040	BNX2_PCI_ID_VAL4_CAP_ENA_4	(4L<<0)	bnx2.h
6041	BNX2_PCI_ID_VAL4_CAP_ENA_5	(5L<<0)	bnx2.h
6042	BNX2_PCI_ID_VAL4_CAP_ENA_6	(6L<<0)	bnx2.h
6043	BNX2_PCI_ID_VAL4_CAP_ENA_7	(7L<<0)	bnx2.h
6044	BNX2_PCI_ID_VAL4_CAP_ENA_8	(8L<<0)	bnx2.h
6045	BNX2_PCI_ID_VAL4_CAP_ENA_9	(9L<<0)	bnx2.h
6046	BNX2_PCI_ID_VAL4_CAP_ENA_10	(10L<<0)	bnx2.h
6047	BNX2_PCI_ID_VAL4_CAP_ENA_11	(11L<<0)	bnx2.h
6048	BNX2_PCI_ID_VAL4_CAP_ENA_12	(12L<<0)	bnx2.h
6049	BNX2_PCI_ID_VAL4_CAP_ENA_13	(13L<<0)	bnx2.h
6050	BNX2_PCI_ID_VAL4_CAP_ENA_14	(14L<<0)	bnx2.h
6051	BNX2_PCI_ID_VAL4_CAP_ENA_15	(15L<<0)	bnx2.h
6052	BNX2_PCI_ID_VAL4_PM_SCALE_PRG	(0x3L<<6)	bnx2.h
6053	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0	(0L<<6)	bnx2.h
6054	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1	(1L<<6)	bnx2.h
6055	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2	(2L<<6)	bnx2.h
6056	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3	(3L<<6)	bnx2.h
6057	BNX2_PCI_ID_VAL4_MSI_LIMIT	(0x7L<<9)	bnx2.h
6058	BNX2_PCI_ID_VAL4_MSI_ADVERTIZE	(0x7L<<12)	bnx2.h
6059	BNX2_PCI_ID_VAL4_MSI_ENABLE	(1L<<15)	bnx2.h
6060	BNX2_PCI_ID_VAL4_MAX_64_ADVERTI	(1L<<16)	bnx2.h
6061	BNX2_PCI_ID_VAL4_MAX_133_ADVERT	(1L<<17)	bnx2.h
6062	BNX2_PCI_ID_VAL4_MAX_MEM_READ_S	(0x3L<<21)	bnx2.h
6063	BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE	(0x7L<<23)	bnx2.h
6064	BNX2_PCI_ID_VAL4_MAX_CUMULATIVE	(0x7L<<26)	bnx2.h
6065	BNX2_PCI_ID_VAL5	0x00000444	bnx2.h
6066	BNX2_PCI_ID_VAL5_D1_SUPPORT	(1L<<0)	bnx2.h
6067	BNX2_PCI_ID_VAL5_D2_SUPPORT	(1L<<1)	bnx2.h
6068	BNX2_PCI_ID_VAL5_PME_IN_D0	(1L<<2)	bnx2.h
6069	BNX2_PCI_ID_VAL5_PME_IN_D1	(1L<<3)	bnx2.h
6070	BNX2_PCI_ID_VAL5_PME_IN_D2	(1L<<4)	bnx2.h
6071	BNX2_PCI_ID_VAL5_PME_IN_D3_HOT	(1L<<5)	bnx2.h
6072	BNX2_PCI_PCIX_EXTENDED_STATUS	0x00000448	bnx2.h
6073	BNX2_PCI_PCIX_EXTENDED_STATUS_N	(1L<<8)	bnx2.h
6074	BNX2_PCI_PCIX_EXTENDED_STATUS_L	(1L<<9)	bnx2.h
6075	BNX2_PCI_PCIX_EXTENDED_STATUS_S	(0xfL<<16)	bnx2.h
6076	BNX2_PCI_PCIX_EXTENDED_STATUS_S	(0xffL<<24)	bnx2.h
6077	BNX2_PCI_ID_VAL6	0x0000044c	bnx2.h
6078	BNX2_PCI_ID_VAL6_MAX_LAT	(0xffL<<0)	bnx2.h
6079	BNX2_PCI_ID_VAL6_MIN_GNT	(0xffL<<8)	bnx2.h
6080	BNX2_PCI_ID_VAL6_BIST	(0xffL<<16)	bnx2.h
6081	BNX2_PCI_MSI_DATA	0x00000450	bnx2.h
6082	BNX2_PCI_MSI_DATA_PCI_MSI_DATA	(0xffffL<<0)	bnx2.h
6083	BNX2_PCI_MSI_ADDR_H	0x00000454	bnx2.h
6084	BNX2_PCI_MSI_ADDR_L	0x00000458	bnx2.h
6085	BNX2_MISC_COMMAND	0x00000800	bnx2.h
6086	BNX2_MISC_COMMAND_ENABLE_ALL	(1L<<0)	bnx2.h
6087	BNX2_MISC_COMMAND_DISABLE_ALL	(1L<<1)	bnx2.h
6088	BNX2_MISC_COMMAND_CORE_RESET	(1L<<4)	bnx2.h
6089	BNX2_MISC_COMMAND_HARD_RESET	(1L<<5)	bnx2.h
6090	BNX2_MISC_COMMAND_PAR_ERROR	(1L<<8)	bnx2.h
6091	BNX2_MISC_COMMAND_PAR_ERR_RAM	(0x7fL<<16)	bnx2.h
6092	BNX2_MISC_CFG	0x00000804	bnx2.h
6093	BNX2_MISC_CFG_PCI_GRC_TMOUT	(1L<<0)	bnx2.h
6094	BNX2_MISC_CFG_NVM_WR_EN	(0x3L<<1)	bnx2.h
6095	BNX2_MISC_CFG_NVM_WR_EN_PROTECT	(0L<<1)	bnx2.h
6096	BNX2_MISC_CFG_NVM_WR_EN_PCI	(1L<<1)	bnx2.h
6097	BNX2_MISC_CFG_NVM_WR_EN_ALLOW	(2L<<1)	bnx2.h
6098	BNX2_MISC_CFG_NVM_WR_EN_ALLOW2	(3L<<1)	bnx2.h
6099	BNX2_MISC_CFG_BIST_EN	(1L<<3)	bnx2.h
6100	BNX2_MISC_CFG_CK25_OUT_ALT_SRC	(1L<<4)	bnx2.h
6101	BNX2_MISC_CFG_BYPASS_BSCAN	(1L<<5)	bnx2.h
6102	BNX2_MISC_CFG_BYPASS_EJTAG	(1L<<6)	bnx2.h
6103	BNX2_MISC_CFG_CLK_CTL_OVERRIDE	(1L<<7)	bnx2.h
6104	BNX2_MISC_CFG_LEDMODE	(0x3L<<8)	bnx2.h
6105	BNX2_MISC_CFG_LEDMODE_MAC	(0L<<8)	bnx2.h
6106	BNX2_MISC_CFG_LEDMODE_GPHY1	(1L<<8)	bnx2.h
6107	BNX2_MISC_CFG_LEDMODE_GPHY2	(2L<<8)	bnx2.h
6108	BNX2_MISC_ID	0x00000808	bnx2.h
6109	BNX2_MISC_ID_BOND_ID	(0xfL<<0)	bnx2.h
6110	BNX2_MISC_ID_CHIP_METAL	(0xffL<<4)	bnx2.h
6111	BNX2_MISC_ID_CHIP_REV	(0xfL<<12)	bnx2.h
6112	BNX2_MISC_ID_CHIP_NUM	(0xffffL<<16)	bnx2.h
6113	BNX2_MISC_ENABLE_STATUS_BITS	0x0000080c	bnx2.h
6114	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<0)	bnx2.h
6115	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<1)	bnx2.h
6116	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<2)	bnx2.h
6117	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<3)	bnx2.h
6118	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<4)	bnx2.h
6119	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<5)	bnx2.h
6120	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<6)	bnx2.h
6121	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<7)	bnx2.h
6122	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<8)	bnx2.h
6123	BNX2_MISC_ENABLE_STATUS_BITS_EM	(1L<<9)	bnx2.h
6124	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<10)	bnx2.h
6125	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<11)	bnx2.h
6126	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<12)	bnx2.h
6127	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<13)	bnx2.h
6128	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<14)	bnx2.h
6129	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<15)	bnx2.h
6130	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<16)	bnx2.h
6131	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<17)	bnx2.h
6132	BNX2_MISC_ENABLE_STATUS_BITS_CO	(1L<<18)	bnx2.h
6133	BNX2_MISC_ENABLE_STATUS_BITS_HO	(1L<<19)	bnx2.h
6134	BNX2_MISC_ENABLE_STATUS_BITS_MA	(1L<<20)	bnx2.h
6135	BNX2_MISC_ENABLE_STATUS_BITS_CO	(1L<<21)	bnx2.h
6136	BNX2_MISC_ENABLE_STATUS_BITS_CM	(1L<<22)	bnx2.h
6137	BNX2_MISC_ENABLE_STATUS_BITS_CM	(1L<<23)	bnx2.h
6138	BNX2_MISC_ENABLE_STATUS_BITS_MG	(1L<<24)	bnx2.h
6139	BNX2_MISC_ENABLE_STATUS_BITS_TI	(1L<<25)	bnx2.h
6140	BNX2_MISC_ENABLE_STATUS_BITS_DM	(1L<<26)	bnx2.h
6141	BNX2_MISC_ENABLE_STATUS_BITS_UM	(1L<<27)	bnx2.h
6142	BNX2_MISC_ENABLE_SET_BITS	0x00000810	bnx2.h
6143	BNX2_MISC_ENABLE_SET_BITS_TX_SC	(1L<<0)	bnx2.h
6144	BNX2_MISC_ENABLE_SET_BITS_TX_BD	(1L<<1)	bnx2.h
6145	BNX2_MISC_ENABLE_SET_BITS_TX_BD	(1L<<2)	bnx2.h
6146	BNX2_MISC_ENABLE_SET_BITS_TX_PR	(1L<<3)	bnx2.h
6147	BNX2_MISC_ENABLE_SET_BITS_TX_DM	(1L<<4)	bnx2.h
6148	BNX2_MISC_ENABLE_SET_BITS_TX_PA	(1L<<5)	bnx2.h
6149	BNX2_MISC_ENABLE_SET_BITS_TX_PA	(1L<<6)	bnx2.h
6150	BNX2_MISC_ENABLE_SET_BITS_TX_HE	(1L<<7)	bnx2.h
6151	BNX2_MISC_ENABLE_SET_BITS_TX_AS	(1L<<8)	bnx2.h
6152	BNX2_MISC_ENABLE_SET_BITS_EMAC_	(1L<<9)	bnx2.h
6153	BNX2_MISC_ENABLE_SET_BITS_RX_PA	(1L<<10)	bnx2.h
6154	BNX2_MISC_ENABLE_SET_BITS_RX_PA	(1L<<11)	bnx2.h
6155	BNX2_MISC_ENABLE_SET_BITS_RX_MB	(1L<<12)	bnx2.h
6156	BNX2_MISC_ENABLE_SET_BITS_RX_LO	(1L<<13)	bnx2.h
6157	BNX2_MISC_ENABLE_SET_BITS_RX_PR	(1L<<14)	bnx2.h
6158	BNX2_MISC_ENABLE_SET_BITS_RX_V2	(1L<<15)	bnx2.h
6159	BNX2_MISC_ENABLE_SET_BITS_RX_BD	(1L<<16)	bnx2.h
6160	BNX2_MISC_ENABLE_SET_BITS_RX_DM	(1L<<17)	bnx2.h
6161	BNX2_MISC_ENABLE_SET_BITS_COMPL	(1L<<18)	bnx2.h
6162	BNX2_MISC_ENABLE_SET_BITS_HOST_	(1L<<19)	bnx2.h
6163	BNX2_MISC_ENABLE_SET_BITS_MAILB	(1L<<20)	bnx2.h
6164	BNX2_MISC_ENABLE_SET_BITS_CONTE	(1L<<21)	bnx2.h
6165	BNX2_MISC_ENABLE_SET_BITS_CMD_S	(1L<<22)	bnx2.h
6166	BNX2_MISC_ENABLE_SET_BITS_CMD_P	(1L<<23)	bnx2.h
6167	BNX2_MISC_ENABLE_SET_BITS_MGMT_	(1L<<24)	bnx2.h
6168	BNX2_MISC_ENABLE_SET_BITS_TIMER	(1L<<25)	bnx2.h
6169	BNX2_MISC_ENABLE_SET_BITS_DMA_E	(1L<<26)	bnx2.h
6170	BNX2_MISC_ENABLE_SET_BITS_UMP_E	(1L<<27)	bnx2.h
6171	BNX2_MISC_ENABLE_CLR_BITS	0x00000814	bnx2.h
6172	BNX2_MISC_ENABLE_CLR_BITS_TX_SC	(1L<<0)	bnx2.h
6173	BNX2_MISC_ENABLE_CLR_BITS_TX_BD	(1L<<1)	bnx2.h
6174	BNX2_MISC_ENABLE_CLR_BITS_TX_BD	(1L<<2)	bnx2.h
6175	BNX2_MISC_ENABLE_CLR_BITS_TX_PR	(1L<<3)	bnx2.h
6176	BNX2_MISC_ENABLE_CLR_BITS_TX_DM	(1L<<4)	bnx2.h
6177	BNX2_MISC_ENABLE_CLR_BITS_TX_PA	(1L<<5)	bnx2.h
6178	BNX2_MISC_ENABLE_CLR_BITS_TX_PA	(1L<<6)	bnx2.h
6179	BNX2_MISC_ENABLE_CLR_BITS_TX_HE	(1L<<7)	bnx2.h
6180	BNX2_MISC_ENABLE_CLR_BITS_TX_AS	(1L<<8)	bnx2.h
6181	BNX2_MISC_ENABLE_CLR_BITS_EMAC_	(1L<<9)	bnx2.h
6182	BNX2_MISC_ENABLE_CLR_BITS_RX_PA	(1L<<10)	bnx2.h
6183	BNX2_MISC_ENABLE_CLR_BITS_RX_PA	(1L<<11)	bnx2.h
6184	BNX2_MISC_ENABLE_CLR_BITS_RX_MB	(1L<<12)	bnx2.h
6185	BNX2_MISC_ENABLE_CLR_BITS_RX_LO	(1L<<13)	bnx2.h
6186	BNX2_MISC_ENABLE_CLR_BITS_RX_PR	(1L<<14)	bnx2.h
6187	BNX2_MISC_ENABLE_CLR_BITS_RX_V2	(1L<<15)	bnx2.h
6188	BNX2_MISC_ENABLE_CLR_BITS_RX_BD	(1L<<16)	bnx2.h
6189	BNX2_MISC_ENABLE_CLR_BITS_RX_DM	(1L<<17)	bnx2.h
6190	BNX2_MISC_ENABLE_CLR_BITS_COMPL	(1L<<18)	bnx2.h
6191	BNX2_MISC_ENABLE_CLR_BITS_HOST_	(1L<<19)	bnx2.h
6192	BNX2_MISC_ENABLE_CLR_BITS_MAILB	(1L<<20)	bnx2.h
6193	BNX2_MISC_ENABLE_CLR_BITS_CONTE	(1L<<21)	bnx2.h
6194	BNX2_MISC_ENABLE_CLR_BITS_CMD_S	(1L<<22)	bnx2.h
6195	BNX2_MISC_ENABLE_CLR_BITS_CMD_P	(1L<<23)	bnx2.h
6196	BNX2_MISC_ENABLE_CLR_BITS_MGMT_	(1L<<24)	bnx2.h
6197	BNX2_MISC_ENABLE_CLR_BITS_TIMER	(1L<<25)	bnx2.h
6198	BNX2_MISC_ENABLE_CLR_BITS_DMA_E	(1L<<26)	bnx2.h
6199	BNX2_MISC_ENABLE_CLR_BITS_UMP_E	(1L<<27)	bnx2.h
6200	BNX2_MISC_CLOCK_CONTROL_BITS	0x00000818	bnx2.h
6201	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0xfL<<0)	bnx2.h
6202	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0L<<0)	bnx2.h
6203	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(1L<<0)	bnx2.h
6204	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(2L<<0)	bnx2.h
6205	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(3L<<0)	bnx2.h
6206	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(4L<<0)	bnx2.h
6207	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(5L<<0)	bnx2.h
6208	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(6L<<0)	bnx2.h
6209	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(7L<<0)	bnx2.h
6210	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0xfL<<0)	bnx2.h
6211	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<6)	bnx2.h
6212	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<7)	bnx2.h
6213	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0x7L<<8)	bnx2.h
6214	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0L<<8)	bnx2.h
6215	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<8)	bnx2.h
6216	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(2L<<8)	bnx2.h
6217	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(4L<<8)	bnx2.h
6218	BNX2_MISC_CLOCK_CONTROL_BITS_PL	(1L<<11)	bnx2.h
6219	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0xfL<<12)	bnx2.h
6220	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0L<<12)	bnx2.h
6221	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<12)	bnx2.h
6222	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(2L<<12)	bnx2.h
6223	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(4L<<12)	bnx2.h
6224	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(8L<<12)	bnx2.h
6225	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<16)	bnx2.h
6226	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(1L<<17)	bnx2.h
6227	BNX2_MISC_CLOCK_CONTROL_BITS_RE	(1L<<18)	bnx2.h
6228	BNX2_MISC_CLOCK_CONTROL_BITS_US	(1L<<19)	bnx2.h
6229	BNX2_MISC_CLOCK_CONTROL_BITS_RE	(0xfffL<<20)	bnx2.h
6230	BNX2_MISC_GPIO	0x0000081c	bnx2.h
6231	BNX2_MISC_GPIO_VALUE	(0xffL<<0)	bnx2.h
6232	BNX2_MISC_GPIO_SET	(0xffL<<8)	bnx2.h
6233	BNX2_MISC_GPIO_CLR	(0xffL<<16)	bnx2.h
6234	BNX2_MISC_GPIO_FLOAT	(0xffL<<24)	bnx2.h
6235	BNX2_MISC_GPIO_INT	0x00000820	bnx2.h
6236	BNX2_MISC_GPIO_INT_INT_STATE	(0xfL<<0)	bnx2.h
6237	BNX2_MISC_GPIO_INT_OLD_VALUE	(0xfL<<8)	bnx2.h
6238	BNX2_MISC_GPIO_INT_OLD_SET	(0xfL<<16)	bnx2.h
6239	BNX2_MISC_GPIO_INT_OLD_CLR	(0xfL<<24)	bnx2.h
6240	BNX2_MISC_CONFIG_LFSR	0x00000824	bnx2.h
6241	BNX2_MISC_CONFIG_LFSR_DIV	(0xffffL<<0)	bnx2.h
6242	BNX2_MISC_LFSR_MASK_BITS	0x00000828	bnx2.h
6243	BNX2_MISC_LFSR_MASK_BITS_TX_SCH	(1L<<0)	bnx2.h
6244	BNX2_MISC_LFSR_MASK_BITS_TX_BD_	(1L<<1)	bnx2.h
6245	BNX2_MISC_LFSR_MASK_BITS_TX_BD_	(1L<<2)	bnx2.h
6246	BNX2_MISC_LFSR_MASK_BITS_TX_PRO	(1L<<3)	bnx2.h
6247	BNX2_MISC_LFSR_MASK_BITS_TX_DMA	(1L<<4)	bnx2.h
6248	BNX2_MISC_LFSR_MASK_BITS_TX_PAT	(1L<<5)	bnx2.h
6249	BNX2_MISC_LFSR_MASK_BITS_TX_PAY	(1L<<6)	bnx2.h
6250	BNX2_MISC_LFSR_MASK_BITS_TX_HEA	(1L<<7)	bnx2.h
6251	BNX2_MISC_LFSR_MASK_BITS_TX_ASS	(1L<<8)	bnx2.h
6252	BNX2_MISC_LFSR_MASK_BITS_EMAC_E	(1L<<9)	bnx2.h
6253	BNX2_MISC_LFSR_MASK_BITS_RX_PAR	(1L<<10)	bnx2.h
6254	BNX2_MISC_LFSR_MASK_BITS_RX_PAR	(1L<<11)	bnx2.h
6255	BNX2_MISC_LFSR_MASK_BITS_RX_MBU	(1L<<12)	bnx2.h
6256	BNX2_MISC_LFSR_MASK_BITS_RX_LOO	(1L<<13)	bnx2.h
6257	BNX2_MISC_LFSR_MASK_BITS_RX_PRO	(1L<<14)	bnx2.h
6258	BNX2_MISC_LFSR_MASK_BITS_RX_V2P	(1L<<15)	bnx2.h
6259	BNX2_MISC_LFSR_MASK_BITS_RX_BD_	(1L<<16)	bnx2.h
6260	BNX2_MISC_LFSR_MASK_BITS_RX_DMA	(1L<<17)	bnx2.h
6261	BNX2_MISC_LFSR_MASK_BITS_COMPLE	(1L<<18)	bnx2.h
6262	BNX2_MISC_LFSR_MASK_BITS_HOST_C	(1L<<19)	bnx2.h
6263	BNX2_MISC_LFSR_MASK_BITS_MAILBO	(1L<<20)	bnx2.h
6264	BNX2_MISC_LFSR_MASK_BITS_CONTEX	(1L<<21)	bnx2.h
6265	BNX2_MISC_LFSR_MASK_BITS_CMD_SC	(1L<<22)	bnx2.h
6266	BNX2_MISC_LFSR_MASK_BITS_CMD_PR	(1L<<23)	bnx2.h
6267	BNX2_MISC_LFSR_MASK_BITS_MGMT_P	(1L<<24)	bnx2.h
6268	BNX2_MISC_LFSR_MASK_BITS_TIMER_	(1L<<25)	bnx2.h
6269	BNX2_MISC_LFSR_MASK_BITS_DMA_EN	(1L<<26)	bnx2.h
6270	BNX2_MISC_LFSR_MASK_BITS_UMP_EN	(1L<<27)	bnx2.h
6271	BNX2_MISC_ARB_REQ0	0x0000082c	bnx2.h
6272	BNX2_MISC_ARB_REQ1	0x00000830	bnx2.h
6273	BNX2_MISC_ARB_REQ2	0x00000834	bnx2.h
6274	BNX2_MISC_ARB_REQ3	0x00000838	bnx2.h
6275	BNX2_MISC_ARB_REQ4	0x0000083c	bnx2.h
6276	BNX2_MISC_ARB_FREE0	0x00000840	bnx2.h
6277	BNX2_MISC_ARB_FREE1	0x00000844	bnx2.h
6278	BNX2_MISC_ARB_FREE2	0x00000848	bnx2.h
6279	BNX2_MISC_ARB_FREE3	0x0000084c	bnx2.h
6280	BNX2_MISC_ARB_FREE4	0x00000850	bnx2.h
6281	BNX2_MISC_ARB_REQ_STATUS0	0x00000854	bnx2.h
6282	BNX2_MISC_ARB_REQ_STATUS1	0x00000858	bnx2.h
6283	BNX2_MISC_ARB_REQ_STATUS2	0x0000085c	bnx2.h
6284	BNX2_MISC_ARB_REQ_STATUS3	0x00000860	bnx2.h
6285	BNX2_MISC_ARB_REQ_STATUS4	0x00000864	bnx2.h
6286	BNX2_MISC_ARB_GNT0	0x00000868	bnx2.h
6287	BNX2_MISC_ARB_GNT0_0	(0x7L<<0)	bnx2.h
6288	BNX2_MISC_ARB_GNT0_1	(0x7L<<4)	bnx2.h
6289	BNX2_MISC_ARB_GNT0_2	(0x7L<<8)	bnx2.h
6290	BNX2_MISC_ARB_GNT0_3	(0x7L<<12)	bnx2.h
6291	BNX2_MISC_ARB_GNT0_4	(0x7L<<16)	bnx2.h
6292	BNX2_MISC_ARB_GNT0_5	(0x7L<<20)	bnx2.h
6293	BNX2_MISC_ARB_GNT0_6	(0x7L<<24)	bnx2.h
6294	BNX2_MISC_ARB_GNT0_7	(0x7L<<28)	bnx2.h
6295	BNX2_MISC_ARB_GNT1	0x0000086c	bnx2.h
6296	BNX2_MISC_ARB_GNT1_8	(0x7L<<0)	bnx2.h
6297	BNX2_MISC_ARB_GNT1_9	(0x7L<<4)	bnx2.h
6298	BNX2_MISC_ARB_GNT1_10	(0x7L<<8)	bnx2.h
6299	BNX2_MISC_ARB_GNT1_11	(0x7L<<12)	bnx2.h
6300	BNX2_MISC_ARB_GNT1_12	(0x7L<<16)	bnx2.h
6301	BNX2_MISC_ARB_GNT1_13	(0x7L<<20)	bnx2.h
6302	BNX2_MISC_ARB_GNT1_14	(0x7L<<24)	bnx2.h
6303	BNX2_MISC_ARB_GNT1_15	(0x7L<<28)	bnx2.h
6304	BNX2_MISC_ARB_GNT2	0x00000870	bnx2.h
6305	BNX2_MISC_ARB_GNT2_16	(0x7L<<0)	bnx2.h
6306	BNX2_MISC_ARB_GNT2_17	(0x7L<<4)	bnx2.h
6307	BNX2_MISC_ARB_GNT2_18	(0x7L<<8)	bnx2.h
6308	BNX2_MISC_ARB_GNT2_19	(0x7L<<12)	bnx2.h
6309	BNX2_MISC_ARB_GNT2_20	(0x7L<<16)	bnx2.h
6310	BNX2_MISC_ARB_GNT2_21	(0x7L<<20)	bnx2.h
6311	BNX2_MISC_ARB_GNT2_22	(0x7L<<24)	bnx2.h
6312	BNX2_MISC_ARB_GNT2_23	(0x7L<<28)	bnx2.h
6313	BNX2_MISC_ARB_GNT3	0x00000874	bnx2.h
6314	BNX2_MISC_ARB_GNT3_24	(0x7L<<0)	bnx2.h
6315	BNX2_MISC_ARB_GNT3_25	(0x7L<<4)	bnx2.h
6316	BNX2_MISC_ARB_GNT3_26	(0x7L<<8)	bnx2.h
6317	BNX2_MISC_ARB_GNT3_27	(0x7L<<12)	bnx2.h
6318	BNX2_MISC_ARB_GNT3_28	(0x7L<<16)	bnx2.h
6319	BNX2_MISC_ARB_GNT3_29	(0x7L<<20)	bnx2.h
6320	BNX2_MISC_ARB_GNT3_30	(0x7L<<24)	bnx2.h
6321	BNX2_MISC_ARB_GNT3_31	(0x7L<<28)	bnx2.h
6322	BNX2_MISC_PRBS_CONTROL	0x00000878	bnx2.h
6323	BNX2_MISC_PRBS_CONTROL_EN	(1L<<0)	bnx2.h
6324	BNX2_MISC_PRBS_CONTROL_RSTB	(1L<<1)	bnx2.h
6325	BNX2_MISC_PRBS_CONTROL_INV	(1L<<2)	bnx2.h
6326	BNX2_MISC_PRBS_CONTROL_ERR_CLR	(1L<<3)	bnx2.h
6327	BNX2_MISC_PRBS_CONTROL_ORDER	(0x3L<<4)	bnx2.h
6328	BNX2_MISC_PRBS_CONTROL_ORDER_7T	(0L<<4)	bnx2.h
6329	BNX2_MISC_PRBS_CONTROL_ORDER_15	(1L<<4)	bnx2.h
6330	BNX2_MISC_PRBS_CONTROL_ORDER_23	(2L<<4)	bnx2.h
6331	BNX2_MISC_PRBS_CONTROL_ORDER_31	(3L<<4)	bnx2.h
6332	BNX2_MISC_PRBS_STATUS	0x0000087c	bnx2.h
6333	BNX2_MISC_PRBS_STATUS_LOCK	(1L<<0)	bnx2.h
6334	BNX2_MISC_PRBS_STATUS_STKY	(1L<<1)	bnx2.h
6335	BNX2_MISC_PRBS_STATUS_ERRORS	(0x3fffL<<2)	bnx2.h
6336	BNX2_MISC_PRBS_STATUS_STATE	(0xfL<<16)	bnx2.h
6337	BNX2_MISC_SM_ASF_CONTROL	0x00000880	bnx2.h
6338	BNX2_MISC_SM_ASF_CONTROL_ASF_RS	(1L<<0)	bnx2.h
6339	BNX2_MISC_SM_ASF_CONTROL_TSC_EN	(1L<<1)	bnx2.h
6340	BNX2_MISC_SM_ASF_CONTROL_WG_TO	(1L<<2)	bnx2.h
6341	BNX2_MISC_SM_ASF_CONTROL_HB_TO	(1L<<3)	bnx2.h
6342	BNX2_MISC_SM_ASF_CONTROL_PA_TO	(1L<<4)	bnx2.h
6343	BNX2_MISC_SM_ASF_CONTROL_PL_TO	(1L<<5)	bnx2.h
6344	BNX2_MISC_SM_ASF_CONTROL_RT_TO	(1L<<6)	bnx2.h
6345	BNX2_MISC_SM_ASF_CONTROL_SMB_EV	(1L<<7)	bnx2.h
6346	BNX2_MISC_SM_ASF_CONTROL_RES	(0xfL<<8)	bnx2.h
6347	BNX2_MISC_SM_ASF_CONTROL_SMB_EN	(1L<<12)	bnx2.h
6348	BNX2_MISC_SM_ASF_CONTROL_SMB_BB	(1L<<13)	bnx2.h
6349	BNX2_MISC_SM_ASF_CONTROL_SMB_NO	(1L<<14)	bnx2.h
6350	BNX2_MISC_SM_ASF_CONTROL_SMB_AU	(1L<<15)	bnx2.h
6351	BNX2_MISC_SM_ASF_CONTROL_NIC_SM	(0x3fL<<16)	bnx2.h
6352	BNX2_MISC_SM_ASF_CONTROL_NIC_SM	(0x3fL<<24)	bnx2.h
6353	BNX2_MISC_SM_ASF_CONTROL_EN_NIC	(1L<<30)	bnx2.h
6354	BNX2_MISC_SM_ASF_CONTROL_SMB_EA	(1L<<31)	bnx2.h
6355	BNX2_MISC_SMB_IN	0x00000884	bnx2.h
6356	BNX2_MISC_SMB_IN_DAT_IN	(0xffL<<0)	bnx2.h
6357	BNX2_MISC_SMB_IN_RDY	(1L<<8)	bnx2.h
6358	BNX2_MISC_SMB_IN_DONE	(1L<<9)	bnx2.h
6359	BNX2_MISC_SMB_IN_FIRSTBYTE	(1L<<10)	bnx2.h
6360	BNX2_MISC_SMB_IN_STATUS	(0x7L<<11)	bnx2.h
6361	BNX2_MISC_SMB_IN_STATUS_OK	(0x0L<<11)	bnx2.h
6362	BNX2_MISC_SMB_IN_STATUS_PEC	(0x1L<<11)	bnx2.h
6363	BNX2_MISC_SMB_IN_STATUS_OFLOW	(0x2L<<11)	bnx2.h
6364	BNX2_MISC_SMB_IN_STATUS_STOP	(0x3L<<11)	bnx2.h
6365	BNX2_MISC_SMB_IN_STATUS_TIMEOUT	(0x4L<<11)	bnx2.h
6366	BNX2_MISC_SMB_OUT	0x00000888	bnx2.h
6367	BNX2_MISC_SMB_OUT_DAT_OUT	(0xffL<<0)	bnx2.h
6368	BNX2_MISC_SMB_OUT_RDY	(1L<<8)	bnx2.h
6369	BNX2_MISC_SMB_OUT_START	(1L<<9)	bnx2.h
6370	BNX2_MISC_SMB_OUT_LAST	(1L<<10)	bnx2.h
6371	BNX2_MISC_SMB_OUT_ACC_TYPE	(1L<<11)	bnx2.h
6372	BNX2_MISC_SMB_OUT_ENB_PEC	(1L<<12)	bnx2.h
6373	BNX2_MISC_SMB_OUT_GET_RX_LEN	(1L<<13)	bnx2.h
6374	BNX2_MISC_SMB_OUT_SMB_READ_LEN	(0x3fL<<14)	bnx2.h
6375	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0xfL<<20)	bnx2.h
6376	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0L<<20)	bnx2.h
6377	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(1L<<20)	bnx2.h
6378	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(9L<<20)	bnx2.h
6379	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(2L<<20)	bnx2.h
6380	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(3L<<20)	bnx2.h
6381	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(4L<<20)	bnx2.h
6382	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(5L<<20)	bnx2.h
6383	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0xdL<<20)	bnx2.h
6384	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0x6L<<20)	bnx2.h
6385	BNX2_MISC_SMB_OUT_SMB_OUT_SLAVE	(1L<<24)	bnx2.h
6386	BNX2_MISC_SMB_OUT_SMB_OUT_DAT_E	(1L<<25)	bnx2.h
6387	BNX2_MISC_SMB_OUT_SMB_OUT_DAT_I	(1L<<26)	bnx2.h
6388	BNX2_MISC_SMB_OUT_SMB_OUT_CLK_E	(1L<<27)	bnx2.h
6389	BNX2_MISC_SMB_OUT_SMB_OUT_CLK_I	(1L<<28)	bnx2.h
6390	BNX2_MISC_SMB_WATCHDOG	0x0000088c	bnx2.h
6391	BNX2_MISC_SMB_WATCHDOG_WATCHDOG	(0xffffL<<0)	bnx2.h
6392	BNX2_MISC_SMB_HEARTBEAT	0x00000890	bnx2.h
6393	BNX2_MISC_SMB_HEARTBEAT_HEARTBE	(0xffffL<<0)	bnx2.h
6394	BNX2_MISC_SMB_POLL_ASF	0x00000894	bnx2.h
6395	BNX2_MISC_SMB_POLL_ASF_POLL_ASF	(0xffffL<<0)	bnx2.h
6396	BNX2_MISC_SMB_POLL_LEGACY	0x00000898	bnx2.h
6397	BNX2_MISC_SMB_POLL_LEGACY_POLL_	(0xffffL<<0)	bnx2.h
6398	BNX2_MISC_SMB_RETRAN	0x0000089c	bnx2.h
6399	BNX2_MISC_SMB_RETRAN_RETRAN	(0xffL<<0)	bnx2.h
6400	BNX2_MISC_SMB_TIMESTAMP	0x000008a0	bnx2.h
6401	BNX2_MISC_SMB_TIMESTAMP_TIMESTA	(0xffffffffL<<0)	bnx2.h
6402	BNX2_MISC_PERR_ENA0	0x000008a4	bnx2.h
6403	BNX2_MISC_PERR_ENA0_COM_MISC_CT	(1L<<0)	bnx2.h
6404	BNX2_MISC_PERR_ENA0_COM_MISC_RE	(1L<<1)	bnx2.h
6405	BNX2_MISC_PERR_ENA0_COM_MISC_SC	(1L<<2)	bnx2.h
6406	BNX2_MISC_PERR_ENA0_CP_MISC_CTX	(1L<<3)	bnx2.h
6407	BNX2_MISC_PERR_ENA0_CP_MISC_REG	(1L<<4)	bnx2.h
6408	BNX2_MISC_PERR_ENA0_CP_MISC_SCP	(1L<<5)	bnx2.h
6409	BNX2_MISC_PERR_ENA0_CS_MISC_TME	(1L<<6)	bnx2.h
6410	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<7)	bnx2.h
6411	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<8)	bnx2.h
6412	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<9)	bnx2.h
6413	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<10)	bnx2.h
6414	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<11)	bnx2.h
6415	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<12)	bnx2.h
6416	BNX2_MISC_PERR_ENA0_CTX_MISC_PG	(1L<<13)	bnx2.h
6417	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<14)	bnx2.h
6418	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<15)	bnx2.h
6419	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<16)	bnx2.h
6420	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<17)	bnx2.h
6421	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<18)	bnx2.h
6422	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<19)	bnx2.h
6423	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<20)	bnx2.h
6424	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<21)	bnx2.h
6425	BNX2_MISC_PERR_ENA0_HC_MISC_DMA	(1L<<22)	bnx2.h
6426	BNX2_MISC_PERR_ENA0_MCP_MISC_RE	(1L<<23)	bnx2.h
6427	BNX2_MISC_PERR_ENA0_MCP_MISC_SC	(1L<<24)	bnx2.h
6428	BNX2_MISC_PERR_ENA0_MQ_MISC_CTX	(1L<<25)	bnx2.h
6429	BNX2_MISC_PERR_ENA0_RBDC_MISC	(1L<<26)	bnx2.h
6430	BNX2_MISC_PERR_ENA0_RBUF_MISC_M	(1L<<27)	bnx2.h
6431	BNX2_MISC_PERR_ENA0_RBUF_MISC_P	(1L<<28)	bnx2.h
6432	BNX2_MISC_PERR_ENA0_RDE_MISC_RP	(1L<<29)	bnx2.h
6433	BNX2_MISC_PERR_ENA0_RDE_MISC_RP	(1L<<30)	bnx2.h
6434	BNX2_MISC_PERR_ENA0_RV2P_MISC_C	(1L<<31)	bnx2.h
6435	BNX2_MISC_PERR_ENA1	0x000008a8	bnx2.h
6436	BNX2_MISC_PERR_ENA1_RV2P_MISC_C	(1L<<0)	bnx2.h
6437	BNX2_MISC_PERR_ENA1_RV2P_MISC_P	(1L<<1)	bnx2.h
6438	BNX2_MISC_PERR_ENA1_RV2P_MISC_P	(1L<<2)	bnx2.h
6439	BNX2_MISC_PERR_ENA1_RXP_MISC_CT	(1L<<3)	bnx2.h
6440	BNX2_MISC_PERR_ENA1_RXP_MISC_RE	(1L<<4)	bnx2.h
6441	BNX2_MISC_PERR_ENA1_RXP_MISC_SC	(1L<<5)	bnx2.h
6442	BNX2_MISC_PERR_ENA1_RXP_MISC_RB	(1L<<6)	bnx2.h
6443	BNX2_MISC_PERR_ENA1_TBDC_MISC	(1L<<7)	bnx2.h
6444	BNX2_MISC_PERR_ENA1_TDMA_MISC	(1L<<8)	bnx2.h
6445	BNX2_MISC_PERR_ENA1_THBUF_MISC_	(1L<<9)	bnx2.h
6446	BNX2_MISC_PERR_ENA1_THBUF_MISC_	(1L<<10)	bnx2.h
6447	BNX2_MISC_PERR_ENA1_TPAT_MISC_R	(1L<<11)	bnx2.h
6448	BNX2_MISC_PERR_ENA1_TPAT_MISC_S	(1L<<12)	bnx2.h
6449	BNX2_MISC_PERR_ENA1_TPBUF_MISC_	(1L<<13)	bnx2.h
6450	BNX2_MISC_PERR_ENA1_TSCH_MISC_L	(1L<<14)	bnx2.h
6451	BNX2_MISC_PERR_ENA1_TXP_MISC_CT	(1L<<15)	bnx2.h
6452	BNX2_MISC_PERR_ENA1_TXP_MISC_RE	(1L<<16)	bnx2.h
6453	BNX2_MISC_PERR_ENA1_TXP_MISC_SC	(1L<<17)	bnx2.h
6454	BNX2_MISC_PERR_ENA1_UMP_MISC_FI	(1L<<18)	bnx2.h
6455	BNX2_MISC_PERR_ENA1_UMP_MISC_FI	(1L<<19)	bnx2.h
6456	BNX2_MISC_PERR_ENA1_UMP_MISC_RX	(1L<<20)	bnx2.h
6457	BNX2_MISC_PERR_ENA1_UMP_MISC_TX	(1L<<21)	bnx2.h
6458	BNX2_MISC_PERR_ENA1_RDMAQ_MISC	(1L<<22)	bnx2.h
6459	BNX2_MISC_PERR_ENA1_CSQ_MISC	(1L<<23)	bnx2.h
6460	BNX2_MISC_PERR_ENA1_CPQ_MISC	(1L<<24)	bnx2.h
6461	BNX2_MISC_PERR_ENA1_MCPQ_MISC	(1L<<25)	bnx2.h
6462	BNX2_MISC_PERR_ENA1_RV2PMQ_MISC	(1L<<26)	bnx2.h
6463	BNX2_MISC_PERR_ENA1_RV2PPQ_MISC	(1L<<27)	bnx2.h
6464	BNX2_MISC_PERR_ENA1_RV2PTQ_MISC	(1L<<28)	bnx2.h
6465	BNX2_MISC_PERR_ENA1_RXPQ_MISC	(1L<<29)	bnx2.h
6466	BNX2_MISC_PERR_ENA1_RXPCQ_MISC	(1L<<30)	bnx2.h
6467	BNX2_MISC_PERR_ENA1_RLUPQ_MISC	(1L<<31)	bnx2.h
6468	BNX2_MISC_PERR_ENA2	0x000008ac	bnx2.h
6469	BNX2_MISC_PERR_ENA2_COMQ_MISC	(1L<<0)	bnx2.h
6470	BNX2_MISC_PERR_ENA2_COMXQ_MISC	(1L<<1)	bnx2.h
6471	BNX2_MISC_PERR_ENA2_COMTQ_MISC	(1L<<2)	bnx2.h
6472	BNX2_MISC_PERR_ENA2_TSCHQ_MISC	(1L<<3)	bnx2.h
6473	BNX2_MISC_PERR_ENA2_TBDRQ_MISC	(1L<<4)	bnx2.h
6474	BNX2_MISC_PERR_ENA2_TXPQ_MISC	(1L<<5)	bnx2.h
6475	BNX2_MISC_PERR_ENA2_TDMAQ_MISC	(1L<<6)	bnx2.h
6476	BNX2_MISC_PERR_ENA2_TPATQ_MISC	(1L<<7)	bnx2.h
6477	BNX2_MISC_PERR_ENA2_TASQ_MISC	(1L<<8)	bnx2.h
6478	BNX2_MISC_DEBUG_VECTOR_SEL	0x000008b0	bnx2.h
6479	BNX2_MISC_DEBUG_VECTOR_SEL_0	(0xfffL<<0)	bnx2.h
6480	BNX2_MISC_DEBUG_VECTOR_SEL_1	(0xfffL<<12)	bnx2.h
6481	BNX2_MISC_VREG_CONTROL	0x000008b4	bnx2.h
6482	BNX2_MISC_VREG_CONTROL_1_2	(0xfL<<0)	bnx2.h
6483	BNX2_MISC_VREG_CONTROL_2_5	(0xfL<<4)	bnx2.h
6484	BNX2_MISC_FINAL_CLK_CTL_VAL	0x000008b8	bnx2.h
6485	BNX2_MISC_FINAL_CLK_CTL_VAL_MIS	(0x3ffffffL<<6)	bnx2.h
6486	BNX2_MISC_UNUSED0	0x000008bc	bnx2.h
6487	BNX2_NVM_COMMAND	0x00006400	bnx2.h
6488	BNX2_NVM_COMMAND_RST	(1L<<0)	bnx2.h
6489	BNX2_NVM_COMMAND_DONE	(1L<<3)	bnx2.h
6490	BNX2_NVM_COMMAND_DOIT	(1L<<4)	bnx2.h
6491	BNX2_NVM_COMMAND_WR	(1L<<5)	bnx2.h
6492	BNX2_NVM_COMMAND_ERASE	(1L<<6)	bnx2.h
6493	BNX2_NVM_COMMAND_FIRST	(1L<<7)	bnx2.h
6494	BNX2_NVM_COMMAND_LAST	(1L<<8)	bnx2.h
6495	BNX2_NVM_COMMAND_WREN	(1L<<16)	bnx2.h
6496	BNX2_NVM_COMMAND_WRDI	(1L<<17)	bnx2.h
6497	BNX2_NVM_COMMAND_EWSR	(1L<<18)	bnx2.h
6498	BNX2_NVM_COMMAND_WRSR	(1L<<19)	bnx2.h
6499	BNX2_NVM_STATUS	0x00006404	bnx2.h
6500	BNX2_NVM_STATUS_PI_FSM_STATE	(0xfL<<0)	bnx2.h
6501	BNX2_NVM_STATUS_EE_FSM_STATE	(0xfL<<4)	bnx2.h
6502	BNX2_NVM_STATUS_EQ_FSM_STATE	(0xfL<<8)	bnx2.h
6503	BNX2_NVM_WRITE	0x00006408	bnx2.h
6504	BNX2_NVM_WRITE_NVM_WRITE_VALUE	(0xffffffffL<<0)	bnx2.h
6505	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(0L<<0)	bnx2.h
6506	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(1L<<0)	bnx2.h
6507	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(2L<<0)	bnx2.h
6508	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(4L<<0)	bnx2.h
6509	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(8L<<0)	bnx2.h
6510	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(16L<<0)	bnx2.h
6511	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(32L<<0)	bnx2.h
6512	BNX2_NVM_ADDR	0x0000640c	bnx2.h
6513	BNX2_NVM_ADDR_NVM_ADDR_VALUE	(0xffffffL<<0)	bnx2.h
6514	BNX2_NVM_ADDR_NVM_ADDR_VALUE_BI	(0L<<0)	bnx2.h
6515	BNX2_NVM_ADDR_NVM_ADDR_VALUE_EE	(1L<<0)	bnx2.h
6516	BNX2_NVM_ADDR_NVM_ADDR_VALUE_EE	(2L<<0)	bnx2.h
6517	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SC	(4L<<0)	bnx2.h
6518	BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS	(8L<<0)	bnx2.h
6519	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO	(16L<<0)	bnx2.h
6520	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI	(32L<<0)	bnx2.h
6521	BNX2_NVM_READ	0x00006410	bnx2.h
6522	BNX2_NVM_READ_NVM_READ_VALUE	(0xffffffffL<<0)	bnx2.h
6523	BNX2_NVM_READ_NVM_READ_VALUE_BI	(0L<<0)	bnx2.h
6524	BNX2_NVM_READ_NVM_READ_VALUE_EE	(1L<<0)	bnx2.h
6525	BNX2_NVM_READ_NVM_READ_VALUE_EE	(2L<<0)	bnx2.h
6526	BNX2_NVM_READ_NVM_READ_VALUE_SC	(4L<<0)	bnx2.h
6527	BNX2_NVM_READ_NVM_READ_VALUE_CS	(8L<<0)	bnx2.h
6528	BNX2_NVM_READ_NVM_READ_VALUE_SO	(16L<<0)	bnx2.h
6529	BNX2_NVM_READ_NVM_READ_VALUE_SI	(32L<<0)	bnx2.h
6530	BNX2_NVM_CFG1	0x00006414	bnx2.h
6531	BNX2_NVM_CFG1_FLASH_MODE	(1L<<0)	bnx2.h
6532	BNX2_NVM_CFG1_BUFFER_MODE	(1L<<1)	bnx2.h
6533	BNX2_NVM_CFG1_PASS_MODE	(1L<<2)	bnx2.h
6534	BNX2_NVM_CFG1_BITBANG_MODE	(1L<<3)	bnx2.h
6535	BNX2_NVM_CFG1_STATUS_BIT	(0x7L<<4)	bnx2.h
6536	BNX2_NVM_CFG1_STATUS_BIT_FLASH_	(0L<<4)	bnx2.h
6537	BNX2_NVM_CFG1_STATUS_BIT_BUFFER	(7L<<4)	bnx2.h
6538	BNX2_NVM_CFG1_SPI_CLK_DIV	(0xfL<<7)	bnx2.h
6539	BNX2_NVM_CFG1_SEE_CLK_DIV	(0x7ffL<<11)	bnx2.h
6540	BNX2_NVM_CFG1_PROTECT_MODE	(1L<<24)	bnx2.h
6541	BNX2_NVM_CFG1_FLASH_SIZE	(1L<<25)	bnx2.h
6542	BNX2_NVM_CFG1_COMPAT_BYPASSS	(1L<<31)	bnx2.h
6543	BNX2_NVM_CFG2	0x00006418	bnx2.h
6544	BNX2_NVM_CFG2_ERASE_CMD	(0xffL<<0)	bnx2.h
6545	BNX2_NVM_CFG2_DUMMY	(0xffL<<8)	bnx2.h
6546	BNX2_NVM_CFG2_STATUS_CMD	(0xffL<<16)	bnx2.h
6547	BNX2_NVM_CFG3	0x0000641c	bnx2.h
6548	BNX2_NVM_CFG3_BUFFER_RD_CMD	(0xffL<<0)	bnx2.h
6549	BNX2_NVM_CFG3_WRITE_CMD	(0xffL<<8)	bnx2.h
6550	BNX2_NVM_CFG3_BUFFER_WRITE_CMD	(0xffL<<16)	bnx2.h
6551	BNX2_NVM_CFG3_READ_CMD	(0xffL<<24)	bnx2.h
6552	BNX2_NVM_SW_ARB	0x00006420	bnx2.h
6553	BNX2_NVM_SW_ARB_ARB_REQ_SET0	(1L<<0)	bnx2.h
6554	BNX2_NVM_SW_ARB_ARB_REQ_SET1	(1L<<1)	bnx2.h
6555	BNX2_NVM_SW_ARB_ARB_REQ_SET2	(1L<<2)	bnx2.h
6556	BNX2_NVM_SW_ARB_ARB_REQ_SET3	(1L<<3)	bnx2.h
6557	BNX2_NVM_SW_ARB_ARB_REQ_CLR0	(1L<<4)	bnx2.h
6558	BNX2_NVM_SW_ARB_ARB_REQ_CLR1	(1L<<5)	bnx2.h
6559	BNX2_NVM_SW_ARB_ARB_REQ_CLR2	(1L<<6)	bnx2.h
6560	BNX2_NVM_SW_ARB_ARB_REQ_CLR3	(1L<<7)	bnx2.h
6561	BNX2_NVM_SW_ARB_ARB_ARB0	(1L<<8)	bnx2.h
6562	BNX2_NVM_SW_ARB_ARB_ARB1	(1L<<9)	bnx2.h
6563	BNX2_NVM_SW_ARB_ARB_ARB2	(1L<<10)	bnx2.h
6564	BNX2_NVM_SW_ARB_ARB_ARB3	(1L<<11)	bnx2.h
6565	BNX2_NVM_SW_ARB_REQ0	(1L<<12)	bnx2.h
6566	BNX2_NVM_SW_ARB_REQ1	(1L<<13)	bnx2.h
6567	BNX2_NVM_SW_ARB_REQ2	(1L<<14)	bnx2.h
6568	BNX2_NVM_SW_ARB_REQ3	(1L<<15)	bnx2.h
6569	BNX2_NVM_ACCESS_ENABLE	0x00006424	bnx2.h
6570	BNX2_NVM_ACCESS_ENABLE_EN	(1L<<0)	bnx2.h
6571	BNX2_NVM_ACCESS_ENABLE_WR_EN	(1L<<1)	bnx2.h
6572	BNX2_NVM_WRITE1	0x00006428	bnx2.h
6573	BNX2_NVM_WRITE1_WREN_CMD	(0xffL<<0)	bnx2.h
6574	BNX2_NVM_WRITE1_WRDI_CMD	(0xffL<<8)	bnx2.h
6575	BNX2_NVM_WRITE1_SR_DATA	(0xffL<<16)	bnx2.h
6576	BNX2_DMA_COMMAND	0x00000c00	bnx2.h
6577	BNX2_DMA_COMMAND_ENABLE	(1L<<0)	bnx2.h
6578	BNX2_DMA_STATUS	0x00000c04	bnx2.h
6579	BNX2_DMA_STATUS_PAR_ERROR_STATE	(1L<<0)	bnx2.h
6580	BNX2_DMA_STATUS_READ_TRANSFERS_	(1L<<16)	bnx2.h
6581	BNX2_DMA_STATUS_READ_DELAY_PCI_	(1L<<17)	bnx2.h
6582	BNX2_DMA_STATUS_BIG_READ_TRANSF	(1L<<18)	bnx2.h
6583	BNX2_DMA_STATUS_BIG_READ_DELAY_	(1L<<19)	bnx2.h
6584	BNX2_DMA_STATUS_BIG_READ_RETRY_	(1L<<20)	bnx2.h
6585	BNX2_DMA_STATUS_WRITE_TRANSFERS	(1L<<21)	bnx2.h
6586	BNX2_DMA_STATUS_WRITE_DELAY_PCI	(1L<<22)	bnx2.h
6587	BNX2_DMA_STATUS_BIG_WRITE_TRANS	(1L<<23)	bnx2.h
6588	BNX2_DMA_STATUS_BIG_WRITE_DELAY	(1L<<24)	bnx2.h
6589	BNX2_DMA_STATUS_BIG_WRITE_RETRY	(1L<<25)	bnx2.h
6590	BNX2_DMA_CONFIG	0x00000c08	bnx2.h
6591	BNX2_DMA_CONFIG_DATA_BYTE_SWAP	(1L<<0)	bnx2.h
6592	BNX2_DMA_CONFIG_DATA_WORD_SWAP	(1L<<1)	bnx2.h
6593	BNX2_DMA_CONFIG_CNTL_BYTE_SWAP	(1L<<4)	bnx2.h
6594	BNX2_DMA_CONFIG_CNTL_WORD_SWAP	(1L<<5)	bnx2.h
6595	BNX2_DMA_CONFIG_ONE_DMA	(1L<<6)	bnx2.h
6596	BNX2_DMA_CONFIG_CNTL_TWO_DMA	(1L<<7)	bnx2.h
6597	BNX2_DMA_CONFIG_CNTL_FPGA_MODE	(1L<<8)	bnx2.h
6598	BNX2_DMA_CONFIG_CNTL_PING_PONG_	(1L<<10)	bnx2.h
6599	BNX2_DMA_CONFIG_CNTL_PCI_COMP_D	(1L<<11)	bnx2.h
6600	BNX2_DMA_CONFIG_NO_RCHANS_IN_US	(0xfL<<12)	bnx2.h
6601	BNX2_DMA_CONFIG_NO_WCHANS_IN_US	(0xfL<<16)	bnx2.h
6602	BNX2_DMA_CONFIG_PCI_CLK_CMP_BIT	(0x7L<<20)	bnx2.h
6603	BNX2_DMA_CONFIG_PCI_FAST_CLK_CM	(1L<<23)	bnx2.h
6604	BNX2_DMA_CONFIG_BIG_SIZE	(0xfL<<24)	bnx2.h
6605	BNX2_DMA_CONFIG_BIG_SIZE_NONE	(0x0L<<24)	bnx2.h
6606	BNX2_DMA_CONFIG_BIG_SIZE_64	(0x1L<<24)	bnx2.h
6607	BNX2_DMA_CONFIG_BIG_SIZE_128	(0x2L<<24)	bnx2.h
6608	BNX2_DMA_CONFIG_BIG_SIZE_256	(0x4L<<24)	bnx2.h
6609	BNX2_DMA_CONFIG_BIG_SIZE_512	(0x8L<<24)	bnx2.h
6610	BNX2_DMA_BLACKOUT	0x00000c0c	bnx2.h
6611	BNX2_DMA_BLACKOUT_RD_RETRY_BLAC	(0xffL<<0)	bnx2.h
6612	BNX2_DMA_BLACKOUT_2ND_RD_RETRY_	(0xffL<<8)	bnx2.h
6613	BNX2_DMA_BLACKOUT_WR_RETRY_BLAC	(0xffL<<16)	bnx2.h
6614	BNX2_DMA_RCHAN_STAT	0x00000c30	bnx2.h
6615	BNX2_DMA_RCHAN_STAT_COMP_CODE_0	(0x7L<<0)	bnx2.h
6616	BNX2_DMA_RCHAN_STAT_PAR_ERR_0	(1L<<3)	bnx2.h
6617	BNX2_DMA_RCHAN_STAT_COMP_CODE_1	(0x7L<<4)	bnx2.h
6618	BNX2_DMA_RCHAN_STAT_PAR_ERR_1	(1L<<7)	bnx2.h
6619	BNX2_DMA_RCHAN_STAT_COMP_CODE_2	(0x7L<<8)	bnx2.h
6620	BNX2_DMA_RCHAN_STAT_PAR_ERR_2	(1L<<11)	bnx2.h
6621	BNX2_DMA_RCHAN_STAT_COMP_CODE_3	(0x7L<<12)	bnx2.h
6622	BNX2_DMA_RCHAN_STAT_PAR_ERR_3	(1L<<15)	bnx2.h
6623	BNX2_DMA_RCHAN_STAT_COMP_CODE_4	(0x7L<<16)	bnx2.h
6624	BNX2_DMA_RCHAN_STAT_PAR_ERR_4	(1L<<19)	bnx2.h
6625	BNX2_DMA_RCHAN_STAT_COMP_CODE_5	(0x7L<<20)	bnx2.h
6626	BNX2_DMA_RCHAN_STAT_PAR_ERR_5	(1L<<23)	bnx2.h
6627	BNX2_DMA_RCHAN_STAT_COMP_CODE_6	(0x7L<<24)	bnx2.h
6628	BNX2_DMA_RCHAN_STAT_PAR_ERR_6	(1L<<27)	bnx2.h
6629	BNX2_DMA_RCHAN_STAT_COMP_CODE_7	(0x7L<<28)	bnx2.h
6630	BNX2_DMA_RCHAN_STAT_PAR_ERR_7	(1L<<31)	bnx2.h
6631	BNX2_DMA_WCHAN_STAT	0x00000c34	bnx2.h
6632	BNX2_DMA_WCHAN_STAT_COMP_CODE_0	(0x7L<<0)	bnx2.h
6633	BNX2_DMA_WCHAN_STAT_PAR_ERR_0	(1L<<3)	bnx2.h
6634	BNX2_DMA_WCHAN_STAT_COMP_CODE_1	(0x7L<<4)	bnx2.h
6635	BNX2_DMA_WCHAN_STAT_PAR_ERR_1	(1L<<7)	bnx2.h
6636	BNX2_DMA_WCHAN_STAT_COMP_CODE_2	(0x7L<<8)	bnx2.h
6637	BNX2_DMA_WCHAN_STAT_PAR_ERR_2	(1L<<11)	bnx2.h
6638	BNX2_DMA_WCHAN_STAT_COMP_CODE_3	(0x7L<<12)	bnx2.h
6639	BNX2_DMA_WCHAN_STAT_PAR_ERR_3	(1L<<15)	bnx2.h
6640	BNX2_DMA_WCHAN_STAT_COMP_CODE_4	(0x7L<<16)	bnx2.h
6641	BNX2_DMA_WCHAN_STAT_PAR_ERR_4	(1L<<19)	bnx2.h
6642	BNX2_DMA_WCHAN_STAT_COMP_CODE_5	(0x7L<<20)	bnx2.h
6643	BNX2_DMA_WCHAN_STAT_PAR_ERR_5	(1L<<23)	bnx2.h
6644	BNX2_DMA_WCHAN_STAT_COMP_CODE_6	(0x7L<<24)	bnx2.h
6645	BNX2_DMA_WCHAN_STAT_PAR_ERR_6	(1L<<27)	bnx2.h
6646	BNX2_DMA_WCHAN_STAT_COMP_CODE_7	(0x7L<<28)	bnx2.h
6647	BNX2_DMA_WCHAN_STAT_PAR_ERR_7	(1L<<31)	bnx2.h
6648	BNX2_DMA_RCHAN_ASSIGNMENT	0x00000c38	bnx2.h
6649	BNX2_DMA_RCHAN_ASSIGNMENT_0	(0xfL<<0)	bnx2.h
6650	BNX2_DMA_RCHAN_ASSIGNMENT_1	(0xfL<<4)	bnx2.h
6651	BNX2_DMA_RCHAN_ASSIGNMENT_2	(0xfL<<8)	bnx2.h
6652	BNX2_DMA_RCHAN_ASSIGNMENT_3	(0xfL<<12)	bnx2.h
6653	BNX2_DMA_RCHAN_ASSIGNMENT_4	(0xfL<<16)	bnx2.h
6654	BNX2_DMA_RCHAN_ASSIGNMENT_5	(0xfL<<20)	bnx2.h
6655	BNX2_DMA_RCHAN_ASSIGNMENT_6	(0xfL<<24)	bnx2.h
6656	BNX2_DMA_RCHAN_ASSIGNMENT_7	(0xfL<<28)	bnx2.h
6657	BNX2_DMA_WCHAN_ASSIGNMENT	0x00000c3c	bnx2.h
6658	BNX2_DMA_WCHAN_ASSIGNMENT_0	(0xfL<<0)	bnx2.h
6659	BNX2_DMA_WCHAN_ASSIGNMENT_1	(0xfL<<4)	bnx2.h
6660	BNX2_DMA_WCHAN_ASSIGNMENT_2	(0xfL<<8)	bnx2.h
6661	BNX2_DMA_WCHAN_ASSIGNMENT_3	(0xfL<<12)	bnx2.h
6662	BNX2_DMA_WCHAN_ASSIGNMENT_4	(0xfL<<16)	bnx2.h
6663	BNX2_DMA_WCHAN_ASSIGNMENT_5	(0xfL<<20)	bnx2.h
6664	BNX2_DMA_WCHAN_ASSIGNMENT_6	(0xfL<<24)	bnx2.h
6665	BNX2_DMA_WCHAN_ASSIGNMENT_7	(0xfL<<28)	bnx2.h
6666	BNX2_DMA_RCHAN_STAT_00	0x00000c40	bnx2.h
6667	BNX2_DMA_RCHAN_STAT_00_RCHAN_ST	(0xffffffffL<<0)	bnx2.h
6668	BNX2_DMA_RCHAN_STAT_01	0x00000c44	bnx2.h
6669	BNX2_DMA_RCHAN_STAT_01_RCHAN_ST	(0xffffffffL<<0)	bnx2.h
6670	BNX2_DMA_RCHAN_STAT_02	0x00000c48	bnx2.h
6671	BNX2_DMA_RCHAN_STAT_02_LENGTH	(0xffffL<<0)	bnx2.h
6672	BNX2_DMA_RCHAN_STAT_02_WORD_SWA	(1L<<16)	bnx2.h
6673	BNX2_DMA_RCHAN_STAT_02_BYTE_SWA	(1L<<17)	bnx2.h
6674	BNX2_DMA_RCHAN_STAT_02_PRIORITY	(1L<<18)	bnx2.h
6675	BNX2_DMA_RCHAN_STAT_10	0x00000c4c	bnx2.h
6676	BNX2_DMA_RCHAN_STAT_11	0x00000c50	bnx2.h
6677	BNX2_DMA_RCHAN_STAT_12	0x00000c54	bnx2.h
6678	BNX2_DMA_RCHAN_STAT_20	0x00000c58	bnx2.h
6679	BNX2_DMA_RCHAN_STAT_21	0x00000c5c	bnx2.h
6680	BNX2_DMA_RCHAN_STAT_22	0x00000c60	bnx2.h
6681	BNX2_DMA_RCHAN_STAT_30	0x00000c64	bnx2.h
6682	BNX2_DMA_RCHAN_STAT_31	0x00000c68	bnx2.h
6683	BNX2_DMA_RCHAN_STAT_32	0x00000c6c	bnx2.h
6684	BNX2_DMA_RCHAN_STAT_40	0x00000c70	bnx2.h
6685	BNX2_DMA_RCHAN_STAT_41	0x00000c74	bnx2.h
6686	BNX2_DMA_RCHAN_STAT_42	0x00000c78	bnx2.h
6687	BNX2_DMA_RCHAN_STAT_50	0x00000c7c	bnx2.h
6688	BNX2_DMA_RCHAN_STAT_51	0x00000c80	bnx2.h
6689	BNX2_DMA_RCHAN_STAT_52	0x00000c84	bnx2.h
6690	BNX2_DMA_RCHAN_STAT_60	0x00000c88	bnx2.h
6691	BNX2_DMA_RCHAN_STAT_61	0x00000c8c	bnx2.h
6692	BNX2_DMA_RCHAN_STAT_62	0x00000c90	bnx2.h
6693	BNX2_DMA_RCHAN_STAT_70	0x00000c94	bnx2.h
6694	BNX2_DMA_RCHAN_STAT_71	0x00000c98	bnx2.h
6695	BNX2_DMA_RCHAN_STAT_72	0x00000c9c	bnx2.h
6696	BNX2_DMA_WCHAN_STAT_00	0x00000ca0	bnx2.h
6697	BNX2_DMA_WCHAN_STAT_00_WCHAN_ST	(0xffffffffL<<0)	bnx2.h
6698	BNX2_DMA_WCHAN_STAT_01	0x00000ca4	bnx2.h
6699	BNX2_DMA_WCHAN_STAT_01_WCHAN_ST	(0xffffffffL<<0)	bnx2.h
6700	BNX2_DMA_WCHAN_STAT_02	0x00000ca8	bnx2.h
6701	BNX2_DMA_WCHAN_STAT_02_LENGTH	(0xffffL<<0)	bnx2.h
6702	BNX2_DMA_WCHAN_STAT_02_WORD_SWA	(1L<<16)	bnx2.h
6703	BNX2_DMA_WCHAN_STAT_02_BYTE_SWA	(1L<<17)	bnx2.h
6704	BNX2_DMA_WCHAN_STAT_02_PRIORITY	(1L<<18)	bnx2.h
6705	BNX2_DMA_WCHAN_STAT_10	0x00000cac	bnx2.h
6706	BNX2_DMA_WCHAN_STAT_11	0x00000cb0	bnx2.h
6707	BNX2_DMA_WCHAN_STAT_12	0x00000cb4	bnx2.h
6708	BNX2_DMA_WCHAN_STAT_20	0x00000cb8	bnx2.h
6709	BNX2_DMA_WCHAN_STAT_21	0x00000cbc	bnx2.h
6710	BNX2_DMA_WCHAN_STAT_22	0x00000cc0	bnx2.h
6711	BNX2_DMA_WCHAN_STAT_30	0x00000cc4	bnx2.h
6712	BNX2_DMA_WCHAN_STAT_31	0x00000cc8	bnx2.h
6713	BNX2_DMA_WCHAN_STAT_32	0x00000ccc	bnx2.h
6714	BNX2_DMA_WCHAN_STAT_40	0x00000cd0	bnx2.h
6715	BNX2_DMA_WCHAN_STAT_41	0x00000cd4	bnx2.h
6716	BNX2_DMA_WCHAN_STAT_42	0x00000cd8	bnx2.h
6717	BNX2_DMA_WCHAN_STAT_50	0x00000cdc	bnx2.h
6718	BNX2_DMA_WCHAN_STAT_51	0x00000ce0	bnx2.h
6719	BNX2_DMA_WCHAN_STAT_52	0x00000ce4	bnx2.h
6720	BNX2_DMA_WCHAN_STAT_60	0x00000ce8	bnx2.h
6721	BNX2_DMA_WCHAN_STAT_61	0x00000cec	bnx2.h
6722	BNX2_DMA_WCHAN_STAT_62	0x00000cf0	bnx2.h
6723	BNX2_DMA_WCHAN_STAT_70	0x00000cf4	bnx2.h
6724	BNX2_DMA_WCHAN_STAT_71	0x00000cf8	bnx2.h
6725	BNX2_DMA_WCHAN_STAT_72	0x00000cfc	bnx2.h
6726	BNX2_DMA_ARB_STAT_00	0x00000d00	bnx2.h
6727	BNX2_DMA_ARB_STAT_00_MASTER	(0xffffL<<0)	bnx2.h
6728	BNX2_DMA_ARB_STAT_00_MASTER_ENC	(0xffL<<16)	bnx2.h
6729	BNX2_DMA_ARB_STAT_00_CUR_BINMST	(0xffL<<24)	bnx2.h
6730	BNX2_DMA_ARB_STAT_01	0x00000d04	bnx2.h
6731	BNX2_DMA_ARB_STAT_01_LPR_RPTR	(0xfL<<0)	bnx2.h
6732	BNX2_DMA_ARB_STAT_01_LPR_WPTR	(0xfL<<4)	bnx2.h
6733	BNX2_DMA_ARB_STAT_01_LPB_RPTR	(0xfL<<8)	bnx2.h
6734	BNX2_DMA_ARB_STAT_01_LPB_WPTR	(0xfL<<12)	bnx2.h
6735	BNX2_DMA_ARB_STAT_01_HPR_RPTR	(0xfL<<16)	bnx2.h
6736	BNX2_DMA_ARB_STAT_01_HPR_WPTR	(0xfL<<20)	bnx2.h
6737	BNX2_DMA_ARB_STAT_01_HPB_RPTR	(0xfL<<24)	bnx2.h
6738	BNX2_DMA_ARB_STAT_01_HPB_WPTR	(0xfL<<28)	bnx2.h
6739	BNX2_DMA_FUSE_CTRL0_CMD	0x00000f00	bnx2.h
6740	BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_D	(1L<<0)	bnx2.h
6741	BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_D	(1L<<1)	bnx2.h
6742	BNX2_DMA_FUSE_CTRL0_CMD_SHIFT	(1L<<2)	bnx2.h
6743	BNX2_DMA_FUSE_CTRL0_CMD_LOAD	(1L<<3)	bnx2.h
6744	BNX2_DMA_FUSE_CTRL0_CMD_SEL	(0xfL<<8)	bnx2.h
6745	BNX2_DMA_FUSE_CTRL0_DATA	0x00000f04	bnx2.h
6746	BNX2_DMA_FUSE_CTRL1_CMD	0x00000f08	bnx2.h
6747	BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_D	(1L<<0)	bnx2.h
6748	BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_D	(1L<<1)	bnx2.h
6749	BNX2_DMA_FUSE_CTRL1_CMD_SHIFT	(1L<<2)	bnx2.h
6750	BNX2_DMA_FUSE_CTRL1_CMD_LOAD	(1L<<3)	bnx2.h
6751	BNX2_DMA_FUSE_CTRL1_CMD_SEL	(0xfL<<8)	bnx2.h
6752	BNX2_DMA_FUSE_CTRL1_DATA	0x00000f0c	bnx2.h
6753	BNX2_DMA_FUSE_CTRL2_CMD	0x00000f10	bnx2.h
6754	BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_D	(1L<<0)	bnx2.h
6755	BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_D	(1L<<1)	bnx2.h
6756	BNX2_DMA_FUSE_CTRL2_CMD_SHIFT	(1L<<2)	bnx2.h
6757	BNX2_DMA_FUSE_CTRL2_CMD_LOAD	(1L<<3)	bnx2.h
6758	BNX2_DMA_FUSE_CTRL2_CMD_SEL	(0xfL<<8)	bnx2.h
6759	BNX2_DMA_FUSE_CTRL2_DATA	0x00000f14	bnx2.h
6760	BNX2_CTX_COMMAND	0x00001000	bnx2.h
6761	BNX2_CTX_COMMAND_ENABLED	(1L<<0)	bnx2.h
6762	BNX2_CTX_STATUS	0x00001004	bnx2.h
6763	BNX2_CTX_STATUS_LOCK_WAIT	(1L<<0)	bnx2.h
6764	BNX2_CTX_STATUS_READ_STAT	(1L<<16)	bnx2.h
6765	BNX2_CTX_STATUS_WRITE_STAT	(1L<<17)	bnx2.h
6766	BNX2_CTX_STATUS_ACC_STALL_STAT	(1L<<18)	bnx2.h
6767	BNX2_CTX_STATUS_LOCK_STALL_STAT	(1L<<19)	bnx2.h
6768	BNX2_CTX_VIRT_ADDR	0x00001008	bnx2.h
6769	BNX2_CTX_VIRT_ADDR_VIRT_ADDR	(0x7fffL<<6)	bnx2.h
6770	BNX2_CTX_PAGE_TBL	0x0000100c	bnx2.h
6771	BNX2_CTX_PAGE_TBL_PAGE_TBL	(0x3fffL<<6)	bnx2.h
6772	BNX2_CTX_DATA_ADR	0x00001010	bnx2.h
6773	BNX2_CTX_DATA_ADR_DATA_ADR	(0x7ffffL<<2)	bnx2.h
6774	BNX2_CTX_DATA	0x00001014	bnx2.h
6775	BNX2_CTX_LOCK	0x00001018	bnx2.h
6776	BNX2_CTX_LOCK_TYPE	(0x7L<<0)	bnx2.h
6777	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VO	(0x0L<<0)	bnx2.h
6778	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_CO	(0x7L<<0)	bnx2.h
6779	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PR	(0x1L<<0)	bnx2.h
6780	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX	(0x2L<<0)	bnx2.h
6781	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TI	(0x4L<<0)	bnx2.h
6782	BNX2_CTX_LOCK_CID_VALUE	(0x3fffL<<7)	bnx2.h
6783	BNX2_CTX_LOCK_GRANTED	(1L<<26)	bnx2.h
6784	BNX2_CTX_LOCK_MODE	(0x7L<<27)	bnx2.h
6785	BNX2_CTX_LOCK_MODE_UNLOCK	(0x0L<<27)	bnx2.h
6786	BNX2_CTX_LOCK_MODE_IMMEDIATE	(0x1L<<27)	bnx2.h
6787	BNX2_CTX_LOCK_MODE_SURE	(0x2L<<27)	bnx2.h
6788	BNX2_CTX_LOCK_STATUS	(1L<<30)	bnx2.h
6789	BNX2_CTX_LOCK_REQ	(1L<<31)	bnx2.h
6790	BNX2_CTX_ACCESS_STATUS	0x00001040	bnx2.h
6791	BNX2_CTX_ACCESS_STATUS_MASTEREN	(0xfL<<0)	bnx2.h
6792	BNX2_CTX_ACCESS_STATUS_ACCESSME	(0x3L<<10)	bnx2.h
6793	BNX2_CTX_ACCESS_STATUS_PAGETABL	(0x3L<<12)	bnx2.h
6794	BNX2_CTX_ACCESS_STATUS_ACCESSME	(0x3L<<14)	bnx2.h
6795	BNX2_CTX_ACCESS_STATUS_QUALIFIE	(0x7ffL<<17)	bnx2.h
6796	BNX2_CTX_DBG_LOCK_STATUS	0x00001044	bnx2.h
6797	BNX2_CTX_DBG_LOCK_STATUS_SM	(0x3ffL<<0)	bnx2.h
6798	BNX2_CTX_DBG_LOCK_STATUS_MATCH	(0x3ffL<<22)	bnx2.h
6799	BNX2_CTX_CHNL_LOCK_STATUS_0	0x00001080	bnx2.h
6800	BNX2_CTX_CHNL_LOCK_STATUS_0_CID	(0x3fffL<<0)	bnx2.h
6801	BNX2_CTX_CHNL_LOCK_STATUS_0_TYP	(0x3L<<14)	bnx2.h
6802	BNX2_CTX_CHNL_LOCK_STATUS_0_MOD	(1L<<16)	bnx2.h
6803	BNX2_CTX_CHNL_LOCK_STATUS_1	0x00001084	bnx2.h
6804	BNX2_CTX_CHNL_LOCK_STATUS_2	0x00001088	bnx2.h
6805	BNX2_CTX_CHNL_LOCK_STATUS_3	0x0000108c	bnx2.h
6806	BNX2_CTX_CHNL_LOCK_STATUS_4	0x00001090	bnx2.h
6807	BNX2_CTX_CHNL_LOCK_STATUS_5	0x00001094	bnx2.h
6808	BNX2_CTX_CHNL_LOCK_STATUS_6	0x00001098	bnx2.h
6809	BNX2_CTX_CHNL_LOCK_STATUS_7	0x0000109c	bnx2.h
6810	BNX2_CTX_CHNL_LOCK_STATUS_8	0x000010a0	bnx2.h
6811	BNX2_EMAC_MODE	0x00001400	bnx2.h
6812	BNX2_EMAC_MODE_RESET	(1L<<0)	bnx2.h
6813	BNX2_EMAC_MODE_HALF_DUPLEX	(1L<<1)	bnx2.h
6814	BNX2_EMAC_MODE_PORT	(0x3L<<2)	bnx2.h
6815	BNX2_EMAC_MODE_PORT_NONE	(0L<<2)	bnx2.h
6816	BNX2_EMAC_MODE_PORT_MII	(1L<<2)	bnx2.h
6817	BNX2_EMAC_MODE_PORT_GMII	(2L<<2)	bnx2.h
6818	BNX2_EMAC_MODE_PORT_MII_10	(3L<<2)	bnx2.h
6819	BNX2_EMAC_MODE_MAC_LOOP	(1L<<4)	bnx2.h
6820	BNX2_EMAC_MODE_25G	(1L<<5)	bnx2.h
6821	BNX2_EMAC_MODE_TAGGED_MAC_CTL	(1L<<7)	bnx2.h
6822	BNX2_EMAC_MODE_TX_BURST	(1L<<8)	bnx2.h
6823	BNX2_EMAC_MODE_MAX_DEFER_DROP_E	(1L<<9)	bnx2.h
6824	BNX2_EMAC_MODE_EXT_LINK_POL	(1L<<10)	bnx2.h
6825	BNX2_EMAC_MODE_FORCE_LINK	(1L<<11)	bnx2.h
6826	BNX2_EMAC_MODE_MPKT	(1L<<18)	bnx2.h
6827	BNX2_EMAC_MODE_MPKT_RCVD	(1L<<19)	bnx2.h
6828	BNX2_EMAC_MODE_ACPI_RCVD	(1L<<20)	bnx2.h
6829	BNX2_EMAC_STATUS	0x00001404	bnx2.h
6830	BNX2_EMAC_STATUS_LINK	(1L<<11)	bnx2.h
6831	BNX2_EMAC_STATUS_LINK_CHANGE	(1L<<12)	bnx2.h
6832	BNX2_EMAC_STATUS_MI_COMPLETE	(1L<<22)	bnx2.h
6833	BNX2_EMAC_STATUS_MI_INT	(1L<<23)	bnx2.h
6834	BNX2_EMAC_STATUS_AP_ERROR	(1L<<24)	bnx2.h
6835	BNX2_EMAC_STATUS_PARITY_ERROR_S	(1L<<31)	bnx2.h
6836	BNX2_EMAC_ATTENTION_ENA	0x00001408	bnx2.h
6837	BNX2_EMAC_ATTENTION_ENA_LINK	(1L<<11)	bnx2.h
6838	BNX2_EMAC_ATTENTION_ENA_MI_COMP	(1L<<22)	bnx2.h
6839	BNX2_EMAC_ATTENTION_ENA_MI_INT	(1L<<23)	bnx2.h
6840	BNX2_EMAC_ATTENTION_ENA_AP_ERRO	(1L<<24)	bnx2.h
6841	BNX2_EMAC_LED	0x0000140c	bnx2.h
6842	BNX2_EMAC_LED_OVERRIDE	(1L<<0)	bnx2.h
6843	BNX2_EMAC_LED_1000MB_OVERRIDE	(1L<<1)	bnx2.h
6844	BNX2_EMAC_LED_100MB_OVERRIDE	(1L<<2)	bnx2.h
6845	BNX2_EMAC_LED_10MB_OVERRIDE	(1L<<3)	bnx2.h
6846	BNX2_EMAC_LED_TRAFFIC_OVERRIDE	(1L<<4)	bnx2.h
6847	BNX2_EMAC_LED_BLNK_TRAFFIC	(1L<<5)	bnx2.h
6848	BNX2_EMAC_LED_TRAFFIC	(1L<<6)	bnx2.h
6849	BNX2_EMAC_LED_1000MB	(1L<<7)	bnx2.h
6850	BNX2_EMAC_LED_100MB	(1L<<8)	bnx2.h
6851	BNX2_EMAC_LED_10MB	(1L<<9)	bnx2.h
6852	BNX2_EMAC_LED_TRAFFIC_STAT	(1L<<10)	bnx2.h
6853	BNX2_EMAC_LED_BLNK_RATE	(0xfffL<<19)	bnx2.h
6854	BNX2_EMAC_LED_BLNK_RATE_ENA	(1L<<31)	bnx2.h
6855	BNX2_EMAC_MAC_MATCH0	0x00001410	bnx2.h
6856	BNX2_EMAC_MAC_MATCH1	0x00001414	bnx2.h
6857	BNX2_EMAC_MAC_MATCH2	0x00001418	bnx2.h
6858	BNX2_EMAC_MAC_MATCH3	0x0000141c	bnx2.h
6859	BNX2_EMAC_MAC_MATCH4	0x00001420	bnx2.h
6860	BNX2_EMAC_MAC_MATCH5	0x00001424	bnx2.h
6861	BNX2_EMAC_MAC_MATCH6	0x00001428	bnx2.h
6862	BNX2_EMAC_MAC_MATCH7	0x0000142c	bnx2.h
6863	BNX2_EMAC_MAC_MATCH8	0x00001430	bnx2.h
6864	BNX2_EMAC_MAC_MATCH9	0x00001434	bnx2.h
6865	BNX2_EMAC_MAC_MATCH10	0x00001438	bnx2.h
6866	BNX2_EMAC_MAC_MATCH11	0x0000143c	bnx2.h
6867	BNX2_EMAC_MAC_MATCH12	0x00001440	bnx2.h
6868	BNX2_EMAC_MAC_MATCH13	0x00001444	bnx2.h
6869	BNX2_EMAC_MAC_MATCH14	0x00001448	bnx2.h
6870	BNX2_EMAC_MAC_MATCH15	0x0000144c	bnx2.h
6871	BNX2_EMAC_MAC_MATCH16	0x00001450	bnx2.h
6872	BNX2_EMAC_MAC_MATCH17	0x00001454	bnx2.h
6873	BNX2_EMAC_MAC_MATCH18	0x00001458	bnx2.h
6874	BNX2_EMAC_MAC_MATCH19	0x0000145c	bnx2.h
6875	BNX2_EMAC_MAC_MATCH20	0x00001460	bnx2.h
6876	BNX2_EMAC_MAC_MATCH21	0x00001464	bnx2.h
6877	BNX2_EMAC_MAC_MATCH22	0x00001468	bnx2.h
6878	BNX2_EMAC_MAC_MATCH23	0x0000146c	bnx2.h
6879	BNX2_EMAC_MAC_MATCH24	0x00001470	bnx2.h
6880	BNX2_EMAC_MAC_MATCH25	0x00001474	bnx2.h
6881	BNX2_EMAC_MAC_MATCH26	0x00001478	bnx2.h
6882	BNX2_EMAC_MAC_MATCH27	0x0000147c	bnx2.h
6883	BNX2_EMAC_MAC_MATCH28	0x00001480	bnx2.h
6884	BNX2_EMAC_MAC_MATCH29	0x00001484	bnx2.h
6885	BNX2_EMAC_MAC_MATCH30	0x00001488	bnx2.h
6886	BNX2_EMAC_MAC_MATCH31	0x0000148c	bnx2.h
6887	BNX2_EMAC_BACKOFF_SEED	0x00001498	bnx2.h
6888	BNX2_EMAC_BACKOFF_SEED_EMAC_BAC	(0x3ffL<<0)	bnx2.h
6889	BNX2_EMAC_RX_MTU_SIZE	0x0000149c	bnx2.h
6890	BNX2_EMAC_RX_MTU_SIZE_MTU_SIZE	(0xffffL<<0)	bnx2.h
6891	BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA	(1L<<31)	bnx2.h
6892	BNX2_EMAC_SERDES_CNTL	0x000014a4	bnx2.h
6893	BNX2_EMAC_SERDES_CNTL_RXR	(0x7L<<0)	bnx2.h
6894	BNX2_EMAC_SERDES_CNTL_RXG	(0x3L<<3)	bnx2.h
6895	BNX2_EMAC_SERDES_CNTL_RXCKSEL	(1L<<6)	bnx2.h
6896	BNX2_EMAC_SERDES_CNTL_TXBIAS	(0x7L<<7)	bnx2.h
6897	BNX2_EMAC_SERDES_CNTL_BGMAX	(1L<<10)	bnx2.h
6898	BNX2_EMAC_SERDES_CNTL_BGMIN	(1L<<11)	bnx2.h
6899	BNX2_EMAC_SERDES_CNTL_TXMODE	(1L<<12)	bnx2.h
6900	BNX2_EMAC_SERDES_CNTL_TXEDGE	(1L<<13)	bnx2.h
6901	BNX2_EMAC_SERDES_CNTL_SERDES_MO	(1L<<14)	bnx2.h
6902	BNX2_EMAC_SERDES_CNTL_PLLTEST	(1L<<15)	bnx2.h
6903	BNX2_EMAC_SERDES_CNTL_CDET_EN	(1L<<16)	bnx2.h
6904	BNX2_EMAC_SERDES_CNTL_TBI_LBK	(1L<<17)	bnx2.h
6905	BNX2_EMAC_SERDES_CNTL_REMOTE_LB	(1L<<18)	bnx2.h
6906	BNX2_EMAC_SERDES_CNTL_REV_PHASE	(1L<<19)	bnx2.h
6907	BNX2_EMAC_SERDES_CNTL_REGCTL12	(0x3L<<20)	bnx2.h
6908	BNX2_EMAC_SERDES_CNTL_REGCTL25	(0x3L<<22)	bnx2.h
6909	BNX2_EMAC_SERDES_STATUS	0x000014a8	bnx2.h
6910	BNX2_EMAC_SERDES_STATUS_RX_STAT	(0xffL<<0)	bnx2.h
6911	BNX2_EMAC_SERDES_STATUS_COMMA_D	(1L<<8)	bnx2.h
6912	BNX2_EMAC_MDIO_COMM	0x000014ac	bnx2.h
6913	BNX2_EMAC_MDIO_COMM_DATA	(0xffffL<<0)	bnx2.h
6914	BNX2_EMAC_MDIO_COMM_REG_ADDR	(0x1fL<<16)	bnx2.h
6915	BNX2_EMAC_MDIO_COMM_PHY_ADDR	(0x1fL<<21)	bnx2.h
6916	BNX2_EMAC_MDIO_COMM_COMMAND	(0x3L<<26)	bnx2.h
6917	BNX2_EMAC_MDIO_COMM_COMMAND_UND	(0L<<26)	bnx2.h
6918	BNX2_EMAC_MDIO_COMM_COMMAND_WRI	(1L<<26)	bnx2.h
6919	BNX2_EMAC_MDIO_COMM_COMMAND_REA	(2L<<26)	bnx2.h
6920	BNX2_EMAC_MDIO_COMM_COMMAND_UND	(3L<<26)	bnx2.h
6921	BNX2_EMAC_MDIO_COMM_FAIL	(1L<<28)	bnx2.h
6922	BNX2_EMAC_MDIO_COMM_START_BUSY	(1L<<29)	bnx2.h
6923	BNX2_EMAC_MDIO_COMM_DISEXT	(1L<<30)	bnx2.h
6924	BNX2_EMAC_MDIO_STATUS	0x000014b0	bnx2.h
6925	BNX2_EMAC_MDIO_STATUS_LINK	(1L<<0)	bnx2.h
6926	BNX2_EMAC_MDIO_STATUS_10MB	(1L<<1)	bnx2.h
6927	BNX2_EMAC_MDIO_MODE	0x000014b4	bnx2.h
6928	BNX2_EMAC_MDIO_MODE_SHORT_PREAM	(1L<<1)	bnx2.h
6929	BNX2_EMAC_MDIO_MODE_AUTO_POLL	(1L<<4)	bnx2.h
6930	BNX2_EMAC_MDIO_MODE_BIT_BANG	(1L<<8)	bnx2.h
6931	BNX2_EMAC_MDIO_MODE_MDIO	(1L<<9)	bnx2.h
6932	BNX2_EMAC_MDIO_MODE_MDIO_OE	(1L<<10)	bnx2.h
6933	BNX2_EMAC_MDIO_MODE_MDC	(1L<<11)	bnx2.h
6934	BNX2_EMAC_MDIO_MODE_MDINT	(1L<<12)	bnx2.h
6935	BNX2_EMAC_MDIO_MODE_CLOCK_CNT	(0x1fL<<16)	bnx2.h
6936	BNX2_EMAC_MDIO_AUTO_STATUS	0x000014b8	bnx2.h
6937	BNX2_EMAC_MDIO_AUTO_STATUS_AUTO	(1L<<0)	bnx2.h
6938	BNX2_EMAC_TX_MODE	0x000014bc	bnx2.h
6939	BNX2_EMAC_TX_MODE_RESET	(1L<<0)	bnx2.h
6940	BNX2_EMAC_TX_MODE_EXT_PAUSE_EN	(1L<<3)	bnx2.h
6941	BNX2_EMAC_TX_MODE_FLOW_EN	(1L<<4)	bnx2.h
6942	BNX2_EMAC_TX_MODE_BIG_BACKOFF	(1L<<5)	bnx2.h
6943	BNX2_EMAC_TX_MODE_LONG_PAUSE	(1L<<6)	bnx2.h
6944	BNX2_EMAC_TX_MODE_LINK_AWARE	(1L<<7)	bnx2.h
6945	BNX2_EMAC_TX_STATUS	0x000014c0	bnx2.h
6946	BNX2_EMAC_TX_STATUS_XOFFED	(1L<<0)	bnx2.h
6947	BNX2_EMAC_TX_STATUS_XOFF_SENT	(1L<<1)	bnx2.h
6948	BNX2_EMAC_TX_STATUS_XON_SENT	(1L<<2)	bnx2.h
6949	BNX2_EMAC_TX_STATUS_LINK_UP	(1L<<3)	bnx2.h
6950	BNX2_EMAC_TX_STATUS_UNDERRUN	(1L<<4)	bnx2.h
6951	BNX2_EMAC_TX_LENGTHS	0x000014c4	bnx2.h
6952	BNX2_EMAC_TX_LENGTHS_SLOT	(0xffL<<0)	bnx2.h
6953	BNX2_EMAC_TX_LENGTHS_IPG	(0xfL<<8)	bnx2.h
6954	BNX2_EMAC_TX_LENGTHS_IPG_CRS	(0x3L<<12)	bnx2.h
6955	BNX2_EMAC_RX_MODE	0x000014c8	bnx2.h
6956	BNX2_EMAC_RX_MODE_RESET	(1L<<0)	bnx2.h
6957	BNX2_EMAC_RX_MODE_FLOW_EN	(1L<<2)	bnx2.h
6958	BNX2_EMAC_RX_MODE_KEEP_MAC_CONT	(1L<<3)	bnx2.h
6959	BNX2_EMAC_RX_MODE_KEEP_PAUSE	(1L<<4)	bnx2.h
6960	BNX2_EMAC_RX_MODE_ACCEPT_OVERSI	(1L<<5)	bnx2.h
6961	BNX2_EMAC_RX_MODE_ACCEPT_RUNTS	(1L<<6)	bnx2.h
6962	BNX2_EMAC_RX_MODE_LLC_CHK	(1L<<7)	bnx2.h
6963	BNX2_EMAC_RX_MODE_PROMISCUOUS	(1L<<8)	bnx2.h
6964	BNX2_EMAC_RX_MODE_NO_CRC_CHK	(1L<<9)	bnx2.h
6965	BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG	(1L<<10)	bnx2.h
6966	BNX2_EMAC_RX_MODE_FILT_BROADCAS	(1L<<11)	bnx2.h
6967	BNX2_EMAC_RX_MODE_SORT_MODE	(1L<<12)	bnx2.h
6968	BNX2_EMAC_RX_STATUS	0x000014cc	bnx2.h
6969	BNX2_EMAC_RX_STATUS_FFED	(1L<<0)	bnx2.h
6970	BNX2_EMAC_RX_STATUS_FF_RECEIVED	(1L<<1)	bnx2.h
6971	BNX2_EMAC_RX_STATUS_N_RECEIVED	(1L<<2)	bnx2.h
6972	BNX2_EMAC_MULTICAST_HASH0	0x000014d0	bnx2.h
6973	BNX2_EMAC_MULTICAST_HASH1	0x000014d4	bnx2.h
6974	BNX2_EMAC_MULTICAST_HASH2	0x000014d8	bnx2.h
6975	BNX2_EMAC_MULTICAST_HASH3	0x000014dc	bnx2.h
6976	BNX2_EMAC_MULTICAST_HASH4	0x000014e0	bnx2.h
6977	BNX2_EMAC_MULTICAST_HASH5	0x000014e4	bnx2.h
6978	BNX2_EMAC_MULTICAST_HASH6	0x000014e8	bnx2.h
6979	BNX2_EMAC_MULTICAST_HASH7	0x000014ec	bnx2.h
6980	BNX2_EMAC_RX_STAT_IFHCINOCTETS	0x00001500	bnx2.h
6981	BNX2_EMAC_RX_STAT_IFHCINBADOCTE	0x00001504	bnx2.h
6982	BNX2_EMAC_RX_STAT_ETHERSTATSFRA	0x00001508	bnx2.h
6983	BNX2_EMAC_RX_STAT_IFHCINUCASTPK	0x0000150c	bnx2.h
6984	BNX2_EMAC_RX_STAT_IFHCINMULTICA	0x00001510	bnx2.h
6985	BNX2_EMAC_RX_STAT_IFHCINBROADCA	0x00001514	bnx2.h
6986	BNX2_EMAC_RX_STAT_DOT3STATSFCSE	0x00001518	bnx2.h
6987	BNX2_EMAC_RX_STAT_DOT3STATSALIG	0x0000151c	bnx2.h
6988	BNX2_EMAC_RX_STAT_DOT3STATSCARR	0x00001520	bnx2.h
6989	BNX2_EMAC_RX_STAT_XONPAUSEFRAME	0x00001524	bnx2.h
6990	BNX2_EMAC_RX_STAT_XOFFPAUSEFRAM	0x00001528	bnx2.h
6991	BNX2_EMAC_RX_STAT_MACCONTROLFRA	0x0000152c	bnx2.h
6992	BNX2_EMAC_RX_STAT_XOFFSTATEENTE	0x00001530	bnx2.h
6993	BNX2_EMAC_RX_STAT_DOT3STATSFRAM	0x00001534	bnx2.h
6994	BNX2_EMAC_RX_STAT_ETHERSTATSJAB	0x00001538	bnx2.h
6995	BNX2_EMAC_RX_STAT_ETHERSTATSUND	0x0000153c	bnx2.h
6996	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001540	bnx2.h
6997	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001544	bnx2.h
6998	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001548	bnx2.h
6999	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x0000154c	bnx2.h
7000	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001550	bnx2.h
7001	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001554	bnx2.h
7002	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001558	bnx2.h
7003	BNX2_EMAC_RXMAC_DEBUG0	0x0000155c	bnx2.h
7004	BNX2_EMAC_RXMAC_DEBUG1	0x00001560	bnx2.h
7005	BNX2_EMAC_RXMAC_DEBUG1_LENGTH_N	(1L<<0)	bnx2.h
7006	BNX2_EMAC_RXMAC_DEBUG1_LENGTH_O	(1L<<1)	bnx2.h
7007	BNX2_EMAC_RXMAC_DEBUG1_BAD_CRC	(1L<<2)	bnx2.h
7008	BNX2_EMAC_RXMAC_DEBUG1_RX_ERROR	(1L<<3)	bnx2.h
7009	BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ER	(1L<<4)	bnx2.h
7010	BNX2_EMAC_RXMAC_DEBUG1_LAST_DAT	(1L<<5)	bnx2.h
7011	BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE	(1L<<6)	bnx2.h
7012	BNX2_EMAC_RXMAC_DEBUG1_BYTE_COU	(0xffffL<<7)	bnx2.h
7013	BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIM	(0xffL<<23)	bnx2.h
7014	BNX2_EMAC_RXMAC_DEBUG2	0x00001564	bnx2.h
7015	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x7L<<0)	bnx2.h
7016	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x0L<<0)	bnx2.h
7017	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x1L<<0)	bnx2.h
7018	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x2L<<0)	bnx2.h
7019	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x3L<<0)	bnx2.h
7020	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x4L<<0)	bnx2.h
7021	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x5L<<0)	bnx2.h
7022	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x6L<<0)	bnx2.h
7023	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x7L<<0)	bnx2.h
7024	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0xfL<<3)	bnx2.h
7025	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x0L<<3)	bnx2.h
7026	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x1L<<3)	bnx2.h
7027	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x2L<<3)	bnx2.h
7028	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x3L<<3)	bnx2.h
7029	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x4L<<3)	bnx2.h
7030	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x5L<<3)	bnx2.h
7031	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x6L<<3)	bnx2.h
7032	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x7L<<3)	bnx2.h
7033	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x8L<<3)	bnx2.h
7034	BNX2_EMAC_RXMAC_DEBUG2_BYTE_IN	(0xffL<<7)	bnx2.h
7035	BNX2_EMAC_RXMAC_DEBUG2_FALSEC	(1L<<15)	bnx2.h
7036	BNX2_EMAC_RXMAC_DEBUG2_TAGGED	(1L<<16)	bnx2.h
7037	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(1L<<18)	bnx2.h
7038	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(0L<<18)	bnx2.h
7039	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(1L<<18)	bnx2.h
7040	BNX2_EMAC_RXMAC_DEBUG2_SE_COUNT	(0xfL<<19)	bnx2.h
7041	BNX2_EMAC_RXMAC_DEBUG2_QUANTA	(0x1fL<<23)	bnx2.h
7042	BNX2_EMAC_RXMAC_DEBUG3	0x00001568	bnx2.h
7043	BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CT	(0xffffL<<0)	bnx2.h
7044	BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUS	(0xffffL<<16)	bnx2.h
7045	BNX2_EMAC_RXMAC_DEBUG4	0x0000156c	bnx2.h
7046	BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIE	(0xffffL<<0)	bnx2.h
7047	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x3fL<<16)	bnx2.h
7048	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x0L<<16)	bnx2.h
7049	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1L<<16)	bnx2.h
7050	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x2L<<16)	bnx2.h
7051	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x3L<<16)	bnx2.h
7052	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x7L<<16)	bnx2.h
7053	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x5L<<16)	bnx2.h
7054	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x6L<<16)	bnx2.h
7055	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x7L<<16)	bnx2.h
7056	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x8L<<16)	bnx2.h
7057	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x9L<<16)	bnx2.h
7058	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xaL<<16)	bnx2.h
7059	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xeL<<16)	bnx2.h
7060	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xfL<<16)	bnx2.h
7061	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x10L<<16)	bnx2.h
7062	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x11L<<16)	bnx2.h
7063	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x12L<<16)	bnx2.h
7064	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x13L<<16)	bnx2.h
7065	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x14L<<16)	bnx2.h
7066	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x15L<<16)	bnx2.h
7067	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x16L<<16)	bnx2.h
7068	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x17L<<16)	bnx2.h
7069	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x18L<<16)	bnx2.h
7070	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x19L<<16)	bnx2.h
7071	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1aL<<16)	bnx2.h
7072	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1bL<<16)	bnx2.h
7073	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1cL<<16)	bnx2.h
7074	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1dL<<16)	bnx2.h
7075	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1eL<<16)	bnx2.h
7076	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1fL<<16)	bnx2.h
7077	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x20L<<16)	bnx2.h
7078	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x21L<<16)	bnx2.h
7079	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x22L<<16)	bnx2.h
7080	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x23L<<16)	bnx2.h
7081	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x24L<<16)	bnx2.h
7082	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x25L<<16)	bnx2.h
7083	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x26L<<16)	bnx2.h
7084	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x27L<<16)	bnx2.h
7085	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x28L<<16)	bnx2.h
7086	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x29L<<16)	bnx2.h
7087	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x2aL<<16)	bnx2.h
7088	BNX2_EMAC_RXMAC_DEBUG4_DROP_PKT	(1L<<22)	bnx2.h
7089	BNX2_EMAC_RXMAC_DEBUG4_SLOT_FIL	(1L<<23)	bnx2.h
7090	BNX2_EMAC_RXMAC_DEBUG4_FALSE_CA	(1L<<24)	bnx2.h
7091	BNX2_EMAC_RXMAC_DEBUG4_LAST_DAT	(1L<<25)	bnx2.h
7092	BNX2_EMAC_RXMAC_DEBUG4_sfd_FOUN	(1L<<26)	bnx2.h
7093	BNX2_EMAC_RXMAC_DEBUG4_ADVANCE	(1L<<27)	bnx2.h
7094	BNX2_EMAC_RXMAC_DEBUG4_START	(1L<<28)	bnx2.h
7095	BNX2_EMAC_RXMAC_DEBUG5	0x00001570	bnx2.h
7096	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(0x7L<<0)	bnx2.h
7097	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(0L<<0)	bnx2.h
7098	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(1L<<0)	bnx2.h
7099	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(2L<<0)	bnx2.h
7100	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(3L<<0)	bnx2.h
7101	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(4L<<0)	bnx2.h
7102	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(5L<<0)	bnx2.h
7103	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(6L<<0)	bnx2.h
7104	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<4)	bnx2.h
7105	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x0L<<4)	bnx2.h
7106	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x1L<<4)	bnx2.h
7107	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x2L<<4)	bnx2.h
7108	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x3L<<4)	bnx2.h
7109	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x4L<<4)	bnx2.h
7110	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x6L<<4)	bnx2.h
7111	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<4)	bnx2.h
7112	BNX2_EMAC_RXMAC_DEBUG5_EOF_DETE	(1L<<7)	bnx2.h
7113	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<8)	bnx2.h
7114	BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_	(1L<<11)	bnx2.h
7115	BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCO	(1L<<12)	bnx2.h
7116	BNX2_EMAC_RXMAC_DEBUG5_LOAD_DAT	(1L<<13)	bnx2.h
7117	BNX2_EMAC_RXMAC_DEBUG5_LOAD_STA	(1L<<14)	bnx2.h
7118	BNX2_EMAC_RXMAC_DEBUG5_CLR_STAT	(1L<<15)	bnx2.h
7119	BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_	(0x3L<<16)	bnx2.h
7120	BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_	(1L<<19)	bnx2.h
7121	BNX2_EMAC_RXMAC_DEBUG5_FMLEN	(0xfffL<<20)	bnx2.h
7122	BNX2_EMAC_RX_STAT_AC0	0x00001580	bnx2.h
7123	BNX2_EMAC_RX_STAT_AC1	0x00001584	bnx2.h
7124	BNX2_EMAC_RX_STAT_AC2	0x00001588	bnx2.h
7125	BNX2_EMAC_RX_STAT_AC3	0x0000158c	bnx2.h
7126	BNX2_EMAC_RX_STAT_AC4	0x00001590	bnx2.h
7127	BNX2_EMAC_RX_STAT_AC5	0x00001594	bnx2.h
7128	BNX2_EMAC_RX_STAT_AC6	0x00001598	bnx2.h
7129	BNX2_EMAC_RX_STAT_AC7	0x0000159c	bnx2.h
7130	BNX2_EMAC_RX_STAT_AC8	0x000015a0	bnx2.h
7131	BNX2_EMAC_RX_STAT_AC9	0x000015a4	bnx2.h
7132	BNX2_EMAC_RX_STAT_AC10	0x000015a8	bnx2.h
7133	BNX2_EMAC_RX_STAT_AC11	0x000015ac	bnx2.h
7134	BNX2_EMAC_RX_STAT_AC12	0x000015b0	bnx2.h
7135	BNX2_EMAC_RX_STAT_AC13	0x000015b4	bnx2.h
7136	BNX2_EMAC_RX_STAT_AC14	0x000015b8	bnx2.h
7137	BNX2_EMAC_RX_STAT_AC15	0x000015bc	bnx2.h
7138	BNX2_EMAC_RX_STAT_AC16	0x000015c0	bnx2.h
7139	BNX2_EMAC_RX_STAT_AC17	0x000015c4	bnx2.h
7140	BNX2_EMAC_RX_STAT_AC18	0x000015c8	bnx2.h
7141	BNX2_EMAC_RX_STAT_AC19	0x000015cc	bnx2.h
7142	BNX2_EMAC_RX_STAT_AC20	0x000015d0	bnx2.h
7143	BNX2_EMAC_RX_STAT_AC21	0x000015d4	bnx2.h
7144	BNX2_EMAC_RX_STAT_AC22	0x000015d8	bnx2.h
7145	BNX2_EMAC_RXMAC_SUC_DBG_OVERRUN	0x000015dc	bnx2.h
7146	BNX2_EMAC_TX_STAT_IFHCOUTOCTETS	0x00001600	bnx2.h
7147	BNX2_EMAC_TX_STAT_IFHCOUTBADOCT	0x00001604	bnx2.h
7148	BNX2_EMAC_TX_STAT_ETHERSTATSCOL	0x00001608	bnx2.h
7149	BNX2_EMAC_TX_STAT_OUTXONSENT	0x0000160c	bnx2.h
7150	BNX2_EMAC_TX_STAT_OUTXOFFSENT	0x00001610	bnx2.h
7151	BNX2_EMAC_TX_STAT_FLOWCONTROLDO	0x00001614	bnx2.h
7152	BNX2_EMAC_TX_STAT_DOT3STATSSING	0x00001618	bnx2.h
7153	BNX2_EMAC_TX_STAT_DOT3STATSMULT	0x0000161c	bnx2.h
7154	BNX2_EMAC_TX_STAT_DOT3STATSDEFE	0x00001620	bnx2.h
7155	BNX2_EMAC_TX_STAT_DOT3STATSEXCE	0x00001624	bnx2.h
7156	BNX2_EMAC_TX_STAT_DOT3STATSLATE	0x00001628	bnx2.h
7157	BNX2_EMAC_TX_STAT_IFHCOUTUCASTP	0x0000162c	bnx2.h
7158	BNX2_EMAC_TX_STAT_IFHCOUTMULTIC	0x00001630	bnx2.h
7159	BNX2_EMAC_TX_STAT_IFHCOUTBROADC	0x00001634	bnx2.h
7160	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001638	bnx2.h
7161	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x0000163c	bnx2.h
7162	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001640	bnx2.h
7163	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001644	bnx2.h
7164	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001648	bnx2.h
7165	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x0000164c	bnx2.h
7166	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001650	bnx2.h
7167	BNX2_EMAC_TX_STAT_DOT3STATSINTE	0x00001654	bnx2.h
7168	BNX2_EMAC_TXMAC_DEBUG0	0x00001658	bnx2.h
7169	BNX2_EMAC_TXMAC_DEBUG1	0x0000165c	bnx2.h
7170	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0xfL<<0)	bnx2.h
7171	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x0L<<0)	bnx2.h
7172	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x1L<<0)	bnx2.h
7173	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x4L<<0)	bnx2.h
7174	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x5L<<0)	bnx2.h
7175	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x6L<<0)	bnx2.h
7176	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x7L<<0)	bnx2.h
7177	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x8L<<0)	bnx2.h
7178	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x9L<<0)	bnx2.h
7179	BNX2_EMAC_TXMAC_DEBUG1_CRS_ENAB	(1L<<4)	bnx2.h
7180	BNX2_EMAC_TXMAC_DEBUG1_BAD_CRC	(1L<<5)	bnx2.h
7181	BNX2_EMAC_TXMAC_DEBUG1_SE_COUNT	(0xfL<<6)	bnx2.h
7182	BNX2_EMAC_TXMAC_DEBUG1_SEND_PAU	(1L<<10)	bnx2.h
7183	BNX2_EMAC_TXMAC_DEBUG1_LATE_COL	(1L<<11)	bnx2.h
7184	BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFE	(1L<<12)	bnx2.h
7185	BNX2_EMAC_TXMAC_DEBUG1_DEFERRED	(1L<<13)	bnx2.h
7186	BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE	(1L<<14)	bnx2.h
7187	BNX2_EMAC_TXMAC_DEBUG1_IPG_TIME	(0xfL<<15)	bnx2.h
7188	BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIM	(0xffL<<19)	bnx2.h
7189	BNX2_EMAC_TXMAC_DEBUG2	0x00001660	bnx2.h
7190	BNX2_EMAC_TXMAC_DEBUG2_BACK_OFF	(0x3ffL<<0)	bnx2.h
7191	BNX2_EMAC_TXMAC_DEBUG2_BYTE_COU	(0xffffL<<10)	bnx2.h
7192	BNX2_EMAC_TXMAC_DEBUG2_COL_COUN	(0x1fL<<26)	bnx2.h
7193	BNX2_EMAC_TXMAC_DEBUG2_COL_BIT	(1L<<31)	bnx2.h
7194	BNX2_EMAC_TXMAC_DEBUG3	0x00001664	bnx2.h
7195	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xfL<<0)	bnx2.h
7196	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x0L<<0)	bnx2.h
7197	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x1L<<0)	bnx2.h
7198	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x2L<<0)	bnx2.h
7199	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x3L<<0)	bnx2.h
7200	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x4L<<0)	bnx2.h
7201	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x5L<<0)	bnx2.h
7202	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x6L<<0)	bnx2.h
7203	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x7L<<0)	bnx2.h
7204	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x8L<<0)	bnx2.h
7205	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x9L<<0)	bnx2.h
7206	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xaL<<0)	bnx2.h
7207	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xbL<<0)	bnx2.h
7208	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xcL<<0)	bnx2.h
7209	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xdL<<0)	bnx2.h
7210	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xeL<<0)	bnx2.h
7211	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x7L<<4)	bnx2.h
7212	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x0L<<4)	bnx2.h
7213	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x1L<<4)	bnx2.h
7214	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x2L<<4)	bnx2.h
7215	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x3L<<4)	bnx2.h
7216	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x4L<<4)	bnx2.h
7217	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x5L<<4)	bnx2.h
7218	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x6L<<4)	bnx2.h
7219	BNX2_EMAC_TXMAC_DEBUG3_CRS_DONE	(1L<<7)	bnx2.h
7220	BNX2_EMAC_TXMAC_DEBUG3_XOFF	(1L<<8)	bnx2.h
7221	BNX2_EMAC_TXMAC_DEBUG3_SE_COUNT	(0xfL<<9)	bnx2.h
7222	BNX2_EMAC_TXMAC_DEBUG3_QUANTA_C	(0x1fL<<13)	bnx2.h
7223	BNX2_EMAC_TXMAC_DEBUG4	0x00001668	bnx2.h
7224	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_CO	(0xffffL<<0)	bnx2.h
7225	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xfL<<16)	bnx2.h
7226	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x0L<<16)	bnx2.h
7227	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x2L<<16)	bnx2.h
7228	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x3L<<16)	bnx2.h
7229	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x6L<<16)	bnx2.h
7230	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x7L<<16)	bnx2.h
7231	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x5L<<16)	bnx2.h
7232	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x4L<<16)	bnx2.h
7233	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xcL<<16)	bnx2.h
7234	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xeL<<16)	bnx2.h
7235	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xaL<<16)	bnx2.h
7236	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x8L<<16)	bnx2.h
7237	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x9L<<16)	bnx2.h
7238	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xdL<<16)	bnx2.h
7239	BNX2_EMAC_TXMAC_DEBUG4_STATS0_V	(1L<<20)	bnx2.h
7240	BNX2_EMAC_TXMAC_DEBUG4_APPEND_C	(1L<<21)	bnx2.h
7241	BNX2_EMAC_TXMAC_DEBUG4_SLOT_FIL	(1L<<22)	bnx2.h
7242	BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFE	(1L<<23)	bnx2.h
7243	BNX2_EMAC_TXMAC_DEBUG4_SEND_EXT	(1L<<24)	bnx2.h
7244	BNX2_EMAC_TXMAC_DEBUG4_SEND_PAD	(1L<<25)	bnx2.h
7245	BNX2_EMAC_TXMAC_DEBUG4_EOF_LOC	(1L<<26)	bnx2.h
7246	BNX2_EMAC_TXMAC_DEBUG4_COLLIDIN	(1L<<27)	bnx2.h
7247	BNX2_EMAC_TXMAC_DEBUG4_COL_IN	(1L<<28)	bnx2.h
7248	BNX2_EMAC_TXMAC_DEBUG4_BURSTING	(1L<<29)	bnx2.h
7249	BNX2_EMAC_TXMAC_DEBUG4_ADVANCE	(1L<<30)	bnx2.h
7250	BNX2_EMAC_TXMAC_DEBUG4_GO	(1L<<31)	bnx2.h
7251	BNX2_EMAC_TX_STAT_AC0	0x00001680	bnx2.h
7252	BNX2_EMAC_TX_STAT_AC1	0x00001684	bnx2.h
7253	BNX2_EMAC_TX_STAT_AC2	0x00001688	bnx2.h
7254	BNX2_EMAC_TX_STAT_AC3	0x0000168c	bnx2.h
7255	BNX2_EMAC_TX_STAT_AC4	0x00001690	bnx2.h
7256	BNX2_EMAC_TX_STAT_AC5	0x00001694	bnx2.h
7257	BNX2_EMAC_TX_STAT_AC6	0x00001698	bnx2.h
7258	BNX2_EMAC_TX_STAT_AC7	0x0000169c	bnx2.h
7259	BNX2_EMAC_TX_STAT_AC8	0x000016a0	bnx2.h
7260	BNX2_EMAC_TX_STAT_AC9	0x000016a4	bnx2.h
7261	BNX2_EMAC_TX_STAT_AC10	0x000016a8	bnx2.h
7262	BNX2_EMAC_TX_STAT_AC11	0x000016ac	bnx2.h
7263	BNX2_EMAC_TX_STAT_AC12	0x000016b0	bnx2.h
7264	BNX2_EMAC_TX_STAT_AC13	0x000016b4	bnx2.h
7265	BNX2_EMAC_TX_STAT_AC14	0x000016b8	bnx2.h
7266	BNX2_EMAC_TX_STAT_AC15	0x000016bc	bnx2.h
7267	BNX2_EMAC_TX_STAT_AC16	0x000016c0	bnx2.h
7268	BNX2_EMAC_TX_STAT_AC17	0x000016c4	bnx2.h
7269	BNX2_EMAC_TX_STAT_AC18	0x000016c8	bnx2.h
7270	BNX2_EMAC_TX_STAT_AC19	0x000016cc	bnx2.h
7271	BNX2_EMAC_TX_STAT_AC20	0x000016d0	bnx2.h
7272	BNX2_EMAC_TX_STAT_AC21	0x000016d4	bnx2.h
7273	BNX2_EMAC_TXMAC_SUC_DBG_OVERRUN	0x000016d8	bnx2.h
7274	BNX2_RPM_COMMAND	0x00001800	bnx2.h
7275	BNX2_RPM_COMMAND_ENABLED	(1L<<0)	bnx2.h
7276	BNX2_RPM_COMMAND_OVERRUN_ABORT	(1L<<4)	bnx2.h
7277	BNX2_RPM_STATUS	0x00001804	bnx2.h
7278	BNX2_RPM_STATUS_MBUF_WAIT	(1L<<0)	bnx2.h
7279	BNX2_RPM_STATUS_FREE_WAIT	(1L<<1)	bnx2.h
7280	BNX2_RPM_CONFIG	0x00001808	bnx2.h
7281	BNX2_RPM_CONFIG_NO_PSD_HDR_CKSU	(1L<<0)	bnx2.h
7282	BNX2_RPM_CONFIG_ACPI_ENA	(1L<<1)	bnx2.h
7283	BNX2_RPM_CONFIG_ACPI_KEEP	(1L<<2)	bnx2.h
7284	BNX2_RPM_CONFIG_MP_KEEP	(1L<<3)	bnx2.h
7285	BNX2_RPM_CONFIG_SORT_VECT_VAL	(0xfL<<4)	bnx2.h
7286	BNX2_RPM_CONFIG_IGNORE_VLAN	(1L<<31)	bnx2.h
7287	BNX2_RPM_VLAN_MATCH0	0x00001810	bnx2.h
7288	BNX2_RPM_VLAN_MATCH0_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
7289	BNX2_RPM_VLAN_MATCH1	0x00001814	bnx2.h
7290	BNX2_RPM_VLAN_MATCH1_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
7291	BNX2_RPM_VLAN_MATCH2	0x00001818	bnx2.h
7292	BNX2_RPM_VLAN_MATCH2_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
7293	BNX2_RPM_VLAN_MATCH3	0x0000181c	bnx2.h
7294	BNX2_RPM_VLAN_MATCH3_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
7295	BNX2_RPM_SORT_USER0	0x00001820	bnx2.h
7296	BNX2_RPM_SORT_USER0_PM_EN	(0xffffL<<0)	bnx2.h
7297	BNX2_RPM_SORT_USER0_BC_EN	(1L<<16)	bnx2.h
7298	BNX2_RPM_SORT_USER0_MC_EN	(1L<<17)	bnx2.h
7299	BNX2_RPM_SORT_USER0_MC_HSH_EN	(1L<<18)	bnx2.h
7300	BNX2_RPM_SORT_USER0_PROM_EN	(1L<<19)	bnx2.h
7301	BNX2_RPM_SORT_USER0_VLAN_EN	(0xfL<<20)	bnx2.h
7302	BNX2_RPM_SORT_USER0_PROM_VLAN	(1L<<24)	bnx2.h
7303	BNX2_RPM_SORT_USER0_ENA	(1L<<31)	bnx2.h
7304	BNX2_RPM_SORT_USER1	0x00001824	bnx2.h
7305	BNX2_RPM_SORT_USER1_PM_EN	(0xffffL<<0)	bnx2.h
7306	BNX2_RPM_SORT_USER1_BC_EN	(1L<<16)	bnx2.h
7307	BNX2_RPM_SORT_USER1_MC_EN	(1L<<17)	bnx2.h
7308	BNX2_RPM_SORT_USER1_MC_HSH_EN	(1L<<18)	bnx2.h
7309	BNX2_RPM_SORT_USER1_PROM_EN	(1L<<19)	bnx2.h
7310	BNX2_RPM_SORT_USER1_VLAN_EN	(0xfL<<20)	bnx2.h
7311	BNX2_RPM_SORT_USER1_PROM_VLAN	(1L<<24)	bnx2.h
7312	BNX2_RPM_SORT_USER1_ENA	(1L<<31)	bnx2.h
7313	BNX2_RPM_SORT_USER2	0x00001828	bnx2.h
7314	BNX2_RPM_SORT_USER2_PM_EN	(0xffffL<<0)	bnx2.h
7315	BNX2_RPM_SORT_USER2_BC_EN	(1L<<16)	bnx2.h
7316	BNX2_RPM_SORT_USER2_MC_EN	(1L<<17)	bnx2.h
7317	BNX2_RPM_SORT_USER2_MC_HSH_EN	(1L<<18)	bnx2.h
7318	BNX2_RPM_SORT_USER2_PROM_EN	(1L<<19)	bnx2.h
7319	BNX2_RPM_SORT_USER2_VLAN_EN	(0xfL<<20)	bnx2.h
7320	BNX2_RPM_SORT_USER2_PROM_VLAN	(1L<<24)	bnx2.h
7321	BNX2_RPM_SORT_USER2_ENA	(1L<<31)	bnx2.h
7322	BNX2_RPM_SORT_USER3	0x0000182c	bnx2.h
7323	BNX2_RPM_SORT_USER3_PM_EN	(0xffffL<<0)	bnx2.h
7324	BNX2_RPM_SORT_USER3_BC_EN	(1L<<16)	bnx2.h
7325	BNX2_RPM_SORT_USER3_MC_EN	(1L<<17)	bnx2.h
7326	BNX2_RPM_SORT_USER3_MC_HSH_EN	(1L<<18)	bnx2.h
7327	BNX2_RPM_SORT_USER3_PROM_EN	(1L<<19)	bnx2.h
7328	BNX2_RPM_SORT_USER3_VLAN_EN	(0xfL<<20)	bnx2.h
7329	BNX2_RPM_SORT_USER3_PROM_VLAN	(1L<<24)	bnx2.h
7330	BNX2_RPM_SORT_USER3_ENA	(1L<<31)	bnx2.h
7331	BNX2_RPM_STAT_L2_FILTER_DISCARD	0x00001840	bnx2.h
7332	BNX2_RPM_STAT_RULE_CHECKER_DISC	0x00001844	bnx2.h
7333	BNX2_RPM_STAT_IFINFTQDISCARDS	0x00001848	bnx2.h
7334	BNX2_RPM_STAT_IFINMBUFDISCARD	0x0000184c	bnx2.h
7335	BNX2_RPM_STAT_RULE_CHECKER_P4_H	0x00001850	bnx2.h
7336	BNX2_RPM_STAT_AC0	0x00001880	bnx2.h
7337	BNX2_RPM_STAT_AC1	0x00001884	bnx2.h
7338	BNX2_RPM_STAT_AC2	0x00001888	bnx2.h
7339	BNX2_RPM_STAT_AC3	0x0000188c	bnx2.h
7340	BNX2_RPM_STAT_AC4	0x00001890	bnx2.h
7341	BNX2_RPM_RC_CNTL_0	0x00001900	bnx2.h
7342	BNX2_RPM_RC_CNTL_0_OFFSET	(0xffL<<0)	bnx2.h
7343	BNX2_RPM_RC_CNTL_0_CLASS	(0x7L<<8)	bnx2.h
7344	BNX2_RPM_RC_CNTL_0_PRIORITY	(1L<<11)	bnx2.h
7345	BNX2_RPM_RC_CNTL_0_P4	(1L<<12)	bnx2.h
7346	BNX2_RPM_RC_CNTL_0_HDR_TYPE	(0x7L<<13)	bnx2.h
7347	BNX2_RPM_RC_CNTL_0_HDR_TYPE_STA	(0L<<13)	bnx2.h
7348	BNX2_RPM_RC_CNTL_0_HDR_TYPE_IP	(1L<<13)	bnx2.h
7349	BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP	(2L<<13)	bnx2.h
7350	BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP	(3L<<13)	bnx2.h
7351	BNX2_RPM_RC_CNTL_0_HDR_TYPE_DAT	(4L<<13)	bnx2.h
7352	BNX2_RPM_RC_CNTL_0_COMP	(0x3L<<16)	bnx2.h
7353	BNX2_RPM_RC_CNTL_0_COMP_EQUAL	(0L<<16)	bnx2.h
7354	BNX2_RPM_RC_CNTL_0_COMP_NEQUAL	(1L<<16)	bnx2.h
7355	BNX2_RPM_RC_CNTL_0_COMP_GREATER	(2L<<16)	bnx2.h
7356	BNX2_RPM_RC_CNTL_0_COMP_LESS	(3L<<16)	bnx2.h
7357	BNX2_RPM_RC_CNTL_0_SBIT	(1L<<19)	bnx2.h
7358	BNX2_RPM_RC_CNTL_0_CMDSEL	(0xfL<<20)	bnx2.h
7359	BNX2_RPM_RC_CNTL_0_MAP	(1L<<24)	bnx2.h
7360	BNX2_RPM_RC_CNTL_0_DISCARD	(1L<<25)	bnx2.h
7361	BNX2_RPM_RC_CNTL_0_MASK	(1L<<26)	bnx2.h
7362	BNX2_RPM_RC_CNTL_0_P1	(1L<<27)	bnx2.h
7363	BNX2_RPM_RC_CNTL_0_P2	(1L<<28)	bnx2.h
7364	BNX2_RPM_RC_CNTL_0_P3	(1L<<29)	bnx2.h
7365	BNX2_RPM_RC_CNTL_0_NBIT	(1L<<30)	bnx2.h
7366	BNX2_RPM_RC_VALUE_MASK_0	0x00001904	bnx2.h
7367	BNX2_RPM_RC_VALUE_MASK_0_VALUE	(0xffffL<<0)	bnx2.h
7368	BNX2_RPM_RC_VALUE_MASK_0_MASK	(0xffffL<<16)	bnx2.h
7369	BNX2_RPM_RC_CNTL_1	0x00001908	bnx2.h
7370	BNX2_RPM_RC_CNTL_1_A	(0x3ffffL<<0)	bnx2.h
7371	BNX2_RPM_RC_CNTL_1_B	(0xfffL<<19)	bnx2.h
7372	BNX2_RPM_RC_VALUE_MASK_1	0x0000190c	bnx2.h
7373	BNX2_RPM_RC_CNTL_2	0x00001910	bnx2.h
7374	BNX2_RPM_RC_CNTL_2_A	(0x3ffffL<<0)	bnx2.h
7375	BNX2_RPM_RC_CNTL_2_B	(0xfffL<<19)	bnx2.h
7376	BNX2_RPM_RC_VALUE_MASK_2	0x00001914	bnx2.h
7377	BNX2_RPM_RC_CNTL_3	0x00001918	bnx2.h
7378	BNX2_RPM_RC_CNTL_3_A	(0x3ffffL<<0)	bnx2.h
7379	BNX2_RPM_RC_CNTL_3_B	(0xfffL<<19)	bnx2.h
7380	BNX2_RPM_RC_VALUE_MASK_3	0x0000191c	bnx2.h
7381	BNX2_RPM_RC_CNTL_4	0x00001920	bnx2.h
7382	BNX2_RPM_RC_CNTL_4_A	(0x3ffffL<<0)	bnx2.h
7383	BNX2_RPM_RC_CNTL_4_B	(0xfffL<<19)	bnx2.h
7384	BNX2_RPM_RC_VALUE_MASK_4	0x00001924	bnx2.h
7385	BNX2_RPM_RC_CNTL_5	0x00001928	bnx2.h
7386	BNX2_RPM_RC_CNTL_5_A	(0x3ffffL<<0)	bnx2.h
7387	BNX2_RPM_RC_CNTL_5_B	(0xfffL<<19)	bnx2.h
7388	BNX2_RPM_RC_VALUE_MASK_5	0x0000192c	bnx2.h
7389	BNX2_RPM_RC_CNTL_6	0x00001930	bnx2.h
7390	BNX2_RPM_RC_CNTL_6_A	(0x3ffffL<<0)	bnx2.h
7391	BNX2_RPM_RC_CNTL_6_B	(0xfffL<<19)	bnx2.h
7392	BNX2_RPM_RC_VALUE_MASK_6	0x00001934	bnx2.h
7393	BNX2_RPM_RC_CNTL_7	0x00001938	bnx2.h
7394	BNX2_RPM_RC_CNTL_7_A	(0x3ffffL<<0)	bnx2.h
7395	BNX2_RPM_RC_CNTL_7_B	(0xfffL<<19)	bnx2.h
7396	BNX2_RPM_RC_VALUE_MASK_7	0x0000193c	bnx2.h
7397	BNX2_RPM_RC_CNTL_8	0x00001940	bnx2.h
7398	BNX2_RPM_RC_CNTL_8_A	(0x3ffffL<<0)	bnx2.h
7399	BNX2_RPM_RC_CNTL_8_B	(0xfffL<<19)	bnx2.h
7400	BNX2_RPM_RC_VALUE_MASK_8	0x00001944	bnx2.h
7401	BNX2_RPM_RC_CNTL_9	0x00001948	bnx2.h
7402	BNX2_RPM_RC_CNTL_9_A	(0x3ffffL<<0)	bnx2.h
7403	BNX2_RPM_RC_CNTL_9_B	(0xfffL<<19)	bnx2.h
7404	BNX2_RPM_RC_VALUE_MASK_9	0x0000194c	bnx2.h
7405	BNX2_RPM_RC_CNTL_10	0x00001950	bnx2.h
7406	BNX2_RPM_RC_CNTL_10_A	(0x3ffffL<<0)	bnx2.h
7407	BNX2_RPM_RC_CNTL_10_B	(0xfffL<<19)	bnx2.h
7408	BNX2_RPM_RC_VALUE_MASK_10	0x00001954	bnx2.h
7409	BNX2_RPM_RC_CNTL_11	0x00001958	bnx2.h
7410	BNX2_RPM_RC_CNTL_11_A	(0x3ffffL<<0)	bnx2.h
7411	BNX2_RPM_RC_CNTL_11_B	(0xfffL<<19)	bnx2.h
7412	BNX2_RPM_RC_VALUE_MASK_11	0x0000195c	bnx2.h
7413	BNX2_RPM_RC_CNTL_12	0x00001960	bnx2.h
7414	BNX2_RPM_RC_CNTL_12_A	(0x3ffffL<<0)	bnx2.h
7415	BNX2_RPM_RC_CNTL_12_B	(0xfffL<<19)	bnx2.h
7416	BNX2_RPM_RC_VALUE_MASK_12	0x00001964	bnx2.h
7417	BNX2_RPM_RC_CNTL_13	0x00001968	bnx2.h
7418	BNX2_RPM_RC_CNTL_13_A	(0x3ffffL<<0)	bnx2.h
7419	BNX2_RPM_RC_CNTL_13_B	(0xfffL<<19)	bnx2.h
7420	BNX2_RPM_RC_VALUE_MASK_13	0x0000196c	bnx2.h
7421	BNX2_RPM_RC_CNTL_14	0x00001970	bnx2.h
7422	BNX2_RPM_RC_CNTL_14_A	(0x3ffffL<<0)	bnx2.h
7423	BNX2_RPM_RC_CNTL_14_B	(0xfffL<<19)	bnx2.h
7424	BNX2_RPM_RC_VALUE_MASK_14	0x00001974	bnx2.h
7425	BNX2_RPM_RC_CNTL_15	0x00001978	bnx2.h
7426	BNX2_RPM_RC_CNTL_15_A	(0x3ffffL<<0)	bnx2.h
7427	BNX2_RPM_RC_CNTL_15_B	(0xfffL<<19)	bnx2.h
7428	BNX2_RPM_RC_VALUE_MASK_15	0x0000197c	bnx2.h
7429	BNX2_RPM_RC_CONFIG	0x00001980	bnx2.h
7430	BNX2_RPM_RC_CONFIG_RULE_ENABLE	(0xffffL<<0)	bnx2.h
7431	BNX2_RPM_RC_CONFIG_DEF_CLASS	(0x7L<<24)	bnx2.h
7432	BNX2_RPM_DEBUG0	0x00001984	bnx2.h
7433	BNX2_RPM_DEBUG0_FM_BCNT	(0xffffL<<0)	bnx2.h
7434	BNX2_RPM_DEBUG0_T_DATA_OFST_VLD	(1L<<16)	bnx2.h
7435	BNX2_RPM_DEBUG0_T_UDP_OFST_VLD	(1L<<17)	bnx2.h
7436	BNX2_RPM_DEBUG0_T_TCP_OFST_VLD	(1L<<18)	bnx2.h
7437	BNX2_RPM_DEBUG0_T_IP_OFST_VLD	(1L<<19)	bnx2.h
7438	BNX2_RPM_DEBUG0_IP_MORE_FRGMT	(1L<<20)	bnx2.h
7439	BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP	(1L<<21)	bnx2.h
7440	BNX2_RPM_DEBUG0_LLC_SNAP	(1L<<22)	bnx2.h
7441	BNX2_RPM_DEBUG0_FM_STARTED	(1L<<23)	bnx2.h
7442	BNX2_RPM_DEBUG0_DONE	(1L<<24)	bnx2.h
7443	BNX2_RPM_DEBUG0_WAIT_4_DONE	(1L<<25)	bnx2.h
7444	BNX2_RPM_DEBUG0_USE_TPBUF_CKSUM	(1L<<26)	bnx2.h
7445	BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_C	(1L<<27)	bnx2.h
7446	BNX2_RPM_DEBUG0_IGNORE_VLAN	(1L<<28)	bnx2.h
7447	BNX2_RPM_DEBUG0_RP_ENA_ACTIVE	(1L<<31)	bnx2.h
7448	BNX2_RPM_DEBUG1	0x00001988	bnx2.h
7449	BNX2_RPM_DEBUG1_FSM_CUR_ST	(0xffffL<<0)	bnx2.h
7450	BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE	(0L<<0)	bnx2.h
7451	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(1L<<0)	bnx2.h
7452	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(2L<<0)	bnx2.h
7453	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(4L<<0)	bnx2.h
7454	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(8L<<0)	bnx2.h
7455	BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_S	(16L<<0)	bnx2.h
7456	BNX2_RPM_DEBUG1_FSM_CUR_ST_IP	(32L<<0)	bnx2.h
7457	BNX2_RPM_DEBUG1_FSM_CUR_ST_TCP	(64L<<0)	bnx2.h
7458	BNX2_RPM_DEBUG1_FSM_CUR_ST_UDP	(128L<<0)	bnx2.h
7459	BNX2_RPM_DEBUG1_FSM_CUR_ST_AH	(256L<<0)	bnx2.h
7460	BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP	(512L<<0)	bnx2.h
7461	BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_	(1024L<<0)	bnx2.h
7462	BNX2_RPM_DEBUG1_FSM_CUR_ST_DATA	(2048L<<0)	bnx2.h
7463	BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_	(0x2000L<<0)	bnx2.h
7464	BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_	(0x4000L<<0)	bnx2.h
7465	BNX2_RPM_DEBUG1_FSM_CUR_ST_LATC	(0x8000L<<0)	bnx2.h
7466	BNX2_RPM_DEBUG1_HDR_BCNT	(0x7ffL<<16)	bnx2.h
7467	BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D	(1L<<28)	bnx2.h
7468	BNX2_RPM_DEBUG1_VLAN_REMOVED_D2	(1L<<29)	bnx2.h
7469	BNX2_RPM_DEBUG1_VLAN_REMOVED_D1	(1L<<30)	bnx2.h
7470	BNX2_RPM_DEBUG1_EOF_0XTRA_WD	(1L<<31)	bnx2.h
7471	BNX2_RPM_DEBUG2	0x0000198c	bnx2.h
7472	BNX2_RPM_DEBUG2_CMD_HIT_VEC	(0xffffL<<0)	bnx2.h
7473	BNX2_RPM_DEBUG2_IP_BCNT	(0xffL<<16)	bnx2.h
7474	BNX2_RPM_DEBUG2_THIS_CMD_M4	(1L<<24)	bnx2.h
7475	BNX2_RPM_DEBUG2_THIS_CMD_M3	(1L<<25)	bnx2.h
7476	BNX2_RPM_DEBUG2_THIS_CMD_M2	(1L<<26)	bnx2.h
7477	BNX2_RPM_DEBUG2_THIS_CMD_M1	(1L<<27)	bnx2.h
7478	BNX2_RPM_DEBUG2_IPIPE_EMPTY	(1L<<28)	bnx2.h
7479	BNX2_RPM_DEBUG2_FM_DISCARD	(1L<<29)	bnx2.h
7480	BNX2_RPM_DEBUG2_LAST_RULE_IN_FM	(1L<<30)	bnx2.h
7481	BNX2_RPM_DEBUG2_LAST_RULE_IN_FM	(1L<<31)	bnx2.h
7482	BNX2_RPM_DEBUG3	0x00001990	bnx2.h
7483	BNX2_RPM_DEBUG3_AVAIL_MBUF_PTR	(0x1ffL<<0)	bnx2.h
7484	BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_RE	(1L<<9)	bnx2.h
7485	BNX2_RPM_DEBUG3_RDE_RBUF_WR_LAS	(1L<<10)	bnx2.h
7486	BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ	(1L<<11)	bnx2.h
7487	BNX2_RPM_DEBUG3_RDE_RBUF_FREE_R	(1L<<12)	bnx2.h
7488	BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_	(1L<<13)	bnx2.h
7489	BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAV	(1L<<14)	bnx2.h
7490	BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DR	(1L<<15)	bnx2.h
7491	BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY	(0xfL<<16)	bnx2.h
7492	BNX2_RPM_DEBUG3_RDE_SRC_FIFO_AL	(1L<<21)	bnx2.h
7493	BNX2_RPM_DEBUG3_DROP_NXT_VLD	(1L<<22)	bnx2.h
7494	BNX2_RPM_DEBUG3_DROP_NXT	(1L<<23)	bnx2.h
7495	BNX2_RPM_DEBUG3_FTQ_FSM	(0x3L<<24)	bnx2.h
7496	BNX2_RPM_DEBUG3_FTQ_FSM_IDLE	(0x0L<<24)	bnx2.h
7497	BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_AC	(0x1L<<24)	bnx2.h
7498	BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FR	(0x2L<<24)	bnx2.h
7499	BNX2_RPM_DEBUG3_MBWRITE_FSM	(0x3L<<26)	bnx2.h
7500	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x0L<<26)	bnx2.h
7501	BNX2_RPM_DEBUG3_MBWRITE_FSM_GET	(0x1L<<26)	bnx2.h
7502	BNX2_RPM_DEBUG3_MBWRITE_FSM_DMA	(0x2L<<26)	bnx2.h
7503	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x3L<<26)	bnx2.h
7504	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x4L<<26)	bnx2.h
7505	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x5L<<26)	bnx2.h
7506	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x6L<<26)	bnx2.h
7507	BNX2_RPM_DEBUG3_MBWRITE_FSM_DON	(0x7L<<26)	bnx2.h
7508	BNX2_RPM_DEBUG3_MBFREE_FSM	(1L<<29)	bnx2.h
7509	BNX2_RPM_DEBUG3_MBFREE_FSM_IDLE	(0L<<29)	bnx2.h
7510	BNX2_RPM_DEBUG3_MBFREE_FSM_WAIT	(1L<<29)	bnx2.h
7511	BNX2_RPM_DEBUG3_MBALLOC_FSM	(1L<<30)	bnx2.h
7512	BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_	(0x0L<<30)	bnx2.h
7513	BNX2_RPM_DEBUG3_MBALLOC_FSM_IVE	(0x1L<<30)	bnx2.h
7514	BNX2_RPM_DEBUG3_CCODE_EOF_ERROR	(1L<<31)	bnx2.h
7515	BNX2_RPM_DEBUG4	0x00001994	bnx2.h
7516	BNX2_RPM_DEBUG4_DFSM_MBUF_CLUST	(0x1ffffffL<<0)	bnx2.h
7517	BNX2_RPM_DEBUG4_DFIFO_CUR_CCODE	(0x7L<<25)	bnx2.h
7518	BNX2_RPM_DEBUG4_MBWRITE_FSM	(0x7L<<28)	bnx2.h
7519	BNX2_RPM_DEBUG4_DFIFO_EMPTY	(1L<<31)	bnx2.h
7520	BNX2_RPM_DEBUG5	0x00001998	bnx2.h
7521	BNX2_RPM_DEBUG5_RDROP_WPTR	(0x1fL<<0)	bnx2.h
7522	BNX2_RPM_DEBUG5_RDROP_ACPI_RPTR	(0x1fL<<5)	bnx2.h
7523	BNX2_RPM_DEBUG5_RDROP_MC_RPTR	(0x1fL<<10)	bnx2.h
7524	BNX2_RPM_DEBUG5_RDROP_RC_RPTR	(0x1fL<<15)	bnx2.h
7525	BNX2_RPM_DEBUG5_RDROP_ACPI_EMPT	(1L<<20)	bnx2.h
7526	BNX2_RPM_DEBUG5_RDROP_MC_EMPTY	(1L<<21)	bnx2.h
7527	BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_	(1L<<22)	bnx2.h
7528	BNX2_RPM_DEBUG5_HOLDREG_WOL_DRO	(1L<<23)	bnx2.h
7529	BNX2_RPM_DEBUG5_HOLDREG_DISCARD	(1L<<24)	bnx2.h
7530	BNX2_RPM_DEBUG5_HOLDREG_MBUF_NO	(1L<<25)	bnx2.h
7531	BNX2_RPM_DEBUG5_HOLDREG_MC_EMPT	(1L<<26)	bnx2.h
7532	BNX2_RPM_DEBUG5_HOLDREG_RC_EMPT	(1L<<27)	bnx2.h
7533	BNX2_RPM_DEBUG5_HOLDREG_FC_EMPT	(1L<<28)	bnx2.h
7534	BNX2_RPM_DEBUG5_HOLDREG_ACPI_EM	(1L<<29)	bnx2.h
7535	BNX2_RPM_DEBUG5_HOLDREG_FULL_T	(1L<<30)	bnx2.h
7536	BNX2_RPM_DEBUG5_HOLDREG_RD	(1L<<31)	bnx2.h
7537	BNX2_RPM_DEBUG6	0x0000199c	bnx2.h
7538	BNX2_RPM_DEBUG6_ACPI_VEC	(0xffffL<<0)	bnx2.h
7539	BNX2_RPM_DEBUG6_VEC	(0xffffL<<16)	bnx2.h
7540	BNX2_RPM_DEBUG7	0x000019a0	bnx2.h
7541	BNX2_RPM_DEBUG7_RPM_DBG7_LAST_C	(0xffffffffL<<0)	bnx2.h
7542	BNX2_RPM_DEBUG8	0x000019a4	bnx2.h
7543	BNX2_RPM_DEBUG8_PS_ACPI_FSM	(0xfL<<0)	bnx2.h
7544	BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDL	(0L<<0)	bnx2.h
7545	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(1L<<0)	bnx2.h
7546	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(2L<<0)	bnx2.h
7547	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(3L<<0)	bnx2.h
7548	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(4L<<0)	bnx2.h
7549	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_	(5L<<0)	bnx2.h
7550	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_	(6L<<0)	bnx2.h
7551	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_	(7L<<0)	bnx2.h
7552	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_	(8L<<0)	bnx2.h
7553	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_	(9L<<0)	bnx2.h
7554	BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAI	(10L<<0)	bnx2.h
7555	BNX2_RPM_DEBUG8_COMPARE_AT_W0	(1L<<4)	bnx2.h
7556	BNX2_RPM_DEBUG8_COMPARE_AT_W3_D	(1L<<5)	bnx2.h
7557	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<6)	bnx2.h
7558	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<7)	bnx2.h
7559	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<8)	bnx2.h
7560	BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLD	(1L<<9)	bnx2.h
7561	BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLD	(1L<<10)	bnx2.h
7562	BNX2_RPM_DEBUG8_NXT_EOF_W_12_VL	(1L<<11)	bnx2.h
7563	BNX2_RPM_DEBUG8_EOF_DET	(1L<<12)	bnx2.h
7564	BNX2_RPM_DEBUG8_SOF_DET	(1L<<13)	bnx2.h
7565	BNX2_RPM_DEBUG8_WAIT_4_SOF	(1L<<14)	bnx2.h
7566	BNX2_RPM_DEBUG8_ALL_DONE	(1L<<15)	bnx2.h
7567	BNX2_RPM_DEBUG8_THBUF_ADDR	(0x7fL<<16)	bnx2.h
7568	BNX2_RPM_DEBUG8_BYTE_CTR	(0xffL<<24)	bnx2.h
7569	BNX2_RPM_DEBUG9	0x000019a8	bnx2.h
7570	BNX2_RPM_DEBUG9_OUTFIFO_COUNT	(0x7L<<0)	bnx2.h
7571	BNX2_RPM_DEBUG9_RDE_ACPI_RDY	(1L<<3)	bnx2.h
7572	BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT	(0x7L<<4)	bnx2.h
7573	BNX2_RPM_DEBUG9_OUTFIFO_OVERRUN	(1L<<28)	bnx2.h
7574	BNX2_RPM_DEBUG9_INFIFO_OVERRUN_	(1L<<29)	bnx2.h
7575	BNX2_RPM_DEBUG9_ACPI_MATCH_INT	(1L<<30)	bnx2.h
7576	BNX2_RPM_DEBUG9_ACPI_ENABLE_SYN	(1L<<31)	bnx2.h
7577	BNX2_RPM_ACPI_DBG_BUF_W00	0x000019c0	bnx2.h
7578	BNX2_RPM_ACPI_DBG_BUF_W01	0x000019c4	bnx2.h
7579	BNX2_RPM_ACPI_DBG_BUF_W02	0x000019c8	bnx2.h
7580	BNX2_RPM_ACPI_DBG_BUF_W03	0x000019cc	bnx2.h
7581	BNX2_RPM_ACPI_DBG_BUF_W10	0x000019d0	bnx2.h
7582	BNX2_RPM_ACPI_DBG_BUF_W11	0x000019d4	bnx2.h
7583	BNX2_RPM_ACPI_DBG_BUF_W12	0x000019d8	bnx2.h
7584	BNX2_RPM_ACPI_DBG_BUF_W13	0x000019dc	bnx2.h
7585	BNX2_RPM_ACPI_DBG_BUF_W20	0x000019e0	bnx2.h
7586	BNX2_RPM_ACPI_DBG_BUF_W21	0x000019e4	bnx2.h
7587	BNX2_RPM_ACPI_DBG_BUF_W22	0x000019e8	bnx2.h
7588	BNX2_RPM_ACPI_DBG_BUF_W23	0x000019ec	bnx2.h
7589	BNX2_RPM_ACPI_DBG_BUF_W30	0x000019f0	bnx2.h
7590	BNX2_RPM_ACPI_DBG_BUF_W31	0x000019f4	bnx2.h
7591	BNX2_RPM_ACPI_DBG_BUF_W32	0x000019f8	bnx2.h
7592	BNX2_RPM_ACPI_DBG_BUF_W33	0x000019fc	bnx2.h
7593	BNX2_RBUF_COMMAND	0x00200000	bnx2.h
7594	BNX2_RBUF_COMMAND_ENABLED	(1L<<0)	bnx2.h
7595	BNX2_RBUF_COMMAND_FREE_INIT	(1L<<1)	bnx2.h
7596	BNX2_RBUF_COMMAND_RAM_INIT	(1L<<2)	bnx2.h
7597	BNX2_RBUF_COMMAND_OVER_FREE	(1L<<4)	bnx2.h
7598	BNX2_RBUF_COMMAND_ALLOC_REQ	(1L<<5)	bnx2.h
7599	BNX2_RBUF_STATUS1	0x00200004	bnx2.h
7600	BNX2_RBUF_STATUS1_FREE_COUNT	(0x3ffL<<0)	bnx2.h
7601	BNX2_RBUF_STATUS2	0x00200008	bnx2.h
7602	BNX2_RBUF_STATUS2_FREE_TAIL	(0x3ffL<<0)	bnx2.h
7603	BNX2_RBUF_STATUS2_FREE_HEAD	(0x3ffL<<16)	bnx2.h
7604	BNX2_RBUF_CONFIG	0x0020000c	bnx2.h
7605	BNX2_RBUF_CONFIG_XOFF_TRIP	(0x3ffL<<0)	bnx2.h
7606	BNX2_RBUF_CONFIG_XON_TRIP	(0x3ffL<<16)	bnx2.h
7607	BNX2_RBUF_FW_BUF_ALLOC	0x00200010	bnx2.h
7608	BNX2_RBUF_FW_BUF_ALLOC_VALUE	(0x1ffL<<7)	bnx2.h
7609	BNX2_RBUF_FW_BUF_FREE	0x00200014	bnx2.h
7610	BNX2_RBUF_FW_BUF_FREE_COUNT	(0x7fL<<0)	bnx2.h
7611	BNX2_RBUF_FW_BUF_FREE_TAIL	(0x1ffL<<7)	bnx2.h
7612	BNX2_RBUF_FW_BUF_FREE_HEAD	(0x1ffL<<16)	bnx2.h
7613	BNX2_RBUF_FW_BUF_SEL	0x00200018	bnx2.h
7614	BNX2_RBUF_FW_BUF_SEL_COUNT	(0x7fL<<0)	bnx2.h
7615	BNX2_RBUF_FW_BUF_SEL_TAIL	(0x1ffL<<7)	bnx2.h
7616	BNX2_RBUF_FW_BUF_SEL_HEAD	(0x1ffL<<16)	bnx2.h
7617	BNX2_RBUF_CONFIG2	0x0020001c	bnx2.h
7618	BNX2_RBUF_CONFIG2_MAC_DROP_TRIP	(0x3ffL<<0)	bnx2.h
7619	BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP	(0x3ffL<<16)	bnx2.h
7620	BNX2_RBUF_CONFIG3	0x00200020	bnx2.h
7621	BNX2_RBUF_CONFIG3_CU_DROP_TRIP	(0x3ffL<<0)	bnx2.h
7622	BNX2_RBUF_CONFIG3_CU_KEEP_TRIP	(0x3ffL<<16)	bnx2.h
7623	BNX2_RBUF_PKT_DATA	0x00208000	bnx2.h
7624	BNX2_RBUF_CLIST_DATA	0x00210000	bnx2.h
7625	BNX2_RBUF_BUF_DATA	0x00220000	bnx2.h
7626	BNX2_RV2P_COMMAND	0x00002800	bnx2.h
7627	BNX2_RV2P_COMMAND_ENABLED	(1L<<0)	bnx2.h
7628	BNX2_RV2P_COMMAND_PROC1_INTRPT	(1L<<1)	bnx2.h
7629	BNX2_RV2P_COMMAND_PROC2_INTRPT	(1L<<2)	bnx2.h
7630	BNX2_RV2P_COMMAND_ABORT0	(1L<<4)	bnx2.h
7631	BNX2_RV2P_COMMAND_ABORT1	(1L<<5)	bnx2.h
7632	BNX2_RV2P_COMMAND_ABORT2	(1L<<6)	bnx2.h
7633	BNX2_RV2P_COMMAND_ABORT3	(1L<<7)	bnx2.h
7634	BNX2_RV2P_COMMAND_ABORT4	(1L<<8)	bnx2.h
7635	BNX2_RV2P_COMMAND_ABORT5	(1L<<9)	bnx2.h
7636	BNX2_RV2P_COMMAND_PROC1_RESET	(1L<<16)	bnx2.h
7637	BNX2_RV2P_COMMAND_PROC2_RESET	(1L<<17)	bnx2.h
7638	BNX2_RV2P_COMMAND_CTXIF_RESET	(1L<<18)	bnx2.h
7639	BNX2_RV2P_STATUS	0x00002804	bnx2.h
7640	BNX2_RV2P_STATUS_ALWAYS_0	(1L<<0)	bnx2.h
7641	BNX2_RV2P_STATUS_RV2P_GEN_STAT0	(1L<<8)	bnx2.h
7642	BNX2_RV2P_STATUS_RV2P_GEN_STAT1	(1L<<9)	bnx2.h
7643	BNX2_RV2P_STATUS_RV2P_GEN_STAT2	(1L<<10)	bnx2.h
7644	BNX2_RV2P_STATUS_RV2P_GEN_STAT3	(1L<<11)	bnx2.h
7645	BNX2_RV2P_STATUS_RV2P_GEN_STAT4	(1L<<12)	bnx2.h
7646	BNX2_RV2P_STATUS_RV2P_GEN_STAT5	(1L<<13)	bnx2.h
7647	BNX2_RV2P_CONFIG	0x00002808	bnx2.h
7648	BNX2_RV2P_CONFIG_STALL_PROC1	(1L<<0)	bnx2.h
7649	BNX2_RV2P_CONFIG_STALL_PROC2	(1L<<1)	bnx2.h
7650	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<8)	bnx2.h
7651	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<9)	bnx2.h
7652	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<10)	bnx2.h
7653	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<11)	bnx2.h
7654	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<12)	bnx2.h
7655	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<13)	bnx2.h
7656	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<16)	bnx2.h
7657	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<17)	bnx2.h
7658	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<18)	bnx2.h
7659	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<19)	bnx2.h
7660	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<20)	bnx2.h
7661	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<21)	bnx2.h
7662	BNX2_RV2P_CONFIG_PAGE_SIZE	(0xfL<<24)	bnx2.h
7663	BNX2_RV2P_CONFIG_PAGE_SIZE_256	(0L<<24)	bnx2.h
7664	BNX2_RV2P_CONFIG_PAGE_SIZE_512	(1L<<24)	bnx2.h
7665	BNX2_RV2P_CONFIG_PAGE_SIZE_1K	(2L<<24)	bnx2.h
7666	BNX2_RV2P_CONFIG_PAGE_SIZE_2K	(3L<<24)	bnx2.h
7667	BNX2_RV2P_CONFIG_PAGE_SIZE_4K	(4L<<24)	bnx2.h
7668	BNX2_RV2P_CONFIG_PAGE_SIZE_8K	(5L<<24)	bnx2.h
7669	BNX2_RV2P_CONFIG_PAGE_SIZE_16K	(6L<<24)	bnx2.h
7670	BNX2_RV2P_CONFIG_PAGE_SIZE_32K	(7L<<24)	bnx2.h
7671	BNX2_RV2P_CONFIG_PAGE_SIZE_64K	(8L<<24)	bnx2.h
7672	BNX2_RV2P_CONFIG_PAGE_SIZE_128K	(9L<<24)	bnx2.h
7673	BNX2_RV2P_CONFIG_PAGE_SIZE_256K	(10L<<24)	bnx2.h
7674	BNX2_RV2P_CONFIG_PAGE_SIZE_512K	(11L<<24)	bnx2.h
7675	BNX2_RV2P_CONFIG_PAGE_SIZE_1M	(12L<<24)	bnx2.h
7676	BNX2_RV2P_GEN_BFR_ADDR_0	0x00002810	bnx2.h
7677	BNX2_RV2P_GEN_BFR_ADDR_0_VALUE	(0xffffL<<16)	bnx2.h
7678	BNX2_RV2P_GEN_BFR_ADDR_1	0x00002814	bnx2.h
7679	BNX2_RV2P_GEN_BFR_ADDR_1_VALUE	(0xffffL<<16)	bnx2.h
7680	BNX2_RV2P_GEN_BFR_ADDR_2	0x00002818	bnx2.h
7681	BNX2_RV2P_GEN_BFR_ADDR_2_VALUE	(0xffffL<<16)	bnx2.h
7682	BNX2_RV2P_GEN_BFR_ADDR_3	0x0000281c	bnx2.h
7683	BNX2_RV2P_GEN_BFR_ADDR_3_VALUE	(0xffffL<<16)	bnx2.h
7684	BNX2_RV2P_INSTR_HIGH	0x00002830	bnx2.h
7685	BNX2_RV2P_INSTR_HIGH_HIGH	(0x1fL<<0)	bnx2.h
7686	BNX2_RV2P_INSTR_LOW	0x00002834	bnx2.h
7687	BNX2_RV2P_PROC1_ADDR_CMD	0x00002838	bnx2.h
7688	BNX2_RV2P_PROC1_ADDR_CMD_ADD	(0x3ffL<<0)	bnx2.h
7689	BNX2_RV2P_PROC1_ADDR_CMD_RDWR	(1L<<31)	bnx2.h
7690	BNX2_RV2P_PROC2_ADDR_CMD	0x0000283c	bnx2.h
7691	BNX2_RV2P_PROC2_ADDR_CMD_ADD	(0x3ffL<<0)	bnx2.h
7692	BNX2_RV2P_PROC2_ADDR_CMD_RDWR	(1L<<31)	bnx2.h
7693	BNX2_RV2P_PROC1_GRC_DEBUG	0x00002840	bnx2.h
7694	BNX2_RV2P_PROC2_GRC_DEBUG	0x00002844	bnx2.h
7695	BNX2_RV2P_GRC_PROC_DEBUG	0x00002848	bnx2.h
7696	BNX2_RV2P_DEBUG_VECT_PEEK	0x0000284c	bnx2.h
7697	BNX2_RV2P_DEBUG_VECT_PEEK_1_VAL	(0x7ffL<<0)	bnx2.h
7698	BNX2_RV2P_DEBUG_VECT_PEEK_1_PEE	(1L<<11)	bnx2.h
7699	BNX2_RV2P_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
7700	BNX2_RV2P_DEBUG_VECT_PEEK_2_VAL	(0x7ffL<<16)	bnx2.h
7701	BNX2_RV2P_DEBUG_VECT_PEEK_2_PEE	(1L<<27)	bnx2.h
7702	BNX2_RV2P_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
7703	BNX2_RV2P_PFTQ_DATA	0x00002b40	bnx2.h
7704	BNX2_RV2P_PFTQ_CMD	0x00002b78	bnx2.h
7705	BNX2_RV2P_PFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7706	BNX2_RV2P_PFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7707	BNX2_RV2P_PFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7708	BNX2_RV2P_PFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7709	BNX2_RV2P_PFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7710	BNX2_RV2P_PFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7711	BNX2_RV2P_PFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
7712	BNX2_RV2P_PFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7713	BNX2_RV2P_PFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
7714	BNX2_RV2P_PFTQ_CMD_POP	(1L<<30)	bnx2.h
7715	BNX2_RV2P_PFTQ_CMD_BUSY	(1L<<31)	bnx2.h
7716	BNX2_RV2P_PFTQ_CTL	0x00002b7c	bnx2.h
7717	BNX2_RV2P_PFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7718	BNX2_RV2P_PFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7719	BNX2_RV2P_PFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
7720	BNX2_RV2P_PFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7721	BNX2_RV2P_PFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7722	BNX2_RV2P_TFTQ_DATA	0x00002b80	bnx2.h
7723	BNX2_RV2P_TFTQ_CMD	0x00002bb8	bnx2.h
7724	BNX2_RV2P_TFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7725	BNX2_RV2P_TFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7726	BNX2_RV2P_TFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7727	BNX2_RV2P_TFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7728	BNX2_RV2P_TFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7729	BNX2_RV2P_TFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7730	BNX2_RV2P_TFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
7731	BNX2_RV2P_TFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7732	BNX2_RV2P_TFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
7733	BNX2_RV2P_TFTQ_CMD_POP	(1L<<30)	bnx2.h
7734	BNX2_RV2P_TFTQ_CMD_BUSY	(1L<<31)	bnx2.h
7735	BNX2_RV2P_TFTQ_CTL	0x00002bbc	bnx2.h
7736	BNX2_RV2P_TFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7737	BNX2_RV2P_TFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7738	BNX2_RV2P_TFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
7739	BNX2_RV2P_TFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7740	BNX2_RV2P_TFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7741	BNX2_RV2P_MFTQ_DATA	0x00002bc0	bnx2.h
7742	BNX2_RV2P_MFTQ_CMD	0x00002bf8	bnx2.h
7743	BNX2_RV2P_MFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7744	BNX2_RV2P_MFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7745	BNX2_RV2P_MFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7746	BNX2_RV2P_MFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7747	BNX2_RV2P_MFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7748	BNX2_RV2P_MFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7749	BNX2_RV2P_MFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
7750	BNX2_RV2P_MFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7751	BNX2_RV2P_MFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
7752	BNX2_RV2P_MFTQ_CMD_POP	(1L<<30)	bnx2.h
7753	BNX2_RV2P_MFTQ_CMD_BUSY	(1L<<31)	bnx2.h
7754	BNX2_RV2P_MFTQ_CTL	0x00002bfc	bnx2.h
7755	BNX2_RV2P_MFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7756	BNX2_RV2P_MFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7757	BNX2_RV2P_MFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
7758	BNX2_RV2P_MFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7759	BNX2_RV2P_MFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7760	BNX2_MQ_COMMAND	0x00003c00	bnx2.h
7761	BNX2_MQ_COMMAND_ENABLED	(1L<<0)	bnx2.h
7762	BNX2_MQ_COMMAND_OVERFLOW	(1L<<4)	bnx2.h
7763	BNX2_MQ_COMMAND_WR_ERROR	(1L<<5)	bnx2.h
7764	BNX2_MQ_COMMAND_RD_ERROR	(1L<<6)	bnx2.h
7765	BNX2_MQ_STATUS	0x00003c04	bnx2.h
7766	BNX2_MQ_STATUS_CTX_ACCESS_STAT	(1L<<16)	bnx2.h
7767	BNX2_MQ_STATUS_CTX_ACCESS64_STA	(1L<<17)	bnx2.h
7768	BNX2_MQ_STATUS_PCI_STALL_STAT	(1L<<18)	bnx2.h
7769	BNX2_MQ_CONFIG	0x00003c08	bnx2.h
7770	BNX2_MQ_CONFIG_TX_HIGH_PRI	(1L<<0)	bnx2.h
7771	BNX2_MQ_CONFIG_HALT_DIS	(1L<<1)	bnx2.h
7772	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(0x7L<<4)	bnx2.h
7773	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(0L<<4)	bnx2.h
7774	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(1L<<4)	bnx2.h
7775	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(2L<<4)	bnx2.h
7776	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(3L<<4)	bnx2.h
7777	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(4L<<4)	bnx2.h
7778	BNX2_MQ_CONFIG_MAX_DEPTH	(0x7fL<<8)	bnx2.h
7779	BNX2_MQ_CONFIG_CUR_DEPTH	(0x7fL<<20)	bnx2.h
7780	BNX2_MQ_ENQUEUE1	0x00003c0c	bnx2.h
7781	BNX2_MQ_ENQUEUE1_OFFSET	(0x3fL<<2)	bnx2.h
7782	BNX2_MQ_ENQUEUE1_CID	(0x3fffL<<8)	bnx2.h
7783	BNX2_MQ_ENQUEUE1_BYTE_MASK	(0xfL<<24)	bnx2.h
7784	BNX2_MQ_ENQUEUE1_KNL_MODE	(1L<<28)	bnx2.h
7785	BNX2_MQ_ENQUEUE2	0x00003c10	bnx2.h
7786	BNX2_MQ_BAD_WR_ADDR	0x00003c14	bnx2.h
7787	BNX2_MQ_BAD_RD_ADDR	0x00003c18	bnx2.h
7788	BNX2_MQ_KNL_BYP_WIND_START	0x00003c1c	bnx2.h
7789	BNX2_MQ_KNL_BYP_WIND_START_VALU	(0xfffffL<<12)	bnx2.h
7790	BNX2_MQ_KNL_WIND_END	0x00003c20	bnx2.h
7791	BNX2_MQ_KNL_WIND_END_VALUE	(0xffffffL<<8)	bnx2.h
7792	BNX2_MQ_KNL_WRITE_MASK1	0x00003c24	bnx2.h
7793	BNX2_MQ_KNL_TX_MASK1	0x00003c28	bnx2.h
7794	BNX2_MQ_KNL_CMD_MASK1	0x00003c2c	bnx2.h
7795	BNX2_MQ_KNL_COND_ENQUEUE_MASK1	0x00003c30	bnx2.h
7796	BNX2_MQ_KNL_RX_V2P_MASK1	0x00003c34	bnx2.h
7797	BNX2_MQ_KNL_WRITE_MASK2	0x00003c38	bnx2.h
7798	BNX2_MQ_KNL_TX_MASK2	0x00003c3c	bnx2.h
7799	BNX2_MQ_KNL_CMD_MASK2	0x00003c40	bnx2.h
7800	BNX2_MQ_KNL_COND_ENQUEUE_MASK2	0x00003c44	bnx2.h
7801	BNX2_MQ_KNL_RX_V2P_MASK2	0x00003c48	bnx2.h
7802	BNX2_MQ_KNL_BYP_WRITE_MASK1	0x00003c4c	bnx2.h
7803	BNX2_MQ_KNL_BYP_TX_MASK1	0x00003c50	bnx2.h
7804	BNX2_MQ_KNL_BYP_CMD_MASK1	0x00003c54	bnx2.h
7805	BNX2_MQ_KNL_BYP_COND_ENQUEUE_MA	0x00003c58	bnx2.h
7806	BNX2_MQ_KNL_BYP_RX_V2P_MASK1	0x00003c5c	bnx2.h
7807	BNX2_MQ_KNL_BYP_WRITE_MASK2	0x00003c60	bnx2.h
7808	BNX2_MQ_KNL_BYP_TX_MASK2	0x00003c64	bnx2.h
7809	BNX2_MQ_KNL_BYP_CMD_MASK2	0x00003c68	bnx2.h
7810	BNX2_MQ_KNL_BYP_COND_ENQUEUE_MA	0x00003c6c	bnx2.h
7811	BNX2_MQ_KNL_BYP_RX_V2P_MASK2	0x00003c70	bnx2.h
7812	BNX2_MQ_MEM_WR_ADDR	0x00003c74	bnx2.h
7813	BNX2_MQ_MEM_WR_ADDR_VALUE	(0x3fL<<0)	bnx2.h
7814	BNX2_MQ_MEM_WR_DATA0	0x00003c78	bnx2.h
7815	BNX2_MQ_MEM_WR_DATA0_VALUE	(0xffffffffL<<0)	bnx2.h
7816	BNX2_MQ_MEM_WR_DATA1	0x00003c7c	bnx2.h
7817	BNX2_MQ_MEM_WR_DATA1_VALUE	(0xffffffffL<<0)	bnx2.h
7818	BNX2_MQ_MEM_WR_DATA2	0x00003c80	bnx2.h
7819	BNX2_MQ_MEM_WR_DATA2_VALUE	(0x3fffffffL<<0)	bnx2.h
7820	BNX2_MQ_MEM_RD_ADDR	0x00003c84	bnx2.h
7821	BNX2_MQ_MEM_RD_ADDR_VALUE	(0x3fL<<0)	bnx2.h
7822	BNX2_MQ_MEM_RD_DATA0	0x00003c88	bnx2.h
7823	BNX2_MQ_MEM_RD_DATA0_VALUE	(0xffffffffL<<0)	bnx2.h
7824	BNX2_MQ_MEM_RD_DATA1	0x00003c8c	bnx2.h
7825	BNX2_MQ_MEM_RD_DATA1_VALUE	(0xffffffffL<<0)	bnx2.h
7826	BNX2_MQ_MEM_RD_DATA2	0x00003c90	bnx2.h
7827	BNX2_MQ_MEM_RD_DATA2_VALUE	(0x3fffffffL<<0)	bnx2.h
7828	BNX2_TBDR_COMMAND	0x00005000	bnx2.h
7829	BNX2_TBDR_COMMAND_ENABLE	(1L<<0)	bnx2.h
7830	BNX2_TBDR_COMMAND_SOFT_RST	(1L<<1)	bnx2.h
7831	BNX2_TBDR_COMMAND_MSTR_ABORT	(1L<<4)	bnx2.h
7832	BNX2_TBDR_STATUS	0x00005004	bnx2.h
7833	BNX2_TBDR_STATUS_DMA_WAIT	(1L<<0)	bnx2.h
7834	BNX2_TBDR_STATUS_FTQ_WAIT	(1L<<1)	bnx2.h
7835	BNX2_TBDR_STATUS_FIFO_OVERFLOW	(1L<<2)	bnx2.h
7836	BNX2_TBDR_STATUS_FIFO_UNDERFLOW	(1L<<3)	bnx2.h
7837	BNX2_TBDR_STATUS_SEARCHMISS_ERR	(1L<<4)	bnx2.h
7838	BNX2_TBDR_STATUS_FTQ_ENTRY_CNT	(1L<<5)	bnx2.h
7839	BNX2_TBDR_STATUS_BURST_CNT	(1L<<6)	bnx2.h
7840	BNX2_TBDR_CONFIG	0x00005008	bnx2.h
7841	BNX2_TBDR_CONFIG_MAX_BDS	(0xffL<<0)	bnx2.h
7842	BNX2_TBDR_CONFIG_SWAP_MODE	(1L<<8)	bnx2.h
7843	BNX2_TBDR_CONFIG_PRIORITY	(1L<<9)	bnx2.h
7844	BNX2_TBDR_CONFIG_CACHE_NEXT_PAG	(1L<<10)	bnx2.h
7845	BNX2_TBDR_CONFIG_PAGE_SIZE	(0xfL<<24)	bnx2.h
7846	BNX2_TBDR_CONFIG_PAGE_SIZE_256	(0L<<24)	bnx2.h
7847	BNX2_TBDR_CONFIG_PAGE_SIZE_512	(1L<<24)	bnx2.h
7848	BNX2_TBDR_CONFIG_PAGE_SIZE_1K	(2L<<24)	bnx2.h
7849	BNX2_TBDR_CONFIG_PAGE_SIZE_2K	(3L<<24)	bnx2.h
7850	BNX2_TBDR_CONFIG_PAGE_SIZE_4K	(4L<<24)	bnx2.h
7851	BNX2_TBDR_CONFIG_PAGE_SIZE_8K	(5L<<24)	bnx2.h
7852	BNX2_TBDR_CONFIG_PAGE_SIZE_16K	(6L<<24)	bnx2.h
7853	BNX2_TBDR_CONFIG_PAGE_SIZE_32K	(7L<<24)	bnx2.h
7854	BNX2_TBDR_CONFIG_PAGE_SIZE_64K	(8L<<24)	bnx2.h
7855	BNX2_TBDR_CONFIG_PAGE_SIZE_128K	(9L<<24)	bnx2.h
7856	BNX2_TBDR_CONFIG_PAGE_SIZE_256K	(10L<<24)	bnx2.h
7857	BNX2_TBDR_CONFIG_PAGE_SIZE_512K	(11L<<24)	bnx2.h
7858	BNX2_TBDR_CONFIG_PAGE_SIZE_1M	(12L<<24)	bnx2.h
7859	BNX2_TBDR_DEBUG_VECT_PEEK	0x0000500c	bnx2.h
7860	BNX2_TBDR_DEBUG_VECT_PEEK_1_VAL	(0x7ffL<<0)	bnx2.h
7861	BNX2_TBDR_DEBUG_VECT_PEEK_1_PEE	(1L<<11)	bnx2.h
7862	BNX2_TBDR_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
7863	BNX2_TBDR_DEBUG_VECT_PEEK_2_VAL	(0x7ffL<<16)	bnx2.h
7864	BNX2_TBDR_DEBUG_VECT_PEEK_2_PEE	(1L<<27)	bnx2.h
7865	BNX2_TBDR_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
7866	BNX2_TBDR_FTQ_DATA	0x000053c0	bnx2.h
7867	BNX2_TBDR_FTQ_CMD	0x000053f8	bnx2.h
7868	BNX2_TBDR_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7869	BNX2_TBDR_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7870	BNX2_TBDR_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7871	BNX2_TBDR_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7872	BNX2_TBDR_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7873	BNX2_TBDR_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7874	BNX2_TBDR_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
7875	BNX2_TBDR_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7876	BNX2_TBDR_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
7877	BNX2_TBDR_FTQ_CMD_POP	(1L<<30)	bnx2.h
7878	BNX2_TBDR_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7879	BNX2_TBDR_FTQ_CTL	0x000053fc	bnx2.h
7880	BNX2_TBDR_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7881	BNX2_TBDR_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7882	BNX2_TBDR_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
7883	BNX2_TBDR_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7884	BNX2_TBDR_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7885	BNX2_TDMA_COMMAND	0x00005c00	bnx2.h
7886	BNX2_TDMA_COMMAND_ENABLED	(1L<<0)	bnx2.h
7887	BNX2_TDMA_COMMAND_MASTER_ABORT	(1L<<4)	bnx2.h
7888	BNX2_TDMA_COMMAND_BAD_L2_LENGTH	(1L<<7)	bnx2.h
7889	BNX2_TDMA_STATUS	0x00005c04	bnx2.h
7890	BNX2_TDMA_STATUS_DMA_WAIT	(1L<<0)	bnx2.h
7891	BNX2_TDMA_STATUS_PAYLOAD_WAIT	(1L<<1)	bnx2.h
7892	BNX2_TDMA_STATUS_PATCH_FTQ_WAIT	(1L<<2)	bnx2.h
7893	BNX2_TDMA_STATUS_LOCK_WAIT	(1L<<3)	bnx2.h
7894	BNX2_TDMA_STATUS_FTQ_ENTRY_CNT	(1L<<16)	bnx2.h
7895	BNX2_TDMA_STATUS_BURST_CNT	(1L<<17)	bnx2.h
7896	BNX2_TDMA_CONFIG	0x00005c08	bnx2.h
7897	BNX2_TDMA_CONFIG_ONE_DMA	(1L<<0)	bnx2.h
7898	BNX2_TDMA_CONFIG_ONE_RECORD	(1L<<1)	bnx2.h
7899	BNX2_TDMA_CONFIG_LIMIT_SZ	(0xfL<<4)	bnx2.h
7900	BNX2_TDMA_CONFIG_LIMIT_SZ_64	(0L<<4)	bnx2.h
7901	BNX2_TDMA_CONFIG_LIMIT_SZ_128	(0x4L<<4)	bnx2.h
7902	BNX2_TDMA_CONFIG_LIMIT_SZ_256	(0x6L<<4)	bnx2.h
7903	BNX2_TDMA_CONFIG_LIMIT_SZ_512	(0x8L<<4)	bnx2.h
7904	BNX2_TDMA_CONFIG_LINE_SZ	(0xfL<<8)	bnx2.h
7905	BNX2_TDMA_CONFIG_LINE_SZ_64	(0L<<8)	bnx2.h
7906	BNX2_TDMA_CONFIG_LINE_SZ_128	(4L<<8)	bnx2.h
7907	BNX2_TDMA_CONFIG_LINE_SZ_256	(6L<<8)	bnx2.h
7908	BNX2_TDMA_CONFIG_LINE_SZ_512	(8L<<8)	bnx2.h
7909	BNX2_TDMA_CONFIG_ALIGN_ENA	(1L<<15)	bnx2.h
7910	BNX2_TDMA_CONFIG_CHK_L2_BD	(1L<<16)	bnx2.h
7911	BNX2_TDMA_CONFIG_FIFO_CMP	(0xfL<<20)	bnx2.h
7912	BNX2_TDMA_PAYLOAD_PROD	0x00005c0c	bnx2.h
7913	BNX2_TDMA_PAYLOAD_PROD_VALUE	(0x1fffL<<3)	bnx2.h
7914	BNX2_TDMA_DBG_WATCHDOG	0x00005c10	bnx2.h
7915	BNX2_TDMA_DBG_TRIGGER	0x00005c14	bnx2.h
7916	BNX2_TDMA_DMAD_FSM	0x00005c80	bnx2.h
7917	BNX2_TDMA_DMAD_FSM_BD_INVLD	(1L<<0)	bnx2.h
7918	BNX2_TDMA_DMAD_FSM_PUSH	(0xfL<<4)	bnx2.h
7919	BNX2_TDMA_DMAD_FSM_ARB_TBDC	(0x3L<<8)	bnx2.h
7920	BNX2_TDMA_DMAD_FSM_ARB_CTX	(1L<<12)	bnx2.h
7921	BNX2_TDMA_DMAD_FSM_DR_INTF	(1L<<16)	bnx2.h
7922	BNX2_TDMA_DMAD_FSM_DMAD	(0x7L<<20)	bnx2.h
7923	BNX2_TDMA_DMAD_FSM_BD	(0xfL<<24)	bnx2.h
7924	BNX2_TDMA_DMAD_STATUS	0x00005c84	bnx2.h
7925	BNX2_TDMA_DMAD_STATUS_RHOLD_PUS	(0x3L<<0)	bnx2.h
7926	BNX2_TDMA_DMAD_STATUS_RHOLD_DMA	(0x3L<<4)	bnx2.h
7927	BNX2_TDMA_DMAD_STATUS_RHOLD_BD_	(0x3L<<8)	bnx2.h
7928	BNX2_TDMA_DMAD_STATUS_IFTQ_ENUM	(0xfL<<12)	bnx2.h
7929	BNX2_TDMA_DR_INTF_FSM	0x00005c88	bnx2.h
7930	BNX2_TDMA_DR_INTF_FSM_L2_COMP	(0x3L<<0)	bnx2.h
7931	BNX2_TDMA_DR_INTF_FSM_TPATQ	(0x7L<<4)	bnx2.h
7932	BNX2_TDMA_DR_INTF_FSM_TPBUF	(0x3L<<8)	bnx2.h
7933	BNX2_TDMA_DR_INTF_FSM_DR_BUF	(0x7L<<12)	bnx2.h
7934	BNX2_TDMA_DR_INTF_FSM_DMAD	(0x7L<<16)	bnx2.h
7935	BNX2_TDMA_DR_INTF_STATUS	0x00005c8c	bnx2.h
7936	BNX2_TDMA_DR_INTF_STATUS_HOLE_P	(0x7L<<0)	bnx2.h
7937	BNX2_TDMA_DR_INTF_STATUS_DATA_A	(0x3L<<4)	bnx2.h
7938	BNX2_TDMA_DR_INTF_STATUS_SHIFT_	(0x7L<<8)	bnx2.h
7939	BNX2_TDMA_DR_INTF_STATUS_NXT_PN	(0xfL<<12)	bnx2.h
7940	BNX2_TDMA_DR_INTF_STATUS_BYTE_C	(0x7L<<16)	bnx2.h
7941	BNX2_TDMA_FTQ_DATA	0x00005fc0	bnx2.h
7942	BNX2_TDMA_FTQ_CMD	0x00005ff8	bnx2.h
7943	BNX2_TDMA_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7944	BNX2_TDMA_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7945	BNX2_TDMA_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7946	BNX2_TDMA_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7947	BNX2_TDMA_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7948	BNX2_TDMA_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7949	BNX2_TDMA_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
7950	BNX2_TDMA_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7951	BNX2_TDMA_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
7952	BNX2_TDMA_FTQ_CMD_POP	(1L<<30)	bnx2.h
7953	BNX2_TDMA_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7954	BNX2_TDMA_FTQ_CTL	0x00005ffc	bnx2.h
7955	BNX2_TDMA_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7956	BNX2_TDMA_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7957	BNX2_TDMA_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
7958	BNX2_TDMA_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7959	BNX2_TDMA_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7960	BNX2_HC_COMMAND	0x00006800	bnx2.h
7961	BNX2_HC_COMMAND_ENABLE	(1L<<0)	bnx2.h
7962	BNX2_HC_COMMAND_SKIP_ABORT	(1L<<4)	bnx2.h
7963	BNX2_HC_COMMAND_COAL_NOW	(1L<<16)	bnx2.h
7964	BNX2_HC_COMMAND_COAL_NOW_WO_INT	(1L<<17)	bnx2.h
7965	BNX2_HC_COMMAND_STATS_NOW	(1L<<18)	bnx2.h
7966	BNX2_HC_COMMAND_FORCE_INT	(0x3L<<19)	bnx2.h
7967	BNX2_HC_COMMAND_FORCE_INT_NULL	(0L<<19)	bnx2.h
7968	BNX2_HC_COMMAND_FORCE_INT_HIGH	(1L<<19)	bnx2.h
7969	BNX2_HC_COMMAND_FORCE_INT_LOW	(2L<<19)	bnx2.h
7970	BNX2_HC_COMMAND_FORCE_INT_FREE	(3L<<19)	bnx2.h
7971	BNX2_HC_COMMAND_CLR_STAT_NOW	(1L<<21)	bnx2.h
7972	BNX2_HC_STATUS	0x00006804	bnx2.h
7973	BNX2_HC_STATUS_MASTER_ABORT	(1L<<0)	bnx2.h
7974	BNX2_HC_STATUS_PARITY_ERROR_STA	(1L<<1)	bnx2.h
7975	BNX2_HC_STATUS_PCI_CLK_CNT_STAT	(1L<<16)	bnx2.h
7976	BNX2_HC_STATUS_CORE_CLK_CNT_STA	(1L<<17)	bnx2.h
7977	BNX2_HC_STATUS_NUM_STATUS_BLOCK	(1L<<18)	bnx2.h
7978	BNX2_HC_STATUS_NUM_INT_GEN_STAT	(1L<<19)	bnx2.h
7979	BNX2_HC_STATUS_NUM_INT_MBOX_WR_	(1L<<20)	bnx2.h
7980	BNX2_HC_STATUS_CORE_CLKS_TO_HW_	(1L<<23)	bnx2.h
7981	BNX2_HC_STATUS_CORE_CLKS_TO_SW_	(1L<<24)	bnx2.h
7982	BNX2_HC_STATUS_CORE_CLKS_DURING	(1L<<25)	bnx2.h
7983	BNX2_HC_CONFIG	0x00006808	bnx2.h
7984	BNX2_HC_CONFIG_COLLECT_STATS	(1L<<0)	bnx2.h
7985	BNX2_HC_CONFIG_RX_TMR_MODE	(1L<<1)	bnx2.h
7986	BNX2_HC_CONFIG_TX_TMR_MODE	(1L<<2)	bnx2.h
7987	BNX2_HC_CONFIG_COM_TMR_MODE	(1L<<3)	bnx2.h
7988	BNX2_HC_CONFIG_CMD_TMR_MODE	(1L<<4)	bnx2.h
7989	BNX2_HC_CONFIG_STATISTIC_PRIORI	(1L<<5)	bnx2.h
7990	BNX2_HC_CONFIG_STATUS_PRIORITY	(1L<<6)	bnx2.h
7991	BNX2_HC_CONFIG_STAT_MEM_ADDR	(0xffL<<8)	bnx2.h
7992	BNX2_HC_ATTN_BITS_ENABLE	0x0000680c	bnx2.h
7993	BNX2_HC_STATUS_ADDR_L	0x00006810	bnx2.h
7994	BNX2_HC_STATUS_ADDR_H	0x00006814	bnx2.h
7995	BNX2_HC_STATISTICS_ADDR_L	0x00006818	bnx2.h
7996	BNX2_HC_STATISTICS_ADDR_H	0x0000681c	bnx2.h
7997	BNX2_HC_TX_QUICK_CONS_TRIP	0x00006820	bnx2.h
7998	BNX2_HC_TX_QUICK_CONS_TRIP_VALU	(0xffL<<0)	bnx2.h
7999	BNX2_HC_TX_QUICK_CONS_TRIP_INT	(0xffL<<16)	bnx2.h
8000	BNX2_HC_COMP_PROD_TRIP	0x00006824	bnx2.h
8001	BNX2_HC_COMP_PROD_TRIP_VALUE	(0xffL<<0)	bnx2.h
8002	BNX2_HC_COMP_PROD_TRIP_INT	(0xffL<<16)	bnx2.h
8003	BNX2_HC_RX_QUICK_CONS_TRIP	0x00006828	bnx2.h
8004	BNX2_HC_RX_QUICK_CONS_TRIP_VALU	(0xffL<<0)	bnx2.h
8005	BNX2_HC_RX_QUICK_CONS_TRIP_INT	(0xffL<<16)	bnx2.h
8006	BNX2_HC_RX_TICKS	0x0000682c	bnx2.h
8007	BNX2_HC_RX_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
8008	BNX2_HC_RX_TICKS_INT	(0x3ffL<<16)	bnx2.h
8009	BNX2_HC_TX_TICKS	0x00006830	bnx2.h
8010	BNX2_HC_TX_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
8011	BNX2_HC_TX_TICKS_INT	(0x3ffL<<16)	bnx2.h
8012	BNX2_HC_COM_TICKS	0x00006834	bnx2.h
8013	BNX2_HC_COM_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
8014	BNX2_HC_COM_TICKS_INT	(0x3ffL<<16)	bnx2.h
8015	BNX2_HC_CMD_TICKS	0x00006838	bnx2.h
8016	BNX2_HC_CMD_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
8017	BNX2_HC_CMD_TICKS_INT	(0x3ffL<<16)	bnx2.h
8018	BNX2_HC_PERIODIC_TICKS	0x0000683c	bnx2.h
8019	BNX2_HC_PERIODIC_TICKS_HC_PERIO	(0xffffL<<0)	bnx2.h
8020	BNX2_HC_STAT_COLLECT_TICKS	0x00006840	bnx2.h
8021	BNX2_HC_STAT_COLLECT_TICKS_HC_S	(0xffL<<4)	bnx2.h
8022	BNX2_HC_STATS_TICKS	0x00006844	bnx2.h
8023	BNX2_HC_STATS_TICKS_HC_STAT_TIC	(0xffffL<<8)	bnx2.h
8024	BNX2_HC_STAT_MEM_DATA	0x0000684c	bnx2.h
8025	BNX2_HC_STAT_GEN_SEL_0	0x00006850	bnx2.h
8026	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<0)	bnx2.h
8027	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0L<<0)	bnx2.h
8028	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(1L<<0)	bnx2.h
8029	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(2L<<0)	bnx2.h
8030	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(3L<<0)	bnx2.h
8031	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(4L<<0)	bnx2.h
8032	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(5L<<0)	bnx2.h
8033	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(6L<<0)	bnx2.h
8034	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(7L<<0)	bnx2.h
8035	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(8L<<0)	bnx2.h
8036	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(9L<<0)	bnx2.h
8037	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(10L<<0)	bnx2.h
8038	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(11L<<0)	bnx2.h
8039	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(12L<<0)	bnx2.h
8040	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(13L<<0)	bnx2.h
8041	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(14L<<0)	bnx2.h
8042	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(15L<<0)	bnx2.h
8043	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(16L<<0)	bnx2.h
8044	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(17L<<0)	bnx2.h
8045	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(18L<<0)	bnx2.h
8046	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(19L<<0)	bnx2.h
8047	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(20L<<0)	bnx2.h
8048	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(21L<<0)	bnx2.h
8049	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(22L<<0)	bnx2.h
8050	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(23L<<0)	bnx2.h
8051	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(24L<<0)	bnx2.h
8052	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(25L<<0)	bnx2.h
8053	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(26L<<0)	bnx2.h
8054	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(27L<<0)	bnx2.h
8055	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(28L<<0)	bnx2.h
8056	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(29L<<0)	bnx2.h
8057	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(30L<<0)	bnx2.h
8058	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(31L<<0)	bnx2.h
8059	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(32L<<0)	bnx2.h
8060	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(33L<<0)	bnx2.h
8061	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(34L<<0)	bnx2.h
8062	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(35L<<0)	bnx2.h
8063	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(36L<<0)	bnx2.h
8064	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(37L<<0)	bnx2.h
8065	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(38L<<0)	bnx2.h
8066	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(39L<<0)	bnx2.h
8067	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(40L<<0)	bnx2.h
8068	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(41L<<0)	bnx2.h
8069	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(42L<<0)	bnx2.h
8070	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(43L<<0)	bnx2.h
8071	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(44L<<0)	bnx2.h
8072	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(45L<<0)	bnx2.h
8073	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(46L<<0)	bnx2.h
8074	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(47L<<0)	bnx2.h
8075	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(48L<<0)	bnx2.h
8076	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(49L<<0)	bnx2.h
8077	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(50L<<0)	bnx2.h
8078	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(51L<<0)	bnx2.h
8079	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(52L<<0)	bnx2.h
8080	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(53L<<0)	bnx2.h
8081	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(54L<<0)	bnx2.h
8082	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(55L<<0)	bnx2.h
8083	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(56L<<0)	bnx2.h
8084	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(59L<<0)	bnx2.h
8085	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(60L<<0)	bnx2.h
8086	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(61L<<0)	bnx2.h
8087	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(62L<<0)	bnx2.h
8088	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(63L<<0)	bnx2.h
8089	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(64L<<0)	bnx2.h
8090	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(65L<<0)	bnx2.h
8091	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(66L<<0)	bnx2.h
8092	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(67L<<0)	bnx2.h
8093	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(68L<<0)	bnx2.h
8094	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(69L<<0)	bnx2.h
8095	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(70L<<0)	bnx2.h
8096	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(71L<<0)	bnx2.h
8097	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(72L<<0)	bnx2.h
8098	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(73L<<0)	bnx2.h
8099	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(74L<<0)	bnx2.h
8100	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(75L<<0)	bnx2.h
8101	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(76L<<0)	bnx2.h
8102	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(77L<<0)	bnx2.h
8103	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(78L<<0)	bnx2.h
8104	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(79L<<0)	bnx2.h
8105	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(80L<<0)	bnx2.h
8106	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(81L<<0)	bnx2.h
8107	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(82L<<0)	bnx2.h
8108	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(83L<<0)	bnx2.h
8109	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(84L<<0)	bnx2.h
8110	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(85L<<0)	bnx2.h
8111	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(86L<<0)	bnx2.h
8112	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(87L<<0)	bnx2.h
8113	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(88L<<0)	bnx2.h
8114	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(89L<<0)	bnx2.h
8115	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(90L<<0)	bnx2.h
8116	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(91L<<0)	bnx2.h
8117	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(92L<<0)	bnx2.h
8118	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(93L<<0)	bnx2.h
8119	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(94L<<0)	bnx2.h
8120	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(95L<<0)	bnx2.h
8121	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(96L<<0)	bnx2.h
8122	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(97L<<0)	bnx2.h
8123	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(98L<<0)	bnx2.h
8124	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(99L<<0)	bnx2.h
8125	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(100L<<0)	bnx2.h
8126	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(101L<<0)	bnx2.h
8127	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(102L<<0)	bnx2.h
8128	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(103L<<0)	bnx2.h
8129	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(104L<<0)	bnx2.h
8130	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(105L<<0)	bnx2.h
8131	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(106L<<0)	bnx2.h
8132	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(107L<<0)	bnx2.h
8133	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(108L<<0)	bnx2.h
8134	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(109L<<0)	bnx2.h
8135	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(110L<<0)	bnx2.h
8136	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(111L<<0)	bnx2.h
8137	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(112L<<0)	bnx2.h
8138	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(113L<<0)	bnx2.h
8139	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(114L<<0)	bnx2.h
8140	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(115L<<0)	bnx2.h
8141	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(116L<<0)	bnx2.h
8142	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(117L<<0)	bnx2.h
8143	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(118L<<0)	bnx2.h
8144	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(119L<<0)	bnx2.h
8145	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(120L<<0)	bnx2.h
8146	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(121L<<0)	bnx2.h
8147	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(122L<<0)	bnx2.h
8148	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(127L<<0)	bnx2.h
8149	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<8)	bnx2.h
8150	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<16)	bnx2.h
8151	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<24)	bnx2.h
8152	BNX2_HC_STAT_GEN_SEL_1	0x00006854	bnx2.h
8153	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<0)	bnx2.h
8154	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<8)	bnx2.h
8155	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<16)	bnx2.h
8156	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<24)	bnx2.h
8157	BNX2_HC_STAT_GEN_SEL_2	0x00006858	bnx2.h
8158	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<0)	bnx2.h
8159	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<8)	bnx2.h
8160	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<16)	bnx2.h
8161	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<24)	bnx2.h
8162	BNX2_HC_STAT_GEN_SEL_3	0x0000685c	bnx2.h
8163	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<0)	bnx2.h
8164	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<8)	bnx2.h
8165	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<16)	bnx2.h
8166	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<24)	bnx2.h
8167	BNX2_HC_STAT_GEN_STAT0	0x00006888	bnx2.h
8168	BNX2_HC_STAT_GEN_STAT1	0x0000688c	bnx2.h
8169	BNX2_HC_STAT_GEN_STAT2	0x00006890	bnx2.h
8170	BNX2_HC_STAT_GEN_STAT3	0x00006894	bnx2.h
8171	BNX2_HC_STAT_GEN_STAT4	0x00006898	bnx2.h
8172	BNX2_HC_STAT_GEN_STAT5	0x0000689c	bnx2.h
8173	BNX2_HC_STAT_GEN_STAT6	0x000068a0	bnx2.h
8174	BNX2_HC_STAT_GEN_STAT7	0x000068a4	bnx2.h
8175	BNX2_HC_STAT_GEN_STAT8	0x000068a8	bnx2.h
8176	BNX2_HC_STAT_GEN_STAT9	0x000068ac	bnx2.h
8177	BNX2_HC_STAT_GEN_STAT10	0x000068b0	bnx2.h
8178	BNX2_HC_STAT_GEN_STAT11	0x000068b4	bnx2.h
8179	BNX2_HC_STAT_GEN_STAT12	0x000068b8	bnx2.h
8180	BNX2_HC_STAT_GEN_STAT13	0x000068bc	bnx2.h
8181	BNX2_HC_STAT_GEN_STAT14	0x000068c0	bnx2.h
8182	BNX2_HC_STAT_GEN_STAT15	0x000068c4	bnx2.h
8183	BNX2_HC_STAT_GEN_STAT_AC0	0x000068c8	bnx2.h
8184	BNX2_HC_STAT_GEN_STAT_AC1	0x000068cc	bnx2.h
8185	BNX2_HC_STAT_GEN_STAT_AC2	0x000068d0	bnx2.h
8186	BNX2_HC_STAT_GEN_STAT_AC3	0x000068d4	bnx2.h
8187	BNX2_HC_STAT_GEN_STAT_AC4	0x000068d8	bnx2.h
8188	BNX2_HC_STAT_GEN_STAT_AC5	0x000068dc	bnx2.h
8189	BNX2_HC_STAT_GEN_STAT_AC6	0x000068e0	bnx2.h
8190	BNX2_HC_STAT_GEN_STAT_AC7	0x000068e4	bnx2.h
8191	BNX2_HC_STAT_GEN_STAT_AC8	0x000068e8	bnx2.h
8192	BNX2_HC_STAT_GEN_STAT_AC9	0x000068ec	bnx2.h
8193	BNX2_HC_STAT_GEN_STAT_AC10	0x000068f0	bnx2.h
8194	BNX2_HC_STAT_GEN_STAT_AC11	0x000068f4	bnx2.h
8195	BNX2_HC_STAT_GEN_STAT_AC12	0x000068f8	bnx2.h
8196	BNX2_HC_STAT_GEN_STAT_AC13	0x000068fc	bnx2.h
8197	BNX2_HC_STAT_GEN_STAT_AC14	0x00006900	bnx2.h
8198	BNX2_HC_STAT_GEN_STAT_AC15	0x00006904	bnx2.h
8199	BNX2_HC_VIS	0x00006908	bnx2.h
8200	BNX2_HC_VIS_STAT_BUILD_STATE	(0xfL<<0)	bnx2.h
8201	BNX2_HC_VIS_STAT_BUILD_STATE_ID	(0L<<0)	bnx2.h
8202	BNX2_HC_VIS_STAT_BUILD_STATE_ST	(1L<<0)	bnx2.h
8203	BNX2_HC_VIS_STAT_BUILD_STATE_RE	(2L<<0)	bnx2.h
8204	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(3L<<0)	bnx2.h
8205	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(4L<<0)	bnx2.h
8206	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(5L<<0)	bnx2.h
8207	BNX2_HC_VIS_STAT_BUILD_STATE_DM	(6L<<0)	bnx2.h
8208	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(7L<<0)	bnx2.h
8209	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(8L<<0)	bnx2.h
8210	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(9L<<0)	bnx2.h
8211	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(10L<<0)	bnx2.h
8212	BNX2_HC_VIS_DMA_STAT_STATE	(0xfL<<8)	bnx2.h
8213	BNX2_HC_VIS_DMA_STAT_STATE_IDLE	(0L<<8)	bnx2.h
8214	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(1L<<8)	bnx2.h
8215	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(2L<<8)	bnx2.h
8216	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(3L<<8)	bnx2.h
8217	BNX2_HC_VIS_DMA_STAT_STATE_COMP	(4L<<8)	bnx2.h
8218	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(5L<<8)	bnx2.h
8219	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(6L<<8)	bnx2.h
8220	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(7L<<8)	bnx2.h
8221	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(8L<<8)	bnx2.h
8222	BNX2_HC_VIS_DMA_STAT_STATE_WAIT	(9L<<8)	bnx2.h
8223	BNX2_HC_VIS_DMA_STAT_STATE_ABOR	(15L<<8)	bnx2.h
8224	BNX2_HC_VIS_DMA_MSI_STATE	(0x7L<<12)	bnx2.h
8225	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(0x3L<<15)	bnx2.h
8226	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(0L<<15)	bnx2.h
8227	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(1L<<15)	bnx2.h
8228	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(2L<<15)	bnx2.h
8229	BNX2_HC_VIS_1	0x0000690c	bnx2.h
8230	BNX2_HC_VIS_1_HW_INTACK_STATE	(1L<<4)	bnx2.h
8231	BNX2_HC_VIS_1_HW_INTACK_STATE_I	(0L<<4)	bnx2.h
8232	BNX2_HC_VIS_1_HW_INTACK_STATE_C	(1L<<4)	bnx2.h
8233	BNX2_HC_VIS_1_SW_INTACK_STATE	(1L<<5)	bnx2.h
8234	BNX2_HC_VIS_1_SW_INTACK_STATE_I	(0L<<5)	bnx2.h
8235	BNX2_HC_VIS_1_SW_INTACK_STATE_C	(1L<<5)	bnx2.h
8236	BNX2_HC_VIS_1_DURING_SW_INTACK_	(1L<<6)	bnx2.h
8237	BNX2_HC_VIS_1_DURING_SW_INTACK_	(0L<<6)	bnx2.h
8238	BNX2_HC_VIS_1_DURING_SW_INTACK_	(1L<<6)	bnx2.h
8239	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(1L<<7)	bnx2.h
8240	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(0L<<7)	bnx2.h
8241	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(1L<<7)	bnx2.h
8242	BNX2_HC_VIS_1_RAM_RD_ARB_STATE	(0xfL<<17)	bnx2.h
8243	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(0L<<17)	bnx2.h
8244	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(1L<<17)	bnx2.h
8245	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(2L<<17)	bnx2.h
8246	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(3L<<17)	bnx2.h
8247	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(4L<<17)	bnx2.h
8248	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(5L<<17)	bnx2.h
8249	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(6L<<17)	bnx2.h
8250	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(7L<<17)	bnx2.h
8251	BNX2_HC_VIS_1_RAM_WR_ARB_STATE	(0x3L<<21)	bnx2.h
8252	BNX2_HC_VIS_1_RAM_WR_ARB_STATE_	(0L<<21)	bnx2.h
8253	BNX2_HC_VIS_1_RAM_WR_ARB_STATE_	(1L<<21)	bnx2.h
8254	BNX2_HC_VIS_1_INT_GEN_STATE	(1L<<23)	bnx2.h
8255	BNX2_HC_VIS_1_INT_GEN_STATE_DLE	(0L<<23)	bnx2.h
8256	BNX2_HC_VIS_1_INT_GEN_STATE_NTE	(1L<<23)	bnx2.h
8257	BNX2_HC_VIS_1_STAT_CHAN_ID	(0x7L<<24)	bnx2.h
8258	BNX2_HC_VIS_1_INT_B	(1L<<27)	bnx2.h
8259	BNX2_HC_DEBUG_VECT_PEEK	0x00006910	bnx2.h
8260	BNX2_HC_DEBUG_VECT_PEEK_1_VALUE	(0x7ffL<<0)	bnx2.h
8261	BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_	(1L<<11)	bnx2.h
8262	BNX2_HC_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
8263	BNX2_HC_DEBUG_VECT_PEEK_2_VALUE	(0x7ffL<<16)	bnx2.h
8264	BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_	(1L<<27)	bnx2.h
8265	BNX2_HC_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
8266	BNX2_TXP_CPU_MODE	0x00045000	bnx2.h
8267	BNX2_TXP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
8268	BNX2_TXP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
8269	BNX2_TXP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
8270	BNX2_TXP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
8271	BNX2_TXP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
8272	BNX2_TXP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
8273	BNX2_TXP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
8274	BNX2_TXP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
8275	BNX2_TXP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
8276	BNX2_TXP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
8277	BNX2_TXP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
8278	BNX2_TXP_CPU_STATE	0x00045004	bnx2.h
8279	BNX2_TXP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
8280	BNX2_TXP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
8281	BNX2_TXP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
8282	BNX2_TXP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
8283	BNX2_TXP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
8284	BNX2_TXP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
8285	BNX2_TXP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
8286	BNX2_TXP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
8287	BNX2_TXP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
8288	BNX2_TXP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
8289	BNX2_TXP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
8290	BNX2_TXP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
8291	BNX2_TXP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
8292	BNX2_TXP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
8293	BNX2_TXP_CPU_EVENT_MASK	0x00045008	bnx2.h
8294	BNX2_TXP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
8295	BNX2_TXP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
8296	BNX2_TXP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
8297	BNX2_TXP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
8298	BNX2_TXP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
8299	BNX2_TXP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
8300	BNX2_TXP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
8301	BNX2_TXP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
8302	BNX2_TXP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
8303	BNX2_TXP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
8304	BNX2_TXP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
8305	BNX2_TXP_CPU_PROGRAM_COUNTER	0x0004501c	bnx2.h
8306	BNX2_TXP_CPU_INSTRUCTION	0x00045020	bnx2.h
8307	BNX2_TXP_CPU_DATA_ACCESS	0x00045024	bnx2.h
8308	BNX2_TXP_CPU_INTERRUPT_ENABLE	0x00045028	bnx2.h
8309	BNX2_TXP_CPU_INTERRUPT_VECTOR	0x0004502c	bnx2.h
8310	BNX2_TXP_CPU_INTERRUPT_SAVED_PC	0x00045030	bnx2.h
8311	BNX2_TXP_CPU_HW_BREAKPOINT	0x00045034	bnx2.h
8312	BNX2_TXP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
8313	BNX2_TXP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
8314	BNX2_TXP_CPU_DEBUG_VECT_PEEK	0x00045038	bnx2.h
8315	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
8316	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
8317	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
8318	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
8319	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
8320	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
8321	BNX2_TXP_CPU_LAST_BRANCH_ADDR	0x00045048	bnx2.h
8322	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
8323	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
8324	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
8325	BNX2_TXP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
8326	BNX2_TXP_CPU_REG_FILE	0x00045200	bnx2.h
8327	BNX2_TXP_FTQ_DATA	0x000453c0	bnx2.h
8328	BNX2_TXP_FTQ_CMD	0x000453f8	bnx2.h
8329	BNX2_TXP_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8330	BNX2_TXP_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8331	BNX2_TXP_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8332	BNX2_TXP_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8333	BNX2_TXP_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
8334	BNX2_TXP_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8335	BNX2_TXP_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
8336	BNX2_TXP_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8337	BNX2_TXP_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
8338	BNX2_TXP_FTQ_CMD_POP	(1L<<30)	bnx2.h
8339	BNX2_TXP_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
8340	BNX2_TXP_FTQ_CTL	0x000453fc	bnx2.h
8341	BNX2_TXP_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
8342	BNX2_TXP_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8343	BNX2_TXP_FTQ_CTL_FORCE_INTERVEN	(1L<<2)	bnx2.h
8344	BNX2_TXP_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
8345	BNX2_TXP_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
8346	BNX2_TXP_SCRATCH	0x00060000	bnx2.h
8347	BNX2_TPAT_CPU_MODE	0x00085000	bnx2.h
8348	BNX2_TPAT_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
8349	BNX2_TPAT_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
8350	BNX2_TPAT_CPU_MODE_PAGE_0_DATA_	(1L<<2)	bnx2.h
8351	BNX2_TPAT_CPU_MODE_PAGE_0_INST_	(1L<<3)	bnx2.h
8352	BNX2_TPAT_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
8353	BNX2_TPAT_CPU_MODE_INTERRUPT_EN	(1L<<7)	bnx2.h
8354	BNX2_TPAT_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
8355	BNX2_TPAT_CPU_MODE_BAD_DATA_HAL	(1L<<11)	bnx2.h
8356	BNX2_TPAT_CPU_MODE_BAD_INST_HAL	(1L<<12)	bnx2.h
8357	BNX2_TPAT_CPU_MODE_FIO_ABORT_HA	(1L<<13)	bnx2.h
8358	BNX2_TPAT_CPU_MODE_SPAD_UNDERFL	(1L<<15)	bnx2.h
8359	BNX2_TPAT_CPU_STATE	0x00085004	bnx2.h
8360	BNX2_TPAT_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
8361	BNX2_TPAT_CPU_STATE_BAD_INST_HA	(1L<<2)	bnx2.h
8362	BNX2_TPAT_CPU_STATE_PAGE_0_DATA	(1L<<3)	bnx2.h
8363	BNX2_TPAT_CPU_STATE_PAGE_0_INST	(1L<<4)	bnx2.h
8364	BNX2_TPAT_CPU_STATE_BAD_DATA_AD	(1L<<5)	bnx2.h
8365	BNX2_TPAT_CPU_STATE_BAD_pc_HALT	(1L<<6)	bnx2.h
8366	BNX2_TPAT_CPU_STATE_ALIGN_HALTE	(1L<<7)	bnx2.h
8367	BNX2_TPAT_CPU_STATE_FIO_ABORT_H	(1L<<8)	bnx2.h
8368	BNX2_TPAT_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
8369	BNX2_TPAT_CPU_STATE_SPAD_UNDERF	(1L<<11)	bnx2.h
8370	BNX2_TPAT_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
8371	BNX2_TPAT_CPU_STATE_DATA_ACCESS	(1L<<14)	bnx2.h
8372	BNX2_TPAT_CPU_STATE_INST_FETCH_	(1L<<15)	bnx2.h
8373	BNX2_TPAT_CPU_STATE_BLOCKED_REA	(1L<<31)	bnx2.h
8374	BNX2_TPAT_CPU_EVENT_MASK	0x00085008	bnx2.h
8375	BNX2_TPAT_CPU_EVENT_MASK_BREAKP	(1L<<0)	bnx2.h
8376	BNX2_TPAT_CPU_EVENT_MASK_BAD_IN	(1L<<2)	bnx2.h
8377	BNX2_TPAT_CPU_EVENT_MASK_PAGE_0	(1L<<3)	bnx2.h
8378	BNX2_TPAT_CPU_EVENT_MASK_PAGE_0	(1L<<4)	bnx2.h
8379	BNX2_TPAT_CPU_EVENT_MASK_BAD_DA	(1L<<5)	bnx2.h
8380	BNX2_TPAT_CPU_EVENT_MASK_BAD_PC	(1L<<6)	bnx2.h
8381	BNX2_TPAT_CPU_EVENT_MASK_ALIGN_	(1L<<7)	bnx2.h
8382	BNX2_TPAT_CPU_EVENT_MASK_FIO_AB	(1L<<8)	bnx2.h
8383	BNX2_TPAT_CPU_EVENT_MASK_SOFT_H	(1L<<10)	bnx2.h
8384	BNX2_TPAT_CPU_EVENT_MASK_SPAD_U	(1L<<11)	bnx2.h
8385	BNX2_TPAT_CPU_EVENT_MASK_INTERR	(1L<<12)	bnx2.h
8386	BNX2_TPAT_CPU_PROGRAM_COUNTER	0x0008501c	bnx2.h
8387	BNX2_TPAT_CPU_INSTRUCTION	0x00085020	bnx2.h
8388	BNX2_TPAT_CPU_DATA_ACCESS	0x00085024	bnx2.h
8389	BNX2_TPAT_CPU_INTERRUPT_ENABLE	0x00085028	bnx2.h
8390	BNX2_TPAT_CPU_INTERRUPT_VECTOR	0x0008502c	bnx2.h
8391	BNX2_TPAT_CPU_INTERRUPT_SAVED_P	0x00085030	bnx2.h
8392	BNX2_TPAT_CPU_HW_BREAKPOINT	0x00085034	bnx2.h
8393	BNX2_TPAT_CPU_HW_BREAKPOINT_DIS	(1L<<0)	bnx2.h
8394	BNX2_TPAT_CPU_HW_BREAKPOINT_ADD	(0x3fffffffL<<2)	bnx2.h
8395	BNX2_TPAT_CPU_DEBUG_VECT_PEEK	0x00085038	bnx2.h
8396	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(0x7ffL<<0)	bnx2.h
8397	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(1L<<11)	bnx2.h
8398	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(0xfL<<12)	bnx2.h
8399	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(0x7ffL<<16)	bnx2.h
8400	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(1L<<27)	bnx2.h
8401	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(0xfL<<28)	bnx2.h
8402	BNX2_TPAT_CPU_LAST_BRANCH_ADDR	0x00085048	bnx2.h
8403	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(1L<<1)	bnx2.h
8404	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(0L<<1)	bnx2.h
8405	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(1L<<1)	bnx2.h
8406	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(0x3fffffffL<<2)	bnx2.h
8407	BNX2_TPAT_CPU_REG_FILE	0x00085200	bnx2.h
8408	BNX2_TPAT_FTQ_DATA	0x000853c0	bnx2.h
8409	BNX2_TPAT_FTQ_CMD	0x000853f8	bnx2.h
8410	BNX2_TPAT_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8411	BNX2_TPAT_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8412	BNX2_TPAT_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8413	BNX2_TPAT_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8414	BNX2_TPAT_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
8415	BNX2_TPAT_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8416	BNX2_TPAT_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
8417	BNX2_TPAT_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8418	BNX2_TPAT_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
8419	BNX2_TPAT_FTQ_CMD_POP	(1L<<30)	bnx2.h
8420	BNX2_TPAT_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
8421	BNX2_TPAT_FTQ_CTL	0x000853fc	bnx2.h
8422	BNX2_TPAT_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
8423	BNX2_TPAT_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8424	BNX2_TPAT_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
8425	BNX2_TPAT_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
8426	BNX2_TPAT_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
8427	BNX2_TPAT_SCRATCH	0x000a0000	bnx2.h
8428	BNX2_RXP_CPU_MODE	0x000c5000	bnx2.h
8429	BNX2_RXP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
8430	BNX2_RXP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
8431	BNX2_RXP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
8432	BNX2_RXP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
8433	BNX2_RXP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
8434	BNX2_RXP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
8435	BNX2_RXP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
8436	BNX2_RXP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
8437	BNX2_RXP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
8438	BNX2_RXP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
8439	BNX2_RXP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
8440	BNX2_RXP_CPU_STATE	0x000c5004	bnx2.h
8441	BNX2_RXP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
8442	BNX2_RXP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
8443	BNX2_RXP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
8444	BNX2_RXP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
8445	BNX2_RXP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
8446	BNX2_RXP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
8447	BNX2_RXP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
8448	BNX2_RXP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
8449	BNX2_RXP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
8450	BNX2_RXP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
8451	BNX2_RXP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
8452	BNX2_RXP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
8453	BNX2_RXP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
8454	BNX2_RXP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
8455	BNX2_RXP_CPU_EVENT_MASK	0x000c5008	bnx2.h
8456	BNX2_RXP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
8457	BNX2_RXP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
8458	BNX2_RXP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
8459	BNX2_RXP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
8460	BNX2_RXP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
8461	BNX2_RXP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
8462	BNX2_RXP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
8463	BNX2_RXP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
8464	BNX2_RXP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
8465	BNX2_RXP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
8466	BNX2_RXP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
8467	BNX2_RXP_CPU_PROGRAM_COUNTER	0x000c501c	bnx2.h
8468	BNX2_RXP_CPU_INSTRUCTION	0x000c5020	bnx2.h
8469	BNX2_RXP_CPU_DATA_ACCESS	0x000c5024	bnx2.h
8470	BNX2_RXP_CPU_INTERRUPT_ENABLE	0x000c5028	bnx2.h
8471	BNX2_RXP_CPU_INTERRUPT_VECTOR	0x000c502c	bnx2.h
8472	BNX2_RXP_CPU_INTERRUPT_SAVED_PC	0x000c5030	bnx2.h
8473	BNX2_RXP_CPU_HW_BREAKPOINT	0x000c5034	bnx2.h
8474	BNX2_RXP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
8475	BNX2_RXP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
8476	BNX2_RXP_CPU_DEBUG_VECT_PEEK	0x000c5038	bnx2.h
8477	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
8478	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
8479	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
8480	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
8481	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
8482	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
8483	BNX2_RXP_CPU_LAST_BRANCH_ADDR	0x000c5048	bnx2.h
8484	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
8485	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
8486	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
8487	BNX2_RXP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
8488	BNX2_RXP_CPU_REG_FILE	0x000c5200	bnx2.h
8489	BNX2_RXP_CFTQ_DATA	0x000c5380	bnx2.h
8490	BNX2_RXP_CFTQ_CMD	0x000c53b8	bnx2.h
8491	BNX2_RXP_CFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8492	BNX2_RXP_CFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8493	BNX2_RXP_CFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8494	BNX2_RXP_CFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8495	BNX2_RXP_CFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
8496	BNX2_RXP_CFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8497	BNX2_RXP_CFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
8498	BNX2_RXP_CFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8499	BNX2_RXP_CFTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
8500	BNX2_RXP_CFTQ_CMD_POP	(1L<<30)	bnx2.h
8501	BNX2_RXP_CFTQ_CMD_BUSY	(1L<<31)	bnx2.h
8502	BNX2_RXP_CFTQ_CTL	0x000c53bc	bnx2.h
8503	BNX2_RXP_CFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
8504	BNX2_RXP_CFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8505	BNX2_RXP_CFTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
8506	BNX2_RXP_CFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
8507	BNX2_RXP_CFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
8508	BNX2_RXP_FTQ_DATA	0x000c53c0	bnx2.h
8509	BNX2_RXP_FTQ_CMD	0x000c53f8	bnx2.h
8510	BNX2_RXP_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8511	BNX2_RXP_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8512	BNX2_RXP_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8513	BNX2_RXP_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8514	BNX2_RXP_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
8515	BNX2_RXP_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8516	BNX2_RXP_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
8517	BNX2_RXP_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8518	BNX2_RXP_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
8519	BNX2_RXP_FTQ_CMD_POP	(1L<<30)	bnx2.h
8520	BNX2_RXP_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
8521	BNX2_RXP_FTQ_CTL	0x000c53fc	bnx2.h
8522	BNX2_RXP_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
8523	BNX2_RXP_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8524	BNX2_RXP_FTQ_CTL_FORCE_INTERVEN	(1L<<2)	bnx2.h
8525	BNX2_RXP_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
8526	BNX2_RXP_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
8527	BNX2_RXP_SCRATCH	0x000e0000	bnx2.h
8528	BNX2_COM_CPU_MODE	0x00105000	bnx2.h
8529	BNX2_COM_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
8530	BNX2_COM_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
8531	BNX2_COM_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
8532	BNX2_COM_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
8533	BNX2_COM_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
8534	BNX2_COM_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
8535	BNX2_COM_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
8536	BNX2_COM_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
8537	BNX2_COM_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
8538	BNX2_COM_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
8539	BNX2_COM_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
8540	BNX2_COM_CPU_STATE	0x00105004	bnx2.h
8541	BNX2_COM_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
8542	BNX2_COM_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
8543	BNX2_COM_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
8544	BNX2_COM_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
8545	BNX2_COM_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
8546	BNX2_COM_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
8547	BNX2_COM_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
8548	BNX2_COM_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
8549	BNX2_COM_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
8550	BNX2_COM_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
8551	BNX2_COM_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
8552	BNX2_COM_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
8553	BNX2_COM_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
8554	BNX2_COM_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
8555	BNX2_COM_CPU_EVENT_MASK	0x00105008	bnx2.h
8556	BNX2_COM_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
8557	BNX2_COM_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
8558	BNX2_COM_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
8559	BNX2_COM_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
8560	BNX2_COM_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
8561	BNX2_COM_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
8562	BNX2_COM_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
8563	BNX2_COM_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
8564	BNX2_COM_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
8565	BNX2_COM_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
8566	BNX2_COM_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
8567	BNX2_COM_CPU_PROGRAM_COUNTER	0x0010501c	bnx2.h
8568	BNX2_COM_CPU_INSTRUCTION	0x00105020	bnx2.h
8569	BNX2_COM_CPU_DATA_ACCESS	0x00105024	bnx2.h
8570	BNX2_COM_CPU_INTERRUPT_ENABLE	0x00105028	bnx2.h
8571	BNX2_COM_CPU_INTERRUPT_VECTOR	0x0010502c	bnx2.h
8572	BNX2_COM_CPU_INTERRUPT_SAVED_PC	0x00105030	bnx2.h
8573	BNX2_COM_CPU_HW_BREAKPOINT	0x00105034	bnx2.h
8574	BNX2_COM_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
8575	BNX2_COM_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
8576	BNX2_COM_CPU_DEBUG_VECT_PEEK	0x00105038	bnx2.h
8577	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
8578	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
8579	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
8580	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
8581	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
8582	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
8583	BNX2_COM_CPU_LAST_BRANCH_ADDR	0x00105048	bnx2.h
8584	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
8585	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
8586	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
8587	BNX2_COM_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
8588	BNX2_COM_CPU_REG_FILE	0x00105200	bnx2.h
8589	BNX2_COM_COMXQ_FTQ_DATA	0x00105340	bnx2.h
8590	BNX2_COM_COMXQ_FTQ_CMD	0x00105378	bnx2.h
8591	BNX2_COM_COMXQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8592	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8593	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8594	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8595	BNX2_COM_COMXQ_FTQ_CMD_SFT_RESE	(1L<<25)	bnx2.h
8596	BNX2_COM_COMXQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8597	BNX2_COM_COMXQ_FTQ_CMD_ADD_INTE	(1L<<27)	bnx2.h
8598	BNX2_COM_COMXQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8599	BNX2_COM_COMXQ_FTQ_CMD_INTERVEN	(1L<<29)	bnx2.h
8600	BNX2_COM_COMXQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
8601	BNX2_COM_COMXQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
8602	BNX2_COM_COMXQ_FTQ_CTL	0x0010537c	bnx2.h
8603	BNX2_COM_COMXQ_FTQ_CTL_INTERVEN	(1L<<0)	bnx2.h
8604	BNX2_COM_COMXQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8605	BNX2_COM_COMXQ_FTQ_CTL_FORCE_IN	(1L<<2)	bnx2.h
8606	BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPT	(0x3ffL<<12)	bnx2.h
8607	BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPT	(0x3ffL<<22)	bnx2.h
8608	BNX2_COM_COMTQ_FTQ_DATA	0x00105380	bnx2.h
8609	BNX2_COM_COMTQ_FTQ_CMD	0x001053b8	bnx2.h
8610	BNX2_COM_COMTQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8611	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8612	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8613	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8614	BNX2_COM_COMTQ_FTQ_CMD_SFT_RESE	(1L<<25)	bnx2.h
8615	BNX2_COM_COMTQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8616	BNX2_COM_COMTQ_FTQ_CMD_ADD_INTE	(1L<<27)	bnx2.h
8617	BNX2_COM_COMTQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8618	BNX2_COM_COMTQ_FTQ_CMD_INTERVEN	(1L<<29)	bnx2.h
8619	BNX2_COM_COMTQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
8620	BNX2_COM_COMTQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
8621	BNX2_COM_COMTQ_FTQ_CTL	0x001053bc	bnx2.h
8622	BNX2_COM_COMTQ_FTQ_CTL_INTERVEN	(1L<<0)	bnx2.h
8623	BNX2_COM_COMTQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8624	BNX2_COM_COMTQ_FTQ_CTL_FORCE_IN	(1L<<2)	bnx2.h
8625	BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPT	(0x3ffL<<12)	bnx2.h
8626	BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPT	(0x3ffL<<22)	bnx2.h
8627	BNX2_COM_COMQ_FTQ_DATA	0x001053c0	bnx2.h
8628	BNX2_COM_COMQ_FTQ_CMD	0x001053f8	bnx2.h
8629	BNX2_COM_COMQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8630	BNX2_COM_COMQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8631	BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8632	BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8633	BNX2_COM_COMQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
8634	BNX2_COM_COMQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8635	BNX2_COM_COMQ_FTQ_CMD_ADD_INTER	(1L<<27)	bnx2.h
8636	BNX2_COM_COMQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8637	BNX2_COM_COMQ_FTQ_CMD_INTERVENE	(1L<<29)	bnx2.h
8638	BNX2_COM_COMQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
8639	BNX2_COM_COMQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
8640	BNX2_COM_COMQ_FTQ_CTL	0x001053fc	bnx2.h
8641	BNX2_COM_COMQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
8642	BNX2_COM_COMQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8643	BNX2_COM_COMQ_FTQ_CTL_FORCE_INT	(1L<<2)	bnx2.h
8644	BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
8645	BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
8646	BNX2_COM_SCRATCH	0x00120000	bnx2.h
8647	BNX2_CP_CPU_MODE	0x00185000	bnx2.h
8648	BNX2_CP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
8649	BNX2_CP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
8650	BNX2_CP_CPU_MODE_PAGE_0_DATA_EN	(1L<<2)	bnx2.h
8651	BNX2_CP_CPU_MODE_PAGE_0_INST_EN	(1L<<3)	bnx2.h
8652	BNX2_CP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
8653	BNX2_CP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
8654	BNX2_CP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
8655	BNX2_CP_CPU_MODE_BAD_DATA_HALT_	(1L<<11)	bnx2.h
8656	BNX2_CP_CPU_MODE_BAD_INST_HALT_	(1L<<12)	bnx2.h
8657	BNX2_CP_CPU_MODE_FIO_ABORT_HALT	(1L<<13)	bnx2.h
8658	BNX2_CP_CPU_MODE_SPAD_UNDERFLOW	(1L<<15)	bnx2.h
8659	BNX2_CP_CPU_STATE	0x00185004	bnx2.h
8660	BNX2_CP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
8661	BNX2_CP_CPU_STATE_BAD_INST_HALT	(1L<<2)	bnx2.h
8662	BNX2_CP_CPU_STATE_PAGE_0_DATA_H	(1L<<3)	bnx2.h
8663	BNX2_CP_CPU_STATE_PAGE_0_INST_H	(1L<<4)	bnx2.h
8664	BNX2_CP_CPU_STATE_BAD_DATA_ADDR	(1L<<5)	bnx2.h
8665	BNX2_CP_CPU_STATE_BAD_pc_HALTED	(1L<<6)	bnx2.h
8666	BNX2_CP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
8667	BNX2_CP_CPU_STATE_FIO_ABORT_HAL	(1L<<8)	bnx2.h
8668	BNX2_CP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
8669	BNX2_CP_CPU_STATE_SPAD_UNDERFLO	(1L<<11)	bnx2.h
8670	BNX2_CP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
8671	BNX2_CP_CPU_STATE_DATA_ACCESS_S	(1L<<14)	bnx2.h
8672	BNX2_CP_CPU_STATE_INST_FETCH_ST	(1L<<15)	bnx2.h
8673	BNX2_CP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
8674	BNX2_CP_CPU_EVENT_MASK	0x00185008	bnx2.h
8675	BNX2_CP_CPU_EVENT_MASK_BREAKPOI	(1L<<0)	bnx2.h
8676	BNX2_CP_CPU_EVENT_MASK_BAD_INST	(1L<<2)	bnx2.h
8677	BNX2_CP_CPU_EVENT_MASK_PAGE_0_D	(1L<<3)	bnx2.h
8678	BNX2_CP_CPU_EVENT_MASK_PAGE_0_I	(1L<<4)	bnx2.h
8679	BNX2_CP_CPU_EVENT_MASK_BAD_DATA	(1L<<5)	bnx2.h
8680	BNX2_CP_CPU_EVENT_MASK_BAD_PC_H	(1L<<6)	bnx2.h
8681	BNX2_CP_CPU_EVENT_MASK_ALIGN_HA	(1L<<7)	bnx2.h
8682	BNX2_CP_CPU_EVENT_MASK_FIO_ABOR	(1L<<8)	bnx2.h
8683	BNX2_CP_CPU_EVENT_MASK_SOFT_HAL	(1L<<10)	bnx2.h
8684	BNX2_CP_CPU_EVENT_MASK_SPAD_UND	(1L<<11)	bnx2.h
8685	BNX2_CP_CPU_EVENT_MASK_INTERRUP	(1L<<12)	bnx2.h
8686	BNX2_CP_CPU_PROGRAM_COUNTER	0x0018501c	bnx2.h
8687	BNX2_CP_CPU_INSTRUCTION	0x00185020	bnx2.h
8688	BNX2_CP_CPU_DATA_ACCESS	0x00185024	bnx2.h
8689	BNX2_CP_CPU_INTERRUPT_ENABLE	0x00185028	bnx2.h
8690	BNX2_CP_CPU_INTERRUPT_VECTOR	0x0018502c	bnx2.h
8691	BNX2_CP_CPU_INTERRUPT_SAVED_PC	0x00185030	bnx2.h
8692	BNX2_CP_CPU_HW_BREAKPOINT	0x00185034	bnx2.h
8693	BNX2_CP_CPU_HW_BREAKPOINT_DISAB	(1L<<0)	bnx2.h
8694	BNX2_CP_CPU_HW_BREAKPOINT_ADDRE	(0x3fffffffL<<2)	bnx2.h
8695	BNX2_CP_CPU_DEBUG_VECT_PEEK	0x00185038	bnx2.h
8696	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_V	(0x7ffL<<0)	bnx2.h
8697	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_P	(1L<<11)	bnx2.h
8698	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_S	(0xfL<<12)	bnx2.h
8699	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_V	(0x7ffL<<16)	bnx2.h
8700	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_P	(1L<<27)	bnx2.h
8701	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_S	(0xfL<<28)	bnx2.h
8702	BNX2_CP_CPU_LAST_BRANCH_ADDR	0x00185048	bnx2.h
8703	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(1L<<1)	bnx2.h
8704	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(0L<<1)	bnx2.h
8705	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(1L<<1)	bnx2.h
8706	BNX2_CP_CPU_LAST_BRANCH_ADDR_LB	(0x3fffffffL<<2)	bnx2.h
8707	BNX2_CP_CPU_REG_FILE	0x00185200	bnx2.h
8708	BNX2_CP_CPQ_FTQ_DATA	0x001853c0	bnx2.h
8709	BNX2_CP_CPQ_FTQ_CMD	0x001853f8	bnx2.h
8710	BNX2_CP_CPQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8711	BNX2_CP_CPQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8712	BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8713	BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8714	BNX2_CP_CPQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
8715	BNX2_CP_CPQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8716	BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVE	(1L<<27)	bnx2.h
8717	BNX2_CP_CPQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8718	BNX2_CP_CPQ_FTQ_CMD_INTERVENE_C	(1L<<29)	bnx2.h
8719	BNX2_CP_CPQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
8720	BNX2_CP_CPQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
8721	BNX2_CP_CPQ_FTQ_CTL	0x001853fc	bnx2.h
8722	BNX2_CP_CPQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
8723	BNX2_CP_CPQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8724	BNX2_CP_CPQ_FTQ_CTL_FORCE_INTER	(1L<<2)	bnx2.h
8725	BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
8726	BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
8727	BNX2_CP_SCRATCH	0x001a0000	bnx2.h
8728	BNX2_MCP_CPU_MODE	0x00145000	bnx2.h
8729	BNX2_MCP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
8730	BNX2_MCP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
8731	BNX2_MCP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
8732	BNX2_MCP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
8733	BNX2_MCP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
8734	BNX2_MCP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
8735	BNX2_MCP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
8736	BNX2_MCP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
8737	BNX2_MCP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
8738	BNX2_MCP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
8739	BNX2_MCP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
8740	BNX2_MCP_CPU_STATE	0x00145004	bnx2.h
8741	BNX2_MCP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
8742	BNX2_MCP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
8743	BNX2_MCP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
8744	BNX2_MCP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
8745	BNX2_MCP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
8746	BNX2_MCP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
8747	BNX2_MCP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
8748	BNX2_MCP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
8749	BNX2_MCP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
8750	BNX2_MCP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
8751	BNX2_MCP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
8752	BNX2_MCP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
8753	BNX2_MCP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
8754	BNX2_MCP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
8755	BNX2_MCP_CPU_EVENT_MASK	0x00145008	bnx2.h
8756	BNX2_MCP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
8757	BNX2_MCP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
8758	BNX2_MCP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
8759	BNX2_MCP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
8760	BNX2_MCP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
8761	BNX2_MCP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
8762	BNX2_MCP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
8763	BNX2_MCP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
8764	BNX2_MCP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
8765	BNX2_MCP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
8766	BNX2_MCP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
8767	BNX2_MCP_CPU_PROGRAM_COUNTER	0x0014501c	bnx2.h
8768	BNX2_MCP_CPU_INSTRUCTION	0x00145020	bnx2.h
8769	BNX2_MCP_CPU_DATA_ACCESS	0x00145024	bnx2.h
8770	BNX2_MCP_CPU_INTERRUPT_ENABLE	0x00145028	bnx2.h
8771	BNX2_MCP_CPU_INTERRUPT_VECTOR	0x0014502c	bnx2.h
8772	BNX2_MCP_CPU_INTERRUPT_SAVED_PC	0x00145030	bnx2.h
8773	BNX2_MCP_CPU_HW_BREAKPOINT	0x00145034	bnx2.h
8774	BNX2_MCP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
8775	BNX2_MCP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
8776	BNX2_MCP_CPU_DEBUG_VECT_PEEK	0x00145038	bnx2.h
8777	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
8778	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
8779	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
8780	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
8781	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
8782	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
8783	BNX2_MCP_CPU_LAST_BRANCH_ADDR	0x00145048	bnx2.h
8784	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
8785	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
8786	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
8787	BNX2_MCP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
8788	BNX2_MCP_CPU_REG_FILE	0x00145200	bnx2.h
8789	BNX2_MCP_MCPQ_FTQ_DATA	0x001453c0	bnx2.h
8790	BNX2_MCP_MCPQ_FTQ_CMD	0x001453f8	bnx2.h
8791	BNX2_MCP_MCPQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
8792	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
8793	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
8794	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
8795	BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
8796	BNX2_MCP_MCPQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
8797	BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTER	(1L<<27)	bnx2.h
8798	BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
8799	BNX2_MCP_MCPQ_FTQ_CMD_INTERVENE	(1L<<29)	bnx2.h
8800	BNX2_MCP_MCPQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
8801	BNX2_MCP_MCPQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
8802	BNX2_MCP_MCPQ_FTQ_CTL	0x001453fc	bnx2.h
8803	BNX2_MCP_MCPQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
8804	BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
8805	BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INT	(1L<<2)	bnx2.h
8806	BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
8807	BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
8808	BNX2_MCP_ROM	0x00150000	bnx2.h
8809	BNX2_MCP_SCRATCH	0x00160000	bnx2.h
8810	BNX2_SHM_HDR_SIGNATURE	BNX2_MCP_SCRATCH	bnx2.h
8811	BNX2_SHM_HDR_SIGNATURE_SIG_MASK	0xffff0000	bnx2.h
8812	BNX2_SHM_HDR_SIGNATURE_SIG	0x53530000	bnx2.h
8813	BNX2_SHM_HDR_SIGNATURE_VER_MASK	0x000000ff	bnx2.h
8814	BNX2_SHM_HDR_SIGNATURE_VER_ONE	0x00000001	bnx2.h
8815	BNX2_SHM_HDR_ADDR_0	BNX2_MCP_SCRATCH + 4	bnx2.h
8816	BNX2_SHM_HDR_ADDR_1	BNX2_MCP_SCRATCH + 8	bnx2.h
8817	NUM_MC_HASH_REGISTERS	8	bnx2.h
8818	PHY_BCM5706_PHY_ID	0x00206160	bnx2.h
8819	BCM5708S_UP1	0xb	bnx2.h
8820	BCM5708S_UP1_2G5	0x1	bnx2.h
8821	BCM5708S_BLK_ADDR	0x1f	bnx2.h
8822	BCM5708S_BLK_ADDR_DIG	0x0000	bnx2.h
8823	BCM5708S_BLK_ADDR_DIG3	0x0002	bnx2.h
8824	BCM5708S_BLK_ADDR_TX_MISC	0x0005	bnx2.h
8825	BCM5708S_1000X_CTL1	0x10	bnx2.h
8826	BCM5708S_1000X_CTL1_FIBER_MODE	0x0001	bnx2.h
8827	BCM5708S_1000X_CTL1_AUTODET_EN	0x0010	bnx2.h
8828	BCM5708S_1000X_CTL2	0x11	bnx2.h
8829	BCM5708S_1000X_CTL2_PLLEL_DET_E	0x0001	bnx2.h
8830	BCM5708S_1000X_STAT1	0x14	bnx2.h
8831	BCM5708S_1000X_STAT1_SGMII	0x0001	bnx2.h
8832	BCM5708S_1000X_STAT1_LINK	0x0002	bnx2.h
8833	BCM5708S_1000X_STAT1_FD	0x0004	bnx2.h
8834	BCM5708S_1000X_STAT1_SPEED_MASK	0x0018	bnx2.h
8835	BCM5708S_1000X_STAT1_SPEED_10	0x0000	bnx2.h
8836	BCM5708S_1000X_STAT1_SPEED_100	0x0008	bnx2.h
8837	BCM5708S_1000X_STAT1_SPEED_1G	0x0010	bnx2.h
8838	BCM5708S_1000X_STAT1_SPEED_2G5	0x0018	bnx2.h
8839	BCM5708S_1000X_STAT1_TX_PAUSE	0x0020	bnx2.h
8840	BCM5708S_1000X_STAT1_RX_PAUSE	0x0040	bnx2.h
8841	BCM5708S_DIG_3_0	0x10	bnx2.h
8842	BCM5708S_DIG_3_0_USE_IEEE	0x0001	bnx2.h
8843	BCM5708S_TX_ACTL1	0x15	bnx2.h
8844	BCM5708S_TX_ACTL1_DRIVER_VCM	0x30	bnx2.h
8845	BCM5708S_TX_ACTL3	0x17	bnx2.h
8846	MIN_ETHERNET_PACKET_SIZE	60	bnx2.h
8847	MAX_ETHERNET_PACKET_SIZE	1514	bnx2.h
8848	MAX_ETHERNET_JUMBO_PACKET_SIZE	9014	bnx2.h
8849	RX_COPY_THRESH	92	bnx2.h
8850	DMA_READ_CHANS	5	bnx2.h
8851	DMA_WRITE_CHANS	3	bnx2.h
8852	BCM_PAGE_BITS	12	bnx2.h
8853	BCM_PAGE_SIZE	(1 << BCM_PAGE_BITS)	bnx2.h
8854	TX_DESC_CNT	(BCM_PAGE_SIZE / sizeof(struct tx_bd))	bnx2.h
8855	MAX_TX_DESC_CNT	(TX_DESC_CNT - 1)	bnx2.h
8856	MAX_RX_RINGS	4	bnx2.h
8857	RX_DESC_CNT	(BCM_PAGE_SIZE / sizeof(struct rx_bd))	bnx2.h
8858	MAX_RX_DESC_CNT	(RX_DESC_CNT - 1)	bnx2.h
8859	MAX_TOTAL_RX_DESC_CNT	(MAX_RX_DESC_CNT * MAX_RX_RINGS)	bnx2.h
8860	CTX_SHIFT	7	bnx2.h
8861	CTX_SIZE	(1 << CTX_SHIFT)	bnx2.h
8862	CTX_MASK	(CTX_SIZE - 1)	bnx2.h
8863	PHY_CTX_SHIFT	6	bnx2.h
8864	PHY_CTX_SIZE	(1 << PHY_CTX_SHIFT)	bnx2.h
8865	PHY_CTX_MASK	(PHY_CTX_SIZE - 1)	bnx2.h
8866	MB_KERNEL_CTX_SHIFT	8	bnx2.h
8867	MB_KERNEL_CTX_SIZE	(1 << MB_KERNEL_CTX_SHIFT)	bnx2.h
8868	MB_KERNEL_CTX_MASK	(MB_KERNEL_CTX_SIZE - 1)	bnx2.h
8869	MAX_CID_CNT	0x4000	bnx2.h
8870	MAX_CID_ADDR	(GET_CID_ADDR(MAX_CID_CNT))	bnx2.h
8871	INVALID_CID_ADDR	0xffffffff	bnx2.h
8872	TX_CID	16	bnx2.h
8873	RX_CID	0	bnx2.h
8874	MB_TX_CID_ADDR	MB_GET_CID_ADDR(TX_CID)	bnx2.h
8875	MB_RX_CID_ADDR	MB_GET_CID_ADDR(RX_CID)	bnx2.h
8876	SEEPROM_PAGE_BITS	2	bnx2.h
8877	SEEPROM_PHY_PAGE_SIZE	(1 << SEEPROM_PAGE_BITS)	bnx2.h
8878	SEEPROM_BYTE_ADDR_MASK	(SEEPROM_PHY_PAGE_SIZE-1)	bnx2.h
8879	SEEPROM_PAGE_SIZE	4	bnx2.h
8880	SEEPROM_TOTAL_SIZE	65536	bnx2.h
8881	BUFFERED_FLASH_PAGE_BITS	9	bnx2.h
8882	BUFFERED_FLASH_PHY_PAGE_SIZE	(1 << BUFFERED_FLASH_PAGE_BITS)	bnx2.h
8883	BUFFERED_FLASH_BYTE_ADDR_MASK	(BUFFERED_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
8884	BUFFERED_FLASH_PAGE_SIZE	264	bnx2.h
8885	BUFFERED_FLASH_TOTAL_SIZE	0x21000	bnx2.h
8886	SAIFUN_FLASH_PAGE_BITS	8	bnx2.h
8887	SAIFUN_FLASH_PHY_PAGE_SIZE	(1 << SAIFUN_FLASH_PAGE_BITS)	bnx2.h
8888	SAIFUN_FLASH_BYTE_ADDR_MASK	(SAIFUN_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
8889	SAIFUN_FLASH_PAGE_SIZE	256	bnx2.h
8890	SAIFUN_FLASH_BASE_TOTAL_SIZE	65536	bnx2.h
8891	ST_MICRO_FLASH_PAGE_BITS	8	bnx2.h
8892	ST_MICRO_FLASH_PHY_PAGE_SIZE	(1 << ST_MICRO_FLASH_PAGE_BITS)	bnx2.h
8893	ST_MICRO_FLASH_BYTE_ADDR_MASK	(ST_MICRO_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
8894	ST_MICRO_FLASH_PAGE_SIZE	256	bnx2.h
8895	ST_MICRO_FLASH_BASE_TOTAL_SIZE	65536	bnx2.h
8896	NVRAM_TIMEOUT_COUNT	30000	bnx2.h
8897	FLASH_STRAP_MASK	(BNX2_NVM_CFG1_FLASH_MODE \| \ BNX2_NVM_CFG1_BUFFER_MODE \| \ BNX2_NVM_CFG1_PROTECT_MODE \| \ BNX2_NVM_CFG1_FLASH_SIZE)	bnx2.h
8898	FLASH_BACKUP_STRAP_MASK	(0xf << 26)	bnx2.h
8899	RV2P_PROC1	0	bnx2.h
8900	RV2P_PROC2	1	bnx2.h
8901	DRV_PULSE_PERIOD_MS	250	bnx2.h
8902	FW_ACK_TIME_OUT_MS	100	bnx2.h
8903	BNX2_DRV_RESET_SIGNATURE	0x00000000	bnx2.h
8904	BNX2_DRV_RESET_SIGNATURE_MAGIC	0x4841564b	bnx2.h	HAVK
8905	BNX2_DRV_MB	0x00000004	bnx2.h
8906	BNX2_DRV_MSG_CODE	0xff000000	bnx2.h
8907	BNX2_DRV_MSG_CODE_RESET	0x01000000	bnx2.h
8908	BNX2_DRV_MSG_CODE_UNLOAD	0x02000000	bnx2.h
8909	BNX2_DRV_MSG_CODE_SHUTDOWN	0x03000000	bnx2.h
8910	BNX2_DRV_MSG_CODE_SUSPEND_WOL	0x04000000	bnx2.h
8911	BNX2_DRV_MSG_CODE_FW_TIMEOUT	0x05000000	bnx2.h
8912	BNX2_DRV_MSG_CODE_PULSE	0x06000000	bnx2.h
8913	BNX2_DRV_MSG_CODE_DIAG	0x07000000	bnx2.h
8914	BNX2_DRV_MSG_CODE_SUSPEND_NO_WO	0x09000000	bnx2.h
8915	BNX2_DRV_MSG_DATA	0x00ff0000	bnx2.h
8916	BNX2_DRV_MSG_DATA_WAIT0	0x00010000	bnx2.h
8917	BNX2_DRV_MSG_DATA_WAIT1	0x00020000	bnx2.h
8918	BNX2_DRV_MSG_DATA_WAIT2	0x00030000	bnx2.h
8919	BNX2_DRV_MSG_DATA_WAIT3	0x00040000	bnx2.h
8920	BNX2_DRV_MSG_SEQ	0x0000ffff	bnx2.h
8921	BNX2_FW_MB	0x00000008	bnx2.h
8922	BNX2_FW_MSG_ACK	0x0000ffff	bnx2.h
8923	BNX2_FW_MSG_STATUS_MASK	0x00ff0000	bnx2.h
8924	BNX2_FW_MSG_STATUS_OK	0x00000000	bnx2.h
8925	BNX2_FW_MSG_STATUS_FAILURE	0x00ff0000	bnx2.h
8926	BNX2_LINK_STATUS	0x0000000c	bnx2.h
8927	BNX2_LINK_STATUS_INIT_VALUE	0xffffffff	bnx2.h
8928	BNX2_LINK_STATUS_LINK_UP	0x1	bnx2.h
8929	BNX2_LINK_STATUS_LINK_DOWN	0x0	bnx2.h
8930	BNX2_LINK_STATUS_SPEED_MASK	0x1e	bnx2.h
8931	BNX2_LINK_STATUS_AN_INCOMPLETE	(0<<1)	bnx2.h
8932	BNX2_LINK_STATUS_10HALF	(1<<1)	bnx2.h
8933	BNX2_LINK_STATUS_10FULL	(2<<1)	bnx2.h
8934	BNX2_LINK_STATUS_100HALF	(3<<1)	bnx2.h
8935	BNX2_LINK_STATUS_100BASE_T4	(4<<1)	bnx2.h
8936	BNX2_LINK_STATUS_100FULL	(5<<1)	bnx2.h
8937	BNX2_LINK_STATUS_1000HALF	(6<<1)	bnx2.h
8938	BNX2_LINK_STATUS_1000FULL	(7<<1)	bnx2.h
8939	BNX2_LINK_STATUS_2500HALF	(8<<1)	bnx2.h
8940	BNX2_LINK_STATUS_2500FULL	(9<<1)	bnx2.h
8941	BNX2_LINK_STATUS_AN_ENABLED	(1<<5)	bnx2.h
8942	BNX2_LINK_STATUS_AN_COMPLETE	(1<<6)	bnx2.h
8943	BNX2_LINK_STATUS_PARALLEL_DET	(1<<7)	bnx2.h
8944	BNX2_LINK_STATUS_RESERVED	(1<<8)	bnx2.h
8945	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<9)	bnx2.h
8946	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<10)	bnx2.h
8947	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<11)	bnx2.h
8948	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<12)	bnx2.h
8949	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<13)	bnx2.h
8950	BNX2_LINK_STATUS_PARTNER_AD_10F	(1<<14)	bnx2.h
8951	BNX2_LINK_STATUS_PARTNER_AD_10H	(1<<15)	bnx2.h
8952	BNX2_LINK_STATUS_TX_FC_ENABLED	(1<<16)	bnx2.h
8953	BNX2_LINK_STATUS_RX_FC_ENABLED	(1<<17)	bnx2.h
8954	BNX2_LINK_STATUS_PARTNER_SYM_PA	(1<<18)	bnx2.h
8955	BNX2_LINK_STATUS_PARTNER_ASYM_P	(1<<19)	bnx2.h
8956	BNX2_LINK_STATUS_SERDES_LINK	(1<<20)	bnx2.h
8957	BNX2_LINK_STATUS_PARTNER_AD_250	(1<<21)	bnx2.h
8958	BNX2_LINK_STATUS_PARTNER_AD_250	(1<<22)	bnx2.h
8959	BNX2_DRV_PULSE_MB	0x00000010	bnx2.h
8960	BNX2_DRV_PULSE_SEQ_MASK	0x00007fff	bnx2.h
8961	BNX2_DRV_MSG_DATA_PULSE_CODE_AL	0x00080000	bnx2.h
8962	BNX2_DEV_INFO_SIGNATURE	0x00000020	bnx2.h
8963	BNX2_DEV_INFO_SIGNATURE_MAGIC	0x44564900	bnx2.h
8964	BNX2_DEV_INFO_SIGNATURE_MAGIC_M	0xffffff00	bnx2.h
8965	BNX2_DEV_INFO_FEATURE_CFG_VALID	0x01	bnx2.h
8966	BNX2_DEV_INFO_SECONDARY_PORT	0x80	bnx2.h
8967	BNX2_DEV_INFO_DRV_ALWAYS_ALIVE	0x40	bnx2.h
8968	BNX2_SHARED_HW_CFG_PART_NUM	0x00000024	bnx2.h
8969	BNX2_SHARED_HW_CFG_POWER_DISSIP	0x00000034	bnx2.h
8970	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff000000	bnx2.h
8971	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff0000	bnx2.h
8972	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff00	bnx2.h
8973	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff	bnx2.h
8974	BNX2_SHARED_HW_CFG	POWER_CONSUMED 0x00000038	bnx2.h
8975	BNX2_SHARED_HW_CFG_CONFIG	0x0000003c	bnx2.h
8976	BNX2_SHARED_HW_CFG_DESIGN_NIC	0	bnx2.h
8977	BNX2_SHARED_HW_CFG_DESIGN_LOM	0x1	bnx2.h
8978	BNX2_SHARED_HW_CFG_PHY_COPPER	0	bnx2.h
8979	BNX2_SHARED_HW_CFG_PHY_FIBER	0x2	bnx2.h
8980	BNX2_SHARED_HW_CFG_PHY_2_5G	0x20	bnx2.h
8981	BNX2_SHARED_HW_CFG_PHY_BACKPLAN	0x40	bnx2.h
8982	BNX2_SHARED_HW_CFG_LED_MODE_SHI	8	bnx2.h
8983	BNX2_SHARED_HW_CFG_LED_MODE_MAS	0x300	bnx2.h
8984	BNX2_SHARED_HW_CFG_LED_MODE_MAC	0	bnx2.h
8985	BNX2_SHARED_HW_CFG_LED_MODE_GPH	0x100	bnx2.h
8986	BNX2_SHARED_HW_CFG_LED_MODE_GPH	0x200	bnx2.h
8987	BNX2_SHARED_HW_CFG_CONFIG2	0x00000040	bnx2.h
8988	BNX2_SHARED_HW_CFG2_NVM_SIZE_MA	0x00fff000	bnx2.h
8989	BNX2_DEV_INFO_BC_REV	0x0000004c	bnx2.h
8990	BNX2_PORT_HW_CFG_MAC_UPPER	0x00000050	bnx2.h
8991	BNX2_PORT_HW_CFG_UPPERMAC_MASK	0xffff	bnx2.h
8992	BNX2_PORT_HW_CFG_MAC_LOWER	0x00000054	bnx2.h
8993	BNX2_PORT_HW_CFG_CONFIG	0x00000058	bnx2.h
8994	BNX2_PORT_HW_CFG_CFG_TXCTL3_MAS	0x0000ffff	bnx2.h
8995	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x001f0000	bnx2.h
8996	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00000000	bnx2.h
8997	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00030000	bnx2.h
8998	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00040000	bnx2.h
8999	BNX2_PORT_HW_CFG_IMD_MAC_A_UPPE	0x00000068	bnx2.h
9000	BNX2_PORT_HW_CFG_IMD_MAC_A_LOWE	0x0000006c	bnx2.h
9001	BNX2_PORT_HW_CFG_IMD_MAC_B_UPPE	0x00000070	bnx2.h
9002	BNX2_PORT_HW_CFG_IMD_MAC_B_LOWE	0x00000074	bnx2.h
9003	BNX2_PORT_HW_CFG_ISCSI_MAC_UPPE	0x00000078	bnx2.h
9004	BNX2_PORT_HW_CFG_ISCSI_MAC_LOWE	0x0000007c	bnx2.h
9005	BNX2_DEV_INFO_PER_PORT_HW_CONFI	0x000000b4	bnx2.h
9006	BNX2_DEV_INFO_FORMAT_REV	0x000000c4	bnx2.h
9007	BNX2_DEV_INFO_FORMAT_REV_MASK	0xff000000	bnx2.h
9008	BNX2_DEV_INFO_FORMAT_REV_ID	('A' << 24)	bnx2.h
9009	BNX2_SHARED_FEATURE	0x000000c8	bnx2.h
9010	BNX2_SHARED_FEATURE_MASK	0xffffffff	bnx2.h
9011	BNX2_PORT_FEATURE	0x000000d8	bnx2.h
9012	BNX2_PORT2_FEATURE	0x00000014c	bnx2.h
9013	BNX2_PORT_FEATURE_WOL_ENABLED	0x01000000	bnx2.h
9014	BNX2_PORT_FEATURE_MBA_ENABLED	0x02000000	bnx2.h
9015	BNX2_PORT_FEATURE_ASF_ENABLED	0x04000000	bnx2.h
9016	BNX2_PORT_FEATURE_IMD_ENABLED	0x08000000	bnx2.h
9017	BNX2_PORT_FEATURE_BAR1_SIZE_MAS	0xf	bnx2.h
9018	BNX2_PORT_FEATURE_BAR1_SIZE_DIS	0x0	bnx2.h
9019	BNX2_PORT_FEATURE_BAR1_SIZE_64K	0x1	bnx2.h
9020	BNX2_PORT_FEATURE_BAR1_SIZE_128	0x2	bnx2.h
9021	BNX2_PORT_FEATURE_BAR1_SIZE_256	0x3	bnx2.h
9022	BNX2_PORT_FEATURE_BAR1_SIZE_512	0x4	bnx2.h
9023	BNX2_PORT_FEATURE_BAR1_SIZE_1M	0x5	bnx2.h
9024	BNX2_PORT_FEATURE_BAR1_SIZE_2M	0x6	bnx2.h
9025	BNX2_PORT_FEATURE_BAR1_SIZE_4M	0x7	bnx2.h
9026	BNX2_PORT_FEATURE_BAR1_SIZE_8M	0x8	bnx2.h
9027	BNX2_PORT_FEATURE_BAR1_SIZE_16M	0x9	bnx2.h
9028	BNX2_PORT_FEATURE_BAR1_SIZE_32M	0xa	bnx2.h
9029	BNX2_PORT_FEATURE_BAR1_SIZE_64M	0xb	bnx2.h
9030	BNX2_PORT_FEATURE_BAR1_SIZE_128	0xc	bnx2.h
9031	BNX2_PORT_FEATURE_BAR1_SIZE_256	0xd	bnx2.h
9032	BNX2_PORT_FEATURE_BAR1_SIZE_512	0xe	bnx2.h
9033	BNX2_PORT_FEATURE_BAR1_SIZE_1G	0xf	bnx2.h
9034	BNX2_PORT_FEATURE_WOL	0xdc	bnx2.h
9035	BNX2_PORT2_FEATURE_WOL	0x150	bnx2.h
9036	BNX2_PORT_FEATURE_WOL_DEFAULT_S	4	bnx2.h
9037	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x30	bnx2.h
9038	BNX2_PORT_FEATURE_WOL_DEFAULT_D	0	bnx2.h
9039	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x10	bnx2.h
9040	BNX2_PORT_FEATURE_WOL_DEFAULT_A	0x20	bnx2.h
9041	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x30	bnx2.h
9042	BNX2_PORT_FEATURE_WOL_LINK_SPEE	0xf	bnx2.h
9043	BNX2_PORT_FEATURE_WOL_LINK_SPEE	0	bnx2.h
9044	BNX2_PORT_FEATURE_WOL_LINK_SPEE	1	bnx2.h
9045	BNX2_PORT_FEATURE_WOL_LINK_SPEE	2	bnx2.h
9046	BNX2_PORT_FEATURE_WOL_LINK_SPEE	3	bnx2.h
9047	BNX2_PORT_FEATURE_WOL_LINK_SPEE	4	bnx2.h
9048	BNX2_PORT_FEATURE_WOL_LINK_SPEE	5	bnx2.h
9049	BNX2_PORT_FEATURE_WOL_LINK_SPEE	6	bnx2.h
9050	BNX2_PORT_FEATURE_WOL_AUTONEG_A	0x40	bnx2.h
9051	BNX2_PORT_FEATURE_WOL_RESERVED_	0x400	bnx2.h
9052	BNX2_PORT_FEATURE_WOL_RESERVED_	0x800	bnx2.h
9053	BNX2_PORT_FEATURE_MBA	0xe0	bnx2.h
9054	BNX2_PORT2_FEATURE_MBA	0x154	bnx2.h
9055	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0	bnx2.h
9056	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0x3	bnx2.h
9057	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0	bnx2.h
9058	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	1	bnx2.h
9059	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	2	bnx2.h
9060	BNX2_PORT_FEATURE_MBA_LINK_SPEE	2	bnx2.h
9061	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x3c	bnx2.h
9062	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0	bnx2.h
9063	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x4	bnx2.h
9064	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x8	bnx2.h
9065	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0xc	bnx2.h
9066	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x10	bnx2.h
9067	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x14	bnx2.h
9068	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x18	bnx2.h
9069	BNX2_PORT_FEATURE_MBA_SETUP_PRO	0x40	bnx2.h
9070	BNX2_PORT_FEATURE_MBA_HOTKEY_CT	0	bnx2.h
9071	BNX2_PORT_FEATURE_MBA_HOTKEY_CT	0x80	bnx2.h
9072	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	8	bnx2.h
9073	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xff00	bnx2.h
9074	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0	bnx2.h
9075	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x100	bnx2.h
9076	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x200	bnx2.h
9077	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x300	bnx2.h
9078	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x400	bnx2.h
9079	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x500	bnx2.h
9080	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x600	bnx2.h
9081	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x700	bnx2.h
9082	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x800	bnx2.h
9083	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x900	bnx2.h
9084	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xa00	bnx2.h
9085	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xb00	bnx2.h
9086	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xc00	bnx2.h
9087	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xd00	bnx2.h
9088	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xe00	bnx2.h
9089	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xf00	bnx2.h
9090	BNX2_PORT_FEATURE_MBA_MSG_TIMEO	16	bnx2.h
9091	BNX2_PORT_FEATURE_MBA_MSG_TIMEO	0xf0000	bnx2.h
9092	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	20	bnx2.h
9093	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x300000	bnx2.h
9094	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0	bnx2.h
9095	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x100000	bnx2.h
9096	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x200000	bnx2.h
9097	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x300000	bnx2.h
9098	BNX2_PORT_FEATURE_IMD	0xe4	bnx2.h
9099	BNX2_PORT2_FEATURE_IMD	0x158	bnx2.h
9100	BNX2_PORT_FEATURE_IMD_LINK_OVER	0	bnx2.h
9101	BNX2_PORT_FEATURE_IMD_LINK_OVER	1	bnx2.h
9102	BNX2_PORT_FEATURE_VLAN	0xe8	bnx2.h
9103	BNX2_PORT2_FEATURE_VLAN	0x15c	bnx2.h
9104	BNX2_PORT_FEATURE_MBA_VLAN_TAG_	0xffff	bnx2.h
9105	BNX2_PORT_FEATURE_MBA_VLAN_ENAB	0x10000	bnx2.h
9106	BNX2_BC_STATE_RESET_TYPE	0x000001c0	bnx2.h
9107	BNX2_BC_STATE_RESET_TYPE_SIG	0x00005254	bnx2.h
9108	BNX2_BC_STATE_RESET_TYPE_SIG_MA	0x0000ffff	bnx2.h
9109	BNX2_BC_STATE_RESET_TYPE_NONE	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00010000)	bnx2.h
9110	BNX2_BC_STATE_RESET_TYPE_PCI	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00020000)	bnx2.h
9111	BNX2_BC_STATE_RESET_TYPE_VAUX	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00030000)	bnx2.h
9112	BNX2_BC_STATE_RESET_TYPE_DRV_MA	DRV_MSG_CODE	bnx2.h
9113	BNX2_BC_STATE_RESET_TYPE_DRV_RE	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_RESET)	bnx2.h
9114	BNX2_BC_STATE_RESET_TYPE_DRV_UN	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_UNLOAD)	bnx2.h
9115	BNX2_BC_STATE_RESET_TYPE_DRV_SH	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_SHUTDOWN)	bnx2.h
9116	BNX2_BC_STATE_RESET_TYPE_DRV_WO	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_WOL)	bnx2.h
9117	BNX2_BC_STATE_RESET_TYPE_DRV_DI	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_DIAG)	bnx2.h
9118	BNX2_BC_STATE	0x000001c4	bnx2.h
9119	BNX2_BC_STATE_ERR_MASK	0x0000ff00	bnx2.h
9120	BNX2_BC_STATE_SIGN	0x42530000	bnx2.h
9121	BNX2_BC_STATE_SIGN_MASK	0xffff0000	bnx2.h
9122	BNX2_BC_STATE_BC1_START	(BNX2_BC_STATE_SIGN \| 0x1)	bnx2.h
9123	BNX2_BC_STATE_GET_NVM_CFG1	(BNX2_BC_STATE_SIGN \| 0x2)	bnx2.h
9124	BNX2_BC_STATE_PROG_BAR	(BNX2_BC_STATE_SIGN \| 0x3)	bnx2.h
9125	BNX2_BC_STATE_INIT_VID	(BNX2_BC_STATE_SIGN \| 0x4)	bnx2.h
9126	BNX2_BC_STATE_GET_NVM_CFG2	(BNX2_BC_STATE_SIGN \| 0x5)	bnx2.h
9127	BNX2_BC_STATE_APPLY_WKARND	(BNX2_BC_STATE_SIGN \| 0x6)	bnx2.h
9128	BNX2_BC_STATE_LOAD_BC2	(BNX2_BC_STATE_SIGN \| 0x7)	bnx2.h
9129	BNX2_BC_STATE_GOING_BC2	(BNX2_BC_STATE_SIGN \| 0x8)	bnx2.h
9130	BNX2_BC_STATE_GOING_DIAG	(BNX2_BC_STATE_SIGN \| 0x9)	bnx2.h
9131	BNX2_BC_STATE_RT_FINAL_INIT	(BNX2_BC_STATE_SIGN \| 0x81)	bnx2.h
9132	BNX2_BC_STATE_RT_WKARND	(BNX2_BC_STATE_SIGN \| 0x82)	bnx2.h
9133	BNX2_BC_STATE_RT_DRV_PULSE	(BNX2_BC_STATE_SIGN \| 0x83)	bnx2.h
9134	BNX2_BC_STATE_RT_FIOEVTS	(BNX2_BC_STATE_SIGN \| 0x84)	bnx2.h
9135	BNX2_BC_STATE_RT_DRV_CMD	(BNX2_BC_STATE_SIGN \| 0x85)	bnx2.h
9136	BNX2_BC_STATE_RT_LOW_POWER	(BNX2_BC_STATE_SIGN \| 0x86)	bnx2.h
9137	BNX2_BC_STATE_RT_SET_WOL	(BNX2_BC_STATE_SIGN \| 0x87)	bnx2.h
9138	BNX2_BC_STATE_RT_OTHER_FW	(BNX2_BC_STATE_SIGN \| 0x88)	bnx2.h
9139	BNX2_BC_STATE_RT_GOING_D3	(BNX2_BC_STATE_SIGN \| 0x89)	bnx2.h
9140	BNX2_BC_STATE_ERR_BAD_VERSION	(BNX2_BC_STATE_SIGN \| 0x0100)	bnx2.h
9141	BNX2_BC_STATE_ERR_BAD_BC2_CRC	(BNX2_BC_STATE_SIGN \| 0x0200)	bnx2.h
9142	BNX2_BC_STATE_ERR_BC1_LOOP	(BNX2_BC_STATE_SIGN \| 0x0300)	bnx2.h
9143	BNX2_BC_STATE_ERR_UNKNOWN_CMD	(BNX2_BC_STATE_SIGN \| 0x0400)	bnx2.h
9144	BNX2_BC_STATE_ERR_DRV_DEAD	(BNX2_BC_STATE_SIGN \| 0x0500)	bnx2.h
9145	BNX2_BC_STATE_ERR_NO_RXP	(BNX2_BC_STATE_SIGN \| 0x0600)	bnx2.h
9146	BNX2_BC_STATE_ERR_TOO_MANY_RBUF	(BNX2_BC_STATE_SIGN \| 0x0700)	bnx2.h
9147	BNX2_BC_STATE_DEBUG_CMD	0x1dc	bnx2.h
9148	BNX2_BC_STATE_BC_DBG_CMD_SIGNAT	0x42440000	bnx2.h
9149	BNX2_BC_STATE_BC_DBG_CMD_SIGNAT	0xffff0000	bnx2.h
9150	BNX2_BC_STATE_BC_DBG_CMD_LOOP_C	0xffff	bnx2.h
9151	BNX2_BC_STATE_BC_DBG_CMD_LOOP_I	0xffff	bnx2.h
9152	HOST_VIEW_SHMEM_BASE	0x167c00	bnx2.h
9153	AUTONEG_DISABLE	0x00	bnx2.h
9154	AUTONEG_ENABLE	0x01	bnx2.h
9155	RX_OFFSET	(sizeof(struct l2_fhdr) + 2)	bnx2.h
9156	RX_BUF_CNT	20	bnx2.h
9157	RX_BUF_USE_SIZE	(ETH_MAX_MTU + ETH_HLEN + RX_OFFSET + 8)	bnx2.h
9158	RX_BUF_SIZE	(L1_CACHE_ALIGN(RX_BUF_USE_SIZE + 8))	bnx2.h
9159	PP_ChipID	0x0000	cs89x0.h	offset 0h -> Corp -ID
9160	PP_ISAIOB	0x0020	cs89x0.h	IO base address
9161	PP_CS8900_ISAINT	0x0022	cs89x0.h	ISA interrupt select
9162	PP_CS8920_ISAINT	0x0370	cs89x0.h	ISA interrupt select
9163	PP_CS8900_ISADMA	0x0024	cs89x0.h	ISA Rec DMA channel
9164	PP_CS8920_ISADMA	0x0374	cs89x0.h	ISA Rec DMA channel
9165	PP_ISASOF	0x0026	cs89x0.h	ISA DMA offset
9166	PP_DmaFrameCnt	0x0028	cs89x0.h	ISA DMA Frame count
9167	PP_DmaByteCnt	0x002A	cs89x0.h	ISA DMA Byte count
9168	PP_CS8900_ISAMemB	0x002C	cs89x0.h	Memory base
9169	PP_CS8920_ISAMemB	0x0348	cs89x0.h
9170	PP_ISABootBase	0x0030	cs89x0.h	Boot Prom base
9171	PP_ISABootMask	0x0034	cs89x0.h	Boot Prom Mask
9172	PP_EECMD	0x0040	cs89x0.h	NVR Interface Command register
9173	PP_EEData	0x0042	cs89x0.h	NVR Interface Data Register
9174	PP_DebugReg	0x0044	cs89x0.h	Debug Register
9175	PP_RxCFG	0x0102	cs89x0.h	Rx Bus config
9176	PP_RxCTL	0x0104	cs89x0.h	Receive Control Register
9177	PP_TxCFG	0x0106	cs89x0.h	Transmit Config Register
9178	PP_TxCMD	0x0108	cs89x0.h	Transmit Command Register
9179	PP_BufCFG	0x010A	cs89x0.h	Bus configuration Register
9180	PP_LineCTL	0x0112	cs89x0.h	Line Config Register
9181	PP_SelfCTL	0x0114	cs89x0.h	Self Command Register
9182	PP_BusCTL	0x0116	cs89x0.h	ISA bus control Register
9183	PP_TestCTL	0x0118	cs89x0.h	Test Register
9184	PP_AutoNegCTL	0x011C	cs89x0.h	Auto Negotiation Ctrl
9185	PP_ISQ	0x0120	cs89x0.h	Interrupt Status
9186	PP_RxEvent	0x0124	cs89x0.h	Rx Event Register
9187	PP_TxEvent	0x0128	cs89x0.h	Tx Event Register
9188	PP_BufEvent	0x012C	cs89x0.h	Bus Event Register
9189	PP_RxMiss	0x0130	cs89x0.h	Receive Miss Count
9190	PP_TxCol	0x0132	cs89x0.h	Transmit Collision Count
9191	PP_LineST	0x0134	cs89x0.h	Line State Register
9192	PP_SelfST	0x0136	cs89x0.h	Self State register
9193	PP_BusST	0x0138	cs89x0.h	Bus Status
9194	PP_TDR	0x013C	cs89x0.h	Time Domain Reflectometry
9195	PP_AutoNegST	0x013E	cs89x0.h	Auto Neg Status
9196	PP_TxCommand	0x0144	cs89x0.h	Tx Command
9197	PP_TxLength	0x0146	cs89x0.h	Tx Length
9198	PP_LAF	0x0150	cs89x0.h	Hash Table
9199	PP_IA	0x0158	cs89x0.h	Physical Address Register
9200	PP_RxStatus	0x0400	cs89x0.h	Receive start of frame
9201	PP_RxLength	0x0402	cs89x0.h	Receive Length of frame
9202	PP_RxFrame	0x0404	cs89x0.h	Receive frame pointer
9203	PP_TxFrame	0x0A00	cs89x0.h	Transmit frame pointer
9204	DEFAULTIOBASE	0x0300	cs89x0.h
9205	FIRST_IO	0x020C	cs89x0.h	First I/O port to check
9206	LAST_IO	0x037C	cs89x0.h	Last I/O port to check (+10h)
9207	ADD_MASK	0x3000	cs89x0.h	Mask it use of the ADD_PORT register
9208	ADD_SIG	0x3000	cs89x0.h	Expected ID signature
9209	CHIP_EISA_ID_SIG	0x630E	cs89x0.h	Product ID Code for Crystal Chip (CS8900 spec 4.3)
9210	EISA_ID_SIG	0x4D24	cs89x0.h	IBM
9211	PART_NO_SIG	0x1010	cs89x0.h	IBM
9212	MONGOOSE_BIT	0x0000	cs89x0.h	IBM
9213	EISA_ID_SIG	0x630E	cs89x0.h	PnP Vendor ID (same as chip id for Crystal board)
9214	PART_NO_SIG	0x4000	cs89x0.h	ID code CS8920 board (PnP Vendor Product code)
9215	MONGOOSE_BIT	0x2000	cs89x0.h	PART_NO_SIG + MONGOOSE_BUT => ID of mongoose
9216	PRODUCT_ID_ADD	0x0002	cs89x0.h	Address of product ID
9217	REG_TYPE_MASK	0x001F	cs89x0.h
9218	ERSE_WR_ENBL	0x00F0	cs89x0.h
9219	ERSE_WR_DISABLE	0x0000	cs89x0.h
9220	RX_BUF_CFG	0x0003	cs89x0.h
9221	RX_CONTROL	0x0005	cs89x0.h
9222	TX_CFG	0x0007	cs89x0.h
9223	TX_COMMAND	0x0009	cs89x0.h
9224	BUF_CFG	0x000B	cs89x0.h
9225	LINE_CONTROL	0x0013	cs89x0.h
9226	SELF_CONTROL	0x0015	cs89x0.h
9227	BUS_CONTROL	0x0017	cs89x0.h
9228	TEST_CONTROL	0x0019	cs89x0.h
9229	RX_EVENT	0x0004	cs89x0.h
9230	TX_EVENT	0x0008	cs89x0.h
9231	BUF_EVENT	0x000C	cs89x0.h
9232	RX_MISS_COUNT	0x0010	cs89x0.h
9233	TX_COL_COUNT	0x0012	cs89x0.h
9234	LINE_STATUS	0x0014	cs89x0.h
9235	SELF_STATUS	0x0016	cs89x0.h
9236	BUS_STATUS	0x0018	cs89x0.h
9237	TDR	0x001C	cs89x0.h
9238	SKIP_1	0x0040	cs89x0.h
9239	RX_STREAM_ENBL	0x0080	cs89x0.h
9240	RX_OK_ENBL	0x0100	cs89x0.h
9241	RX_DMA_ONLY	0x0200	cs89x0.h
9242	AUTO_RX_DMA	0x0400	cs89x0.h
9243	BUFFER_CRC	0x0800	cs89x0.h
9244	RX_CRC_ERROR_ENBL	0x1000	cs89x0.h
9245	RX_RUNT_ENBL	0x2000	cs89x0.h
9246	RX_EXTRA_DATA_ENBL	0x4000	cs89x0.h
9247	RX_IA_HASH_ACCEPT	0x0040	cs89x0.h
9248	RX_PROM_ACCEPT	0x0080	cs89x0.h
9249	RX_OK_ACCEPT	0x0100	cs89x0.h
9250	RX_MULTCAST_ACCEPT	0x0200	cs89x0.h
9251	RX_IA_ACCEPT	0x0400	cs89x0.h
9252	RX_BROADCAST_ACCEPT	0x0800	cs89x0.h
9253	RX_BAD_CRC_ACCEPT	0x1000	cs89x0.h
9254	RX_RUNT_ACCEPT	0x2000	cs89x0.h
9255	RX_EXTRA_DATA_ACCEPT	0x4000	cs89x0.h
9256	RX_ALL_ACCEPT	(RX_PROM_ACCEPT\|RX_BAD_CRC_ACCEPT\|RX_RUNT_ACCEPT\|RX_EXTRA_DATA_ACCEPT)	cs89x0.h
9257	DEF_RX_ACCEPT	(RX_IA_ACCEPT \| RX_BROADCAST_ACCEPT \| RX_OK_ACCEPT)	cs89x0.h
9258	TX_LOST_CRS_ENBL	0x0040	cs89x0.h
9259	TX_SQE_ERROR_ENBL	0x0080	cs89x0.h
9260	TX_OK_ENBL	0x0100	cs89x0.h
9261	TX_LATE_COL_ENBL	0x0200	cs89x0.h
9262	TX_JBR_ENBL	0x0400	cs89x0.h
9263	TX_ANY_COL_ENBL	0x0800	cs89x0.h
9264	TX_16_COL_ENBL	0x8000	cs89x0.h
9265	TX_START_4_BYTES	0x0000	cs89x0.h
9266	TX_START_64_BYTES	0x0040	cs89x0.h
9267	TX_START_128_BYTES	0x0080	cs89x0.h
9268	TX_START_ALL_BYTES	0x00C0	cs89x0.h
9269	TX_FORCE	0x0100	cs89x0.h
9270	TX_ONE_COL	0x0200	cs89x0.h
9271	TX_TWO_PART_DEFF_DISABLE	0x0400	cs89x0.h
9272	TX_NO_CRC	0x1000	cs89x0.h
9273	TX_RUNT	0x2000	cs89x0.h
9274	GENERATE_SW_INTERRUPT	0x0040	cs89x0.h
9275	RX_DMA_ENBL	0x0080	cs89x0.h
9276	READY_FOR_TX_ENBL	0x0100	cs89x0.h
9277	TX_UNDERRUN_ENBL	0x0200	cs89x0.h
9278	RX_MISS_ENBL	0x0400	cs89x0.h
9279	RX_128_BYTE_ENBL	0x0800	cs89x0.h
9280	TX_COL_COUNT_OVRFLOW_ENBL	0x1000	cs89x0.h
9281	RX_MISS_COUNT_OVRFLOW_ENBL	0x2000	cs89x0.h
9282	RX_DEST_MATCH_ENBL	0x8000	cs89x0.h
9283	SERIAL_RX_ON	0x0040	cs89x0.h
9284	SERIAL_TX_ON	0x0080	cs89x0.h
9285	AUI_ONLY	0x0100	cs89x0.h
9286	AUTO_AUI_10BASET	0x0200	cs89x0.h
9287	MODIFIED_BACKOFF	0x0800	cs89x0.h
9288	NO_AUTO_POLARITY	0x1000	cs89x0.h
9289	TWO_PART_DEFDIS	0x2000	cs89x0.h
9290	LOW_RX_SQUELCH	0x4000	cs89x0.h
9291	POWER_ON_RESET	0x0040	cs89x0.h
9292	SW_STOP	0x0100	cs89x0.h
9293	SLEEP_ON	0x0200	cs89x0.h
9294	AUTO_WAKEUP	0x0400	cs89x0.h
9295	HCB0_ENBL	0x1000	cs89x0.h
9296	HCB1_ENBL	0x2000	cs89x0.h
9297	HCB0	0x4000	cs89x0.h
9298	HCB1	0x8000	cs89x0.h
9299	RESET_RX_DMA	0x0040	cs89x0.h
9300	MEMORY_ON	0x0400	cs89x0.h
9301	DMA_BURST_MODE	0x0800	cs89x0.h
9302	IO_CHANNEL_READY_ON	0x1000	cs89x0.h
9303	RX_DMA_SIZE_64K	0x2000	cs89x0.h
9304	ENABLE_IRQ	0x8000	cs89x0.h
9305	LINK_OFF	0x0080	cs89x0.h
9306	ENDEC_LOOPBACK	0x0200	cs89x0.h
9307	AUI_LOOPBACK	0x0400	cs89x0.h
9308	BACKOFF_OFF	0x0800	cs89x0.h
9309	FAST_TEST	0x8000	cs89x0.h
9310	RX_IA_HASHED	0x0040	cs89x0.h
9311	RX_DRIBBLE	0x0080	cs89x0.h
9312	RX_OK	0x0100	cs89x0.h
9313	RX_HASHED	0x0200	cs89x0.h
9314	RX_IA	0x0400	cs89x0.h
9315	RX_BROADCAST	0x0800	cs89x0.h
9316	RX_CRC_ERROR	0x1000	cs89x0.h
9317	RX_RUNT	0x2000	cs89x0.h
9318	RX_EXTRA_DATA	0x4000	cs89x0.h
9319	HASH_INDEX_MASK	0x0FC00	cs89x0.h
9320	TX_LOST_CRS	0x0040	cs89x0.h
9321	TX_SQE_ERROR	0x0080	cs89x0.h
9322	TX_OK	0x0100	cs89x0.h
9323	TX_LATE_COL	0x0200	cs89x0.h
9324	TX_JBR	0x0400	cs89x0.h
9325	TX_16_COL	0x8000	cs89x0.h
9326	TX_SEND_OK_BITS	(TX_OK\|TX_LOST_CRS)	cs89x0.h
9327	TX_COL_COUNT_MASK	0x7800	cs89x0.h
9328	SW_INTERRUPT	0x0040	cs89x0.h
9329	RX_DMA	0x0080	cs89x0.h
9330	READY_FOR_TX	0x0100	cs89x0.h
9331	TX_UNDERRUN	0x0200	cs89x0.h
9332	RX_MISS	0x0400	cs89x0.h
9333	RX_128_BYTE	0x0800	cs89x0.h
9334	TX_COL_OVRFLW	0x1000	cs89x0.h
9335	RX_MISS_OVRFLW	0x2000	cs89x0.h
9336	RX_DEST_MATCH	0x8000	cs89x0.h
9337	LINK_OK	0x0080	cs89x0.h
9338	AUI_ON	0x0100	cs89x0.h
9339	TENBASET_ON	0x0200	cs89x0.h
9340	POLARITY_OK	0x1000	cs89x0.h
9341	CRS_OK	0x4000	cs89x0.h
9342	ACTIVE_33V	0x0040	cs89x0.h
9343	INIT_DONE	0x0080	cs89x0.h
9344	SI_BUSY	0x0100	cs89x0.h
9345	EEPROM_PRESENT	0x0200	cs89x0.h
9346	EEPROM_OK	0x0400	cs89x0.h
9347	EL_PRESENT	0x0800	cs89x0.h
9348	EE_SIZE_64	0x1000	cs89x0.h
9349	TX_BID_ERROR	0x0080	cs89x0.h
9350	READY_FOR_TX_NOW	0x0100	cs89x0.h
9351	RE_NEG_NOW	0x0040	cs89x0.h
9352	ALLOW_FDX	0x0080	cs89x0.h
9353	AUTO_NEG_ENABLE	0x0100	cs89x0.h
9354	NLP_ENABLE	0x0200	cs89x0.h
9355	FORCE_FDX	0x8000	cs89x0.h
9356	AUTO_NEG_BITS	(FORCE_FDX\|NLP_ENABLE\|AUTO_NEG_ENABLE)	cs89x0.h
9357	AUTO_NEG_MASK	(FORCE_FDX\|NLP_ENABLE\|AUTO_NEG_ENABLE\|ALLOW_FDX\|RE_NEG_NOW)	cs89x0.h
9358	AUTO_NEG_BUSY	0x0080	cs89x0.h
9359	FLP_LINK	0x0100	cs89x0.h
9360	FLP_LINK_GOOD	0x0800	cs89x0.h
9361	LINK_FAULT	0x1000	cs89x0.h
9362	HDX_ACTIVE	0x4000	cs89x0.h
9363	FDX_ACTIVE	0x8000	cs89x0.h
9364	ISQ_RECEIVER_EVENT	0x04	cs89x0.h
9365	ISQ_TRANSMITTER_EVENT	0x08	cs89x0.h
9366	ISQ_BUFFER_EVENT	0x0c	cs89x0.h
9367	ISQ_RX_MISS_EVENT	0x10	cs89x0.h
9368	ISQ_TX_COL_EVENT	0x12	cs89x0.h
9369	ISQ_EVENT_MASK	0x003F	cs89x0.h	ISQ mask to find out type of event
9370	ISQ_HIST	16	cs89x0.h	small history buffer
9371	AUTOINCREMENT	0x8000	cs89x0.h	Bit mask to set bit-15 for autoincrement
9372	TXRXBUFSIZE	0x0600	cs89x0.h
9373	RXDMABUFSIZE	0x8000	cs89x0.h
9374	RXDMASIZE	0x4000	cs89x0.h
9375	TXRX_LENGTH_MASK	0x07FF	cs89x0.h
9376	RCV_WITH_RXON	1	cs89x0.h	Set SerRx ON
9377	RCV_COUNTS	2	cs89x0.h	Use Framecnt1
9378	RCV_PONG	4	cs89x0.h	Pong respondent
9379	RCV_DONG	8	cs89x0.h	Dong operation
9380	RCV_POLLING	0x10	cs89x0.h	Poll RxEvent
9381	RCV_ISQ	0x20	cs89x0.h	Use ISQ, int
9382	RCV_AUTO_DMA	0x100	cs89x0.h	Set AutoRxDMAE
9383	RCV_DMA	0x200	cs89x0.h	Set RxDMA only
9384	RCV_DMA_ALL	0x400	cs89x0.h	Copy all DMA'ed
9385	RCV_FIXED_DATA	0x800	cs89x0.h	Every frame same
9386	RCV_IO	0x1000	cs89x0.h	Use ISA IO only
9387	RCV_MEMORY	0x2000	cs89x0.h	Use ISA Memory
9388	RAM_SIZE	0x1000	cs89x0.h	The card has 4k bytes or RAM
9389	PKT_START	PP_TxFrame	cs89x0.h	Start of packet RAM
9390	RX_FRAME_PORT	0x0000	cs89x0.h
9391	TX_FRAME_PORT	RX_FRAME_PORT	cs89x0.h
9392	TX_CMD_PORT	0x0004	cs89x0.h
9393	TX_NOW	0x0000	cs89x0.h	Tx packet after 5 bytes copied
9394	TX_AFTER_381	0x0020	cs89x0.h	Tx packet after 381 bytes copied
9395	TX_AFTER_ALL	0x00C0	cs89x0.h	Tx packet after all bytes copied
9396	TX_LEN_PORT	0x0006	cs89x0.h
9397	ISQ_PORT	0x0008	cs89x0.h
9398	ADD_PORT	0x000A	cs89x0.h
9399	DATA_PORT	0x000C	cs89x0.h
9400	EEPROM_WRITE_EN	0x00F0	cs89x0.h
9401	EEPROM_WRITE_DIS	0x0000	cs89x0.h
9402	EEPROM_WRITE_CMD	0x0100	cs89x0.h
9403	EEPROM_READ_CMD	0x0200	cs89x0.h
9404	RBUF_EVENT_LOW	0	cs89x0.h	Low byte of RxEvent - status of received frame
9405	RBUF_EVENT_HIGH	1	cs89x0.h	High byte of RxEvent - status of received frame
9406	RBUF_LEN_LOW	2	cs89x0.h	Length of received data - low byte
9407	RBUF_LEN_HI	3	cs89x0.h	Length of received data - high byte
9408	RBUF_HEAD_LEN	4	cs89x0.h	Length of this header
9409	CHIP_READ	0x1	cs89x0.h	Used to mark state of the repins code (chip or dma)
9410	DMA_READ	0x2	cs89x0.h	Used to mark state of the repins code (chip or dma)
9411	BIOS_START_SEG	0x00000	cs89x0.h
9412	BIOS_OFFSET_INC	0x0010	cs89x0.h
9413	BIOS_START_SEG	0x0c000	cs89x0.h
9414	BIOS_OFFSET_INC	0x0200	cs89x0.h
9415	BIOS_LAST_OFFSET	0x0fc00	cs89x0.h
9416	ISA_CNF_OFFSET	0x6	cs89x0.h
9417	TX_CTL_OFFSET	(ISA_CNF_OFFSET + 8)	cs89x0.h	8900 eeprom
9418	AUTO_NEG_CNF_OFFSET	(ISA_CNF_OFFSET + 8)	cs89x0.h	8920 eeprom
9419	EE_FORCE_FDX	0x8000	cs89x0.h
9420	EE_NLP_ENABLE	0x0200	cs89x0.h
9421	EE_AUTO_NEG_ENABLE	0x0100	cs89x0.h
9422	EE_ALLOW_FDX	0x0080	cs89x0.h
9423	EE_AUTO_NEG_CNF_MASK	(EE_FORCE_FDX\|EE_NLP_ENABLE\|EE_AUTO_NEG_ENABLE\|EE_ALLOW_FDX)	cs89x0.h
9424	IMM_BIT	0x0040	cs89x0.h	ignore missing media
9425	ADAPTER_CNF_OFFSET	(AUTO_NEG_CNF_OFFSET + 2)	cs89x0.h
9426	A_CNF_10B_T	0x0001	cs89x0.h
9427	A_CNF_AUI	0x0002	cs89x0.h
9428	A_CNF_10B_2	0x0004	cs89x0.h
9429	A_CNF_MEDIA_TYPE	0x0060	cs89x0.h
9430	A_CNF_MEDIA_AUTO	0x0000	cs89x0.h
9431	A_CNF_MEDIA_10B_T	0x0020	cs89x0.h
9432	A_CNF_MEDIA_AUI	0x0040	cs89x0.h
9433	A_CNF_MEDIA_10B_2	0x0060	cs89x0.h
9434	A_CNF_DC_DC_POLARITY	0x0080	cs89x0.h
9435	A_CNF_NO_AUTO_POLARITY	0x2000	cs89x0.h
9436	A_CNF_LOW_RX_SQUELCH	0x4000	cs89x0.h
9437	A_CNF_EXTND_10B_2	0x8000	cs89x0.h
9438	PACKET_PAGE_OFFSET	0x8	cs89x0.h
9439	INT_NO_MASK	0x000F	cs89x0.h
9440	DMA_NO_MASK	0x0070	cs89x0.h
9441	ISA_DMA_SIZE	0x0200	cs89x0.h
9442	ISA_AUTO_RxDMA	0x0400	cs89x0.h
9443	ISA_RxDMA	0x0800	cs89x0.h
9444	DMA_BURST	0x1000	cs89x0.h
9445	STREAM_TRANSFER	0x2000	cs89x0.h
9446	ANY_ISA_DMA	(ISA_AUTO_RxDMA \| ISA_RxDMA)	cs89x0.h
9447	DMA_BASE	0x00	cs89x0.h	DMA controller base
9448	DMA_BASE_2	0x0C0	cs89x0.h	DMA controller base
9449	DMA_STAT	0x0D0	cs89x0.h	DMA controller status register
9450	DMA_MASK	0x0D4	cs89x0.h	DMA controller mask register
9451	DMA_MODE	0x0D6	cs89x0.h	DMA controller mode register
9452	DMA_RESETFF	0x0D8	cs89x0.h	DMA controller first/last flip flop
9453	DMA_DISABLE	0x04	cs89x0.h	Disable channel n
9454	DMA_ENABLE	0x00	cs89x0.h	Enable channel n
9455	DMA_RX_MODE	0x14	cs89x0.h
9456	DMA_TX_MODE	0x18	cs89x0.h
9457	DMA_SIZE	(16*1024)	cs89x0.h	Size of dma buffer - 16k
9458	CS8900	0x0000	cs89x0.h
9459	CS8920	0x4000	cs89x0.h
9460	CS8920M	0x6000	cs89x0.h
9461	REVISON_BITS	0x1F00	cs89x0.h
9462	EEVER_NUMBER	0x12	cs89x0.h
9463	CHKSUM_LEN	0x14	cs89x0.h
9464	CHKSUM_VAL	0x0000	cs89x0.h
9465	START_EEPROM_DATA	0x001c	cs89x0.h	Offset into eeprom for start of data
9466	IRQ_MAP_EEPROM_DATA	0x0046	cs89x0.h	Offset into eeprom for the IRQ map
9467	IRQ_MAP_LEN	0x0004	cs89x0.h	No of bytes to read for the IRQ map
9468	PNP_IRQ_FRMT	0x0022	cs89x0.h	PNP small item IRQ format
9469	CS8900_IRQ_MAP	0x1c20	cs89x0.h	This IRQ map is fixed
9470	CS8920_NO_INTS	0x0F	cs89x0.h	Max CS8920 interrupt select #
9471	PNP_ADD_PORT	0x0279	cs89x0.h
9472	PNP_WRITE_PORT	0x0A79	cs89x0.h
9473	GET_PNP_ISA_STRUCT	0x40	cs89x0.h
9474	PNP_ISA_STRUCT_LEN	0x06	cs89x0.h
9475	PNP_CSN_CNT_OFF	0x01	cs89x0.h
9476	PNP_RD_PORT_OFF	0x02	cs89x0.h
9477	PNP_FUNCTION_OK	0x00	cs89x0.h
9478	PNP_WAKE	0x03	cs89x0.h
9479	PNP_RSRC_DATA	0x04	cs89x0.h
9480	PNP_RSRC_READY	0x01	cs89x0.h
9481	PNP_STATUS	0x05	cs89x0.h
9482	PNP_ACTIVATE	0x30	cs89x0.h
9483	PNP_CNF_IO_H	0x60	cs89x0.h
9484	PNP_CNF_IO_L	0x61	cs89x0.h
9485	PNP_CNF_INT	0x70	cs89x0.h
9486	PNP_CNF_DMA	0x74	cs89x0.h
9487	PNP_CNF_MEM	0x48	cs89x0.h
9488	BIT0	1	cs89x0.h
9489	BIT15	0x8000	cs89x0.h
9490	CONGENB	0	eepro100.h	Enable congestion control in the DP83840.
9491	TX_FIFO	8	eepro100.h	Tx FIFO threshold in 4 byte units, 0-15
9492	RX_FIFO	8	eepro100.h	Rx FIFO threshold, default 32 bytes.
9493	TX_DMA_COUNT	0	eepro100.h	Tx DMA burst length, 0-127, default 0.
9494	RX_DMA_COUNT	0	eepro100.h	Rx DMA length, 0 means no preemption.
9495	CU_CMD_TIMEOUT	1000	eepro100.h	CU command accept timeout in microseconds
9496	LINK_CHECK_PERIOD	1000	eepro100.h	# of poll() calls between link checks
9497	RFD_PACKET_LEN	1518	eepro100.h
9498	RFD_IOB_LEN	1536	eepro100.h
9499	RFD_HEADER_LEN	16	eepro100.h
9500	CB_ALIGN	2	eepro100.h	Alignment of command blocks
9501	RFD_COUNT	4	eepro100.h
9502	TCB_COUNT	4	eepro100.h
9503	RX_RING_BYTES	( RFD_COUNT * sizeof ( struct ifec_rfd ) )	eepro100.h
9504	TX_RING_BYTES	( TCB_COUNT * sizeof ( struct ifec_tcb ) )	eepro100.h
9505	EEPROM_ADDR_MAC_0	0	eepro100.h
9506	EEPROM_ADDR_MDIO_REGISTER	6	eepro100.h
9507	EE_SHIFT_CLK	0x01	eepro100.h	EEPROM shift clock.
9508	EE_CS	0x02	eepro100.h	EEPROM chip select.
9509	EE_DATA_WRITE	0x04	eepro100.h	EEPROM chip data in.
9510	EE_DATA_READ	0x08	eepro100.h	EEPROM chip data out.
9511	EE_ENB	( 0x4800 \| EE_CS )	eepro100.h
9512	PCI_VENDOR_SMC	0x10B8	epic100.h
9513	PCI_DEVICE_SMC_EPIC100	0x0005	epic100.h
9514	PCI_DEVICE_ID_NONE	0xFFFF	epic100.h
9515	CR_STOP_RX	(0x00000001)	epic100.h
9516	CR_START_RX	(0x00000002)	epic100.h
9517	CR_QUEUE_TX	(0x00000004)	epic100.h
9518	CR_QUEUE_RX	(0x00000008)	epic100.h
9519	CR_NEXTFRAME	(0x00000010)	epic100.h
9520	CR_STOP_TX_DMA	(0x00000020)	epic100.h
9521	CR_STOP_RX_DMA	(0x00000040)	epic100.h
9522	CR_TX_UGO	(0x00000080)	epic100.h
9523	INTR_RX_THR_STA	(0x00400000)	epic100.h	rx copy threshold status NI
9524	INTR_RX_BUFF_EMPTY	(0x00200000)	epic100.h	rx buffers empty. NI
9525	INTR_TX_IN_PROG	(0x00100000)	epic100.h	tx copy in progess. NI
9526	INTR_RX_IN_PROG	(0x00080000)	epic100.h	rx copy in progress. NI
9527	INTR_TXIDLE	(0x00040000)	epic100.h	tx idle. NI
9528	INTR_RXIDLE	(0x00020000)	epic100.h	rx idle. NI
9529	INTR_INTR_ACTIVE	(0x00010000)	epic100.h	Interrupt active. NI
9530	INTR_RX_STATUS_OK	(0x00008000)	epic100.h	rx status valid. NI
9531	INTR_PCI_TGT_ABT	(0x00004000)	epic100.h	PCI Target abort
9532	INTR_PCI_MASTER_ABT	(0x00002000)	epic100.h	PCI Master abort
9533	INTR_PCI_PARITY_ERR	(0x00001000)	epic100.h	PCI adress parity error
9534	INTR_PCI_DATA_ERR	(0x00000800)	epic100.h	PCI data parity error
9535	INTR_RX_THR_CROSSED	(0x00000400)	epic100.h	rx copy threshold crossed
9536	INTR_CNTFULL	(0x00000200)	epic100.h	Counter overflow
9537	INTR_TXUNDERRUN	(0x00000100)	epic100.h	tx underrun.
9538	INTR_TXEMPTY	(0x00000080)	epic100.h	tx queue empty
9539	INTR_TX_CH_COMPLETE	(0x00000040)	epic100.h	tx chain complete
9540	INTR_TXDONE	(0x00000020)	epic100.h	tx complete (w or w/o err)
9541	INTR_RXERROR	(0x00000010)	epic100.h	rx error (CRC)
9542	INTR_RXOVERFLOW	(0x00000008)	epic100.h	rx buffer overflow
9543	INTR_RX_QUEUE_EMPTY	(0x00000004)	epic100.h	rx queue empty.
9544	INTR_RXHEADER	(0x00000002)	epic100.h	header copy complete
9545	INTR_RXDONE	(0x00000001)	epic100.h	Receive copy complete
9546	INTR_CLEARINTR	(0x00007FFF)	epic100.h
9547	INTR_VALIDBITS	(0x007FFFFF)	epic100.h
9548	INTR_DISABLE	(0x00000000)	epic100.h
9549	INTR_CLEARERRS	(0x00007F18)	epic100.h
9550	INTR_ABNINTR	(INTR_CNTFULL \| INTR_TXUNDERRUN \| INTR_RXOVERFLOW)	epic100.h
9551	GC_SOFT_RESET	(0x00000001)	epic100.h
9552	GC_INTR_ENABLE	(0x00000002)	epic100.h
9553	GC_SOFT_INTR	(0x00000004)	epic100.h
9554	GC_POWER_DOWN	(0x00000008)	epic100.h
9555	GC_ONE_COPY	(0x00000010)	epic100.h
9556	GC_BIG_ENDIAN	(0x00000020)	epic100.h
9557	GC_RX_PREEMPT_TX	(0x00000040)	epic100.h
9558	GC_TX_PREEMPT_RX	(0x00000080)	epic100.h
9559	GC_RX_FIFO_THR_32	(0x00000000)	epic100.h
9560	GC_RX_FIFO_THR_64	(0x00000100)	epic100.h
9561	GC_RX_FIFO_THR_96	(0x00000200)	epic100.h
9562	GC_RX_FIFO_THR_128	(0x00000300)	epic100.h
9563	GC_MRC_MEM_READ	(0x00000000)	epic100.h
9564	GC_MRC_READ_MULT	(0x00000400)	epic100.h
9565	GC_MRC_READ_LINE	(0x00000800)	epic100.h
9566	GC_SOFTBIT0	(0x00001000)	epic100.h
9567	GC_SOFTBIT1	(0x00002000)	epic100.h
9568	GC_RESET_PHY	(0x00004000)	epic100.h
9569	RC_SAVE_ERRORED_PKT	(0x00000001)	epic100.h
9570	RC_SAVE_RUNT_FRAMES	(0x00000002)	epic100.h
9571	RC_RCV_BROADCAST	(0x00000004)	epic100.h
9572	RC_RCV_MULTICAST	(0x00000008)	epic100.h
9573	RC_RCV_INVERSE_PKT	(0x00000010)	epic100.h
9574	RC_PROMISCUOUS_MODE	(0x00000020)	epic100.h
9575	RC_MONITOR_MODE	(0x00000040)	epic100.h
9576	RC_EARLY_RCV_ENABLE	(0x00000080)	epic100.h
9577	RD_FRAGLIST	(0x0001)	epic100.h	Desc points to a fragment list
9578	RD_LLFORM	(0x0002)	epic100.h	Frag list format
9579	RD_HDR_CPY	(0x0004)	epic100.h	Desc used for header copy
9580	TC_EARLY_TX_ENABLE	(0x00000001)	epic100.h
9581	TC_LM_NORMAL	(0x00000000)	epic100.h
9582	TC_LM_INTERNAL	(0x00000002)	epic100.h
9583	TC_LM_EXTERNAL	(0x00000004)	epic100.h
9584	TC_LM_FULL_DPX	(0x00000006)	epic100.h
9585	TX_SLOT_TIME	(0x00000078)	epic100.h
9586	TX_FIFO_THRESH	128	epic100.h	Rounded down to 4 byte units.
9587	RRING_PKT_INTACT	(0x0001)	epic100.h
9588	RRING_ALIGN_ERR	(0x0002)	epic100.h
9589	RRING_CRC_ERR	(0x0004)	epic100.h
9590	RRING_MISSED_PKT	(0x0008)	epic100.h
9591	RRING_MULTICAST	(0x0010)	epic100.h
9592	RRING_BROADCAST	(0x0020)	epic100.h
9593	RRING_RECEIVER_DISABLE	(0x0040)	epic100.h
9594	RRING_STATUS_VALID	(0x1000)	epic100.h
9595	RRING_FRAGLIST_ERR	(0x2000)	epic100.h
9596	RRING_HDR_COPIED	(0x4000)	epic100.h
9597	RRING_OWN	(0x8000)	epic100.h
9598	RRING_ERROR	(RRING_ALIGN_ERR\|RRING_CRC_ERR)	epic100.h
9599	TRING_PKT_INTACT	(0x0001)	epic100.h	pkt transmitted.
9600	TRING_PKT_NONDEFER	(0x0002)	epic100.h	pkt xmitted w/o deferring
9601	TRING_COLL	(0x0004)	epic100.h	pkt xmitted w collisions
9602	TRING_CARR	(0x0008)	epic100.h	carrier sense lost
9603	TRING_UNDERRUN	(0x0010)	epic100.h	DMA underrun
9604	TRING_HB_COLL	(0x0020)	epic100.h	Collision detect Heartbeat
9605	TRING_WIN_COLL	(0x0040)	epic100.h	out of window collision
9606	TRING_DEFERRED	(0x0080)	epic100.h	Deferring
9607	TRING_COLL_COUNT	(0x0F00)	epic100.h	collision counter (mask)
9608	TRING_COLL_EXCESS	(0x1000)	epic100.h	tx aborted: excessive colls
9609	TRING_OWN	(0x8000)	epic100.h	desc ownership bit
9610	TRING_ABORT	(TRING_COLL_EXCESS\|TRING_WIN_COLL\|TRING_UNDERRUN)	epic100.h
9611	TRING_ERROR	(TRING_DEFERRED\|TRING_WIN_COLL\|TRING_UNDERRUN\|TRING_CARR )	epic100.h	\|TRING_COLL
9612	TD_FRAGLIST	(0x0001)	epic100.h	Desc points to a fragment list
9613	TD_LLFORM	(0x0002)	epic100.h	Frag list format
9614	TD_IAF	(0x0004)	epic100.h	Generate Interrupt after tx
9615	TD_NOCRC	(0x0008)	epic100.h	No CRC generated
9616	TD_LASTDESC	(0x0010)	epic100.h	Last desc for this frame
9617	EFAB_DUMMY_FIELD_LBN	0	etherfabric.h
9618	EFAB_DUMMY_FIELD_WIDTH	0	etherfabric.h
9619	EFAB_DWORD_0_LBN	0	etherfabric.h
9620	EFAB_DWORD_0_WIDTH	32	etherfabric.h
9621	EFAB_DWORD_1_LBN	32	etherfabric.h
9622	EFAB_DWORD_1_WIDTH	32	etherfabric.h
9623	EFAB_DWORD_2_LBN	64	etherfabric.h
9624	EFAB_DWORD_2_WIDTH	32	etherfabric.h
9625	EFAB_DWORD_3_LBN	96	etherfabric.h
9626	EFAB_DWORD_3_WIDTH	32	etherfabric.h
9627	EFAB_DWORD_FMT	"%08x"	etherfabric.h
9628	EFAB_QWORD_FMT	"%08x:%08x"	etherfabric.h
9629	EFAB_OWORD_FMT	"%08x:%08x:%08x:%08x"	etherfabric.h
9630	EFAB_OWORD_FIELD	EFAB_OWORD_FIELD64	etherfabric.h
9631	EFAB_QWORD_FIELD	EFAB_QWORD_FIELD64	etherfabric.h
9632	EFAB_OWORD_IS_ZERO	EFAB_OWORD_IS_ZERO64	etherfabric.h
9633	EFAB_QWORD_IS_ZERO	EFAB_QWORD_IS_ZERO64	etherfabric.h
9634	EFAB_OWORD_IS_ALL_ONES	EFAB_OWORD_IS_ALL_ONES64	etherfabric.h
9635	EFAB_QWORD_IS_ALL_ONES	EFAB_QWORD_IS_ALL_ONES64	etherfabric.h
9636	EFAB_OWORD_FIELD	EFAB_OWORD_FIELD32	etherfabric.h
9637	EFAB_QWORD_FIELD	EFAB_QWORD_FIELD32	etherfabric.h
9638	EFAB_OWORD_IS_ZERO	EFAB_OWORD_IS_ZERO32	etherfabric.h
9639	EFAB_QWORD_IS_ZERO	EFAB_QWORD_IS_ZERO32	etherfabric.h
9640	EFAB_OWORD_IS_ALL_ONES	EFAB_OWORD_IS_ALL_ONES32	etherfabric.h
9641	EFAB_QWORD_IS_ALL_ONES	EFAB_QWORD_IS_ALL_ONES32	etherfabric.h
9642	EFAB_POPULATE_OWORD	EFAB_POPULATE_OWORD64	etherfabric.h
9643	EFAB_POPULATE_QWORD	EFAB_POPULATE_QWORD64	etherfabric.h
9644	EFAB_POPULATE_OWORD	EFAB_POPULATE_OWORD32	etherfabric.h
9645	EFAB_POPULATE_QWORD	EFAB_POPULATE_QWORD32	etherfabric.h
9646	EFAB_POPULATE_OWORD_10	EFAB_POPULATE_OWORD	etherfabric.h
9647	EFAB_POPULATE_QWORD_10	EFAB_POPULATE_QWORD	etherfabric.h
9648	EFAB_POPULATE_DWORD_10	EFAB_POPULATE_DWORD	etherfabric.h
9649	EFAB_SET_OWORD_FIELD	EFAB_SET_OWORD_FIELD64	etherfabric.h
9650	EFAB_SET_QWORD_FIELD	EFAB_SET_QWORD_FIELD64	etherfabric.h
9651	EFAB_SET_OWORD_FIELD	EFAB_SET_OWORD_FIELD32	etherfabric.h
9652	EFAB_SET_QWORD_FIELD	EFAB_SET_QWORD_FIELD32	etherfabric.h
9653	DMA_ADDR_T_WIDTH	( 8 * sizeof ( dma_addr_t ) )	etherfabric.h
9654	EFAB_DMA_MAX_MASK	( ( DMA_ADDR_T_WIDTH == 64 ) ? \ ~( ( uint64_t ) 0 ) : ~( ( uint32_t ) 0 ) )	etherfabric.h
9655	dma_addr_t	unsigned long	etherfabric_nic.h
9656	EFAB_BUF_ALIGN	4096	etherfabric_nic.h
9657	EFAB_RXD_SIZE	512	etherfabric_nic.h
9658	EFAB_TXD_SIZE	512	etherfabric_nic.h
9659	EFAB_EVQ_SIZE	512	etherfabric_nic.h
9660	EFAB_NUM_RX_DESC	16	etherfabric_nic.h
9661	EFAB_RX_BUF_SIZE	1600	etherfabric_nic.h
9662	HFA384x_CMD_ALLOC_LEN_MIN	((UINT16)4)	hfa384x.h
9663	HFA384x_CMD_ALLOC_LEN_MAX	((UINT16)2400)	hfa384x.h
9664	HFA384x_BAP_DATALEN_MAX	((UINT16)4096)	hfa384x.h
9665	HFA384x_BAP_OFFSET_MAX	((UINT16)4096)	hfa384x.h
9666	HFA384x_PORTID_MAX	((UINT16)7)	hfa384x.h
9667	HFA384x_NUMPORTS_MAX	((UINT16)(HFA384x_PORTID_MAX+1))	hfa384x.h
9668	HFA384x_PDR_LEN_MAX	((UINT16)512)	hfa384x.h	in bytes, from EK
9669	HFA384x_PDA_RECS_MAX	((UINT16)200)	hfa384x.h	a guess
9670	HFA384x_PDA_LEN_MAX	((UINT16)1024)	hfa384x.h	in bytes, from EK
9671	HFA384x_SCANRESULT_MAX	((UINT16)31)	hfa384x.h
9672	HFA384x_HSCANRESULT_MAX	((UINT16)31)	hfa384x.h
9673	HFA384x_CHINFORESULT_MAX	((UINT16)16)	hfa384x.h
9674	HFA384x_DRVR_FIDSTACKLEN_MAX	(10)	hfa384x.h
9675	HFA384x_DRVR_TXBUF_MAX	(sizeof(hfa384x_tx_frame_t) + \ WLAN_DATA_MAXLEN - \ WLAN_WEP_IV_LEN - \ WLAN_WEP_ICV_LEN + 2)	hfa384x.h
9676	HFA384x_DRVR_MAGIC	(0x4a2d)	hfa384x.h
9677	HFA384x_INFODATA_MAXLEN	(sizeof(hfa384x_infodata_t))	hfa384x.h
9678	HFA384x_INFOFRM_MAXLEN	(sizeof(hfa384x_InfFrame_t))	hfa384x.h
9679	HFA384x_RID_GUESSING_MAXLEN	2048	hfa384x.h	I'm not really sure
9680	HFA384x_RIDDATA_MAXLEN	HFA384x_RID_GUESSING_MAXLEN	hfa384x.h
9681	HFA384x_USB_RWMEM_MAXLEN	2048	hfa384x.h
9682	HFA384x_BAP_PROC	((UINT16)0)	hfa384x.h
9683	HFA384x_BAP_INT	((UINT16)1)	hfa384x.h
9684	HFA384x_PORTTYPE_IBSS	((UINT16)0)	hfa384x.h
9685	HFA384x_PORTTYPE_BSS	((UINT16)1)	hfa384x.h
9686	HFA384x_PORTTYPE_WDS	((UINT16)2)	hfa384x.h
9687	HFA384x_PORTTYPE_PSUEDOIBSS	((UINT16)3)	hfa384x.h
9688	HFA384x_PORTTYPE_HOSTAP	((UINT16)6)	hfa384x.h
9689	HFA384x_WEPFLAGS_PRIVINVOKED	((UINT16)BIT0)	hfa384x.h
9690	HFA384x_WEPFLAGS_EXCLUDE	((UINT16)BIT1)	hfa384x.h
9691	HFA384x_WEPFLAGS_DISABLE_TXCRYP	((UINT16)BIT4)	hfa384x.h
9692	HFA384x_WEPFLAGS_DISABLE_RXCRYP	((UINT16)BIT7)	hfa384x.h
9693	HFA384x_WEPFLAGS_DISALLOW_MIXED	((UINT16)BIT11)	hfa384x.h
9694	HFA384x_WEPFLAGS_IV_INTERVAL1	((UINT16)0)	hfa384x.h
9695	HFA384x_WEPFLAGS_IV_INTERVAL10	((UINT16)BIT5)	hfa384x.h
9696	HFA384x_WEPFLAGS_IV_INTERVAL50	((UINT16)BIT6)	hfa384x.h
9697	HFA384x_WEPFLAGS_IV_INTERVAL100	((UINT16)(BIT5 \| BIT6))	hfa384x.h
9698	HFA384x_WEPFLAGS_FIRMWARE_WPA	((UINT16)BIT8)	hfa384x.h
9699	HFA384x_WEPFLAGS_HOST_MIC	((UINT16)BIT9)	hfa384x.h
9700	HFA384x_ROAMMODE_FWSCAN_FWROAM	((UINT16)1)	hfa384x.h
9701	HFA384x_ROAMMODE_FWSCAN_HOSTROA	((UINT16)2)	hfa384x.h
9702	HFA384x_ROAMMODE_HOSTSCAN_HOSTR	((UINT16)3)	hfa384x.h
9703	HFA384x_PORTSTATUS_DISABLED	((UINT16)1)	hfa384x.h
9704	HFA384x_PORTSTATUS_INITSRCH	((UINT16)2)	hfa384x.h
9705	HFA384x_PORTSTATUS_CONN_IBSS	((UINT16)3)	hfa384x.h
9706	HFA384x_PORTSTATUS_CONN_ESS	((UINT16)4)	hfa384x.h
9707	HFA384x_PORTSTATUS_OOR_ESS	((UINT16)5)	hfa384x.h
9708	HFA384x_PORTSTATUS_CONN_WDS	((UINT16)6)	hfa384x.h
9709	HFA384x_PORTSTATUS_HOSTAP	((UINT16)8)	hfa384x.h
9710	HFA384x_RATEBIT_1	((UINT16)1)	hfa384x.h
9711	HFA384x_RATEBIT_2	((UINT16)2)	hfa384x.h
9712	HFA384x_RATEBIT_5dot5	((UINT16)4)	hfa384x.h
9713	HFA384x_RATEBIT_11	((UINT16)8)	hfa384x.h
9714	HFA384x_TXCMD_NORECL	((UINT16)0)	hfa384x.h
9715	HFA384x_TXCMD_RECL	((UINT16)1)	hfa384x.h
9716	HFA384x_ADDR_AUX_OFF_MAX	((UINT16)0x007f)	hfa384x.h
9717	HFA384x_ADDR_FLAT_AUX_PAGE_MASK	(0x007fff80)	hfa384x.h
9718	HFA384x_ADDR_FLAT_AUX_OFF_MASK	(0x0000007f)	hfa384x.h
9719	HFA384x_ADDR_FLAT_CMD_PAGE_MASK	(0xffff0000)	hfa384x.h
9720	HFA384x_ADDR_FLAT_CMD_OFF_MASK	(0x0000ffff)	hfa384x.h
9721	HFA384x_ADDR_AUX_PAGE_MASK	(0xffff)	hfa384x.h
9722	HFA384x_ADDR_AUX_OFF_MASK	(0x007f)	hfa384x.h
9723	HFA384x_ADDR_CMD_PAGE_MASK	(0x007f)	hfa384x.h
9724	HFA384x_ADDR_CMD_OFF_MASK	(0xffff)	hfa384x.h
9725	HFA384x_AUX_CTL_EXTDS	(0x00)	hfa384x.h
9726	HFA384x_AUX_CTL_NV	(0x01)	hfa384x.h
9727	HFA384x_AUX_CTL_PHY	(0x02)	hfa384x.h
9728	HFA384x_AUX_CTL_ICSRAM	(0x03)	hfa384x.h
9729	HFA3842_PDA_BASE	(0x007f0000UL)	hfa384x.h
9730	HFA3841_PDA_BASE	(0x003f0000UL)	hfa384x.h
9731	HFA3841_PDA_BOGUS_BASE	(0x00390000UL)	hfa384x.h
9732	HFA384x_DLSTATE_DISABLED	0	hfa384x.h
9733	HFA384x_DLSTATE_RAMENABLED	1	hfa384x.h
9734	HFA384x_DLSTATE_FLASHENABLED	2	hfa384x.h
9735	HFA384x_DLSTATE_FLASHWRITTEN	3	hfa384x.h
9736	HFA384x_DLSTATE_FLASHWRITEPENDI	4	hfa384x.h
9737	HFA384x_DLSTATE_GENESIS	5	hfa384x.h
9738	HFA384x_CMD_OFF	(0x00)	hfa384x.h
9739	HFA384x_PARAM0_OFF	(0x02)	hfa384x.h
9740	HFA384x_PARAM1_OFF	(0x04)	hfa384x.h
9741	HFA384x_PARAM2_OFF	(0x06)	hfa384x.h
9742	HFA384x_STATUS_OFF	(0x08)	hfa384x.h
9743	HFA384x_RESP0_OFF	(0x0A)	hfa384x.h
9744	HFA384x_RESP1_OFF	(0x0C)	hfa384x.h
9745	HFA384x_RESP2_OFF	(0x0E)	hfa384x.h
9746	HFA384x_INFOFID_OFF	(0x10)	hfa384x.h
9747	HFA384x_RXFID_OFF	(0x20)	hfa384x.h
9748	HFA384x_ALLOCFID_OFF	(0x22)	hfa384x.h
9749	HFA384x_TXCOMPLFID_OFF	(0x24)	hfa384x.h
9750	HFA384x_SELECT0_OFF	(0x18)	hfa384x.h
9751	HFA384x_OFFSET0_OFF	(0x1C)	hfa384x.h
9752	HFA384x_DATA0_OFF	(0x36)	hfa384x.h
9753	HFA384x_SELECT1_OFF	(0x1A)	hfa384x.h
9754	HFA384x_OFFSET1_OFF	(0x1E)	hfa384x.h
9755	HFA384x_DATA1_OFF	(0x38)	hfa384x.h
9756	HFA384x_EVSTAT_OFF	(0x30)	hfa384x.h
9757	HFA384x_INTEN_OFF	(0x32)	hfa384x.h
9758	HFA384x_EVACK_OFF	(0x34)	hfa384x.h
9759	HFA384x_CONTROL_OFF	(0x14)	hfa384x.h
9760	HFA384x_SWSUPPORT0_OFF	(0x28)	hfa384x.h
9761	HFA384x_SWSUPPORT1_OFF	(0x2A)	hfa384x.h
9762	HFA384x_SWSUPPORT2_OFF	(0x2C)	hfa384x.h
9763	HFA384x_AUXPAGE_OFF	(0x3A)	hfa384x.h
9764	HFA384x_AUXOFFSET_OFF	(0x3C)	hfa384x.h
9765	HFA384x_AUXDATA_OFF	(0x3E)	hfa384x.h
9766	HFA384x_CMD_OFF	(0x00)	hfa384x.h
9767	HFA384x_PARAM0_OFF	(0x04)	hfa384x.h
9768	HFA384x_PARAM1_OFF	(0x08)	hfa384x.h
9769	HFA384x_PARAM2_OFF	(0x0c)	hfa384x.h
9770	HFA384x_STATUS_OFF	(0x10)	hfa384x.h
9771	HFA384x_RESP0_OFF	(0x14)	hfa384x.h
9772	HFA384x_RESP1_OFF	(0x18)	hfa384x.h
9773	HFA384x_RESP2_OFF	(0x1c)	hfa384x.h
9774	HFA384x_INFOFID_OFF	(0x20)	hfa384x.h
9775	HFA384x_RXFID_OFF	(0x40)	hfa384x.h
9776	HFA384x_ALLOCFID_OFF	(0x44)	hfa384x.h
9777	HFA384x_TXCOMPLFID_OFF	(0x48)	hfa384x.h
9778	HFA384x_SELECT0_OFF	(0x30)	hfa384x.h
9779	HFA384x_OFFSET0_OFF	(0x38)	hfa384x.h
9780	HFA384x_DATA0_OFF	(0x6c)	hfa384x.h
9781	HFA384x_SELECT1_OFF	(0x34)	hfa384x.h
9782	HFA384x_OFFSET1_OFF	(0x3c)	hfa384x.h
9783	HFA384x_DATA1_OFF	(0x70)	hfa384x.h
9784	HFA384x_EVSTAT_OFF	(0x60)	hfa384x.h
9785	HFA384x_INTEN_OFF	(0x64)	hfa384x.h
9786	HFA384x_EVACK_OFF	(0x68)	hfa384x.h
9787	HFA384x_CONTROL_OFF	(0x28)	hfa384x.h
9788	HFA384x_SWSUPPORT0_OFF	(0x50)	hfa384x.h
9789	HFA384x_SWSUPPORT1_OFF	(0x54)	hfa384x.h
9790	HFA384x_SWSUPPORT2_OFF	(0x58)	hfa384x.h
9791	HFA384x_AUXPAGE_OFF	(0x74)	hfa384x.h
9792	HFA384x_AUXOFFSET_OFF	(0x78)	hfa384x.h
9793	HFA384x_AUXDATA_OFF	(0x7c)	hfa384x.h
9794	HFA384x_PCICOR_OFF	(0x4c)	hfa384x.h
9795	HFA384x_PCIHCR_OFF	(0x5c)	hfa384x.h
9796	HFA384x_PCI_M0_ADDRH_OFF	(0x80)	hfa384x.h
9797	HFA384x_PCI_M0_ADDRL_OFF	(0x84)	hfa384x.h
9798	HFA384x_PCI_M0_LEN_OFF	(0x88)	hfa384x.h
9799	HFA384x_PCI_M0_CTL_OFF	(0x8c)	hfa384x.h
9800	HFA384x_PCI_STATUS_OFF	(0x98)	hfa384x.h
9801	HFA384x_PCI_M1_ADDRH_OFF	(0xa0)	hfa384x.h
9802	HFA384x_PCI_M1_ADDRL_OFF	(0xa4)	hfa384x.h
9803	HFA384x_PCI_M1_LEN_OFF	(0xa8)	hfa384x.h
9804	HFA384x_PCI_M1_CTL_OFF	(0xac)	hfa384x.h
9805	HFA384x_CMD_BUSY	((UINT16)BIT15)	hfa384x.h
9806	HFA384x_CMD_AINFO	((UINT16)(BIT14 \| BIT13 \| BIT12 \| BIT11 \| BIT10 \| BIT9 \| BIT8))	hfa384x.h
9807	HFA384x_CMD_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
9808	HFA384x_CMD_RECL	((UINT16)BIT8)	hfa384x.h
9809	HFA384x_CMD_WRITE	((UINT16)BIT8)	hfa384x.h
9810	HFA384x_CMD_PROGMODE	((UINT16)(BIT9 \| BIT8))	hfa384x.h
9811	HFA384x_CMD_CMDCODE	((UINT16)(BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1 \| BIT0))	hfa384x.h
9812	HFA384x_STATUS_RESULT	((UINT16)(BIT14 \| BIT13 \| BIT12 \| BIT11 \| BIT10 \| BIT9 \| BIT8))	hfa384x.h
9813	HFA384x_STATUS_CMDCODE	((UINT16)(BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1 \| BIT0))	hfa384x.h
9814	HFA384x_OFFSET_BUSY	((UINT16)BIT15)	hfa384x.h
9815	HFA384x_OFFSET_ERR	((UINT16)BIT14)	hfa384x.h
9816	HFA384x_OFFSET_DATAOFF	((UINT16)(BIT11 \| BIT10 \| BIT9 \| BIT8 \| BIT7 \| BIT6 \| BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1))	hfa384x.h
9817	HFA384x_EVSTAT_TICK	((UINT16)BIT15)	hfa384x.h
9818	HFA384x_EVSTAT_WTERR	((UINT16)BIT14)	hfa384x.h
9819	HFA384x_EVSTAT_INFDROP	((UINT16)BIT13)	hfa384x.h
9820	HFA384x_EVSTAT_INFO	((UINT16)BIT7)	hfa384x.h
9821	HFA384x_EVSTAT_DTIM	((UINT16)BIT5)	hfa384x.h
9822	HFA384x_EVSTAT_CMD	((UINT16)BIT4)	hfa384x.h
9823	HFA384x_EVSTAT_ALLOC	((UINT16)BIT3)	hfa384x.h
9824	HFA384x_EVSTAT_TXEXC	((UINT16)BIT2)	hfa384x.h
9825	HFA384x_EVSTAT_TX	((UINT16)BIT1)	hfa384x.h
9826	HFA384x_EVSTAT_RX	((UINT16)BIT0)	hfa384x.h
9827	HFA384x_INT_BAP_OP	(HFA384x_EVSTAT_INFO\|HFA384x_EVSTAT_RX\|HFA384x_EVSTAT_TX\|HFA384x_EVSTAT_TXEXC)	hfa384x.h
9828	HFA384x_INT_NORMAL	(HFA384x_EVSTAT_INFO\|HFA384x_EVSTAT_RX\|HFA384x_EVSTAT_TX\|HFA384x_EVSTAT_TXEXC\|HFA384x_EVSTAT_INFDROP\|HFA384x_EVSTAT_ALLOC\|HFA38	hfa384x.h
9829	HFA384x_INTEN_TICK	((UINT16)BIT15)	hfa384x.h
9830	HFA384x_INTEN_WTERR	((UINT16)BIT14)	hfa384x.h
9831	HFA384x_INTEN_INFDROP	((UINT16)BIT13)	hfa384x.h
9832	HFA384x_INTEN_INFO	((UINT16)BIT7)	hfa384x.h
9833	HFA384x_INTEN_DTIM	((UINT16)BIT5)	hfa384x.h
9834	HFA384x_INTEN_CMD	((UINT16)BIT4)	hfa384x.h
9835	HFA384x_INTEN_ALLOC	((UINT16)BIT3)	hfa384x.h
9836	HFA384x_INTEN_TXEXC	((UINT16)BIT2)	hfa384x.h
9837	HFA384x_INTEN_TX	((UINT16)BIT1)	hfa384x.h
9838	HFA384x_INTEN_RX	((UINT16)BIT0)	hfa384x.h
9839	HFA384x_EVACK_TICK	((UINT16)BIT15)	hfa384x.h
9840	HFA384x_EVACK_WTERR	((UINT16)BIT14)	hfa384x.h
9841	HFA384x_EVACK_INFDROP	((UINT16)BIT13)	hfa384x.h
9842	HFA384x_EVACK_INFO	((UINT16)BIT7)	hfa384x.h
9843	HFA384x_EVACK_DTIM	((UINT16)BIT5)	hfa384x.h
9844	HFA384x_EVACK_CMD	((UINT16)BIT4)	hfa384x.h
9845	HFA384x_EVACK_ALLOC	((UINT16)BIT3)	hfa384x.h
9846	HFA384x_EVACK_TXEXC	((UINT16)BIT2)	hfa384x.h
9847	HFA384x_EVACK_TX	((UINT16)BIT1)	hfa384x.h
9848	HFA384x_EVACK_RX	((UINT16)BIT0)	hfa384x.h
9849	HFA384x_CONTROL_AUXEN	((UINT16)(BIT15 \| BIT14))	hfa384x.h
9850	HFA384x_CMDCODE_INIT	((UINT16)0x00)	hfa384x.h
9851	HFA384x_CMDCODE_ENABLE	((UINT16)0x01)	hfa384x.h
9852	HFA384x_CMDCODE_DISABLE	((UINT16)0x02)	hfa384x.h
9853	HFA384x_CMDCODE_DIAG	((UINT16)0x03)	hfa384x.h
9854	HFA384x_CMDCODE_ALLOC	((UINT16)0x0A)	hfa384x.h
9855	HFA384x_CMDCODE_TX	((UINT16)0x0B)	hfa384x.h
9856	HFA384x_CMDCODE_CLRPRST	((UINT16)0x12)	hfa384x.h
9857	HFA384x_CMDCODE_NOTIFY	((UINT16)0x10)	hfa384x.h
9858	HFA384x_CMDCODE_INQ	((UINT16)0x11)	hfa384x.h
9859	HFA384x_CMDCODE_ACCESS	((UINT16)0x21)	hfa384x.h
9860	HFA384x_CMDCODE_DOWNLD	((UINT16)0x22)	hfa384x.h
9861	HFA384x_CMDCODE_MONITOR	((UINT16)(0x38))	hfa384x.h
9862	HFA384x_MONITOR_ENABLE	((UINT16)(0x0b))	hfa384x.h
9863	HFA384x_MONITOR_DISABLE	((UINT16)(0x0f))	hfa384x.h
9864	HFA384x_SUCCESS	((UINT16)(0x00))	hfa384x.h
9865	HFA384x_CARD_FAIL	((UINT16)(0x01))	hfa384x.h
9866	HFA384x_NO_BUFF	((UINT16)(0x05))	hfa384x.h
9867	HFA384x_CMD_ERR	((UINT16)(0x7F))	hfa384x.h
9868	HFA384x_PROGMODE_DISABLE	((UINT16)0x00)	hfa384x.h
9869	HFA384x_PROGMODE_RAM	((UINT16)0x01)	hfa384x.h
9870	HFA384x_PROGMODE_NV	((UINT16)0x02)	hfa384x.h
9871	HFA384x_PROGMODE_NVWRITE	((UINT16)0x03)	hfa384x.h
9872	HFA384x_AUXPW0	((UINT16)0xfe01)	hfa384x.h
9873	HFA384x_AUXPW1	((UINT16)0xdc23)	hfa384x.h
9874	HFA384x_AUXPW2	((UINT16)0xba45)	hfa384x.h
9875	HFA384x_CONTROL_AUX_ISDISABLED	((UINT16)0x0000)	hfa384x.h
9876	HFA384x_CONTROL_AUX_ISENABLED	((UINT16)0xc000)	hfa384x.h
9877	HFA384x_CONTROL_AUX_DOENABLE	((UINT16)0x8000)	hfa384x.h
9878	HFA384x_CONTROL_AUX_DODISABLE	((UINT16)0x4000)	hfa384x.h
9879	HFA384x_RID_CNFPORTTYPE	((UINT16)0xFC00)	hfa384x.h
9880	HFA384x_RID_CNFOWNMACADDR	((UINT16)0xFC01)	hfa384x.h
9881	HFA384x_RID_CNFDESIREDSSID	((UINT16)0xFC02)	hfa384x.h
9882	HFA384x_RID_CNFOWNCHANNEL	((UINT16)0xFC03)	hfa384x.h
9883	HFA384x_RID_CNFOWNSSID	((UINT16)0xFC04)	hfa384x.h
9884	HFA384x_RID_CNFOWNATIMWIN	((UINT16)0xFC05)	hfa384x.h
9885	HFA384x_RID_CNFSYSSCALE	((UINT16)0xFC06)	hfa384x.h
9886	HFA384x_RID_CNFMAXDATALEN	((UINT16)0xFC07)	hfa384x.h
9887	HFA384x_RID_CNFWDSADDR	((UINT16)0xFC08)	hfa384x.h
9888	HFA384x_RID_CNFPMENABLED	((UINT16)0xFC09)	hfa384x.h
9889	HFA384x_RID_CNFPMEPS	((UINT16)0xFC0A)	hfa384x.h
9890	HFA384x_RID_CNFMULTICASTRX	((UINT16)0xFC0B)	hfa384x.h
9891	HFA384x_RID_CNFMAXSLEEPDUR	((UINT16)0xFC0C)	hfa384x.h
9892	HFA384x_RID_CNFPMHOLDDUR	((UINT16)0xFC0D)	hfa384x.h
9893	HFA384x_RID_CNFOWNNAME	((UINT16)0xFC0E)	hfa384x.h
9894	HFA384x_RID_CNFOWNDTIMPER	((UINT16)0xFC10)	hfa384x.h
9895	HFA384x_RID_CNFWDSADDR1	((UINT16)0xFC11)	hfa384x.h
9896	HFA384x_RID_CNFWDSADDR2	((UINT16)0xFC12)	hfa384x.h
9897	HFA384x_RID_CNFWDSADDR3	((UINT16)0xFC13)	hfa384x.h
9898	HFA384x_RID_CNFWDSADDR4	((UINT16)0xFC14)	hfa384x.h
9899	HFA384x_RID_CNFWDSADDR5	((UINT16)0xFC15)	hfa384x.h
9900	HFA384x_RID_CNFWDSADDR6	((UINT16)0xFC16)	hfa384x.h
9901	HFA384x_RID_CNFMCASTPMBUFF	((UINT16)0xFC17)	hfa384x.h
9902	HFA384x_RID_CNFPORTTYPE_LEN	((UINT16)2)	hfa384x.h
9903	HFA384x_RID_CNFOWNMACADDR_LEN	((UINT16)6)	hfa384x.h
9904	HFA384x_RID_CNFDESIREDSSID_LEN	((UINT16)34)	hfa384x.h
9905	HFA384x_RID_CNFOWNCHANNEL_LEN	((UINT16)2)	hfa384x.h
9906	HFA384x_RID_CNFOWNSSID_LEN	((UINT16)34)	hfa384x.h
9907	HFA384x_RID_CNFOWNATIMWIN_LEN	((UINT16)2)	hfa384x.h
9908	HFA384x_RID_CNFSYSSCALE_LEN	((UINT16)0)	hfa384x.h
9909	HFA384x_RID_CNFMAXDATALEN_LEN	((UINT16)0)	hfa384x.h
9910	HFA384x_RID_CNFWDSADDR_LEN	((UINT16)6)	hfa384x.h
9911	HFA384x_RID_CNFPMENABLED_LEN	((UINT16)0)	hfa384x.h
9912	HFA384x_RID_CNFPMEPS_LEN	((UINT16)0)	hfa384x.h
9913	HFA384x_RID_CNFMULTICASTRX_LEN	((UINT16)0)	hfa384x.h
9914	HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)	hfa384x.h
9915	HFA384x_RID_CNFPMHOLDDUR_LEN	((UINT16)0)	hfa384x.h
9916	HFA384x_RID_CNFOWNNAME_LEN	((UINT16)34)	hfa384x.h
9917	HFA384x_RID_CNFOWNDTIMPER_LEN	((UINT16)0)	hfa384x.h
9918	HFA384x_RID_CNFWDSADDR1_LEN	((UINT16)6)	hfa384x.h
9919	HFA384x_RID_CNFWDSADDR2_LEN	((UINT16)6)	hfa384x.h
9920	HFA384x_RID_CNFWDSADDR3_LEN	((UINT16)6)	hfa384x.h
9921	HFA384x_RID_CNFWDSADDR4_LEN	((UINT16)6)	hfa384x.h
9922	HFA384x_RID_CNFWDSADDR5_LEN	((UINT16)6)	hfa384x.h
9923	HFA384x_RID_CNFWDSADDR6_LEN	((UINT16)6)	hfa384x.h
9924	HFA384x_RID_CNFMCASTPMBUFF_LEN	((UINT16)0)	hfa384x.h
9925	HFA384x_RID_CNFAUTHENTICATION_L	((UINT16)sizeof(UINT16))	hfa384x.h
9926	HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)	hfa384x.h
9927	HFA384x_RID_GROUPADDR	((UINT16)0xFC80)	hfa384x.h
9928	HFA384x_RID_CREATEIBSS	((UINT16)0xFC81)	hfa384x.h
9929	HFA384x_RID_FRAGTHRESH	((UINT16)0xFC82)	hfa384x.h
9930	HFA384x_RID_RTSTHRESH	((UINT16)0xFC83)	hfa384x.h
9931	HFA384x_RID_TXRATECNTL	((UINT16)0xFC84)	hfa384x.h
9932	HFA384x_RID_PROMISCMODE	((UINT16)0xFC85)	hfa384x.h
9933	HFA384x_RID_FRAGTHRESH0	((UINT16)0xFC90)	hfa384x.h
9934	HFA384x_RID_FRAGTHRESH1	((UINT16)0xFC91)	hfa384x.h
9935	HFA384x_RID_FRAGTHRESH2	((UINT16)0xFC92)	hfa384x.h
9936	HFA384x_RID_FRAGTHRESH3	((UINT16)0xFC93)	hfa384x.h
9937	HFA384x_RID_FRAGTHRESH4	((UINT16)0xFC94)	hfa384x.h
9938	HFA384x_RID_FRAGTHRESH5	((UINT16)0xFC95)	hfa384x.h
9939	HFA384x_RID_FRAGTHRESH6	((UINT16)0xFC96)	hfa384x.h
9940	HFA384x_RID_RTSTHRESH0	((UINT16)0xFC97)	hfa384x.h
9941	HFA384x_RID_RTSTHRESH1	((UINT16)0xFC98)	hfa384x.h
9942	HFA384x_RID_RTSTHRESH2	((UINT16)0xFC99)	hfa384x.h
9943	HFA384x_RID_RTSTHRESH3	((UINT16)0xFC9A)	hfa384x.h
9944	HFA384x_RID_RTSTHRESH4	((UINT16)0xFC9B)	hfa384x.h
9945	HFA384x_RID_RTSTHRESH5	((UINT16)0xFC9C)	hfa384x.h
9946	HFA384x_RID_RTSTHRESH6	((UINT16)0xFC9D)	hfa384x.h
9947	HFA384x_RID_TXRATECNTL0	((UINT16)0xFC9E)	hfa384x.h
9948	HFA384x_RID_TXRATECNTL1	((UINT16)0xFC9F)	hfa384x.h
9949	HFA384x_RID_TXRATECNTL2	((UINT16)0xFCA0)	hfa384x.h
9950	HFA384x_RID_TXRATECNTL3	((UINT16)0xFCA1)	hfa384x.h
9951	HFA384x_RID_TXRATECNTL4	((UINT16)0xFCA2)	hfa384x.h
9952	HFA384x_RID_TXRATECNTL5	((UINT16)0xFCA3)	hfa384x.h
9953	HFA384x_RID_TXRATECNTL6	((UINT16)0xFCA4)	hfa384x.h
9954	HFA384x_RID_GROUPADDR_LEN	((UINT16)16 * WLAN_ADDR_LEN)	hfa384x.h
9955	HFA384x_RID_CREATEIBSS_LEN	((UINT16)0)	hfa384x.h
9956	HFA384x_RID_FRAGTHRESH_LEN	((UINT16)0)	hfa384x.h
9957	HFA384x_RID_RTSTHRESH_LEN	((UINT16)0)	hfa384x.h
9958	HFA384x_RID_TXRATECNTL_LEN	((UINT16)4)	hfa384x.h
9959	HFA384x_RID_PROMISCMODE_LEN	((UINT16)2)	hfa384x.h
9960	HFA384x_RID_FRAGTHRESH0_LEN	((UINT16)0)	hfa384x.h
9961	HFA384x_RID_FRAGTHRESH1_LEN	((UINT16)0)	hfa384x.h
9962	HFA384x_RID_FRAGTHRESH2_LEN	((UINT16)0)	hfa384x.h
9963	HFA384x_RID_FRAGTHRESH3_LEN	((UINT16)0)	hfa384x.h
9964	HFA384x_RID_FRAGTHRESH4_LEN	((UINT16)0)	hfa384x.h
9965	HFA384x_RID_FRAGTHRESH5_LEN	((UINT16)0)	hfa384x.h
9966	HFA384x_RID_FRAGTHRESH6_LEN	((UINT16)0)	hfa384x.h
9967	HFA384x_RID_RTSTHRESH0_LEN	((UINT16)0)	hfa384x.h
9968	HFA384x_RID_RTSTHRESH1_LEN	((UINT16)0)	hfa384x.h
9969	HFA384x_RID_RTSTHRESH2_LEN	((UINT16)0)	hfa384x.h
9970	HFA384x_RID_RTSTHRESH3_LEN	((UINT16)0)	hfa384x.h
9971	HFA384x_RID_RTSTHRESH4_LEN	((UINT16)0)	hfa384x.h
9972	HFA384x_RID_RTSTHRESH5_LEN	((UINT16)0)	hfa384x.h
9973	HFA384x_RID_RTSTHRESH6_LEN	((UINT16)0)	hfa384x.h
9974	HFA384x_RID_TXRATECNTL0_LEN	((UINT16)0)	hfa384x.h
9975	HFA384x_RID_TXRATECNTL1_LEN	((UINT16)0)	hfa384x.h
9976	HFA384x_RID_TXRATECNTL2_LEN	((UINT16)0)	hfa384x.h
9977	HFA384x_RID_TXRATECNTL3_LEN	((UINT16)0)	hfa384x.h
9978	HFA384x_RID_TXRATECNTL4_LEN	((UINT16)0)	hfa384x.h
9979	HFA384x_RID_TXRATECNTL5_LEN	((UINT16)0)	hfa384x.h
9980	HFA384x_RID_TXRATECNTL6_LEN	((UINT16)0)	hfa384x.h
9981	HFA384x_RID_ITICKTIME	((UINT16)0xFCE0)	hfa384x.h
9982	HFA384x_RID_ITICKTIME_LEN	((UINT16)2)	hfa384x.h
9983	HFA384x_RID_MAXLOADTIME	((UINT16)0xFD00)	hfa384x.h
9984	HFA384x_RID_DOWNLOADBUFFER	((UINT16)0xFD01)	hfa384x.h
9985	HFA384x_RID_PRIIDENTITY	((UINT16)0xFD02)	hfa384x.h
9986	HFA384x_RID_PRISUPRANGE	((UINT16)0xFD03)	hfa384x.h
9987	HFA384x_RID_PRI_CFIACTRANGES	((UINT16)0xFD04)	hfa384x.h
9988	HFA384x_RID_NICSERIALNUMBER	((UINT16)0xFD0A)	hfa384x.h
9989	HFA384x_RID_NICIDENTITY	((UINT16)0xFD0B)	hfa384x.h
9990	HFA384x_RID_MFISUPRANGE	((UINT16)0xFD0C)	hfa384x.h
9991	HFA384x_RID_CFISUPRANGE	((UINT16)0xFD0D)	hfa384x.h
9992	HFA384x_RID_CHANNELLIST	((UINT16)0xFD10)	hfa384x.h
9993	HFA384x_RID_REGULATORYDOMAINS	((UINT16)0xFD11)	hfa384x.h
9994	HFA384x_RID_TEMPTYPE	((UINT16)0xFD12)	hfa384x.h
9995	HFA384x_RID_CIS	((UINT16)0xFD13)	hfa384x.h
9996	HFA384x_RID_STAIDENTITY	((UINT16)0xFD20)	hfa384x.h
9997	HFA384x_RID_STASUPRANGE	((UINT16)0xFD21)	hfa384x.h
9998	HFA384x_RID_STA_MFIACTRANGES	((UINT16)0xFD22)	hfa384x.h
9999	HFA384x_RID_STA_CFIACTRANGES	((UINT16)0xFD23)	hfa384x.h
10000	HFA384x_RID_BUILDSEQ	((UINT16)0xFFFE)	hfa384x.h
10001	HFA384x_RID_FWID	((UINT16)0xFFFF)	hfa384x.h
10002	HFA384x_RID_MAXLOADTIME_LEN	((UINT16)0)	hfa384x.h
10003	HFA384x_RID_DOWNLOADBUFFER_LEN	((UINT16)sizeof(hfa384x_downloadbuffer_t))	hfa384x.h
10004	HFA384x_RID_PRIIDENTITY_LEN	((UINT16)8)	hfa384x.h
10005	HFA384x_RID_PRISUPRANGE_LEN	((UINT16)10)	hfa384x.h
10006	HFA384x_RID_CFIACTRANGES_LEN	((UINT16)10)	hfa384x.h
10007	HFA384x_RID_NICSERIALNUMBER_LEN	((UINT16)12)	hfa384x.h
10008	HFA384x_RID_NICIDENTITY_LEN	((UINT16)8)	hfa384x.h
10009	HFA384x_RID_MFISUPRANGE_LEN	((UINT16)10)	hfa384x.h
10010	HFA384x_RID_CFISUPRANGE_LEN	((UINT16)10)	hfa384x.h
10011	HFA384x_RID_CHANNELLIST_LEN	((UINT16)0)	hfa384x.h
10012	HFA384x_RID_REGULATORYDOMAINS_L	((UINT16)12)	hfa384x.h
10013	HFA384x_RID_TEMPTYPE_LEN	((UINT16)0)	hfa384x.h
10014	HFA384x_RID_CIS_LEN	((UINT16)480)	hfa384x.h
10015	HFA384x_RID_STAIDENTITY_LEN	((UINT16)8)	hfa384x.h
10016	HFA384x_RID_STASUPRANGE_LEN	((UINT16)10)	hfa384x.h
10017	HFA384x_RID_MFIACTRANGES_LEN	((UINT16)10)	hfa384x.h
10018	HFA384x_RID_CFIACTRANGES2_LEN	((UINT16)10)	hfa384x.h
10019	HFA384x_RID_BUILDSEQ_LEN	((UINT16)sizeof(hfa384x_BuildSeq_t))	hfa384x.h
10020	HFA384x_RID_FWID_LEN	((UINT16)sizeof(hfa384x_FWID_t))	hfa384x.h
10021	HFA384x_RID_PORTSTATUS	((UINT16)0xFD40)	hfa384x.h
10022	HFA384x_RID_CURRENTSSID	((UINT16)0xFD41)	hfa384x.h
10023	HFA384x_RID_CURRENTBSSID	((UINT16)0xFD42)	hfa384x.h
10024	HFA384x_RID_COMMSQUALITY	((UINT16)0xFD43)	hfa384x.h
10025	HFA384x_RID_CURRENTTXRATE	((UINT16)0xFD44)	hfa384x.h
10026	HFA384x_RID_CURRENTBCNINT	((UINT16)0xFD45)	hfa384x.h
10027	HFA384x_RID_CURRENTSCALETHRESH	((UINT16)0xFD46)	hfa384x.h
10028	HFA384x_RID_PROTOCOLRSPTIME	((UINT16)0xFD47)	hfa384x.h
10029	HFA384x_RID_SHORTRETRYLIMIT	((UINT16)0xFD48)	hfa384x.h
10030	HFA384x_RID_LONGRETRYLIMIT	((UINT16)0xFD49)	hfa384x.h
10031	HFA384x_RID_MAXTXLIFETIME	((UINT16)0xFD4A)	hfa384x.h
10032	HFA384x_RID_MAXRXLIFETIME	((UINT16)0xFD4B)	hfa384x.h
10033	HFA384x_RID_CFPOLLABLE	((UINT16)0xFD4C)	hfa384x.h
10034	HFA384x_RID_AUTHALGORITHMS	((UINT16)0xFD4D)	hfa384x.h
10035	HFA384x_RID_PRIVACYOPTIMP	((UINT16)0xFD4F)	hfa384x.h
10036	HFA384x_RID_DBMCOMMSQUALITY	((UINT16)0xFD51)	hfa384x.h
10037	HFA384x_RID_CURRENTTXRATE1	((UINT16)0xFD80)	hfa384x.h
10038	HFA384x_RID_CURRENTTXRATE2	((UINT16)0xFD81)	hfa384x.h
10039	HFA384x_RID_CURRENTTXRATE3	((UINT16)0xFD82)	hfa384x.h
10040	HFA384x_RID_CURRENTTXRATE4	((UINT16)0xFD83)	hfa384x.h
10041	HFA384x_RID_CURRENTTXRATE5	((UINT16)0xFD84)	hfa384x.h
10042	HFA384x_RID_CURRENTTXRATE6	((UINT16)0xFD85)	hfa384x.h
10043	HFA384x_RID_OWNMACADDRESS	((UINT16)0xFD86)	hfa384x.h
10044	HFA384x_RID_SCANRESULTS	((UINT16)0xFD88)	hfa384x.h	NEW
10045	HFA384x_RID_HOSTSCANRESULTS	((UINT16)0xFD89)	hfa384x.h	NEW
10046	HFA384x_RID_AUTHENTICATIONUSED	((UINT16)0xFD8A)	hfa384x.h	NEW
10047	HFA384x_RID_ASSOCIATEFAILURE	((UINT16)0xFD8D)	hfa384x.h	1.8.0
10048	HFA384x_RID_PORTSTATUS_LEN	((UINT16)0)	hfa384x.h
10049	HFA384x_RID_CURRENTSSID_LEN	((UINT16)34)	hfa384x.h
10050	HFA384x_RID_CURRENTBSSID_LEN	((UINT16)WLAN_BSSID_LEN)	hfa384x.h
10051	HFA384x_RID_COMMSQUALITY_LEN	((UINT16)sizeof(hfa384x_commsquality_t))	hfa384x.h
10052	HFA384x_RID_DBMCOMMSQUALITY_LEN	((UINT16)sizeof(hfa384x_dbmcommsquality_t))	hfa384x.h
10053	HFA384x_RID_CURRENTTXRATE_LEN	((UINT16)0)	hfa384x.h
10054	HFA384x_RID_CURRENTBCNINT_LEN	((UINT16)0)	hfa384x.h
10055	HFA384x_RID_STACURSCALETHRESH_L	((UINT16)12)	hfa384x.h
10056	HFA384x_RID_APCURSCALETHRESH_LE	((UINT16)6)	hfa384x.h
10057	HFA384x_RID_PROTOCOLRSPTIME_LEN	((UINT16)0)	hfa384x.h
10058	HFA384x_RID_SHORTRETRYLIMIT_LEN	((UINT16)0)	hfa384x.h
10059	HFA384x_RID_LONGRETRYLIMIT_LEN	((UINT16)0)	hfa384x.h
10060	HFA384x_RID_MAXTXLIFETIME_LEN	((UINT16)0)	hfa384x.h
10061	HFA384x_RID_MAXRXLIFETIME_LEN	((UINT16)0)	hfa384x.h
10062	HFA384x_RID_CFPOLLABLE_LEN	((UINT16)0)	hfa384x.h
10063	HFA384x_RID_AUTHALGORITHMS_LEN	((UINT16)4)	hfa384x.h
10064	HFA384x_RID_PRIVACYOPTIMP_LEN	((UINT16)0)	hfa384x.h
10065	HFA384x_RID_CURRENTTXRATE1_LEN	((UINT16)0)	hfa384x.h
10066	HFA384x_RID_CURRENTTXRATE2_LEN	((UINT16)0)	hfa384x.h
10067	HFA384x_RID_CURRENTTXRATE3_LEN	((UINT16)0)	hfa384x.h
10068	HFA384x_RID_CURRENTTXRATE4_LEN	((UINT16)0)	hfa384x.h
10069	HFA384x_RID_CURRENTTXRATE5_LEN	((UINT16)0)	hfa384x.h
10070	HFA384x_RID_CURRENTTXRATE6_LEN	((UINT16)0)	hfa384x.h
10071	HFA384x_RID_OWNMACADDRESS_LEN	((UINT16)6)	hfa384x.h
10072	HFA384x_RID_PCFINFO_LEN	((UINT16)6)	hfa384x.h
10073	HFA384x_RID_CNFAPPCFINFO_LEN	((UINT16)sizeof(hfa384x_PCFInfo_data_t))	hfa384x.h
10074	HFA384x_RID_SCANREQUEST_LEN	((UINT16)sizeof(hfa384x_ScanRequest_data_t))	hfa384x.h
10075	HFA384x_RID_JOINREQUEST_LEN	((UINT16)sizeof(hfa384x_JoinRequest_data_t))	hfa384x.h
10076	HFA384x_RID_AUTHENTICATESTA_LEN	((UINT16)sizeof(hfa384x_authenticateStation_data_t))	hfa384x.h
10077	HFA384x_RID_CHANNELINFOREQUEST_	((UINT16)sizeof(hfa384x_ChannelInfoRequest_data_t))	hfa384x.h
10078	HFA384x_RID_PHYTYPE	((UINT16)0xFDC0)	hfa384x.h
10079	HFA384x_RID_CURRENTCHANNEL	((UINT16)0xFDC1)	hfa384x.h
10080	HFA384x_RID_CURRENTPOWERSTATE	((UINT16)0xFDC2)	hfa384x.h
10081	HFA384x_RID_CCAMODE	((UINT16)0xFDC3)	hfa384x.h
10082	HFA384x_RID_SUPPORTEDDATARATES	((UINT16)0xFDC6)	hfa384x.h
10083	HFA384x_RID_LFOSTATUS	((UINT16)0xFDC7)	hfa384x.h	1.7.1
10084	HFA384x_RID_PHYTYPE_LEN	((UINT16)0)	hfa384x.h
10085	HFA384x_RID_CURRENTCHANNEL_LEN	((UINT16)0)	hfa384x.h
10086	HFA384x_RID_CURRENTPOWERSTATE_L	((UINT16)0)	hfa384x.h
10087	HFA384x_RID_CCAMODE_LEN	((UINT16)0)	hfa384x.h
10088	HFA384x_RID_SUPPORTEDDATARATES_	((UINT16)10)	hfa384x.h
10089	HFA384x_RID_CNFWEPDEFAULTKEYID	((UINT16)0xFC23)	hfa384x.h
10090	HFA384x_RID_CNFWEPDEFAULTKEY0	((UINT16)0xFC24)	hfa384x.h
10091	HFA384x_RID_CNFWEPDEFAULTKEY1	((UINT16)0xFC25)	hfa384x.h
10092	HFA384x_RID_CNFWEPDEFAULTKEY2	((UINT16)0xFC26)	hfa384x.h
10093	HFA384x_RID_CNFWEPDEFAULTKEY3	((UINT16)0xFC27)	hfa384x.h
10094	HFA384x_RID_CNFWEPFLAGS	((UINT16)0xFC28)	hfa384x.h
10095	HFA384x_RID_CNFWEPKEYMAPTABLE	((UINT16)0xFC29)	hfa384x.h
10096	HFA384x_RID_CNFAUTHENTICATION	((UINT16)0xFC2A)	hfa384x.h
10097	HFA384x_RID_CNFMAXASSOCSTATIONS	((UINT16)0xFC2B)	hfa384x.h
10098	HFA384x_RID_CNFTXCONTROL	((UINT16)0xFC2C)	hfa384x.h
10099	HFA384x_RID_CNFROAMINGMODE	((UINT16)0xFC2D)	hfa384x.h
10100	HFA384x_RID_CNFHOSTAUTHASSOC	((UINT16)0xFC2E)	hfa384x.h
10101	HFA384x_RID_CNFRCVCRCERROR	((UINT16)0xFC30)	hfa384x.h
10102	HFA384x_RID_CNFALTRETRYCNT	((UINT16)0xFC32)	hfa384x.h
10103	HFA384x_RID_CNFAPBCNINT	((UINT16)0xFC33)	hfa384x.h
10104	HFA384x_RID_CNFAPPCFINFO	((UINT16)0xFC34)	hfa384x.h
10105	HFA384x_RID_CNFSTAPCFINFO	((UINT16)0xFC35)	hfa384x.h
10106	HFA384x_RID_CNFPRIORITYQUSAGE	((UINT16)0xFC37)	hfa384x.h
10107	HFA384x_RID_CNFTIMCTRL	((UINT16)0xFC40)	hfa384x.h
10108	HFA384x_RID_CNFTHIRTY2TALLY	((UINT16)0xFC42)	hfa384x.h
10109	HFA384x_RID_CNFENHSECURITY	((UINT16)0xFC43)	hfa384x.h
10110	HFA384x_RID_CNFDBMADJUST	((UINT16)0xFC46)	hfa384x.h	NEW
10111	HFA384x_RID_CNFWPADATA	((UINT16)0xFC48)	hfa384x.h	1.7.0
10112	HFA384x_RID_CNFPROPOGATIONDELAY	((UINT16)0xFC49)	hfa384x.h	1.7.6
10113	HFA384x_RID_CNFSHORTPREAMBLE	((UINT16)0xFCB0)	hfa384x.h
10114	HFA384x_RID_CNFEXCLONGPREAMBLE	((UINT16)0xFCB1)	hfa384x.h
10115	HFA384x_RID_CNFAUTHRSPTIMEOUT	((UINT16)0xFCB2)	hfa384x.h
10116	HFA384x_RID_CNFBASICRATES	((UINT16)0xFCB3)	hfa384x.h
10117	HFA384x_RID_CNFSUPPRATES	((UINT16)0xFCB4)	hfa384x.h
10118	HFA384x_RID_CNFFALLBACKCTRL	((UINT16)0xFCB5)	hfa384x.h	NEW
10119	HFA384x_RID_WEPKEYSTATUS	((UINT16)0xFCB6)	hfa384x.h	NEW
10120	HFA384x_RID_WEPKEYMAPINDEX	((UINT16)0xFCB7)	hfa384x.h	NEW
10121	HFA384x_RID_BROADCASTKEYID	((UINT16)0xFCB8)	hfa384x.h	NEW
10122	HFA384x_RID_ENTSECFLAGEYID	((UINT16)0xFCB9)	hfa384x.h	NEW
10123	HFA384x_RID_CNFPASSIVESCANCTRL	((UINT16)0xFCBA)	hfa384x.h	NEW STA
10124	HFA384x_RID_CNFWPAHANDLING	((UINT16)0xFCBB)	hfa384x.h	1.7.0
10125	HFA384x_RID_MDCCONTROL	((UINT16)0xFCBC)	hfa384x.h	1.7.0/1.4.0
10126	HFA384x_RID_MDCCOUNTRY	((UINT16)0xFCBD)	hfa384x.h	1.7.0/1.4.0
10127	HFA384x_RID_TXPOWERMAX	((UINT16)0xFCBE)	hfa384x.h	1.7.0/1.4.0
10128	HFA384x_RID_CNFLFOENBLED	((UINT16)0xFCBF)	hfa384x.h	1.6.3
10129	HFA384x_RID_CAPINFO	((UINT16)0xFCC0)	hfa384x.h	1.7.0/1.3.7
10130	HFA384x_RID_LISTENINTERVAL	((UINT16)0xFCC1)	hfa384x.h	1.7.0/1.3.7
10131	HFA384x_RID_DIVERSITYENABLED	((UINT16)0xFCC2)	hfa384x.h	1.7.0/1.3.7
10132	HFA384x_RID_LED_CONTROL	((UINT16)0xFCC4)	hfa384x.h	1.7.6
10133	HFA384x_RID_HFO_DELAY	((UINT16)0xFCC5)	hfa384x.h	1.7.6
10134	HFA384x_RID_DISSALOWEDBSSID	((UINT16)0xFCC6)	hfa384x.h	1.8.0
10135	HFA384x_RID_SCANREQUEST	((UINT16)0xFCE1)	hfa384x.h
10136	HFA384x_RID_JOINREQUEST	((UINT16)0xFCE2)	hfa384x.h
10137	HFA384x_RID_AUTHENTICATESTA	((UINT16)0xFCE3)	hfa384x.h
10138	HFA384x_RID_CHANNELINFOREQUEST	((UINT16)0xFCE4)	hfa384x.h
10139	HFA384x_RID_HOSTSCAN	((UINT16)0xFCE5)	hfa384x.h	NEW STA
10140	HFA384x_RID_ASSOCIATESTA	((UINT16)0xFCE6)	hfa384x.h
10141	HFA384x_RID_CNFWEPDEFAULTKEY_LE	((UINT16)6)	hfa384x.h
10142	HFA384x_RID_CNFWEP128DEFAULTKEY	((UINT16)14)	hfa384x.h
10143	HFA384x_RID_CNFPRIOQUSAGE_LEN	((UINT16)4)	hfa384x.h
10144	HFA384x_PDR_PCB_PARTNUM	((UINT16)0x0001)	hfa384x.h
10145	HFA384x_PDR_PDAVER	((UINT16)0x0002)	hfa384x.h
10146	HFA384x_PDR_NIC_SERIAL	((UINT16)0x0003)	hfa384x.h
10147	HFA384x_PDR_MKK_MEASUREMENTS	((UINT16)0x0004)	hfa384x.h
10148	HFA384x_PDR_NIC_RAMSIZE	((UINT16)0x0005)	hfa384x.h
10149	HFA384x_PDR_MFISUPRANGE	((UINT16)0x0006)	hfa384x.h
10150	HFA384x_PDR_CFISUPRANGE	((UINT16)0x0007)	hfa384x.h
10151	HFA384x_PDR_NICID	((UINT16)0x0008)	hfa384x.h
10152	HFA384x_PDR_MAC_ADDRESS	((UINT16)0x0101)	hfa384x.h
10153	HFA384x_PDR_REGDOMAIN	((UINT16)0x0103)	hfa384x.h
10154	HFA384x_PDR_ALLOWED_CHANNEL	((UINT16)0x0104)	hfa384x.h
10155	HFA384x_PDR_DEFAULT_CHANNEL	((UINT16)0x0105)	hfa384x.h
10156	HFA384x_PDR_TEMPTYPE	((UINT16)0x0107)	hfa384x.h
10157	HFA384x_PDR_IFR_SETTING	((UINT16)0x0200)	hfa384x.h
10158	HFA384x_PDR_RFR_SETTING	((UINT16)0x0201)	hfa384x.h
10159	HFA384x_PDR_HFA3861_BASELINE	((UINT16)0x0202)	hfa384x.h
10160	HFA384x_PDR_HFA3861_SHADOW	((UINT16)0x0203)	hfa384x.h
10161	HFA384x_PDR_HFA3861_IFRF	((UINT16)0x0204)	hfa384x.h
10162	HFA384x_PDR_HFA3861_CHCALSP	((UINT16)0x0300)	hfa384x.h
10163	HFA384x_PDR_HFA3861_CHCALI	((UINT16)0x0301)	hfa384x.h
10164	HFA384x_PDR_MAX_TX_POWER	((UINT16)0x0302)	hfa384x.h
10165	HFA384x_PDR_MASTER_CHAN_LIST	((UINT16)0x0303)	hfa384x.h
10166	HFA384x_PDR_3842_NIC_CONFIG	((UINT16)0x0400)	hfa384x.h
10167	HFA384x_PDR_USB_ID	((UINT16)0x0401)	hfa384x.h
10168	HFA384x_PDR_PCI_ID	((UINT16)0x0402)	hfa384x.h
10169	HFA384x_PDR_PCI_IFCONF	((UINT16)0x0403)	hfa384x.h
10170	HFA384x_PDR_PCI_PMCONF	((UINT16)0x0404)	hfa384x.h
10171	HFA384x_PDR_RFENRGY	((UINT16)0x0406)	hfa384x.h
10172	HFA384x_PDR_USB_POWER_TYPE	((UINT16)0x0407)	hfa384x.h
10173	HFA384x_PDR_USB_MAX_POWER	((UINT16)0x0409)	hfa384x.h
10174	HFA384x_PDR_USB_MANUFACTURER	((UINT16)0x0410)	hfa384x.h
10175	HFA384x_PDR_USB_PRODUCT	((UINT16)0x0411)	hfa384x.h
10176	HFA384x_PDR_ANT_DIVERSITY	((UINT16)0x0412)	hfa384x.h
10177	HFA384x_PDR_HFO_DELAY	((UINT16)0x0413)	hfa384x.h
10178	HFA384x_PDR_SCALE_THRESH	((UINT16)0x0414)	hfa384x.h
10179	HFA384x_PDR_HFA3861_MANF_TESTSP	((UINT16)0x0900)	hfa384x.h
10180	HFA384x_PDR_HFA3861_MANF_TESTI	((UINT16)0x0901)	hfa384x.h
10181	HFA384x_PDR_END_OF_PDA	((UINT16)0x0000)	hfa384x.h
10182	HFA384x_CMD	HFA384x_CMD_OFF	hfa384x.h
10183	HFA384x_PARAM0	HFA384x_PARAM0_OFF	hfa384x.h
10184	HFA384x_PARAM1	HFA384x_PARAM1_OFF	hfa384x.h
10185	HFA384x_PARAM2	HFA384x_PARAM2_OFF	hfa384x.h
10186	HFA384x_STATUS	HFA384x_STATUS_OFF	hfa384x.h
10187	HFA384x_RESP0	HFA384x_RESP0_OFF	hfa384x.h
10188	HFA384x_RESP1	HFA384x_RESP1_OFF	hfa384x.h
10189	HFA384x_RESP2	HFA384x_RESP2_OFF	hfa384x.h
10190	HFA384x_INFOFID	HFA384x_INFOFID_OFF	hfa384x.h
10191	HFA384x_RXFID	HFA384x_RXFID_OFF	hfa384x.h
10192	HFA384x_ALLOCFID	HFA384x_ALLOCFID_OFF	hfa384x.h
10193	HFA384x_TXCOMPLFID	HFA384x_TXCOMPLFID_OFF	hfa384x.h
10194	HFA384x_SELECT0	HFA384x_SELECT0_OFF	hfa384x.h
10195	HFA384x_OFFSET0	HFA384x_OFFSET0_OFF	hfa384x.h
10196	HFA384x_DATA0	HFA384x_DATA0_OFF	hfa384x.h
10197	HFA384x_SELECT1	HFA384x_SELECT1_OFF	hfa384x.h
10198	HFA384x_OFFSET1	HFA384x_OFFSET1_OFF	hfa384x.h
10199	HFA384x_DATA1	HFA384x_DATA1_OFF	hfa384x.h
10200	HFA384x_EVSTAT	HFA384x_EVSTAT_OFF	hfa384x.h
10201	HFA384x_INTEN	HFA384x_INTEN_OFF	hfa384x.h
10202	HFA384x_EVACK	HFA384x_EVACK_OFF	hfa384x.h
10203	HFA384x_CONTROL	HFA384x_CONTROL_OFF	hfa384x.h
10204	HFA384x_SWSUPPORT0	HFA384x_SWSUPPORT0_OFF	hfa384x.h
10205	HFA384x_SWSUPPORT1	HFA384x_SWSUPPORT1_OFF	hfa384x.h
10206	HFA384x_SWSUPPORT2	HFA384x_SWSUPPORT2_OFF	hfa384x.h
10207	HFA384x_AUXPAGE	HFA384x_AUXPAGE_OFF	hfa384x.h
10208	HFA384x_AUXOFFSET	HFA384x_AUXOFFSET_OFF	hfa384x.h
10209	HFA384x_AUXDATA	HFA384x_AUXDATA_OFF	hfa384x.h
10210	HFA384x_PCICOR	HFA384x_PCICOR_OFF	hfa384x.h
10211	HFA384x_PCIHCR	HFA384x_PCIHCR_OFF	hfa384x.h
10212	HFA384x_STATE_PREINIT	0	hfa384x.h
10213	HFA384x_STATE_INIT	1	hfa384x.h
10214	HFA384x_STATE_RUNNING	2	hfa384x.h
10215	HFA384x_HOSTAUTHASSOC_HOSTAUTH	BIT0	hfa384x.h
10216	HFA384x_HOSTAUTHASSOC_HOSTASSOC	BIT1	hfa384x.h
10217	HFA384x_WHAHANDLING_DISABLED	0	hfa384x.h
10218	HFA384x_WHAHANDLING_PASSTHROUGH	BIT1	hfa384x.h
10219	HFA384x_CNFAUTHENTICATION_OPENS	0x0001	hfa384x.h
10220	HFA384x_CNFAUTHENTICATION_SHARE	0x0002	hfa384x.h
10221	HFA384x_CNFAUTHENTICATION_LEAP	0x0004	hfa384x.h
10222	HFA384x_CREATEIBSS_JOINCREATEIB	0	hfa384x.h
10223	HFA384x_CREATEIBSS_JOINESS_JOIN	1	hfa384x.h
10224	HFA384x_CREATEIBSS_JOINIBSS	2	hfa384x.h
10225	HFA384x_CREATEIBSS_JOINESS_JOIN	3	hfa384x.h
10226	HFA384x_FWID_LEN	14	hfa384x.h
10227	HFA384x_PSTATUS_DISABLED	((UINT16)1)	hfa384x.h
10228	HFA384x_PSTATUS_SEARCHING	((UINT16)2)	hfa384x.h
10229	HFA384x_PSTATUS_CONN_IBSS	((UINT16)3)	hfa384x.h
10230	HFA384x_PSTATUS_CONN_ESS	((UINT16)4)	hfa384x.h
10231	HFA384x_PSTATUS_OUTOFRANGE	((UINT16)5)	hfa384x.h
10232	HFA384x_PSTATUS_CONN_WDS	((UINT16)6)	hfa384x.h
10233	HFA384x_TESTRESULT_ALLPASSED	BIT0	hfa384x.h
10234	HFA384x_TESTRESULT_LFO_FAIL	BIT1	hfa384x.h
10235	HFA384x_TESTRESULT_VR_HF0_FAIL	BIT2	hfa384x.h
10236	HFA384x_HOST_FIRM_COORDINATE	BIT7	hfa384x.h
10237	HFA384x_TESTRESULT_COORDINATE	BIT15	hfa384x.h
10238	HFA384x_FD_STATUS_OFF	((UINT16)0x44)	hfa384x.h
10239	HFA384x_FD_TIME_OFF	((UINT16)0x46)	hfa384x.h
10240	HFA384x_FD_SWSUPPORT_OFF	((UINT16)0x4A)	hfa384x.h
10241	HFA384x_FD_SILENCE_OFF	((UINT16)0x4A)	hfa384x.h
10242	HFA384x_FD_SIGNAL_OFF	((UINT16)0x4B)	hfa384x.h
10243	HFA384x_FD_RATE_OFF	((UINT16)0x4C)	hfa384x.h
10244	HFA384x_FD_RXFLOW_OFF	((UINT16)0x4D)	hfa384x.h
10245	HFA384x_FD_RESERVED_OFF	((UINT16)0x4E)	hfa384x.h
10246	HFA384x_FD_TXCONTROL_OFF	((UINT16)0x50)	hfa384x.h
10247	HFA384x_FD_FRAMECONTROL_OFF	((UINT16)0x52)	hfa384x.h
10248	HFA384x_FD_DURATIONID_OFF	((UINT16)0x54)	hfa384x.h
10249	HFA384x_FD_ADDRESS1_OFF	((UINT16)0x56)	hfa384x.h
10250	HFA384x_FD_ADDRESS2_OFF	((UINT16)0x5C)	hfa384x.h
10251	HFA384x_FD_ADDRESS3_OFF	((UINT16)0x62)	hfa384x.h
10252	HFA384x_FD_SEQCONTROL_OFF	((UINT16)0x68)	hfa384x.h
10253	HFA384x_FD_ADDRESS4_OFF	((UINT16)0x6A)	hfa384x.h
10254	HFA384x_FD_DATALEN_OFF	((UINT16)0x70)	hfa384x.h
10255	HFA384x_FD_DESTADDRESS_OFF	((UINT16)0x72)	hfa384x.h
10256	HFA384x_FD_SRCADDRESS_OFF	((UINT16)0x78)	hfa384x.h
10257	HFA384x_FD_DATALENGTH_OFF	((UINT16)0x7E)	hfa384x.h
10258	HFA384x_TXSTATUS_ACKERR	((UINT16)BIT5)	hfa384x.h
10259	HFA384x_TXSTATUS_FORMERR	((UINT16)BIT3)	hfa384x.h
10260	HFA384x_TXSTATUS_DISCON	((UINT16)BIT2)	hfa384x.h
10261	HFA384x_TXSTATUS_AGEDERR	((UINT16)BIT1)	hfa384x.h
10262	HFA384x_TXSTATUS_RETRYERR	((UINT16)BIT0)	hfa384x.h
10263	HFA384x_TX_CFPOLL	((UINT16)BIT12)	hfa384x.h
10264	HFA384x_TX_PRST	((UINT16)BIT11)	hfa384x.h
10265	HFA384x_TX_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
10266	HFA384x_TX_NOENCRYPT	((UINT16)BIT7)	hfa384x.h
10267	HFA384x_TX_RETRYSTRAT	((UINT16)(BIT6 \| BIT5))	hfa384x.h
10268	HFA384x_TX_STRUCTYPE	((UINT16)(BIT4 \| BIT3))	hfa384x.h
10269	HFA384x_TX_TXEX	((UINT16)BIT2)	hfa384x.h
10270	HFA384x_TX_TXOK	((UINT16)BIT1)	hfa384x.h
10271	HFA384x_RX_DATA_LEN_OFF	((UINT16)44)	hfa384x.h
10272	HFA384x_RX_80211HDR_OFF	((UINT16)14)	hfa384x.h
10273	HFA384x_RX_DATA_OFF	((UINT16)60)	hfa384x.h
10274	HFA384x_RXSTATUS_MSGTYPE	((UINT16)(BIT15 \| BIT14 \| BIT13))	hfa384x.h
10275	HFA384x_RXSTATUS_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
10276	HFA384x_RXSTATUS_UNDECR	((UINT16)BIT1)	hfa384x.h
10277	HFA384x_RXSTATUS_FCSERR	((UINT16)BIT0)	hfa384x.h
10278	HFA384x_IT_HANDOVERADDR	((UINT16)0xF000UL)	hfa384x.h
10279	HFA384x_IT_HANDOVERDEAUTHADDRES	((UINT16)0xF001UL)	hfa384x.h	AP 1.3.7
10280	HFA384x_IT_COMMTALLIES	((UINT16)0xF100UL)	hfa384x.h
10281	HFA384x_IT_SCANRESULTS	((UINT16)0xF101UL)	hfa384x.h
10282	HFA384x_IT_CHINFORESULTS	((UINT16)0xF102UL)	hfa384x.h
10283	HFA384x_IT_HOSTSCANRESULTS	((UINT16)0xF103UL)	hfa384x.h
10284	HFA384x_IT_LINKSTATUS	((UINT16)0xF200UL)	hfa384x.h
10285	HFA384x_IT_ASSOCSTATUS	((UINT16)0xF201UL)	hfa384x.h
10286	HFA384x_IT_AUTHREQ	((UINT16)0xF202UL)	hfa384x.h
10287	HFA384x_IT_PSUSERCNT	((UINT16)0xF203UL)	hfa384x.h
10288	HFA384x_IT_KEYIDCHANGED	((UINT16)0xF204UL)	hfa384x.h
10289	HFA384x_IT_ASSOCREQ	((UINT16)0xF205UL)	hfa384x.h
10290	HFA384x_IT_MICFAILURE	((UINT16)0xF206UL)	hfa384x.h
10291	HFA384x_CHINFORESULT_BSSACTIVE	BIT0	hfa384x.h
10292	HFA384x_CHINFORESULT_PCFACTIVE	BIT1	hfa384x.h
10293	HFA384x_LINK_NOTCONNECTED	((UINT16)0)	hfa384x.h
10294	HFA384x_LINK_CONNECTED	((UINT16)1)	hfa384x.h
10295	HFA384x_LINK_DISCONNECTED	((UINT16)2)	hfa384x.h
10296	HFA384x_LINK_AP_CHANGE	((UINT16)3)	hfa384x.h
10297	HFA384x_LINK_AP_OUTOFRANGE	((UINT16)4)	hfa384x.h
10298	HFA384x_LINK_AP_INRANGE	((UINT16)5)	hfa384x.h
10299	HFA384x_LINK_ASSOCFAIL	((UINT16)6)	hfa384x.h
10300	HFA384x_ASSOCSTATUS_STAASSOC	((UINT16)1)	hfa384x.h
10301	HFA384x_ASSOCSTATUS_REASSOC	((UINT16)2)	hfa384x.h
10302	HFA384x_ASSOCSTATUS_DISASSOC	((UINT16)3)	hfa384x.h
10303	HFA384x_ASSOCSTATUS_ASSOCFAIL	((UINT16)4)	hfa384x.h
10304	HFA384x_ASSOCSTATUS_AUTHFAIL	((UINT16)5)	hfa384x.h
10305	HFA384x_ASSOCREQ_TYPE_ASSOC	0	hfa384x.h
10306	HFA384x_ASSOCREQ_TYPE_REASSOC	1	hfa384x.h
10307	HFA384x_USB_ENBULKIN	6	hfa384x.h
10308	HFA384x_USB_TXFRM	0	hfa384x.h
10309	HFA384x_USB_CMDREQ	1	hfa384x.h
10310	HFA384x_USB_WRIDREQ	2	hfa384x.h
10311	HFA384x_USB_RRIDREQ	3	hfa384x.h
10312	HFA384x_USB_WMEMREQ	4	hfa384x.h
10313	HFA384x_USB_RMEMREQ	5	hfa384x.h
10314	HFA384x_USB_INFOFRM	0x8000	hfa384x.h
10315	HFA384x_USB_CMDRESP	0x8001	hfa384x.h
10316	HFA384x_USB_WRIDRESP	0x8002	hfa384x.h
10317	HFA384x_USB_RRIDRESP	0x8003	hfa384x.h
10318	HFA384x_USB_WMEMRESP	0x8004	hfa384x.h
10319	HFA384x_USB_RMEMRESP	0x8005	hfa384x.h
10320	HFA384x_USB_BUFAVAIL	0x8006	hfa384x.h
10321	HFA384x_USB_ERROR	0x8007	hfa384x.h
10322	MAX_PRISM2_GRP_ADDR	16	hfa384x.h
10323	MAX_GRP_ADDR	32	hfa384x.h
10324	WLAN_COMMENT_MAX	80	hfa384x.h	Max. length of user comment string.
10325	MM_SAT_PCF	(BIT14)	hfa384x.h
10326	MM_GCSD_PCF	(BIT15)	hfa384x.h
10327	MM_GCSD_PCF_EB	(BIT14 \| BIT15)	hfa384x.h
10328	WLAN_STATE_STOPPED	0	hfa384x.h	Network is not active.
10329	WLAN_STATE_STARTED	1	hfa384x.h	Network has been started.
10330	WLAN_AUTH_MAX	60	hfa384x.h	Max. # of authenticated stations.
10331	WLAN_ACCESS_MAX	60	hfa384x.h	Max. # of stations in an access list.
10332	WLAN_ACCESS_NONE	0	hfa384x.h	No stations may be authenticated.
10333	WLAN_ACCESS_ALL	1	hfa384x.h	All stations may be authenticated.
10334	WLAN_ACCESS_ALLOW	2	hfa384x.h	Authenticate only "allowed" stations.
10335	WLAN_ACCESS_DENY	3	hfa384x.h	Do not authenticate "denied" stations.
10336	hfa384x_getreg	__hfa384x_getreg_noswap	hfa384x.h
10337	hfa384x_setreg	__hfa384x_setreg_noswap	hfa384x.h
10338	hfa384x_getreg_noswap	__hfa384x_getreg	hfa384x.h
10339	hfa384x_setreg_noswap	__hfa384x_setreg	hfa384x.h
10340	hfa384x_getreg	__hfa384x_getreg	hfa384x.h
10341	hfa384x_setreg	__hfa384x_setreg	hfa384x.h
10342	hfa384x_getreg_noswap	__hfa384x_getreg_noswap	hfa384x.h
10343	hfa384x_setreg_noswap	__hfa384x_setreg_noswap	hfa384x.h
10344	MTNIC_MAX_PORTS	2	mtnic.h
10345	MTNIC_PORT1	0	mtnic.h
10346	MTNIC_PORT2	1	mtnic.h
10347	NUM_TX_RINGS	1	mtnic.h
10348	NUM_RX_RINGS	1	mtnic.h
10349	NUM_CQS	(NUM_RX_RINGS + NUM_TX_RINGS)	mtnic.h
10350	GO_BIT_TIMEOUT	6000	mtnic.h
10351	TBIT_RETRIES	100	mtnic.h
10352	UNITS_BUFFER_SIZE	8	mtnic.h	can be configured to 4/8/16
10353	MAX_GAP_PROD_CONS	( UNITS_BUFFER_SIZE / 4 )	mtnic.h
10354	ETH_DEF_LEN	1540	mtnic.h	40 bytes used by the card
10355	ETH_FCS_LEN	14	mtnic.h
10356	DEF_MTU	ETH_DEF_LEN + ETH_FCS_LEN	mtnic.h
10357	DEF_IOBUF_SIZE	ETH_DEF_LEN	mtnic.h
10358	MAC_ADDRESS_SIZE	6	mtnic.h
10359	NUM_EQES	16	mtnic.h
10360	ROUND_TO_CHECK	0x400	mtnic.h
10361	DELAY_LINK_CHECK	300	mtnic.h
10362	CHECK_LINK_TIMES	7	mtnic.h
10363	dma_addr_t	unsigned long	mtnic.h
10364	PAGE_SIZE	4096	mtnic.h
10365	PAGE_MASK	(PAGE_SIZE - 1)	mtnic.h
10366	MTNIC_MAILBOX_SIZE	PAGE_SIZE	mtnic.h
10367	MTNIC_RESET_OFFSET	0xF0010	mtnic.h
10368	MXGEFW_VERSION_MAJOR	1	myri10ge_mcp.h
10369	MXGEFW_VERSION_MINOR	4	myri10ge_mcp.h
10370	MXGEFW_RSS_HASH_NULL	(0 << 14)	myri10ge_mcp.h	bit 15:14 = 00
10371	MXGEFW_RSS_HASH_IPV4	(1 << 14)	myri10ge_mcp.h	bit 15:14 = 01
10372	MXGEFW_RSS_HASH_TCP_IPV4	(2 << 14)	myri10ge_mcp.h	bit 15:14 = 10
10373	MXGEFW_RSS_HASH_MASK	(3 << 14)	myri10ge_mcp.h	bit 15:14 = 11
10374	MXGEFW_FLAGS_SMALL	0x1	myri10ge_mcp.h
10375	MXGEFW_FLAGS_TSO_HDR	0x1	myri10ge_mcp.h
10376	MXGEFW_FLAGS_FIRST	0x2	myri10ge_mcp.h
10377	MXGEFW_FLAGS_ALIGN_ODD	0x4	myri10ge_mcp.h
10378	MXGEFW_FLAGS_CKSUM	0x8	myri10ge_mcp.h
10379	MXGEFW_FLAGS_TSO_LAST	0x8	myri10ge_mcp.h
10380	MXGEFW_FLAGS_NO_TSO	0x10	myri10ge_mcp.h
10381	MXGEFW_FLAGS_TSO_CHOP	0x10	myri10ge_mcp.h
10382	MXGEFW_FLAGS_TSO_PLD	0x20	myri10ge_mcp.h
10383	MXGEFW_SEND_SMALL_SIZE	1520	myri10ge_mcp.h
10384	MXGEFW_MAX_MTU	9400	myri10ge_mcp.h
10385	MXGEFW_MAX_SEND_DESC	12	myri10ge_mcp.h
10386	MXGEFW_PAD	2	myri10ge_mcp.h
10387	MXGEFW_BOOT_HANDOFF	0xfc0000	myri10ge_mcp.h
10388	MXGEFW_BOOT_DUMMY_RDMA	0xfc01c0	myri10ge_mcp.h
10389	MXGEFW_ETH_CMD	0xf80000	myri10ge_mcp.h
10390	MXGEFW_ETH_SEND_4	0x200000	myri10ge_mcp.h
10391	MXGEFW_ETH_SEND_1	0x240000	myri10ge_mcp.h
10392	MXGEFW_ETH_SEND_2	0x280000	myri10ge_mcp.h
10393	MXGEFW_ETH_SEND_3	0x2c0000	myri10ge_mcp.h
10394	MXGEFW_ETH_RECV_SMALL	0x300000	myri10ge_mcp.h
10395	MXGEFW_ETH_RECV_BIG	0x340000	myri10ge_mcp.h
10396	MXGEFW_ETH_SEND_GO	0x380000	myri10ge_mcp.h
10397	MXGEFW_ETH_SEND_STOP	0x3C0000	myri10ge_mcp.h
10398	MXGEFW_OLD_IRQ_DATA_LEN	40	myri10ge_mcp.h
10399	MXGEFW_NETQ_FILTERTYPE_NONE	0	myri10ge_mcp.h
10400	MXGEFW_NETQ_FILTERTYPE_MACADDR	1	myri10ge_mcp.h
10401	MXGEFW_NETQ_FILTERTYPE_VLAN	2	myri10ge_mcp.h
10402	MXGEFW_NETQ_FILTERTYPE_VLANMACA	3	myri10ge_mcp.h
10403	NATSEMI_HW_TIMEOUT	400	natsemi.h
10404	TX_RING_SIZE	4	natsemi.h
10405	NUM_RX_DESC	4	natsemi.h
10406	RX_BUF_SIZE	1536	natsemi.h
10407	OWN	0x80000000	natsemi.h
10408	DSIZE	0x00000FFF	natsemi.h
10409	CRC_SIZE	4	natsemi.h
10410	PHYID_AM79C874	0x0022561b	natsemi.h
10411	SRR_DP83815_C	0x0302	natsemi.h
10412	SRR_DP83815_D	0x0403	natsemi.h
10413	SRR_DP83816_A4	0x0504	natsemi.h
10414	SRR_DP83816_A5	0x0505	natsemi.h
10415	PMDCSR_VAL	0x189c	natsemi.h	enable preferred adaptation circuitry
10416	TSTDAT_VAL	0x0	natsemi.h
10417	DSPCFG_VAL	0x5040	natsemi.h
10418	SDCFG_VAL	0x008c	natsemi.h	set voltage thresholds for Signal Detect
10419	DSPCFG_LOCK	0x20	natsemi.h	coefficient lock bit in DSPCFG
10420	DSPCFG_COEF	0x1000	natsemi.h	see coefficient (in TSTDAT) bit in DSPCFG
10421	TSTDAT_FIXED	0xe8	natsemi.h	magic number for bad coefficients
10422	CFG_RESET_SAVE	0xfde000	natsemi.h
10423	WCSR_RESET_SAVE	0x61f	natsemi.h
10424	RFCR_RESET_SAVE	0xf8500000;	natsemi.h
10425	EE_Write0	(EE_ChipSelect)	natsemi.h
10426	EE_Write1	(EE_ChipSelect \| EE_DataIn)	natsemi.h
10427	EE_CS	0x08	natsemi.h	EEPROM chip select
10428	EE_SK	0x04	natsemi.h	EEPROM shift clock
10429	EE_DI	0x01	natsemi.h	Data in
10430	EE_DO	0x02	natsemi.h	Data out
10431	EE_MAC	7	natsemi.h
10432	EE_REG	EECtrl	natsemi.h
10433	VENDOR_NONE	0	ns8390.h
10434	VENDOR_WD	1	ns8390.h
10435	VENDOR_NOVELL	2	ns8390.h
10436	VENDOR_3COM	3	ns8390.h
10437	FLAG_PIO	0x01	ns8390.h
10438	FLAG_16BIT	0x02	ns8390.h
10439	FLAG_790	0x04	ns8390.h
10440	MEM_8192	32	ns8390.h
10441	MEM_16384	64	ns8390.h
10442	MEM_32768	128	ns8390.h
10443	ISA_MAX_ADDR	0x400	ns8390.h
10444	WD_LOW_BASE	0x200	ns8390.h
10445	WD_HIGH_BASE	0x3e0	ns8390.h
10446	WD_DEFAULT_MEM	0xD0000	ns8390.h
10447	WD_NIC_ADDR	0x10	ns8390.h
10448	WD_MSR	0x00	ns8390.h
10449	WD_ICR	0x01	ns8390.h
10450	WD_IAR	0x02	ns8390.h
10451	WD_BIO	0x03	ns8390.h
10452	WD_IRR	0x04	ns8390.h
10453	WD_LAAR	0x05	ns8390.h
10454	WD_IJR	0x06	ns8390.h
10455	WD_GP2	0x07	ns8390.h
10456	WD_LAR	0x08	ns8390.h
10457	WD_BID	0x0E	ns8390.h
10458	WD_ICR_16BIT	0x01	ns8390.h
10459	WD_MSR_MENB	0x40	ns8390.h
10460	WD_LAAR_L16EN	0x40	ns8390.h
10461	WD_LAAR_M16EN	0x80	ns8390.h
10462	WD_SOFTCONFIG	0x20	ns8390.h
10463	TYPE_WD8003S	0x02	ns8390.h
10464	TYPE_WD8003E	0x03	ns8390.h
10465	TYPE_WD8013EBT	0x05	ns8390.h
10466	TYPE_WD8003W	0x24	ns8390.h
10467	TYPE_WD8003EB	0x25	ns8390.h
10468	TYPE_WD8013W	0x26	ns8390.h
10469	TYPE_WD8013EP	0x27	ns8390.h
10470	TYPE_WD8013WC	0x28	ns8390.h
10471	TYPE_WD8013EPC	0x29	ns8390.h
10472	TYPE_SMC8216T	0x2a	ns8390.h
10473	TYPE_SMC8216C	0x2b	ns8390.h
10474	TYPE_SMC8416T	0x00	ns8390.h	Bogus entries: the 8416 generates the
10475	TYPE_SMC8416C	0x00	ns8390.h	the same codes as the 8216.
10476	TYPE_SMC8013EBP	0x2c	ns8390.h
10477	_3COM_BASE	0x300	ns8390.h
10478	_3COM_TX_PAGE_OFFSET_8BIT	0x20	ns8390.h
10479	_3COM_TX_PAGE_OFFSET_16BIT	0x0	ns8390.h
10480	_3COM_RX_PAGE_OFFSET_16BIT	0x20	ns8390.h
10481	_3COM_ASIC_OFFSET	0x400	ns8390.h
10482	_3COM_NIC_OFFSET	0x0	ns8390.h
10483	_3COM_PSTR	0	ns8390.h
10484	_3COM_PSPR	1	ns8390.h
10485	_3COM_BCFR	3	ns8390.h
10486	_3COM_BCFR_2E0	0x01	ns8390.h
10487	_3COM_BCFR_2A0	0x02	ns8390.h
10488	_3COM_BCFR_280	0x04	ns8390.h
10489	_3COM_BCFR_250	0x08	ns8390.h
10490	_3COM_BCFR_350	0x10	ns8390.h
10491	_3COM_BCFR_330	0x20	ns8390.h
10492	_3COM_BCFR_310	0x40	ns8390.h
10493	_3COM_BCFR_300	0x80	ns8390.h
10494	_3COM_PCFR	4	ns8390.h
10495	_3COM_PCFR_PIO	0	ns8390.h
10496	_3COM_PCFR_C8000	0x10	ns8390.h
10497	_3COM_PCFR_CC000	0x20	ns8390.h
10498	_3COM_PCFR_D8000	0x40	ns8390.h
10499	_3COM_PCFR_DC000	0x80	ns8390.h
10500	_3COM_CR	6	ns8390.h
10501	_3COM_CR_RST	0x01	ns8390.h	Reset GA and NIC
10502	_3COM_CR_XSEL	0x02	ns8390.h	Transceiver select. BNC=1(def) AUI=0
10503	_3COM_CR_EALO	0x04	ns8390.h	window EA PROM 0-15 to I/O base
10504	_3COM_CR_EAHI	0x08	ns8390.h	window EA PROM 16-31 to I/O base
10505	_3COM_CR_SHARE	0x10	ns8390.h	select interrupt sharing option
10506	_3COM_CR_DBSEL	0x20	ns8390.h	Double buffer select
10507	_3COM_CR_DDIR	0x40	ns8390.h	DMA direction select
10508	_3COM_CR_START	0x80	ns8390.h	Start DMA controller
10509	_3COM_GACFR	5	ns8390.h
10510	_3COM_GACFR_MBS0	0x01	ns8390.h
10511	_3COM_GACFR_MBS1	0x02	ns8390.h
10512	_3COM_GACFR_MBS2	0x04	ns8390.h
10513	_3COM_GACFR_RSEL	0x08	ns8390.h	enable shared memory
10514	_3COM_GACFR_TEST	0x10	ns8390.h	for GA testing
10515	_3COM_GACFR_OWS	0x20	ns8390.h	select 0WS access to GA
10516	_3COM_GACFR_TCM	0x40	ns8390.h	Mask DMA interrupts
10517	_3COM_GACFR_NIM	0x80	ns8390.h	Mask NIC interrupts
10518	_3COM_STREG	7	ns8390.h
10519	_3COM_STREG_REV	0x07	ns8390.h	GA revision
10520	_3COM_STREG_DIP	0x08	ns8390.h	DMA in progress
10521	_3COM_STREG_DTC	0x10	ns8390.h	DMA terminal count
10522	_3COM_STREG_OFLW	0x20	ns8390.h	Overflow
10523	_3COM_STREG_UFLW	0x40	ns8390.h	Underflow
10524	_3COM_STREG_DPRDY	0x80	ns8390.h	Data port ready
10525	_3COM_IDCFR	8	ns8390.h
10526	_3COM_IDCFR_DRQ0	0x01	ns8390.h	DMA request 1 select
10527	_3COM_IDCFR_DRQ1	0x02	ns8390.h	DMA request 2 select
10528	_3COM_IDCFR_DRQ2	0x04	ns8390.h	DMA request 3 select
10529	_3COM_IDCFR_UNUSED	0x08	ns8390.h	not used
10530	_3COM_IDCFR_IRQ2	0x10	ns8390.h	Interrupt request 2 select
10531	_3COM_IDCFR_IRQ3	0x20	ns8390.h	Interrupt request 3 select
10532	_3COM_IDCFR_IRQ4	0x40	ns8390.h	Interrupt request 4 select
10533	_3COM_IDCFR_IRQ5	0x80	ns8390.h	Interrupt request 5 select
10534	_3COM_IRQ2	2	ns8390.h
10535	_3COM_IRQ3	3	ns8390.h
10536	_3COM_IRQ4	4	ns8390.h
10537	_3COM_IRQ5	5	ns8390.h
10538	_3COM_DAMSB	9	ns8390.h
10539	_3COM_DALSB	0x0a	ns8390.h
10540	_3COM_VPTR2	0x0b	ns8390.h
10541	_3COM_VPTR1	0x0c	ns8390.h
10542	_3COM_VPTR0	0x0d	ns8390.h
10543	_3COM_RFMSB	0x0e	ns8390.h
10544	_3COM_RFLSB	0x0f	ns8390.h
10545	NE_ASIC_OFFSET	0x10	ns8390.h
10546	NE_RESET	0x0F	ns8390.h	Used to reset card
10547	NE_DATA	0x00	ns8390.h	Used to read/write NIC mem
10548	COMPEX_RL2000_TRIES	200	ns8390.h
10549	D8390_P0_COMMAND	0x00	ns8390.h
10550	D8390_P0_PSTART	0x01	ns8390.h
10551	D8390_P0_PSTOP	0x02	ns8390.h
10552	D8390_P0_BOUND	0x03	ns8390.h
10553	D8390_P0_TSR	0x04	ns8390.h
10554	D8390_P0_TPSR	0x04	ns8390.h
10555	D8390_P0_TBCR0	0x05	ns8390.h
10556	D8390_P0_TBCR1	0x06	ns8390.h
10557	D8390_P0_ISR	0x07	ns8390.h
10558	D8390_P0_RSAR0	0x08	ns8390.h
10559	D8390_P0_RSAR1	0x09	ns8390.h
10560	D8390_P0_RBCR0	0x0A	ns8390.h
10561	D8390_P0_RBCR1	0x0B	ns8390.h
10562	D8390_P0_RSR	0x0C	ns8390.h
10563	D8390_P0_RCR	0x0C	ns8390.h
10564	D8390_P0_TCR	0x0D	ns8390.h
10565	D8390_P0_DCR	0x0E	ns8390.h
10566	D8390_P0_IMR	0x0F	ns8390.h
10567	D8390_P1_COMMAND	0x00	ns8390.h
10568	D8390_P1_PAR0	0x01	ns8390.h
10569	D8390_P1_PAR1	0x02	ns8390.h
10570	D8390_P1_PAR2	0x03	ns8390.h
10571	D8390_P1_PAR3	0x04	ns8390.h
10572	D8390_P1_PAR4	0x05	ns8390.h
10573	D8390_P1_PAR5	0x06	ns8390.h
10574	D8390_P1_CURR	0x07	ns8390.h
10575	D8390_P1_MAR0	0x08	ns8390.h
10576	D8390_COMMAND_PS0	0x0	ns8390.h	Page 0 select
10577	D8390_COMMAND_PS1	0x40	ns8390.h	Page 1 select
10578	D8390_COMMAND_PS2	0x80	ns8390.h	Page 2 select
10579	D8390_COMMAND_RD2	0x20	ns8390.h	Remote DMA control
10580	D8390_COMMAND_RD1	0x10	ns8390.h
10581	D8390_COMMAND_RD0	0x08	ns8390.h
10582	D8390_COMMAND_TXP	0x04	ns8390.h	transmit packet
10583	D8390_COMMAND_STA	0x02	ns8390.h	start
10584	D8390_COMMAND_STP	0x01	ns8390.h	stop
10585	D8390_RCR_MON	0x20	ns8390.h	monitor mode
10586	D8390_DCR_FT1	0x40	ns8390.h
10587	D8390_DCR_LS	0x08	ns8390.h	Loopback select
10588	D8390_DCR_WTS	0x01	ns8390.h	Word transfer select
10589	D8390_ISR_PRX	0x01	ns8390.h	successful recv
10590	D8390_ISR_PTX	0x02	ns8390.h	successful xmit
10591	D8390_ISR_RXE	0x04	ns8390.h	receive error
10592	D8390_ISR_TXE	0x08	ns8390.h	transmit error
10593	D8390_ISR_OVW	0x10	ns8390.h	Overflow
10594	D8390_ISR_CNT	0x20	ns8390.h	Counter overflow
10595	D8390_ISR_RDC	0x40	ns8390.h	Remote DMA complete
10596	D8390_ISR_RST	0x80	ns8390.h	reset
10597	D8390_RSTAT_PRX	0x01	ns8390.h	successful recv
10598	D8390_RSTAT_CRC	0x02	ns8390.h	CRC error
10599	D8390_RSTAT_FAE	0x04	ns8390.h	Frame alignment error
10600	D8390_RSTAT_OVER	0x08	ns8390.h	FIFO overrun
10601	D8390_TXBUF_SIZE	6	ns8390.h
10602	D8390_RXBUF_END	32	ns8390.h
10603	D8390_PAGE_SIZE	256	ns8390.h
10604	WLAN_ADDR_LEN	6	p80211hdr.h
10605	WLAN_CRC_LEN	4	p80211hdr.h
10606	WLAN_BSSID_LEN	6	p80211hdr.h
10607	WLAN_BSS_TS_LEN	8	p80211hdr.h
10608	WLAN_HDR_A3_LEN	24	p80211hdr.h
10609	WLAN_HDR_A4_LEN	30	p80211hdr.h
10610	WLAN_SSID_MAXLEN	32	p80211hdr.h
10611	WLAN_DATA_MAXLEN	2312	p80211hdr.h
10612	WLAN_A3FR_MAXLEN	(WLAN_HDR_A3_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)	p80211hdr.h
10613	WLAN_A4FR_MAXLEN	(WLAN_HDR_A4_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)	p80211hdr.h
10614	WLAN_BEACON_FR_MAXLEN	(WLAN_HDR_A3_LEN + 334)	p80211hdr.h
10615	WLAN_ATIM_FR_MAXLEN	(WLAN_HDR_A3_LEN + 0)	p80211hdr.h
10616	WLAN_DISASSOC_FR_MAXLEN	(WLAN_HDR_A3_LEN + 2)	p80211hdr.h
10617	WLAN_ASSOCREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 48)	p80211hdr.h
10618	WLAN_ASSOCRESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 16)	p80211hdr.h
10619	WLAN_REASSOCREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 54)	p80211hdr.h
10620	WLAN_REASSOCRESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 16)	p80211hdr.h
10621	WLAN_PROBEREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 44)	p80211hdr.h
10622	WLAN_PROBERESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 78)	p80211hdr.h
10623	WLAN_AUTHEN_FR_MAXLEN	(WLAN_HDR_A3_LEN + 261)	p80211hdr.h
10624	WLAN_DEAUTHEN_FR_MAXLEN	(WLAN_HDR_A3_LEN + 2)	p80211hdr.h
10625	WLAN_WEP_NKEYS	4	p80211hdr.h
10626	WLAN_WEP_MAXKEYLEN	13	p80211hdr.h
10627	WLAN_CHALLENGE_IE_LEN	130	p80211hdr.h
10628	WLAN_CHALLENGE_LEN	128	p80211hdr.h
10629	WLAN_WEP_IV_LEN	4	p80211hdr.h
10630	WLAN_WEP_ICV_LEN	4	p80211hdr.h
10631	WLAN_FTYPE_MGMT	0x00	p80211hdr.h
10632	WLAN_FTYPE_CTL	0x01	p80211hdr.h
10633	WLAN_FTYPE_DATA	0x02	p80211hdr.h
10634	WLAN_FSTYPE_ASSOCREQ	0x00	p80211hdr.h
10635	WLAN_FSTYPE_ASSOCRESP	0x01	p80211hdr.h
10636	WLAN_FSTYPE_REASSOCREQ	0x02	p80211hdr.h
10637	WLAN_FSTYPE_REASSOCRESP	0x03	p80211hdr.h
10638	WLAN_FSTYPE_PROBEREQ	0x04	p80211hdr.h
10639	WLAN_FSTYPE_PROBERESP	0x05	p80211hdr.h
10640	WLAN_FSTYPE_BEACON	0x08	p80211hdr.h
10641	WLAN_FSTYPE_ATIM	0x09	p80211hdr.h
10642	WLAN_FSTYPE_DISASSOC	0x0a	p80211hdr.h
10643	WLAN_FSTYPE_AUTHEN	0x0b	p80211hdr.h
10644	WLAN_FSTYPE_DEAUTHEN	0x0c	p80211hdr.h
10645	WLAN_FSTYPE_BLOCKACKREQ	0x8	p80211hdr.h
10646	WLAN_FSTYPE_BLOCKACK	0x9	p80211hdr.h
10647	WLAN_FSTYPE_PSPOLL	0x0a	p80211hdr.h
10648	WLAN_FSTYPE_RTS	0x0b	p80211hdr.h
10649	WLAN_FSTYPE_CTS	0x0c	p80211hdr.h
10650	WLAN_FSTYPE_ACK	0x0d	p80211hdr.h
10651	WLAN_FSTYPE_CFEND	0x0e	p80211hdr.h
10652	WLAN_FSTYPE_CFENDCFACK	0x0f	p80211hdr.h
10653	WLAN_FSTYPE_DATAONLY	0x00	p80211hdr.h
10654	WLAN_FSTYPE_DATA_CFACK	0x01	p80211hdr.h
10655	WLAN_FSTYPE_DATA_CFPOLL	0x02	p80211hdr.h
10656	WLAN_FSTYPE_DATA_CFACK_CFPOLL	0x03	p80211hdr.h
10657	WLAN_FSTYPE_NULL	0x04	p80211hdr.h
10658	WLAN_FSTYPE_CFACK	0x05	p80211hdr.h
10659	WLAN_FSTYPE_CFPOLL	0x06	p80211hdr.h
10660	WLAN_FSTYPE_CFACK_CFPOLL	0x07	p80211hdr.h
10661	WLAN_FCS_LEN	4	p80211hdr.h
10662	PNIC_PCI_VENDOR	0xfefe	pnic_api.h	Hopefully these won't clash with
10663	PNIC_PCI_DEVICE	0xefef	pnic_api.h	any real PCI device IDs.
10664	PNIC_REG_CMD	0x00	pnic_api.h	Command register, 2 bytes, write only
10665	PNIC_REG_STAT	0x00	pnic_api.h	Status register, 2 bytes, read only
10666	PNIC_REG_LEN	0x02	pnic_api.h	Length register, 2 bytes, read-write
10667	PNIC_REG_DATA	0x04	pnic_api.h	Data port, 1 byte, read-write
10668	PNIC_MAX_REG	0x04	pnic_api.h
10669	PNIC_CMD_NOOP	0x0000	pnic_api.h
10670	PNIC_CMD_API_VER	0x0001	pnic_api.h
10671	PNIC_CMD_READ_MAC	0x0002	pnic_api.h
10672	PNIC_CMD_RESET	0x0003	pnic_api.h
10673	PNIC_CMD_XMIT	0x0004	pnic_api.h
10674	PNIC_CMD_RECV	0x0005	pnic_api.h
10675	PNIC_CMD_RECV_QLEN	0x0006	pnic_api.h
10676	PNIC_CMD_MASK_IRQ	0x0007	pnic_api.h
10677	PNIC_CMD_FORCE_IRQ	0x0008	pnic_api.h
10678	PNIC_STATUS_OK	0x4f4b	pnic_api.h	'OK'
10679	PNIC_STATUS_UNKNOWN_CMD	0x3f3f	pnic_api.h	'??'
10680	PNIC_API_VERSION	0x0101	pnic_api.h	1.1
10681	PCI_EXP_DEVCTL	8	r8169.h	Device Control
10682	PCI_EXP_DEVCTL_READRQ	0x7000	r8169.h	Max_Read_Request_Size
10683	PCI_EXP_LNKCTL	16	r8169.h	Link Control
10684	PCI_EXP_LNKCTL_CLKREQ_EN	0x100	r8169.h	Enable clkreq
10685	PCI_EXP_DEVCTL_NOSNOOP_EN	0x0800	r8169.h	Enable No Snoop
10686	SPEED_10	10	r8169.h
10687	SPEED_100	100	r8169.h
10688	SPEED_1000	1000	r8169.h
10689	SPEED_2500	2500	r8169.h
10690	SPEED_10000	10000	r8169.h
10691	DUPLEX_HALF	0x00	r8169.h
10692	DUPLEX_FULL	0x01	r8169.h
10693	AUTONEG_DISABLE	0x00	r8169.h
10694	AUTONEG_ENABLE	0x01	r8169.h
10695	MAC_ADDR_LEN	6	r8169.h
10696	MAX_READ_REQUEST_SHIFT	12	r8169.h
10697	RX_FIFO_THRESH	7	r8169.h	7 means NO threshold, Rx buffer level before first PCI xfer.
10698	RX_DMA_BURST	6	r8169.h	Maximum PCI burst, '6' is 1024
10699	TX_DMA_BURST	6	r8169.h	Maximum PCI burst, '6' is 1024
10700	EarlyTxThld	0x3F	r8169.h	0x3F means NO early transmit
10701	RxPacketMaxSize	0x3FE8	r8169.h	16K - 1 - ETH_HLEN - VLAN - CRC...
10702	SafeMtu	0x1c20	r8169.h	... actually life sucks beyond ~7k
10703	InterFrameGap	0x03	r8169.h	3 means InterFrameGap = the shortest one
10704	R8169_REGS_SIZE	256	r8169.h
10705	R8169_NAPI_WEIGHT	64	r8169.h
10706	NUM_TX_DESC	8	r8169.h	Number of Tx descriptor registers
10707	NUM_RX_DESC	8	r8169.h	Number of Rx descriptor registers
10708	RX_BUF_SIZE	1536	r8169.h	Rx Buffer size
10709	R8169_TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))	r8169.h
10710	R8169_RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))	r8169.h
10711	TX_RING_ALIGN	256	r8169.h
10712	RX_RING_ALIGN	256	r8169.h
10713	RTL8169_TX_TIMEOUT	(6*HZ)	r8169.h
10714	RTL8169_PHY_TIMEOUT	(10*HZ)	r8169.h
10715	RTL_EEPROM_SIG	cpu_to_le32(0x8129)	r8169.h
10716	RTL_EEPROM_SIG_MASK	cpu_to_le32(0xffff)	r8169.h
10717	RTL_EEPROM_SIG_ADDR	0x0000	r8169.h
10718	RsvdMask	0x3fffc000	r8169.h
10719	PCI_VENDOR_ID_SI	0x1039	sis190.h
10720	PHY_MAX_ADDR	32	sis190.h
10721	PHY_ID_ANY	0x1f	sis190.h
10722	MII_REG_ANY	0x1f	sis190.h
10723	DRV_VERSION	"1.3"	sis190.h
10724	DRV_NAME	"sis190"	sis190.h
10725	SIS190_DRIVER_NAME	DRV_NAME " Gigabit Ethernet driver " DRV_VERSION	sis190.h
10726	PFX	DRV_NAME ": "	sis190.h
10727	NUM_TX_DESC	8	sis190.h	[8..1024]
10728	NUM_RX_DESC	8	sis190.h	[8..8192]
10729	TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))	sis190.h
10730	RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))	sis190.h
10731	RX_BUF_SIZE	1536	sis190.h
10732	RX_BUF_MASK	0xfff8	sis190.h
10733	RING_ALIGNMENT	256	sis190.h
10734	SIS190_REGS_SIZE	0x80	sis190.h
10735	EhnMIIread	0x0000	sis190.h
10736	EhnMIIwrite	0x0020	sis190.h
10737	EhnMIIdataShift	16	sis190.h
10738	EhnMIIpmdShift	6	sis190.h	7016 only
10739	EhnMIIregShift	11	sis190.h
10740	EhnMIIreq	0x0010	sis190.h
10741	EhnMIInotDone	0x0010	sis190.h
10742	SIS900_TOTAL_SIZE	0x100	sis900.h
10743	MAX_DMA_RANGE	7	sis900.h	actually 0 means MAXIMUM !!
10744	TxMXDMA_shift	20	sis900.h
10745	RxMXDMA_shift	20	sis900.h
10746	TX_DMA_BURST	0	sis900.h
10747	RX_DMA_BURST	0	sis900.h
10748	TX_FILL_THRESH	16	sis900.h	1/4 FIFO size
10749	TxFILLT_shift	8	sis900.h
10750	TxDRNT_shift	0	sis900.h
10751	TxDRNT_100	48	sis900.h	3/4 FIFO size
10752	TxDRNT_10	16	sis900.h	1/2 FIFO size
10753	RxDRNT_shift	1	sis900.h
10754	RxDRNT_100	16	sis900.h	1/2 FIFO size
10755	RxDRNT_10	24	sis900.h	3/4 FIFO size
10756	RFAA_shift	28	sis900.h
10757	RFADDR_shift	16	sis900.h
10758	MIIread	0x6000	sis900.h
10759	MIIwrite	0x5002	sis900.h
10760	MIIpmdShift	7	sis900.h
10761	MIIregShift	2	sis900.h
10762	MIIcmdLen	16	sis900.h
10763	MIIcmdShift	16	sis900.h
10764	MII_ID1_OUI_LO	0xFC00	sis900.h	low bits of OUI mask
10765	MII_ID1_MODEL	0x03F0	sis900.h	model number
10766	MII_ID1_REV	0x000F	sis900.h	model number
10767	FDX_CAPABLE_DUPLEX_UNKNOWN	0	sis900.h
10768	FDX_CAPABLE_HALF_SELECTED	1	sis900.h
10769	FDX_CAPABLE_FULL_SELECTED	2	sis900.h
10770	HW_SPEED_UNCONFIG	0	sis900.h
10771	HW_SPEED_HOME	1	sis900.h
10772	HW_SPEED_10_MBPS	10	sis900.h
10773	HW_SPEED_100_MBPS	100	sis900.h
10774	HW_SPEED_DEFAULT	(HW_SPEED_100_MBPS)	sis900.h
10775	CRC_SIZE	4	sis900.h
10776	MAC_HEADER_SIZE	14	sis900.h
10777	TX_BUF_SIZE	1536	sis900.h
10778	RX_BUF_SIZE	1536	sis900.h
10779	NUM_RX_DESC	4	sis900.h	Number of Rx descriptor registers.
10780	TX_TIMEOUT	(4*TICKS_PER_SEC)	sis900.h
10781	PCI_DEV_REG1	0x40	skge.h
10782	PCI_PHY_COMA	0x8000000	skge.h
10783	PCI_VIO	0x2000000	skge.h
10784	PCI_DEV_REG2	0x44	skge.h
10785	PCI_VPD_ROM_SZ	7L<<14	skge.h	VPD ROM size 0=256, 1=512, ...
10786	PCI_REV_DESC	1<<2	skge.h	Reverse Descriptor bytes
10787	DRV_NAME	"skge"	skge.h
10788	DRV_VERSION	"1.13"	skge.h
10789	PFX	DRV_NAME " "	skge.h
10790	NUM_TX_DESC	8	skge.h
10791	NUM_RX_DESC	8	skge.h
10792	SKGE_RING_ALIGN	8	skge.h
10793	RX_BUF_SIZE	1536	skge.h
10794	PHY_RETRIES	1000	skge.h
10795	TX_RING_SIZE	( NUM_TX_DESC * sizeof ( struct skge_rx_desc ) )	skge.h
10796	RX_RING_SIZE	( NUM_RX_DESC * sizeof ( struct skge_tx_desc ) )	skge.h
10797	RING_SIZE	( TX_RING_SIZE + RX_RING_SIZE )	skge.h
10798	SKGE_REG_SIZE	0x4000	skge.h
10799	SKGE_EEPROM_MAGIC	0x9933aabb	skge.h
10800	AUTONEG_DISABLE	0x00	skge.h
10801	AUTONEG_ENABLE	0x01	skge.h
10802	DUPLEX_HALF	0x00	skge.h
10803	DUPLEX_FULL	0x01	skge.h
10804	SPEED_10	10	skge.h
10805	SPEED_100	100	skge.h
10806	SPEED_1000	1000	skge.h
10807	ADVERTISED_10baseT_Half	(1 << 0)	skge.h
10808	ADVERTISED_10baseT_Full	(1 << 1)	skge.h
10809	ADVERTISED_100baseT_Half	(1 << 2)	skge.h
10810	ADVERTISED_100baseT_Full	(1 << 3)	skge.h
10811	ADVERTISED_1000baseT_Half	(1 << 4)	skge.h
10812	ADVERTISED_1000baseT_Full	(1 << 5)	skge.h
10813	SUPPORTED_10baseT_Half	(1 << 0)	skge.h
10814	SUPPORTED_10baseT_Full	(1 << 1)	skge.h
10815	SUPPORTED_100baseT_Half	(1 << 2)	skge.h
10816	SUPPORTED_100baseT_Full	(1 << 3)	skge.h
10817	SUPPORTED_1000baseT_Half	(1 << 4)	skge.h
10818	SUPPORTED_1000baseT_Full	(1 << 5)	skge.h
10819	SUPPORTED_Autoneg	(1 << 6)	skge.h
10820	SUPPORTED_TP	(1 << 7)	skge.h
10821	SUPPORTED_FIBRE	(1 << 10)	skge.h
10822	PCI_STATUS_ERROR_BITS	(PCI_STATUS_DETECTED_PARITY \| \ PCI_STATUS_SIG_SYSTEM_ERROR \| \ PCI_STATUS_REC_MASTER_ABORT \| \ PCI_STATUS_REC_TARGET_ABORT \| \	skge.h
10823	RAM_ADR_RAN	0x0007ffffL	skge.h	Bit 18.. 0: RAM Address Range
10824	SK_MAC_TO_53	72	skge.h	MAC arbiter timeout
10825	SK_PKT_TO_53	0x2000	skge.h	Packet arbiter timeout
10826	SK_PKT_TO_MAX	0xffff	skge.h	Maximum value
10827	SK_RI_TO_53	36	skge.h	RAM interface timeout
10828	PA_ENA_TO_ALL	(PA_ENA_TO_RX1 \| PA_ENA_TO_RX2 \|\ PA_ENA_TO_TX1 \| PA_ENA_TO_TX2)	skge.h
10829	TXA_MAX_VAL	0x00ffffffUL	skge.h	Bit 23.. 0: Max TXA Timer/Cnt Val
10830	CSR_SET_RESET	(CSR_DESC_SET \| CSR_FIFO_SET \| CSR_HPI_RST \|\ CSR_SV_RST \| CSR_DREAD_RST \| CSR_DWRITE_RST \|\ CSR_TRANS_RST)	skge.h
10831	CSR_CLR_RESET	(CSR_DESC_CLR \| CSR_FIFO_CLR \| CSR_HPI_RUN \|\ CSR_SV_RUN \| CSR_DREAD_RUN \| CSR_DWRITE_RUN \|\ CSR_TRANS_RUN)	skge.h
10832	RB_MSK	0x0007ffff	skge.h	Bit 18.. 0: RAM Buffer Pointer Bits
10833	SK_XMIT_DUR	0x002faf08UL	skge.h	50 ms
10834	SK_BLK_DUR	0x01dcd650UL	skge.h	500 ms
10835	SK_DPOLL_DEF	0x00ee6b28UL	skge.h	250 ms at 62.5 MHz
10836	SK_DPOLL_MAX	0x00ffffffUL	skge.h	268 ms at 62.5 MHz
10837	SK_FACT_62	100	skge.h	is given in percent
10838	SK_FACT_53	85	skge.h	on GENESIS: 53.12 MHz
10839	SK_FACT_78	125	skge.h	on YUKON: 78.12 MHz
10840	PHY_B_AS_PAUSE_MSK	(PHY_B_AS_PRR \| PHY_B_AS_PRT)	skge.h
10841	PHY_B_DEF_MSK	(~(PHY_B_IS_PSE \| PHY_B_IS_AN_PR \| PHY_B_IS_DUP_CHANGE \| \ PHY_B_IS_LSP_CHANGE \| PHY_B_IS_LST_CHANGE))	skge.h
10842	PHY_M_PS_PAUSE_MSK	(PHY_M_PS_TX_P_EN \| PHY_M_PS_RX_P_EN)	skge.h
10843	GM_MIB_CNT_BASE	0x0100	skge.h	Base Address of MIB Counters
10844	GM_MIB_CNT_SIZE	44	skge.h	Number of MIB Counters
10845	GM_GPCR_SPEED_1000	(GM_GPCR_GIGS_ENA \| GM_GPCR_SPEED_100)	skge.h
10846	GM_GPCR_AU_ALL_DIS	(GM_GPCR_AU_DUP_DIS \| GM_GPCR_AU_FCT_DIS\|GM_GPCR_AU_SPD_DIS)	skge.h
10847	TX_COL_DEF	0x04	skge.h	late collision after 64 byte
10848	DATA_BLIND_DEF	0x04	skge.h
10849	IPG_DATA_DEF	0x1e	skge.h
10850	GPC_HWCFG_GMII_COP	(GPC_HWCFG_M_3\|GPC_HWCFG_M_2 \| GPC_HWCFG_M_1 \| GPC_HWCFG_M_0)	skge.h
10851	GPC_HWCFG_GMII_FIB	(GPC_HWCFG_M_2 \| GPC_HWCFG_M_1 \| GPC_HWCFG_M_0)	skge.h
10852	GPC_ANEG_ADV_ALL_M	(GPC_ANEG_3 \| GPC_ANEG_2 \| GPC_ANEG_1 \| GPC_ANEG_0)	skge.h
10853	GPC_FRC10MBIT_HALF	0	skge.h
10854	GPC_FRC10MBIT_FULL	GPC_ANEG_0	skge.h
10855	GPC_FRC100MBIT_HALF	GPC_ANEG_1	skge.h
10856	GPC_FRC100MBIT_FULL	(GPC_ANEG_0 \| GPC_ANEG_1)	skge.h
10857	GPC_ADV_1000_HALF	GPC_ANEG_2	skge.h
10858	GPC_ADV_1000_FULL	GPC_ANEG_3	skge.h
10859	GPC_ADV_ALL	(GPC_ANEG_2 \| GPC_ANEG_3)	skge.h
10860	GPC_FORCE_MASTER	0	skge.h
10861	GPC_FORCE_SLAVE	GPC_ANEG_0	skge.h
10862	GPC_PREF_MASTER	GPC_ANEG_1	skge.h
10863	GPC_PREF_SLAVE	(GPC_ANEG_1 \| GPC_ANEG_0)	skge.h
10864	WOL_CTL_DEFAULT	(WOL_CTL_DIS_PME_ON_LINK_CHG \| \ WOL_CTL_DIS_PME_ON_PATTERN \| \ WOL_CTL_DIS_PME_ON_MAGIC_PKT \| \ WOL_CTL_DIS_LINK_CHG_UNIT \|	skge.h
10865	XM_RT_LIM_MSK	0x1f	skge.h	Bit 4..0: Tx Retry Limit
10866	XM_STIME_MSK	0x7f	skge.h	Bit 6..0: Tx Slottime bits
10867	XM_IPG_MSK	0xff	skge.h	Bit 7..0: IPG value bits
10868	XM_TX_WM_MSK	0x01ff	skge.h	Bit 9.. 0 Tx FIFO Watermark bits
10869	XM_THR_MSK	0x03ff	skge.h	Bit 10.. 0 Rx/Tx Request Threshold bits
10870	XM_RX_WM_MSK	0x03ff	skge.h	Bit 11.. 0: Rx FIFO Watermark bits
10871	XM_DEV_OUI	(0x00ffffffUL<<8)	skge.h	Bit 31..8: Device OUI
10872	XM_DEV_REV	(0x07L << 5)	skge.h	Bit 7..5: Chip Rev Num
10873	XM_PAUSE_MODE	(XM_MD_SPOE_E \| XM_MD_SPOL_I \| XM_MD_SPOH_I)	skge.h
10874	XM_DEF_MODE	(XM_MD_RX_RUNT \| XM_MD_RX_IRLE \| XM_MD_RX_LONG \|\ XM_MD_RX_CRCE \| XM_MD_RX_ERR \| XM_MD_CSA)	skge.h
10875	XMR_DEF_MSK	(XMR_OK_LO_OV \| XMR_OK_HI_OV)	skge.h
10876	XMT_DEF_MSK	(XMT_OK_LO_OV \| XMT_OK_HI_OV)	skge.h
10877	AUTONEG_DISABLE	0x00	sky2.h
10878	AUTONEG_ENABLE	0x01	sky2.h
10879	DUPLEX_HALF	0x00	sky2.h
10880	DUPLEX_FULL	0x01	sky2.h
10881	SPEED_10	10	sky2.h
10882	SPEED_100	100	sky2.h
10883	SPEED_1000	1000	sky2.h
10884	ADVERTISED_10baseT_Half	(1 << 0)	sky2.h
10885	ADVERTISED_10baseT_Full	(1 << 1)	sky2.h
10886	ADVERTISED_100baseT_Half	(1 << 2)	sky2.h
10887	ADVERTISED_100baseT_Full	(1 << 3)	sky2.h
10888	ADVERTISED_1000baseT_Half	(1 << 4)	sky2.h
10889	ADVERTISED_1000baseT_Full	(1 << 5)	sky2.h
10890	SUPPORTED_10baseT_Half	(1 << 0)	sky2.h
10891	SUPPORTED_10baseT_Full	(1 << 1)	sky2.h
10892	SUPPORTED_100baseT_Half	(1 << 2)	sky2.h
10893	SUPPORTED_100baseT_Full	(1 << 3)	sky2.h
10894	SUPPORTED_1000baseT_Half	(1 << 4)	sky2.h
10895	SUPPORTED_1000baseT_Full	(1 << 5)	sky2.h
10896	SUPPORTED_Autoneg	(1 << 6)	sky2.h
10897	SUPPORTED_TP	(1 << 7)	sky2.h
10898	SUPPORTED_FIBRE	(1 << 10)	sky2.h
10899	PCI_STATUS_ERROR_BITS	(PCI_STATUS_DETECTED_PARITY \| \ PCI_STATUS_SIG_SYSTEM_ERROR \| \ PCI_STATUS_REC_MASTER_ABORT \| \ PCI_STATUS_REC_TARGET_ABORT \| \	sky2.h
10900	CFG_DUAL_MAC_MSK	(CFG_LINK_2_AVAIL \| CFG_LINK_1_AVAIL)	sky2.h
10901	RAM_ADR_RAN	0x0007ffffL	sky2.h	Bit 18.. 0: RAM Address Range
10902	SK_RI_TO_53	36	sky2.h	RAM interface timeout
10903	TXA_MAX_VAL	0x00ffffffUL	sky2.h	Bit 23.. 0: Max TXA Timer/Cnt Val
10904	RB_MSK	0x0007ffff	sky2.h	Bit 18.. 0: RAM Buffer Pointer Bits
10905	PHY_M_PS_PAUSE_MSK	(PHY_M_PS_TX_P_EN \| PHY_M_PS_RX_P_EN)	sky2.h
10906	GM_GPCR_SPEED_1000	(GM_GPCR_GIGS_ENA \| GM_GPCR_SPEED_100)	sky2.h
10907	GM_GPCR_AU_ALL_DIS	(GM_GPCR_AU_DUP_DIS \| GM_GPCR_AU_FCT_DIS\|GM_GPCR_AU_SPD_DIS)	sky2.h
10908	TX_COL_DEF	0x04	sky2.h
10909	DATA_BLIND_DEF	0x04	sky2.h
10910	IPG_DATA_DEF	0x1e	sky2.h
10911	GM_PHY_RETRIES	100	sky2.h
10912	BANK_SELECT	14	smc9000.h
10913	TCR	0	smc9000.h	transmit control register
10914	TCR_ENABLE	0x0001	smc9000.h	if this is 1, we can transmit
10915	TCR_FDUPLX	0x0800	smc9000.h	receive packets sent out
10916	TCR_STP_SQET	0x1000	smc9000.h	stop transmitting if Signal quality error
10917	TCR_MON_CNS	0x0400	smc9000.h	monitors the carrier status
10918	TCR_PAD_ENABLE	0x0080	smc9000.h	pads short packets to 64 bytes
10919	TCR_CLEAR	0	smc9000.h	do NOTHING
10920	TCR_NORMAL	(TCR_ENABLE \| TCR_PAD_ENABLE)	smc9000.h
10921	EPH_STATUS	2	smc9000.h
10922	ES_LINK_OK	0x4000	smc9000.h	is the link integrity ok ?
10923	RCR	4	smc9000.h
10924	RCR_SOFTRESET	0x8000	smc9000.h	resets the chip
10925	RCR_STRIP_CRC	0x200	smc9000.h	strips CRC
10926	RCR_ENABLE	0x100	smc9000.h	IFF this is set, we can receive packets
10927	RCR_ALMUL	0x4	smc9000.h	receive all multicast packets
10928	RCR_PROMISC	0x2	smc9000.h	enable promiscuous mode
10929	RCR_NORMAL	(RCR_STRIP_CRC \| RCR_ENABLE)	smc9000.h
10930	RCR_CLEAR	0x0	smc9000.h	set it to a base state
10931	COUNTER	6	smc9000.h
10932	MIR	8	smc9000.h
10933	MCR	10	smc9000.h
10934	RPC_REG	0x000A	smc9000.h
10935	RPC_SPEED	0x2000	smc9000.h	When 1 PHY is in 100Mbps mode.
10936	RPC_DPLX	0x1000	smc9000.h	When 1 PHY is in Full-Duplex Mode
10937	RPC_ANEG	0x0800	smc9000.h	When 1 PHY is in Auto-Negotiate Mode
10938	RPC_LSXA_SHFT	5	smc9000.h	Bits to shift LS2A,LS1A,LS0A to lsb
10939	RPC_LSXB_SHFT	2	smc9000.h	Bits to get LS2B,LS1B,LS0B to lsb
10940	RPC_LED_100_10	(0x00)	smc9000.h	LED = 100Mbps OR's with 10Mbps link detect
10941	RPC_LED_RES	(0x01)	smc9000.h	LED = Reserved
10942	RPC_LED_10	(0x02)	smc9000.h	LED = 10Mbps link detect
10943	RPC_LED_FD	(0x03)	smc9000.h	LED = Full Duplex Mode
10944	RPC_LED_TX_RX	(0x04)	smc9000.h	LED = TX or RX packet occurred
10945	RPC_LED_100	(0x05)	smc9000.h	LED = 100Mbps link dectect
10946	RPC_LED_TX	(0x06)	smc9000.h	LED = TX packet occurred
10947	RPC_LED_RX	(0x07)	smc9000.h	LED = RX packet occurred
10948	RPC_DEFAULT	(RPC_ANEG \| (RPC_LED_100 << RPC_LSXA_SHFT) \| (RPC_LED_FD << RPC_LSXB_SHFT) \| RPC_SPEED \| RPC_DPLX)	smc9000.h
10949	RPC_REG	0x000A	smc9000.h
10950	RPC_SPEED	0x2000	smc9000.h	When 1 PHY is in 100Mbps mode.
10951	RPC_DPLX	0x1000	smc9000.h	When 1 PHY is in Full-Duplex Mode
10952	RPC_ANEG	0x0800	smc9000.h	When 1 PHY is in Auto-Negotiate Mode
10953	RPC_LSXA_SHFT	5	smc9000.h	Bits to shift LS2A,LS1A,LS0A to lsb
10954	RPC_LSXB_SHFT	2	smc9000.h	Bits to get LS2B,LS1B,LS0B to lsb
10955	RPC_LED_100_10	(0x00)	smc9000.h	LED = 100Mbps OR's with 10Mbps link detect
10956	RPC_LED_RES	(0x01)	smc9000.h	LED = Reserved
10957	RPC_LED_10	(0x02)	smc9000.h	LED = 10Mbps link detect
10958	RPC_LED_FD	(0x03)	smc9000.h	LED = Full Duplex Mode
10959	RPC_LED_TX_RX	(0x04)	smc9000.h	LED = TX or RX packet occurred
10960	RPC_LED_100	(0x05)	smc9000.h	LED = 100Mbps link dectect
10961	RPC_LED_TX	(0x06)	smc9000.h	LED = TX packet occurred
10962	RPC_LED_RX	(0x07)	smc9000.h	LED = RX packet occurred
10963	RPC_DEFAULT	(RPC_ANEG \| (RPC_LED_100 << RPC_LSXA_SHFT) \| (RPC_LED_FD << RPC_LSXB_SHFT) \| RPC_SPEED \| RPC_DPLX)	smc9000.h
10964	CONFIG	0	smc9000.h
10965	CFG_AUI_SELECT	0x100	smc9000.h
10966	BASE	2	smc9000.h
10967	ADDR0	4	smc9000.h
10968	ADDR1	6	smc9000.h
10969	ADDR2	8	smc9000.h
10970	GENERAL	10	smc9000.h
10971	CONTROL	12	smc9000.h
10972	CTL_POWERDOWN	0x2000	smc9000.h
10973	CTL_LE_ENABLE	0x80	smc9000.h
10974	CTL_CR_ENABLE	0x40	smc9000.h
10975	CTL_TE_ENABLE	0x0020	smc9000.h
10976	CTL_AUTO_RELEASE	0x0800	smc9000.h
10977	CTL_EPROM_ACCESS	0x0003	smc9000.h	high if Eprom is being read
10978	MMU_CMD	0	smc9000.h
10979	MC_BUSY	1	smc9000.h	only readable bit in the register
10980	MC_NOP	0	smc9000.h
10981	MC_ALLOC	0x20	smc9000.h	or with number of 256 byte packets
10982	MC_RESET	0x40	smc9000.h
10983	MC_REMOVE	0x60	smc9000.h	remove the current rx packet
10984	MC_RELEASE	0x80	smc9000.h	remove and release the current rx packet
10985	MC_FREEPKT	0xA0	smc9000.h	Release packet in PNR register
10986	MC_ENQUEUE	0xC0	smc9000.h	Enqueue the packet for transmit
10987	PNR_ARR	2	smc9000.h
10988	FIFO_PORTS	4	smc9000.h
10989	FP_RXEMPTY	0x8000	smc9000.h
10990	FP_TXEMPTY	0x80	smc9000.h
10991	POINTER	6	smc9000.h
10992	PTR_READ	0x2000	smc9000.h
10993	PTR_RCV	0x8000	smc9000.h
10994	PTR_AUTOINC	0x4000	smc9000.h
10995	PTR_AUTO_INC	0x0040	smc9000.h
10996	DATA_1	8	smc9000.h
10997	DATA_2	10	smc9000.h
10998	INTERRUPT	12	smc9000.h
10999	INT_MASK	13	smc9000.h
11000	IM_RCV_INT	0x1	smc9000.h
11001	IM_TX_INT	0x2	smc9000.h
11002	IM_TX_EMPTY_INT	0x4	smc9000.h
11003	IM_ALLOC_INT	0x8	smc9000.h
11004	IM_RX_OVRN_INT	0x10	smc9000.h
11005	IM_EPH_INT	0x20	smc9000.h
11006	IM_ERCV_INT	0x40	smc9000.h	not on SMC9192
11007	MULTICAST1	0	smc9000.h
11008	MULTICAST2	2	smc9000.h
11009	MULTICAST3	4	smc9000.h
11010	MULTICAST4	6	smc9000.h
11011	MGMT	8	smc9000.h
11012	REVISION	10	smc9000.h	( hi: chip id low: rev # )
11013	MII_REG	0x0008	smc9000.h
11014	MII_MSK_CRS100	0x4000	smc9000.h	Disables CRS100 detection during tx half dup
11015	MII_MDOE	0x0008	smc9000.h	MII Output Enable
11016	MII_MCLK	0x0004	smc9000.h	MII Clock, pin MDCLK
11017	MII_MDI	0x0002	smc9000.h	MII Input, pin MDI
11018	MII_MDO	0x0001	smc9000.h	MII Output, pin MDO
11019	ERCV	12	smc9000.h
11020	CHIP_9190	3	smc9000.h
11021	CHIP_9194	4	smc9000.h
11022	CHIP_9195	5	smc9000.h
11023	CHIP_9196	4	smc9000.h
11024	CHIP_91100	7	smc9000.h
11025	CHIP_91100FD	8	smc9000.h
11026	REV_9196	6	smc9000.h
11027	TS_SUCCESS	0x0001	smc9000.h
11028	TS_LOSTCAR	0x0400	smc9000.h
11029	TS_LATCOL	0x0200	smc9000.h
11030	TS_16COL	0x0010	smc9000.h
11031	RS_ALGNERR	0x8000	smc9000.h
11032	RS_BADCRC	0x2000	smc9000.h
11033	RS_ODDFRAME	0x1000	smc9000.h
11034	RS_TOOLONG	0x0800	smc9000.h
11035	RS_TOOSHORT	0x0400	smc9000.h
11036	RS_MULTICAST	0x0001	smc9000.h
11037	RS_ERRORS	(RS_ALGNERR \| RS_BADCRC \| RS_TOOLONG \| RS_TOOSHORT)	smc9000.h
11038	PHY_CNTL_REG	0x00	smc9000.h
11039	PHY_CNTL_RST	0x8000	smc9000.h	1=PHY Reset
11040	PHY_CNTL_LPBK	0x4000	smc9000.h	1=PHY Loopback
11041	PHY_CNTL_SPEED	0x2000	smc9000.h	1=100Mbps, 0=10Mpbs
11042	PHY_CNTL_ANEG_EN	0x1000	smc9000.h	1=Enable Auto negotiation
11043	PHY_CNTL_PDN	0x0800	smc9000.h	1=PHY Power Down mode
11044	PHY_CNTL_MII_DIS	0x0400	smc9000.h	1=MII 4 bit interface disabled
11045	PHY_CNTL_ANEG_RST	0x0200	smc9000.h	1=Reset Auto negotiate
11046	PHY_CNTL_DPLX	0x0100	smc9000.h	1=Full Duplex, 0=Half Duplex
11047	PHY_CNTL_COLTST	0x0080	smc9000.h	1= MII Colision Test
11048	PHY_STAT_REG	0x01	smc9000.h
11049	PHY_STAT_CAP_T4	0x8000	smc9000.h	1=100Base-T4 capable
11050	PHY_STAT_CAP_TXF	0x4000	smc9000.h	1=100Base-X full duplex capable
11051	PHY_STAT_CAP_TXH	0x2000	smc9000.h	1=100Base-X half duplex capable
11052	PHY_STAT_CAP_TF	0x1000	smc9000.h	1=10Mbps full duplex capable
11053	PHY_STAT_CAP_TH	0x0800	smc9000.h	1=10Mbps half duplex capable
11054	PHY_STAT_CAP_SUPR	0x0040	smc9000.h	1=recv mgmt frames with not preamble
11055	PHY_STAT_ANEG_ACK	0x0020	smc9000.h	1=ANEG has completed
11056	PHY_STAT_REM_FLT	0x0010	smc9000.h	1=Remote Fault detected
11057	PHY_STAT_CAP_ANEG	0x0008	smc9000.h	1=Auto negotiate capable
11058	PHY_STAT_LINK	0x0004	smc9000.h	1=valid link
11059	PHY_STAT_JAB	0x0002	smc9000.h	1=10Mbps jabber condition
11060	PHY_STAT_EXREG	0x0001	smc9000.h	1=extended registers implemented
11061	PHY_ID1_REG	0x02	smc9000.h	PHY Identifier 1
11062	PHY_ID2_REG	0x03	smc9000.h	PHY Identifier 2
11063	PHY_AD_REG	0x04	smc9000.h
11064	PHY_AD_NP	0x8000	smc9000.h	1=PHY requests exchange of Next Page
11065	PHY_AD_ACK	0x4000	smc9000.h	1=got link code word from remote
11066	PHY_AD_RF	0x2000	smc9000.h	1=advertise remote fault
11067	PHY_AD_T4	0x0200	smc9000.h	1=PHY is capable of 100Base-T4
11068	PHY_AD_TX_FDX	0x0100	smc9000.h	1=PHY is capable of 100Base-TX FDPLX
11069	PHY_AD_TX_HDX	0x0080	smc9000.h	1=PHY is capable of 100Base-TX HDPLX
11070	PHY_AD_10_FDX	0x0040	smc9000.h	1=PHY is capable of 10Base-T FDPLX
11071	PHY_AD_10_HDX	0x0020	smc9000.h	1=PHY is capable of 10Base-T HDPLX
11072	PHY_AD_CSMA	0x0001	smc9000.h	1=PHY is capable of 802.3 CMSA
11073	PHY_RMT_REG	0x05	smc9000.h
11074	PHY_CFG1_REG	0x10	smc9000.h
11075	PHY_CFG1_LNKDIS	0x8000	smc9000.h	1=Rx Link Detect Function disabled
11076	PHY_CFG1_XMTDIS	0x4000	smc9000.h	1=TP Transmitter Disabled
11077	PHY_CFG1_XMTPDN	0x2000	smc9000.h	1=TP Transmitter Powered Down
11078	PHY_CFG1_BYPSCR	0x0400	smc9000.h	1=Bypass scrambler/descrambler
11079	PHY_CFG1_UNSCDS	0x0200	smc9000.h	1=Unscramble Idle Reception Disable
11080	PHY_CFG1_EQLZR	0x0100	smc9000.h	1=Rx Equalizer Disabled
11081	PHY_CFG1_CABLE	0x0080	smc9000.h	1=STP(150ohm), 0=UTP(100ohm)
11082	PHY_CFG1_RLVL0	0x0040	smc9000.h	1=Rx Squelch level reduced by 4.5db
11083	PHY_CFG1_TLVL_SHIFT	2	smc9000.h	Transmit Output Level Adjust
11084	PHY_CFG1_TLVL_MASK	0x003C	smc9000.h
11085	PHY_CFG1_TRF_MASK	0x0003	smc9000.h	Transmitter Rise/Fall time
11086	PHY_CFG2_REG	0x11	smc9000.h
11087	PHY_CFG2_APOLDIS	0x0020	smc9000.h	1=Auto Polarity Correction disabled
11088	PHY_CFG2_JABDIS	0x0010	smc9000.h	1=Jabber disabled
11089	PHY_CFG2_MREG	0x0008	smc9000.h	1=Multiple register access (MII mgt)
11090	PHY_CFG2_INTMDIO	0x0004	smc9000.h	1=Interrupt signaled with MDIO pulseo
11091	PHY_INT_REG	0x12	smc9000.h	Status Output (Interrupt Status)
11092	PHY_INT_INT	0x8000	smc9000.h	1=bits have changed since last read
11093	PHY_INT_LNKFAIL	0x4000	smc9000.h	1=Link Not detected
11094	PHY_INT_LOSSSYNC	0x2000	smc9000.h	1=Descrambler has lost sync
11095	PHY_INT_CWRD	0x1000	smc9000.h	1=Invalid 4B5B code detected on rx
11096	PHY_INT_SSD	0x0800	smc9000.h	1=No Start Of Stream detected on rx
11097	PHY_INT_ESD	0x0400	smc9000.h	1=No End Of Stream detected on rx
11098	PHY_INT_RPOL	0x0200	smc9000.h	1=Reverse Polarity detected
11099	PHY_INT_JAB	0x0100	smc9000.h	1=Jabber detected
11100	PHY_INT_SPDDET	0x0080	smc9000.h	1=100Base-TX mode, 0=10Base-T mode
11101	PHY_INT_DPLXDET	0x0040	smc9000.h	1=Device in Full Duplex
11102	PHY_MASK_REG	0x13	smc9000.h	Interrupt Mask
11103	PHY_CNTL_REG	0x00	smc9000.h
11104	PHY_CNTL_RST	0x8000	smc9000.h	1=PHY Reset
11105	PHY_CNTL_LPBK	0x4000	smc9000.h	1=PHY Loopback
11106	PHY_CNTL_SPEED	0x2000	smc9000.h	1=100Mbps, 0=10Mpbs
11107	PHY_CNTL_ANEG_EN	0x1000	smc9000.h	1=Enable Auto negotiation
11108	PHY_CNTL_PDN	0x0800	smc9000.h	1=PHY Power Down mode
11109	PHY_CNTL_MII_DIS	0x0400	smc9000.h	1=MII 4 bit interface disabled
11110	PHY_CNTL_ANEG_RST	0x0200	smc9000.h	1=Reset Auto negotiate
11111	PHY_CNTL_DPLX	0x0100	smc9000.h	1=Full Duplex, 0=Half Duplex
11112	PHY_CNTL_COLTST	0x0080	smc9000.h	1= MII Colision Test
11113	PHY_STAT_REG	0x01	smc9000.h
11114	PHY_STAT_CAP_T4	0x8000	smc9000.h	1=100Base-T4 capable
11115	PHY_STAT_CAP_TXF	0x4000	smc9000.h	1=100Base-X full duplex capable
11116	PHY_STAT_CAP_TXH	0x2000	smc9000.h	1=100Base-X half duplex capable
11117	PHY_STAT_CAP_TF	0x1000	smc9000.h	1=10Mbps full duplex capable
11118	PHY_STAT_CAP_TH	0x0800	smc9000.h	1=10Mbps half duplex capable
11119	PHY_STAT_CAP_SUPR	0x0040	smc9000.h	1=recv mgmt frames with not preamble
11120	PHY_STAT_ANEG_ACK	0x0020	smc9000.h	1=ANEG has completed
11121	PHY_STAT_REM_FLT	0x0010	smc9000.h	1=Remote Fault detected
11122	PHY_STAT_CAP_ANEG	0x0008	smc9000.h	1=Auto negotiate capable
11123	PHY_STAT_LINK	0x0004	smc9000.h	1=valid link
11124	PHY_STAT_JAB	0x0002	smc9000.h	1=10Mbps jabber condition
11125	PHY_STAT_EXREG	0x0001	smc9000.h	1=extended registers implemented
11126	PHY_ID1_REG	0x02	smc9000.h	PHY Identifier 1
11127	PHY_ID2_REG	0x03	smc9000.h	PHY Identifier 2
11128	PHY_AD_REG	0x04	smc9000.h
11129	PHY_AD_NP	0x8000	smc9000.h	1=PHY requests exchange of Next Page
11130	PHY_AD_ACK	0x4000	smc9000.h	1=got link code word from remote
11131	PHY_AD_RF	0x2000	smc9000.h	1=advertise remote fault
11132	PHY_AD_T4	0x0200	smc9000.h	1=PHY is capable of 100Base-T4
11133	PHY_AD_TX_FDX	0x0100	smc9000.h	1=PHY is capable of 100Base-TX FDPLX
11134	PHY_AD_TX_HDX	0x0080	smc9000.h	1=PHY is capable of 100Base-TX HDPLX
11135	PHY_AD_10_FDX	0x0040	smc9000.h	1=PHY is capable of 10Base-T FDPLX
11136	PHY_AD_10_HDX	0x0020	smc9000.h	1=PHY is capable of 10Base-T HDPLX
11137	PHY_AD_CSMA	0x0001	smc9000.h	1=PHY is capable of 802.3 CMSA
11138	PHY_RMT_REG	0x05	smc9000.h
11139	PHY_CFG1_REG	0x10	smc9000.h
11140	PHY_CFG1_LNKDIS	0x8000	smc9000.h	1=Rx Link Detect Function disabled
11141	PHY_CFG1_XMTDIS	0x4000	smc9000.h	1=TP Transmitter Disabled
11142	PHY_CFG1_XMTPDN	0x2000	smc9000.h	1=TP Transmitter Powered Down
11143	PHY_CFG1_BYPSCR	0x0400	smc9000.h	1=Bypass scrambler/descrambler
11144	PHY_CFG1_UNSCDS	0x0200	smc9000.h	1=Unscramble Idle Reception Disable
11145	PHY_CFG1_EQLZR	0x0100	smc9000.h	1=Rx Equalizer Disabled
11146	PHY_CFG1_CABLE	0x0080	smc9000.h	1=STP(150ohm), 0=UTP(100ohm)
11147	PHY_CFG1_RLVL0	0x0040	smc9000.h	1=Rx Squelch level reduced by 4.5db
11148	PHY_CFG1_TLVL_SHIFT	2	smc9000.h	Transmit Output Level Adjust
11149	PHY_CFG1_TLVL_MASK	0x003C	smc9000.h
11150	PHY_CFG1_TRF_MASK	0x0003	smc9000.h	Transmitter Rise/Fall time
11151	PHY_CFG2_REG	0x11	smc9000.h
11152	PHY_CFG2_APOLDIS	0x0020	smc9000.h	1=Auto Polarity Correction disabled
11153	PHY_CFG2_JABDIS	0x0010	smc9000.h	1=Jabber disabled
11154	PHY_CFG2_MREG	0x0008	smc9000.h	1=Multiple register access (MII mgt)
11155	PHY_CFG2_INTMDIO	0x0004	smc9000.h	1=Interrupt signaled with MDIO pulseo
11156	PHY_INT_REG	0x12	smc9000.h	Status Output (Interrupt Status)
11157	PHY_INT_INT	0x8000	smc9000.h	1=bits have changed since last read
11158	PHY_INT_LNKFAIL	0x4000	smc9000.h	1=Link Not detected
11159	PHY_INT_LOSSSYNC	0x2000	smc9000.h	1=Descrambler has lost sync
11160	PHY_INT_CWRD	0x1000	smc9000.h	1=Invalid 4B5B code detected on rx
11161	PHY_INT_SSD	0x0800	smc9000.h	1=No Start Of Stream detected on rx
11162	PHY_INT_ESD	0x0400	smc9000.h	1=No End Of Stream detected on rx
11163	PHY_INT_RPOL	0x0200	smc9000.h	1=Reverse Polarity detected
11164	PHY_INT_JAB	0x0100	smc9000.h	1=Jabber detected
11165	PHY_INT_SPDDET	0x0080	smc9000.h	1=100Base-TX mode, 0=10Base-T mode
11166	PHY_INT_DPLXDET	0x0040	smc9000.h	1=Device in Full Duplex
11167	PHY_MASK_REG	0x13	smc9000.h	Interrupt Mask
11168	ADVERTISED_10baseT_Half	(1 << 0)	tg3.h
11169	ADVERTISED_10baseT_Full	(1 << 1)	tg3.h
11170	ADVERTISED_100baseT_Half	(1 << 2)	tg3.h
11171	ADVERTISED_100baseT_Full	(1 << 3)	tg3.h
11172	ADVERTISED_1000baseT_Half	(1 << 4)	tg3.h
11173	ADVERTISED_1000baseT_Full	(1 << 5)	tg3.h
11174	ADVERTISED_Autoneg	(1 << 6)	tg3.h
11175	ADVERTISED_TP	(1 << 7)	tg3.h
11176	ADVERTISED_AUI	(1 << 8)	tg3.h
11177	ADVERTISED_MII	(1 << 9)	tg3.h
11178	ADVERTISED_FIBRE	(1 << 10)	tg3.h
11179	ADVERTISED_BNC	(1 << 11)	tg3.h
11180	SPEED_10	0	tg3.h
11181	SPEED_100	1	tg3.h
11182	SPEED_1000	2	tg3.h
11183	SPEED_INVALID	3	tg3.h
11184	DUPLEX_HALF	0x00	tg3.h
11185	DUPLEX_FULL	0x01	tg3.h
11186	DUPLEX_INVALID	0x02	tg3.h
11187	PORT_TP	0x00	tg3.h
11188	PORT_AUI	0x01	tg3.h
11189	PORT_MII	0x02	tg3.h
11190	PORT_FIBRE	0x03	tg3.h
11191	PORT_BNC	0x04	tg3.h
11192	XCVR_INTERNAL	0x00	tg3.h
11193	XCVR_EXTERNAL	0x01	tg3.h
11194	XCVR_DUMMY1	0x02	tg3.h
11195	XCVR_DUMMY2	0x03	tg3.h
11196	XCVR_DUMMY3	0x04	tg3.h
11197	AUTONEG_DISABLE	0x00	tg3.h
11198	AUTONEG_ENABLE	0x01	tg3.h
11199	WAKE_PHY	(1 << 0)	tg3.h
11200	WAKE_UCAST	(1 << 1)	tg3.h
11201	WAKE_MCAST	(1 << 2)	tg3.h
11202	WAKE_BCAST	(1 << 3)	tg3.h
11203	WAKE_ARP	(1 << 4)	tg3.h
11204	WAKE_MAGIC	(1 << 5)	tg3.h
11205	WAKE_MAGICSECURE	(1 << 6)	tg3.h	only meaningful if WAKE_MAGIC
11206	TG3_64BIT_REG_HIGH	0x00UL	tg3.h
11207	TG3_64BIT_REG_LOW	0x04UL	tg3.h
11208	TG3_BDINFO_HOST_ADDR	0x0UL	tg3.h	64-bit
11209	TG3_BDINFO_MAXLEN_FLAGS	0x8UL	tg3.h	32-bit
11210	BDINFO_FLAGS_USE_EXT_RECV	0x00000001	tg3.h	ext rx_buffer_desc
11211	BDINFO_FLAGS_DISABLED	0x00000002	tg3.h
11212	BDINFO_FLAGS_MAXLEN_MASK	0xffff0000	tg3.h
11213	BDINFO_FLAGS_MAXLEN_SHIFT	16	tg3.h
11214	TG3_BDINFO_NIC_ADDR	0xcUL	tg3.h	32-bit
11215	TG3_BDINFO_SIZE	0x10UL	tg3.h
11216	RX_COPY_THRESHOLD	256	tg3.h
11217	RX_STD_MAX_SIZE	1536	tg3.h
11218	RX_STD_MAX_SIZE_5705	512	tg3.h
11219	RX_JUMBO_MAX_SIZE	0xdeadbeef	tg3.h	XXX
11220	TG3PCI_VENDOR	0x00000000	tg3.h
11221	TG3PCI_VENDOR_BROADCOM	0x14e4	tg3.h
11222	TG3PCI_DEVICE	0x00000002	tg3.h
11223	TG3PCI_DEVICE_TIGON3_1	0x1644	tg3.h	BCM5700
11224	TG3PCI_DEVICE_TIGON3_2	0x1645	tg3.h	BCM5701
11225	TG3PCI_DEVICE_TIGON3_3	0x1646	tg3.h	BCM5702
11226	TG3PCI_DEVICE_TIGON3_4	0x1647	tg3.h	BCM5703
11227	TG3PCI_COMMAND	0x00000004	tg3.h
11228	TG3PCI_STATUS	0x00000006	tg3.h
11229	TG3PCI_CCREVID	0x00000008	tg3.h
11230	TG3PCI_CACHELINESZ	0x0000000c	tg3.h
11231	TG3PCI_LATTIMER	0x0000000d	tg3.h
11232	TG3PCI_HEADERTYPE	0x0000000e	tg3.h
11233	TG3PCI_BIST	0x0000000f	tg3.h
11234	TG3PCI_BASE0_LOW	0x00000010	tg3.h
11235	TG3PCI_BASE0_HIGH	0x00000014	tg3.h
11236	TG3PCI_SUBSYSVENID	0x0000002c	tg3.h
11237	TG3PCI_SUBSYSID	0x0000002e	tg3.h
11238	TG3PCI_ROMADDR	0x00000030	tg3.h
11239	TG3PCI_CAPLIST	0x00000034	tg3.h
11240	TG3PCI_IRQ_LINE	0x0000003c	tg3.h
11241	TG3PCI_IRQ_PIN	0x0000003d	tg3.h
11242	TG3PCI_MIN_GNT	0x0000003e	tg3.h
11243	TG3PCI_MAX_LAT	0x0000003f	tg3.h
11244	TG3PCI_X_CAPS	0x00000040	tg3.h
11245	PCIX_CAPS_RELAXED_ORDERING	0x00020000	tg3.h
11246	PCIX_CAPS_SPLIT_MASK	0x00700000	tg3.h
11247	PCIX_CAPS_SPLIT_SHIFT	20	tg3.h
11248	PCIX_CAPS_BURST_MASK	0x000c0000	tg3.h
11249	PCIX_CAPS_BURST_SHIFT	18	tg3.h
11250	PCIX_CAPS_MAX_BURST_CPIOB	2	tg3.h
11251	TG3PCI_PM_CAP_PTR	0x00000041	tg3.h
11252	TG3PCI_X_COMMAND	0x00000042	tg3.h
11253	TG3PCI_X_STATUS	0x00000044	tg3.h
11254	TG3PCI_PM_CAP_ID	0x00000048	tg3.h
11255	TG3PCI_VPD_CAP_PTR	0x00000049	tg3.h
11256	TG3PCI_PM_CAPS	0x0000004a	tg3.h
11257	TG3PCI_PM_CTRL_STAT	0x0000004c	tg3.h
11258	TG3PCI_BR_SUPP_EXT	0x0000004e	tg3.h
11259	TG3PCI_PM_DATA	0x0000004f	tg3.h
11260	TG3PCI_VPD_CAP_ID	0x00000050	tg3.h
11261	TG3PCI_MSI_CAP_PTR	0x00000051	tg3.h
11262	TG3PCI_VPD_ADDR_FLAG	0x00000052	tg3.h
11263	VPD_ADDR_FLAG_WRITE	0x00008000	tg3.h
11264	TG3PCI_VPD_DATA	0x00000054	tg3.h
11265	TG3PCI_MSI_CAP_ID	0x00000058	tg3.h
11266	TG3PCI_NXT_CAP_PTR	0x00000059	tg3.h
11267	TG3PCI_MSI_CTRL	0x0000005a	tg3.h
11268	TG3PCI_MSI_ADDR_LOW	0x0000005c	tg3.h
11269	TG3PCI_MSI_ADDR_HIGH	0x00000060	tg3.h
11270	TG3PCI_MSI_DATA	0x00000064	tg3.h
11271	TG3PCI_MISC_HOST_CTRL	0x00000068	tg3.h
11272	MISC_HOST_CTRL_CLEAR_INT	0x00000001	tg3.h
11273	MISC_HOST_CTRL_MASK_PCI_INT	0x00000002	tg3.h
11274	MISC_HOST_CTRL_BYTE_SWAP	0x00000004	tg3.h
11275	MISC_HOST_CTRL_WORD_SWAP	0x00000008	tg3.h
11276	MISC_HOST_CTRL_PCISTATE_RW	0x00000010	tg3.h
11277	MISC_HOST_CTRL_CLKREG_RW	0x00000020	tg3.h
11278	MISC_HOST_CTRL_REGWORD_SWAP	0x00000040	tg3.h
11279	MISC_HOST_CTRL_INDIR_ACCESS	0x00000080	tg3.h
11280	MISC_HOST_CTRL_IRQ_MASK_MODE	0x00000100	tg3.h
11281	MISC_HOST_CTRL_TAGGED_STATUS	0x00000200	tg3.h
11282	MISC_HOST_CTRL_CHIPREV	0xffff0000	tg3.h
11283	MISC_HOST_CTRL_CHIPREV_SHIFT	16	tg3.h
11284	CHIPREV_ID_5700_A0	0x7000	tg3.h
11285	CHIPREV_ID_5700_A1	0x7001	tg3.h
11286	CHIPREV_ID_5700_B0	0x7100	tg3.h
11287	CHIPREV_ID_5700_B1	0x7101	tg3.h
11288	CHIPREV_ID_5700_B3	0x7102	tg3.h
11289	CHIPREV_ID_5700_ALTIMA	0x7104	tg3.h
11290	CHIPREV_ID_5700_C0	0x7200	tg3.h
11291	CHIPREV_ID_5701_A0	0x0000	tg3.h
11292	CHIPREV_ID_5701_B0	0x0100	tg3.h
11293	CHIPREV_ID_5701_B2	0x0102	tg3.h
11294	CHIPREV_ID_5701_B5	0x0105	tg3.h
11295	CHIPREV_ID_5703_A0	0x1000	tg3.h
11296	CHIPREV_ID_5703_A1	0x1001	tg3.h
11297	CHIPREV_ID_5703_A2	0x1002	tg3.h
11298	CHIPREV_ID_5703_A3	0x1003	tg3.h
11299	CHIPREV_ID_5704_A0	0x2000	tg3.h
11300	CHIPREV_ID_5704_A1	0x2001	tg3.h
11301	CHIPREV_ID_5704_A2	0x2002	tg3.h
11302	CHIPREV_ID_5705_A0	0x3000	tg3.h
11303	CHIPREV_ID_5705_A1	0x3001	tg3.h
11304	CHIPREV_ID_5705_A2	0x3002	tg3.h
11305	CHIPREV_ID_5705_A3	0x3003	tg3.h
11306	CHIPREV_ID_5721	0x4101	tg3.h
11307	CHIPREV_ID_5750_A0	0x4000	tg3.h
11308	CHIPREV_ID_5750_A1	0x4001	tg3.h
11309	CHIPREV_ID_5750_A3	0x4003	tg3.h
11310	ASIC_REV_5700	0x07	tg3.h
11311	ASIC_REV_5701	0x00	tg3.h
11312	ASIC_REV_5703	0x01	tg3.h
11313	ASIC_REV_5704	0x02	tg3.h
11314	ASIC_REV_5705	0x03	tg3.h
11315	ASIC_REV_5750	0x04	tg3.h
11316	ASIC_REV_5787	0x0b	tg3.h
11317	CHIPREV_5700_AX	0x70	tg3.h
11318	CHIPREV_5700_BX	0x71	tg3.h
11319	CHIPREV_5700_CX	0x72	tg3.h
11320	CHIPREV_5701_AX	0x00	tg3.h
11321	METAL_REV_A0	0x00	tg3.h
11322	METAL_REV_A1	0x01	tg3.h
11323	METAL_REV_B0	0x00	tg3.h
11324	METAL_REV_B1	0x01	tg3.h
11325	METAL_REV_B2	0x02	tg3.h
11326	TG3PCI_DMA_RW_CTRL	0x0000006c	tg3.h
11327	DMA_RWCTRL_MIN_DMA	0x000000ff	tg3.h
11328	DMA_RWCTRL_MIN_DMA_SHIFT	0	tg3.h
11329	DMA_RWCTRL_READ_BNDRY_MASK	0x00000700	tg3.h
11330	DMA_RWCTRL_READ_BNDRY_DISAB	0x00000000	tg3.h
11331	DMA_RWCTRL_READ_BNDRY_16	0x00000100	tg3.h
11332	DMA_RWCTRL_READ_BNDRY_32	0x00000200	tg3.h
11333	DMA_RWCTRL_READ_BNDRY_64	0x00000300	tg3.h
11334	DMA_RWCTRL_READ_BNDRY_128	0x00000400	tg3.h
11335	DMA_RWCTRL_READ_BNDRY_256	0x00000500	tg3.h
11336	DMA_RWCTRL_READ_BNDRY_512	0x00000600	tg3.h
11337	DMA_RWCTRL_READ_BNDRY_1024	0x00000700	tg3.h
11338	DMA_RWCTRL_WRITE_BNDRY_MASK	0x00003800	tg3.h
11339	DMA_RWCTRL_WRITE_BNDRY_DISAB	0x00000000	tg3.h
11340	DMA_RWCTRL_WRITE_BNDRY_16	0x00000800	tg3.h
11341	DMA_RWCTRL_WRITE_BNDRY_32	0x00001000	tg3.h
11342	DMA_RWCTRL_WRITE_BNDRY_64	0x00001800	tg3.h
11343	DMA_RWCTRL_WRITE_BNDRY_128	0x00002000	tg3.h
11344	DMA_RWCTRL_WRITE_BNDRY_256	0x00002800	tg3.h
11345	DMA_RWCTRL_WRITE_BNDRY_512	0x00003000	tg3.h
11346	DMA_RWCTRL_WRITE_BNDRY_1024	0x00003800	tg3.h
11347	DMA_RWCTRL_ONE_DMA	0x00004000	tg3.h
11348	DMA_RWCTRL_READ_WATER	0x00070000	tg3.h
11349	DMA_RWCTRL_READ_WATER_SHIFT	16	tg3.h
11350	DMA_RWCTRL_WRITE_WATER	0x00380000	tg3.h
11351	DMA_RWCTRL_WRITE_WATER_SHIFT	19	tg3.h
11352	DMA_RWCTRL_USE_MEM_READ_MULT	0x00400000	tg3.h
11353	DMA_RWCTRL_ASSERT_ALL_BE	0x00800000	tg3.h
11354	DMA_RWCTRL_PCI_READ_CMD	0x0f000000	tg3.h
11355	DMA_RWCTRL_PCI_READ_CMD_SHIFT	24	tg3.h
11356	DMA_RWCTRL_PCI_WRITE_CMD	0xf0000000	tg3.h
11357	DMA_RWCTRL_PCI_WRITE_CMD_SHIFT	28	tg3.h
11358	TG3PCI_PCISTATE	0x00000070	tg3.h
11359	PCISTATE_FORCE_RESET	0x00000001	tg3.h
11360	PCISTATE_INT_NOT_ACTIVE	0x00000002	tg3.h
11361	PCISTATE_CONV_PCI_MODE	0x00000004	tg3.h
11362	PCISTATE_BUS_SPEED_HIGH	0x00000008	tg3.h
11363	PCISTATE_BUS_32BIT	0x00000010	tg3.h
11364	PCISTATE_ROM_ENABLE	0x00000020	tg3.h
11365	PCISTATE_ROM_RETRY_ENABLE	0x00000040	tg3.h
11366	PCISTATE_FLAT_VIEW	0x00000100	tg3.h
11367	PCISTATE_RETRY_SAME_DMA	0x00002000	tg3.h
11368	TG3PCI_CLOCK_CTRL	0x00000074	tg3.h
11369	CLOCK_CTRL_CORECLK_DISABLE	0x00000200	tg3.h
11370	CLOCK_CTRL_RXCLK_DISABLE	0x00000400	tg3.h
11371	CLOCK_CTRL_TXCLK_DISABLE	0x00000800	tg3.h
11372	CLOCK_CTRL_ALTCLK	0x00001000	tg3.h
11373	CLOCK_CTRL_PWRDOWN_PLL133	0x00008000	tg3.h
11374	CLOCK_CTRL_44MHZ_CORE	0x00040000	tg3.h
11375	CLOCK_CTRL_625_CORE	0x00100000	tg3.h
11376	CLOCK_CTRL_FORCE_CLKRUN	0x00200000	tg3.h
11377	CLOCK_CTRL_CLKRUN_OENABLE	0x00400000	tg3.h
11378	CLOCK_CTRL_DELAY_PCI_GRANT	0x80000000	tg3.h
11379	TG3PCI_REG_BASE_ADDR	0x00000078	tg3.h
11380	TG3PCI_MEM_WIN_BASE_ADDR	0x0000007c	tg3.h
11381	TG3PCI_REG_DATA	0x00000080	tg3.h
11382	TG3PCI_MEM_WIN_DATA	0x00000084	tg3.h
11383	TG3PCI_MODE_CTRL	0x00000088	tg3.h
11384	TG3PCI_MISC_CFG	0x0000008c	tg3.h
11385	TG3PCI_MISC_LOCAL_CTRL	0x00000090	tg3.h
11386	TG3PCI_STD_RING_PROD_IDX	0x00000098	tg3.h	64-bit
11387	TG3PCI_RCV_RET_RING_CON_IDX	0x000000a0	tg3.h	64-bit
11388	TG3PCI_SND_PROD_IDX	0x000000a8	tg3.h	64-bit
11389	MAILBOX_INTERRUPT_0	0x00000200	tg3.h	64-bit
11390	MAILBOX_INTERRUPT_1	0x00000208	tg3.h	64-bit
11391	MAILBOX_INTERRUPT_2	0x00000210	tg3.h	64-bit
11392	MAILBOX_INTERRUPT_3	0x00000218	tg3.h	64-bit
11393	MAILBOX_GENERAL_0	0x00000220	tg3.h	64-bit
11394	MAILBOX_GENERAL_1	0x00000228	tg3.h	64-bit
11395	MAILBOX_GENERAL_2	0x00000230	tg3.h	64-bit
11396	MAILBOX_GENERAL_3	0x00000238	tg3.h	64-bit
11397	MAILBOX_GENERAL_4	0x00000240	tg3.h	64-bit
11398	MAILBOX_GENERAL_5	0x00000248	tg3.h	64-bit
11399	MAILBOX_GENERAL_6	0x00000250	tg3.h	64-bit
11400	MAILBOX_GENERAL_7	0x00000258	tg3.h	64-bit
11401	MAILBOX_RELOAD_STAT	0x00000260	tg3.h	64-bit
11402	MAILBOX_RCV_STD_PROD_IDX	0x00000268	tg3.h	64-bit
11403	MAILBOX_RCV_JUMBO_PROD_IDX	0x00000270	tg3.h	64-bit
11404	MAILBOX_RCV_MINI_PROD_IDX	0x00000278	tg3.h	64-bit
11405	MAILBOX_RCVRET_CON_IDX_0	0x00000280	tg3.h	64-bit
11406	MAILBOX_RCVRET_CON_IDX_1	0x00000288	tg3.h	64-bit
11407	MAILBOX_RCVRET_CON_IDX_2	0x00000290	tg3.h	64-bit
11408	MAILBOX_RCVRET_CON_IDX_3	0x00000298	tg3.h	64-bit
11409	MAILBOX_RCVRET_CON_IDX_4	0x000002a0	tg3.h	64-bit
11410	MAILBOX_RCVRET_CON_IDX_5	0x000002a8	tg3.h	64-bit
11411	MAILBOX_RCVRET_CON_IDX_6	0x000002b0	tg3.h	64-bit
11412	MAILBOX_RCVRET_CON_IDX_7	0x000002b8	tg3.h	64-bit
11413	MAILBOX_RCVRET_CON_IDX_8	0x000002c0	tg3.h	64-bit
11414	MAILBOX_RCVRET_CON_IDX_9	0x000002c8	tg3.h	64-bit
11415	MAILBOX_RCVRET_CON_IDX_10	0x000002d0	tg3.h	64-bit
11416	MAILBOX_RCVRET_CON_IDX_11	0x000002d8	tg3.h	64-bit
11417	MAILBOX_RCVRET_CON_IDX_12	0x000002e0	tg3.h	64-bit
11418	MAILBOX_RCVRET_CON_IDX_13	0x000002e8	tg3.h	64-bit
11419	MAILBOX_RCVRET_CON_IDX_14	0x000002f0	tg3.h	64-bit
11420	MAILBOX_RCVRET_CON_IDX_15	0x000002f8	tg3.h	64-bit
11421	MAILBOX_SNDHOST_PROD_IDX_0	0x00000300	tg3.h	64-bit
11422	MAILBOX_SNDHOST_PROD_IDX_1	0x00000308	tg3.h	64-bit
11423	MAILBOX_SNDHOST_PROD_IDX_2	0x00000310	tg3.h	64-bit
11424	MAILBOX_SNDHOST_PROD_IDX_3	0x00000318	tg3.h	64-bit
11425	MAILBOX_SNDHOST_PROD_IDX_4	0x00000320	tg3.h	64-bit
11426	MAILBOX_SNDHOST_PROD_IDX_5	0x00000328	tg3.h	64-bit
11427	MAILBOX_SNDHOST_PROD_IDX_6	0x00000330	tg3.h	64-bit
11428	MAILBOX_SNDHOST_PROD_IDX_7	0x00000338	tg3.h	64-bit
11429	MAILBOX_SNDHOST_PROD_IDX_8	0x00000340	tg3.h	64-bit
11430	MAILBOX_SNDHOST_PROD_IDX_9	0x00000348	tg3.h	64-bit
11431	MAILBOX_SNDHOST_PROD_IDX_10	0x00000350	tg3.h	64-bit
11432	MAILBOX_SNDHOST_PROD_IDX_11	0x00000358	tg3.h	64-bit
11433	MAILBOX_SNDHOST_PROD_IDX_12	0x00000360	tg3.h	64-bit
11434	MAILBOX_SNDHOST_PROD_IDX_13	0x00000368	tg3.h	64-bit
11435	MAILBOX_SNDHOST_PROD_IDX_14	0x00000370	tg3.h	64-bit
11436	MAILBOX_SNDHOST_PROD_IDX_15	0x00000378	tg3.h	64-bit
11437	MAILBOX_SNDNIC_PROD_IDX_0	0x00000380	tg3.h	64-bit
11438	MAILBOX_SNDNIC_PROD_IDX_1	0x00000388	tg3.h	64-bit
11439	MAILBOX_SNDNIC_PROD_IDX_2	0x00000390	tg3.h	64-bit
11440	MAILBOX_SNDNIC_PROD_IDX_3	0x00000398	tg3.h	64-bit
11441	MAILBOX_SNDNIC_PROD_IDX_4	0x000003a0	tg3.h	64-bit
11442	MAILBOX_SNDNIC_PROD_IDX_5	0x000003a8	tg3.h	64-bit
11443	MAILBOX_SNDNIC_PROD_IDX_6	0x000003b0	tg3.h	64-bit
11444	MAILBOX_SNDNIC_PROD_IDX_7	0x000003b8	tg3.h	64-bit
11445	MAILBOX_SNDNIC_PROD_IDX_8	0x000003c0	tg3.h	64-bit
11446	MAILBOX_SNDNIC_PROD_IDX_9	0x000003c8	tg3.h	64-bit
11447	MAILBOX_SNDNIC_PROD_IDX_10	0x000003d0	tg3.h	64-bit
11448	MAILBOX_SNDNIC_PROD_IDX_11	0x000003d8	tg3.h	64-bit
11449	MAILBOX_SNDNIC_PROD_IDX_12	0x000003e0	tg3.h	64-bit
11450	MAILBOX_SNDNIC_PROD_IDX_13	0x000003e8	tg3.h	64-bit
11451	MAILBOX_SNDNIC_PROD_IDX_14	0x000003f0	tg3.h	64-bit
11452	MAILBOX_SNDNIC_PROD_IDX_15	0x000003f8	tg3.h	64-bit
11453	MAC_MODE	0x00000400	tg3.h
11454	MAC_MODE_RESET	0x00000001	tg3.h
11455	MAC_MODE_HALF_DUPLEX	0x00000002	tg3.h
11456	MAC_MODE_PORT_MODE_MASK	0x0000000c	tg3.h
11457	MAC_MODE_PORT_MODE_TBI	0x0000000c	tg3.h
11458	MAC_MODE_PORT_MODE_GMII	0x00000008	tg3.h
11459	MAC_MODE_PORT_MODE_MII	0x00000004	tg3.h
11460	MAC_MODE_PORT_MODE_NONE	0x00000000	tg3.h
11461	MAC_MODE_PORT_INT_LPBACK	0x00000010	tg3.h
11462	MAC_MODE_TAGGED_MAC_CTRL	0x00000080	tg3.h
11463	MAC_MODE_TX_BURSTING	0x00000100	tg3.h
11464	MAC_MODE_MAX_DEFER	0x00000200	tg3.h
11465	MAC_MODE_LINK_POLARITY	0x00000400	tg3.h
11466	MAC_MODE_RXSTAT_ENABLE	0x00000800	tg3.h
11467	MAC_MODE_RXSTAT_CLEAR	0x00001000	tg3.h
11468	MAC_MODE_RXSTAT_FLUSH	0x00002000	tg3.h
11469	MAC_MODE_TXSTAT_ENABLE	0x00004000	tg3.h
11470	MAC_MODE_TXSTAT_CLEAR	0x00008000	tg3.h
11471	MAC_MODE_TXSTAT_FLUSH	0x00010000	tg3.h
11472	MAC_MODE_SEND_CONFIGS	0x00020000	tg3.h
11473	MAC_MODE_MAGIC_PKT_ENABLE	0x00040000	tg3.h
11474	MAC_MODE_ACPI_ENABLE	0x00080000	tg3.h
11475	MAC_MODE_MIP_ENABLE	0x00100000	tg3.h
11476	MAC_MODE_TDE_ENABLE	0x00200000	tg3.h
11477	MAC_MODE_RDE_ENABLE	0x00400000	tg3.h
11478	MAC_MODE_FHDE_ENABLE	0x00800000	tg3.h
11479	MAC_STATUS	0x00000404	tg3.h
11480	MAC_STATUS_PCS_SYNCED	0x00000001	tg3.h
11481	MAC_STATUS_SIGNAL_DET	0x00000002	tg3.h
11482	MAC_STATUS_RCVD_CFG	0x00000004	tg3.h
11483	MAC_STATUS_CFG_CHANGED	0x00000008	tg3.h
11484	MAC_STATUS_SYNC_CHANGED	0x00000010	tg3.h
11485	MAC_STATUS_PORT_DEC_ERR	0x00000400	tg3.h
11486	MAC_STATUS_LNKSTATE_CHANGED	0x00001000	tg3.h
11487	MAC_STATUS_MI_COMPLETION	0x00400000	tg3.h
11488	MAC_STATUS_MI_INTERRUPT	0x00800000	tg3.h
11489	MAC_STATUS_AP_ERROR	0x01000000	tg3.h
11490	MAC_STATUS_ODI_ERROR	0x02000000	tg3.h
11491	MAC_STATUS_RXSTAT_OVERRUN	0x04000000	tg3.h
11492	MAC_STATUS_TXSTAT_OVERRUN	0x08000000	tg3.h
11493	MAC_EVENT	0x00000408	tg3.h
11494	MAC_EVENT_PORT_DECODE_ERR	0x00000400	tg3.h
11495	MAC_EVENT_LNKSTATE_CHANGED	0x00001000	tg3.h
11496	MAC_EVENT_MI_COMPLETION	0x00400000	tg3.h
11497	MAC_EVENT_MI_INTERRUPT	0x00800000	tg3.h
11498	MAC_EVENT_AP_ERROR	0x01000000	tg3.h
11499	MAC_EVENT_ODI_ERROR	0x02000000	tg3.h
11500	MAC_EVENT_RXSTAT_OVERRUN	0x04000000	tg3.h
11501	MAC_EVENT_TXSTAT_OVERRUN	0x08000000	tg3.h
11502	MAC_LED_CTRL	0x0000040c	tg3.h
11503	LED_CTRL_LNKLED_OVERRIDE	0x00000001	tg3.h
11504	LED_CTRL_1000MBPS_ON	0x00000002	tg3.h
11505	LED_CTRL_100MBPS_ON	0x00000004	tg3.h
11506	LED_CTRL_10MBPS_ON	0x00000008	tg3.h
11507	LED_CTRL_TRAFFIC_OVERRIDE	0x00000010	tg3.h
11508	LED_CTRL_TRAFFIC_BLINK	0x00000020	tg3.h
11509	LED_CTRL_TRAFFIC_LED	0x00000040	tg3.h
11510	LED_CTRL_1000MBPS_STATUS	0x00000080	tg3.h
11511	LED_CTRL_100MBPS_STATUS	0x00000100	tg3.h
11512	LED_CTRL_10MBPS_STATUS	0x00000200	tg3.h
11513	LED_CTRL_TRAFFIC_STATUS	0x00000400	tg3.h
11514	LED_CTRL_MAC_MODE	0x00000000	tg3.h
11515	LED_CTRL_PHY_MODE_1	0x00000800	tg3.h
11516	LED_CTRL_PHY_MODE_2	0x00001000	tg3.h
11517	LED_CTRL_BLINK_RATE_MASK	0x7ff80000	tg3.h
11518	LED_CTRL_BLINK_RATE_SHIFT	19	tg3.h
11519	LED_CTRL_BLINK_PER_OVERRIDE	0x00080000	tg3.h
11520	LED_CTRL_BLINK_RATE_OVERRIDE	0x80000000	tg3.h
11521	MAC_ADDR_0_HIGH	0x00000410	tg3.h	upper 2 bytes
11522	MAC_ADDR_0_LOW	0x00000414	tg3.h	lower 4 bytes
11523	MAC_ADDR_1_HIGH	0x00000418	tg3.h	upper 2 bytes
11524	MAC_ADDR_1_LOW	0x0000041c	tg3.h	lower 4 bytes
11525	MAC_ADDR_2_HIGH	0x00000420	tg3.h	upper 2 bytes
11526	MAC_ADDR_2_LOW	0x00000424	tg3.h	lower 4 bytes
11527	MAC_ADDR_3_HIGH	0x00000428	tg3.h	upper 2 bytes
11528	MAC_ADDR_3_LOW	0x0000042c	tg3.h	lower 4 bytes
11529	MAC_ACPI_MBUF_PTR	0x00000430	tg3.h
11530	MAC_ACPI_LEN_OFFSET	0x00000434	tg3.h
11531	ACPI_LENOFF_LEN_MASK	0x0000ffff	tg3.h
11532	ACPI_LENOFF_LEN_SHIFT	0	tg3.h
11533	ACPI_LENOFF_OFF_MASK	0x0fff0000	tg3.h
11534	ACPI_LENOFF_OFF_SHIFT	16	tg3.h
11535	MAC_TX_BACKOFF_SEED	0x00000438	tg3.h
11536	TX_BACKOFF_SEED_MASK	0x000003ff	tg3.h
11537	MAC_RX_MTU_SIZE	0x0000043c	tg3.h
11538	RX_MTU_SIZE_MASK	0x0000ffff	tg3.h
11539	MAC_PCS_TEST	0x00000440	tg3.h
11540	PCS_TEST_PATTERN_MASK	0x000fffff	tg3.h
11541	PCS_TEST_PATTERN_SHIFT	0	tg3.h
11542	PCS_TEST_ENABLE	0x00100000	tg3.h
11543	MAC_TX_AUTO_NEG	0x00000444	tg3.h
11544	TX_AUTO_NEG_MASK	0x0000ffff	tg3.h
11545	TX_AUTO_NEG_SHIFT	0	tg3.h
11546	MAC_RX_AUTO_NEG	0x00000448	tg3.h
11547	RX_AUTO_NEG_MASK	0x0000ffff	tg3.h
11548	RX_AUTO_NEG_SHIFT	0	tg3.h
11549	MAC_MI_COM	0x0000044c	tg3.h
11550	MI_COM_CMD_MASK	0x0c000000	tg3.h
11551	MI_COM_CMD_WRITE	0x04000000	tg3.h
11552	MI_COM_CMD_READ	0x08000000	tg3.h
11553	MI_COM_READ_FAILED	0x10000000	tg3.h
11554	MI_COM_START	0x20000000	tg3.h
11555	MI_COM_BUSY	0x20000000	tg3.h
11556	MI_COM_PHY_ADDR_MASK	0x03e00000	tg3.h
11557	MI_COM_PHY_ADDR_SHIFT	21	tg3.h
11558	MI_COM_REG_ADDR_MASK	0x001f0000	tg3.h
11559	MI_COM_REG_ADDR_SHIFT	16	tg3.h
11560	MI_COM_DATA_MASK	0x0000ffff	tg3.h
11561	MAC_MI_STAT	0x00000450	tg3.h
11562	MAC_MI_STAT_LNKSTAT_ATTN_ENAB	0x00000001	tg3.h
11563	MAC_MI_MODE	0x00000454	tg3.h
11564	MAC_MI_MODE_CLK_10MHZ	0x00000001	tg3.h
11565	MAC_MI_MODE_SHORT_PREAMBLE	0x00000002	tg3.h
11566	MAC_MI_MODE_AUTO_POLL	0x00000010	tg3.h
11567	MAC_MI_MODE_CORE_CLK_62MHZ	0x00008000	tg3.h
11568	MAC_MI_MODE_BASE	0x000c0000	tg3.h	XXX magic values XXX
11569	MAC_AUTO_POLL_STATUS	0x00000458	tg3.h
11570	MAC_AUTO_POLL_ERROR	0x00000001	tg3.h
11571	MAC_TX_MODE	0x0000045c	tg3.h
11572	TX_MODE_RESET	0x00000001	tg3.h
11573	TX_MODE_ENABLE	0x00000002	tg3.h
11574	TX_MODE_FLOW_CTRL_ENABLE	0x00000010	tg3.h
11575	TX_MODE_BIG_BCKOFF_ENABLE	0x00000020	tg3.h
11576	TX_MODE_LONG_PAUSE_ENABLE	0x00000040	tg3.h
11577	MAC_TX_STATUS	0x00000460	tg3.h
11578	TX_STATUS_XOFFED	0x00000001	tg3.h
11579	TX_STATUS_SENT_XOFF	0x00000002	tg3.h
11580	TX_STATUS_SENT_XON	0x00000004	tg3.h
11581	TX_STATUS_LINK_UP	0x00000008	tg3.h
11582	TX_STATUS_ODI_UNDERRUN	0x00000010	tg3.h
11583	TX_STATUS_ODI_OVERRUN	0x00000020	tg3.h
11584	MAC_TX_LENGTHS	0x00000464	tg3.h
11585	TX_LENGTHS_SLOT_TIME_MASK	0x000000ff	tg3.h
11586	TX_LENGTHS_SLOT_TIME_SHIFT	0	tg3.h
11587	TX_LENGTHS_IPG_MASK	0x00000f00	tg3.h
11588	TX_LENGTHS_IPG_SHIFT	8	tg3.h
11589	TX_LENGTHS_IPG_CRS_MASK	0x00003000	tg3.h
11590	TX_LENGTHS_IPG_CRS_SHIFT	12	tg3.h
11591	MAC_RX_MODE	0x00000468	tg3.h
11592	RX_MODE_RESET	0x00000001	tg3.h
11593	RX_MODE_ENABLE	0x00000002	tg3.h
11594	RX_MODE_FLOW_CTRL_ENABLE	0x00000004	tg3.h
11595	RX_MODE_KEEP_MAC_CTRL	0x00000008	tg3.h
11596	RX_MODE_KEEP_PAUSE	0x00000010	tg3.h
11597	RX_MODE_ACCEPT_OVERSIZED	0x00000020	tg3.h
11598	RX_MODE_ACCEPT_RUNTS	0x00000040	tg3.h
11599	RX_MODE_LEN_CHECK	0x00000080	tg3.h
11600	RX_MODE_PROMISC	0x00000100	tg3.h
11601	RX_MODE_NO_CRC_CHECK	0x00000200	tg3.h
11602	RX_MODE_KEEP_VLAN_TAG	0x00000400	tg3.h
11603	MAC_RX_STATUS	0x0000046c	tg3.h
11604	RX_STATUS_REMOTE_TX_XOFFED	0x00000001	tg3.h
11605	RX_STATUS_XOFF_RCVD	0x00000002	tg3.h
11606	RX_STATUS_XON_RCVD	0x00000004	tg3.h
11607	MAC_HASH_REG_0	0x00000470	tg3.h
11608	MAC_HASH_REG_1	0x00000474	tg3.h
11609	MAC_HASH_REG_2	0x00000478	tg3.h
11610	MAC_HASH_REG_3	0x0000047c	tg3.h
11611	MAC_RCV_RULE_0	0x00000480	tg3.h
11612	MAC_RCV_VALUE_0	0x00000484	tg3.h
11613	MAC_RCV_RULE_1	0x00000488	tg3.h
11614	MAC_RCV_VALUE_1	0x0000048c	tg3.h
11615	MAC_RCV_RULE_2	0x00000490	tg3.h
11616	MAC_RCV_VALUE_2	0x00000494	tg3.h
11617	MAC_RCV_RULE_3	0x00000498	tg3.h
11618	MAC_RCV_VALUE_3	0x0000049c	tg3.h
11619	MAC_RCV_RULE_4	0x000004a0	tg3.h
11620	MAC_RCV_VALUE_4	0x000004a4	tg3.h
11621	MAC_RCV_RULE_5	0x000004a8	tg3.h
11622	MAC_RCV_VALUE_5	0x000004ac	tg3.h
11623	MAC_RCV_RULE_6	0x000004b0	tg3.h
11624	MAC_RCV_VALUE_6	0x000004b4	tg3.h
11625	MAC_RCV_RULE_7	0x000004b8	tg3.h
11626	MAC_RCV_VALUE_7	0x000004bc	tg3.h
11627	MAC_RCV_RULE_8	0x000004c0	tg3.h
11628	MAC_RCV_VALUE_8	0x000004c4	tg3.h
11629	MAC_RCV_RULE_9	0x000004c8	tg3.h
11630	MAC_RCV_VALUE_9	0x000004cc	tg3.h
11631	MAC_RCV_RULE_10	0x000004d0	tg3.h
11632	MAC_RCV_VALUE_10	0x000004d4	tg3.h
11633	MAC_RCV_RULE_11	0x000004d8	tg3.h
11634	MAC_RCV_VALUE_11	0x000004dc	tg3.h
11635	MAC_RCV_RULE_12	0x000004e0	tg3.h
11636	MAC_RCV_VALUE_12	0x000004e4	tg3.h
11637	MAC_RCV_RULE_13	0x000004e8	tg3.h
11638	MAC_RCV_VALUE_13	0x000004ec	tg3.h
11639	MAC_RCV_RULE_14	0x000004f0	tg3.h
11640	MAC_RCV_VALUE_14	0x000004f4	tg3.h
11641	MAC_RCV_RULE_15	0x000004f8	tg3.h
11642	MAC_RCV_VALUE_15	0x000004fc	tg3.h
11643	RCV_RULE_DISABLE_MASK	0x7fffffff	tg3.h
11644	MAC_RCV_RULE_CFG	0x00000500	tg3.h
11645	RCV_RULE_CFG_DEFAULT_CLASS	0x00000008	tg3.h
11646	MAC_LOW_WMARK_MAX_RX_FRAME	0x00000504	tg3.h
11647	MAC_HASHREGU_0	0x00000520	tg3.h
11648	MAC_HASHREGU_1	0x00000524	tg3.h
11649	MAC_HASHREGU_2	0x00000528	tg3.h
11650	MAC_HASHREGU_3	0x0000052c	tg3.h
11651	MAC_EXTADDR_0_HIGH	0x00000530	tg3.h
11652	MAC_EXTADDR_0_LOW	0x00000534	tg3.h
11653	MAC_EXTADDR_1_HIGH	0x00000538	tg3.h
11654	MAC_EXTADDR_1_LOW	0x0000053c	tg3.h
11655	MAC_EXTADDR_2_HIGH	0x00000540	tg3.h
11656	MAC_EXTADDR_2_LOW	0x00000544	tg3.h
11657	MAC_EXTADDR_3_HIGH	0x00000548	tg3.h
11658	MAC_EXTADDR_3_LOW	0x0000054c	tg3.h
11659	MAC_EXTADDR_4_HIGH	0x00000550	tg3.h
11660	MAC_EXTADDR_4_LOW	0x00000554	tg3.h
11661	MAC_EXTADDR_5_HIGH	0x00000558	tg3.h
11662	MAC_EXTADDR_5_LOW	0x0000055c	tg3.h
11663	MAC_EXTADDR_6_HIGH	0x00000560	tg3.h
11664	MAC_EXTADDR_6_LOW	0x00000564	tg3.h
11665	MAC_EXTADDR_7_HIGH	0x00000568	tg3.h
11666	MAC_EXTADDR_7_LOW	0x0000056c	tg3.h
11667	MAC_EXTADDR_8_HIGH	0x00000570	tg3.h
11668	MAC_EXTADDR_8_LOW	0x00000574	tg3.h
11669	MAC_EXTADDR_9_HIGH	0x00000578	tg3.h
11670	MAC_EXTADDR_9_LOW	0x0000057c	tg3.h
11671	MAC_EXTADDR_10_HIGH	0x00000580	tg3.h
11672	MAC_EXTADDR_10_LOW	0x00000584	tg3.h
11673	MAC_EXTADDR_11_HIGH	0x00000588	tg3.h
11674	MAC_EXTADDR_11_LOW	0x0000058c	tg3.h
11675	MAC_SERDES_CFG	0x00000590	tg3.h
11676	MAC_SERDES_STAT	0x00000594	tg3.h
11677	MAC_TX_MAC_STATE_BASE	0x00000600	tg3.h	16 bytes
11678	MAC_RX_MAC_STATE_BASE	0x00000610	tg3.h	20 bytes
11679	MAC_TX_STATS_OCTETS	0x00000800	tg3.h
11680	MAC_TX_STATS_RESV1	0x00000804	tg3.h
11681	MAC_TX_STATS_COLLISIONS	0x00000808	tg3.h
11682	MAC_TX_STATS_XON_SENT	0x0000080c	tg3.h
11683	MAC_TX_STATS_XOFF_SENT	0x00000810	tg3.h
11684	MAC_TX_STATS_RESV2	0x00000814	tg3.h
11685	MAC_TX_STATS_MAC_ERRORS	0x00000818	tg3.h
11686	MAC_TX_STATS_SINGLE_COLLISIONS	0x0000081c	tg3.h
11687	MAC_TX_STATS_MULT_COLLISIONS	0x00000820	tg3.h
11688	MAC_TX_STATS_DEFERRED	0x00000824	tg3.h
11689	MAC_TX_STATS_RESV3	0x00000828	tg3.h
11690	MAC_TX_STATS_EXCESSIVE_COL	0x0000082c	tg3.h
11691	MAC_TX_STATS_LATE_COL	0x00000830	tg3.h
11692	MAC_TX_STATS_RESV4_1	0x00000834	tg3.h
11693	MAC_TX_STATS_RESV4_2	0x00000838	tg3.h
11694	MAC_TX_STATS_RESV4_3	0x0000083c	tg3.h
11695	MAC_TX_STATS_RESV4_4	0x00000840	tg3.h
11696	MAC_TX_STATS_RESV4_5	0x00000844	tg3.h
11697	MAC_TX_STATS_RESV4_6	0x00000848	tg3.h
11698	MAC_TX_STATS_RESV4_7	0x0000084c	tg3.h
11699	MAC_TX_STATS_RESV4_8	0x00000850	tg3.h
11700	MAC_TX_STATS_RESV4_9	0x00000854	tg3.h
11701	MAC_TX_STATS_RESV4_10	0x00000858	tg3.h
11702	MAC_TX_STATS_RESV4_11	0x0000085c	tg3.h
11703	MAC_TX_STATS_RESV4_12	0x00000860	tg3.h
11704	MAC_TX_STATS_RESV4_13	0x00000864	tg3.h
11705	MAC_TX_STATS_RESV4_14	0x00000868	tg3.h
11706	MAC_TX_STATS_UCAST	0x0000086c	tg3.h
11707	MAC_TX_STATS_MCAST	0x00000870	tg3.h
11708	MAC_TX_STATS_BCAST	0x00000874	tg3.h
11709	MAC_TX_STATS_RESV5_1	0x00000878	tg3.h
11710	MAC_TX_STATS_RESV5_2	0x0000087c	tg3.h
11711	MAC_RX_STATS_OCTETS	0x00000880	tg3.h
11712	MAC_RX_STATS_RESV1	0x00000884	tg3.h
11713	MAC_RX_STATS_FRAGMENTS	0x00000888	tg3.h
11714	MAC_RX_STATS_UCAST	0x0000088c	tg3.h
11715	MAC_RX_STATS_MCAST	0x00000890	tg3.h
11716	MAC_RX_STATS_BCAST	0x00000894	tg3.h
11717	MAC_RX_STATS_FCS_ERRORS	0x00000898	tg3.h
11718	MAC_RX_STATS_ALIGN_ERRORS	0x0000089c	tg3.h
11719	MAC_RX_STATS_XON_PAUSE_RECVD	0x000008a0	tg3.h
11720	MAC_RX_STATS_XOFF_PAUSE_RECVD	0x000008a4	tg3.h
11721	MAC_RX_STATS_MAC_CTRL_RECVD	0x000008a8	tg3.h
11722	MAC_RX_STATS_XOFF_ENTERED	0x000008ac	tg3.h
11723	MAC_RX_STATS_FRAME_TOO_LONG	0x000008b0	tg3.h
11724	MAC_RX_STATS_JABBERS	0x000008b4	tg3.h
11725	MAC_RX_STATS_UNDERSIZE	0x000008b8	tg3.h
11726	SNDDATAI_MODE	0x00000c00	tg3.h
11727	SNDDATAI_MODE_RESET	0x00000001	tg3.h
11728	SNDDATAI_MODE_ENABLE	0x00000002	tg3.h
11729	SNDDATAI_MODE_STAT_OFLOW_ENAB	0x00000004	tg3.h
11730	SNDDATAI_STATUS	0x00000c04	tg3.h
11731	SNDDATAI_STATUS_STAT_OFLOW	0x00000004	tg3.h
11732	SNDDATAI_STATSCTRL	0x00000c08	tg3.h
11733	SNDDATAI_SCTRL_ENABLE	0x00000001	tg3.h
11734	SNDDATAI_SCTRL_FASTUPD	0x00000002	tg3.h
11735	SNDDATAI_SCTRL_CLEAR	0x00000004	tg3.h
11736	SNDDATAI_SCTRL_FLUSH	0x00000008	tg3.h
11737	SNDDATAI_SCTRL_FORCE_ZERO	0x00000010	tg3.h
11738	SNDDATAI_STATSENAB	0x00000c0c	tg3.h
11739	SNDDATAI_STATSINCMASK	0x00000c10	tg3.h
11740	SNDDATAI_COS_CNT_0	0x00000c80	tg3.h
11741	SNDDATAI_COS_CNT_1	0x00000c84	tg3.h
11742	SNDDATAI_COS_CNT_2	0x00000c88	tg3.h
11743	SNDDATAI_COS_CNT_3	0x00000c8c	tg3.h
11744	SNDDATAI_COS_CNT_4	0x00000c90	tg3.h
11745	SNDDATAI_COS_CNT_5	0x00000c94	tg3.h
11746	SNDDATAI_COS_CNT_6	0x00000c98	tg3.h
11747	SNDDATAI_COS_CNT_7	0x00000c9c	tg3.h
11748	SNDDATAI_COS_CNT_8	0x00000ca0	tg3.h
11749	SNDDATAI_COS_CNT_9	0x00000ca4	tg3.h
11750	SNDDATAI_COS_CNT_10	0x00000ca8	tg3.h
11751	SNDDATAI_COS_CNT_11	0x00000cac	tg3.h
11752	SNDDATAI_COS_CNT_12	0x00000cb0	tg3.h
11753	SNDDATAI_COS_CNT_13	0x00000cb4	tg3.h
11754	SNDDATAI_COS_CNT_14	0x00000cb8	tg3.h
11755	SNDDATAI_COS_CNT_15	0x00000cbc	tg3.h
11756	SNDDATAI_DMA_RDQ_FULL_CNT	0x00000cc0	tg3.h
11757	SNDDATAI_DMA_PRIO_RDQ_FULL_CNT	0x00000cc4	tg3.h
11758	SNDDATAI_SDCQ_FULL_CNT	0x00000cc8	tg3.h
11759	SNDDATAI_NICRNG_SSND_PIDX_CNT	0x00000ccc	tg3.h
11760	SNDDATAI_STATS_UPDATED_CNT	0x00000cd0	tg3.h
11761	SNDDATAI_INTERRUPTS_CNT	0x00000cd4	tg3.h
11762	SNDDATAI_AVOID_INTERRUPTS_CNT	0x00000cd8	tg3.h
11763	SNDDATAI_SND_THRESH_HIT_CNT	0x00000cdc	tg3.h
11764	SNDDATAC_MODE	0x00001000	tg3.h
11765	SNDDATAC_MODE_RESET	0x00000001	tg3.h
11766	SNDDATAC_MODE_ENABLE	0x00000002	tg3.h
11767	SNDBDS_MODE	0x00001400	tg3.h
11768	SNDBDS_MODE_RESET	0x00000001	tg3.h
11769	SNDBDS_MODE_ENABLE	0x00000002	tg3.h
11770	SNDBDS_MODE_ATTN_ENABLE	0x00000004	tg3.h
11771	SNDBDS_STATUS	0x00001404	tg3.h
11772	SNDBDS_STATUS_ERROR_ATTN	0x00000004	tg3.h
11773	SNDBDS_HWDIAG	0x00001408	tg3.h
11774	SNDBDS_SEL_CON_IDX_0	0x00001440	tg3.h
11775	SNDBDS_SEL_CON_IDX_1	0x00001444	tg3.h
11776	SNDBDS_SEL_CON_IDX_2	0x00001448	tg3.h
11777	SNDBDS_SEL_CON_IDX_3	0x0000144c	tg3.h
11778	SNDBDS_SEL_CON_IDX_4	0x00001450	tg3.h
11779	SNDBDS_SEL_CON_IDX_5	0x00001454	tg3.h
11780	SNDBDS_SEL_CON_IDX_6	0x00001458	tg3.h
11781	SNDBDS_SEL_CON_IDX_7	0x0000145c	tg3.h
11782	SNDBDS_SEL_CON_IDX_8	0x00001460	tg3.h
11783	SNDBDS_SEL_CON_IDX_9	0x00001464	tg3.h
11784	SNDBDS_SEL_CON_IDX_10	0x00001468	tg3.h
11785	SNDBDS_SEL_CON_IDX_11	0x0000146c	tg3.h
11786	SNDBDS_SEL_CON_IDX_12	0x00001470	tg3.h
11787	SNDBDS_SEL_CON_IDX_13	0x00001474	tg3.h
11788	SNDBDS_SEL_CON_IDX_14	0x00001478	tg3.h
11789	SNDBDS_SEL_CON_IDX_15	0x0000147c	tg3.h
11790	SNDBDI_MODE	0x00001800	tg3.h
11791	SNDBDI_MODE_RESET	0x00000001	tg3.h
11792	SNDBDI_MODE_ENABLE	0x00000002	tg3.h
11793	SNDBDI_MODE_ATTN_ENABLE	0x00000004	tg3.h
11794	SNDBDI_STATUS	0x00001804	tg3.h
11795	SNDBDI_STATUS_ERROR_ATTN	0x00000004	tg3.h
11796	SNDBDI_IN_PROD_IDX_0	0x00001808	tg3.h
11797	SNDBDI_IN_PROD_IDX_1	0x0000180c	tg3.h
11798	SNDBDI_IN_PROD_IDX_2	0x00001810	tg3.h
11799	SNDBDI_IN_PROD_IDX_3	0x00001814	tg3.h
11800	SNDBDI_IN_PROD_IDX_4	0x00001818	tg3.h
11801	SNDBDI_IN_PROD_IDX_5	0x0000181c	tg3.h
11802	SNDBDI_IN_PROD_IDX_6	0x00001820	tg3.h
11803	SNDBDI_IN_PROD_IDX_7	0x00001824	tg3.h
11804	SNDBDI_IN_PROD_IDX_8	0x00001828	tg3.h
11805	SNDBDI_IN_PROD_IDX_9	0x0000182c	tg3.h
11806	SNDBDI_IN_PROD_IDX_10	0x00001830	tg3.h
11807	SNDBDI_IN_PROD_IDX_11	0x00001834	tg3.h
11808	SNDBDI_IN_PROD_IDX_12	0x00001838	tg3.h
11809	SNDBDI_IN_PROD_IDX_13	0x0000183c	tg3.h
11810	SNDBDI_IN_PROD_IDX_14	0x00001840	tg3.h
11811	SNDBDI_IN_PROD_IDX_15	0x00001844	tg3.h
11812	SNDBDC_MODE	0x00001c00	tg3.h
11813	SNDBDC_MODE_RESET	0x00000001	tg3.h
11814	SNDBDC_MODE_ENABLE	0x00000002	tg3.h
11815	SNDBDC_MODE_ATTN_ENABLE	0x00000004	tg3.h
11816	RCVLPC_MODE	0x00002000	tg3.h
11817	RCVLPC_MODE_RESET	0x00000001	tg3.h
11818	RCVLPC_MODE_ENABLE	0x00000002	tg3.h
11819	RCVLPC_MODE_CLASS0_ATTN_ENAB	0x00000004	tg3.h
11820	RCVLPC_MODE_MAPOOR_AATTN_ENAB	0x00000008	tg3.h
11821	RCVLPC_MODE_STAT_OFLOW_ENAB	0x00000010	tg3.h
11822	RCVLPC_STATUS	0x00002004	tg3.h
11823	RCVLPC_STATUS_CLASS0	0x00000004	tg3.h
11824	RCVLPC_STATUS_MAPOOR	0x00000008	tg3.h
11825	RCVLPC_STATUS_STAT_OFLOW	0x00000010	tg3.h
11826	RCVLPC_LOCK	0x00002008	tg3.h
11827	RCVLPC_LOCK_REQ_MASK	0x0000ffff	tg3.h
11828	RCVLPC_LOCK_REQ_SHIFT	0	tg3.h
11829	RCVLPC_LOCK_GRANT_MASK	0xffff0000	tg3.h
11830	RCVLPC_LOCK_GRANT_SHIFT	16	tg3.h
11831	RCVLPC_NON_EMPTY_BITS	0x0000200c	tg3.h
11832	RCVLPC_NON_EMPTY_BITS_MASK	0x0000ffff	tg3.h
11833	RCVLPC_CONFIG	0x00002010	tg3.h
11834	RCVLPC_STATSCTRL	0x00002014	tg3.h
11835	RCVLPC_STATSCTRL_ENABLE	0x00000001	tg3.h
11836	RCVLPC_STATSCTRL_FASTUPD	0x00000002	tg3.h
11837	RCVLPC_STATS_ENABLE	0x00002018	tg3.h
11838	RCVLPC_STATSENAB_LNGBRST_RFIX	0x00400000	tg3.h
11839	RCVLPC_STATS_INCMASK	0x0000201c	tg3.h
11840	RCVLPC_SELLST_BASE	0x00002100	tg3.h	16 16-byte entries
11841	SELLST_TAIL	0x00000004	tg3.h
11842	SELLST_CONT	0x00000008	tg3.h
11843	SELLST_UNUSED	0x0000000c	tg3.h
11844	RCVLPC_COS_CNTL_BASE	0x00002200	tg3.h	16 4-byte entries
11845	RCVLPC_DROP_FILTER_CNT	0x00002240	tg3.h
11846	RCVLPC_DMA_WQ_FULL_CNT	0x00002244	tg3.h
11847	RCVLPC_DMA_HIPRIO_WQ_FULL_CNT	0x00002248	tg3.h
11848	RCVLPC_NO_RCV_BD_CNT	0x0000224c	tg3.h
11849	RCVLPC_IN_DISCARDS_CNT	0x00002250	tg3.h
11850	RCVLPC_IN_ERRORS_CNT	0x00002254	tg3.h
11851	RCVLPC_RCV_THRESH_HIT_CNT	0x00002258	tg3.h
11852	RCVDBDI_MODE	0x00002400	tg3.h
11853	RCVDBDI_MODE_RESET	0x00000001	tg3.h
11854	RCVDBDI_MODE_ENABLE	0x00000002	tg3.h
11855	RCVDBDI_MODE_JUMBOBD_NEEDED	0x00000004	tg3.h
11856	RCVDBDI_MODE_FRM_TOO_BIG	0x00000008	tg3.h
11857	RCVDBDI_MODE_INV_RING_SZ	0x00000010	tg3.h
11858	RCVDBDI_STATUS	0x00002404	tg3.h
11859	RCVDBDI_STATUS_JUMBOBD_NEEDED	0x00000004	tg3.h
11860	RCVDBDI_STATUS_FRM_TOO_BIG	0x00000008	tg3.h
11861	RCVDBDI_STATUS_INV_RING_SZ	0x00000010	tg3.h
11862	RCVDBDI_SPLIT_FRAME_MINSZ	0x00002408	tg3.h
11863	RCVDBDI_JUMBO_BD	0x00002440	tg3.h	TG3_BDINFO_...
11864	RCVDBDI_STD_BD	0x00002450	tg3.h	TG3_BDINFO_...
11865	RCVDBDI_MINI_BD	0x00002460	tg3.h	TG3_BDINFO_...
11866	RCVDBDI_JUMBO_CON_IDX	0x00002470	tg3.h
11867	RCVDBDI_STD_CON_IDX	0x00002474	tg3.h
11868	RCVDBDI_MINI_CON_IDX	0x00002478	tg3.h
11869	RCVDBDI_BD_PROD_IDX_0	0x00002480	tg3.h
11870	RCVDBDI_BD_PROD_IDX_1	0x00002484	tg3.h
11871	RCVDBDI_BD_PROD_IDX_2	0x00002488	tg3.h
11872	RCVDBDI_BD_PROD_IDX_3	0x0000248c	tg3.h
11873	RCVDBDI_BD_PROD_IDX_4	0x00002490	tg3.h
11874	RCVDBDI_BD_PROD_IDX_5	0x00002494	tg3.h
11875	RCVDBDI_BD_PROD_IDX_6	0x00002498	tg3.h
11876	RCVDBDI_BD_PROD_IDX_7	0x0000249c	tg3.h
11877	RCVDBDI_BD_PROD_IDX_8	0x000024a0	tg3.h
11878	RCVDBDI_BD_PROD_IDX_9	0x000024a4	tg3.h
11879	RCVDBDI_BD_PROD_IDX_10	0x000024a8	tg3.h
11880	RCVDBDI_BD_PROD_IDX_11	0x000024ac	tg3.h
11881	RCVDBDI_BD_PROD_IDX_12	0x000024b0	tg3.h
11882	RCVDBDI_BD_PROD_IDX_13	0x000024b4	tg3.h
11883	RCVDBDI_BD_PROD_IDX_14	0x000024b8	tg3.h
11884	RCVDBDI_BD_PROD_IDX_15	0x000024bc	tg3.h
11885	RCVDBDI_HWDIAG	0x000024c0	tg3.h
11886	RCVDCC_MODE	0x00002800	tg3.h
11887	RCVDCC_MODE_RESET	0x00000001	tg3.h
11888	RCVDCC_MODE_ENABLE	0x00000002	tg3.h
11889	RCVDCC_MODE_ATTN_ENABLE	0x00000004	tg3.h
11890	RCVBDI_MODE	0x00002c00	tg3.h
11891	RCVBDI_MODE_RESET	0x00000001	tg3.h
11892	RCVBDI_MODE_ENABLE	0x00000002	tg3.h
11893	RCVBDI_MODE_RCB_ATTN_ENAB	0x00000004	tg3.h
11894	RCVBDI_STATUS	0x00002c04	tg3.h
11895	RCVBDI_STATUS_RCB_ATTN	0x00000004	tg3.h
11896	RCVBDI_JUMBO_PROD_IDX	0x00002c08	tg3.h
11897	RCVBDI_STD_PROD_IDX	0x00002c0c	tg3.h
11898	RCVBDI_MINI_PROD_IDX	0x00002c10	tg3.h
11899	RCVBDI_MINI_THRESH	0x00002c14	tg3.h
11900	RCVBDI_STD_THRESH	0x00002c18	tg3.h
11901	RCVBDI_JUMBO_THRESH	0x00002c1c	tg3.h
11902	RCVCC_MODE	0x00003000	tg3.h
11903	RCVCC_MODE_RESET	0x00000001	tg3.h
11904	RCVCC_MODE_ENABLE	0x00000002	tg3.h
11905	RCVCC_MODE_ATTN_ENABLE	0x00000004	tg3.h
11906	RCVCC_STATUS	0x00003004	tg3.h
11907	RCVCC_STATUS_ERROR_ATTN	0x00000004	tg3.h
11908	RCVCC_JUMP_PROD_IDX	0x00003008	tg3.h
11909	RCVCC_STD_PROD_IDX	0x0000300c	tg3.h
11910	RCVCC_MINI_PROD_IDX	0x00003010	tg3.h
11911	RCVLSC_MODE	0x00003400	tg3.h
11912	RCVLSC_MODE_RESET	0x00000001	tg3.h
11913	RCVLSC_MODE_ENABLE	0x00000002	tg3.h
11914	RCVLSC_MODE_ATTN_ENABLE	0x00000004	tg3.h
11915	RCVLSC_STATUS	0x00003404	tg3.h
11916	RCVLSC_STATUS_ERROR_ATTN	0x00000004	tg3.h
11917	MBFREE_MODE	0x00003800	tg3.h
11918	MBFREE_MODE_RESET	0x00000001	tg3.h
11919	MBFREE_MODE_ENABLE	0x00000002	tg3.h
11920	MBFREE_STATUS	0x00003804	tg3.h
11921	HOSTCC_MODE	0x00003c00	tg3.h
11922	HOSTCC_MODE_RESET	0x00000001	tg3.h
11923	HOSTCC_MODE_ENABLE	0x00000002	tg3.h
11924	HOSTCC_MODE_ATTN	0x00000004	tg3.h
11925	HOSTCC_MODE_NOW	0x00000008	tg3.h
11926	HOSTCC_MODE_FULL_STATUS	0x00000000	tg3.h
11927	HOSTCC_MODE_64BYTE	0x00000080	tg3.h
11928	HOSTCC_MODE_32BYTE	0x00000100	tg3.h
11929	HOSTCC_MODE_CLRTICK_RXBD	0x00000200	tg3.h
11930	HOSTCC_MODE_CLRTICK_TXBD	0x00000400	tg3.h
11931	HOSTCC_MODE_NOINT_ON_NOW	0x00000800	tg3.h
11932	HOSTCC_MODE_NOINT_ON_FORCE	0x00001000	tg3.h
11933	HOSTCC_STATUS	0x00003c04	tg3.h
11934	HOSTCC_STATUS_ERROR_ATTN	0x00000004	tg3.h
11935	HOSTCC_RXCOL_TICKS	0x00003c08	tg3.h
11936	LOW_RXCOL_TICKS	0x00000032	tg3.h
11937	DEFAULT_RXCOL_TICKS	0x00000048	tg3.h
11938	HIGH_RXCOL_TICKS	0x00000096	tg3.h
11939	HOSTCC_TXCOL_TICKS	0x00003c0c	tg3.h
11940	LOW_TXCOL_TICKS	0x00000096	tg3.h
11941	DEFAULT_TXCOL_TICKS	0x0000012c	tg3.h
11942	HIGH_TXCOL_TICKS	0x00000145	tg3.h
11943	HOSTCC_RXMAX_FRAMES	0x00003c10	tg3.h
11944	LOW_RXMAX_FRAMES	0x00000005	tg3.h
11945	DEFAULT_RXMAX_FRAMES	0x00000008	tg3.h
11946	HIGH_RXMAX_FRAMES	0x00000012	tg3.h
11947	HOSTCC_TXMAX_FRAMES	0x00003c14	tg3.h
11948	LOW_TXMAX_FRAMES	0x00000035	tg3.h
11949	DEFAULT_TXMAX_FRAMES	0x0000004b	tg3.h
11950	HIGH_TXMAX_FRAMES	0x00000052	tg3.h
11951	HOSTCC_RXCOAL_TICK_INT	0x00003c18	tg3.h
11952	DEFAULT_RXCOAL_TICK_INT	0x00000019	tg3.h
11953	HOSTCC_TXCOAL_TICK_INT	0x00003c1c	tg3.h
11954	DEFAULT_TXCOAL_TICK_INT	0x00000019	tg3.h
11955	HOSTCC_RXCOAL_MAXF_INT	0x00003c20	tg3.h
11956	DEFAULT_RXCOAL_MAXF_INT	0x00000005	tg3.h
11957	HOSTCC_TXCOAL_MAXF_INT	0x00003c24	tg3.h
11958	DEFAULT_TXCOAL_MAXF_INT	0x00000005	tg3.h
11959	HOSTCC_STAT_COAL_TICKS	0x00003c28	tg3.h
11960	DEFAULT_STAT_COAL_TICKS	0x000f4240	tg3.h
11961	HOSTCC_STATS_BLK_HOST_ADDR	0x00003c30	tg3.h	64-bit
11962	HOSTCC_STATUS_BLK_HOST_ADDR	0x00003c38	tg3.h	64-bit
11963	HOSTCC_STATS_BLK_NIC_ADDR	0x00003c40	tg3.h
11964	HOSTCC_STATUS_BLK_NIC_ADDR	0x00003c44	tg3.h
11965	HOSTCC_FLOW_ATTN	0x00003c48	tg3.h
11966	HOSTCC_JUMBO_CON_IDX	0x00003c50	tg3.h
11967	HOSTCC_STD_CON_IDX	0x00003c54	tg3.h
11968	HOSTCC_MINI_CON_IDX	0x00003c58	tg3.h
11969	HOSTCC_RET_PROD_IDX_0	0x00003c80	tg3.h
11970	HOSTCC_RET_PROD_IDX_1	0x00003c84	tg3.h
11971	HOSTCC_RET_PROD_IDX_2	0x00003c88	tg3.h
11972	HOSTCC_RET_PROD_IDX_3	0x00003c8c	tg3.h
11973	HOSTCC_RET_PROD_IDX_4	0x00003c90	tg3.h
11974	HOSTCC_RET_PROD_IDX_5	0x00003c94	tg3.h
11975	HOSTCC_RET_PROD_IDX_6	0x00003c98	tg3.h
11976	HOSTCC_RET_PROD_IDX_7	0x00003c9c	tg3.h
11977	HOSTCC_RET_PROD_IDX_8	0x00003ca0	tg3.h
11978	HOSTCC_RET_PROD_IDX_9	0x00003ca4	tg3.h
11979	HOSTCC_RET_PROD_IDX_10	0x00003ca8	tg3.h
11980	HOSTCC_RET_PROD_IDX_11	0x00003cac	tg3.h
11981	HOSTCC_RET_PROD_IDX_12	0x00003cb0	tg3.h
11982	HOSTCC_RET_PROD_IDX_13	0x00003cb4	tg3.h
11983	HOSTCC_RET_PROD_IDX_14	0x00003cb8	tg3.h
11984	HOSTCC_RET_PROD_IDX_15	0x00003cbc	tg3.h
11985	HOSTCC_SND_CON_IDX_0	0x00003cc0	tg3.h
11986	HOSTCC_SND_CON_IDX_1	0x00003cc4	tg3.h
11987	HOSTCC_SND_CON_IDX_2	0x00003cc8	tg3.h
11988	HOSTCC_SND_CON_IDX_3	0x00003ccc	tg3.h
11989	HOSTCC_SND_CON_IDX_4	0x00003cd0	tg3.h
11990	HOSTCC_SND_CON_IDX_5	0x00003cd4	tg3.h
11991	HOSTCC_SND_CON_IDX_6	0x00003cd8	tg3.h
11992	HOSTCC_SND_CON_IDX_7	0x00003cdc	tg3.h
11993	HOSTCC_SND_CON_IDX_8	0x00003ce0	tg3.h
11994	HOSTCC_SND_CON_IDX_9	0x00003ce4	tg3.h
11995	HOSTCC_SND_CON_IDX_10	0x00003ce8	tg3.h
11996	HOSTCC_SND_CON_IDX_11	0x00003cec	tg3.h
11997	HOSTCC_SND_CON_IDX_12	0x00003cf0	tg3.h
11998	HOSTCC_SND_CON_IDX_13	0x00003cf4	tg3.h
11999	HOSTCC_SND_CON_IDX_14	0x00003cf8	tg3.h
12000	HOSTCC_SND_CON_IDX_15	0x00003cfc	tg3.h
12001	MEMARB_MODE	0x00004000	tg3.h
12002	MEMARB_MODE_RESET	0x00000001	tg3.h
12003	MEMARB_MODE_ENABLE	0x00000002	tg3.h
12004	MEMARB_STATUS	0x00004004	tg3.h
12005	MEMARB_TRAP_ADDR_LOW	0x00004008	tg3.h
12006	MEMARB_TRAP_ADDR_HIGH	0x0000400c	tg3.h
12007	BUFMGR_MODE	0x00004400	tg3.h
12008	BUFMGR_MODE_RESET	0x00000001	tg3.h
12009	BUFMGR_MODE_ENABLE	0x00000002	tg3.h
12010	BUFMGR_MODE_ATTN_ENABLE	0x00000004	tg3.h
12011	BUFMGR_MODE_BM_TEST	0x00000008	tg3.h
12012	BUFMGR_MODE_MBLOW_ATTN_ENAB	0x00000010	tg3.h
12013	BUFMGR_STATUS	0x00004404	tg3.h
12014	BUFMGR_STATUS_ERROR	0x00000004	tg3.h
12015	BUFMGR_STATUS_MBLOW	0x00000010	tg3.h
12016	BUFMGR_MB_POOL_ADDR	0x00004408	tg3.h
12017	BUFMGR_MB_POOL_SIZE	0x0000440c	tg3.h
12018	BUFMGR_MB_RDMA_LOW_WATER	0x00004410	tg3.h
12019	DEFAULT_MB_RDMA_LOW_WATER	0x00000050	tg3.h
12020	DEFAULT_MB_RDMA_LOW_WATER_5705	0x00000000	tg3.h
12021	DEFAULT_MB_RDMA_LOW_WATER_JUMBO	0x00000130	tg3.h
12022	BUFMGR_MB_MACRX_LOW_WATER	0x00004414	tg3.h
12023	DEFAULT_MB_MACRX_LOW_WATER	0x00000020	tg3.h
12024	DEFAULT_MB_MACRX_LOW_WATER_5705	0x00000010	tg3.h
12025	DEFAULT_MB_MACRX_LOW_WATER_JUMB	0x00000098	tg3.h
12026	BUFMGR_MB_HIGH_WATER	0x00004418	tg3.h
12027	DEFAULT_MB_HIGH_WATER	0x00000060	tg3.h
12028	DEFAULT_MB_HIGH_WATER_5705	0x00000060	tg3.h
12029	DEFAULT_MB_HIGH_WATER_JUMBO	0x0000017c	tg3.h
12030	BUFMGR_RX_MB_ALLOC_REQ	0x0000441c	tg3.h
12031	BUFMGR_MB_ALLOC_BIT	0x10000000	tg3.h
12032	BUFMGR_RX_MB_ALLOC_RESP	0x00004420	tg3.h
12033	BUFMGR_TX_MB_ALLOC_REQ	0x00004424	tg3.h
12034	BUFMGR_TX_MB_ALLOC_RESP	0x00004428	tg3.h
12035	BUFMGR_DMA_DESC_POOL_ADDR	0x0000442c	tg3.h
12036	BUFMGR_DMA_DESC_POOL_SIZE	0x00004430	tg3.h
12037	BUFMGR_DMA_LOW_WATER	0x00004434	tg3.h
12038	DEFAULT_DMA_LOW_WATER	0x00000005	tg3.h
12039	BUFMGR_DMA_HIGH_WATER	0x00004438	tg3.h
12040	DEFAULT_DMA_HIGH_WATER	0x0000000a	tg3.h
12041	BUFMGR_RX_DMA_ALLOC_REQ	0x0000443c	tg3.h
12042	BUFMGR_RX_DMA_ALLOC_RESP	0x00004440	tg3.h
12043	BUFMGR_TX_DMA_ALLOC_REQ	0x00004444	tg3.h
12044	BUFMGR_TX_DMA_ALLOC_RESP	0x00004448	tg3.h
12045	BUFMGR_HWDIAG_0	0x0000444c	tg3.h
12046	BUFMGR_HWDIAG_1	0x00004450	tg3.h
12047	BUFMGR_HWDIAG_2	0x00004454	tg3.h
12048	RDMAC_MODE	0x00004800	tg3.h
12049	RDMAC_MODE_RESET	0x00000001	tg3.h
12050	RDMAC_MODE_ENABLE	0x00000002	tg3.h
12051	RDMAC_MODE_TGTABORT_ENAB	0x00000004	tg3.h
12052	RDMAC_MODE_MSTABORT_ENAB	0x00000008	tg3.h
12053	RDMAC_MODE_PARITYERR_ENAB	0x00000010	tg3.h
12054	RDMAC_MODE_ADDROFLOW_ENAB	0x00000020	tg3.h
12055	RDMAC_MODE_FIFOOFLOW_ENAB	0x00000040	tg3.h
12056	RDMAC_MODE_FIFOURUN_ENAB	0x00000080	tg3.h
12057	RDMAC_MODE_FIFOOREAD_ENAB	0x00000100	tg3.h
12058	RDMAC_MODE_LNGREAD_ENAB	0x00000200	tg3.h
12059	RDMAC_MODE_SPLIT_ENABLE	0x00000800	tg3.h
12060	RDMAC_MODE_SPLIT_RESET	0x00001000	tg3.h
12061	RDMAC_MODE_FIFO_SIZE_128	0x00020000	tg3.h
12062	RDMAC_MODE_FIFO_LONG_BURST	0x00030000	tg3.h
12063	RDMAC_STATUS	0x00004804	tg3.h
12064	RDMAC_STATUS_TGTABORT	0x00000004	tg3.h
12065	RDMAC_STATUS_MSTABORT	0x00000008	tg3.h
12066	RDMAC_STATUS_PARITYERR	0x00000010	tg3.h
12067	RDMAC_STATUS_ADDROFLOW	0x00000020	tg3.h
12068	RDMAC_STATUS_FIFOOFLOW	0x00000040	tg3.h
12069	RDMAC_STATUS_FIFOURUN	0x00000080	tg3.h
12070	RDMAC_STATUS_FIFOOREAD	0x00000100	tg3.h
12071	RDMAC_STATUS_LNGREAD	0x00000200	tg3.h
12072	WDMAC_MODE	0x00004c00	tg3.h
12073	WDMAC_MODE_RESET	0x00000001	tg3.h
12074	WDMAC_MODE_ENABLE	0x00000002	tg3.h
12075	WDMAC_MODE_TGTABORT_ENAB	0x00000004	tg3.h
12076	WDMAC_MODE_MSTABORT_ENAB	0x00000008	tg3.h
12077	WDMAC_MODE_PARITYERR_ENAB	0x00000010	tg3.h
12078	WDMAC_MODE_ADDROFLOW_ENAB	0x00000020	tg3.h
12079	WDMAC_MODE_FIFOOFLOW_ENAB	0x00000040	tg3.h
12080	WDMAC_MODE_FIFOURUN_ENAB	0x00000080	tg3.h
12081	WDMAC_MODE_FIFOOREAD_ENAB	0x00000100	tg3.h
12082	WDMAC_MODE_LNGREAD_ENAB	0x00000200	tg3.h
12083	WDMAC_MODE_RX_ACCEL	0x00000400	tg3.h
12084	WDMAC_STATUS	0x00004c04	tg3.h
12085	WDMAC_STATUS_TGTABORT	0x00000004	tg3.h
12086	WDMAC_STATUS_MSTABORT	0x00000008	tg3.h
12087	WDMAC_STATUS_PARITYERR	0x00000010	tg3.h
12088	WDMAC_STATUS_ADDROFLOW	0x00000020	tg3.h
12089	WDMAC_STATUS_FIFOOFLOW	0x00000040	tg3.h
12090	WDMAC_STATUS_FIFOURUN	0x00000080	tg3.h
12091	WDMAC_STATUS_FIFOOREAD	0x00000100	tg3.h
12092	WDMAC_STATUS_LNGREAD	0x00000200	tg3.h
12093	CPU_MODE	0x00000000	tg3.h
12094	CPU_MODE_RESET	0x00000001	tg3.h
12095	CPU_MODE_HALT	0x00000400	tg3.h
12096	CPU_STATE	0x00000004	tg3.h
12097	CPU_EVTMASK	0x00000008	tg3.h
12098	CPU_PC	0x0000001c	tg3.h
12099	CPU_INSN	0x00000020	tg3.h
12100	CPU_SPAD_UFLOW	0x00000024	tg3.h
12101	CPU_WDOG_CLEAR	0x00000028	tg3.h
12102	CPU_WDOG_VECTOR	0x0000002c	tg3.h
12103	CPU_WDOG_PC	0x00000030	tg3.h
12104	CPU_HW_BP	0x00000034	tg3.h
12105	CPU_WDOG_SAVED_STATE	0x00000044	tg3.h
12106	CPU_LAST_BRANCH_ADDR	0x00000048	tg3.h
12107	CPU_SPAD_UFLOW_SET	0x0000004c	tg3.h
12108	CPU_R0	0x00000200	tg3.h
12109	CPU_R1	0x00000204	tg3.h
12110	CPU_R2	0x00000208	tg3.h
12111	CPU_R3	0x0000020c	tg3.h
12112	CPU_R4	0x00000210	tg3.h
12113	CPU_R5	0x00000214	tg3.h
12114	CPU_R6	0x00000218	tg3.h
12115	CPU_R7	0x0000021c	tg3.h
12116	CPU_R8	0x00000220	tg3.h
12117	CPU_R9	0x00000224	tg3.h
12118	CPU_R10	0x00000228	tg3.h
12119	CPU_R11	0x0000022c	tg3.h
12120	CPU_R12	0x00000230	tg3.h
12121	CPU_R13	0x00000234	tg3.h
12122	CPU_R14	0x00000238	tg3.h
12123	CPU_R15	0x0000023c	tg3.h
12124	CPU_R16	0x00000240	tg3.h
12125	CPU_R17	0x00000244	tg3.h
12126	CPU_R18	0x00000248	tg3.h
12127	CPU_R19	0x0000024c	tg3.h
12128	CPU_R20	0x00000250	tg3.h
12129	CPU_R21	0x00000254	tg3.h
12130	CPU_R22	0x00000258	tg3.h
12131	CPU_R23	0x0000025c	tg3.h
12132	CPU_R24	0x00000260	tg3.h
12133	CPU_R25	0x00000264	tg3.h
12134	CPU_R26	0x00000268	tg3.h
12135	CPU_R27	0x0000026c	tg3.h
12136	CPU_R28	0x00000270	tg3.h
12137	CPU_R29	0x00000274	tg3.h
12138	CPU_R30	0x00000278	tg3.h
12139	CPU_R31	0x0000027c	tg3.h
12140	RX_CPU_BASE	0x00005000	tg3.h
12141	TX_CPU_BASE	0x00005400	tg3.h
12142	GRCMBOX_INTERRUPT_0	0x00005800	tg3.h	64-bit
12143	GRCMBOX_INTERRUPT_1	0x00005808	tg3.h	64-bit
12144	GRCMBOX_INTERRUPT_2	0x00005810	tg3.h	64-bit
12145	GRCMBOX_INTERRUPT_3	0x00005818	tg3.h	64-bit
12146	GRCMBOX_GENERAL_0	0x00005820	tg3.h	64-bit
12147	GRCMBOX_GENERAL_1	0x00005828	tg3.h	64-bit
12148	GRCMBOX_GENERAL_2	0x00005830	tg3.h	64-bit
12149	GRCMBOX_GENERAL_3	0x00005838	tg3.h	64-bit
12150	GRCMBOX_GENERAL_4	0x00005840	tg3.h	64-bit
12151	GRCMBOX_GENERAL_5	0x00005848	tg3.h	64-bit
12152	GRCMBOX_GENERAL_6	0x00005850	tg3.h	64-bit
12153	GRCMBOX_GENERAL_7	0x00005858	tg3.h	64-bit
12154	GRCMBOX_RELOAD_STAT	0x00005860	tg3.h	64-bit
12155	GRCMBOX_RCVSTD_PROD_IDX	0x00005868	tg3.h	64-bit
12156	GRCMBOX_RCVJUMBO_PROD_IDX	0x00005870	tg3.h	64-bit
12157	GRCMBOX_RCVMINI_PROD_IDX	0x00005878	tg3.h	64-bit
12158	GRCMBOX_RCVRET_CON_IDX_0	0x00005880	tg3.h	64-bit
12159	GRCMBOX_RCVRET_CON_IDX_1	0x00005888	tg3.h	64-bit
12160	GRCMBOX_RCVRET_CON_IDX_2	0x00005890	tg3.h	64-bit
12161	GRCMBOX_RCVRET_CON_IDX_3	0x00005898	tg3.h	64-bit
12162	GRCMBOX_RCVRET_CON_IDX_4	0x000058a0	tg3.h	64-bit
12163	GRCMBOX_RCVRET_CON_IDX_5	0x000058a8	tg3.h	64-bit
12164	GRCMBOX_RCVRET_CON_IDX_6	0x000058b0	tg3.h	64-bit
12165	GRCMBOX_RCVRET_CON_IDX_7	0x000058b8	tg3.h	64-bit
12166	GRCMBOX_RCVRET_CON_IDX_8	0x000058c0	tg3.h	64-bit
12167	GRCMBOX_RCVRET_CON_IDX_9	0x000058c8	tg3.h	64-bit
12168	GRCMBOX_RCVRET_CON_IDX_10	0x000058d0	tg3.h	64-bit
12169	GRCMBOX_RCVRET_CON_IDX_11	0x000058d8	tg3.h	64-bit
12170	GRCMBOX_RCVRET_CON_IDX_12	0x000058e0	tg3.h	64-bit
12171	GRCMBOX_RCVRET_CON_IDX_13	0x000058e8	tg3.h	64-bit
12172	GRCMBOX_RCVRET_CON_IDX_14	0x000058f0	tg3.h	64-bit
12173	GRCMBOX_RCVRET_CON_IDX_15	0x000058f8	tg3.h	64-bit
12174	GRCMBOX_SNDHOST_PROD_IDX_0	0x00005900	tg3.h	64-bit
12175	GRCMBOX_SNDHOST_PROD_IDX_1	0x00005908	tg3.h	64-bit
12176	GRCMBOX_SNDHOST_PROD_IDX_2	0x00005910	tg3.h	64-bit
12177	GRCMBOX_SNDHOST_PROD_IDX_3	0x00005918	tg3.h	64-bit
12178	GRCMBOX_SNDHOST_PROD_IDX_4	0x00005920	tg3.h	64-bit
12179	GRCMBOX_SNDHOST_PROD_IDX_5	0x00005928	tg3.h	64-bit
12180	GRCMBOX_SNDHOST_PROD_IDX_6	0x00005930	tg3.h	64-bit
12181	GRCMBOX_SNDHOST_PROD_IDX_7	0x00005938	tg3.h	64-bit
12182	GRCMBOX_SNDHOST_PROD_IDX_8	0x00005940	tg3.h	64-bit
12183	GRCMBOX_SNDHOST_PROD_IDX_9	0x00005948	tg3.h	64-bit
12184	GRCMBOX_SNDHOST_PROD_IDX_10	0x00005950	tg3.h	64-bit
12185	GRCMBOX_SNDHOST_PROD_IDX_11	0x00005958	tg3.h	64-bit
12186	GRCMBOX_SNDHOST_PROD_IDX_12	0x00005960	tg3.h	64-bit
12187	GRCMBOX_SNDHOST_PROD_IDX_13	0x00005968	tg3.h	64-bit
12188	GRCMBOX_SNDHOST_PROD_IDX_14	0x00005970	tg3.h	64-bit
12189	GRCMBOX_SNDHOST_PROD_IDX_15	0x00005978	tg3.h	64-bit
12190	GRCMBOX_SNDNIC_PROD_IDX_0	0x00005980	tg3.h	64-bit
12191	GRCMBOX_SNDNIC_PROD_IDX_1	0x00005988	tg3.h	64-bit
12192	GRCMBOX_SNDNIC_PROD_IDX_2	0x00005990	tg3.h	64-bit
12193	GRCMBOX_SNDNIC_PROD_IDX_3	0x00005998	tg3.h	64-bit
12194	GRCMBOX_SNDNIC_PROD_IDX_4	0x000059a0	tg3.h	64-bit
12195	GRCMBOX_SNDNIC_PROD_IDX_5	0x000059a8	tg3.h	64-bit
12196	GRCMBOX_SNDNIC_PROD_IDX_6	0x000059b0	tg3.h	64-bit
12197	GRCMBOX_SNDNIC_PROD_IDX_7	0x000059b8	tg3.h	64-bit
12198	GRCMBOX_SNDNIC_PROD_IDX_8	0x000059c0	tg3.h	64-bit
12199	GRCMBOX_SNDNIC_PROD_IDX_9	0x000059c8	tg3.h	64-bit
12200	GRCMBOX_SNDNIC_PROD_IDX_10	0x000059d0	tg3.h	64-bit
12201	GRCMBOX_SNDNIC_PROD_IDX_11	0x000059d8	tg3.h	64-bit
12202	GRCMBOX_SNDNIC_PROD_IDX_12	0x000059e0	tg3.h	64-bit
12203	GRCMBOX_SNDNIC_PROD_IDX_13	0x000059e8	tg3.h	64-bit
12204	GRCMBOX_SNDNIC_PROD_IDX_14	0x000059f0	tg3.h	64-bit
12205	GRCMBOX_SNDNIC_PROD_IDX_15	0x000059f8	tg3.h	64-bit
12206	GRCMBOX_HIGH_PRIO_EV_VECTOR	0x00005a00	tg3.h
12207	GRCMBOX_HIGH_PRIO_EV_MASK	0x00005a04	tg3.h
12208	GRCMBOX_LOW_PRIO_EV_VEC	0x00005a08	tg3.h
12209	GRCMBOX_LOW_PRIO_EV_MASK	0x00005a0c	tg3.h
12210	FTQ_RESET	0x00005c00	tg3.h
12211	FTQ_RESET_DMA_READ_QUEUE	(1 << 1)	tg3.h
12212	FTQ_RESET_DMA_HIGH_PRI_READ	(1 << 2)	tg3.h
12213	FTQ_RESET_SEND_BD_COMPLETION	(1 << 4)	tg3.h
12214	FTQ_RESET_DMA_WRITE	(1 << 6)	tg3.h
12215	FTQ_RESET_DMA_HIGH_PRI_WRITE	(1 << 7)	tg3.h
12216	FTQ_RESET_SEND_DATA_COMPLETION	(1 << 9)	tg3.h
12217	FTQ_RESET_HOST_COALESCING	(1 << 10)	tg3.h
12218	FTQ_RESET_MAC_TX	(1 << 11)	tg3.h
12219	FTQ_RESET_RX_BD_COMPLETE	(1 << 13)	tg3.h
12220	FTQ_RESET_RX_LIST_PLCMT	(1 << 14)	tg3.h
12221	FTQ_RESET_RX_DATA_COMPLETION	(1 << 16)	tg3.h
12222	FTQ_DMA_NORM_READ_CTL	0x00005c10	tg3.h
12223	FTQ_DMA_NORM_READ_FULL_CNT	0x00005c14	tg3.h
12224	FTQ_DMA_NORM_READ_FIFO_ENQDEQ	0x00005c18	tg3.h
12225	FTQ_DMA_NORM_READ_WRITE_PEEK	0x00005c1c	tg3.h
12226	FTQ_DMA_HIGH_READ_CTL	0x00005c20	tg3.h
12227	FTQ_DMA_HIGH_READ_FULL_CNT	0x00005c24	tg3.h
12228	FTQ_DMA_HIGH_READ_FIFO_ENQDEQ	0x00005c28	tg3.h
12229	FTQ_DMA_HIGH_READ_WRITE_PEEK	0x00005c2c	tg3.h
12230	FTQ_DMA_COMP_DISC_CTL	0x00005c30	tg3.h
12231	FTQ_DMA_COMP_DISC_FULL_CNT	0x00005c34	tg3.h
12232	FTQ_DMA_COMP_DISC_FIFO_ENQDEQ	0x00005c38	tg3.h
12233	FTQ_DMA_COMP_DISC_WRITE_PEEK	0x00005c3c	tg3.h
12234	FTQ_SEND_BD_COMP_CTL	0x00005c40	tg3.h
12235	FTQ_SEND_BD_COMP_FULL_CNT	0x00005c44	tg3.h
12236	FTQ_SEND_BD_COMP_FIFO_ENQDEQ	0x00005c48	tg3.h
12237	FTQ_SEND_BD_COMP_WRITE_PEEK	0x00005c4c	tg3.h
12238	FTQ_SEND_DATA_INIT_CTL	0x00005c50	tg3.h
12239	FTQ_SEND_DATA_INIT_FULL_CNT	0x00005c54	tg3.h
12240	FTQ_SEND_DATA_INIT_FIFO_ENQDEQ	0x00005c58	tg3.h
12241	FTQ_SEND_DATA_INIT_WRITE_PEEK	0x00005c5c	tg3.h
12242	FTQ_DMA_NORM_WRITE_CTL	0x00005c60	tg3.h
12243	FTQ_DMA_NORM_WRITE_FULL_CNT	0x00005c64	tg3.h
12244	FTQ_DMA_NORM_WRITE_FIFO_ENQDEQ	0x00005c68	tg3.h
12245	FTQ_DMA_NORM_WRITE_WRITE_PEEK	0x00005c6c	tg3.h
12246	FTQ_DMA_HIGH_WRITE_CTL	0x00005c70	tg3.h
12247	FTQ_DMA_HIGH_WRITE_FULL_CNT	0x00005c74	tg3.h
12248	FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ	0x00005c78	tg3.h
12249	FTQ_DMA_HIGH_WRITE_WRITE_PEEK	0x00005c7c	tg3.h
12250	FTQ_SWTYPE1_CTL	0x00005c80	tg3.h
12251	FTQ_SWTYPE1_FULL_CNT	0x00005c84	tg3.h
12252	FTQ_SWTYPE1_FIFO_ENQDEQ	0x00005c88	tg3.h
12253	FTQ_SWTYPE1_WRITE_PEEK	0x00005c8c	tg3.h
12254	FTQ_SEND_DATA_COMP_CTL	0x00005c90	tg3.h
12255	FTQ_SEND_DATA_COMP_FULL_CNT	0x00005c94	tg3.h
12256	FTQ_SEND_DATA_COMP_FIFO_ENQDEQ	0x00005c98	tg3.h
12257	FTQ_SEND_DATA_COMP_WRITE_PEEK	0x00005c9c	tg3.h
12258	FTQ_HOST_COAL_CTL	0x00005ca0	tg3.h
12259	FTQ_HOST_COAL_FULL_CNT	0x00005ca4	tg3.h
12260	FTQ_HOST_COAL_FIFO_ENQDEQ	0x00005ca8	tg3.h
12261	FTQ_HOST_COAL_WRITE_PEEK	0x00005cac	tg3.h
12262	FTQ_MAC_TX_CTL	0x00005cb0	tg3.h
12263	FTQ_MAC_TX_FULL_CNT	0x00005cb4	tg3.h
12264	FTQ_MAC_TX_FIFO_ENQDEQ	0x00005cb8	tg3.h
12265	FTQ_MAC_TX_WRITE_PEEK	0x00005cbc	tg3.h
12266	FTQ_MB_FREE_CTL	0x00005cc0	tg3.h
12267	FTQ_MB_FREE_FULL_CNT	0x00005cc4	tg3.h
12268	FTQ_MB_FREE_FIFO_ENQDEQ	0x00005cc8	tg3.h
12269	FTQ_MB_FREE_WRITE_PEEK	0x00005ccc	tg3.h
12270	FTQ_RCVBD_COMP_CTL	0x00005cd0	tg3.h
12271	FTQ_RCVBD_COMP_FULL_CNT	0x00005cd4	tg3.h
12272	FTQ_RCVBD_COMP_FIFO_ENQDEQ	0x00005cd8	tg3.h
12273	FTQ_RCVBD_COMP_WRITE_PEEK	0x00005cdc	tg3.h
12274	FTQ_RCVLST_PLMT_CTL	0x00005ce0	tg3.h
12275	FTQ_RCVLST_PLMT_FULL_CNT	0x00005ce4	tg3.h
12276	FTQ_RCVLST_PLMT_FIFO_ENQDEQ	0x00005ce8	tg3.h
12277	FTQ_RCVLST_PLMT_WRITE_PEEK	0x00005cec	tg3.h
12278	FTQ_RCVDATA_INI_CTL	0x00005cf0	tg3.h
12279	FTQ_RCVDATA_INI_FULL_CNT	0x00005cf4	tg3.h
12280	FTQ_RCVDATA_INI_FIFO_ENQDEQ	0x00005cf8	tg3.h
12281	FTQ_RCVDATA_INI_WRITE_PEEK	0x00005cfc	tg3.h
12282	FTQ_RCVDATA_COMP_CTL	0x00005d00	tg3.h
12283	FTQ_RCVDATA_COMP_FULL_CNT	0x00005d04	tg3.h
12284	FTQ_RCVDATA_COMP_FIFO_ENQDEQ	0x00005d08	tg3.h
12285	FTQ_RCVDATA_COMP_WRITE_PEEK	0x00005d0c	tg3.h
12286	FTQ_SWTYPE2_CTL	0x00005d10	tg3.h
12287	FTQ_SWTYPE2_FULL_CNT	0x00005d14	tg3.h
12288	FTQ_SWTYPE2_FIFO_ENQDEQ	0x00005d18	tg3.h
12289	FTQ_SWTYPE2_WRITE_PEEK	0x00005d1c	tg3.h
12290	MSGINT_MODE	0x00006000	tg3.h
12291	MSGINT_MODE_RESET	0x00000001	tg3.h
12292	MSGINT_MODE_ENABLE	0x00000002	tg3.h
12293	MSGINT_STATUS	0x00006004	tg3.h
12294	MSGINT_FIFO	0x00006008	tg3.h
12295	DMAC_MODE	0x00006400	tg3.h
12296	DMAC_MODE_RESET	0x00000001	tg3.h
12297	DMAC_MODE_ENABLE	0x00000002	tg3.h
12298	GRC_MODE	0x00006800	tg3.h
12299	GRC_MODE_UPD_ON_COAL	0x00000001	tg3.h
12300	GRC_MODE_BSWAP_NONFRM_DATA	0x00000002	tg3.h
12301	GRC_MODE_WSWAP_NONFRM_DATA	0x00000004	tg3.h
12302	GRC_MODE_BSWAP_DATA	0x00000010	tg3.h
12303	GRC_MODE_WSWAP_DATA	0x00000020	tg3.h
12304	GRC_MODE_SPLITHDR	0x00000100	tg3.h
12305	GRC_MODE_NOFRM_CRACKING	0x00000200	tg3.h
12306	GRC_MODE_INCL_CRC	0x00000400	tg3.h
12307	GRC_MODE_ALLOW_BAD_FRMS	0x00000800	tg3.h
12308	GRC_MODE_NOIRQ_ON_SENDS	0x00002000	tg3.h
12309	GRC_MODE_NOIRQ_ON_RCV	0x00004000	tg3.h
12310	GRC_MODE_FORCE_PCI32BIT	0x00008000	tg3.h
12311	GRC_MODE_HOST_STACKUP	0x00010000	tg3.h
12312	GRC_MODE_HOST_SENDBDS	0x00020000	tg3.h
12313	GRC_MODE_NO_TX_PHDR_CSUM	0x00100000	tg3.h
12314	GRC_MODE_NO_RX_PHDR_CSUM	0x00800000	tg3.h
12315	GRC_MODE_IRQ_ON_TX_CPU_ATTN	0x01000000	tg3.h
12316	GRC_MODE_IRQ_ON_RX_CPU_ATTN	0x02000000	tg3.h
12317	GRC_MODE_IRQ_ON_MAC_ATTN	0x04000000	tg3.h
12318	GRC_MODE_IRQ_ON_DMA_ATTN	0x08000000	tg3.h
12319	GRC_MODE_IRQ_ON_FLOW_ATTN	0x10000000	tg3.h
12320	GRC_MODE_4X_NIC_SEND_RINGS	0x20000000	tg3.h
12321	GRC_MODE_MCAST_FRM_ENABLE	0x40000000	tg3.h
12322	GRC_MISC_CFG	0x00006804	tg3.h
12323	GRC_MISC_CFG_CORECLK_RESET	0x00000001	tg3.h
12324	GRC_MISC_CFG_PRESCALAR_MASK	0x000000fe	tg3.h
12325	GRC_MISC_CFG_PRESCALAR_SHIFT	1	tg3.h
12326	GRC_MISC_CFG_BOARD_ID_MASK	0x0001e000	tg3.h
12327	GRC_MISC_CFG_BOARD_ID_5700	0x0001e000	tg3.h
12328	GRC_MISC_CFG_BOARD_ID_5701	0x00000000	tg3.h
12329	GRC_MISC_CFG_BOARD_ID_5702FE	0x00004000	tg3.h
12330	GRC_MISC_CFG_BOARD_ID_5703	0x00000000	tg3.h
12331	GRC_MISC_CFG_BOARD_ID_5703S	0x00002000	tg3.h
12332	GRC_MISC_CFG_BOARD_ID_5704	0x00000000	tg3.h
12333	GRC_MISC_CFG_BOARD_ID_5704CIOBE	0x00004000	tg3.h
12334	GRC_MISC_CFG_BOARD_ID_5704_A2	0x00008000	tg3.h
12335	GRC_MISC_CFG_BOARD_ID_5788	0x00010000	tg3.h
12336	GRC_MISC_CFG_BOARD_ID_5788M	0x00018000	tg3.h
12337	GRC_MISC_CFG_BOARD_ID_AC91002A1	0x00018000	tg3.h
12338	GRC_MISC_CFG_KEEP_GPHY_POWER	0x04000000	tg3.h
12339	GRC_LOCAL_CTRL	0x00006808	tg3.h
12340	GRC_LCLCTRL_INT_ACTIVE	0x00000001	tg3.h
12341	GRC_LCLCTRL_CLEARINT	0x00000002	tg3.h
12342	GRC_LCLCTRL_SETINT	0x00000004	tg3.h
12343	GRC_LCLCTRL_INT_ON_ATTN	0x00000008	tg3.h
12344	GRC_LCLCTRL_GPIO_INPUT0	0x00000100	tg3.h
12345	GRC_LCLCTRL_GPIO_INPUT1	0x00000200	tg3.h
12346	GRC_LCLCTRL_GPIO_INPUT2	0x00000400	tg3.h
12347	GRC_LCLCTRL_GPIO_OE0	0x00000800	tg3.h
12348	GRC_LCLCTRL_GPIO_OE1	0x00001000	tg3.h
12349	GRC_LCLCTRL_GPIO_OE2	0x00002000	tg3.h
12350	GRC_LCLCTRL_GPIO_OUTPUT0	0x00004000	tg3.h
12351	GRC_LCLCTRL_GPIO_OUTPUT1	0x00008000	tg3.h
12352	GRC_LCLCTRL_GPIO_OUTPUT2	0x00010000	tg3.h
12353	GRC_LCLCTRL_EXTMEM_ENABLE	0x00020000	tg3.h
12354	GRC_LCLCTRL_MEMSZ_MASK	0x001c0000	tg3.h
12355	GRC_LCLCTRL_MEMSZ_256K	0x00000000	tg3.h
12356	GRC_LCLCTRL_MEMSZ_512K	0x00040000	tg3.h
12357	GRC_LCLCTRL_MEMSZ_1M	0x00080000	tg3.h
12358	GRC_LCLCTRL_MEMSZ_2M	0x000c0000	tg3.h
12359	GRC_LCLCTRL_MEMSZ_4M	0x00100000	tg3.h
12360	GRC_LCLCTRL_MEMSZ_8M	0x00140000	tg3.h
12361	GRC_LCLCTRL_MEMSZ_16M	0x00180000	tg3.h
12362	GRC_LCLCTRL_BANK_SELECT	0x00200000	tg3.h
12363	GRC_LCLCTRL_SSRAM_TYPE	0x00400000	tg3.h
12364	GRC_LCLCTRL_AUTO_SEEPROM	0x01000000	tg3.h
12365	GRC_TIMER	0x0000680c	tg3.h
12366	GRC_RX_CPU_EVENT	0x00006810	tg3.h
12367	GRC_RX_TIMER_REF	0x00006814	tg3.h
12368	GRC_RX_CPU_SEM	0x00006818	tg3.h
12369	GRC_REMOTE_RX_CPU_ATTN	0x0000681c	tg3.h
12370	GRC_TX_CPU_EVENT	0x00006820	tg3.h
12371	GRC_TX_TIMER_REF	0x00006824	tg3.h
12372	GRC_TX_CPU_SEM	0x00006828	tg3.h
12373	GRC_REMOTE_TX_CPU_ATTN	0x0000682c	tg3.h
12374	GRC_MEM_POWER_UP	0x00006830	tg3.h	64-bit
12375	GRC_EEPROM_ADDR	0x00006838	tg3.h
12376	EEPROM_ADDR_WRITE	0x00000000	tg3.h
12377	EEPROM_ADDR_READ	0x80000000	tg3.h
12378	EEPROM_ADDR_COMPLETE	0x40000000	tg3.h
12379	EEPROM_ADDR_FSM_RESET	0x20000000	tg3.h
12380	EEPROM_ADDR_DEVID_MASK	0x1c000000	tg3.h
12381	EEPROM_ADDR_DEVID_SHIFT	26	tg3.h
12382	EEPROM_ADDR_START	0x02000000	tg3.h
12383	EEPROM_ADDR_CLKPERD_SHIFT	16	tg3.h
12384	EEPROM_ADDR_ADDR_MASK	0x0000ffff	tg3.h
12385	EEPROM_ADDR_ADDR_SHIFT	0	tg3.h
12386	EEPROM_DEFAULT_CLOCK_PERIOD	0x60	tg3.h
12387	EEPROM_CHIP_SIZE	(64 * 1024)	tg3.h
12388	GRC_EEPROM_DATA	0x0000683c	tg3.h
12389	GRC_EEPROM_CTRL	0x00006840	tg3.h
12390	GRC_MDI_CTRL	0x00006844	tg3.h
12391	GRC_SEEPROM_DELAY	0x00006848	tg3.h
12392	NVRAM_CMD	0x00007000	tg3.h
12393	NVRAM_CMD_RESET	0x00000001	tg3.h
12394	NVRAM_CMD_DONE	0x00000008	tg3.h
12395	NVRAM_CMD_GO	0x00000010	tg3.h
12396	NVRAM_CMD_WR	0x00000020	tg3.h
12397	NVRAM_CMD_RD	0x00000000	tg3.h
12398	NVRAM_CMD_ERASE	0x00000040	tg3.h
12399	NVRAM_CMD_FIRST	0x00000080	tg3.h
12400	NVRAM_CMD_LAST	0x00000100	tg3.h
12401	NVRAM_STAT	0x00007004	tg3.h
12402	NVRAM_WRDATA	0x00007008	tg3.h
12403	NVRAM_ADDR	0x0000700c	tg3.h
12404	NVRAM_ADDR_MSK	0x00ffffff	tg3.h
12405	NVRAM_RDDATA	0x00007010	tg3.h
12406	NVRAM_CFG1	0x00007014	tg3.h
12407	NVRAM_CFG1_FLASHIF_ENAB	0x00000001	tg3.h
12408	NVRAM_CFG1_BUFFERED_MODE	0x00000002	tg3.h
12409	NVRAM_CFG1_PASS_THRU	0x00000004	tg3.h
12410	NVRAM_CFG1_BIT_BANG	0x00000008	tg3.h
12411	NVRAM_CFG1_COMPAT_BYPASS	0x80000000	tg3.h
12412	NVRAM_CFG2	0x00007018	tg3.h
12413	NVRAM_CFG3	0x0000701c	tg3.h
12414	NVRAM_SWARB	0x00007020	tg3.h
12415	SWARB_REQ_SET0	0x00000001	tg3.h
12416	SWARB_REQ_SET1	0x00000002	tg3.h
12417	SWARB_REQ_SET2	0x00000004	tg3.h
12418	SWARB_REQ_SET3	0x00000008	tg3.h
12419	SWARB_REQ_CLR0	0x00000010	tg3.h
12420	SWARB_REQ_CLR1	0x00000020	tg3.h
12421	SWARB_REQ_CLR2	0x00000040	tg3.h
12422	SWARB_REQ_CLR3	0x00000080	tg3.h
12423	SWARB_GNT0	0x00000100	tg3.h
12424	SWARB_GNT1	0x00000200	tg3.h
12425	SWARB_GNT2	0x00000400	tg3.h
12426	SWARB_GNT3	0x00000800	tg3.h
12427	SWARB_REQ0	0x00001000	tg3.h
12428	SWARB_REQ1	0x00002000	tg3.h
12429	SWARB_REQ2	0x00004000	tg3.h
12430	SWARB_REQ3	0x00008000	tg3.h
12431	NVRAM_BUFFERED_PAGE_SIZE	264	tg3.h
12432	NVRAM_BUFFERED_PAGE_POS	9	tg3.h
12433	NIC_SRAM_WIN_BASE	0x00008000	tg3.h
12434	NIC_SRAM_PAGE_ZERO	0x00000000	tg3.h
12435	NIC_SRAM_SEND_RCB	0x00000100	tg3.h	16 * TG3_BDINFO_...
12436	NIC_SRAM_RCV_RET_RCB	0x00000200	tg3.h	16 * TG3_BDINFO_...
12437	NIC_SRAM_STATS_BLK	0x00000300	tg3.h
12438	NIC_SRAM_STATUS_BLK	0x00000b00	tg3.h
12439	NIC_SRAM_FIRMWARE_MBOX	0x00000b50	tg3.h
12440	NIC_SRAM_FIRMWARE_MBOX_MAGIC1	0x4B657654	tg3.h
12441	NIC_SRAM_FIRMWARE_MBOX_MAGIC2	0x4861764b	tg3.h	!dma on linkchg
12442	NIC_SRAM_DATA_SIG	0x00000b54	tg3.h
12443	NIC_SRAM_DATA_SIG_MAGIC	0x4b657654	tg3.h	ascii for 'KevT'
12444	NIC_SRAM_DATA_CFG	0x00000b58	tg3.h
12445	NIC_SRAM_DATA_CFG_LED_MODE_MASK	0x0000000c	tg3.h
12446	NIC_SRAM_DATA_CFG_LED_MODE_UNKN	0x00000000	tg3.h
12447	NIC_SRAM_DATA_CFG_LED_TRIPLE_SP	0x00000004	tg3.h
12448	NIC_SRAM_DATA_CFG_LED_OPEN_DRAI	0x00000004	tg3.h
12449	NIC_SRAM_DATA_CFG_LED_LINK_SPD	0x00000008	tg3.h
12450	NIC_SRAM_DATA_CFG_LED_OUTPUT	0x00000008	tg3.h
12451	NIC_SRAM_DATA_CFG_PHY_TYPE_MASK	0x00000030	tg3.h
12452	NIC_SRAM_DATA_CFG_PHY_TYPE_UNKN	0x00000000	tg3.h
12453	NIC_SRAM_DATA_CFG_PHY_TYPE_COPP	0x00000010	tg3.h
12454	NIC_SRAM_DATA_CFG_PHY_TYPE_FIBE	0x00000020	tg3.h
12455	NIC_SRAM_DATA_CFG_WOL_ENABLE	0x00000040	tg3.h
12456	NIC_SRAM_DATA_CFG_ASF_ENABLE	0x00000080	tg3.h
12457	NIC_SRAM_DATA_CFG_EEPROM_WP	0x00000100	tg3.h
12458	NIC_SRAM_DATA_CFG_MINI_PCI	0x00001000	tg3.h
12459	NIC_SRAM_DATA_CFG_FIBER_WOL	0x00004000	tg3.h
12460	NIC_SRAM_DATA_PHY_ID	0x00000b74	tg3.h
12461	NIC_SRAM_DATA_PHY_ID1_MASK	0xffff0000	tg3.h
12462	NIC_SRAM_DATA_PHY_ID2_MASK	0x0000ffff	tg3.h
12463	NIC_SRAM_FW_CMD_MBOX	0x00000b78	tg3.h
12464	FWCMD_NICDRV_ALIVE	0x00000001	tg3.h
12465	FWCMD_NICDRV_PAUSE_FW	0x00000002	tg3.h
12466	FWCMD_NICDRV_IPV4ADDR_CHG	0x00000003	tg3.h
12467	FWCMD_NICDRV_IPV6ADDR_CHG	0x00000004	tg3.h
12468	FWCMD_NICDRV_FIX_DMAR	0x00000005	tg3.h
12469	FWCMD_NICDRV_FIX_DMAW	0x00000006	tg3.h
12470	NIC_SRAM_FW_CMD_LEN_MBOX	0x00000b7c	tg3.h
12471	NIC_SRAM_FW_CMD_DATA_MBOX	0x00000b80	tg3.h
12472	NIC_SRAM_FW_ASF_STATUS_MBOX	0x00000c00	tg3.h
12473	NIC_SRAM_FW_DRV_STATE_MBOX	0x00000c04	tg3.h
12474	DRV_STATE_START	0x00000001	tg3.h
12475	DRV_STATE_UNLOAD	0x00000002	tg3.h
12476	DRV_STATE_WOL	0x00000003	tg3.h
12477	DRV_STATE_SUSPEND	0x00000004	tg3.h
12478	NIC_SRAM_FW_RESET_TYPE_MBOX	0x00000c08	tg3.h
12479	NIC_SRAM_MAC_ADDR_HIGH_MBOX	0x00000c14	tg3.h
12480	NIC_SRAM_MAC_ADDR_LOW_MBOX	0x00000c18	tg3.h
12481	NIC_SRAM_RX_MINI_BUFFER_DESC	0x00001000	tg3.h
12482	NIC_SRAM_DMA_DESC_POOL_BASE	0x00002000	tg3.h
12483	NIC_SRAM_DMA_DESC_POOL_SIZE	0x00002000	tg3.h
12484	NIC_SRAM_TX_BUFFER_DESC	0x00004000	tg3.h	512 entries
12485	NIC_SRAM_RX_BUFFER_DESC	0x00006000	tg3.h	256 entries
12486	NIC_SRAM_RX_JUMBO_BUFFER_DESC	0x00007000	tg3.h	256 entries
12487	NIC_SRAM_MBUF_POOL_BASE	0x00008000	tg3.h
12488	NIC_SRAM_MBUF_POOL_SIZE96	0x00018000	tg3.h
12489	NIC_SRAM_MBUF_POOL_SIZE64	0x00010000	tg3.h
12490	NIC_SRAM_MBUF_POOL_BASE5705	0x00010000	tg3.h
12491	NIC_SRAM_MBUF_POOL_SIZE5705	0x0000e000	tg3.h
12492	PHY_ADDR	0x01	tg3.h
12493	TG3_BMCR_SPEED1000	0x0040	tg3.h
12494	MII_TG3_CTRL	0x09	tg3.h	1000-baseT control register
12495	MII_TG3_CTRL_ADV_1000_HALF	0x0100	tg3.h
12496	MII_TG3_CTRL_ADV_1000_FULL	0x0200	tg3.h
12497	MII_TG3_CTRL_AS_MASTER	0x0800	tg3.h
12498	MII_TG3_CTRL_ENABLE_AS_MASTER	0x1000	tg3.h
12499	MII_TG3_EXT_CTRL	0x10	tg3.h	Extended control register
12500	MII_TG3_EXT_CTRL_LNK3_LED_MODE	0x0002	tg3.h
12501	MII_TG3_EXT_CTRL_TBI	0x8000	tg3.h
12502	MII_TG3_EXT_STAT	0x11	tg3.h	Extended status register
12503	MII_TG3_EXT_STAT_LPASS	0x0100	tg3.h
12504	MII_TG3_DSP_RW_PORT	0x15	tg3.h	DSP coefficient read/write port
12505	MII_TG3_DSP_ADDRESS	0x17	tg3.h	DSP address register
12506	MII_TG3_AUX_CTRL	0x18	tg3.h	auxilliary control register
12507	MII_TG3_AUX_STAT	0x19	tg3.h	auxilliary status register
12508	MII_TG3_AUX_STAT_LPASS	0x0004	tg3.h
12509	MII_TG3_AUX_STAT_SPDMASK	0x0700	tg3.h
12510	MII_TG3_AUX_STAT_10HALF	0x0100	tg3.h
12511	MII_TG3_AUX_STAT_10FULL	0x0200	tg3.h
12512	MII_TG3_AUX_STAT_100HALF	0x0300	tg3.h
12513	MII_TG3_AUX_STAT_100_4	0x0400	tg3.h
12514	MII_TG3_AUX_STAT_100FULL	0x0500	tg3.h
12515	MII_TG3_AUX_STAT_1000HALF	0x0600	tg3.h
12516	MII_TG3_AUX_STAT_1000FULL	0x0700	tg3.h
12517	MII_TG3_ISTAT	0x1a	tg3.h	IRQ status register
12518	MII_TG3_IMASK	0x1b	tg3.h	IRQ mask register
12519	MII_TG3_INT_LINKCHG	0x0002	tg3.h
12520	MII_TG3_INT_SPEEDCHG	0x0004	tg3.h
12521	MII_TG3_INT_DUPLEXCHG	0x0008	tg3.h
12522	MII_TG3_INT_ANEG_PAGE_RX	0x0400	tg3.h
12523	TXD_ADDR	0x00UL	tg3.h	64-bit
12524	TXD_LEN_FLAGS	0x08UL	tg3.h	32-bit (upper 16-bits are len)
12525	TXD_VLAN_TAG	0x0cUL	tg3.h	32-bit (upper 16-bits are tag)
12526	TXD_SIZE	0x10UL	tg3.h
12527	TG3_HW_STATUS_SIZE	0x50	tg3.h
12528	FALSE	0	tlan.h
12529	TRUE	1	tlan.h
12530	TLAN_MIN_FRAME_SIZE	64	tlan.h
12531	TLAN_MAX_FRAME_SIZE	1600	tlan.h
12532	TLAN_NUM_RX_LISTS	4	tlan.h
12533	TLAN_NUM_TX_LISTS	2	tlan.h
12534	TLAN_IGNORE	0	tlan.h
12535	TLAN_RECORD	1	tlan.h
12536	TLAN_DEBUG_GNRL	0x0001	tlan.h
12537	TLAN_DEBUG_TX	0x0002	tlan.h
12538	TLAN_DEBUG_RX	0x0004	tlan.h
12539	TLAN_DEBUG_LIST	0x0008	tlan.h
12540	TLAN_DEBUG_PROBE	0x0010	tlan.h
12541	TX_TIMEOUT	(10*HZ)	tlan.h	We need time for auto-neg
12542	MAX_TLAN_BOARDS	8	tlan.h	Max number of boards installed at a time
12543	PCI_DEVICE_ID_NETELLIGENT_10_T2	0xB012	tlan.h
12544	PCI_DEVICE_ID_NETELLIGENT_10_10	0xB030	tlan.h
12545	PCI_DEVICE_ID_OLICOM_OC2183	0x0013	tlan.h
12546	PCI_DEVICE_ID_OLICOM_OC2325	0x0012	tlan.h
12547	PCI_DEVICE_ID_OLICOM_OC2326	0x0014	tlan.h
12548	TLAN_ADAPTER_NONE	0x00000000	tlan.h
12549	TLAN_ADAPTER_UNMANAGED_PHY	0x00000001	tlan.h
12550	TLAN_ADAPTER_BIT_RATE_PHY	0x00000002	tlan.h
12551	TLAN_ADAPTER_USE_INTERN_10	0x00000004	tlan.h
12552	TLAN_ADAPTER_ACTIVITY_LED	0x00000008	tlan.h
12553	TLAN_SPEED_DEFAULT	0	tlan.h
12554	TLAN_SPEED_10	10	tlan.h
12555	TLAN_SPEED_100	100	tlan.h
12556	TLAN_DUPLEX_DEFAULT	0	tlan.h
12557	TLAN_DUPLEX_HALF	1	tlan.h
12558	TLAN_DUPLEX_FULL	2	tlan.h
12559	EISA_ID	0xc80	tlan.h	EISA ID Registers
12560	EISA_ID0	0xc80	tlan.h	EISA ID Register 0
12561	EISA_ID1	0xc81	tlan.h	EISA ID Register 1
12562	EISA_ID2	0xc82	tlan.h	EISA ID Register 2
12563	EISA_ID3	0xc83	tlan.h	EISA ID Register 3
12564	EISA_CR	0xc84	tlan.h	EISA Control Register
12565	EISA_REG0	0xc88	tlan.h	EISA Configuration Register 0
12566	EISA_REG1	0xc89	tlan.h	EISA Configuration Register 1
12567	EISA_REG2	0xc8a	tlan.h	EISA Configuration Register 2
12568	EISA_REG3	0xc8f	tlan.h	EISA Configuration Register 3
12569	EISA_APROM	0xc90	tlan.h	Ethernet Address PROM
12570	TLAN_BUFFERS_PER_LIST	10	tlan.h
12571	TLAN_LAST_BUFFER	0x80000000	tlan.h
12572	TLAN_CSTAT_UNUSED	0x8000	tlan.h
12573	TLAN_CSTAT_FRM_CMP	0x4000	tlan.h
12574	TLAN_CSTAT_READY	0x3000	tlan.h
12575	TLAN_CSTAT_EOC	0x0800	tlan.h
12576	TLAN_CSTAT_RX_ERROR	0x0400	tlan.h
12577	TLAN_CSTAT_PASS_CRC	0x0200	tlan.h
12578	TLAN_CSTAT_DP_PR	0x0100	tlan.h
12579	TLAN_PHY_MAX_ADDR	0x1F	tlan.h
12580	TLAN_PHY_NONE	0x20	tlan.h
12581	TLAN_TIMER_LINK_BEAT	1	tlan.h
12582	TLAN_TIMER_ACTIVITY	2	tlan.h
12583	TLAN_TIMER_PHY_PDOWN	3	tlan.h
12584	TLAN_TIMER_PHY_PUP	4	tlan.h
12585	TLAN_TIMER_PHY_RESET	5	tlan.h
12586	TLAN_TIMER_PHY_START_LINK	6	tlan.h
12587	TLAN_TIMER_PHY_FINISH_AN	7	tlan.h
12588	TLAN_TIMER_FINISH_RESET	8	tlan.h
12589	TLAN_TIMER_ACT_DELAY	(HZ/10)	tlan.h
12590	TLAN_EEPROM_ACK	0	tlan.h
12591	TLAN_EEPROM_STOP	1	tlan.h
12592	TLAN_HOST_CMD	0x00	tlan.h
12593	TLAN_HC_GO	0x80000000	tlan.h
12594	TLAN_HC_STOP	0x40000000	tlan.h
12595	TLAN_HC_ACK	0x20000000	tlan.h
12596	TLAN_HC_CS_MASK	0x1FE00000	tlan.h
12597	TLAN_HC_EOC	0x00100000	tlan.h
12598	TLAN_HC_RT	0x00080000	tlan.h
12599	TLAN_HC_NES	0x00040000	tlan.h
12600	TLAN_HC_AD_RST	0x00008000	tlan.h
12601	TLAN_HC_LD_TMR	0x00004000	tlan.h
12602	TLAN_HC_LD_THR	0x00002000	tlan.h
12603	TLAN_HC_REQ_INT	0x00001000	tlan.h
12604	TLAN_HC_INT_OFF	0x00000800	tlan.h
12605	TLAN_HC_INT_ON	0x00000400	tlan.h
12606	TLAN_HC_AC_MASK	0x000000FF	tlan.h
12607	TLAN_CH_PARM	0x04	tlan.h
12608	TLAN_DIO_ADR	0x08	tlan.h
12609	TLAN_DA_ADR_INC	0x8000	tlan.h
12610	TLAN_DA_RAM_ADR	0x4000	tlan.h
12611	TLAN_HOST_INT	0x0A	tlan.h
12612	TLAN_HI_IV_MASK	0x1FE0	tlan.h
12613	TLAN_HI_IT_MASK	0x001C	tlan.h
12614	TLAN_DIO_DATA	0x0C	tlan.h
12615	TLAN_NET_CMD	0x00	tlan.h
12616	TLAN_NET_CMD_NRESET	0x80	tlan.h
12617	TLAN_NET_CMD_NWRAP	0x40	tlan.h
12618	TLAN_NET_CMD_CSF	0x20	tlan.h
12619	TLAN_NET_CMD_CAF	0x10	tlan.h
12620	TLAN_NET_CMD_NOBRX	0x08	tlan.h
12621	TLAN_NET_CMD_DUPLEX	0x04	tlan.h
12622	TLAN_NET_CMD_TRFRAM	0x02	tlan.h
12623	TLAN_NET_CMD_TXPACE	0x01	tlan.h
12624	TLAN_NET_SIO	0x01	tlan.h
12625	TLAN_NET_SIO_MINTEN	0x80	tlan.h
12626	TLAN_NET_SIO_ECLOK	0x40	tlan.h
12627	TLAN_NET_SIO_ETXEN	0x20	tlan.h
12628	TLAN_NET_SIO_EDATA	0x10	tlan.h
12629	TLAN_NET_SIO_NMRST	0x08	tlan.h
12630	TLAN_NET_SIO_MCLK	0x04	tlan.h
12631	TLAN_NET_SIO_MTXEN	0x02	tlan.h
12632	TLAN_NET_SIO_MDATA	0x01	tlan.h
12633	TLAN_NET_STS	0x02	tlan.h
12634	TLAN_NET_STS_MIRQ	0x80	tlan.h
12635	TLAN_NET_STS_HBEAT	0x40	tlan.h
12636	TLAN_NET_STS_TXSTOP	0x20	tlan.h
12637	TLAN_NET_STS_RXSTOP	0x10	tlan.h
12638	TLAN_NET_STS_RSRVD	0x0F	tlan.h
12639	TLAN_NET_MASK	0x03	tlan.h
12640	TLAN_NET_MASK_MASK7	0x80	tlan.h
12641	TLAN_NET_MASK_MASK6	0x40	tlan.h
12642	TLAN_NET_MASK_MASK5	0x20	tlan.h
12643	TLAN_NET_MASK_MASK4	0x10	tlan.h
12644	TLAN_NET_MASK_RSRVD	0x0F	tlan.h
12645	TLAN_NET_CONFIG	0x04	tlan.h
12646	TLAN_NET_CFG_RCLK	0x8000	tlan.h
12647	TLAN_NET_CFG_TCLK	0x4000	tlan.h
12648	TLAN_NET_CFG_BIT	0x2000	tlan.h
12649	TLAN_NET_CFG_RXCRC	0x1000	tlan.h
12650	TLAN_NET_CFG_PEF	0x0800	tlan.h
12651	TLAN_NET_CFG_1FRAG	0x0400	tlan.h
12652	TLAN_NET_CFG_1CHAN	0x0200	tlan.h
12653	TLAN_NET_CFG_MTEST	0x0100	tlan.h
12654	TLAN_NET_CFG_PHY_EN	0x0080	tlan.h
12655	TLAN_NET_CFG_MSMASK	0x007F	tlan.h
12656	TLAN_MAN_TEST	0x06	tlan.h
12657	TLAN_DEF_VENDOR_ID	0x08	tlan.h
12658	TLAN_DEF_DEVICE_ID	0x0A	tlan.h
12659	TLAN_DEF_REVISION	0x0C	tlan.h
12660	TLAN_DEF_SUBCLASS	0x0D	tlan.h
12661	TLAN_DEF_MIN_LAT	0x0E	tlan.h
12662	TLAN_DEF_MAX_LAT	0x0F	tlan.h
12663	TLAN_AREG_0	0x10	tlan.h
12664	TLAN_AREG_1	0x16	tlan.h
12665	TLAN_AREG_2	0x1C	tlan.h
12666	TLAN_AREG_3	0x22	tlan.h
12667	TLAN_HASH_1	0x28	tlan.h
12668	TLAN_HASH_2	0x2C	tlan.h
12669	TLAN_GOOD_TX_FRMS	0x30	tlan.h
12670	TLAN_TX_UNDERUNS	0x33	tlan.h
12671	TLAN_GOOD_RX_FRMS	0x34	tlan.h
12672	TLAN_RX_OVERRUNS	0x37	tlan.h
12673	TLAN_DEFERRED_TX	0x38	tlan.h
12674	TLAN_CRC_ERRORS	0x3A	tlan.h
12675	TLAN_CODE_ERRORS	0x3B	tlan.h
12676	TLAN_MULTICOL_FRMS	0x3C	tlan.h
12677	TLAN_SINGLECOL_FRMS	0x3E	tlan.h
12678	TLAN_EXCESSCOL_FRMS	0x40	tlan.h
12679	TLAN_LATE_COLS	0x41	tlan.h
12680	TLAN_CARRIER_LOSS	0x42	tlan.h
12681	TLAN_ACOMMIT	0x43	tlan.h
12682	TLAN_LED_REG	0x44	tlan.h
12683	TLAN_LED_ACT	0x10	tlan.h
12684	TLAN_LED_LINK	0x01	tlan.h
12685	TLAN_BSIZE_REG	0x45	tlan.h
12686	TLAN_MAX_RX	0x46	tlan.h
12687	TLAN_INT_DIS	0x48	tlan.h
12688	TLAN_ID_TX_EOC	0x04	tlan.h
12689	TLAN_ID_RX_EOF	0x02	tlan.h
12690	TLAN_ID_RX_EOC	0x01	tlan.h
12691	TLAN_INT_NUMBER_OF_INTS	8	tlan.h
12692	TLAN_INT_NONE	0x0000	tlan.h
12693	TLAN_INT_TX_EOF	0x0001	tlan.h
12694	TLAN_INT_STAT_OVERFLOW	0x0002	tlan.h
12695	TLAN_INT_RX_EOF	0x0003	tlan.h
12696	TLAN_INT_DUMMY	0x0004	tlan.h
12697	TLAN_INT_TX_EOC	0x0005	tlan.h
12698	TLAN_INT_STATUS_CHECK	0x0006	tlan.h
12699	TLAN_INT_RX_EOC	0x0007	tlan.h
12700	TLAN_TLPHY_ID	0x10	tlan.h
12701	TLAN_TLPHY_CTL	0x11	tlan.h
12702	TLAN_TC_IGLINK	0x8000	tlan.h
12703	TLAN_TC_SWAPOL	0x4000	tlan.h
12704	TLAN_TC_AUISEL	0x2000	tlan.h
12705	TLAN_TC_SQEEN	0x1000	tlan.h
12706	TLAN_TC_MTEST	0x0800	tlan.h
12707	TLAN_TC_RESERVED	0x07F8	tlan.h
12708	TLAN_TC_NFEW	0x0004	tlan.h
12709	TLAN_TC_INTEN	0x0002	tlan.h
12710	TLAN_TC_TINT	0x0001	tlan.h
12711	TLAN_TLPHY_STS	0x12	tlan.h
12712	TLAN_TS_MINT	0x8000	tlan.h
12713	TLAN_TS_PHOK	0x4000	tlan.h
12714	TLAN_TS_POLOK	0x2000	tlan.h
12715	TLAN_TS_TPENERGY	0x1000	tlan.h
12716	TLAN_TS_RESERVED	0x0FFF	tlan.h
12717	TLAN_TLPHY_PAR	0x19	tlan.h
12718	TLAN_PHY_CIM_STAT	0x0020	tlan.h
12719	TLAN_PHY_SPEED_100	0x0040	tlan.h
12720	TLAN_PHY_DUPLEX_FULL	0x0080	tlan.h
12721	TLAN_PHY_AN_EN_STAT	0x0400	tlan.h
12722	NAT_SEM_ID1	0x2000	tlan.h
12723	NAT_SEM_ID2	0x5C01	tlan.h
12724	LEVEL1_ID1	0x7810	tlan.h
12725	LEVEL1_ID2	0x0000	tlan.h
12726	VELOCITY_NAME	"via-velocity"	via-velocity.h
12727	VELOCITY_FULL_DRV_NAM	"VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"	via-velocity.h
12728	VELOCITY_VERSION	"1.13"	via-velocity.h
12729	PKT_BUF_SZ	1564	via-velocity.h
12730	MAX_UNITS	8	via-velocity.h
12731	OPTION_DEFAULT	{ [0 ... MAX_UNITS-1] = -1}	via-velocity.h
12732	REV_ID_VT6110	(0)	via-velocity.h
12733	B_OWNED_BY_CHIP	1	via-velocity.h
12734	B_OWNED_BY_HOST	0	via-velocity.h
12735	RSR_DETAG	0x0080	via-velocity.h
12736	RSR_SNTAG	0x0040	via-velocity.h
12737	RSR_RXER	0x0020	via-velocity.h
12738	RSR_RL	0x0010	via-velocity.h
12739	RSR_CE	0x0008	via-velocity.h
12740	RSR_FAE	0x0004	via-velocity.h
12741	RSR_CRC	0x0002	via-velocity.h
12742	RSR_VIDM	0x0001	via-velocity.h
12743	RSR_RXOK	0x8000	via-velocity.h	rx OK
12744	RSR_PFT	0x4000	via-velocity.h	Perfect filtering address match
12745	RSR_MAR	0x2000	via-velocity.h	MAC accept multicast address packet
12746	RSR_BAR	0x1000	via-velocity.h	MAC accept broadcast address packet
12747	RSR_PHY	0x0800	via-velocity.h	MAC accept physical address packet
12748	RSR_VTAG	0x0400	via-velocity.h	802.1p/1q tagging packet indicator
12749	RSR_STP	0x0200	via-velocity.h	start of packet
12750	RSR_EDP	0x0100	via-velocity.h	end of packet
12751	RSR1_RXOK	0x80	via-velocity.h	rx OK
12752	RSR1_PFT	0x40	via-velocity.h	Perfect filtering address match
12753	RSR1_MAR	0x20	via-velocity.h	MAC accept multicast address packet
12754	RSR1_BAR	0x10	via-velocity.h	MAC accept broadcast address packet
12755	RSR1_PHY	0x08	via-velocity.h	MAC accept physical address packet
12756	RSR1_VTAG	0x04	via-velocity.h	802.1p/1q tagging packet indicator
12757	RSR1_STP	0x02	via-velocity.h	start of packet
12758	RSR1_EDP	0x01	via-velocity.h	end of packet
12759	CSM_IPOK	0x40	via-velocity.h	IP Checkusm validatiaon ok
12760	CSM_TUPOK	0x20	via-velocity.h	TCP/UDP Checkusm validatiaon ok
12761	CSM_FRAG	0x10	via-velocity.h	Fragment IP datagram
12762	CSM_IPKT	0x04	via-velocity.h	Received an IP packet
12763	CSM_TCPKT	0x02	via-velocity.h	Received a TCP packet
12764	CSM_UDPKT	0x01	via-velocity.h	Received a UDP packet
12765	TSR0_ABT	0x0080	via-velocity.h	Tx abort because of excessive collision
12766	TSR0_OWT	0x0040	via-velocity.h	Jumbo frame Tx abort
12767	TSR0_OWC	0x0020	via-velocity.h	Out of window collision
12768	TSR0_COLS	0x0010	via-velocity.h	experience collision in this transmit event
12769	TSR0_NCR3	0x0008	via-velocity.h	collision retry counter[3]
12770	TSR0_NCR2	0x0004	via-velocity.h	collision retry counter[2]
12771	TSR0_NCR1	0x0002	via-velocity.h	collision retry counter[1]
12772	TSR0_NCR0	0x0001	via-velocity.h	collision retry counter[0]
12773	TSR0_TERR	0x8000	via-velocity.h
12774	TSR0_FDX	0x4000	via-velocity.h	current transaction is serviced by full duplex mode
12775	TSR0_GMII	0x2000	via-velocity.h	current transaction is serviced by GMII mode
12776	TSR0_LNKFL	0x1000	via-velocity.h	packet serviced during link down
12777	TSR0_SHDN	0x0400	via-velocity.h	shutdown case
12778	TSR0_CRS	0x0200	via-velocity.h	carrier sense lost
12779	TSR0_CDH	0x0100	via-velocity.h	AQE test fail (CD heartbeat)
12780	TSR1_TERR	0x80	via-velocity.h
12781	TSR1_FDX	0x40	via-velocity.h	current transaction is serviced by full duplex mode
12782	TSR1_GMII	0x20	via-velocity.h	current transaction is serviced by GMII mode
12783	TSR1_LNKFL	0x10	via-velocity.h	packet serviced during link down
12784	TSR1_SHDN	0x04	via-velocity.h	shutdown case
12785	TSR1_CRS	0x02	via-velocity.h	carrier sense lost
12786	TSR1_CDH	0x01	via-velocity.h	AQE test fail (CD heartbeat)
12787	TCR0_TIC	0x80	via-velocity.h	assert interrupt immediately while descriptor has been send complete
12788	TCR0_PIC	0x40	via-velocity.h	priority interrupt request, INA# is issued over adaptive interrupt scheme
12789	TCR0_VETAG	0x20	via-velocity.h	enable VLAN tag
12790	TCR0_IPCK	0x10	via-velocity.h	request IP checksum calculation.
12791	TCR0_UDPCK	0x08	via-velocity.h	request UDP checksum calculation.
12792	TCR0_TCPCK	0x04	via-velocity.h	request TCP checksum calculation.
12793	TCR0_JMBO	0x02	via-velocity.h	indicate a jumbo packet in GMAC side
12794	TCR0_CRC	0x01	via-velocity.h	disable CRC generation
12795	TCPLS_NORMAL	3	via-velocity.h
12796	TCPLS_START	2	via-velocity.h
12797	TCPLS_END	1	via-velocity.h
12798	TCPLS_MED	0	via-velocity.h
12799	CB_RX_BUF_SIZE	2048UL	via-velocity.h	max buffer size
12800	CB_MAX_RD_NUM	512	via-velocity.h	MAX # of RD
12801	CB_MAX_TD_NUM	256	via-velocity.h	MAX # of TD
12802	CB_INIT_RD_NUM_3119	128	via-velocity.h	init # of RD, for setup VT3119
12803	CB_INIT_TD_NUM_3119	64	via-velocity.h	init # of TD, for setup VT3119
12804	CB_INIT_RD_NUM	128	via-velocity.h	init # of RD, for setup default
12805	CB_INIT_TD_NUM	64	via-velocity.h	init # of TD, for setup default
12806	CB_TD_RING_NUM	4	via-velocity.h	# of TD rings.
12807	CB_MAX_SEG_PER_PKT	7	via-velocity.h	max data seg per packet (Tx)
12808	CB_MAX_TX_ABORT_RETRY	3	via-velocity.h
12809	MCAM_SIZE	64	via-velocity.h
12810	VCAM_SIZE	64	via-velocity.h
12811	TX_QUEUE_NO	4	via-velocity.h
12812	MAX_HW_MIB_COUNTER	32	via-velocity.h
12813	VELOCITY_MIN_MTU	(1514-14)	via-velocity.h
12814	VELOCITY_MAX_MTU	(9000)	via-velocity.h
12815	MAC_REG_PAR	0x00	via-velocity.h	physical address
12816	MAC_REG_RCR	0x06	via-velocity.h
12817	MAC_REG_TCR	0x07	via-velocity.h
12818	MAC_REG_CR0_SET	0x08	via-velocity.h
12819	MAC_REG_CR1_SET	0x09	via-velocity.h
12820	MAC_REG_CR2_SET	0x0A	via-velocity.h
12821	MAC_REG_CR3_SET	0x0B	via-velocity.h
12822	MAC_REG_CR0_CLR	0x0C	via-velocity.h
12823	MAC_REG_CR1_CLR	0x0D	via-velocity.h
12824	MAC_REG_CR2_CLR	0x0E	via-velocity.h
12825	MAC_REG_CR3_CLR	0x0F	via-velocity.h
12826	MAC_REG_MAR	0x10	via-velocity.h
12827	MAC_REG_CAM	0x10	via-velocity.h
12828	MAC_REG_DEC_BASE_HI	0x18	via-velocity.h
12829	MAC_REG_DBF_BASE_HI	0x1C	via-velocity.h
12830	MAC_REG_ISR_CTL	0x20	via-velocity.h
12831	MAC_REG_ISR_HOTMR	0x20	via-velocity.h
12832	MAC_REG_ISR_TSUPTHR	0x20	via-velocity.h
12833	MAC_REG_ISR_RSUPTHR	0x20	via-velocity.h
12834	MAC_REG_ISR_CTL1	0x21	via-velocity.h
12835	MAC_REG_TXE_SR	0x22	via-velocity.h
12836	MAC_REG_RXE_SR	0x23	via-velocity.h
12837	MAC_REG_ISR	0x24	via-velocity.h
12838	MAC_REG_ISR0	0x24	via-velocity.h
12839	MAC_REG_ISR1	0x25	via-velocity.h
12840	MAC_REG_ISR2	0x26	via-velocity.h
12841	MAC_REG_ISR3	0x27	via-velocity.h
12842	MAC_REG_IMR	0x28	via-velocity.h
12843	MAC_REG_IMR0	0x28	via-velocity.h
12844	MAC_REG_IMR1	0x29	via-velocity.h
12845	MAC_REG_IMR2	0x2A	via-velocity.h
12846	MAC_REG_IMR3	0x2B	via-velocity.h
12847	MAC_REG_TDCSR_SET	0x30	via-velocity.h
12848	MAC_REG_RDCSR_SET	0x32	via-velocity.h
12849	MAC_REG_TDCSR_CLR	0x34	via-velocity.h
12850	MAC_REG_RDCSR_CLR	0x36	via-velocity.h
12851	MAC_REG_RDBASE_LO	0x38	via-velocity.h
12852	MAC_REG_RDINDX	0x3C	via-velocity.h
12853	MAC_REG_TDBASE_LO	0x40	via-velocity.h
12854	MAC_REG_RDCSIZE	0x50	via-velocity.h
12855	MAC_REG_TDCSIZE	0x52	via-velocity.h
12856	MAC_REG_TDINDX	0x54	via-velocity.h
12857	MAC_REG_TDIDX0	0x54	via-velocity.h
12858	MAC_REG_TDIDX1	0x56	via-velocity.h
12859	MAC_REG_TDIDX2	0x58	via-velocity.h
12860	MAC_REG_TDIDX3	0x5A	via-velocity.h
12861	MAC_REG_PAUSE_TIMER	0x5C	via-velocity.h
12862	MAC_REG_RBRDU	0x5E	via-velocity.h
12863	MAC_REG_FIFO_TEST0	0x60	via-velocity.h
12864	MAC_REG_FIFO_TEST1	0x64	via-velocity.h
12865	MAC_REG_CAMADDR	0x68	via-velocity.h
12866	MAC_REG_CAMCR	0x69	via-velocity.h
12867	MAC_REG_GFTEST	0x6A	via-velocity.h
12868	MAC_REG_FTSTCMD	0x6B	via-velocity.h
12869	MAC_REG_MIICFG	0x6C	via-velocity.h
12870	MAC_REG_MIISR	0x6D	via-velocity.h
12871	MAC_REG_PHYSR0	0x6E	via-velocity.h
12872	MAC_REG_PHYSR1	0x6F	via-velocity.h
12873	MAC_REG_MIICR	0x70	via-velocity.h
12874	MAC_REG_MIIADR	0x71	via-velocity.h
12875	MAC_REG_MIIDATA	0x72	via-velocity.h
12876	MAC_REG_SOFT_TIMER0	0x74	via-velocity.h
12877	MAC_REG_SOFT_TIMER1	0x76	via-velocity.h
12878	MAC_REG_CFGA	0x78	via-velocity.h
12879	MAC_REG_CFGB	0x79	via-velocity.h
12880	MAC_REG_CFGC	0x7A	via-velocity.h
12881	MAC_REG_CFGD	0x7B	via-velocity.h
12882	MAC_REG_DCFG0	0x7C	via-velocity.h
12883	MAC_REG_DCFG1	0x7D	via-velocity.h
12884	MAC_REG_MCFG0	0x7E	via-velocity.h
12885	MAC_REG_MCFG1	0x7F	via-velocity.h
12886	MAC_REG_TBIST	0x80	via-velocity.h
12887	MAC_REG_RBIST	0x81	via-velocity.h
12888	MAC_REG_PMCC	0x82	via-velocity.h
12889	MAC_REG_STICKHW	0x83	via-velocity.h
12890	MAC_REG_MIBCR	0x84	via-velocity.h
12891	MAC_REG_EERSV	0x85	via-velocity.h
12892	MAC_REG_REVID	0x86	via-velocity.h
12893	MAC_REG_MIBREAD	0x88	via-velocity.h
12894	MAC_REG_BPMA	0x8C	via-velocity.h
12895	MAC_REG_EEWR_DATA	0x8C	via-velocity.h
12896	MAC_REG_BPMD_WR	0x8F	via-velocity.h
12897	MAC_REG_BPCMD	0x90	via-velocity.h
12898	MAC_REG_BPMD_RD	0x91	via-velocity.h
12899	MAC_REG_EECHKSUM	0x92	via-velocity.h
12900	MAC_REG_EECSR	0x93	via-velocity.h
12901	MAC_REG_EERD_DATA	0x94	via-velocity.h
12902	MAC_REG_EADDR	0x96	via-velocity.h
12903	MAC_REG_EMBCMD	0x97	via-velocity.h
12904	MAC_REG_JMPSR0	0x98	via-velocity.h
12905	MAC_REG_JMPSR1	0x99	via-velocity.h
12906	MAC_REG_JMPSR2	0x9A	via-velocity.h
12907	MAC_REG_JMPSR3	0x9B	via-velocity.h
12908	MAC_REG_CHIPGSR	0x9C	via-velocity.h
12909	MAC_REG_TESTCFG	0x9D	via-velocity.h
12910	MAC_REG_DEBUG	0x9E	via-velocity.h
12911	MAC_REG_CHIPGCR	0x9F	via-velocity.h
12912	MAC_REG_WOLCR0_SET	0xA0	via-velocity.h
12913	MAC_REG_WOLCR1_SET	0xA1	via-velocity.h
12914	MAC_REG_PWCFG_SET	0xA2	via-velocity.h
12915	MAC_REG_WOLCFG_SET	0xA3	via-velocity.h
12916	MAC_REG_WOLCR0_CLR	0xA4	via-velocity.h
12917	MAC_REG_WOLCR1_CLR	0xA5	via-velocity.h
12918	MAC_REG_PWCFG_CLR	0xA6	via-velocity.h
12919	MAC_REG_WOLCFG_CLR	0xA7	via-velocity.h
12920	MAC_REG_WOLSR0_SET	0xA8	via-velocity.h
12921	MAC_REG_WOLSR1_SET	0xA9	via-velocity.h
12922	MAC_REG_WOLSR0_CLR	0xAC	via-velocity.h
12923	MAC_REG_WOLSR1_CLR	0xAD	via-velocity.h
12924	MAC_REG_PATRN_CRC0	0xB0	via-velocity.h
12925	MAC_REG_PATRN_CRC1	0xB2	via-velocity.h
12926	MAC_REG_PATRN_CRC2	0xB4	via-velocity.h
12927	MAC_REG_PATRN_CRC3	0xB6	via-velocity.h
12928	MAC_REG_PATRN_CRC4	0xB8	via-velocity.h
12929	MAC_REG_PATRN_CRC5	0xBA	via-velocity.h
12930	MAC_REG_PATRN_CRC6	0xBC	via-velocity.h
12931	MAC_REG_PATRN_CRC7	0xBE	via-velocity.h
12932	MAC_REG_BYTEMSK0_0	0xC0	via-velocity.h
12933	MAC_REG_BYTEMSK0_1	0xC4	via-velocity.h
12934	MAC_REG_BYTEMSK0_2	0xC8	via-velocity.h
12935	MAC_REG_BYTEMSK0_3	0xCC	via-velocity.h
12936	MAC_REG_BYTEMSK1_0	0xD0	via-velocity.h
12937	MAC_REG_BYTEMSK1_1	0xD4	via-velocity.h
12938	MAC_REG_BYTEMSK1_2	0xD8	via-velocity.h
12939	MAC_REG_BYTEMSK1_3	0xDC	via-velocity.h
12940	MAC_REG_BYTEMSK2_0	0xE0	via-velocity.h
12941	MAC_REG_BYTEMSK2_1	0xE4	via-velocity.h
12942	MAC_REG_BYTEMSK2_2	0xE8	via-velocity.h
12943	MAC_REG_BYTEMSK2_3	0xEC	via-velocity.h
12944	MAC_REG_BYTEMSK3_0	0xF0	via-velocity.h
12945	MAC_REG_BYTEMSK3_1	0xF4	via-velocity.h
12946	MAC_REG_BYTEMSK3_2	0xF8	via-velocity.h
12947	MAC_REG_BYTEMSK3_3	0xFC	via-velocity.h
12948	RCR_AS	0x80	via-velocity.h
12949	RCR_AP	0x40	via-velocity.h
12950	RCR_AL	0x20	via-velocity.h
12951	RCR_PROM	0x10	via-velocity.h
12952	RCR_AB	0x08	via-velocity.h
12953	RCR_AM	0x04	via-velocity.h
12954	RCR_AR	0x02	via-velocity.h
12955	RCR_SEP	0x01	via-velocity.h
12956	TCR_TB2BDIS	0x80	via-velocity.h
12957	TCR_COLTMC1	0x08	via-velocity.h
12958	TCR_COLTMC0	0x04	via-velocity.h
12959	TCR_LB1	0x02	via-velocity.h	loopback[1]
12960	TCR_LB0	0x01	via-velocity.h	loopback[0]
12961	CR0_TXON	0x00000008UL	via-velocity.h
12962	CR0_RXON	0x00000004UL	via-velocity.h
12963	CR0_STOP	0x00000002UL	via-velocity.h	stop MAC, default = 1
12964	CR0_STRT	0x00000001UL	via-velocity.h	start MAC
12965	CR0_SFRST	0x00008000UL	via-velocity.h	software reset
12966	CR0_TM1EN	0x00004000UL	via-velocity.h
12967	CR0_TM0EN	0x00002000UL	via-velocity.h
12968	CR0_DPOLL	0x00000800UL	via-velocity.h	disable rx/tx auto polling
12969	CR0_DISAU	0x00000100UL	via-velocity.h
12970	CR0_XONEN	0x00800000UL	via-velocity.h
12971	CR0_FDXTFCEN	0x00400000UL	via-velocity.h	full-duplex TX flow control enable
12972	CR0_FDXRFCEN	0x00200000UL	via-velocity.h	full-duplex RX flow control enable
12973	CR0_HDXFCEN	0x00100000UL	via-velocity.h	half-duplex flow control enable
12974	CR0_XHITH1	0x00080000UL	via-velocity.h	TX XON high threshold 1
12975	CR0_XHITH0	0x00040000UL	via-velocity.h	TX XON high threshold 0
12976	CR0_XLTH1	0x00020000UL	via-velocity.h	TX pause frame low threshold 1
12977	CR0_XLTH0	0x00010000UL	via-velocity.h	TX pause frame low threshold 0
12978	CR0_GSPRST	0x80000000UL	via-velocity.h
12979	CR0_FORSRST	0x40000000UL	via-velocity.h
12980	CR0_FPHYRST	0x20000000UL	via-velocity.h
12981	CR0_DIAG	0x10000000UL	via-velocity.h
12982	CR0_INTPCTL	0x04000000UL	via-velocity.h
12983	CR0_GINTMSK1	0x02000000UL	via-velocity.h
12984	CR0_GINTMSK0	0x01000000UL	via-velocity.h
12985	CR1_SFRST	0x80	via-velocity.h	software reset
12986	CR1_TM1EN	0x40	via-velocity.h
12987	CR1_TM0EN	0x20	via-velocity.h
12988	CR1_DPOLL	0x08	via-velocity.h	disable rx/tx auto polling
12989	CR1_DISAU	0x01	via-velocity.h
12990	CR2_XONEN	0x80	via-velocity.h
12991	CR2_FDXTFCEN	0x40	via-velocity.h	full-duplex TX flow control enable
12992	CR2_FDXRFCEN	0x20	via-velocity.h	full-duplex RX flow control enable
12993	CR2_HDXFCEN	0x10	via-velocity.h	half-duplex flow control enable
12994	CR2_XHITH1	0x08	via-velocity.h	TX XON high threshold 1
12995	CR2_XHITH0	0x04	via-velocity.h	TX XON high threshold 0
12996	CR2_XLTH1	0x02	via-velocity.h	TX pause frame low threshold 1
12997	CR2_XLTH0	0x01	via-velocity.h	TX pause frame low threshold 0
12998	CR3_GSPRST	0x80	via-velocity.h
12999	CR3_FORSRST	0x40	via-velocity.h
13000	CR3_FPHYRST	0x20	via-velocity.h
13001	CR3_DIAG	0x10	via-velocity.h
13002	CR3_INTPCTL	0x04	via-velocity.h
13003	CR3_GINTMSK1	0x02	via-velocity.h
13004	CR3_GINTMSK0	0x01	via-velocity.h
13005	ISRCTL_UDPINT	0x8000	via-velocity.h
13006	ISRCTL_TSUPDIS	0x4000	via-velocity.h
13007	ISRCTL_RSUPDIS	0x2000	via-velocity.h
13008	ISRCTL_PMSK1	0x1000	via-velocity.h
13009	ISRCTL_PMSK0	0x0800	via-velocity.h
13010	ISRCTL_INTPD	0x0400	via-velocity.h
13011	ISRCTL_HCRLD	0x0200	via-velocity.h
13012	ISRCTL_SCRLD	0x0100	via-velocity.h
13013	ISRCTL1_UDPINT	0x80	via-velocity.h
13014	ISRCTL1_TSUPDIS	0x40	via-velocity.h
13015	ISRCTL1_RSUPDIS	0x20	via-velocity.h
13016	ISRCTL1_PMSK1	0x10	via-velocity.h
13017	ISRCTL1_PMSK0	0x08	via-velocity.h
13018	ISRCTL1_INTPD	0x04	via-velocity.h
13019	ISRCTL1_HCRLD	0x02	via-velocity.h
13020	ISRCTL1_SCRLD	0x01	via-velocity.h
13021	TXESR_TFDBS	0x08	via-velocity.h
13022	TXESR_TDWBS	0x04	via-velocity.h
13023	TXESR_TDRBS	0x02	via-velocity.h
13024	TXESR_TDSTR	0x01	via-velocity.h
13025	RXESR_RFDBS	0x08	via-velocity.h
13026	RXESR_RDWBS	0x04	via-velocity.h
13027	RXESR_RDRBS	0x02	via-velocity.h
13028	RXESR_RDSTR	0x01	via-velocity.h
13029	ISR_ISR3	0x80000000UL	via-velocity.h
13030	ISR_ISR2	0x40000000UL	via-velocity.h
13031	ISR_ISR1	0x20000000UL	via-velocity.h
13032	ISR_ISR0	0x10000000UL	via-velocity.h
13033	ISR_TXSTLI	0x02000000UL	via-velocity.h
13034	ISR_RXSTLI	0x01000000UL	via-velocity.h
13035	ISR_HFLD	0x00800000UL	via-velocity.h
13036	ISR_UDPI	0x00400000UL	via-velocity.h
13037	ISR_MIBFI	0x00200000UL	via-velocity.h
13038	ISR_SHDNI	0x00100000UL	via-velocity.h
13039	ISR_PHYI	0x00080000UL	via-velocity.h
13040	ISR_PWEI	0x00040000UL	via-velocity.h
13041	ISR_TMR1I	0x00020000UL	via-velocity.h
13042	ISR_TMR0I	0x00010000UL	via-velocity.h
13043	ISR_SRCI	0x00008000UL	via-velocity.h
13044	ISR_LSTPEI	0x00004000UL	via-velocity.h
13045	ISR_LSTEI	0x00002000UL	via-velocity.h
13046	ISR_OVFI	0x00001000UL	via-velocity.h
13047	ISR_FLONI	0x00000800UL	via-velocity.h
13048	ISR_RACEI	0x00000400UL	via-velocity.h
13049	ISR_TXWB1I	0x00000200UL	via-velocity.h
13050	ISR_TXWB0I	0x00000100UL	via-velocity.h
13051	ISR_PTX3I	0x00000080UL	via-velocity.h
13052	ISR_PTX2I	0x00000040UL	via-velocity.h
13053	ISR_PTX1I	0x00000020UL	via-velocity.h
13054	ISR_PTX0I	0x00000010UL	via-velocity.h
13055	ISR_PTXI	0x00000008UL	via-velocity.h
13056	ISR_PRXI	0x00000004UL	via-velocity.h
13057	ISR_PPTXI	0x00000002UL	via-velocity.h
13058	ISR_PPRXI	0x00000001UL	via-velocity.h
13059	IMR_TXSTLM	0x02000000UL	via-velocity.h
13060	IMR_UDPIM	0x00400000UL	via-velocity.h
13061	IMR_MIBFIM	0x00200000UL	via-velocity.h
13062	IMR_SHDNIM	0x00100000UL	via-velocity.h
13063	IMR_PHYIM	0x00080000UL	via-velocity.h
13064	IMR_PWEIM	0x00040000UL	via-velocity.h
13065	IMR_TMR1IM	0x00020000UL	via-velocity.h
13066	IMR_TMR0IM	0x00010000UL	via-velocity.h
13067	IMR_SRCIM	0x00008000UL	via-velocity.h
13068	IMR_LSTPEIM	0x00004000UL	via-velocity.h
13069	IMR_LSTEIM	0x00002000UL	via-velocity.h
13070	IMR_OVFIM	0x00001000UL	via-velocity.h
13071	IMR_FLONIM	0x00000800UL	via-velocity.h
13072	IMR_RACEIM	0x00000400UL	via-velocity.h
13073	IMR_TXWB1IM	0x00000200UL	via-velocity.h
13074	IMR_TXWB0IM	0x00000100UL	via-velocity.h
13075	IMR_PTX3IM	0x00000080UL	via-velocity.h
13076	IMR_PTX2IM	0x00000040UL	via-velocity.h
13077	IMR_PTX1IM	0x00000020UL	via-velocity.h
13078	IMR_PTX0IM	0x00000010UL	via-velocity.h
13079	IMR_PTXIM	0x00000008UL	via-velocity.h
13080	IMR_PRXIM	0x00000004UL	via-velocity.h
13081	IMR_PPTXIM	0x00000002UL	via-velocity.h
13082	IMR_PPRXIM	0x00000001UL	via-velocity.h
13083	INT_MASK_DEF	( IMR_PPTXIM\|IMR_PPRXIM\| IMR_PTXIM\|IMR_PRXIM \| \ IMR_PWEIM\|IMR_TXWB0IM\|IMR_TXWB1IM\|IMR_FLONIM\| \ IMR_OVFIM\|IMR_LSTEIM\|IMR_LSTP	via-velocity.h
13084	TRDCSR_DEAD	0x0008	via-velocity.h
13085	TRDCSR_WAK	0x0004	via-velocity.h
13086	TRDCSR_ACT	0x0002	via-velocity.h
13087	TRDCSR_RUN	0x0001	via-velocity.h
13088	CAMADDR_CAMEN	0x80	via-velocity.h
13089	CAMADDR_VCAMSL	0x40	via-velocity.h
13090	CAMCR_PS1	0x80	via-velocity.h
13091	CAMCR_PS0	0x40	via-velocity.h
13092	CAMCR_AITRPKT	0x20	via-velocity.h
13093	CAMCR_AITR16	0x10	via-velocity.h
13094	CAMCR_CAMRD	0x08	via-velocity.h
13095	CAMCR_CAMWR	0x04	via-velocity.h
13096	CAMCR_PS_CAM_MASK	0x40	via-velocity.h
13097	CAMCR_PS_CAM_DATA	0x80	via-velocity.h
13098	CAMCR_PS_MAR	0x00	via-velocity.h
13099	MIICFG_MPO1	0x80	via-velocity.h
13100	MIICFG_MPO0	0x40	via-velocity.h
13101	MIICFG_MFDC	0x20	via-velocity.h
13102	MIISR_MIDLE	0x80	via-velocity.h
13103	PHYSR0_PHYRST	0x80	via-velocity.h
13104	PHYSR0_LINKGD	0x40	via-velocity.h
13105	PHYSR0_FDPX	0x10	via-velocity.h
13106	PHYSR0_SPDG	0x08	via-velocity.h
13107	PHYSR0_SPD10	0x04	via-velocity.h
13108	PHYSR0_RXFLC	0x02	via-velocity.h
13109	PHYSR0_TXFLC	0x01	via-velocity.h
13110	PHYSR1_PHYTBI	0x01	via-velocity.h
13111	MIICR_MAUTO	0x80	via-velocity.h
13112	MIICR_RCMD	0x40	via-velocity.h
13113	MIICR_WCMD	0x20	via-velocity.h
13114	MIICR_MDPM	0x10	via-velocity.h
13115	MIICR_MOUT	0x08	via-velocity.h
13116	MIICR_MDO	0x04	via-velocity.h
13117	MIICR_MDI	0x02	via-velocity.h
13118	MIICR_MDC	0x01	via-velocity.h
13119	MIIADR_SWMPL	0x80	via-velocity.h
13120	CFGA_PMHCTG	0x08	via-velocity.h
13121	CFGA_GPIO1PD	0x04	via-velocity.h
13122	CFGA_ABSHDN	0x02	via-velocity.h
13123	CFGA_PACPI	0x01	via-velocity.h
13124	CFGB_GTCKOPT	0x80	via-velocity.h
13125	CFGB_MIIOPT	0x40	via-velocity.h
13126	CFGB_CRSEOPT	0x20	via-velocity.h
13127	CFGB_OFSET	0x10	via-velocity.h
13128	CFGB_CRANDOM	0x08	via-velocity.h
13129	CFGB_CAP	0x04	via-velocity.h
13130	CFGB_MBA	0x02	via-velocity.h
13131	CFGB_BAKOPT	0x01	via-velocity.h
13132	CFGC_EELOAD	0x80	via-velocity.h
13133	CFGC_BROPT	0x40	via-velocity.h
13134	CFGC_DLYEN	0x20	via-velocity.h
13135	CFGC_DTSEL	0x10	via-velocity.h
13136	CFGC_BTSEL	0x08	via-velocity.h
13137	CFGC_BPS2	0x04	via-velocity.h	bootrom select[2]
13138	CFGC_BPS1	0x02	via-velocity.h	bootrom select[1]
13139	CFGC_BPS0	0x01	via-velocity.h	bootrom select[0]
13140	CFGD_IODIS	0x80	via-velocity.h
13141	CFGD_MSLVDACEN	0x40	via-velocity.h
13142	CFGD_CFGDACEN	0x20	via-velocity.h
13143	CFGD_PCI64EN	0x10	via-velocity.h
13144	CFGD_HTMRL4	0x08	via-velocity.h
13145	DCFG_XMWI	0x8000	via-velocity.h
13146	DCFG_XMRM	0x4000	via-velocity.h
13147	DCFG_XMRL	0x2000	via-velocity.h
13148	DCFG_PERDIS	0x1000	via-velocity.h
13149	DCFG_MRWAIT	0x0400	via-velocity.h
13150	DCFG_MWWAIT	0x0200	via-velocity.h
13151	DCFG_LATMEN	0x0100	via-velocity.h
13152	MCFG_RXARB	0x0080	via-velocity.h
13153	MCFG_RFT1	0x0020	via-velocity.h
13154	MCFG_RFT0	0x0010	via-velocity.h
13155	MCFG_LOWTHOPT	0x0008	via-velocity.h
13156	MCFG_PQEN	0x0004	via-velocity.h
13157	MCFG_RTGOPT	0x0002	via-velocity.h
13158	MCFG_VIDFR	0x0001	via-velocity.h
13159	MCFG_TXARB	0x8000	via-velocity.h
13160	MCFG_TXQBK1	0x0800	via-velocity.h
13161	MCFG_TXQBK0	0x0400	via-velocity.h
13162	MCFG_TXQNOBK	0x0200	via-velocity.h
13163	MCFG_SNAPOPT	0x0100	via-velocity.h
13164	PMCC_DSI	0x80	via-velocity.h
13165	PMCC_D2_DIS	0x40	via-velocity.h
13166	PMCC_D1_DIS	0x20	via-velocity.h
13167	PMCC_D3C_EN	0x10	via-velocity.h
13168	PMCC_D3H_EN	0x08	via-velocity.h
13169	PMCC_D2_EN	0x04	via-velocity.h
13170	PMCC_D1_EN	0x02	via-velocity.h
13171	PMCC_D0_EN	0x01	via-velocity.h
13172	STICKHW_SWPTAG	0x10	via-velocity.h
13173	STICKHW_WOLSR	0x08	via-velocity.h
13174	STICKHW_WOLEN	0x04	via-velocity.h
13175	STICKHW_DS1	0x02	via-velocity.h	R/W by software/cfg cycle
13176	STICKHW_DS0	0x01	via-velocity.h	suspend well DS write port
13177	MIBCR_MIBISTOK	0x80	via-velocity.h
13178	MIBCR_MIBISTGO	0x40	via-velocity.h
13179	MIBCR_MIBINC	0x20	via-velocity.h
13180	MIBCR_MIBHI	0x10	via-velocity.h
13181	MIBCR_MIBFRZ	0x08	via-velocity.h
13182	MIBCR_MIBFLSH	0x04	via-velocity.h
13183	MIBCR_MPTRINI	0x02	via-velocity.h
13184	MIBCR_MIBCLR	0x01	via-velocity.h
13185	EERSV_BOOT_RPL	((u8) 0x01)	via-velocity.h	Boot method selection for VT6110
13186	EERSV_BOOT_MASK	((u8) 0x06)	via-velocity.h
13187	EERSV_BOOT_INT19	((u8) 0x00)	via-velocity.h
13188	EERSV_BOOT_INT18	((u8) 0x02)	via-velocity.h
13189	EERSV_BOOT_LOCAL	((u8) 0x04)	via-velocity.h
13190	EERSV_BOOT_BEV	((u8) 0x06)	via-velocity.h
13191	BPCMD_BPDNE	0x80	via-velocity.h
13192	BPCMD_EBPWR	0x02	via-velocity.h
13193	BPCMD_EBPRD	0x01	via-velocity.h
13194	EECSR_EMBP	0x40	via-velocity.h	eeprom embeded programming
13195	EECSR_RELOAD	0x20	via-velocity.h	eeprom content reload
13196	EECSR_DPM	0x10	via-velocity.h	eeprom direct programming
13197	EECSR_ECS	0x08	via-velocity.h	eeprom CS pin
13198	EECSR_ECK	0x04	via-velocity.h	eeprom CK pin
13199	EECSR_EDI	0x02	via-velocity.h	eeprom DI pin
13200	EECSR_EDO	0x01	via-velocity.h	eeprom DO pin
13201	EMBCMD_EDONE	0x80	via-velocity.h
13202	EMBCMD_EWDIS	0x08	via-velocity.h
13203	EMBCMD_EWEN	0x04	via-velocity.h
13204	EMBCMD_EWR	0x02	via-velocity.h
13205	EMBCMD_ERD	0x01	via-velocity.h
13206	TESTCFG_HBDIS	0x80	via-velocity.h
13207	CHIPGCR_FCGMII	0x80	via-velocity.h
13208	CHIPGCR_FCFDX	0x40	via-velocity.h
13209	CHIPGCR_FCRESV	0x20	via-velocity.h
13210	CHIPGCR_FCMODE	0x10	via-velocity.h
13211	CHIPGCR_LPSOPT	0x08	via-velocity.h
13212	CHIPGCR_TM1US	0x04	via-velocity.h
13213	CHIPGCR_TM0US	0x02	via-velocity.h
13214	CHIPGCR_PHYINTEN	0x01	via-velocity.h
13215	WOLCR_MSWOLEN7	0x0080	via-velocity.h	enable pattern match filtering
13216	WOLCR_MSWOLEN6	0x0040	via-velocity.h
13217	WOLCR_MSWOLEN5	0x0020	via-velocity.h
13218	WOLCR_MSWOLEN4	0x0010	via-velocity.h
13219	WOLCR_MSWOLEN3	0x0008	via-velocity.h
13220	WOLCR_MSWOLEN2	0x0004	via-velocity.h
13221	WOLCR_MSWOLEN1	0x0002	via-velocity.h
13222	WOLCR_MSWOLEN0	0x0001	via-velocity.h
13223	WOLCR_ARP_EN	0x0001	via-velocity.h
13224	WOLCR_LINKOFF_EN	0x0800	via-velocity.h	link off detected enable
13225	WOLCR_LINKON_EN	0x0400	via-velocity.h	link on detected enable
13226	WOLCR_MAGIC_EN	0x0200	via-velocity.h	magic packet filter enable
13227	WOLCR_UNICAST_EN	0x0100	via-velocity.h	unicast filter enable
13228	PWCFG_PHYPWOPT	0x80	via-velocity.h	internal MII I/F timing
13229	PWCFG_PCISTICK	0x40	via-velocity.h	PCI sticky R/W enable
13230	PWCFG_WOLTYPE	0x20	via-velocity.h	pulse(1) or button (0)
13231	PWCFG_LEGCY_WOL	0x10	via-velocity.h
13232	PWCFG_PMCSR_PME_SR	0x08	via-velocity.h
13233	PWCFG_PMCSR_PME_EN	0x04	via-velocity.h	control by PCISTICK
13234	PWCFG_LEGACY_WOLSR	0x02	via-velocity.h	Legacy WOL_SR shadow
13235	PWCFG_LEGACY_WOLEN	0x01	via-velocity.h	Legacy WOL_EN shadow
13236	WOLCFG_PMEOVR	0x80	via-velocity.h	for legacy use, force PMEEN always
13237	WOLCFG_SAM	0x20	via-velocity.h	accept multicast case reset, default=0
13238	WOLCFG_SAB	0x10	via-velocity.h	accept broadcast case reset, default=0
13239	WOLCFG_SMIIACC	0x08	via-velocity.h	??
13240	WOLCFG_SGENWH	0x02	via-velocity.h
13241	WOLCFG_PHYINTEN	0x01	via-velocity.h	0:PHYINT trigger enable, 1:use internal MII
13242	WOLSR_LINKOFF_INT	0x0800	via-velocity.h
13243	WOLSR_LINKON_INT	0x0400	via-velocity.h
13244	WOLSR_MAGIC_INT	0x0200	via-velocity.h
13245	WOLSR_UNICAST_INT	0x0100	via-velocity.h
13246	PKT_TYPE_NONE	0x0000	via-velocity.h	Turn off receiver
13247	PKT_TYPE_DIRECTED	0x0001	via-velocity.h	obselete, directed address is always accepted
13248	PKT_TYPE_MULTICAST	0x0002	via-velocity.h
13249	PKT_TYPE_ALL_MULTICAST	0x0004	via-velocity.h
13250	PKT_TYPE_BROADCAST	0x0008	via-velocity.h
13251	PKT_TYPE_PROMISCUOUS	0x0020	via-velocity.h
13252	PKT_TYPE_LONG	0x2000	via-velocity.h	NOTE.... the definition of LONG is >2048 bytes in our chip
13253	PKT_TYPE_RUNT	0x4000	via-velocity.h
13254	PKT_TYPE_ERROR	0x8000	via-velocity.h	Accept error packets, e.g. CRC error
13255	MAC_LB_NONE	0x00	via-velocity.h
13256	MAC_LB_INTERNAL	0x01	via-velocity.h
13257	MAC_LB_EXTERNAL	0x02	via-velocity.h
13258	IMR_MASK_VALUE	0x0033FF0FUL	via-velocity.h	initial value of IMR
13259	IMR_MASK_VALUE	0x0013FB0FUL	via-velocity.h	initial value of IMR
13260	REV_ID_VT3119_A0	0x00	via-velocity.h
13261	REV_ID_VT3119_A1	0x01	via-velocity.h
13262	REV_ID_VT3216_A0	0x10	via-velocity.h
13263	W_MAX_TIMEOUT	0x0FFFU	via-velocity.h
13264	MII_REG_BMCR	0x00	via-velocity.h	physical address
13265	MII_REG_BMSR	0x01	via-velocity.h
13266	MII_REG_PHYID1	0x02	via-velocity.h	OUI
13267	MII_REG_PHYID2	0x03	via-velocity.h	OUI + Module ID + REV ID
13268	MII_REG_ANAR	0x04	via-velocity.h
13269	MII_REG_ANLPAR	0x05	via-velocity.h
13270	MII_REG_G1000CR	0x09	via-velocity.h
13271	MII_REG_G1000SR	0x0A	via-velocity.h
13272	MII_REG_MODCFG	0x10	via-velocity.h
13273	MII_REG_TCSR	0x16	via-velocity.h
13274	MII_REG_PLED	0x1B	via-velocity.h
13275	MII_REG_PCR	0x17	via-velocity.h
13276	MII_REG_PCSR	0x17	via-velocity.h
13277	MII_REG_AUXCR	0x1C	via-velocity.h
13278	MII_REG_PSCR	0x10	via-velocity.h	PHY specific control register
13279	BMCR_RESET	0x8000	via-velocity.h
13280	BMCR_LBK	0x4000	via-velocity.h
13281	BMCR_SPEED100	0x2000	via-velocity.h
13282	BMCR_AUTO	0x1000	via-velocity.h
13283	BMCR_PD	0x0800	via-velocity.h
13284	BMCR_ISO	0x0400	via-velocity.h
13285	BMCR_REAUTO	0x0200	via-velocity.h
13286	BMCR_FDX	0x0100	via-velocity.h
13287	BMCR_SPEED1G	0x0040	via-velocity.h
13288	BMSR_AUTOCM	0x0020	via-velocity.h
13289	BMSR_LNK	0x0004	via-velocity.h
13290	ANAR_ASMDIR	0x0800	via-velocity.h	Asymmetric PAUSE support
13291	ANAR_PAUSE	0x0400	via-velocity.h	Symmetric PAUSE Support
13292	ANAR_T4	0x0200	via-velocity.h
13293	ANAR_TXFD	0x0100	via-velocity.h
13294	ANAR_TX	0x0080	via-velocity.h
13295	ANAR_10FD	0x0040	via-velocity.h
13296	ANAR_10	0x0020	via-velocity.h
13297	ANLPAR_ASMDIR	0x0800	via-velocity.h	Asymmetric PAUSE support
13298	ANLPAR_PAUSE	0x0400	via-velocity.h	Symmetric PAUSE Support
13299	ANLPAR_T4	0x0200	via-velocity.h
13300	ANLPAR_TXFD	0x0100	via-velocity.h
13301	ANLPAR_TX	0x0080	via-velocity.h
13302	ANLPAR_10FD	0x0040	via-velocity.h
13303	ANLPAR_10	0x0020	via-velocity.h
13304	G1000CR_1000FD	0x0200	via-velocity.h	PHY is 1000-T Full-duplex capable
13305	G1000CR_1000	0x0100	via-velocity.h	PHY is 1000-T Half-duplex capable
13306	G1000SR_1000FD	0x0800	via-velocity.h	LP PHY is 1000-T Full-duplex capable
13307	G1000SR_1000	0x0400	via-velocity.h	LP PHY is 1000-T Half-duplex capable
13308	TCSR_ECHODIS	0x2000	via-velocity.h
13309	AUXCR_MDPPS	0x0004	via-velocity.h
13310	PLED_LALBE	0x0004	via-velocity.h
13311	PSCR_ACRSTX	0x0800	via-velocity.h	Assert CRS on Transmit
13312	PHYID_CICADA_CS8201	0x000FC410UL	via-velocity.h
13313	PHYID_VT3216_32BIT	0x000FC610UL	via-velocity.h
13314	PHYID_VT3216_64BIT	0x000FC600UL	via-velocity.h
13315	PHYID_MARVELL_1000	0x01410C50UL	via-velocity.h
13316	PHYID_MARVELL_1000S	0x01410C40UL	via-velocity.h
13317	PHYID_REV_ID_MASK	0x0000000FUL	via-velocity.h
13318	VELOCITY_WOL_MAGIC	0x00000000UL	via-velocity.h
13319	VELOCITY_WOL_PHY	0x00000001UL	via-velocity.h
13320	VELOCITY_WOL_ARP	0x00000002UL	via-velocity.h
13321	VELOCITY_WOL_UCAST	0x00000004UL	via-velocity.h
13322	VELOCITY_WOL_BCAST	0x00000010UL	via-velocity.h
13323	VELOCITY_WOL_MCAST	0x00000020UL	via-velocity.h
13324	VELOCITY_WOL_MAGIC_SEC	0x00000040UL	via-velocity.h
13325	VELOCITY_FLAGS_TAGGING	0x00000001UL	via-velocity.h
13326	VELOCITY_FLAGS_TX_CSUM	0x00000002UL	via-velocity.h
13327	VELOCITY_FLAGS_RX_CSUM	0x00000004UL	via-velocity.h
13328	VELOCITY_FLAGS_IP_ALIGN	0x00000008UL	via-velocity.h
13329	VELOCITY_FLAGS_VAL_PKT_LEN	0x00000010UL	via-velocity.h
13330	VELOCITY_FLAGS_FLOW_CTRL	0x01000000UL	via-velocity.h
13331	VELOCITY_FLAGS_OPENED	0x00010000UL	via-velocity.h
13332	VELOCITY_FLAGS_VMNS_CONNECTED	0x00020000UL	via-velocity.h
13333	VELOCITY_FLAGS_VMNS_COMMITTED	0x00040000UL	via-velocity.h
13334	VELOCITY_FLAGS_WOL_ENABLED	0x00080000UL	via-velocity.h
13335	VELOCITY_LINK_FAIL	0x00000001UL	via-velocity.h
13336	VELOCITY_SPEED_10	0x00000002UL	via-velocity.h
13337	VELOCITY_SPEED_100	0x00000004UL	via-velocity.h
13338	VELOCITY_SPEED_1000	0x00000008UL	via-velocity.h
13339	VELOCITY_DUPLEX_FULL	0x00000010UL	via-velocity.h
13340	VELOCITY_AUTONEG_ENABLE	0x00000020UL	via-velocity.h
13341	VELOCITY_FORCED_BY_EEPROM	0x00000040UL	via-velocity.h
13342	VELOCITY_LINK_CHANGE	0x00000001UL	via-velocity.h
13343	RX_DESC_MIN	4	via-velocity.h
13344	RX_DESC_MAX	255	via-velocity.h
13345	RX_DESC_DEF	RX_DESC_MIN	via-velocity.h
13346	TX_DESC_MIN	1	via-velocity.h
13347	TX_DESC_MAX	256	via-velocity.h
13348	TX_DESC_DEF	TX_DESC_MIN	via-velocity.h
13349	VIRTIO_NET_F_CSUM	0	virtio-net.h	Host handles pkts w/ partial csum
13350	VIRTIO_NET_F_GUEST_CSUM	1	virtio-net.h	Guest handles pkts w/ partial csum
13351	VIRTIO_NET_F_MAC	5	virtio-net.h	Host has given MAC address.
13352	VIRTIO_NET_F_GSO	6	virtio-net.h	Host handles pkts w/ any GSO type
13353	VIRTIO_NET_F_GUEST_TSO4	7	virtio-net.h	Guest can handle TSOv4 in.
13354	VIRTIO_NET_F_GUEST_TSO6	8	virtio-net.h	Guest can handle TSOv6 in.
13355	VIRTIO_NET_F_GUEST_ECN	9	virtio-net.h	Guest can handle TSO[6] w/ ECN in.
13356	VIRTIO_NET_F_GUEST_UFO	10	virtio-net.h	Guest can handle UFO in.
13357	VIRTIO_NET_F_HOST_TSO4	11	virtio-net.h	Host can handle TSOv4 in.
13358	VIRTIO_NET_F_HOST_TSO6	12	virtio-net.h	Host can handle TSOv6 in.
13359	VIRTIO_NET_F_HOST_ECN	13	virtio-net.h	Host can handle TSO[6] w/ ECN in.
13360	VIRTIO_NET_F_HOST_UFO	14	virtio-net.h	Host can handle UFO in.
13361	WLAN_Ix86	1	wlan_compat.h
13362	WLAN_PPC	2	wlan_compat.h
13363	WLAN_Ix96	3	wlan_compat.h
13364	WLAN_ARM	4	wlan_compat.h
13365	WLAN_ALPHA	5	wlan_compat.h
13366	WLAN_MIPS	6	wlan_compat.h
13367	WLAN_HPPA	7	wlan_compat.h
13368	WLAN_I386CORE	1	wlan_compat.h
13369	WLAN_PPCCORE	2	wlan_compat.h
13370	WLAN_I296	3	wlan_compat.h
13371	WLAN_ARMCORE	4	wlan_compat.h
13372	WLAN_ALPHACORE	5	wlan_compat.h
13373	WLAN_MIPSCORE	6	wlan_compat.h
13374	WLAN_HPPACORE	7	wlan_compat.h
13375	WLAN_I386PART	1	wlan_compat.h
13376	WLAN_MPC860	2	wlan_compat.h
13377	WLAN_MPC823	3	wlan_compat.h
13378	WLAN_I296SA	4	wlan_compat.h
13379	WLAN_PPCPART	5	wlan_compat.h
13380	WLAN_ARMPART	6	wlan_compat.h
13381	WLAN_ALPHAPART	7	wlan_compat.h
13382	WLAN_MIPSPART	8	wlan_compat.h
13383	WLAN_HPPAPART	9	wlan_compat.h
13384	WLAN_PCAT	1	wlan_compat.h
13385	WLAN_MBX	2	wlan_compat.h
13386	WLAN_RPX	3	wlan_compat.h
13387	WLAN_LWARCH	4	wlan_compat.h
13388	WLAN_PMAC	5	wlan_compat.h
13389	WLAN_SKIFF	6	wlan_compat.h
13390	WLAN_BITSY	7	wlan_compat.h
13391	WLAN_ALPHAARCH	7	wlan_compat.h
13392	WLAN_MIPSARCH	9	wlan_compat.h
13393	WLAN_HPPAARCH	10	wlan_compat.h
13394	WLAN_LINUX_KERNEL	1	wlan_compat.h
13395	WLAN_LINUX_USER	2	wlan_compat.h
13396	WLAN_PCMCIA	1	wlan_compat.h
13397	WLAN_ISA	2	wlan_compat.h
13398	WLAN_PCI	3	wlan_compat.h
13399	WLAN_USB	4	wlan_compat.h
13400	WLAN_PLX	5	wlan_compat.h
13401	WLAN_OS	WLAN_LINUX_KERNEL	wlan_compat.h
13402	WLAN_OS	WLAN_LINUX_USER	wlan_compat.h
13403	WLAN_CPU_FAMILY	WLAN_Ix86	wlan_compat.h
13404	WLAN_CPU_CORE	WLAN_I386CORE	wlan_compat.h
13405	WLAN_CPU_PART	WLAN_I386PART	wlan_compat.h
13406	WLAN_SYSARCH	WLAN_PCAT	wlan_compat.h
13407	WLAN_CPU_FAMILY	WLAN_PPC	wlan_compat.h
13408	WLAN_CPU_CORE	WLAN_PPCCORE	wlan_compat.h
13409	WLAN_CPU_PART	WLAN_MPC860	wlan_compat.h
13410	WLAN_SYSARCH	WLAN_MBX	wlan_compat.h
13411	WLAN_CPU_PART	WLAN_MPC823	wlan_compat.h
13412	WLAN_SYSARCH	WLAN_RPX	wlan_compat.h
13413	WLAN_CPU_PART	WLAN_MPC860	wlan_compat.h
13414	WLAN_SYSARCH	WLAN_RPX	wlan_compat.h
13415	WLAN_CPU_PART	WLAN_PPCPART	wlan_compat.h
13416	WLAN_SYSARCH	WLAN_PMAC	wlan_compat.h
13417	WLAN_CPU_FAMILY	WLAN_ARM	wlan_compat.h
13418	WLAN_CPU_CORE	WLAN_ARMCORE	wlan_compat.h
13419	WLAN_CPU_PART	WLAN_ARM_PART	wlan_compat.h
13420	WLAN_SYSARCH	WLAN_SKIFF	wlan_compat.h
13421	WLAN_CPU_FAMILY	WLAN_ALPHA	wlan_compat.h
13422	WLAN_CPU_CORE	WLAN_ALPHACORE	wlan_compat.h
13423	WLAN_CPU_PART	WLAN_ALPHAPART	wlan_compat.h
13424	WLAN_SYSARCH	WLAN_ALPHAARCH	wlan_compat.h
13425	WLAN_CPU_FAMILY	WLAN_MIPS	wlan_compat.h
13426	WLAN_CPU_CORE	WLAN_MIPSCORE	wlan_compat.h
13427	WLAN_CPU_PART	WLAN_MIPSPART	wlan_compat.h
13428	WLAN_SYSARCH	WLAN_MIPSARCH	wlan_compat.h
13429	WLAN_CPU_FAMILY	WLAN_HPPA	wlan_compat.h
13430	WLAN_CPU_CORE	WLAN_HPPACORE	wlan_compat.h
13431	WLAN_CPU_PART	WLAN_HPPAPART	wlan_compat.h
13432	WLAN_SYSARCH	WLAN_HPPAARCH	wlan_compat.h
13433	BIT0	0x00000001	wlan_compat.h
13434	BIT1	0x00000002	wlan_compat.h
13435	BIT2	0x00000004	wlan_compat.h
13436	BIT3	0x00000008	wlan_compat.h
13437	BIT4	0x00000010	wlan_compat.h
13438	BIT5	0x00000020	wlan_compat.h
13439	BIT6	0x00000040	wlan_compat.h
13440	BIT7	0x00000080	wlan_compat.h
13441	BIT8	0x00000100	wlan_compat.h
13442	BIT9	0x00000200	wlan_compat.h
13443	BIT10	0x00000400	wlan_compat.h
13444	BIT11	0x00000800	wlan_compat.h
13445	BIT12	0x00001000	wlan_compat.h
13446	BIT13	0x00002000	wlan_compat.h
13447	BIT14	0x00004000	wlan_compat.h
13448	BIT15	0x00008000	wlan_compat.h
13449	BIT16	0x00010000	wlan_compat.h
13450	BIT17	0x00020000	wlan_compat.h
13451	BIT18	0x00040000	wlan_compat.h
13452	BIT19	0x00080000	wlan_compat.h
13453	BIT20	0x00100000	wlan_compat.h
13454	BIT21	0x00200000	wlan_compat.h
13455	BIT22	0x00400000	wlan_compat.h
13456	BIT23	0x00800000	wlan_compat.h
13457	BIT24	0x01000000	wlan_compat.h
13458	BIT25	0x02000000	wlan_compat.h
13459	BIT26	0x04000000	wlan_compat.h
13460	BIT27	0x08000000	wlan_compat.h
13461	BIT28	0x10000000	wlan_compat.h
13462	BIT29	0x20000000	wlan_compat.h
13463	BIT30	0x40000000	wlan_compat.h
13464	BIT31	0x80000000	wlan_compat.h
13465	UINT8_MAX	(0xffUL)	wlan_compat.h
13466	UINT16_MAX	(0xffffUL)	wlan_compat.h
13467	UINT32_MAX	(0xffffffffUL)	wlan_compat.h
13468	INT8_MAX	(0x7fL)	wlan_compat.h
13469	INT16_MAX	(0x7fffL)	wlan_compat.h
13470	INT32_MAX	(0x7fffffffL)	wlan_compat.h
13471	__WLAN_ATTRIB_PACK__	__attribute__ ((packed))	wlan_compat.h
13472	__WLAN_INLINE__	inline	wlan_compat.h
13473	WLAN_MIN_ARRAY	0	wlan_compat.h
13474	WLAN_DBVAR	wlan_debug	wlan_compat.h
13475	DBFENTER	{ if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Enter\n"); } }	wlan_compat.h
13476	DBFEXIT	{ if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Exit\n"); } }	wlan_compat.h
13477	wlan_ms_per_tick	(1000UL / (wlan_ticks_per_sec))	wlan_compat.h
13478	MODVERSIONS	1	wlan_compat.h
13479	__SMP__	1	wlan_compat.h
13480	CONFIG_NETLINK	1	wlan_compat.h
13481	ERRFILE	ERRFILE_ath5k	ath5k.h
13482	PCI_DEVICE_ID_ATHEROS_AR5210	0x0007	ath5k.h	AR5210
13483	PCI_DEVICE_ID_ATHEROS_AR5311	0x0011	ath5k.h	AR5311
13484	PCI_DEVICE_ID_ATHEROS_AR5211	0x0012	ath5k.h	AR5211
13485	PCI_DEVICE_ID_ATHEROS_AR5212	0x0013	ath5k.h	AR5212
13486	PCI_DEVICE_ID_3COM_3CRDAG675	0x0013	ath5k.h	3CRDAG675 (Atheros AR5212)
13487	PCI_DEVICE_ID_3COM_2_3CRPAG175	0x0013	ath5k.h	3CRPAG175 (Atheros AR5212)
13488	PCI_DEVICE_ID_ATHEROS_AR5210_AP	0x0207	ath5k.h	AR5210 (Early)
13489	PCI_DEVICE_ID_ATHEROS_AR5212_IB	0x1014	ath5k.h	AR5212 (IBM MiniPCI)
13490	PCI_DEVICE_ID_ATHEROS_AR5210_DE	0x1107	ath5k.h	AR5210 (no eeprom)
13491	PCI_DEVICE_ID_ATHEROS_AR5212_DE	0x1113	ath5k.h	AR5212 (no eeprom)
13492	PCI_DEVICE_ID_ATHEROS_AR5211_DE	0x1112	ath5k.h	AR5211 (no eeprom)
13493	PCI_DEVICE_ID_ATHEROS_AR5212_FP	0xf013	ath5k.h	AR5212 (emulation board)
13494	PCI_DEVICE_ID_ATHEROS_AR5211_LE	0xff12	ath5k.h	AR5211 (emulation board)
13495	PCI_DEVICE_ID_ATHEROS_AR5211_FP	0xf11b	ath5k.h	AR5211 (emulation board)
13496	PCI_DEVICE_ID_ATHEROS_AR5312_RE	0x0052	ath5k.h	AR5312 WMAC (AP31)
13497	PCI_DEVICE_ID_ATHEROS_AR5312_RE	0x0057	ath5k.h	AR5312 WMAC (AP30-040)
13498	PCI_DEVICE_ID_ATHEROS_AR5312_RE	0x0058	ath5k.h	AR5312 WMAC (AP43-030)
13499	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0014	ath5k.h	AR5212 compatible
13500	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0015	ath5k.h	AR5212 compatible
13501	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0016	ath5k.h	AR5212 compatible
13502	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0017	ath5k.h	AR5212 compatible
13503	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0018	ath5k.h	AR5212 compatible
13504	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0019	ath5k.h	AR5212 compatible
13505	PCI_DEVICE_ID_ATHEROS_AR2413	0x001a	ath5k.h	AR2413 (Griffin-lite)
13506	PCI_DEVICE_ID_ATHEROS_AR5413	0x001b	ath5k.h	AR5413 (Eagle)
13507	PCI_DEVICE_ID_ATHEROS_AR5424	0x001c	ath5k.h	AR5424 (Condor PCI-E)
13508	PCI_DEVICE_ID_ATHEROS_AR5416	0x0023	ath5k.h	AR5416
13509	PCI_DEVICE_ID_ATHEROS_AR5418	0x0024	ath5k.h	AR5418
13510	AR5K_INI_RFGAIN_5GHZ	0	ath5k.h
13511	AR5K_INI_RFGAIN_2GHZ	1	ath5k.h
13512	AR5K_INI_VAL_11A	0	ath5k.h
13513	AR5K_INI_VAL_11A_TURBO	1	ath5k.h
13514	AR5K_INI_VAL_11B	2	ath5k.h
13515	AR5K_INI_VAL_11G	3	ath5k.h
13516	AR5K_INI_VAL_11G_TURBO	4	ath5k.h
13517	AR5K_INI_VAL_XR	0	ath5k.h
13518	AR5K_INI_VAL_MAX	5	ath5k.h
13519	IEEE80211_MAX_LEN	2352	ath5k.h
13520	AR5K_TUNE_DMA_BEACON_RESP	2	ath5k.h
13521	AR5K_TUNE_SW_BEACON_RESP	10	ath5k.h
13522	AR5K_TUNE_ADDITIONAL_SWBA_BACKO	0	ath5k.h
13523	AR5K_TUNE_RADAR_ALERT	0	ath5k.h
13524	AR5K_TUNE_MIN_TX_FIFO_THRES	1	ath5k.h
13525	AR5K_TUNE_MAX_TX_FIFO_THRES	((IEEE80211_MAX_LEN / 64) + 1)	ath5k.h
13526	AR5K_TUNE_REGISTER_TIMEOUT	20000	ath5k.h
13527	AR5K_TUNE_RSSI_THRES	129	ath5k.h
13528	AR5K_TUNE_BMISS_THRES	7	ath5k.h
13529	AR5K_TUNE_REGISTER_DWELL_TIME	20000	ath5k.h
13530	AR5K_TUNE_BEACON_INTERVAL	100	ath5k.h
13531	AR5K_TUNE_AIFS	2	ath5k.h
13532	AR5K_TUNE_AIFS_11B	2	ath5k.h
13533	AR5K_TUNE_AIFS_XR	0	ath5k.h
13534	AR5K_TUNE_CWMIN	15	ath5k.h
13535	AR5K_TUNE_CWMIN_11B	31	ath5k.h
13536	AR5K_TUNE_CWMIN_XR	3	ath5k.h
13537	AR5K_TUNE_CWMAX	1023	ath5k.h
13538	AR5K_TUNE_CWMAX_11B	1023	ath5k.h
13539	AR5K_TUNE_CWMAX_XR	7	ath5k.h
13540	AR5K_TUNE_NOISE_FLOOR	-72	ath5k.h
13541	AR5K_TUNE_MAX_TXPOWER	63	ath5k.h
13542	AR5K_TUNE_DEFAULT_TXPOWER	25	ath5k.h
13543	AR5K_TUNE_TPC_TXPOWER	0	ath5k.h
13544	AR5K_TUNE_ANT_DIVERSITY	1	ath5k.h
13545	AR5K_TUNE_HWTXTRIES	4	ath5k.h
13546	AR5K_INIT_CARR_SENSE_EN	1	ath5k.h
13547	AR5K_INIT_CFG	( \ AR5K_CFG_SWTD \| AR5K_CFG_SWRD \ )	ath5k.h
13548	AR5K_INIT_CFG	0x00000000	ath5k.h
13549	AR5K_INIT_CYCRSSI_THR1	2	ath5k.h
13550	AR5K_INIT_TX_LATENCY	502	ath5k.h
13551	AR5K_INIT_USEC	39	ath5k.h
13552	AR5K_INIT_USEC_TURBO	79	ath5k.h
13553	AR5K_INIT_USEC_32	31	ath5k.h
13554	AR5K_INIT_SLOT_TIME	396	ath5k.h
13555	AR5K_INIT_SLOT_TIME_TURBO	480	ath5k.h
13556	AR5K_INIT_ACK_CTS_TIMEOUT	1024	ath5k.h
13557	AR5K_INIT_ACK_CTS_TIMEOUT_TURBO	0x08000800	ath5k.h
13558	AR5K_INIT_PROG_IFS	920	ath5k.h
13559	AR5K_INIT_PROG_IFS_TURBO	960	ath5k.h
13560	AR5K_INIT_EIFS	3440	ath5k.h
13561	AR5K_INIT_EIFS_TURBO	6880	ath5k.h
13562	AR5K_INIT_SIFS	560	ath5k.h
13563	AR5K_INIT_SIFS_TURBO	480	ath5k.h
13564	AR5K_INIT_SH_RETRY	10	ath5k.h
13565	AR5K_INIT_LG_RETRY	AR5K_INIT_SH_RETRY	ath5k.h
13566	AR5K_INIT_SSH_RETRY	32	ath5k.h
13567	AR5K_INIT_SLG_RETRY	AR5K_INIT_SSH_RETRY	ath5k.h
13568	AR5K_INIT_TX_RETRY	10	ath5k.h
13569	AR5K_INIT_TRANSMIT_LATENCY	( \ (AR5K_INIT_TX_LATENCY << 14) \| (AR5K_INIT_USEC_32 << 7) \| \ (AR5K_INIT_USEC) \ )	ath5k.h
13570	AR5K_INIT_TRANSMIT_LATENCY_TURB	( \ (AR5K_INIT_TX_LATENCY << 14) \| (AR5K_INIT_USEC_32 << 7) \| \ (AR5K_INIT_USEC_TURBO) \ )	ath5k.h
13571	AR5K_INIT_PROTO_TIME_CNTRL	( \ (AR5K_INIT_CARR_SENSE_EN << 26) \| (AR5K_INIT_EIFS << 12) \| \ (AR5K_INIT_PROG_IFS) \ )	ath5k.h
13572	AR5K_INIT_PROTO_TIME_CNTRL_TURB	( \ (AR5K_INIT_CARR_SENSE_EN << 26) \| (AR5K_INIT_EIFS_TURBO << 12) \| \ (AR5K_INIT_PROG_IFS_TURBO) \ )	ath5k.h
13573	AR5K_TXQ_USEDEFAULT	((u32) -1)	ath5k.h
13574	AR5K_SREV_UNKNOWN	0xffff	ath5k.h
13575	AR5K_SREV_AR5210	0x00	ath5k.h	Crete
13576	AR5K_SREV_AR5311	0x10	ath5k.h	Maui 1
13577	AR5K_SREV_AR5311A	0x20	ath5k.h	Maui 2
13578	AR5K_SREV_AR5311B	0x30	ath5k.h	Spirit
13579	AR5K_SREV_AR5211	0x40	ath5k.h	Oahu
13580	AR5K_SREV_AR5212	0x50	ath5k.h	Venice
13581	AR5K_SREV_AR5213	0x55	ath5k.h	???
13582	AR5K_SREV_AR5213A	0x59	ath5k.h	Hainan
13583	AR5K_SREV_AR2413	0x78	ath5k.h	Griffin lite
13584	AR5K_SREV_AR2414	0x70	ath5k.h	Griffin
13585	AR5K_SREV_AR5424	0x90	ath5k.h	Condor
13586	AR5K_SREV_AR5413	0xa4	ath5k.h	Eagle lite
13587	AR5K_SREV_AR5414	0xa0	ath5k.h	Eagle
13588	AR5K_SREV_AR2415	0xb0	ath5k.h	Talon
13589	AR5K_SREV_AR5416	0xc0	ath5k.h	PCI-E
13590	AR5K_SREV_AR5418	0xca	ath5k.h	PCI-E
13591	AR5K_SREV_AR2425	0xe0	ath5k.h	Swan
13592	AR5K_SREV_AR2417	0xf0	ath5k.h	Nala
13593	AR5K_SREV_RAD_5110	0x00	ath5k.h
13594	AR5K_SREV_RAD_5111	0x10	ath5k.h
13595	AR5K_SREV_RAD_5111A	0x15	ath5k.h
13596	AR5K_SREV_RAD_2111	0x20	ath5k.h
13597	AR5K_SREV_RAD_5112	0x30	ath5k.h
13598	AR5K_SREV_RAD_5112A	0x35	ath5k.h
13599	AR5K_SREV_RAD_5112B	0x36	ath5k.h
13600	AR5K_SREV_RAD_2112	0x40	ath5k.h
13601	AR5K_SREV_RAD_2112A	0x45	ath5k.h
13602	AR5K_SREV_RAD_2112B	0x46	ath5k.h
13603	AR5K_SREV_RAD_2413	0x50	ath5k.h
13604	AR5K_SREV_RAD_5413	0x60	ath5k.h
13605	AR5K_SREV_RAD_2316	0x70	ath5k.h	Cobra SoC
13606	AR5K_SREV_RAD_2317	0x80	ath5k.h
13607	AR5K_SREV_RAD_5424	0xa0	ath5k.h	Mostly same as 5413
13608	AR5K_SREV_RAD_2425	0xa2	ath5k.h
13609	AR5K_SREV_RAD_5133	0xc0	ath5k.h
13610	AR5K_SREV_PHY_5211	0x30	ath5k.h
13611	AR5K_SREV_PHY_5212	0x41	ath5k.h
13612	AR5K_SREV_PHY_5212A	0x42	ath5k.h
13613	AR5K_SREV_PHY_5212B	0x43	ath5k.h
13614	AR5K_SREV_PHY_2413	0x45	ath5k.h
13615	AR5K_SREV_PHY_5413	0x61	ath5k.h
13616	AR5K_SREV_PHY_2425	0x70	ath5k.h
13617	MODULATION_XR	0x00000200	ath5k.h
13618	MODULATION_TURBO	0x00000080	ath5k.h
13619	AR5K_TXSTAT_ALTRATE	0x80	ath5k.h
13620	AR5K_TXERR_XRETRY	0x01	ath5k.h
13621	AR5K_TXERR_FILT	0x02	ath5k.h
13622	AR5K_TXERR_FIFO	0x04	ath5k.h
13623	AR5K_TXQ_FLAG_TXOKINT_ENABLE	0x0001	ath5k.h	Enable TXOK interrupt
13624	AR5K_TXQ_FLAG_TXERRINT_ENABLE	0x0002	ath5k.h	Enable TXERR interrupt
13625	AR5K_TXQ_FLAG_TXEOLINT_ENABLE	0x0004	ath5k.h	Enable TXEOL interrupt -not used-
13626	AR5K_TXQ_FLAG_TXDESCINT_ENABLE	0x0008	ath5k.h	Enable TXDESC interrupt -not used-
13627	AR5K_TXQ_FLAG_TXURNINT_ENABLE	0x0010	ath5k.h	Enable TXURN interrupt
13628	AR5K_TXQ_FLAG_CBRORNINT_ENABLE	0x0020	ath5k.h	Enable CBRORN interrupt
13629	AR5K_TXQ_FLAG_CBRURNINT_ENABLE	0x0040	ath5k.h	Enable CBRURN interrupt
13630	AR5K_TXQ_FLAG_QTRIGINT_ENABLE	0x0080	ath5k.h	Enable QTRIG interrupt
13631	AR5K_TXQ_FLAG_TXNOFRMINT_ENABLE	0x0100	ath5k.h	Enable TXNOFRM interrupt
13632	AR5K_TXQ_FLAG_BACKOFF_DISABLE	0x0200	ath5k.h	Disable random post-backoff
13633	AR5K_TXQ_FLAG_RDYTIME_EXP_POLIC	0x0300	ath5k.h	Enable ready time expiry policy (?)
13634	AR5K_TXQ_FLAG_FRAG_BURST_BACKOF	0x0800	ath5k.h	Enable backoff while bursting
13635	AR5K_TXQ_FLAG_POST_FR_BKOFF_DIS	0x1000	ath5k.h	Disable backoff while bursting
13636	AR5K_TXQ_FLAG_COMPRESSION_ENABL	0x2000	ath5k.h	Enable hw compression -not implemented-
13637	AR5K_RXERR_CRC	0x01	ath5k.h
13638	AR5K_RXERR_PHY	0x02	ath5k.h
13639	AR5K_RXERR_FIFO	0x04	ath5k.h
13640	AR5K_RXERR_DECRYPT	0x08	ath5k.h
13641	AR5K_RXERR_MIC	0x10	ath5k.h
13642	AR5K_RXKEYIX_INVALID	((u8) - 1)	ath5k.h
13643	AR5K_TXKEYIX_INVALID	((u32) - 1)	ath5k.h
13644	AR5K_SLOT_TIME_9	396	ath5k.h
13645	AR5K_SLOT_TIME_20	880	ath5k.h
13646	AR5K_SLOT_TIME_MAX	0xffff	ath5k.h
13647	CHANNEL_CW_INT	0x0008	ath5k.h	Contention Window interference detected
13648	CHANNEL_TURBO	0x0010	ath5k.h	Turbo Channel
13649	CHANNEL_CCK	0x0020	ath5k.h	CCK channel
13650	CHANNEL_OFDM	0x0040	ath5k.h	OFDM channel
13651	CHANNEL_2GHZ	0x0080	ath5k.h	2GHz channel.
13652	CHANNEL_5GHZ	0x0100	ath5k.h	5GHz channel
13653	CHANNEL_PASSIVE	0x0200	ath5k.h	Only passive scan allowed
13654	CHANNEL_DYN	0x0400	ath5k.h	Dynamic CCK-OFDM channel (for g operation)
13655	CHANNEL_XR	0x0800	ath5k.h	XR channel
13656	CHANNEL_A	(CHANNEL_5GHZ\|CHANNEL_OFDM)	ath5k.h
13657	CHANNEL_B	(CHANNEL_2GHZ\|CHANNEL_CCK)	ath5k.h
13658	CHANNEL_G	(CHANNEL_2GHZ\|CHANNEL_OFDM)	ath5k.h
13659	CHANNEL_T	(CHANNEL_5GHZ\|CHANNEL_OFDM\|CHANNEL_TURBO)	ath5k.h
13660	CHANNEL_TG	(CHANNEL_2GHZ\|CHANNEL_OFDM\|CHANNEL_TURBO)	ath5k.h
13661	CHANNEL_108A	CHANNEL_T	ath5k.h
13662	CHANNEL_108G	CHANNEL_TG	ath5k.h
13663	CHANNEL_X	(CHANNEL_5GHZ\|CHANNEL_OFDM\|CHANNEL_XR)	ath5k.h
13664	CHANNEL_ALL	(CHANNEL_OFDM\|CHANNEL_CCK\|CHANNEL_2GHZ\|CHANNEL_5GHZ\| \ CHANNEL_TURBO)	ath5k.h
13665	CHANNEL_ALL_NOTURBO	(CHANNEL_ALL & ~CHANNEL_TURBO)	ath5k.h
13666	CHANNEL_MODES	CHANNEL_ALL	ath5k.h
13667	AR5K_MAX_RATES	32	ath5k.h
13668	ATH5K_RATE_CODE_1M	0x1B	ath5k.h
13669	ATH5K_RATE_CODE_2M	0x1A	ath5k.h
13670	ATH5K_RATE_CODE_5_5M	0x19	ath5k.h
13671	ATH5K_RATE_CODE_11M	0x18	ath5k.h
13672	ATH5K_RATE_CODE_6M	0x0B	ath5k.h
13673	ATH5K_RATE_CODE_9M	0x0F	ath5k.h
13674	ATH5K_RATE_CODE_12M	0x0A	ath5k.h
13675	ATH5K_RATE_CODE_18M	0x0E	ath5k.h
13676	ATH5K_RATE_CODE_24M	0x09	ath5k.h
13677	ATH5K_RATE_CODE_36M	0x0D	ath5k.h
13678	ATH5K_RATE_CODE_48M	0x08	ath5k.h
13679	ATH5K_RATE_CODE_54M	0x0C	ath5k.h
13680	ATH5K_RATE_CODE_XR_500K	0x07	ath5k.h
13681	ATH5K_RATE_CODE_XR_1M	0x02	ath5k.h
13682	ATH5K_RATE_CODE_XR_2M	0x06	ath5k.h
13683	ATH5K_RATE_CODE_XR_3M	0x01	ath5k.h
13684	AR5K_SET_SHORT_PREAMBLE	0x04	ath5k.h
13685	AR5K_KEYCACHE_SIZE	8	ath5k.h
13686	AR5K_RSSI_EP_MULTIPLIER	(1<<7)	ath5k.h
13687	AR5K_SOFTLED_PIN	0	ath5k.h
13688	AR5K_SOFTLED_ON	0	ath5k.h
13689	AR5K_SOFTLED_OFF	1	ath5k.h
13690	AR5K_MAX_GPIO	10	ath5k.h
13691	AR5K_MAX_RF_BANKS	8	ath5k.h
13692	ATH_RXBUF	16	base.h	number of RX buffers
13693	ATH_TXBUF	16	base.h	number of TX buffers
13694	ATH_CHAN_MAX	(26+26+26+200+200)	base.h
13695	ATH_CHAN_MAX	(14+14+14+252+20)	base.h
13696	AR5K_DESC_RX_CTL0	0x00000000	desc.h
13697	AR5K_DESC_RX_CTL1_BUF_LEN	0x00000fff	desc.h
13698	AR5K_DESC_RX_CTL1_INTREQ	0x00002000	desc.h
13699	AR5K_5210_RX_DESC_STATUS0_DATA_	0x00000fff	desc.h
13700	AR5K_5210_RX_DESC_STATUS0_MORE	0x00001000	desc.h
13701	AR5K_5210_RX_DESC_STATUS0_RECEI	0x00078000	desc.h
13702	AR5K_5210_RX_DESC_STATUS0_RECEI	15	desc.h
13703	AR5K_5210_RX_DESC_STATUS0_RECEI	0x07f80000	desc.h
13704	AR5K_5210_RX_DESC_STATUS0_RECEI	19	desc.h
13705	AR5K_5210_RX_DESC_STATUS0_RECEI	0x38000000	desc.h
13706	AR5K_5210_RX_DESC_STATUS0_RECEI	27	desc.h
13707	AR5K_5210_RX_DESC_STATUS1_DONE	0x00000001	desc.h
13708	AR5K_5210_RX_DESC_STATUS1_FRAME	0x00000002	desc.h
13709	AR5K_5210_RX_DESC_STATUS1_CRC_E	0x00000004	desc.h
13710	AR5K_5210_RX_DESC_STATUS1_FIFO_	0x00000008	desc.h
13711	AR5K_5210_RX_DESC_STATUS1_DECRY	0x00000010	desc.h
13712	AR5K_5210_RX_DESC_STATUS1_PHY_E	0x000000e0	desc.h
13713	AR5K_5210_RX_DESC_STATUS1_PHY_E	5	desc.h
13714	AR5K_5210_RX_DESC_STATUS1_KEY_I	0x00000100	desc.h
13715	AR5K_5210_RX_DESC_STATUS1_KEY_I	0x00007e00	desc.h
13716	AR5K_5210_RX_DESC_STATUS1_KEY_I	9	desc.h
13717	AR5K_5210_RX_DESC_STATUS1_RECEI	0x0fff8000	desc.h
13718	AR5K_5210_RX_DESC_STATUS1_RECEI	15	desc.h
13719	AR5K_5210_RX_DESC_STATUS1_KEY_C	0x10000000	desc.h
13720	AR5K_5212_RX_DESC_STATUS0_DATA_	0x00000fff	desc.h
13721	AR5K_5212_RX_DESC_STATUS0_MORE	0x00001000	desc.h
13722	AR5K_5212_RX_DESC_STATUS0_DECOM	0x00002000	desc.h
13723	AR5K_5212_RX_DESC_STATUS0_RECEI	0x000f8000	desc.h
13724	AR5K_5212_RX_DESC_STATUS0_RECEI	15	desc.h
13725	AR5K_5212_RX_DESC_STATUS0_RECEI	0x0ff00000	desc.h
13726	AR5K_5212_RX_DESC_STATUS0_RECEI	20	desc.h
13727	AR5K_5212_RX_DESC_STATUS0_RECEI	0xf0000000	desc.h
13728	AR5K_5212_RX_DESC_STATUS0_RECEI	28	desc.h
13729	AR5K_5212_RX_DESC_STATUS1_DONE	0x00000001	desc.h
13730	AR5K_5212_RX_DESC_STATUS1_FRAME	0x00000002	desc.h
13731	AR5K_5212_RX_DESC_STATUS1_CRC_E	0x00000004	desc.h
13732	AR5K_5212_RX_DESC_STATUS1_DECRY	0x00000008	desc.h
13733	AR5K_5212_RX_DESC_STATUS1_PHY_E	0x00000010	desc.h
13734	AR5K_5212_RX_DESC_STATUS1_MIC_E	0x00000020	desc.h
13735	AR5K_5212_RX_DESC_STATUS1_KEY_I	0x00000100	desc.h
13736	AR5K_5212_RX_DESC_STATUS1_KEY_I	0x0000fe00	desc.h
13737	AR5K_5212_RX_DESC_STATUS1_KEY_I	9	desc.h
13738	AR5K_5212_RX_DESC_STATUS1_RECEI	0x7fff0000	desc.h
13739	AR5K_5212_RX_DESC_STATUS1_RECEI	16	desc.h
13740	AR5K_5212_RX_DESC_STATUS1_KEY_C	0x80000000	desc.h
13741	AR5K_RX_DESC_ERROR0	0x00000000	desc.h
13742	AR5K_RX_DESC_ERROR1_PHY_ERROR_C	0x0000ff00	desc.h
13743	AR5K_RX_DESC_ERROR1_PHY_ERROR_C	8	desc.h
13744	AR5K_DESC_RX_PHY_ERROR_NONE	0x00	desc.h
13745	AR5K_DESC_RX_PHY_ERROR_TIMING	0x20	desc.h
13746	AR5K_DESC_RX_PHY_ERROR_PARITY	0x40	desc.h
13747	AR5K_DESC_RX_PHY_ERROR_RATE	0x60	desc.h
13748	AR5K_DESC_RX_PHY_ERROR_LENGTH	0x80	desc.h
13749	AR5K_DESC_RX_PHY_ERROR_64QAM	0xa0	desc.h
13750	AR5K_DESC_RX_PHY_ERROR_SERVICE	0xc0	desc.h
13751	AR5K_DESC_RX_PHY_ERROR_TRANSMIT	0xe0	desc.h
13752	AR5K_2W_TX_DESC_CTL0_FRAME_LEN	0x00000fff	desc.h
13753	AR5K_2W_TX_DESC_CTL0_HEADER_LEN	0x0003f000	desc.h	[5210 ?]
13754	AR5K_2W_TX_DESC_CTL0_HEADER_LEN	12	desc.h
13755	AR5K_2W_TX_DESC_CTL0_XMIT_RATE	0x003c0000	desc.h
13756	AR5K_2W_TX_DESC_CTL0_XMIT_RATE_	18	desc.h
13757	AR5K_2W_TX_DESC_CTL0_RTSENA	0x00400000	desc.h
13758	AR5K_2W_TX_DESC_CTL0_CLRDMASK	0x01000000	desc.h
13759	AR5K_2W_TX_DESC_CTL0_LONG_PACKE	0x00800000	desc.h	[5210]
13760	AR5K_2W_TX_DESC_CTL0_VEOL	0x00800000	desc.h	[5211]
13761	AR5K_2W_TX_DESC_CTL0_FRAME_TYPE	0x1c000000	desc.h	[5210]
13762	AR5K_2W_TX_DESC_CTL0_FRAME_TYPE	26	desc.h
13763	AR5K_2W_TX_DESC_CTL0_ANT_MODE_X	0x02000000	desc.h
13764	AR5K_2W_TX_DESC_CTL0_ANT_MODE_X	0x1e000000	desc.h
13765	AR5K_2W_TX_DESC_CTL0_ANT_MODE_X	(ah->ah_version == AR5K_AR5210 ? \ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210 : \ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211)	desc.h
13766	AR5K_2W_TX_DESC_CTL0_ANT_MODE_X	25	desc.h
13767	AR5K_2W_TX_DESC_CTL0_INTREQ	0x20000000	desc.h
13768	AR5K_2W_TX_DESC_CTL0_ENCRYPT_KE	0x40000000	desc.h
13769	AR5K_2W_TX_DESC_CTL1_BUF_LEN	0x00000fff	desc.h
13770	AR5K_2W_TX_DESC_CTL1_MORE	0x00001000	desc.h
13771	AR5K_2W_TX_DESC_CTL1_ENCRYPT_KE	0x0007e000	desc.h
13772	AR5K_2W_TX_DESC_CTL1_ENCRYPT_KE	0x000fe000	desc.h
13773	AR5K_2W_TX_DESC_CTL1_ENCRYPT_KE	(ah->ah_version == AR5K_AR5210 ? \ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210 : \ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_52	desc.h
13774	AR5K_2W_TX_DESC_CTL1_ENCRYPT_KE	13	desc.h
13775	AR5K_2W_TX_DESC_CTL1_FRAME_TYPE	0x00700000	desc.h	[5211]
13776	AR5K_2W_TX_DESC_CTL1_FRAME_TYPE	20	desc.h
13777	AR5K_2W_TX_DESC_CTL1_NOACK	0x00800000	desc.h	[5211]
13778	AR5K_2W_TX_DESC_CTL1_RTS_DURATI	0xfff80000	desc.h	[5210 ?]
13779	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x00	desc.h
13780	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x04	desc.h
13781	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x08	desc.h
13782	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x0c	desc.h
13783	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x10	desc.h
13784	AR5K_DESC_TX_STATUS0_FRAME_XMIT	0x00000001	desc.h
13785	AR5K_DESC_TX_STATUS0_EXCESSIVE_	0x00000002	desc.h
13786	AR5K_DESC_TX_STATUS0_FIFO_UNDER	0x00000004	desc.h
13787	AR5K_DESC_TX_STATUS0_FILTERED	0x00000008	desc.h
13788	AR5K_DESC_TX_STATUS0_SHORT_RETR	0x000000f0	desc.h
13789	AR5K_DESC_TX_STATUS0_SHORT_RETR	4	desc.h
13790	AR5K_DESC_TX_STATUS0_LONG_RETRY	0x00000f00	desc.h
13791	AR5K_DESC_TX_STATUS0_LONG_RETRY	8	desc.h
13792	AR5K_DESC_TX_STATUS0_VIRT_COLL_	0x0000f000	desc.h
13793	AR5K_DESC_TX_STATUS0_VIRT_COLL_	12	desc.h
13794	AR5K_DESC_TX_STATUS0_SEND_TIMES	0xffff0000	desc.h
13795	AR5K_DESC_TX_STATUS0_SEND_TIMES	16	desc.h
13796	AR5K_DESC_TX_STATUS1_DONE	0x00000001	desc.h
13797	AR5K_DESC_TX_STATUS1_SEQ_NUM	0x00001ffe	desc.h
13798	AR5K_DESC_TX_STATUS1_SEQ_NUM_S	1	desc.h
13799	AR5K_DESC_TX_STATUS1_ACK_SIG_ST	0x001fe000	desc.h
13800	AR5K_DESC_TX_STATUS1_ACK_SIG_ST	13	desc.h
13801	AR5K_DESC_TX_STATUS1_FINAL_TS_I	0x00600000	desc.h
13802	AR5K_DESC_TX_STATUS1_FINAL_TS_I	21	desc.h
13803	AR5K_DESC_TX_STATUS1_COMP_SUCCE	0x00800000	desc.h
13804	AR5K_DESC_TX_STATUS1_XMIT_ANTEN	0x01000000	desc.h
13805	AR5K_RXDESC_INTREQ	0x0020	desc.h
13806	AR5K_TXDESC_CLRDMASK	0x0001	desc.h
13807	AR5K_TXDESC_NOACK	0x0002	desc.h	[5211+]
13808	AR5K_TXDESC_RTSENA	0x0004	desc.h
13809	AR5K_TXDESC_CTSENA	0x0008	desc.h
13810	AR5K_TXDESC_INTREQ	0x0010	desc.h
13811	AR5K_TXDESC_VEOL	0x0020	desc.h	[5211+]
13812	AR5K_EEPROM_MAGIC	0x003d	eeprom.h	EEPROM Magic number
13813	AR5K_EEPROM_MAGIC_VALUE	0x5aa5	eeprom.h	Default - found on EEPROM
13814	AR5K_EEPROM_MAGIC_5212	0x0000145c	eeprom.h	5212
13815	AR5K_EEPROM_MAGIC_5211	0x0000145b	eeprom.h	5211
13816	AR5K_EEPROM_MAGIC_5210	0x0000145a	eeprom.h	5210
13817	AR5K_EEPROM_IS_HB63	0x000b	eeprom.h	Talon detect
13818	AR5K_EEPROM_RFKILL	0x0f	eeprom.h
13819	AR5K_EEPROM_RFKILL_GPIO_SEL	0x0000001c	eeprom.h
13820	AR5K_EEPROM_RFKILL_GPIO_SEL_S	2	eeprom.h
13821	AR5K_EEPROM_RFKILL_POLARITY	0x00000002	eeprom.h
13822	AR5K_EEPROM_RFKILL_POLARITY_S	1	eeprom.h
13823	AR5K_EEPROM_REG_DOMAIN	0x00bf	eeprom.h	EEPROM regdom
13824	AR5K_EEPROM_CHECKSUM	0x00c0	eeprom.h	EEPROM checksum
13825	AR5K_EEPROM_INFO_BASE	0x00c0	eeprom.h	EEPROM header
13826	AR5K_EEPROM_INFO_MAX	(0x400 - AR5K_EEPROM_INFO_BASE)	eeprom.h
13827	AR5K_EEPROM_INFO_CKSUM	0xffff	eeprom.h
13828	AR5K_EEPROM_VERSION	AR5K_EEPROM_INFO(1)	eeprom.h	EEPROM Version
13829	AR5K_EEPROM_VERSION_3_0	0x3000	eeprom.h	No idea what's going on before this version
13830	AR5K_EEPROM_VERSION_3_1	0x3001	eeprom.h	ob/db values for 2Ghz (ar5211_rfregs)
13831	AR5K_EEPROM_VERSION_3_2	0x3002	eeprom.h	different frequency representation (eeprom_bin2freq)
13832	AR5K_EEPROM_VERSION_3_3	0x3003	eeprom.h	offsets changed, has 32 CTLs (see below) and ee_false_detect (eeprom_read_modes)
13833	AR5K_EEPROM_VERSION_3_4	0x3004	eeprom.h	has ee_i_gain, ee_cck_ofdm_power_delta (eeprom_read_modes)
13834	AR5K_EEPROM_VERSION_4_0	0x4000	eeprom.h	has ee_misc, ee_cal_pier, ee_turbo_max_power and ee_xr_power (eeprom_init)
13835	AR5K_EEPROM_VERSION_4_1	0x4001	eeprom.h	has ee_margin_tx_rx (eeprom_init)
13836	AR5K_EEPROM_VERSION_4_2	0x4002	eeprom.h	has ee_cck_ofdm_gain_delta (eeprom_init)
13837	AR5K_EEPROM_VERSION_4_3	0x4003	eeprom.h	power calibration changes
13838	AR5K_EEPROM_VERSION_4_4	0x4004	eeprom.h
13839	AR5K_EEPROM_VERSION_4_5	0x4005	eeprom.h
13840	AR5K_EEPROM_VERSION_4_6	0x4006	eeprom.h	has ee_scaled_cck_delta
13841	AR5K_EEPROM_VERSION_4_7	0x3007	eeprom.h	4007 ?
13842	AR5K_EEPROM_VERSION_4_9	0x4009	eeprom.h	EAR futureproofing
13843	AR5K_EEPROM_VERSION_5_0	0x5000	eeprom.h	Has 2413 PDADC calibration etc
13844	AR5K_EEPROM_VERSION_5_1	0x5001	eeprom.h	Has capability values
13845	AR5K_EEPROM_VERSION_5_3	0x5003	eeprom.h	Has spur mitigation tables
13846	AR5K_EEPROM_MODE_11A	0	eeprom.h
13847	AR5K_EEPROM_MODE_11B	1	eeprom.h
13848	AR5K_EEPROM_MODE_11G	2	eeprom.h
13849	AR5K_EEPROM_HDR	AR5K_EEPROM_INFO(2)	eeprom.h	Header that contains the device caps
13850	AR5K_EEPROM_RFKILL_GPIO_SEL	0x0000001c	eeprom.h
13851	AR5K_EEPROM_RFKILL_GPIO_SEL_S	2	eeprom.h
13852	AR5K_EEPROM_RFKILL_POLARITY	0x00000002	eeprom.h
13853	AR5K_EEPROM_RFKILL_POLARITY_S	1	eeprom.h
13854	AR5K_EEPROM_MISC0	AR5K_EEPROM_INFO(4)	eeprom.h
13855	AR5K_EEPROM_MISC1	AR5K_EEPROM_INFO(5)	eeprom.h
13856	AR5K_EEPROM_MISC2	AR5K_EEPROM_INFO(6)	eeprom.h
13857	AR5K_EEPROM_MISC3	AR5K_EEPROM_INFO(7)	eeprom.h
13858	AR5K_EEPROM_MISC4	AR5K_EEPROM_INFO(8)	eeprom.h
13859	AR5K_EEPROM_MISC5	AR5K_EEPROM_INFO(9)	eeprom.h
13860	AR5K_EEPROM_MISC6	AR5K_EEPROM_INFO(10)	eeprom.h
13861	AR5K_EEPROM_TX_CHAIN_DIS	((_v) & 0x8)	eeprom.h
13862	AR5K_EEPROM_RX_CHAIN_DIS	(((_v) >> 3) & 0x8)	eeprom.h
13863	AR5K_EEPROM_FCC_MID_EN	(((_v) >> 6) & 0x1)	eeprom.h
13864	AR5K_EEPROM_JAP_U1EVEN_EN	(((_v) >> 7) & 0x1)	eeprom.h
13865	AR5K_EEPROM_JAP_U2_EN	(((_v) >> 8) & 0x1)	eeprom.h
13866	AR5K_EEPROM_JAP_U1ODD_EN	(((_v) >> 9) & 0x1)	eeprom.h
13867	AR5K_EEPROM_JAP_11A_NEW_EN	(((_v) >> 10) & 0x1)	eeprom.h
13868	AR5K_EEPROM_GROUP1_OFFSET	0x0	eeprom.h
13869	AR5K_EEPROM_GROUP2_OFFSET	0x5	eeprom.h
13870	AR5K_EEPROM_GROUP3_OFFSET	0x37	eeprom.h
13871	AR5K_EEPROM_GROUP4_OFFSET	0x46	eeprom.h
13872	AR5K_EEPROM_GROUP5_OFFSET	0x55	eeprom.h
13873	AR5K_EEPROM_GROUP6_OFFSET	0x65	eeprom.h
13874	AR5K_EEPROM_GROUP7_OFFSET	0x69	eeprom.h
13875	AR5K_EEPROM_GROUP8_OFFSET	0x6f	eeprom.h
13876	AR5K_EEPROM_OBDB0_2GHZ	0x00ec	eeprom.h
13877	AR5K_EEPROM_OBDB1_2GHZ	0x00ed	eeprom.h
13878	AR5K_EEPROM_PROTECT	0x003f	eeprom.h	EEPROM protect status
13879	AR5K_EEPROM_PROTECT_RD_0_31	0x0001	eeprom.h	Read protection bit for offsets 0x0 - 0x1f
13880	AR5K_EEPROM_PROTECT_WR_0_31	0x0002	eeprom.h	Write protection bit for offsets 0x0 - 0x1f
13881	AR5K_EEPROM_PROTECT_RD_32_63	0x0004	eeprom.h	0x20 - 0x3f
13882	AR5K_EEPROM_PROTECT_WR_32_63	0x0008	eeprom.h
13883	AR5K_EEPROM_PROTECT_RD_64_127	0x0010	eeprom.h	0x40 - 0x7f
13884	AR5K_EEPROM_PROTECT_WR_64_127	0x0020	eeprom.h
13885	AR5K_EEPROM_PROTECT_RD_128_191	0x0040	eeprom.h	0x80 - 0xbf (regdom)
13886	AR5K_EEPROM_PROTECT_WR_128_191	0x0080	eeprom.h
13887	AR5K_EEPROM_PROTECT_RD_192_207	0x0100	eeprom.h	0xc0 - 0xcf
13888	AR5K_EEPROM_PROTECT_WR_192_207	0x0200	eeprom.h
13889	AR5K_EEPROM_PROTECT_RD_208_223	0x0400	eeprom.h	0xd0 - 0xdf
13890	AR5K_EEPROM_PROTECT_WR_208_223	0x0800	eeprom.h
13891	AR5K_EEPROM_PROTECT_RD_224_239	0x1000	eeprom.h	0xe0 - 0xef
13892	AR5K_EEPROM_PROTECT_WR_224_239	0x2000	eeprom.h
13893	AR5K_EEPROM_PROTECT_RD_240_255	0x4000	eeprom.h	0xf0 - 0xff
13894	AR5K_EEPROM_PROTECT_WR_240_255	0x8000	eeprom.h
13895	AR5K_EEPROM_EEP_SCALE	100	eeprom.h
13896	AR5K_EEPROM_EEP_DELTA	10	eeprom.h
13897	AR5K_EEPROM_N_MODES	3	eeprom.h
13898	AR5K_EEPROM_N_5GHZ_CHAN	10	eeprom.h
13899	AR5K_EEPROM_N_2GHZ_CHAN	3	eeprom.h
13900	AR5K_EEPROM_N_2GHZ_CHAN_2413	4	eeprom.h
13901	AR5K_EEPROM_N_2GHZ_CHAN_MAX	4	eeprom.h
13902	AR5K_EEPROM_MAX_CHAN	10	eeprom.h
13903	AR5K_EEPROM_N_PWR_POINTS_5111	11	eeprom.h
13904	AR5K_EEPROM_N_PCDAC	11	eeprom.h
13905	AR5K_EEPROM_N_PHASE_CAL	5	eeprom.h
13906	AR5K_EEPROM_N_TEST_FREQ	8	eeprom.h
13907	AR5K_EEPROM_N_EDGES	8	eeprom.h
13908	AR5K_EEPROM_N_INTERCEPTS	11	eeprom.h
13909	AR5K_EEPROM_PCDAC_M	0x3f	eeprom.h
13910	AR5K_EEPROM_PCDAC_START	1	eeprom.h
13911	AR5K_EEPROM_PCDAC_STOP	63	eeprom.h
13912	AR5K_EEPROM_PCDAC_STEP	1	eeprom.h
13913	AR5K_EEPROM_NON_EDGE_M	0x40	eeprom.h
13914	AR5K_EEPROM_CHANNEL_POWER	8	eeprom.h
13915	AR5K_EEPROM_N_OBDB	4	eeprom.h
13916	AR5K_EEPROM_OBDB_DIS	0xffff	eeprom.h
13917	AR5K_EEPROM_CHANNEL_DIS	0xff	eeprom.h
13918	AR5K_EEPROM_MAX_CTLS	32	eeprom.h
13919	AR5K_EEPROM_N_PD_CURVES	4	eeprom.h
13920	AR5K_EEPROM_N_XPD0_POINTS	4	eeprom.h
13921	AR5K_EEPROM_N_XPD3_POINTS	3	eeprom.h
13922	AR5K_EEPROM_N_PD_GAINS	4	eeprom.h
13923	AR5K_EEPROM_N_PD_POINTS	5	eeprom.h
13924	AR5K_EEPROM_N_INTERCEPT_10_2GHZ	35	eeprom.h
13925	AR5K_EEPROM_N_INTERCEPT_10_5GHZ	55	eeprom.h
13926	AR5K_EEPROM_POWER_M	0x3f	eeprom.h
13927	AR5K_EEPROM_POWER_MIN	0	eeprom.h
13928	AR5K_EEPROM_POWER_MAX	3150	eeprom.h
13929	AR5K_EEPROM_POWER_STEP	50	eeprom.h
13930	AR5K_EEPROM_POWER_TABLE_SIZE	64	eeprom.h
13931	AR5K_EEPROM_N_POWER_LOC_11B	4	eeprom.h
13932	AR5K_EEPROM_N_POWER_LOC_11G	6	eeprom.h
13933	AR5K_EEPROM_I_GAIN	10	eeprom.h
13934	AR5K_EEPROM_CCK_OFDM_DELTA	15	eeprom.h
13935	AR5K_EEPROM_N_IQ_CAL	2	eeprom.h
13936	AR5K_CTL_FCC	0x10	eeprom.h
13937	AR5K_CTL_CUSTOM	0x20	eeprom.h
13938	AR5K_CTL_ETSI	0x30	eeprom.h
13939	AR5K_CTL_MKK	0x40	eeprom.h
13940	AR5K_CTL_NO_REGDOMAIN	0xf0	eeprom.h
13941	AR5K_CTL_NO_CTL	0xff	eeprom.h
13942	AR5K_NOQCU_TXDP0	0x0000	reg.h	Queue 0 - data
13943	AR5K_NOQCU_TXDP1	0x0004	reg.h	Queue 1 - beacons
13944	AR5K_CR	0x0008	reg.h	Register Address
13945	AR5K_CR_TXE0	0x00000001	reg.h	TX Enable for queue 0 on 5210
13946	AR5K_CR_TXE1	0x00000002	reg.h	TX Enable for queue 1 on 5210
13947	AR5K_CR_RXE	0x00000004	reg.h	RX Enable
13948	AR5K_CR_TXD0	0x00000008	reg.h	TX Disable for queue 0 on 5210
13949	AR5K_CR_TXD1	0x00000010	reg.h	TX Disable for queue 1 on 5210
13950	AR5K_CR_RXD	0x00000020	reg.h	RX Disable
13951	AR5K_CR_SWI	0x00000040	reg.h	Software Interrupt
13952	AR5K_RXDP	0x000c	reg.h
13953	AR5K_CFG	0x0014	reg.h	Register Address
13954	AR5K_CFG_SWTD	0x00000001	reg.h	Byte-swap TX descriptor (for big endian archs)
13955	AR5K_CFG_SWTB	0x00000002	reg.h	Byte-swap TX buffer
13956	AR5K_CFG_SWRD	0x00000004	reg.h	Byte-swap RX descriptor
13957	AR5K_CFG_SWRB	0x00000008	reg.h	Byte-swap RX buffer
13958	AR5K_CFG_SWRG	0x00000010	reg.h	Byte-swap Register access
13959	AR5K_CFG_IBSS	0x00000020	reg.h	0-BSS, 1-IBSS [5211+]
13960	AR5K_CFG_PHY_OK	0x00000100	reg.h	[5211+]
13961	AR5K_CFG_EEBS	0x00000200	reg.h	EEPROM is busy
13962	AR5K_CFG_CLKGD	0x00000400	reg.h	Clock gated (Disable dynamic clock)
13963	AR5K_CFG_TXCNT	0x00007800	reg.h	Tx frame count (?) [5210]
13964	AR5K_CFG_TXCNT_S	11	reg.h
13965	AR5K_CFG_TXFSTAT	0x00008000	reg.h	Tx frame status (?) [5210]
13966	AR5K_CFG_TXFSTRT	0x00010000	reg.h	[5210]
13967	AR5K_CFG_PCI_THRES	0x00060000	reg.h	PCI Master req q threshold [5211+]
13968	AR5K_CFG_PCI_THRES_S	17	reg.h
13969	AR5K_IER	0x0024	reg.h	Register Address
13970	AR5K_IER_DISABLE	0x00000000	reg.h	Disable card interrupts
13971	AR5K_IER_ENABLE	0x00000001	reg.h	Enable card interrupts
13972	AR5K_BCR	0x0028	reg.h	Register Address
13973	AR5K_BCR_AP	0x00000000	reg.h	AP mode
13974	AR5K_BCR_ADHOC	0x00000001	reg.h	Ad-Hoc mode
13975	AR5K_BCR_BDMAE	0x00000002	reg.h	DMA enable
13976	AR5K_BCR_TQ1FV	0x00000004	reg.h	Use Queue1 for CAB traffic
13977	AR5K_BCR_TQ1V	0x00000008	reg.h	Use Queue1 for Beacon traffic
13978	AR5K_BCR_BCGET	0x00000010	reg.h
13979	AR5K_RTSD0	0x0028	reg.h	Register Address
13980	AR5K_RTSD0_6	0x000000ff	reg.h	6Mb RTS duration mask (?)
13981	AR5K_RTSD0_6_S	0	reg.h	6Mb RTS duration shift (?)
13982	AR5K_RTSD0_9	0x0000ff00	reg.h	9Mb
13983	AR5K_RTSD0_9_S	8	reg.h
13984	AR5K_RTSD0_12	0x00ff0000	reg.h	12Mb
13985	AR5K_RTSD0_12_S	16	reg.h
13986	AR5K_RTSD0_18	0xff000000	reg.h	16Mb
13987	AR5K_RTSD0_18_S	24	reg.h
13988	AR5K_BSR	0x002c	reg.h	Register Address
13989	AR5K_BSR_BDLYSW	0x00000001	reg.h	SW Beacon delay (?)
13990	AR5K_BSR_BDLYDMA	0x00000002	reg.h	DMA Beacon delay (?)
13991	AR5K_BSR_TXQ1F	0x00000004	reg.h	Beacon queue (1) finished
13992	AR5K_BSR_ATIMDLY	0x00000008	reg.h	ATIM delay (?)
13993	AR5K_BSR_SNPADHOC	0x00000100	reg.h	Ad-hoc mode set (?)
13994	AR5K_BSR_SNPBDMAE	0x00000200	reg.h	Beacon DMA enabled (?)
13995	AR5K_BSR_SNPTQ1FV	0x00000400	reg.h	Queue1 is used for CAB traffic (?)
13996	AR5K_BSR_SNPTQ1V	0x00000800	reg.h	Queue1 is used for Beacon traffic (?)
13997	AR5K_BSR_SNAPSHOTSVALID	0x00001000	reg.h	BCR snapshots are valid (?)
13998	AR5K_BSR_SWBA_CNT	0x00ff0000	reg.h
13999	AR5K_RTSD1	0x002c	reg.h	Register Address
14000	AR5K_RTSD1_24	0x000000ff	reg.h	24Mb
14001	AR5K_RTSD1_24_S	0	reg.h
14002	AR5K_RTSD1_36	0x0000ff00	reg.h	36Mb
14003	AR5K_RTSD1_36_S	8	reg.h
14004	AR5K_RTSD1_48	0x00ff0000	reg.h	48Mb
14005	AR5K_RTSD1_48_S	16	reg.h
14006	AR5K_RTSD1_54	0xff000000	reg.h	54Mb
14007	AR5K_RTSD1_54_S	24	reg.h
14008	AR5K_TXCFG	0x0030	reg.h	Register Address
14009	AR5K_TXCFG_SDMAMR	0x00000007	reg.h	DMA size (read)
14010	AR5K_TXCFG_SDMAMR_S	0	reg.h
14011	AR5K_TXCFG_B_MODE	0x00000008	reg.h	Set b mode for 5111 (enable 2111)
14012	AR5K_TXCFG_TXFSTP	0x00000008	reg.h	TX DMA full Stop [5210]
14013	AR5K_TXCFG_TXFULL	0x000003f0	reg.h	TX Triger level mask
14014	AR5K_TXCFG_TXFULL_S	4	reg.h
14015	AR5K_TXCFG_TXFULL_0B	0x00000000	reg.h
14016	AR5K_TXCFG_TXFULL_64B	0x00000010	reg.h
14017	AR5K_TXCFG_TXFULL_128B	0x00000020	reg.h
14018	AR5K_TXCFG_TXFULL_192B	0x00000030	reg.h
14019	AR5K_TXCFG_TXFULL_256B	0x00000040	reg.h
14020	AR5K_TXCFG_TXCONT_EN	0x00000080	reg.h
14021	AR5K_TXCFG_DMASIZE	0x00000100	reg.h	Flag for passing DMA size [5210]
14022	AR5K_TXCFG_JUMBO_DESC_EN	0x00000400	reg.h	Enable jumbo tx descriptors [5211+]
14023	AR5K_TXCFG_ADHOC_BCN_ATIM	0x00000800	reg.h	Adhoc Beacon ATIM Policy
14024	AR5K_TXCFG_ATIM_WINDOW_DEF_DIS	0x00001000	reg.h	Disable ATIM window defer [5211+]
14025	AR5K_TXCFG_RTSRND	0x00001000	reg.h	[5211+]
14026	AR5K_TXCFG_FRMPAD_DIS	0x00002000	reg.h	[5211+]
14027	AR5K_TXCFG_RDY_CBR_DIS	0x00004000	reg.h	Ready time CBR disable [5211+]
14028	AR5K_TXCFG_JUMBO_FRM_MODE	0x00008000	reg.h	Jumbo frame mode [5211+]
14029	AR5K_TXCFG_DCU_DBL_BUF_DIS	0x00008000	reg.h	Disable double buffering on DCU
14030	AR5K_TXCFG_DCU_CACHING_DIS	0x00010000	reg.h	Disable DCU caching
14031	AR5K_RXCFG	0x0034	reg.h	Register Address
14032	AR5K_RXCFG_SDMAMW	0x00000007	reg.h	DMA size (write)
14033	AR5K_RXCFG_SDMAMW_S	0	reg.h
14034	AR5K_RXCFG_ZLFDMA	0x00000008	reg.h	Enable Zero-length frame DMA
14035	AR5K_RXCFG_DEF_ANTENNA	0x00000010	reg.h	Default antenna (?)
14036	AR5K_RXCFG_JUMBO_RXE	0x00000020	reg.h	Enable jumbo rx descriptors [5211+]
14037	AR5K_RXCFG_JUMBO_WRAP	0x00000040	reg.h	Wrap jumbo frames [5211+]
14038	AR5K_RXCFG_SLE_ENTRY	0x00000080	reg.h	Sleep entry policy
14039	AR5K_RXJLA	0x0038	reg.h
14040	AR5K_MIBC	0x0040	reg.h	Register Address
14041	AR5K_MIBC_COW	0x00000001	reg.h	Warn test indicator
14042	AR5K_MIBC_FMC	0x00000002	reg.h	Freeze MIB Counters
14043	AR5K_MIBC_CMC	0x00000004	reg.h	Clean MIB Counters
14044	AR5K_MIBC_MCS	0x00000008	reg.h	MIB counter strobe
14045	AR5K_TOPS	0x0044	reg.h
14046	AR5K_TOPS_M	0x0000ffff	reg.h
14047	AR5K_RXNOFRM	0x0048	reg.h
14048	AR5K_RXNOFRM_M	0x000003ff	reg.h
14049	AR5K_TXNOFRM	0x004c	reg.h
14050	AR5K_TXNOFRM_M	0x000003ff	reg.h
14051	AR5K_TXNOFRM_QCU	0x000ffc00	reg.h
14052	AR5K_TXNOFRM_QCU_S	10	reg.h
14053	AR5K_RPGTO	0x0050	reg.h
14054	AR5K_RPGTO_M	0x000003ff	reg.h
14055	AR5K_RFCNT	0x0054	reg.h
14056	AR5K_RFCNT_M	0x0000001f	reg.h	[5211+] (?)
14057	AR5K_RFCNT_RFCL	0x0000000f	reg.h	[5210]
14058	AR5K_MISC	0x0058	reg.h	Register Address
14059	AR5K_MISC_DMA_OBS_M	0x000001e0	reg.h
14060	AR5K_MISC_DMA_OBS_S	5	reg.h
14061	AR5K_MISC_MISC_OBS_M	0x00000e00	reg.h
14062	AR5K_MISC_MISC_OBS_S	9	reg.h
14063	AR5K_MISC_MAC_OBS_LSB_M	0x00007000	reg.h
14064	AR5K_MISC_MAC_OBS_LSB_S	12	reg.h
14065	AR5K_MISC_MAC_OBS_MSB_M	0x00038000	reg.h
14066	AR5K_MISC_MAC_OBS_MSB_S	15	reg.h
14067	AR5K_MISC_LED_DECAY	0x001c0000	reg.h	[5210]
14068	AR5K_MISC_LED_BLINK	0x00e00000	reg.h	[5210]
14069	AR5K_QCUDCU_CLKGT	0x005c	reg.h	Register Address (?)
14070	AR5K_QCUDCU_CLKGT_QCU	0x0000ffff	reg.h	Mask for QCU clock
14071	AR5K_QCUDCU_CLKGT_DCU	0x07ff0000	reg.h	Mask for DCU clock
14072	AR5K_ISR	0x001c	reg.h	Register Address [5210]
14073	AR5K_PISR	0x0080	reg.h	Register Address [5211+]
14074	AR5K_ISR_RXOK	0x00000001	reg.h	Frame successfuly recieved
14075	AR5K_ISR_RXDESC	0x00000002	reg.h	RX descriptor request
14076	AR5K_ISR_RXERR	0x00000004	reg.h	Receive error
14077	AR5K_ISR_RXNOFRM	0x00000008	reg.h	No frame received (receive timeout)
14078	AR5K_ISR_RXEOL	0x00000010	reg.h	Empty RX descriptor
14079	AR5K_ISR_RXORN	0x00000020	reg.h	Receive FIFO overrun
14080	AR5K_ISR_TXOK	0x00000040	reg.h	Frame successfuly transmited
14081	AR5K_ISR_TXDESC	0x00000080	reg.h	TX descriptor request
14082	AR5K_ISR_TXERR	0x00000100	reg.h	Transmit error
14083	AR5K_ISR_TXNOFRM	0x00000200	reg.h	No frame transmited (transmit timeout)
14084	AR5K_ISR_TXEOL	0x00000400	reg.h	Empty TX descriptor
14085	AR5K_ISR_TXURN	0x00000800	reg.h	Transmit FIFO underrun
14086	AR5K_ISR_MIB	0x00001000	reg.h	Update MIB counters
14087	AR5K_ISR_SWI	0x00002000	reg.h	Software interrupt
14088	AR5K_ISR_RXPHY	0x00004000	reg.h	PHY error
14089	AR5K_ISR_RXKCM	0x00008000	reg.h	RX Key cache miss
14090	AR5K_ISR_SWBA	0x00010000	reg.h	Software beacon alert
14091	AR5K_ISR_BRSSI	0x00020000	reg.h	Beacon rssi below threshold (?)
14092	AR5K_ISR_BMISS	0x00040000	reg.h	Beacon missed
14093	AR5K_ISR_HIUERR	0x00080000	reg.h	Host Interface Unit error [5211+]
14094	AR5K_ISR_BNR	0x00100000	reg.h	Beacon not ready [5211+]
14095	AR5K_ISR_MCABT	0x00100000	reg.h	Master Cycle Abort [5210]
14096	AR5K_ISR_RXCHIRP	0x00200000	reg.h	CHIRP Received [5212+]
14097	AR5K_ISR_SSERR	0x00200000	reg.h	Signaled System Error [5210]
14098	AR5K_ISR_DPERR	0x00400000	reg.h	Det par Error (?) [5210]
14099	AR5K_ISR_RXDOPPLER	0x00400000	reg.h	Doppler chirp received [5212+]
14100	AR5K_ISR_TIM	0x00800000	reg.h	[5211+]
14101	AR5K_ISR_BCNMISC	0x00800000	reg.h	'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
14102	AR5K_ISR_GPIO	0x01000000	reg.h	GPIO (rf kill)
14103	AR5K_ISR_QCBRORN	0x02000000	reg.h	QCU CBR overrun [5211+]
14104	AR5K_ISR_QCBRURN	0x04000000	reg.h	QCU CBR underrun [5211+]
14105	AR5K_ISR_QTRIG	0x08000000	reg.h	QCU scheduling trigger [5211+]
14106	AR5K_SISR0	0x0084	reg.h	Register Address [5211+]
14107	AR5K_SISR0_QCU_TXOK	0x000003ff	reg.h	Mask for QCU_TXOK
14108	AR5K_SISR0_QCU_TXOK_S	0	reg.h
14109	AR5K_SISR0_QCU_TXDESC	0x03ff0000	reg.h	Mask for QCU_TXDESC
14110	AR5K_SISR0_QCU_TXDESC_S	16	reg.h
14111	AR5K_SISR1	0x0088	reg.h	Register Address [5211+]
14112	AR5K_SISR1_QCU_TXERR	0x000003ff	reg.h	Mask for QCU_TXERR
14113	AR5K_SISR1_QCU_TXERR_S	0	reg.h
14114	AR5K_SISR1_QCU_TXEOL	0x03ff0000	reg.h	Mask for QCU_TXEOL
14115	AR5K_SISR1_QCU_TXEOL_S	16	reg.h
14116	AR5K_SISR2	0x008c	reg.h	Register Address [5211+]
14117	AR5K_SISR2_QCU_TXURN	0x000003ff	reg.h	Mask for QCU_TXURN
14118	AR5K_SISR2_QCU_TXURN_S	0	reg.h
14119	AR5K_SISR2_MCABT	0x00100000	reg.h	Master Cycle Abort
14120	AR5K_SISR2_SSERR	0x00200000	reg.h	Signaled System Error
14121	AR5K_SISR2_DPERR	0x00400000	reg.h	Bus parity error
14122	AR5K_SISR2_TIM	0x01000000	reg.h	[5212+]
14123	AR5K_SISR2_CAB_END	0x02000000	reg.h	[5212+]
14124	AR5K_SISR2_DTIM_SYNC	0x04000000	reg.h	DTIM sync lost [5212+]
14125	AR5K_SISR2_BCN_TIMEOUT	0x08000000	reg.h	Beacon Timeout [5212+]
14126	AR5K_SISR2_CAB_TIMEOUT	0x10000000	reg.h	CAB Timeout [5212+]
14127	AR5K_SISR2_DTIM	0x20000000	reg.h	[5212+]
14128	AR5K_SISR2_TSFOOR	0x80000000	reg.h	TSF OOR (?)
14129	AR5K_SISR3	0x0090	reg.h	Register Address [5211+]
14130	AR5K_SISR3_QCBRORN	0x000003ff	reg.h	Mask for QCBRORN
14131	AR5K_SISR3_QCBRORN_S	0	reg.h
14132	AR5K_SISR3_QCBRURN	0x03ff0000	reg.h	Mask for QCBRURN
14133	AR5K_SISR3_QCBRURN_S	16	reg.h
14134	AR5K_SISR4	0x0094	reg.h	Register Address [5211+]
14135	AR5K_SISR4_QTRIG	0x000003ff	reg.h	Mask for QTRIG
14136	AR5K_SISR4_QTRIG_S	0	reg.h
14137	AR5K_RAC_PISR	0x00c0	reg.h	Read and clear PISR
14138	AR5K_RAC_SISR0	0x00c4	reg.h	Read and clear SISR0
14139	AR5K_RAC_SISR1	0x00c8	reg.h	Read and clear SISR1
14140	AR5K_RAC_SISR2	0x00cc	reg.h	Read and clear SISR2
14141	AR5K_RAC_SISR3	0x00d0	reg.h	Read and clear SISR3
14142	AR5K_RAC_SISR4	0x00d4	reg.h	Read and clear SISR4
14143	AR5K_IMR	0x0020	reg.h	Register Address [5210]
14144	AR5K_PIMR	0x00a0	reg.h	Register Address [5211+]
14145	AR5K_IMR_RXOK	0x00000001	reg.h	Frame successfuly recieved
14146	AR5K_IMR_RXDESC	0x00000002	reg.h	RX descriptor request
14147	AR5K_IMR_RXERR	0x00000004	reg.h	Receive error
14148	AR5K_IMR_RXNOFRM	0x00000008	reg.h	No frame received (receive timeout)
14149	AR5K_IMR_RXEOL	0x00000010	reg.h	Empty RX descriptor
14150	AR5K_IMR_RXORN	0x00000020	reg.h	Receive FIFO overrun
14151	AR5K_IMR_TXOK	0x00000040	reg.h	Frame successfuly transmited
14152	AR5K_IMR_TXDESC	0x00000080	reg.h	TX descriptor request
14153	AR5K_IMR_TXERR	0x00000100	reg.h	Transmit error
14154	AR5K_IMR_TXNOFRM	0x00000200	reg.h	No frame transmited (transmit timeout)
14155	AR5K_IMR_TXEOL	0x00000400	reg.h	Empty TX descriptor
14156	AR5K_IMR_TXURN	0x00000800	reg.h	Transmit FIFO underrun
14157	AR5K_IMR_MIB	0x00001000	reg.h	Update MIB counters
14158	AR5K_IMR_SWI	0x00002000	reg.h	Software interrupt
14159	AR5K_IMR_RXPHY	0x00004000	reg.h	PHY error
14160	AR5K_IMR_RXKCM	0x00008000	reg.h	RX Key cache miss
14161	AR5K_IMR_SWBA	0x00010000	reg.h	Software beacon alert
14162	AR5K_IMR_BRSSI	0x00020000	reg.h	Beacon rssi below threshold (?)
14163	AR5K_IMR_BMISS	0x00040000	reg.h	Beacon missed
14164	AR5K_IMR_HIUERR	0x00080000	reg.h	Host Interface Unit error [5211+]
14165	AR5K_IMR_BNR	0x00100000	reg.h	Beacon not ready [5211+]
14166	AR5K_IMR_MCABT	0x00100000	reg.h	Master Cycle Abort [5210]
14167	AR5K_IMR_RXCHIRP	0x00200000	reg.h	CHIRP Received [5212+]
14168	AR5K_IMR_SSERR	0x00200000	reg.h	Signaled System Error [5210]
14169	AR5K_IMR_DPERR	0x00400000	reg.h	Det par Error (?) [5210]
14170	AR5K_IMR_RXDOPPLER	0x00400000	reg.h	Doppler chirp received [5212+]
14171	AR5K_IMR_TIM	0x00800000	reg.h	[5211+]
14172	AR5K_IMR_BCNMISC	0x00800000	reg.h	'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
14173	AR5K_IMR_GPIO	0x01000000	reg.h	GPIO (rf kill)
14174	AR5K_IMR_QCBRORN	0x02000000	reg.h	QCU CBR overrun (?) [5211+]
14175	AR5K_IMR_QCBRURN	0x04000000	reg.h	QCU CBR underrun (?) [5211+]
14176	AR5K_IMR_QTRIG	0x08000000	reg.h	QCU scheduling trigger [5211+]
14177	AR5K_SIMR0	0x00a4	reg.h	Register Address [5211+]
14178	AR5K_SIMR0_QCU_TXOK	0x000003ff	reg.h	Mask for QCU_TXOK
14179	AR5K_SIMR0_QCU_TXOK_S	0	reg.h
14180	AR5K_SIMR0_QCU_TXDESC	0x03ff0000	reg.h	Mask for QCU_TXDESC
14181	AR5K_SIMR0_QCU_TXDESC_S	16	reg.h
14182	AR5K_SIMR1	0x00a8	reg.h	Register Address [5211+]
14183	AR5K_SIMR1_QCU_TXERR	0x000003ff	reg.h	Mask for QCU_TXERR
14184	AR5K_SIMR1_QCU_TXERR_S	0	reg.h
14185	AR5K_SIMR1_QCU_TXEOL	0x03ff0000	reg.h	Mask for QCU_TXEOL
14186	AR5K_SIMR1_QCU_TXEOL_S	16	reg.h
14187	AR5K_SIMR2	0x00ac	reg.h	Register Address [5211+]
14188	AR5K_SIMR2_QCU_TXURN	0x000003ff	reg.h	Mask for QCU_TXURN
14189	AR5K_SIMR2_QCU_TXURN_S	0	reg.h
14190	AR5K_SIMR2_MCABT	0x00100000	reg.h	Master Cycle Abort
14191	AR5K_SIMR2_SSERR	0x00200000	reg.h	Signaled System Error
14192	AR5K_SIMR2_DPERR	0x00400000	reg.h	Bus parity error
14193	AR5K_SIMR2_TIM	0x01000000	reg.h	[5212+]
14194	AR5K_SIMR2_CAB_END	0x02000000	reg.h	[5212+]
14195	AR5K_SIMR2_DTIM_SYNC	0x04000000	reg.h	DTIM Sync lost [5212+]
14196	AR5K_SIMR2_BCN_TIMEOUT	0x08000000	reg.h	Beacon Timeout [5212+]
14197	AR5K_SIMR2_CAB_TIMEOUT	0x10000000	reg.h	CAB Timeout [5212+]
14198	AR5K_SIMR2_DTIM	0x20000000	reg.h	[5212+]
14199	AR5K_SIMR2_TSFOOR	0x80000000	reg.h	TSF OOR (?)
14200	AR5K_SIMR3	0x00b0	reg.h	Register Address [5211+]
14201	AR5K_SIMR3_QCBRORN	0x000003ff	reg.h	Mask for QCBRORN
14202	AR5K_SIMR3_QCBRORN_S	0	reg.h
14203	AR5K_SIMR3_QCBRURN	0x03ff0000	reg.h	Mask for QCBRURN
14204	AR5K_SIMR3_QCBRURN_S	16	reg.h
14205	AR5K_SIMR4	0x00b4	reg.h	Register Address [5211+]
14206	AR5K_SIMR4_QTRIG	0x000003ff	reg.h	Mask for QTRIG
14207	AR5K_SIMR4_QTRIG_S	0	reg.h
14208	AR5K_DCM_ADDR	0x0400	reg.h	Decompression mask address (index)
14209	AR5K_DCM_DATA	0x0404	reg.h	Decompression mask data
14210	AR5K_WOW_PCFG	0x0410	reg.h	Register Address
14211	AR5K_WOW_PCFG_PAT_MATCH_EN	0x00000001	reg.h	Pattern match enable
14212	AR5K_WOW_PCFG_LONG_FRAME_POL	0x00000002	reg.h	Long frame policy
14213	AR5K_WOW_PCFG_WOBMISS	0x00000004	reg.h	Wake on bea(con) miss (?)
14214	AR5K_WOW_PCFG_PAT_0_EN	0x00000100	reg.h	Enable pattern 0
14215	AR5K_WOW_PCFG_PAT_1_EN	0x00000200	reg.h	Enable pattern 1
14216	AR5K_WOW_PCFG_PAT_2_EN	0x00000400	reg.h	Enable pattern 2
14217	AR5K_WOW_PCFG_PAT_3_EN	0x00000800	reg.h	Enable pattern 3
14218	AR5K_WOW_PCFG_PAT_4_EN	0x00001000	reg.h	Enable pattern 4
14219	AR5K_WOW_PCFG_PAT_5_EN	0x00002000	reg.h	Enable pattern 5
14220	AR5K_WOW_PAT_IDX	0x0414	reg.h
14221	AR5K_WOW_PAT_DATA	0x0418	reg.h	Register Address
14222	AR5K_WOW_PAT_DATA_0_3_V	0x00000001	reg.h	Pattern 0, 3 value
14223	AR5K_WOW_PAT_DATA_1_4_V	0x00000100	reg.h	Pattern 1, 4 value
14224	AR5K_WOW_PAT_DATA_2_5_V	0x00010000	reg.h	Pattern 2, 5 value
14225	AR5K_WOW_PAT_DATA_0_3_M	0x01000000	reg.h	Pattern 0, 3 mask
14226	AR5K_WOW_PAT_DATA_1_4_M	0x04000000	reg.h	Pattern 1, 4 mask
14227	AR5K_WOW_PAT_DATA_2_5_M	0x10000000	reg.h	Pattern 2, 5 mask
14228	AR5K_DCCFG	0x0420	reg.h	Register Address
14229	AR5K_DCCFG_GLOBAL_EN	0x00000001	reg.h	Enable decompression on all queues
14230	AR5K_DCCFG_BYPASS_EN	0x00000002	reg.h	Bypass decompression
14231	AR5K_DCCFG_BCAST_EN	0x00000004	reg.h	Enable decompression for bcast frames
14232	AR5K_DCCFG_MCAST_EN	0x00000008	reg.h	Enable decompression for mcast frames
14233	AR5K_CCFG	0x0600	reg.h	Register Address
14234	AR5K_CCFG_WINDOW_SIZE	0x00000007	reg.h	Compression window size
14235	AR5K_CCFG_CPC_EN	0x00000008	reg.h	Enable performance counters
14236	AR5K_CCFG_CCU	0x0604	reg.h	Register Address
14237	AR5K_CCFG_CCU_CUP_EN	0x00000001	reg.h	CCU Catchup enable
14238	AR5K_CCFG_CCU_CREDIT	0x00000002	reg.h	CCU Credit (field)
14239	AR5K_CCFG_CCU_CD_THRES	0x00000080	reg.h	CCU Cyc(lic?) debt threshold (field)
14240	AR5K_CCFG_CCU_CUP_LCNT	0x00010000	reg.h	CCU Catchup lit(?) count
14241	AR5K_CCFG_CCU_INIT	0x00100200	reg.h	Initial value during reset
14242	AR5K_CPC0	0x0610	reg.h	Compression performance counter 0
14243	AR5K_CPC1	0x0614	reg.h	Compression performance counter 1
14244	AR5K_CPC2	0x0618	reg.h	Compression performance counter 2
14245	AR5K_CPC3	0x061c	reg.h	Compression performance counter 3
14246	AR5K_CPCOVF	0x0620	reg.h	Compression performance overflow
14247	AR5K_QCU_TXDP_BASE	0x0800	reg.h	Register Address - Queue0 TXDP
14248	AR5K_QCU_TXE	0x0840	reg.h
14249	AR5K_QCU_TXD	0x0880	reg.h
14250	AR5K_QCU_CBRCFG_BASE	0x08c0	reg.h	Register Address - Queue0 CBRCFG
14251	AR5K_QCU_CBRCFG_INTVAL	0x00ffffff	reg.h	CBR Interval mask
14252	AR5K_QCU_CBRCFG_INTVAL_S	0	reg.h
14253	AR5K_QCU_CBRCFG_ORN_THRES	0xff000000	reg.h	CBR overrun threshold mask
14254	AR5K_QCU_CBRCFG_ORN_THRES_S	24	reg.h
14255	AR5K_QCU_RDYTIMECFG_BASE	0x0900	reg.h	Register Address - Queue0 RDYTIMECFG
14256	AR5K_QCU_RDYTIMECFG_INTVAL	0x00ffffff	reg.h	Ready time interval mask
14257	AR5K_QCU_RDYTIMECFG_INTVAL_S	0	reg.h
14258	AR5K_QCU_RDYTIMECFG_ENABLE	0x01000000	reg.h	Ready time enable mask
14259	AR5K_QCU_ONESHOTARM_SET	0x0940	reg.h	Register Address -QCU "one shot arm set (?)"
14260	AR5K_QCU_ONESHOTARM_SET_M	0x0000ffff	reg.h
14261	AR5K_QCU_ONESHOTARM_CLEAR	0x0980	reg.h	Register Address -QCU "one shot arm clear (?)"
14262	AR5K_QCU_ONESHOTARM_CLEAR_M	0x0000ffff	reg.h
14263	AR5K_QCU_MISC_BASE	0x09c0	reg.h	Register Address -Queue0 MISC
14264	AR5K_QCU_MISC_FRSHED_M	0x0000000f	reg.h	Frame sheduling mask
14265	AR5K_QCU_MISC_FRSHED_ASAP	0	reg.h	ASAP
14266	AR5K_QCU_MISC_FRSHED_CBR	1	reg.h	Constant Bit Rate
14267	AR5K_QCU_MISC_FRSHED_DBA_GT	2	reg.h	DMA Beacon alert gated
14268	AR5K_QCU_MISC_FRSHED_TIM_GT	3	reg.h	TIMT gated
14269	AR5K_QCU_MISC_FRSHED_BCN_SENT_G	4	reg.h	Beacon sent gated
14270	AR5K_QCU_MISC_ONESHOT_ENABLE	0x00000010	reg.h	Oneshot enable
14271	AR5K_QCU_MISC_CBREXP_DIS	0x00000020	reg.h	Disable CBR expired counter (normal queue)
14272	AR5K_QCU_MISC_CBREXP_BCN_DIS	0x00000040	reg.h	Disable CBR expired counter (beacon queue)
14273	AR5K_QCU_MISC_BCN_ENABLE	0x00000080	reg.h	Enable Beacon use
14274	AR5K_QCU_MISC_CBR_THRES_ENABLE	0x00000100	reg.h	CBR expired threshold enabled
14275	AR5K_QCU_MISC_RDY_VEOL_POLICY	0x00000200	reg.h	TXE reset when RDYTIME expired or VEOL
14276	AR5K_QCU_MISC_CBR_RESET_CNT	0x00000400	reg.h	CBR threshold (counter) reset
14277	AR5K_QCU_MISC_DCU_EARLY	0x00000800	reg.h	DCU early termination
14278	AR5K_QCU_MISC_DCU_CMP_EN	0x00001000	reg.h	Enable frame compression
14279	AR5K_QCU_STS_BASE	0x0a00	reg.h	Register Address - Queue0 STS
14280	AR5K_QCU_STS_FRMPENDCNT	0x00000003	reg.h	Frames pending counter
14281	AR5K_QCU_STS_CBREXPCNT	0x0000ff00	reg.h	CBR expired counter
14282	AR5K_QCU_RDYTIMESHDN	0x0a40	reg.h
14283	AR5K_QCU_RDYTIMESHDN_M	0x000003ff	reg.h
14284	AR5K_QCU_CBB_SELECT	0x0b00	reg.h
14285	AR5K_QCU_CBB_ADDR	0x0b04	reg.h
14286	AR5K_QCU_CBB_ADDR_S	9	reg.h
14287	AR5K_QCU_CBCFG	0x0b08	reg.h
14288	AR5K_DCU_QCUMASK_BASE	0x1000	reg.h	Register Address -Queue0 DCU_QCUMASK
14289	AR5K_DCU_QCUMASK_M	0x000003ff	reg.h
14290	AR5K_DCU_LCL_IFS_BASE	0x1040	reg.h	Register Address -Queue0 DCU_LCL_IFS
14291	AR5K_DCU_LCL_IFS_CW_MIN	0x000003ff	reg.h	Minimum Contention Window
14292	AR5K_DCU_LCL_IFS_CW_MIN_S	0	reg.h
14293	AR5K_DCU_LCL_IFS_CW_MAX	0x000ffc00	reg.h	Maximum Contention Window
14294	AR5K_DCU_LCL_IFS_CW_MAX_S	10	reg.h
14295	AR5K_DCU_LCL_IFS_AIFS	0x0ff00000	reg.h	Arbitrated Interframe Space
14296	AR5K_DCU_LCL_IFS_AIFS_S	20	reg.h
14297	AR5K_DCU_LCL_IFS_AIFS_MAX	0xfc	reg.h	Anything above that can cause DCU to hang
14298	AR5K_DCU_RETRY_LMT_BASE	0x1080	reg.h	Register Address -Queue0 DCU_RETRY_LMT
14299	AR5K_DCU_RETRY_LMT_SH_RETRY	0x0000000f	reg.h	Short retry limit mask
14300	AR5K_DCU_RETRY_LMT_SH_RETRY_S	0	reg.h
14301	AR5K_DCU_RETRY_LMT_LG_RETRY	0x000000f0	reg.h	Long retry limit mask
14302	AR5K_DCU_RETRY_LMT_LG_RETRY_S	4	reg.h
14303	AR5K_DCU_RETRY_LMT_SSH_RETRY	0x00003f00	reg.h	Station short retry limit mask (?)
14304	AR5K_DCU_RETRY_LMT_SSH_RETRY_S	8	reg.h
14305	AR5K_DCU_RETRY_LMT_SLG_RETRY	0x000fc000	reg.h	Station long retry limit mask (?)
14306	AR5K_DCU_RETRY_LMT_SLG_RETRY_S	14	reg.h
14307	AR5K_DCU_CHAN_TIME_BASE	0x10c0	reg.h	Register Address -Queue0 DCU_CHAN_TIME
14308	AR5K_DCU_CHAN_TIME_DUR	0x000fffff	reg.h	Channel time duration
14309	AR5K_DCU_CHAN_TIME_DUR_S	0	reg.h
14310	AR5K_DCU_CHAN_TIME_ENABLE	0x00100000	reg.h	Enable channel time
14311	AR5K_DCU_MISC_BASE	0x1100	reg.h	Register Address -Queue0 DCU_MISC
14312	AR5K_DCU_MISC_BACKOFF	0x0000003f	reg.h	Mask for backoff threshold
14313	AR5K_DCU_MISC_ETS_RTS_POL	0x00000040	reg.h	End of transmission series
14314	AR5K_DCU_MISC_ETS_CW_POL	0x00000080	reg.h	End of transmission series
14315	AR5K_DCU_MISC_FRAG_WAIT	0x00000100	reg.h	Wait for next fragment
14316	AR5K_DCU_MISC_BACKOFF_FRAG	0x00000200	reg.h	Enable backoff while bursting
14317	AR5K_DCU_MISC_HCFPOLL_ENABLE	0x00000800	reg.h	CF - Poll enable
14318	AR5K_DCU_MISC_BACKOFF_PERSIST	0x00001000	reg.h	Persistent backoff
14319	AR5K_DCU_MISC_FRMPRFTCH_ENABLE	0x00002000	reg.h	Enable frame pre-fetch
14320	AR5K_DCU_MISC_VIRTCOL	0x0000c000	reg.h	Mask for Virtual Collision (?)
14321	AR5K_DCU_MISC_VIRTCOL_NORMAL	0	reg.h
14322	AR5K_DCU_MISC_VIRTCOL_IGNORE	1	reg.h
14323	AR5K_DCU_MISC_BCN_ENABLE	0x00010000	reg.h	Enable Beacon use
14324	AR5K_DCU_MISC_ARBLOCK_CTL	0x00060000	reg.h	Arbiter lockout control mask
14325	AR5K_DCU_MISC_ARBLOCK_CTL_S	17	reg.h
14326	AR5K_DCU_MISC_ARBLOCK_CTL_NONE	0	reg.h	No arbiter lockout
14327	AR5K_DCU_MISC_ARBLOCK_CTL_INTFR	1	reg.h	Intra-frame lockout
14328	AR5K_DCU_MISC_ARBLOCK_CTL_GLOBA	2	reg.h	Global lockout
14329	AR5K_DCU_MISC_ARBLOCK_IGNORE	0x00080000	reg.h	Ignore Arbiter lockout
14330	AR5K_DCU_MISC_SEQ_NUM_INCR_DIS	0x00100000	reg.h	Disable sequence number increment
14331	AR5K_DCU_MISC_POST_FR_BKOFF_DIS	0x00200000	reg.h	Disable post-frame backoff
14332	AR5K_DCU_MISC_VIRT_COLL_POLICY	0x00400000	reg.h	Virtual Collision cw policy
14333	AR5K_DCU_MISC_BLOWN_IFS_POLICY	0x00800000	reg.h	Blown IFS policy (?)
14334	AR5K_DCU_MISC_SEQNUM_CTL	0x01000000	reg.h	Sequence number control (?)
14335	AR5K_DCU_SEQNUM_BASE	0x1140	reg.h
14336	AR5K_DCU_SEQNUM_M	0x00000fff	reg.h
14337	AR5K_DCU_GBL_IFS_SIFS	0x1030	reg.h
14338	AR5K_DCU_GBL_IFS_SIFS_M	0x0000ffff	reg.h
14339	AR5K_DCU_GBL_IFS_SLOT	0x1070	reg.h
14340	AR5K_DCU_GBL_IFS_SLOT_M	0x0000ffff	reg.h
14341	AR5K_DCU_GBL_IFS_EIFS	0x10b0	reg.h
14342	AR5K_DCU_GBL_IFS_EIFS_M	0x0000ffff	reg.h
14343	AR5K_DCU_GBL_IFS_MISC	0x10f0	reg.h	Register Address
14344	AR5K_DCU_GBL_IFS_MISC_LFSR_SLIC	0x00000007	reg.h	LFSR Slice Select
14345	AR5K_DCU_GBL_IFS_MISC_TURBO_MOD	0x00000008	reg.h	Turbo mode
14346	AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_	0x000003f0	reg.h	SIFS Duration mask
14347	AR5K_DCU_GBL_IFS_MISC_USEC_DUR	0x000ffc00	reg.h	USEC Duration mask
14348	AR5K_DCU_GBL_IFS_MISC_USEC_DUR_	10	reg.h
14349	AR5K_DCU_GBL_IFS_MISC_DCU_ARB_D	0x00300000	reg.h	DCU Arbiter delay mask
14350	AR5K_DCU_GBL_IFS_MISC_SIFS_CNT_	0x00400000	reg.h	SIFS cnt reset policy (?)
14351	AR5K_DCU_GBL_IFS_MISC_AIFS_CNT_	0x00800000	reg.h	AIFS cnt reset policy (?)
14352	AR5K_DCU_GBL_IFS_MISC_RND_LFSR_	0x01000000	reg.h	Disable random LFSR slice
14353	AR5K_DCU_FP	0x1230	reg.h	Register Address
14354	AR5K_DCU_FP_NOBURST_DCU_EN	0x00000001	reg.h	Enable non-burst prefetch on DCU (?)
14355	AR5K_DCU_FP_NOBURST_EN	0x00000010	reg.h	Enable non-burst prefetch (?)
14356	AR5K_DCU_FP_BURST_DCU_EN	0x00000020	reg.h	Enable burst prefetch on DCU (?)
14357	AR5K_DCU_TXP	0x1270	reg.h	Register Address
14358	AR5K_DCU_TXP_M	0x000003ff	reg.h	Tx pause mask
14359	AR5K_DCU_TXP_STATUS	0x00010000	reg.h	Tx pause status
14360	AR5K_DCU_TX_FILTER_0_BASE	0x1038	reg.h
14361	AR5K_DCU_TX_FILTER_1_BASE	0x103c	reg.h
14362	AR5K_DCU_TX_FILTER_CLR	0x143c	reg.h
14363	AR5K_DCU_TX_FILTER_SET	0x147c	reg.h
14364	AR5K_RESET_CTL	0x4000	reg.h	Register Address
14365	AR5K_RESET_CTL_PCU	0x00000001	reg.h	Protocol Control Unit reset
14366	AR5K_RESET_CTL_DMA	0x00000002	reg.h	DMA (Rx/Tx) reset [5210]
14367	AR5K_RESET_CTL_BASEBAND	0x00000002	reg.h	Baseband reset [5211+]
14368	AR5K_RESET_CTL_MAC	0x00000004	reg.h	MAC reset (PCU+Baseband ?) [5210]
14369	AR5K_RESET_CTL_PHY	0x00000008	reg.h	PHY reset [5210]
14370	AR5K_RESET_CTL_PCI	0x00000010	reg.h	PCI Core reset (interrupts etc)
14371	AR5K_SLEEP_CTL	0x4004	reg.h	Register Address
14372	AR5K_SLEEP_CTL_SLDUR	0x0000ffff	reg.h	Sleep duration mask
14373	AR5K_SLEEP_CTL_SLDUR_S	0	reg.h
14374	AR5K_SLEEP_CTL_SLE	0x00030000	reg.h	Sleep enable mask
14375	AR5K_SLEEP_CTL_SLE_S	16	reg.h
14376	AR5K_SLEEP_CTL_SLE_WAKE	0x00000000	reg.h	Force chip awake
14377	AR5K_SLEEP_CTL_SLE_SLP	0x00010000	reg.h	Force chip sleep
14378	AR5K_SLEEP_CTL_SLE_ALLOW	0x00020000	reg.h	Normal sleep policy
14379	AR5K_SLEEP_CTL_SLE_UNITS	0x00000008	reg.h	[5211+]
14380	AR5K_SLEEP_CTL_DUR_TIM_POL	0x00040000	reg.h	Sleep duration timing policy
14381	AR5K_SLEEP_CTL_DUR_WRITE_POL	0x00080000	reg.h	Sleep duration write policy
14382	AR5K_SLEEP_CTL_SLE_POL	0x00100000	reg.h	Sleep policy mode
14383	AR5K_INTPEND	0x4008	reg.h
14384	AR5K_INTPEND_M	0x00000001	reg.h
14385	AR5K_SFR	0x400c	reg.h
14386	AR5K_SFR_EN	0x00000001	reg.h
14387	AR5K_PCICFG	0x4010	reg.h	Register Address
14388	AR5K_PCICFG_EEAE	0x00000001	reg.h	Eeprom access enable [5210]
14389	AR5K_PCICFG_SLEEP_CLOCK_EN	0x00000002	reg.h	Enable sleep clock
14390	AR5K_PCICFG_CLKRUNEN	0x00000004	reg.h	CLKRUN enable [5211+]
14391	AR5K_PCICFG_EESIZE	0x00000018	reg.h	Mask for EEPROM size [5211+]
14392	AR5K_PCICFG_EESIZE_S	3	reg.h
14393	AR5K_PCICFG_EESIZE_4K	0	reg.h	4K
14394	AR5K_PCICFG_EESIZE_8K	1	reg.h	8K
14395	AR5K_PCICFG_EESIZE_16K	2	reg.h	16K
14396	AR5K_PCICFG_EESIZE_FAIL	3	reg.h	Failed to get size [5211+]
14397	AR5K_PCICFG_LED	0x00000060	reg.h	Led status [5211+]
14398	AR5K_PCICFG_LED_NONE	0x00000000	reg.h	Default [5211+]
14399	AR5K_PCICFG_LED_PEND	0x00000020	reg.h	Scan / Auth pending
14400	AR5K_PCICFG_LED_ASSOC	0x00000040	reg.h	Associated
14401	AR5K_PCICFG_BUS_SEL	0x00000380	reg.h	Mask for "bus select" [5211+] (?)
14402	AR5K_PCICFG_CBEFIX_DIS	0x00000400	reg.h	Disable CBE fix
14403	AR5K_PCICFG_SL_INTEN	0x00000800	reg.h	Enable interrupts when asleep
14404	AR5K_PCICFG_LED_BCTL	0x00001000	reg.h	Led blink (?) [5210]
14405	AR5K_PCICFG_RETRY_FIX	0x00001000	reg.h	Enable pci core retry fix
14406	AR5K_PCICFG_SL_INPEN	0x00002000	reg.h	Sleep even whith pending interrupts
14407	AR5K_PCICFG_SPWR_DN	0x00010000	reg.h	Mask for power status
14408	AR5K_PCICFG_LEDMODE	0x000e0000	reg.h	Ledmode [5211+]
14409	AR5K_PCICFG_LEDMODE_PROP	0x00000000	reg.h	Blink on standard traffic [5211+]
14410	AR5K_PCICFG_LEDMODE_PROM	0x00020000	reg.h	Default mode (blink on any traffic) [5211+]
14411	AR5K_PCICFG_LEDMODE_PWR	0x00040000	reg.h	Some other blinking mode (?) [5211+]
14412	AR5K_PCICFG_LEDMODE_RAND	0x00060000	reg.h	Random blinking (?) [5211+]
14413	AR5K_PCICFG_LEDBLINK	0x00700000	reg.h	Led blink rate
14414	AR5K_PCICFG_LEDBLINK_S	20	reg.h
14415	AR5K_PCICFG_LEDSLOW	0x00800000	reg.h	Slowest led blink rate [5211+]
14416	AR5K_PCICFG_LEDSTATE	(AR5K_PCICFG_LED \| AR5K_PCICFG_LEDMODE \| \ AR5K_PCICFG_LEDBLINK \| AR5K_PCICFG_LEDSLOW)	reg.h
14417	AR5K_PCICFG_SLEEP_CLOCK_RATE	0x03000000	reg.h	Sleep clock rate
14418	AR5K_PCICFG_SLEEP_CLOCK_RATE_S	24	reg.h
14419	AR5K_NUM_GPIO	6	reg.h
14420	AR5K_GPIOCR	0x4014	reg.h	Register Address
14421	AR5K_GPIOCR_INT_ENA	0x00008000	reg.h	Enable GPIO interrupt
14422	AR5K_GPIOCR_INT_SELL	0x00000000	reg.h	Generate interrupt when pin is low
14423	AR5K_GPIOCR_INT_SELH	0x00010000	reg.h	Generate interrupt when pin is high
14424	AR5K_GPIODO	0x4018	reg.h
14425	AR5K_GPIODI	0x401c	reg.h
14426	AR5K_GPIODI_M	0x0000002f	reg.h
14427	AR5K_SREV	0x4020	reg.h	Register Address
14428	AR5K_SREV_REV	0x0000000f	reg.h	Mask for revision
14429	AR5K_SREV_REV_S	0	reg.h
14430	AR5K_SREV_VER	0x000000ff	reg.h	Mask for version
14431	AR5K_SREV_VER_S	4	reg.h
14432	AR5K_TXEPOST	0x4028	reg.h
14433	AR5K_QCU_SLEEP_MASK	0x402c	reg.h
14434	AR5K_5414_CBCFG	0x4068	reg.h
14435	AR5K_5414_CBCFG_BUF_DIS	0x10	reg.h	Disable buffer
14436	AR5K_PCIE_PM_CTL	0x4068	reg.h	Register address
14437	AR5K_PCIE_PM_CTL_L1_WHEN_D2	0x00000001	reg.h	enable PCIe core enter L1
14438	AR5K_PCIE_PM_CTL_L0_L0S_CLEAR	0x00000002	reg.h	Clear L0 and L0S counters
14439	AR5K_PCIE_PM_CTL_L0_L0S_EN	0x00000004	reg.h	Start L0 nd L0S counters
14440	AR5K_PCIE_PM_CTL_LDRESET_EN	0x00000008	reg.h	Enable reset when link goes
14441	AR5K_PCIE_PM_CTL_PME_EN	0x00000010	reg.h	PME Enable
14442	AR5K_PCIE_PM_CTL_AUX_PWR_DET	0x00000020	reg.h	Aux power detect
14443	AR5K_PCIE_PM_CTL_PME_CLEAR	0x00000040	reg.h	Clear PME
14444	AR5K_PCIE_PM_CTL_PSM_D0	0x00000080	reg.h
14445	AR5K_PCIE_PM_CTL_PSM_D1	0x00000100	reg.h
14446	AR5K_PCIE_PM_CTL_PSM_D2	0x00000200	reg.h
14447	AR5K_PCIE_PM_CTL_PSM_D3	0x00000400	reg.h
14448	AR5K_PCIE_WAEN	0x407c	reg.h
14449	AR5K_PCIE_SERDES	0x4080	reg.h
14450	AR5K_PCIE_SERDES_RESET	0x4084	reg.h
14451	AR5K_EEPROM_BASE	0x6000	reg.h
14452	AR5K_EEPROM_DATA_5211	0x6004	reg.h
14453	AR5K_EEPROM_DATA_5210	0x6800	reg.h
14454	AR5K_EEPROM_DATA	(ah->ah_version == AR5K_AR5210 ? \ AR5K_EEPROM_DATA_5210 : AR5K_EEPROM_DATA_5211)	reg.h
14455	AR5K_EEPROM_CMD	0x6008	reg.h	Register Addres
14456	AR5K_EEPROM_CMD_READ	0x00000001	reg.h	EEPROM read
14457	AR5K_EEPROM_CMD_WRITE	0x00000002	reg.h	EEPROM write
14458	AR5K_EEPROM_CMD_RESET	0x00000004	reg.h	EEPROM reset
14459	AR5K_EEPROM_STAT_5210	0x6c00	reg.h	Register Address [5210]
14460	AR5K_EEPROM_STAT_5211	0x600c	reg.h	Register Address [5211+]
14461	AR5K_EEPROM_STATUS	(ah->ah_version == AR5K_AR5210 ? \ AR5K_EEPROM_STAT_5210 : AR5K_EEPROM_STAT_5211)	reg.h
14462	AR5K_EEPROM_STAT_RDERR	0x00000001	reg.h	EEPROM read failed
14463	AR5K_EEPROM_STAT_RDDONE	0x00000002	reg.h	EEPROM read successful
14464	AR5K_EEPROM_STAT_WRERR	0x00000004	reg.h	EEPROM write failed
14465	AR5K_EEPROM_STAT_WRDONE	0x00000008	reg.h	EEPROM write successful
14466	AR5K_EEPROM_CFG	0x6010	reg.h	Register Addres
14467	AR5K_EEPROM_CFG_SIZE	0x00000003	reg.h	Size determination override
14468	AR5K_EEPROM_CFG_SIZE_AUTO	0	reg.h
14469	AR5K_EEPROM_CFG_SIZE_4KBIT	1	reg.h
14470	AR5K_EEPROM_CFG_SIZE_8KBIT	2	reg.h
14471	AR5K_EEPROM_CFG_SIZE_16KBIT	3	reg.h
14472	AR5K_EEPROM_CFG_WR_WAIT_DIS	0x00000004	reg.h	Disable write wait
14473	AR5K_EEPROM_CFG_CLK_RATE	0x00000018	reg.h	Clock rate
14474	AR5K_EEPROM_CFG_CLK_RATE_S	3	reg.h
14475	AR5K_EEPROM_CFG_CLK_RATE_156KHZ	0	reg.h
14476	AR5K_EEPROM_CFG_CLK_RATE_312KHZ	1	reg.h
14477	AR5K_EEPROM_CFG_CLK_RATE_625KHZ	2	reg.h
14478	AR5K_EEPROM_CFG_PROT_KEY	0x00ffff00	reg.h	Protection key
14479	AR5K_EEPROM_CFG_PROT_KEY_S	8	reg.h
14480	AR5K_EEPROM_CFG_LIND_EN	0x01000000	reg.h	Enable length indicator (?)
14481	AR5K_PCU_MIN	0x8000	reg.h
14482	AR5K_PCU_MAX	0x8fff	reg.h
14483	AR5K_STA_ID0	0x8000	reg.h
14484	AR5K_STA_ID0_ARRD_L32	0xffffffff	reg.h
14485	AR5K_STA_ID1	0x8004	reg.h	Register Address
14486	AR5K_STA_ID1_ADDR_U16	0x0000ffff	reg.h	Upper 16 bits of MAC addres
14487	AR5K_STA_ID1_AP	0x00010000	reg.h	Set AP mode
14488	AR5K_STA_ID1_ADHOC	0x00020000	reg.h	Set Ad-Hoc mode
14489	AR5K_STA_ID1_PWR_SV	0x00040000	reg.h	Power save reporting
14490	AR5K_STA_ID1_NO_KEYSRCH	0x00080000	reg.h	No key search
14491	AR5K_STA_ID1_NO_PSPOLL	0x00100000	reg.h	No power save polling [5210]
14492	AR5K_STA_ID1_PCF_5211	0x00100000	reg.h	Enable PCF on [5211+]
14493	AR5K_STA_ID1_PCF_5210	0x00200000	reg.h	Enable PCF on [5210]
14494	AR5K_STA_ID1_PCF	(ah->ah_version == AR5K_AR5210 ? \ AR5K_STA_ID1_PCF_5210 : AR5K_STA_ID1_PCF_5211)	reg.h
14495	AR5K_STA_ID1_DEFAULT_ANTENNA	0x00200000	reg.h	Use default antenna
14496	AR5K_STA_ID1_DESC_ANTENNA	0x00400000	reg.h	Update antenna from descriptor
14497	AR5K_STA_ID1_RTS_DEF_ANTENNA	0x00800000	reg.h	Use default antenna for RTS
14498	AR5K_STA_ID1_ACKCTS_6MB	0x01000000	reg.h	Use 6Mbit/s for ACK/CTS
14499	AR5K_STA_ID1_BASE_RATE_11B	0x02000000	reg.h	Use 11b base rate for ACK/CTS [5211+]
14500	AR5K_STA_ID1_SELFGEN_DEF_ANT	0x04000000	reg.h	Use def. antenna for self generated frames
14501	AR5K_STA_ID1_CRYPT_MIC_EN	0x08000000	reg.h	Enable MIC
14502	AR5K_STA_ID1_KEYSRCH_MODE	0x10000000	reg.h	Look up key when key id != 0
14503	AR5K_STA_ID1_PRESERVE_SEQ_NUM	0x20000000	reg.h	Preserve sequence number
14504	AR5K_STA_ID1_CBCIV_ENDIAN	0x40000000	reg.h	???
14505	AR5K_STA_ID1_KEYSRCH_MCAST	0x80000000	reg.h	Do key cache search for mcast frames
14506	AR5K_BSS_ID0	0x8008	reg.h
14507	AR5K_BSS_ID1	0x800c	reg.h
14508	AR5K_BSS_ID1_AID	0xffff0000	reg.h
14509	AR5K_BSS_ID1_AID_S	16	reg.h
14510	AR5K_SLOT_TIME	0x8010	reg.h
14511	AR5K_TIME_OUT	0x8014	reg.h	Register Address
14512	AR5K_TIME_OUT_ACK	0x00001fff	reg.h	ACK timeout mask
14513	AR5K_TIME_OUT_ACK_S	0	reg.h
14514	AR5K_TIME_OUT_CTS	0x1fff0000	reg.h	CTS timeout mask
14515	AR5K_TIME_OUT_CTS_S	16	reg.h
14516	AR5K_RSSI_THR	0x8018	reg.h	Register Address
14517	AR5K_RSSI_THR_M	0x000000ff	reg.h	Mask for RSSI threshold [5211+]
14518	AR5K_RSSI_THR_BMISS_5210	0x00000700	reg.h	Mask for Beacon Missed threshold [5210]
14519	AR5K_RSSI_THR_BMISS_5210_S	8	reg.h
14520	AR5K_RSSI_THR_BMISS_5211	0x0000ff00	reg.h	Mask for Beacon Missed threshold [5211+]
14521	AR5K_RSSI_THR_BMISS_5211_S	8	reg.h
14522	AR5K_RSSI_THR_BMISS	(ah->ah_version == AR5K_AR5210 ? \ AR5K_RSSI_THR_BMISS_5210 : AR5K_RSSI_THR_BMISS_5211)	reg.h
14523	AR5K_RSSI_THR_BMISS_S	8	reg.h
14524	AR5K_NODCU_RETRY_LMT	0x801c	reg.h	Register Address
14525	AR5K_NODCU_RETRY_LMT_SH_RETRY	0x0000000f	reg.h	Short retry limit mask
14526	AR5K_NODCU_RETRY_LMT_SH_RETRY_S	0	reg.h
14527	AR5K_NODCU_RETRY_LMT_LG_RETRY	0x000000f0	reg.h	Long retry mask
14528	AR5K_NODCU_RETRY_LMT_LG_RETRY_S	4	reg.h
14529	AR5K_NODCU_RETRY_LMT_SSH_RETRY	0x00003f00	reg.h	Station short retry limit mask
14530	AR5K_NODCU_RETRY_LMT_SSH_RETRY_	8	reg.h
14531	AR5K_NODCU_RETRY_LMT_SLG_RETRY	0x000fc000	reg.h	Station long retry limit mask
14532	AR5K_NODCU_RETRY_LMT_SLG_RETRY_	14	reg.h
14533	AR5K_NODCU_RETRY_LMT_CW_MIN	0x3ff00000	reg.h	Minimum contention window mask
14534	AR5K_NODCU_RETRY_LMT_CW_MIN_S	20	reg.h
14535	AR5K_USEC_5210	0x8020	reg.h	Register Address [5210]
14536	AR5K_USEC_5211	0x801c	reg.h	Register Address [5211+]
14537	AR5K_USEC	(ah->ah_version == AR5K_AR5210 ? \ AR5K_USEC_5210 : AR5K_USEC_5211)	reg.h
14538	AR5K_USEC_1	0x0000007f	reg.h	clock cycles for 1us
14539	AR5K_USEC_1_S	0	reg.h
14540	AR5K_USEC_32	0x00003f80	reg.h	clock cycles for 1us while on 32Mhz clock
14541	AR5K_USEC_32_S	7	reg.h
14542	AR5K_USEC_TX_LATENCY_5211	0x007fc000	reg.h
14543	AR5K_USEC_TX_LATENCY_5211_S	14	reg.h
14544	AR5K_USEC_RX_LATENCY_5211	0x1f800000	reg.h
14545	AR5K_USEC_RX_LATENCY_5211_S	23	reg.h
14546	AR5K_USEC_TX_LATENCY_5210	0x000fc000	reg.h	also for 5311
14547	AR5K_USEC_TX_LATENCY_5210_S	14	reg.h
14548	AR5K_USEC_RX_LATENCY_5210	0x03f00000	reg.h	also for 5311
14549	AR5K_USEC_RX_LATENCY_5210_S	20	reg.h
14550	AR5K_BEACON_5210	0x8024	reg.h	Register Address [5210]
14551	AR5K_BEACON_5211	0x8020	reg.h	Register Address [5211+]
14552	AR5K_BEACON	(ah->ah_version == AR5K_AR5210 ? \ AR5K_BEACON_5210 : AR5K_BEACON_5211)	reg.h
14553	AR5K_BEACON_PERIOD	0x0000ffff	reg.h	Mask for beacon period
14554	AR5K_BEACON_PERIOD_S	0	reg.h
14555	AR5K_BEACON_TIM	0x007f0000	reg.h	Mask for TIM offset
14556	AR5K_BEACON_TIM_S	16	reg.h
14557	AR5K_BEACON_ENABLE	0x00800000	reg.h	Enable beacons
14558	AR5K_BEACON_RESET_TSF	0x01000000	reg.h	Force TSF reset
14559	AR5K_CFP_PERIOD_5210	0x8028	reg.h
14560	AR5K_CFP_PERIOD_5211	0x8024	reg.h
14561	AR5K_CFP_PERIOD	(ah->ah_version == AR5K_AR5210 ? \ AR5K_CFP_PERIOD_5210 : AR5K_CFP_PERIOD_5211)	reg.h
14562	AR5K_TIMER0_5210	0x802c	reg.h
14563	AR5K_TIMER0_5211	0x8028	reg.h
14564	AR5K_TIMER0	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER0_5210 : AR5K_TIMER0_5211)	reg.h
14565	AR5K_TIMER1_5210	0x8030	reg.h
14566	AR5K_TIMER1_5211	0x802c	reg.h
14567	AR5K_TIMER1	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER1_5210 : AR5K_TIMER1_5211)	reg.h
14568	AR5K_TIMER2_5210	0x8034	reg.h
14569	AR5K_TIMER2_5211	0x8030	reg.h
14570	AR5K_TIMER2	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER2_5210 : AR5K_TIMER2_5211)	reg.h
14571	AR5K_TIMER3_5210	0x8038	reg.h
14572	AR5K_TIMER3_5211	0x8034	reg.h
14573	AR5K_TIMER3	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER3_5210 : AR5K_TIMER3_5211)	reg.h
14574	AR5K_IFS0	0x8040	reg.h
14575	AR5K_IFS0_SIFS	0x000007ff	reg.h
14576	AR5K_IFS0_SIFS_S	0	reg.h
14577	AR5K_IFS0_DIFS	0x007ff800	reg.h
14578	AR5K_IFS0_DIFS_S	11	reg.h
14579	AR5K_IFS1	0x8044	reg.h
14580	AR5K_IFS1_PIFS	0x00000fff	reg.h
14581	AR5K_IFS1_PIFS_S	0	reg.h
14582	AR5K_IFS1_EIFS	0x03fff000	reg.h
14583	AR5K_IFS1_EIFS_S	12	reg.h
14584	AR5K_IFS1_CS_EN	0x04000000	reg.h
14585	AR5K_CFP_DUR_5210	0x8048	reg.h
14586	AR5K_CFP_DUR_5211	0x8038	reg.h
14587	AR5K_CFP_DUR	(ah->ah_version == AR5K_AR5210 ? \ AR5K_CFP_DUR_5210 : AR5K_CFP_DUR_5211)	reg.h
14588	AR5K_RX_FILTER_5210	0x804c	reg.h	Register Address [5210]
14589	AR5K_RX_FILTER_5211	0x803c	reg.h	Register Address [5211+]
14590	AR5K_RX_FILTER	(ah->ah_version == AR5K_AR5210 ? \ AR5K_RX_FILTER_5210 : AR5K_RX_FILTER_5211)	reg.h
14591	AR5K_RX_FILTER_UCAST	0x00000001	reg.h	Don't filter unicast frames
14592	AR5K_RX_FILTER_MCAST	0x00000002	reg.h	Don't filter multicast frames
14593	AR5K_RX_FILTER_BCAST	0x00000004	reg.h	Don't filter broadcast frames
14594	AR5K_RX_FILTER_CONTROL	0x00000008	reg.h	Don't filter control frames
14595	AR5K_RX_FILTER_BEACON	0x00000010	reg.h	Don't filter beacon frames
14596	AR5K_RX_FILTER_PROM	0x00000020	reg.h	Set promiscuous mode
14597	AR5K_RX_FILTER_XRPOLL	0x00000040	reg.h	Don't filter XR poll frame [5212+]
14598	AR5K_RX_FILTER_PROBEREQ	0x00000080	reg.h	Don't filter probe requests [5212+]
14599	AR5K_RX_FILTER_PHYERR_5212	0x00000100	reg.h	Don't filter phy errors [5212+]
14600	AR5K_RX_FILTER_RADARERR_5212	0x00000200	reg.h	Don't filter phy radar errors [5212+]
14601	AR5K_RX_FILTER_PHYERR_5211	0x00000040	reg.h	[5211]
14602	AR5K_RX_FILTER_RADARERR_5211	0x00000080	reg.h	[5211]
14603	AR5K_RX_FILTER_PHYERR	((ah->ah_version == AR5K_AR5211 ? \ AR5K_RX_FILTER_PHYERR_5211 : AR5K_RX_FILTER_PHYERR_5212))	reg.h
14604	AR5K_RX_FILTER_RADARERR	((ah->ah_version == AR5K_AR5211 ? \ AR5K_RX_FILTER_RADARERR_5211 : AR5K_RX_FILTER_RADARERR_5212))	reg.h
14605	AR5K_MCAST_FILTER0_5210	0x8050	reg.h
14606	AR5K_MCAST_FILTER0_5211	0x8040	reg.h
14607	AR5K_MCAST_FILTER0	(ah->ah_version == AR5K_AR5210 ? \ AR5K_MCAST_FILTER0_5210 : AR5K_MCAST_FILTER0_5211)	reg.h
14608	AR5K_MCAST_FILTER1_5210	0x8054	reg.h
14609	AR5K_MCAST_FILTER1_5211	0x8044	reg.h
14610	AR5K_MCAST_FILTER1	(ah->ah_version == AR5K_AR5210 ? \ AR5K_MCAST_FILTER1_5210 : AR5K_MCAST_FILTER1_5211)	reg.h
14611	AR5K_TX_MASK0	0x8058	reg.h
14612	AR5K_TX_MASK1	0x805c	reg.h
14613	AR5K_CLR_TMASK	0x8060	reg.h
14614	AR5K_TRIG_LVL	0x8064	reg.h
14615	AR5K_DIAG_SW_5210	0x8068	reg.h	Register Address [5210]
14616	AR5K_DIAG_SW_5211	0x8048	reg.h	Register Address [5211+]
14617	AR5K_DIAG_SW	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_5210 : AR5K_DIAG_SW_5211)	reg.h
14618	AR5K_DIAG_SW_DIS_WEP_ACK	0x00000001	reg.h	Disable ACKs if WEP key is invalid
14619	AR5K_DIAG_SW_DIS_ACK	0x00000002	reg.h	Disable ACKs
14620	AR5K_DIAG_SW_DIS_CTS	0x00000004	reg.h	Disable CTSs
14621	AR5K_DIAG_SW_DIS_ENC	0x00000008	reg.h	Disable encryption
14622	AR5K_DIAG_SW_DIS_DEC	0x00000010	reg.h	Disable decryption
14623	AR5K_DIAG_SW_DIS_TX	0x00000020	reg.h	Disable transmit [5210]
14624	AR5K_DIAG_SW_DIS_RX_5210	0x00000040	reg.h	Disable recieve
14625	AR5K_DIAG_SW_DIS_RX_5211	0x00000020	reg.h
14626	AR5K_DIAG_SW_DIS_RX	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_DIS_RX_5210 : AR5K_DIAG_SW_DIS_RX_5211)	reg.h
14627	AR5K_DIAG_SW_LOOP_BACK_5210	0x00000080	reg.h	Loopback (i guess it goes with DIS_TX) [5210]
14628	AR5K_DIAG_SW_LOOP_BACK_5211	0x00000040	reg.h
14629	AR5K_DIAG_SW_LOOP_BACK	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_LOOP_BACK_5210 : AR5K_DIAG_SW_LOOP_BACK_5211)	reg.h
14630	AR5K_DIAG_SW_CORR_FCS_5210	0x00000100	reg.h	Corrupted FCS
14631	AR5K_DIAG_SW_CORR_FCS_5211	0x00000080	reg.h
14632	AR5K_DIAG_SW_CORR_FCS	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_CORR_FCS_5210 : AR5K_DIAG_SW_CORR_FCS_5211)	reg.h
14633	AR5K_DIAG_SW_CHAN_INFO_5210	0x00000200	reg.h	Dump channel info
14634	AR5K_DIAG_SW_CHAN_INFO_5211	0x00000100	reg.h
14635	AR5K_DIAG_SW_CHAN_INFO	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_CHAN_INFO_5210 : AR5K_DIAG_SW_CHAN_INFO_5211)	reg.h
14636	AR5K_DIAG_SW_EN_SCRAM_SEED_5210	0x00000400	reg.h	Enable fixed scrambler seed
14637	AR5K_DIAG_SW_EN_SCRAM_SEED_5211	0x00000200	reg.h
14638	AR5K_DIAG_SW_EN_SCRAM_SEED	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_EN_SCRAM_SEED_5210 : AR5K_DIAG_SW_EN_SCRAM_SEED_5211)	reg.h
14639	AR5K_DIAG_SW_ECO_ENABLE	0x00000400	reg.h	[5211+]
14640	AR5K_DIAG_SW_SCVRAM_SEED	0x0003f800	reg.h	[5210]
14641	AR5K_DIAG_SW_SCRAM_SEED_M	0x0001fc00	reg.h	Scrambler seed mask
14642	AR5K_DIAG_SW_SCRAM_SEED_S	10	reg.h
14643	AR5K_DIAG_SW_DIS_SEQ_INC	0x00040000	reg.h	Disable seqnum increment (?)[5210]
14644	AR5K_DIAG_SW_FRAME_NV0_5210	0x00080000	reg.h
14645	AR5K_DIAG_SW_FRAME_NV0_5211	0x00020000	reg.h	Accept frames of non-zero protocol number
14646	AR5K_DIAG_SW_FRAME_NV0	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_FRAME_NV0_5210 : AR5K_DIAG_SW_FRAME_NV0_5211)	reg.h
14647	AR5K_DIAG_SW_OBSPT_M	0x000c0000	reg.h	Observation point select (?)
14648	AR5K_DIAG_SW_OBSPT_S	18	reg.h
14649	AR5K_DIAG_SW_RX_CLEAR_HIGH	0x0010000	reg.h	Force RX Clear high
14650	AR5K_DIAG_SW_IGNORE_CARR_SENSE	0x0020000	reg.h	Ignore virtual carrier sense
14651	AR5K_DIAG_SW_CHANEL_IDLE_HIGH	0x0040000	reg.h	Force channel idle high
14652	AR5K_DIAG_SW_PHEAR_ME	0x0080000	reg.h	???
14653	AR5K_TSF_L32_5210	0x806c	reg.h
14654	AR5K_TSF_L32_5211	0x804c	reg.h
14655	AR5K_TSF_L32	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TSF_L32_5210 : AR5K_TSF_L32_5211)	reg.h
14656	AR5K_TSF_U32_5210	0x8070	reg.h
14657	AR5K_TSF_U32_5211	0x8050	reg.h
14658	AR5K_TSF_U32	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TSF_U32_5210 : AR5K_TSF_U32_5211)	reg.h
14659	AR5K_LAST_TSTP	0x8080	reg.h
14660	AR5K_ADDAC_TEST	0x8054	reg.h	Register Address
14661	AR5K_ADDAC_TEST_TXCONT	0x00000001	reg.h	Test continuous tx
14662	AR5K_ADDAC_TEST_TST_MODE	0x00000002	reg.h	Test mode
14663	AR5K_ADDAC_TEST_LOOP_EN	0x00000004	reg.h	Enable loop
14664	AR5K_ADDAC_TEST_LOOP_LEN	0x00000008	reg.h	Loop length (field)
14665	AR5K_ADDAC_TEST_USE_U8	0x00004000	reg.h	Use upper 8 bits
14666	AR5K_ADDAC_TEST_MSB	0x00008000	reg.h	State of MSB
14667	AR5K_ADDAC_TEST_TRIG_SEL	0x00010000	reg.h	Trigger select
14668	AR5K_ADDAC_TEST_TRIG_PTY	0x00020000	reg.h	Trigger polarity
14669	AR5K_ADDAC_TEST_RXCONT	0x00040000	reg.h	Continuous capture
14670	AR5K_ADDAC_TEST_CAPTURE	0x00080000	reg.h	Begin capture
14671	AR5K_ADDAC_TEST_TST_ARM	0x00100000	reg.h	ARM rx buffer for capture
14672	AR5K_DEFAULT_ANTENNA	0x8058	reg.h
14673	AR5K_FRAME_CTL_QOSM	0x805c	reg.h
14674	AR5K_SEQ_MASK	0x8060	reg.h
14675	AR5K_RETRY_CNT	0x8084	reg.h	Register Address [5210]
14676	AR5K_RETRY_CNT_SSH	0x0000003f	reg.h	Station short retry count (?)
14677	AR5K_RETRY_CNT_SLG	0x00000fc0	reg.h	Station long retry count (?)
14678	AR5K_BACKOFF	0x8088	reg.h	Register Address [5210]
14679	AR5K_BACKOFF_CW	0x000003ff	reg.h	Backoff Contention Window (?)
14680	AR5K_BACKOFF_CNT	0x03ff0000	reg.h	Backoff count (?)
14681	AR5K_NAV_5210	0x808c	reg.h
14682	AR5K_NAV_5211	0x8084	reg.h
14683	AR5K_NAV	(ah->ah_version == AR5K_AR5210 ? \ AR5K_NAV_5210 : AR5K_NAV_5211)	reg.h
14684	AR5K_RTS_OK_5210	0x8090	reg.h
14685	AR5K_RTS_OK_5211	0x8088	reg.h
14686	AR5K_RTS_OK	(ah->ah_version == AR5K_AR5210 ? \ AR5K_RTS_OK_5210 : AR5K_RTS_OK_5211)	reg.h
14687	AR5K_RTS_FAIL_5210	0x8094	reg.h
14688	AR5K_RTS_FAIL_5211	0x808c	reg.h
14689	AR5K_RTS_FAIL	(ah->ah_version == AR5K_AR5210 ? \ AR5K_RTS_FAIL_5210 : AR5K_RTS_FAIL_5211)	reg.h
14690	AR5K_ACK_FAIL_5210	0x8098	reg.h
14691	AR5K_ACK_FAIL_5211	0x8090	reg.h
14692	AR5K_ACK_FAIL	(ah->ah_version == AR5K_AR5210 ? \ AR5K_ACK_FAIL_5210 : AR5K_ACK_FAIL_5211)	reg.h
14693	AR5K_FCS_FAIL_5210	0x809c	reg.h
14694	AR5K_FCS_FAIL_5211	0x8094	reg.h
14695	AR5K_FCS_FAIL	(ah->ah_version == AR5K_AR5210 ? \ AR5K_FCS_FAIL_5210 : AR5K_FCS_FAIL_5211)	reg.h
14696	AR5K_BEACON_CNT_5210	0x80a0	reg.h
14697	AR5K_BEACON_CNT_5211	0x8098	reg.h
14698	AR5K_BEACON_CNT	(ah->ah_version == AR5K_AR5210 ? \ AR5K_BEACON_CNT_5210 : AR5K_BEACON_CNT_5211)	reg.h
14699	AR5K_TPC	0x80e8	reg.h
14700	AR5K_TPC_ACK	0x0000003f	reg.h	ack frames
14701	AR5K_TPC_ACK_S	0	reg.h
14702	AR5K_TPC_CTS	0x00003f00	reg.h	cts frames
14703	AR5K_TPC_CTS_S	8	reg.h
14704	AR5K_TPC_CHIRP	0x003f0000	reg.h	chirp frames
14705	AR5K_TPC_CHIRP_S	16	reg.h
14706	AR5K_TPC_DOPPLER	0x0f000000	reg.h	doppler chirp span
14707	AR5K_TPC_DOPPLER_S	24	reg.h
14708	AR5K_XRMODE	0x80c0	reg.h	Register Address
14709	AR5K_XRMODE_POLL_TYPE_M	0x0000003f	reg.h	Mask for Poll type (?)
14710	AR5K_XRMODE_POLL_TYPE_S	0	reg.h
14711	AR5K_XRMODE_POLL_SUBTYPE_M	0x0000003c	reg.h	Mask for Poll subtype (?)
14712	AR5K_XRMODE_POLL_SUBTYPE_S	2	reg.h
14713	AR5K_XRMODE_POLL_WAIT_ALL	0x00000080	reg.h	Wait for poll
14714	AR5K_XRMODE_SIFS_DELAY	0x000fff00	reg.h	Mask for SIFS delay
14715	AR5K_XRMODE_FRAME_HOLD_M	0xfff00000	reg.h	Mask for frame hold (?)
14716	AR5K_XRMODE_FRAME_HOLD_S	20	reg.h
14717	AR5K_XRDELAY	0x80c4	reg.h	Register Address
14718	AR5K_XRDELAY_SLOT_DELAY_M	0x0000ffff	reg.h	Mask for slot delay
14719	AR5K_XRDELAY_SLOT_DELAY_S	0	reg.h
14720	AR5K_XRDELAY_CHIRP_DELAY_M	0xffff0000	reg.h	Mask for CHIRP data delay
14721	AR5K_XRDELAY_CHIRP_DELAY_S	16	reg.h
14722	AR5K_XRTIMEOUT	0x80c8	reg.h	Register Address
14723	AR5K_XRTIMEOUT_CHIRP_M	0x0000ffff	reg.h	Mask for CHIRP timeout
14724	AR5K_XRTIMEOUT_CHIRP_S	0	reg.h
14725	AR5K_XRTIMEOUT_POLL_M	0xffff0000	reg.h	Mask for Poll timeout
14726	AR5K_XRTIMEOUT_POLL_S	16	reg.h
14727	AR5K_XRCHIRP	0x80cc	reg.h	Register Address
14728	AR5K_XRCHIRP_SEND	0x00000001	reg.h	Send CHIRP
14729	AR5K_XRCHIRP_GAP	0xffff0000	reg.h	Mask for CHIRP gap (?)
14730	AR5K_XRSTOMP	0x80d0	reg.h	Register Address
14731	AR5K_XRSTOMP_TX	0x00000001	reg.h	Stomp Tx (?)
14732	AR5K_XRSTOMP_RX	0x00000002	reg.h	Stomp Rx (?)
14733	AR5K_XRSTOMP_TX_RSSI	0x00000004	reg.h	Stomp Tx RSSI (?)
14734	AR5K_XRSTOMP_TX_BSSID	0x00000008	reg.h	Stomp Tx BSSID (?)
14735	AR5K_XRSTOMP_DATA	0x00000010	reg.h	Stomp data (?)
14736	AR5K_XRSTOMP_RSSI_THRES	0x0000ff00	reg.h	Mask for XR RSSI threshold
14737	AR5K_SLEEP0	0x80d4	reg.h	Register Address
14738	AR5K_SLEEP0_NEXT_DTIM	0x0007ffff	reg.h	Mask for next DTIM (?)
14739	AR5K_SLEEP0_NEXT_DTIM_S	0	reg.h
14740	AR5K_SLEEP0_ASSUME_DTIM	0x00080000	reg.h	Assume DTIM
14741	AR5K_SLEEP0_ENH_SLEEP_EN	0x00100000	reg.h	Enable enchanced sleep control
14742	AR5K_SLEEP0_CABTO	0xff000000	reg.h	Mask for CAB Time Out
14743	AR5K_SLEEP0_CABTO_S	24	reg.h
14744	AR5K_SLEEP1	0x80d8	reg.h	Register Address
14745	AR5K_SLEEP1_NEXT_TIM	0x0007ffff	reg.h	Mask for next TIM (?)
14746	AR5K_SLEEP1_NEXT_TIM_S	0	reg.h
14747	AR5K_SLEEP1_BEACON_TO	0xff000000	reg.h	Mask for Beacon Time Out
14748	AR5K_SLEEP1_BEACON_TO_S	24	reg.h
14749	AR5K_SLEEP2	0x80dc	reg.h	Register Address
14750	AR5K_SLEEP2_TIM_PER	0x0000ffff	reg.h	Mask for TIM period (?)
14751	AR5K_SLEEP2_TIM_PER_S	0	reg.h
14752	AR5K_SLEEP2_DTIM_PER	0xffff0000	reg.h	Mask for DTIM period (?)
14753	AR5K_SLEEP2_DTIM_PER_S	16	reg.h
14754	AR5K_BSS_IDM0	0x80e0	reg.h	Upper bits
14755	AR5K_BSS_IDM1	0x80e4	reg.h	Lower bits
14756	AR5K_TXPC	0x80e8	reg.h	Register Address
14757	AR5K_TXPC_ACK_M	0x0000003f	reg.h	ACK tx power
14758	AR5K_TXPC_ACK_S	0	reg.h
14759	AR5K_TXPC_CTS_M	0x00003f00	reg.h	CTS tx power
14760	AR5K_TXPC_CTS_S	8	reg.h
14761	AR5K_TXPC_CHIRP_M	0x003f0000	reg.h	CHIRP tx power
14762	AR5K_TXPC_CHIRP_S	16	reg.h
14763	AR5K_TXPC_DOPPLER	0x0f000000	reg.h	Doppler chirp span (?)
14764	AR5K_TXPC_DOPPLER_S	24	reg.h
14765	AR5K_PROFCNT_TX	0x80ec	reg.h	Tx count
14766	AR5K_PROFCNT_RX	0x80f0	reg.h	Rx count
14767	AR5K_PROFCNT_RXCLR	0x80f4	reg.h	Clear Rx count
14768	AR5K_PROFCNT_CYCLE	0x80f8	reg.h	Cycle count (?)
14769	AR5K_QUIET_CTL1	0x80fc	reg.h	Register Address
14770	AR5K_QUIET_CTL1_NEXT_QT_TSF	0x0000ffff	reg.h	Next quiet period TSF (TU)
14771	AR5K_QUIET_CTL1_NEXT_QT_TSF_S	0	reg.h
14772	AR5K_QUIET_CTL1_QT_EN	0x00010000	reg.h	Enable quiet period
14773	AR5K_QUIET_CTL1_ACK_CTS_EN	0x00020000	reg.h	Send ACK/CTS during quiet period
14774	AR5K_QUIET_CTL2	0x8100	reg.h	Register Address
14775	AR5K_QUIET_CTL2_QT_PER	0x0000ffff	reg.h	Mask for quiet period periodicity
14776	AR5K_QUIET_CTL2_QT_PER_S	0	reg.h
14777	AR5K_QUIET_CTL2_QT_DUR	0xffff0000	reg.h	Mask for quiet period duration
14778	AR5K_QUIET_CTL2_QT_DUR_S	16	reg.h
14779	AR5K_TSF_PARM	0x8104	reg.h	Register Address
14780	AR5K_TSF_PARM_INC	0x000000ff	reg.h	Mask for TSF increment
14781	AR5K_TSF_PARM_INC_S	0	reg.h
14782	AR5K_QOS_NOACK	0x8108	reg.h	Register Address
14783	AR5K_QOS_NOACK_2BIT_VALUES	0x0000000f	reg.h	???
14784	AR5K_QOS_NOACK_2BIT_VALUES_S	0	reg.h
14785	AR5K_QOS_NOACK_BIT_OFFSET	0x00000070	reg.h	???
14786	AR5K_QOS_NOACK_BIT_OFFSET_S	4	reg.h
14787	AR5K_QOS_NOACK_BYTE_OFFSET	0x00000180	reg.h	???
14788	AR5K_QOS_NOACK_BYTE_OFFSET_S	7	reg.h
14789	AR5K_PHY_ERR_FIL	0x810c	reg.h
14790	AR5K_PHY_ERR_FIL_RADAR	0x00000020	reg.h	Radar signal
14791	AR5K_PHY_ERR_FIL_OFDM	0x00020000	reg.h	OFDM false detect (ANI)
14792	AR5K_PHY_ERR_FIL_CCK	0x02000000	reg.h	CCK false detect (ANI)
14793	AR5K_XRLAT_TX	0x8110	reg.h
14794	AR5K_ACKSIFS	0x8114	reg.h	Register Address
14795	AR5K_ACKSIFS_INC	0x00000000	reg.h	ACK SIFS Increment (field)
14796	AR5K_MIC_QOS_CTL	0x8118	reg.h	Register Address
14797	AR5K_MIC_QOS_CTL_MQ_EN	0x00010000	reg.h	Enable MIC QoS
14798	AR5K_MIC_QOS_SEL	0x811c	reg.h
14799	AR5K_MISC_MODE	0x8120	reg.h	Register Address
14800	AR5K_MISC_MODE_FBSSID_MATCH	0x00000001	reg.h	Force BSSID match
14801	AR5K_MISC_MODE_ACKSIFS_MEM	0x00000002	reg.h	ACK SIFS memory (?)
14802	AR5K_MISC_MODE_COMBINED_MIC	0x00000004	reg.h	use rx/tx MIC key
14803	AR5K_OFDM_FIL_CNT	0x8124	reg.h
14804	AR5K_CCK_FIL_CNT	0x8128	reg.h
14805	AR5K_PHYERR_CNT1	0x812c	reg.h
14806	AR5K_PHYERR_CNT1_MASK	0x8130	reg.h
14807	AR5K_PHYERR_CNT2	0x8134	reg.h
14808	AR5K_PHYERR_CNT2_MASK	0x8138	reg.h
14809	AR5K_TSF_THRES	0x813c	reg.h
14810	AR5K_RATE_ACKSIFS_BASE	0x8680	reg.h	Register Address
14811	AR5K_RATE_ACKSIFS_NORMAL	0x00000001	reg.h	Normal SIFS (field)
14812	AR5K_RATE_ACKSIFS_TURBO	0x00000400	reg.h	Turbo SIFS (field)
14813	AR5K_RATE_DUR_BASE	0x8700	reg.h
14814	AR5K_RATE2DB_BASE	0x87c0	reg.h
14815	AR5K_DB2RATE_BASE	0x87e0	reg.h
14816	AR5K_KEYTABLE_0_5210	0x9000	reg.h
14817	AR5K_KEYTABLE_0_5211	0x8800	reg.h
14818	AR5K_KEYTABLE_TYPE_40	0x00000000	reg.h
14819	AR5K_KEYTABLE_TYPE_104	0x00000001	reg.h
14820	AR5K_KEYTABLE_TYPE_128	0x00000003	reg.h
14821	AR5K_KEYTABLE_TYPE_TKIP	0x00000004	reg.h	[5212+]
14822	AR5K_KEYTABLE_TYPE_AES	0x00000005	reg.h	[5211+]
14823	AR5K_KEYTABLE_TYPE_CCM	0x00000006	reg.h	[5212+]
14824	AR5K_KEYTABLE_TYPE_NULL	0x00000007	reg.h	[5211+]
14825	AR5K_KEYTABLE_ANTENNA	0x00000008	reg.h	[5212+]
14826	AR5K_KEYTABLE_VALID	0x00008000	reg.h
14827	AR5K_KEYTABLE_MIC_OFFSET	64	reg.h
14828	AR5K_KEYTABLE_SIZE_5210	64	reg.h
14829	AR5K_KEYTABLE_SIZE_5211	128	reg.h
14830	AR5K_KEYTABLE_SIZE	(ah->ah_version == AR5K_AR5210 ? \ AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211)	reg.h
14831	AR5K_PHY_BASE	0x9800	reg.h
14832	AR5K_PHY_TST2	0x9800	reg.h	Register Address
14833	AR5K_PHY_TST2_TRIG_SEL	0x00000007	reg.h	Trigger select (?)
14834	AR5K_PHY_TST2_TRIG	0x00000010	reg.h	Trigger (?)
14835	AR5K_PHY_TST2_CBUS_MODE	0x00000060	reg.h	Cardbus mode (?)
14836	AR5K_PHY_TST2_CLK32	0x00000400	reg.h	CLK_OUT is CLK32 (32Khz external)
14837	AR5K_PHY_TST2_CHANCOR_DUMP_EN	0x00000800	reg.h	Enable Chancor dump (?)
14838	AR5K_PHY_TST2_EVEN_CHANCOR_DUMP	0x00001000	reg.h	Even Chancor dump (?)
14839	AR5K_PHY_TST2_RFSILENT_EN	0x00002000	reg.h	Enable RFSILENT
14840	AR5K_PHY_TST2_ALT_RFDATA	0x00004000	reg.h	Alternate RFDATA (5-2GHz switch ?)
14841	AR5K_PHY_TST2_MINI_OBS_EN	0x00008000	reg.h	Enable mini OBS (?)
14842	AR5K_PHY_TST2_RX2_IS_RX5_INV	0x00010000	reg.h	2GHz rx path is the 5GHz path inverted (?)
14843	AR5K_PHY_TST2_SLOW_CLK160	0x00020000	reg.h	Slow CLK160 (?)
14844	AR5K_PHY_TST2_AGC_OBS_SEL_3	0x00040000	reg.h	AGC OBS Select 3 (?)
14845	AR5K_PHY_TST2_BBB_OBS_SEL	0x00080000	reg.h	BB OBS Select (field ?)
14846	AR5K_PHY_TST2_ADC_OBS_SEL	0x00800000	reg.h	ADC OBS Select (field ?)
14847	AR5K_PHY_TST2_RX_CLR_SEL	0x08000000	reg.h	RX Clear Select (?)
14848	AR5K_PHY_TST2_FORCE_AGC_CLR	0x10000000	reg.h	Force AGC clear (?)
14849	AR5K_PHY_SHIFT_2GHZ	0x00004007	reg.h	Used to access 2GHz radios
14850	AR5K_PHY_SHIFT_5GHZ	0x00000007	reg.h	Used to access 5GHz radios (default)
14851	AR5K_PHY_TURBO	0x9804	reg.h	Register Address
14852	AR5K_PHY_TURBO_MODE	0x00000001	reg.h	Enable turbo mode
14853	AR5K_PHY_TURBO_SHORT	0x00000002	reg.h	Set short symbols to turbo mode
14854	AR5K_PHY_TURBO_MIMO	0x00000004	reg.h	Set turbo for mimo mimo
14855	AR5K_PHY_AGC	0x9808	reg.h	Register Address
14856	AR5K_PHY_TST1	0x9808	reg.h
14857	AR5K_PHY_AGC_DISABLE	0x08000000	reg.h	Disable AGC to A2 (?)
14858	AR5K_PHY_TST1_TXHOLD	0x00003800	reg.h	Set tx hold (?)
14859	AR5K_PHY_TST1_TXSRC_SRC	0x00000002	reg.h	Used with bit 7 (?)
14860	AR5K_PHY_TST1_TXSRC_SRC_S	1	reg.h
14861	AR5K_PHY_TST1_TXSRC_ALT	0x00000080	reg.h	Set input to tsdac (?)
14862	AR5K_PHY_TST1_TXSRC_ALT_S	7	reg.h
14863	AR5K_PHY_TIMING_3	0x9814	reg.h
14864	AR5K_PHY_TIMING_3_DSC_MAN	0xfffe0000	reg.h
14865	AR5K_PHY_TIMING_3_DSC_MAN_S	17	reg.h
14866	AR5K_PHY_TIMING_3_DSC_EXP	0x0001e000	reg.h
14867	AR5K_PHY_TIMING_3_DSC_EXP_S	13	reg.h
14868	AR5K_PHY_CHIP_ID	0x9818	reg.h
14869	AR5K_PHY_ACT	0x981c	reg.h	Register Address
14870	AR5K_PHY_ACT_ENABLE	0x00000001	reg.h	Activate PHY
14871	AR5K_PHY_ACT_DISABLE	0x00000002	reg.h	Deactivate PHY
14872	AR5K_PHY_RF_CTL2	0x9824	reg.h	Register Address
14873	AR5K_PHY_RF_CTL2_TXF2TXD_START	0x0000000f	reg.h	TX frame to TX data start
14874	AR5K_PHY_RF_CTL2_TXF2TXD_START_	0	reg.h
14875	AR5K_PHY_RF_CTL3	0x9828	reg.h	Register Address
14876	AR5K_PHY_RF_CTL3_TXE2XLNA_ON	0x0000ff00	reg.h	TX end to XLNA on
14877	AR5K_PHY_RF_CTL3_TXE2XLNA_ON_S	8	reg.h
14878	AR5K_PHY_ADC_CTL	0x982c	reg.h
14879	AR5K_PHY_ADC_CTL_INBUFGAIN_OFF	0x00000003	reg.h
14880	AR5K_PHY_ADC_CTL_INBUFGAIN_OFF_	0	reg.h
14881	AR5K_PHY_ADC_CTL_PWD_DAC_OFF	0x00002000	reg.h
14882	AR5K_PHY_ADC_CTL_PWD_BAND_GAP_O	0x00004000	reg.h
14883	AR5K_PHY_ADC_CTL_PWD_ADC_OFF	0x00008000	reg.h
14884	AR5K_PHY_ADC_CTL_INBUFGAIN_ON	0x00030000	reg.h
14885	AR5K_PHY_ADC_CTL_INBUFGAIN_ON_S	16	reg.h
14886	AR5K_PHY_RF_CTL4	0x9834	reg.h	Register Address
14887	AR5K_PHY_RF_CTL4_TXF2XPA_A_ON	0x00000001	reg.h	TX frame to XPA A on (field)
14888	AR5K_PHY_RF_CTL4_TXF2XPA_B_ON	0x00000100	reg.h	TX frame to XPA B on (field)
14889	AR5K_PHY_RF_CTL4_TXE2XPA_A_OFF	0x00010000	reg.h	TX end to XPA A off (field)
14890	AR5K_PHY_RF_CTL4_TXE2XPA_B_OFF	0x01000000	reg.h	TX end to XPA B off (field)
14891	AR5K_PHY_PA_CTL	0x9838	reg.h	Register Address
14892	AR5K_PHY_PA_CTL_XPA_A_HI	0x00000001	reg.h	XPA A high (?)
14893	AR5K_PHY_PA_CTL_XPA_B_HI	0x00000002	reg.h	XPA B high (?)
14894	AR5K_PHY_PA_CTL_XPA_A_EN	0x00000004	reg.h	Enable XPA A
14895	AR5K_PHY_PA_CTL_XPA_B_EN	0x00000008	reg.h	Enable XPA B
14896	AR5K_PHY_SETTLING	0x9844	reg.h	Register Address
14897	AR5K_PHY_SETTLING_AGC	0x0000007f	reg.h	AGC settling time
14898	AR5K_PHY_SETTLING_AGC_S	0	reg.h
14899	AR5K_PHY_SETTLING_SWITCH	0x00003f80	reg.h	Switch settlig time
14900	AR5K_PHY_SETTLING_SWITCH_S	7	reg.h
14901	AR5K_PHY_GAIN	0x9848	reg.h	Register Address
14902	AR5K_PHY_GAIN_TXRX_ATTEN	0x0003f000	reg.h	TX-RX Attenuation
14903	AR5K_PHY_GAIN_TXRX_ATTEN_S	12	reg.h
14904	AR5K_PHY_GAIN_TXRX_RF_MAX	0x007c0000	reg.h
14905	AR5K_PHY_GAIN_TXRX_RF_MAX_S	18	reg.h
14906	AR5K_PHY_GAIN_OFFSET	0x984c	reg.h	Register Address
14907	AR5K_PHY_GAIN_OFFSET_RXTX_FLAG	0x00020000	reg.h	RX-TX flag (?)
14908	AR5K_PHY_DESIRED_SIZE	0x9850	reg.h	Register Address
14909	AR5K_PHY_DESIRED_SIZE_ADC	0x000000ff	reg.h	ADC desired size
14910	AR5K_PHY_DESIRED_SIZE_ADC_S	0	reg.h
14911	AR5K_PHY_DESIRED_SIZE_PGA	0x0000ff00	reg.h	PGA desired size
14912	AR5K_PHY_DESIRED_SIZE_PGA_S	8	reg.h
14913	AR5K_PHY_DESIRED_SIZE_TOT	0x0ff00000	reg.h	Total desired size
14914	AR5K_PHY_DESIRED_SIZE_TOT_S	20	reg.h
14915	AR5K_PHY_SIG	0x9858	reg.h	Register Address
14916	AR5K_PHY_SIG_FIRSTEP	0x0003f000	reg.h	FIRSTEP
14917	AR5K_PHY_SIG_FIRSTEP_S	12	reg.h
14918	AR5K_PHY_SIG_FIRPWR	0x03fc0000	reg.h	FIPWR
14919	AR5K_PHY_SIG_FIRPWR_S	18	reg.h
14920	AR5K_PHY_AGCCOARSE	0x985c	reg.h	Register Address
14921	AR5K_PHY_AGCCOARSE_LO	0x00007f80	reg.h	AGC Coarse low
14922	AR5K_PHY_AGCCOARSE_LO_S	7	reg.h
14923	AR5K_PHY_AGCCOARSE_HI	0x003f8000	reg.h	AGC Coarse high
14924	AR5K_PHY_AGCCOARSE_HI_S	15	reg.h
14925	AR5K_PHY_AGCCTL	0x9860	reg.h	Register address
14926	AR5K_PHY_AGCCTL_CAL	0x00000001	reg.h	Enable PHY calibration
14927	AR5K_PHY_AGCCTL_NF	0x00000002	reg.h	Enable Noise Floor calibration
14928	AR5K_PHY_AGCCTL_NF_EN	0x00008000	reg.h	Enable nf calibration to happen (?)
14929	AR5K_PHY_AGCCTL_NF_NOUPDATE	0x00020000	reg.h	Don't update nf automaticaly
14930	AR5K_PHY_NF	0x9864	reg.h	Register address
14931	AR5K_PHY_NF_M	0x000001ff	reg.h	Noise floor mask
14932	AR5K_PHY_NF_ACTIVE	0x00000100	reg.h	Noise floor calibration still active
14933	AR5K_PHY_NF_THRESH62	0x0007f000	reg.h	Thresh62 -check ANI patent- (field)
14934	AR5K_PHY_NF_THRESH62_S	12	reg.h
14935	AR5K_PHY_NF_MINCCA_PWR	0x0ff80000	reg.h	???
14936	AR5K_PHY_NF_MINCCA_PWR_S	19	reg.h
14937	AR5K_PHY_ADCSAT	0x9868	reg.h
14938	AR5K_PHY_ADCSAT_ICNT	0x0001f800	reg.h
14939	AR5K_PHY_ADCSAT_ICNT_S	11	reg.h
14940	AR5K_PHY_ADCSAT_THR	0x000007e0	reg.h
14941	AR5K_PHY_ADCSAT_THR_S	5	reg.h
14942	AR5K_PHY_WEAK_OFDM_HIGH_THR	0x9868	reg.h
14943	AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_	0x0000001f	reg.h
14944	AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_	0	reg.h
14945	AR5K_PHY_WEAK_OFDM_HIGH_THR_M1	0x00fe0000	reg.h
14946	AR5K_PHY_WEAK_OFDM_HIGH_THR_M1_	17	reg.h
14947	AR5K_PHY_WEAK_OFDM_HIGH_THR_M2	0x7f000000	reg.h
14948	AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_	24	reg.h
14949	AR5K_PHY_WEAK_OFDM_LOW_THR	0x986c	reg.h
14950	AR5K_PHY_WEAK_OFDM_LOW_THR_SELF	0x00000001	reg.h
14951	AR5K_PHY_WEAK_OFDM_LOW_THR_M2_C	0x00003f00	reg.h
14952	AR5K_PHY_WEAK_OFDM_LOW_THR_M2_C	8	reg.h
14953	AR5K_PHY_WEAK_OFDM_LOW_THR_M1	0x001fc000	reg.h
14954	AR5K_PHY_WEAK_OFDM_LOW_THR_M1_S	14	reg.h
14955	AR5K_PHY_WEAK_OFDM_LOW_THR_M2	0x0fe00000	reg.h
14956	AR5K_PHY_WEAK_OFDM_LOW_THR_M2_S	21	reg.h
14957	AR5K_PHY_SCR	0x9870	reg.h
14958	AR5K_PHY_SLMT	0x9874	reg.h
14959	AR5K_PHY_SLMT_32MHZ	0x0000007f	reg.h
14960	AR5K_PHY_SCAL	0x9878	reg.h
14961	AR5K_PHY_SCAL_32MHZ	0x0000000e	reg.h
14962	AR5K_PHY_SCAL_32MHZ_2417	0x0000000a	reg.h
14963	AR5K_PHY_SCAL_32MHZ_HB63	0x00000032	reg.h
14964	AR5K_PHY_PLL	0x987c	reg.h
14965	AR5K_PHY_PLL_20MHZ	0x00000013	reg.h	For half rate (?)
14966	AR5K_PHY_PLL_40MHZ_5211	0x00000018	reg.h
14967	AR5K_PHY_PLL_40MHZ_5212	0x000000aa	reg.h
14968	AR5K_PHY_PLL_40MHZ_5413	0x00000004	reg.h
14969	AR5K_PHY_PLL_40MHZ	(ah->ah_version == AR5K_AR5211 ? \ AR5K_PHY_PLL_40MHZ_5211 : AR5K_PHY_PLL_40MHZ_5212)	reg.h
14970	AR5K_PHY_PLL_44MHZ_5211	0x00000019	reg.h
14971	AR5K_PHY_PLL_44MHZ_5212	0x000000ab	reg.h
14972	AR5K_PHY_PLL_44MHZ	(ah->ah_version == AR5K_AR5211 ? \ AR5K_PHY_PLL_44MHZ_5211 : AR5K_PHY_PLL_44MHZ_5212)	reg.h
14973	AR5K_PHY_PLL_RF5111	0x00000000	reg.h
14974	AR5K_PHY_PLL_RF5112	0x00000040	reg.h
14975	AR5K_PHY_PLL_HALF_RATE	0x00000100	reg.h
14976	AR5K_PHY_PLL_QUARTER_RATE	0x00000200	reg.h
14977	AR5K_RF_BUFFER	0x989c	reg.h
14978	AR5K_RF_BUFFER_CONTROL_0	0x98c0	reg.h	Channel on 5110
14979	AR5K_RF_BUFFER_CONTROL_1	0x98c4	reg.h	Bank 7 on 5112
14980	AR5K_RF_BUFFER_CONTROL_2	0x98cc	reg.h	Bank 7 on 5111
14981	AR5K_RF_BUFFER_CONTROL_3	0x98d0	reg.h	Bank 2 on 5112
14982	AR5K_RF_BUFFER_CONTROL_4	0x98d4	reg.h	RF Stage register on 5110
14983	AR5K_RF_BUFFER_CONTROL_5	0x98d8	reg.h	Bank 3 on 5111
14984	AR5K_RF_BUFFER_CONTROL_6	0x98dc	reg.h	Bank 3 on 5112
14985	AR5K_PHY_RFSTG	0x98d4	reg.h
14986	AR5K_PHY_RFSTG_DISABLE	0x00000021	reg.h
14987	AR5K_PHY_BIN_MASK_1	0x9900	reg.h
14988	AR5K_PHY_BIN_MASK_2	0x9904	reg.h
14989	AR5K_PHY_BIN_MASK_3	0x9908	reg.h
14990	AR5K_PHY_BIN_MASK_CTL	0x990c	reg.h
14991	AR5K_PHY_BIN_MASK_CTL_MASK_4	0x00003fff	reg.h
14992	AR5K_PHY_BIN_MASK_CTL_MASK_4_S	0	reg.h
14993	AR5K_PHY_BIN_MASK_CTL_RATE	0xff000000	reg.h
14994	AR5K_PHY_BIN_MASK_CTL_RATE_S	24	reg.h
14995	AR5K_PHY_ANT_CTL	0x9910	reg.h	Register Address
14996	AR5K_PHY_ANT_CTL_TXRX_EN	0x00000001	reg.h	Enable TX/RX (?)
14997	AR5K_PHY_ANT_CTL_SECTORED_ANT	0x00000004	reg.h	Sectored Antenna
14998	AR5K_PHY_ANT_CTL_HITUNE5	0x00000008	reg.h	Hitune5 (?)
14999	AR5K_PHY_ANT_CTL_SWTABLE_IDLE	0x000003f0	reg.h	Switch table idle (?)
15000	AR5K_PHY_ANT_CTL_SWTABLE_IDLE_S	4	reg.h
15001	AR5K_PHY_RX_DELAY	0x9914	reg.h	Register Address
15002	AR5K_PHY_RX_DELAY_M	0x00003fff	reg.h	Mask for RX activate to receive delay (/100ns)
15003	AR5K_PHY_MAX_RX_LEN	0x991c	reg.h
15004	AR5K_PHY_IQ	0x9920	reg.h	Register Address
15005	AR5K_PHY_IQ_CORR_Q_Q_COFF	0x0000001f	reg.h	Mask for q correction info
15006	AR5K_PHY_IQ_CORR_Q_I_COFF	0x000007e0	reg.h	Mask for i correction info
15007	AR5K_PHY_IQ_CORR_Q_I_COFF_S	5	reg.h
15008	AR5K_PHY_IQ_CORR_ENABLE	0x00000800	reg.h	Enable i/q correction
15009	AR5K_PHY_IQ_CAL_NUM_LOG_MAX	0x0000f000	reg.h	Mask for max number of samples in log scale
15010	AR5K_PHY_IQ_CAL_NUM_LOG_MAX_S	12	reg.h
15011	AR5K_PHY_IQ_RUN	0x00010000	reg.h	Run i/q calibration
15012	AR5K_PHY_IQ_USE_PT_DF	0x00020000	reg.h	Use pilot track df (?)
15013	AR5K_PHY_IQ_EARLY_TRIG_THR	0x00200000	reg.h	Early trigger threshold (?) (field)
15014	AR5K_PHY_IQ_PILOT_MASK_EN	0x10000000	reg.h	Enable pilot mask (?)
15015	AR5K_PHY_IQ_CHAN_MASK_EN	0x20000000	reg.h	Enable channel mask (?)
15016	AR5K_PHY_IQ_SPUR_FILT_EN	0x40000000	reg.h	Enable spur filter
15017	AR5K_PHY_IQ_SPUR_RSSI_EN	0x80000000	reg.h	Enable spur rssi
15018	AR5K_PHY_OFDM_SELFCORR	0x9924	reg.h	Register Address
15019	AR5K_PHY_OFDM_SELFCORR_CYPWR_TH	0x00000001	reg.h	Enable cyclic RSSI thr 1
15020	AR5K_PHY_OFDM_SELFCORR_CYPWR_TH	0x000000fe	reg.h	Mask for Cyclic RSSI threshold 1
15021	AR5K_PHY_OFDM_SELFCORR_CYPWR_TH	1	reg.h
15022	AR5K_PHY_OFDM_SELFCORR_CYPWR_TH	0x00000100	reg.h	Cyclic RSSI threshold 3 (field) (?)
15023	AR5K_PHY_OFDM_SELFCORR_RSSI_1AT	0x00008000	reg.h	Enable 1A RSSI threshold (?)
15024	AR5K_PHY_OFDM_SELFCORR_RSSI_1AT	0x00010000	reg.h	1A RSSI threshold (field) (?)
15025	AR5K_PHY_OFDM_SELFCORR_LSCTHR_H	0x00800000	reg.h	Long sc threshold hi rssi (?)
15026	AR5K_PHY_WARM_RESET	0x9928	reg.h
15027	AR5K_PHY_CTL	0x992c	reg.h	Register Address
15028	AR5K_PHY_CTL_RX_DRAIN_RATE	0x00000001	reg.h	RX drain rate (?)
15029	AR5K_PHY_CTL_LATE_TX_SIG_SYM	0x00000002	reg.h	Late tx signal symbol (?)
15030	AR5K_PHY_CTL_GEN_SCRAMBLER	0x00000004	reg.h	Generate scrambler
15031	AR5K_PHY_CTL_TX_ANT_SEL	0x00000008	reg.h	TX antenna select
15032	AR5K_PHY_CTL_TX_ANT_STATIC	0x00000010	reg.h	Static TX antenna
15033	AR5K_PHY_CTL_RX_ANT_SEL	0x00000020	reg.h	RX antenna select
15034	AR5K_PHY_CTL_RX_ANT_STATIC	0x00000040	reg.h	Static RX antenna
15035	AR5K_PHY_CTL_LOW_FREQ_SLE_EN	0x00000080	reg.h	Enable low freq sleep
15036	AR5K_PHY_PAPD_PROBE	0x9930	reg.h
15037	AR5K_PHY_PAPD_PROBE_SH_HI_PAR	0x00000001	reg.h
15038	AR5K_PHY_PAPD_PROBE_PCDAC_BIAS	0x00000002	reg.h
15039	AR5K_PHY_PAPD_PROBE_COMP_GAIN	0x00000040	reg.h
15040	AR5K_PHY_PAPD_PROBE_TXPOWER	0x00007e00	reg.h
15041	AR5K_PHY_PAPD_PROBE_TXPOWER_S	9	reg.h
15042	AR5K_PHY_PAPD_PROBE_TX_NEXT	0x00008000	reg.h
15043	AR5K_PHY_PAPD_PROBE_PREDIST_EN	0x00010000	reg.h
15044	AR5K_PHY_PAPD_PROBE_TYPE	0x01800000	reg.h	[5112+]
15045	AR5K_PHY_PAPD_PROBE_TYPE_S	23	reg.h
15046	AR5K_PHY_PAPD_PROBE_TYPE_OFDM	0	reg.h
15047	AR5K_PHY_PAPD_PROBE_TYPE_XR	1	reg.h
15048	AR5K_PHY_PAPD_PROBE_TYPE_CCK	2	reg.h
15049	AR5K_PHY_PAPD_PROBE_GAINF	0xfe000000	reg.h
15050	AR5K_PHY_PAPD_PROBE_GAINF_S	25	reg.h
15051	AR5K_PHY_PAPD_PROBE_INI_5111	0x00004883	reg.h	[5212+]
15052	AR5K_PHY_PAPD_PROBE_INI_5112	0x00004882	reg.h	[5212+]
15053	AR5K_PHY_TXPOWER_RATE1	0x9934	reg.h
15054	AR5K_PHY_TXPOWER_RATE2	0x9938	reg.h
15055	AR5K_PHY_TXPOWER_RATE_MAX	0x993c	reg.h
15056	AR5K_PHY_TXPOWER_RATE_MAX_TPC_E	0x00000040	reg.h
15057	AR5K_PHY_TXPOWER_RATE3	0xa234	reg.h
15058	AR5K_PHY_TXPOWER_RATE4	0xa238	reg.h
15059	AR5K_PHY_FRAME_CTL_5210	0x9804	reg.h
15060	AR5K_PHY_FRAME_CTL_5211	0x9944	reg.h
15061	AR5K_PHY_FRAME_CTL	(ah->ah_version == AR5K_AR5210 ? \ AR5K_PHY_FRAME_CTL_5210 : AR5K_PHY_FRAME_CTL_5211)	reg.h
15062	AR5K_PHY_FRAME_CTL_TX_CLIP	0x00000038	reg.h	Mask for tx clip (?)
15063	AR5K_PHY_FRAME_CTL_TX_CLIP_S	3	reg.h
15064	AR5K_PHY_FRAME_CTL_PREP_CHINFO	0x00010000	reg.h	Prepend chan info
15065	AR5K_PHY_FRAME_CTL_EMU	0x80000000	reg.h
15066	AR5K_PHY_FRAME_CTL_EMU_S	31	reg.h
15067	AR5K_PHY_FRAME_CTL_TIMING_ERR	0x01000000	reg.h	PHY timing error
15068	AR5K_PHY_FRAME_CTL_PARITY_ERR	0x02000000	reg.h	Parity error
15069	AR5K_PHY_FRAME_CTL_ILLRATE_ERR	0x04000000	reg.h	Illegal rate
15070	AR5K_PHY_FRAME_CTL_ILLLEN_ERR	0x08000000	reg.h	Illegal length
15071	AR5K_PHY_FRAME_CTL_SERVICE_ERR	0x20000000	reg.h
15072	AR5K_PHY_FRAME_CTL_TXURN_ERR	0x40000000	reg.h	TX underrun
15073	AR5K_PHY_FRAME_CTL_INI	AR5K_PHY_FRAME_CTL_SERVICE_ERR \| \ AR5K_PHY_FRAME_CTL_TXURN_ERR \| \ AR5K_PHY_FRAME_CTL_ILLLEN_ERR \| \ AR5K_PHY_FRAME_CTL_ILLRAT	reg.h
15074	AR5K_PHY_TX_PWR_ADJ	0x994c	reg.h
15075	AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE	0x00000fc0	reg.h
15076	AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE	6	reg.h
15077	AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I	0x00fc0000	reg.h
15078	AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I	18	reg.h
15079	AR5K_PHY_RADAR	0x9954	reg.h
15080	AR5K_PHY_RADAR_ENABLE	0x00000001	reg.h
15081	AR5K_PHY_RADAR_DISABLE	0x00000000	reg.h
15082	AR5K_PHY_RADAR_INBANDTHR	0x0000003e	reg.h	Inband threshold
15083	AR5K_PHY_RADAR_INBANDTHR_S	1	reg.h
15084	AR5K_PHY_RADAR_PRSSI_THR	0x00000fc0	reg.h	Pulse RSSI/SNR threshold
15085	AR5K_PHY_RADAR_PRSSI_THR_S	6	reg.h
15086	AR5K_PHY_RADAR_PHEIGHT_THR	0x0003f000	reg.h	Pulse height threshold
15087	AR5K_PHY_RADAR_PHEIGHT_THR_S	12	reg.h
15088	AR5K_PHY_RADAR_RSSI_THR	0x00fc0000	reg.h	Radar RSSI/SNR threshold.
15089	AR5K_PHY_RADAR_RSSI_THR_S	18	reg.h
15090	AR5K_PHY_RADAR_FIRPWR_THR	0x7f000000	reg.h	Finite Impulse Response
15091	AR5K_PHY_RADAR_FIRPWR_THRS	24	reg.h
15092	AR5K_PHY_ANT_SWITCH_TABLE_0	0x9960	reg.h
15093	AR5K_PHY_ANT_SWITCH_TABLE_1	0x9964	reg.h
15094	AR5K_PHY_NFTHRES	0x9968	reg.h
15095	AR5K_PHY_SIGMA_DELTA	0x996C	reg.h
15096	AR5K_PHY_SIGMA_DELTA_ADC_SEL	0x00000003	reg.h
15097	AR5K_PHY_SIGMA_DELTA_ADC_SEL_S	0	reg.h
15098	AR5K_PHY_SIGMA_DELTA_FILT2	0x000000f8	reg.h
15099	AR5K_PHY_SIGMA_DELTA_FILT2_S	3	reg.h
15100	AR5K_PHY_SIGMA_DELTA_FILT1	0x00001f00	reg.h
15101	AR5K_PHY_SIGMA_DELTA_FILT1_S	8	reg.h
15102	AR5K_PHY_SIGMA_DELTA_ADC_CLIP	0x01ffe000	reg.h
15103	AR5K_PHY_SIGMA_DELTA_ADC_CLIP_S	13	reg.h
15104	AR5K_PHY_RESTART	0x9970	reg.h	restart
15105	AR5K_PHY_RESTART_DIV_GC	0x001c0000	reg.h	Fast diversity gc_limit (?)
15106	AR5K_PHY_RESTART_DIV_GC_S	18	reg.h
15107	AR5K_PHY_RFBUS_REQ	0x997C	reg.h
15108	AR5K_PHY_RFBUS_REQ_REQUEST	0x00000001	reg.h
15109	AR5K_PHY_TIMING_7	0x9980	reg.h
15110	AR5K_PHY_TIMING_8	0x9984	reg.h
15111	AR5K_PHY_TIMING_8_PILOT_MASK_2	0x000fffff	reg.h
15112	AR5K_PHY_TIMING_8_PILOT_MASK_2_	0	reg.h
15113	AR5K_PHY_BIN_MASK2_1	0x9988	reg.h
15114	AR5K_PHY_BIN_MASK2_2	0x998c	reg.h
15115	AR5K_PHY_BIN_MASK2_3	0x9990	reg.h
15116	AR5K_PHY_BIN_MASK2_4	0x9994	reg.h
15117	AR5K_PHY_BIN_MASK2_4_MASK_4	0x00003fff	reg.h
15118	AR5K_PHY_BIN_MASK2_4_MASK_4_S	0	reg.h
15119	AR5K_PHY_TIMING_9	0x9998	reg.h
15120	AR5K_PHY_TIMING_10	0x999c	reg.h
15121	AR5K_PHY_TIMING_10_PILOT_MASK_2	0x000fffff	reg.h
15122	AR5K_PHY_TIMING_10_PILOT_MASK_2	0	reg.h
15123	AR5K_PHY_TIMING_11	0x99a0	reg.h	Register address
15124	AR5K_PHY_TIMING_11_SPUR_DELTA_P	0x000fffff	reg.h	Spur delta phase
15125	AR5K_PHY_TIMING_11_SPUR_DELTA_P	0	reg.h
15126	AR5K_PHY_TIMING_11_SPUR_FREQ_SD	0x3ff00000	reg.h	Freq sigma delta
15127	AR5K_PHY_TIMING_11_SPUR_FREQ_SD	20	reg.h
15128	AR5K_PHY_TIMING_11_USE_SPUR_IN_	0x40000000	reg.h	Spur filter in AGC detector
15129	AR5K_PHY_TIMING_11_USE_SPUR_IN_	0x80000000	reg.h	Spur filter in OFDM self correlator
15130	AR5K_BB_GAIN_BASE	0x9b00	reg.h	BaseBand Amplifier Gain table base address
15131	AR5K_RF_GAIN_BASE	0x9a00	reg.h	RF Amplrifier Gain table base address
15132	AR5K_PHY_IQRES_CAL_PWR_I	0x9c10	reg.h	I (Inphase) power value
15133	AR5K_PHY_IQRES_CAL_PWR_Q	0x9c14	reg.h	Q (Quadrature) power value
15134	AR5K_PHY_IQRES_CAL_CORR	0x9c18	reg.h	I/Q Correlation
15135	AR5K_PHY_CURRENT_RSSI	0x9c1c	reg.h
15136	AR5K_PHY_RFBUS_GRANT	0x9c20	reg.h
15137	AR5K_PHY_RFBUS_GRANT_OK	0x00000001	reg.h
15138	AR5K_PHY_ADC_TEST	0x9c24	reg.h
15139	AR5K_PHY_ADC_TEST_I	0x00000001	reg.h
15140	AR5K_PHY_ADC_TEST_Q	0x00000200	reg.h
15141	AR5K_PHY_DAC_TEST	0x9c28	reg.h
15142	AR5K_PHY_DAC_TEST_I	0x00000001	reg.h
15143	AR5K_PHY_DAC_TEST_Q	0x00000200	reg.h
15144	AR5K_PHY_PTAT	0x9c2c	reg.h
15145	AR5K_PHY_BAD_TX_RATE	0x9c30	reg.h
15146	AR5K_PHY_SPUR_PWR	0x9c34	reg.h	Register Address
15147	AR5K_PHY_SPUR_PWR_I	0x00000001	reg.h	SPUR Power estimate for I (field)
15148	AR5K_PHY_SPUR_PWR_Q	0x00000100	reg.h	SPUR Power estimate for Q (field)
15149	AR5K_PHY_SPUR_PWR_FILT	0x00010000	reg.h	Power with SPUR removed (field)
15150	AR5K_PHY_CHAN_STATUS	0x9c38	reg.h
15151	AR5K_PHY_CHAN_STATUS_BT_ACT	0x00000001	reg.h
15152	AR5K_PHY_CHAN_STATUS_RX_CLR_RAW	0x00000002	reg.h
15153	AR5K_PHY_CHAN_STATUS_RX_CLR_MAC	0x00000004	reg.h
15154	AR5K_PHY_CHAN_STATUS_RX_CLR_PAP	0x00000008	reg.h
15155	AR5K_PHY_HEAVY_CLIP_ENABLE	0x99e0	reg.h
15156	AR5K_PHY_SCLOCK	0x99f0	reg.h
15157	AR5K_PHY_SCLOCK_32MHZ	0x0000000c	reg.h
15158	AR5K_PHY_SDELAY	0x99f4	reg.h
15159	AR5K_PHY_SDELAY_32MHZ	0x000000ff	reg.h
15160	AR5K_PHY_SPENDING	0x99f8	reg.h
15161	AR5K_PHY_PAPD_I_BASE	0xa000	reg.h
15162	AR5K_PHY_PCDAC_TXPOWER_BASE	0xa180	reg.h
15163	AR5K_PHY_MODE	0x0a200	reg.h	Register Address
15164	AR5K_PHY_MODE_MOD	0x00000001	reg.h	PHY Modulation bit
15165	AR5K_PHY_MODE_MOD_OFDM	0	reg.h
15166	AR5K_PHY_MODE_MOD_CCK	1	reg.h
15167	AR5K_PHY_MODE_FREQ	0x00000002	reg.h	Freq mode bit
15168	AR5K_PHY_MODE_FREQ_5GHZ	0	reg.h
15169	AR5K_PHY_MODE_FREQ_2GHZ	2	reg.h
15170	AR5K_PHY_MODE_MOD_DYN	0x00000004	reg.h	Enable Dynamic OFDM/CCK mode [5112+]
15171	AR5K_PHY_MODE_RAD	0x00000008	reg.h	[5212+]
15172	AR5K_PHY_MODE_RAD_RF5111	0	reg.h
15173	AR5K_PHY_MODE_RAD_RF5112	8	reg.h
15174	AR5K_PHY_MODE_XR	0x00000010	reg.h	Enable XR mode [5112+]
15175	AR5K_PHY_MODE_HALF_RATE	0x00000020	reg.h	Enable Half rate (test)
15176	AR5K_PHY_MODE_QUARTER_RATE	0x00000040	reg.h	Enable Quarter rat (test)
15177	AR5K_PHY_CCKTXCTL	0xa204	reg.h
15178	AR5K_PHY_CCKTXCTL_WORLD	0x00000000	reg.h
15179	AR5K_PHY_CCKTXCTL_JAPAN	0x00000010	reg.h
15180	AR5K_PHY_CCKTXCTL_SCRAMBLER_DIS	0x00000001	reg.h
15181	AR5K_PHY_CCKTXCTK_DAC_SCALE	0x00000004	reg.h
15182	AR5K_PHY_CCK_CROSSCORR	0xa208	reg.h
15183	AR5K_PHY_CCK_CROSSCORR_WEAK_SIG	0x0000000f	reg.h
15184	AR5K_PHY_CCK_CROSSCORR_WEAK_SIG	0	reg.h
15185	AR5K_PHY_FAST_ANT_DIV	0xa208	reg.h
15186	AR5K_PHY_FAST_ANT_DIV_EN	0x00002000	reg.h
15187	AR5K_PHY_GAIN_2GHZ	0xa20c	reg.h
15188	AR5K_PHY_GAIN_2GHZ_MARGIN_TXRX	0x00fc0000	reg.h
15189	AR5K_PHY_GAIN_2GHZ_MARGIN_TXRX_	18	reg.h
15190	AR5K_PHY_GAIN_2GHZ_INI_5111	0x6480416c	reg.h
15191	AR5K_PHY_CCK_RX_CTL_4	0xa21c	reg.h
15192	AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_	0x01f80000	reg.h
15193	AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_	19	reg.h
15194	AR5K_PHY_DAG_CCK_CTL	0xa228	reg.h
15195	AR5K_PHY_DAG_CCK_CTL_EN_RSSI_TH	0x00000200	reg.h
15196	AR5K_PHY_DAG_CCK_CTL_RSSI_THR	0x0001fc00	reg.h
15197	AR5K_PHY_DAG_CCK_CTL_RSSI_THR_S	10	reg.h
15198	AR5K_PHY_FAST_ADC	0xa24c	reg.h
15199	AR5K_PHY_BLUETOOTH	0xa254	reg.h
15200	AR5K_PHY_TPC_RG1	0xa258	reg.h
15201	AR5K_PHY_TPC_RG1_NUM_PD_GAIN	0x0000c000	reg.h
15202	AR5K_PHY_TPC_RG1_NUM_PD_GAIN_S	14	reg.h
15203	AR5K_PHY_TPC_RG1_PDGAIN_1	0x00030000	reg.h
15204	AR5K_PHY_TPC_RG1_PDGAIN_1_S	16	reg.h
15205	AR5K_PHY_TPC_RG1_PDGAIN_2	0x000c0000	reg.h
15206	AR5K_PHY_TPC_RG1_PDGAIN_2_S	18	reg.h
15207	AR5K_PHY_TPC_RG1_PDGAIN_3	0x00300000	reg.h
15208	AR5K_PHY_TPC_RG1_PDGAIN_3_S	20	reg.h
15209	AR5K_PHY_TPC_RG5	0xa26C	reg.h
15210	AR5K_PHY_TPC_RG5_PD_GAIN_OVERLA	0x0000000F	reg.h
15211	AR5K_PHY_TPC_RG5_PD_GAIN_OVERLA	0	reg.h
15212	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	0x000003F0	reg.h
15213	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	4	reg.h
15214	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	0x0000FC00	reg.h
15215	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	10	reg.h
15216	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	0x003F0000	reg.h
15217	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	16	reg.h
15218	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	0x0FC00000	reg.h
15219	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	22	reg.h
15220	AR5K_PHY_PDADC_TXPOWER_BASE	0xa280	reg.h
15221	AR5K_RF5111_OB_2GHZ	{ 3, 119, 0 }	rfbuffer.h
15222	AR5K_RF5111_DB_2GHZ	{ 3, 122, 0 }	rfbuffer.h
15223	AR5K_RF5111_OB_5GHZ	{ 3, 104, 0 }	rfbuffer.h
15224	AR5K_RF5111_DB_5GHZ	{ 3, 107, 0 }	rfbuffer.h
15225	AR5K_RF5111_PWD_XPD	{ 1, 95, 0 }	rfbuffer.h
15226	AR5K_RF5111_XPD_GAIN	{ 4, 96, 0 }	rfbuffer.h
15227	AR5K_RF5111_GAIN_I	{ 6, 29, 0 }	rfbuffer.h
15228	AR5K_RF5111_PLO_SEL	{ 1, 4, 0 }	rfbuffer.h
15229	AR5K_RF5111_RFGAIN_SEL	{ 1, 36, 0 }	rfbuffer.h
15230	AR5K_RF5111_RFGAIN_STEP	{ 6, 37, 0 }	rfbuffer.h
15231	AR5K_RF5111_WAIT_S	{ 5, 19, 0 }	rfbuffer.h
15232	AR5K_RF5111_WAIT_I	{ 5, 24, 0 }	rfbuffer.h
15233	AR5K_RF5111_MAX_TIME	{ 2, 49, 0 }	rfbuffer.h
15234	AR5K_RF5112X_GAIN_I	{ 6, 14, 0 }	rfbuffer.h
15235	AR5K_RF5112X_MIXVGA_OVR	{ 1, 36, 0 }	rfbuffer.h
15236	AR5K_RF5112X_MIXGAIN_OVR	{ 2, 37, 0 }	rfbuffer.h
15237	AR5K_RF5112X_MIXGAIN_STEP	{ 4, 32, 0 }	rfbuffer.h
15238	AR5K_RF5112X_PD_DELAY_A	{ 4, 58, 0 }	rfbuffer.h
15239	AR5K_RF5112X_PD_DELAY_B	{ 4, 62, 0 }	rfbuffer.h
15240	AR5K_RF5112X_PD_DELAY_XR	{ 4, 66, 0 }	rfbuffer.h
15241	AR5K_RF5112X_PD_PERIOD_A	{ 4, 70, 0 }	rfbuffer.h
15242	AR5K_RF5112X_PD_PERIOD_B	{ 4, 74, 0 }	rfbuffer.h
15243	AR5K_RF5112X_PD_PERIOD_XR	{ 4, 78, 0 }	rfbuffer.h
15244	AR5K_RF5112_OB_2GHZ	{ 3, 269, 0 }	rfbuffer.h
15245	AR5K_RF5112_DB_2GHZ	{ 3, 272, 0 }	rfbuffer.h
15246	AR5K_RF5112_OB_5GHZ	{ 3, 261, 0 }	rfbuffer.h
15247	AR5K_RF5112_DB_5GHZ	{ 3, 264, 0 }	rfbuffer.h
15248	AR5K_RF5112_FIXED_BIAS_A	{ 1, 260, 0 }	rfbuffer.h
15249	AR5K_RF5112_FIXED_BIAS_B	{ 1, 259, 0 }	rfbuffer.h
15250	AR5K_RF5112_XPD_SEL	{ 1, 284, 0 }	rfbuffer.h
15251	AR5K_RF5112_XPD_GAIN	{ 2, 252, 0 }	rfbuffer.h
15252	AR5K_RF5112A_OB_2GHZ	{ 3, 287, 0 }	rfbuffer.h
15253	AR5K_RF5112A_DB_2GHZ	{ 3, 290, 0 }	rfbuffer.h
15254	AR5K_RF5112A_OB_5GHZ	{ 3, 279, 0 }	rfbuffer.h
15255	AR5K_RF5112A_DB_5GHZ	{ 3, 282, 0 }	rfbuffer.h
15256	AR5K_RF5112A_FIXED_BIAS_A	{ 1, 278, 0 }	rfbuffer.h
15257	AR5K_RF5112A_FIXED_BIAS_B	{ 1, 277, 0 }	rfbuffer.h
15258	AR5K_RF5112A_XPD_SEL	{ 1, 302, 0 }	rfbuffer.h
15259	AR5K_RF5112A_PDGAINLO	{ 2, 270, 0 }	rfbuffer.h
15260	AR5K_RF5112A_PDGAINHI	{ 2, 257, 0 }	rfbuffer.h
15261	AR5K_RF5112A_HIGH_VC_CP	{ 2, 90, 2 }	rfbuffer.h
15262	AR5K_RF5112A_MID_VC_CP	{ 2, 92, 2 }	rfbuffer.h
15263	AR5K_RF5112A_LOW_VC_CP	{ 2, 94, 2 }	rfbuffer.h
15264	AR5K_RF5112A_PUSH_UP	{ 1, 254, 2 }	rfbuffer.h
15265	AR5K_RF5112A_PAD2GND	{ 1, 281, 1 }	rfbuffer.h
15266	AR5K_RF5112A_XB2_LVL	{ 2, 1, 3 }	rfbuffer.h
15267	AR5K_RF5112A_XB5_LVL	{ 2, 3, 3 }	rfbuffer.h
15268	AR5K_RF2413_OB_2GHZ	{ 3, 168, 0 }	rfbuffer.h
15269	AR5K_RF2413_DB_2GHZ	{ 3, 165, 0 }	rfbuffer.h
15270	AR5K_RF2316_OB_2GHZ	{ 3, 178, 0 }	rfbuffer.h
15271	AR5K_RF2316_DB_2GHZ	{ 3, 175, 0 }	rfbuffer.h
15272	AR5K_RF5413_OB_2GHZ	{ 3, 241, 0 }	rfbuffer.h
15273	AR5K_RF5413_DB_2GHZ	{ 3, 238, 0 }	rfbuffer.h
15274	AR5K_RF5413_OB_5GHZ	{ 3, 247, 0 }	rfbuffer.h
15275	AR5K_RF5413_DB_5GHZ	{ 3, 244, 0 }	rfbuffer.h
15276	AR5K_RF5413_PWD_ICLOBUF2G	{ 3, 131, 3 }	rfbuffer.h
15277	AR5K_RF5413_DERBY_CHAN_SEL_MODE	{ 1, 291, 2 }	rfbuffer.h
15278	AR5K_RF2425_OB_2GHZ	{ 3, 193, 0 }	rfbuffer.h
15279	AR5K_RF2425_DB_2GHZ	{ 3, 190, 0 }	rfbuffer.h
15280	AR5K_GAIN_CRN_FIX_BITS_5111	4	rfgain.h
15281	AR5K_GAIN_CRN_FIX_BITS_5112	7	rfgain.h
15282	AR5K_GAIN_CRN_MAX_FIX_BITS	AR5K_GAIN_CRN_FIX_BITS_5112	rfgain.h
15283	AR5K_GAIN_DYN_ADJUST_HI_MARGIN	15	rfgain.h
15284	AR5K_GAIN_DYN_ADJUST_LO_MARGIN	20	rfgain.h
15285	AR5K_GAIN_CCK_PROBE_CORR	5	rfgain.h
15286	AR5K_GAIN_CCK_OFDM_GAIN_DELTA	15	rfgain.h
15287	AR5K_GAIN_STEP_COUNT	10	rfgain.h
15288	BAR_0	0	e1000.h
15289	BAR_1	1	e1000.h
15290	BAR_5	5	e1000.h
15291	E1000_RXBUFFER_128	128	e1000.h	Used for packet split
15292	E1000_RXBUFFER_256	256	e1000.h	Used for packet split
15293	E1000_RXBUFFER_512	512	e1000.h
15294	E1000_RXBUFFER_1024	1024	e1000.h
15295	E1000_RXBUFFER_2048	2048	e1000.h
15296	E1000_RXBUFFER_4096	4096	e1000.h
15297	E1000_RXBUFFER_8192	8192	e1000.h
15298	E1000_RXBUFFER_16384	16384	e1000.h
15299	E1000_SMARTSPEED_DOWNSHIFT	3	e1000.h
15300	E1000_SMARTSPEED_MAX	15	e1000.h
15301	E1000_PBA_BYTES_SHIFT	0xA	e1000.h
15302	E1000_TX_HEAD_ADDR_SHIFT	7	e1000.h
15303	E1000_PBA_TX_MASK	0xFFFF0000	e1000.h
15304	E1000_FC_HIGH_DIFF	0x1638	e1000.h	High: 5688 bytes below Rx FIFO size
15305	E1000_FC_LOW_DIFF	0x1640	e1000.h	Low: 5696 bytes below Rx FIFO size
15306	E1000_FC_PAUSE_TIME	0x0680	e1000.h	858 usec
15307	MAXIMUM_ETHERNET_VLAN_SIZE	1522	e1000.h
15308	E1000_TX_QUEUE_WAKE	16	e1000.h
15309	E1000_RX_BUFFER_WRITE	16	e1000.h	Must be power of 2
15310	AUTO_ALL_MODES	0	e1000.h
15311	E1000_EEPROM_82544_APM	0x0004	e1000.h
15312	E1000_EEPROM_ICH8_APME	0x0004	e1000.h
15313	E1000_EEPROM_APME	0x0400	e1000.h
15314	E1000_MASTER_SLAVE	e1000_ms_hw_default	e1000.h
15315	E1000_MNG2HOST_PORT_623	(1 << 5)	e1000.h
15316	E1000_MNG2HOST_PORT_664	(1 << 6)	e1000.h
15317	E1000_ERT_2048	0x100	e1000.h
15318	IORESOURCE_IO	0x00000100	e1000.h
15319	IORESOURCE_MEM	0x00000200	e1000.h
15320	IORESOURCE_PREFETCH	0x00001000	e1000.h
15321	E1000_HOST_IF_MAX_SIZE	2048	e1000_hw.h
15322	E1000_SUCCESS	0	e1000_hw.h
15323	E1000_ERR_EEPROM	1	e1000_hw.h
15324	E1000_ERR_PHY	2	e1000_hw.h
15325	E1000_ERR_CONFIG	3	e1000_hw.h
15326	E1000_ERR_PARAM	4	e1000_hw.h
15327	E1000_ERR_MAC_TYPE	5	e1000_hw.h
15328	E1000_ERR_PHY_TYPE	6	e1000_hw.h
15329	E1000_ERR_RESET	9	e1000_hw.h
15330	E1000_ERR_MASTER_REQUESTS_PENDI	10	e1000_hw.h
15331	E1000_ERR_HOST_INTERFACE_COMMAN	11	e1000_hw.h
15332	E1000_BLK_PHY_RESET	12	e1000_hw.h
15333	E1000_ERR_SWFW_SYNC	13	e1000_hw.h
15334	E1000_MNG_DHCP_TX_PAYLOAD_CMD	64	e1000_hw.h
15335	E1000_HI_MAX_MNG_DATA_LENGTH	0x6F8	e1000_hw.h	Host Interface data length
15336	E1000_MNG_DHCP_COMMAND_TIMEOUT	10	e1000_hw.h	Time in ms to process MNG command
15337	E1000_MNG_DHCP_COOKIE_OFFSET	0x6F0	e1000_hw.h	Cookie offset
15338	E1000_MNG_DHCP_COOKIE_LENGTH	0x10	e1000_hw.h	Cookie length
15339	E1000_MNG_IAMT_MODE	0x3	e1000_hw.h
15340	E1000_MNG_ICH_IAMT_MODE	0x2	e1000_hw.h
15341	E1000_IAMT_SIGNATURE	0x544D4149	e1000_hw.h	Intel(R) Active Management Technology signature
15342	E1000_MNG_DHCP_COOKIE_STATUS_PA	0x1	e1000_hw.h	DHCP parsing enabled
15343	E1000_MNG_DHCP_COOKIE_STATUS_VL	0x2	e1000_hw.h	DHCP parsing enabled
15344	E1000_VFTA_ENTRY_SHIFT	0x5	e1000_hw.h
15345	E1000_VFTA_ENTRY_MASK	0x7F	e1000_hw.h
15346	E1000_VFTA_ENTRY_BIT_SHIFT_MASK	0x1F	e1000_hw.h
15347	E1000_DEV_ID_82542	0x1000	e1000_hw.h
15348	E1000_DEV_ID_82543GC_FIBER	0x1001	e1000_hw.h
15349	E1000_DEV_ID_82543GC_COPPER	0x1004	e1000_hw.h
15350	E1000_DEV_ID_82544EI_COPPER	0x1008	e1000_hw.h
15351	E1000_DEV_ID_82544EI_FIBER	0x1009	e1000_hw.h
15352	E1000_DEV_ID_82544GC_COPPER	0x100C	e1000_hw.h
15353	E1000_DEV_ID_82544GC_LOM	0x100D	e1000_hw.h
15354	E1000_DEV_ID_82540EM	0x100E	e1000_hw.h
15355	E1000_DEV_ID_82540EM_LOM	0x1015	e1000_hw.h
15356	E1000_DEV_ID_82540EP_LOM	0x1016	e1000_hw.h
15357	E1000_DEV_ID_82540EP	0x1017	e1000_hw.h
15358	E1000_DEV_ID_82540EP_LP	0x101E	e1000_hw.h
15359	E1000_DEV_ID_82545EM_COPPER	0x100F	e1000_hw.h
15360	E1000_DEV_ID_82545EM_FIBER	0x1011	e1000_hw.h
15361	E1000_DEV_ID_82545GM_COPPER	0x1026	e1000_hw.h
15362	E1000_DEV_ID_82545GM_FIBER	0x1027	e1000_hw.h
15363	E1000_DEV_ID_82545GM_SERDES	0x1028	e1000_hw.h
15364	E1000_DEV_ID_82546EB_COPPER	0x1010	e1000_hw.h
15365	E1000_DEV_ID_82546EB_FIBER	0x1012	e1000_hw.h
15366	E1000_DEV_ID_82546EB_QUAD_COPPE	0x101D	e1000_hw.h
15367	E1000_DEV_ID_82541EI	0x1013	e1000_hw.h
15368	E1000_DEV_ID_82541EI_MOBILE	0x1018	e1000_hw.h
15369	E1000_DEV_ID_82541ER_LOM	0x1014	e1000_hw.h
15370	E1000_DEV_ID_82541ER	0x1078	e1000_hw.h
15371	E1000_DEV_ID_82547GI	0x1075	e1000_hw.h
15372	E1000_DEV_ID_82541GI	0x1076	e1000_hw.h
15373	E1000_DEV_ID_82541GI_MOBILE	0x1077	e1000_hw.h
15374	E1000_DEV_ID_82541GI_LF	0x107C	e1000_hw.h
15375	E1000_DEV_ID_82546GB_COPPER	0x1079	e1000_hw.h
15376	E1000_DEV_ID_82546GB_FIBER	0x107A	e1000_hw.h
15377	E1000_DEV_ID_82546GB_SERDES	0x107B	e1000_hw.h
15378	E1000_DEV_ID_82546GB_PCIE	0x108A	e1000_hw.h
15379	E1000_DEV_ID_82546GB_QUAD_COPPE	0x1099	e1000_hw.h
15380	E1000_DEV_ID_82547EI	0x1019	e1000_hw.h
15381	E1000_DEV_ID_82547EI_MOBILE	0x101A	e1000_hw.h
15382	E1000_DEV_ID_82571EB_COPPER	0x105E	e1000_hw.h
15383	E1000_DEV_ID_82571EB_FIBER	0x105F	e1000_hw.h
15384	E1000_DEV_ID_82571EB_SERDES	0x1060	e1000_hw.h
15385	E1000_DEV_ID_82571EB_QUAD_COPPE	0x10A4	e1000_hw.h
15386	E1000_DEV_ID_82571EB_QUAD_FIBER	0x10A5	e1000_hw.h
15387	E1000_DEV_ID_82571EB_QUAD_COPPE	0x10BC	e1000_hw.h
15388	E1000_DEV_ID_82571EB_SERDES_DUA	0x10D9	e1000_hw.h
15389	E1000_DEV_ID_82571EB_SERDES_QUA	0x10DA	e1000_hw.h
15390	E1000_DEV_ID_82572EI_COPPER	0x107D	e1000_hw.h
15391	E1000_DEV_ID_82572EI_FIBER	0x107E	e1000_hw.h
15392	E1000_DEV_ID_82572EI_SERDES	0x107F	e1000_hw.h
15393	E1000_DEV_ID_82572EI	0x10B9	e1000_hw.h
15394	E1000_DEV_ID_82573E	0x108B	e1000_hw.h
15395	E1000_DEV_ID_82573E_IAMT	0x108C	e1000_hw.h
15396	E1000_DEV_ID_82573L	0x109A	e1000_hw.h
15397	E1000_DEV_ID_82546GB_QUAD_COPPE	0x10B5	e1000_hw.h
15398	E1000_DEV_ID_80003ES2LAN_COPPER	0x1096	e1000_hw.h
15399	E1000_DEV_ID_80003ES2LAN_SERDES	0x1098	e1000_hw.h
15400	E1000_DEV_ID_80003ES2LAN_COPPER	0x10BA	e1000_hw.h
15401	E1000_DEV_ID_80003ES2LAN_SERDES	0x10BB	e1000_hw.h
15402	E1000_DEV_ID_ICH8_IGP_M_AMT	0x1049	e1000_hw.h
15403	E1000_DEV_ID_ICH8_IGP_AMT	0x104A	e1000_hw.h
15404	E1000_DEV_ID_ICH8_IGP_C	0x104B	e1000_hw.h
15405	E1000_DEV_ID_ICH8_IFE	0x104C	e1000_hw.h
15406	E1000_DEV_ID_ICH8_IFE_GT	0x10C4	e1000_hw.h
15407	E1000_DEV_ID_ICH8_IFE_G	0x10C5	e1000_hw.h
15408	E1000_DEV_ID_ICH8_IGP_M	0x104D	e1000_hw.h
15409	E1000_DEV_ID_82576	0x10C9	e1000_hw.h
15410	NODE_ADDRESS_SIZE	6	e1000_hw.h
15411	ETH_LENGTH_OF_ADDRESS	6	e1000_hw.h
15412	MAC_DECODE_SIZE	(128 * 1024)	e1000_hw.h
15413	E1000_82542_2_0_REV_ID	2	e1000_hw.h
15414	E1000_82542_2_1_REV_ID	3	e1000_hw.h
15415	E1000_REVISION_0	0	e1000_hw.h
15416	E1000_REVISION_1	1	e1000_hw.h
15417	E1000_REVISION_2	2	e1000_hw.h
15418	E1000_REVISION_3	3	e1000_hw.h
15419	SPEED_10	10	e1000_hw.h
15420	SPEED_100	100	e1000_hw.h
15421	SPEED_1000	1000	e1000_hw.h
15422	HALF_DUPLEX	1	e1000_hw.h
15423	FULL_DUPLEX	2	e1000_hw.h
15424	ENET_HEADER_SIZE	14	e1000_hw.h
15425	MAXIMUM_ETHERNET_FRAME_SIZE	1518	e1000_hw.h	With FCS
15426	MINIMUM_ETHERNET_FRAME_SIZE	64	e1000_hw.h	With FCS
15427	ETHERNET_FCS_SIZE	4	e1000_hw.h
15428	MAXIMUM_ETHERNET_PACKET_SIZE	(MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)	e1000_hw.h
15429	MINIMUM_ETHERNET_PACKET_SIZE	(MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)	e1000_hw.h
15430	CRC_LENGTH	ETHERNET_FCS_SIZE	e1000_hw.h
15431	MAX_JUMBO_FRAME_SIZE	0x3F00	e1000_hw.h
15432	VLAN_TAG_SIZE	4	e1000_hw.h	802.3ac tag (not DMAed)
15433	ETHERNET_IEEE_VLAN_TYPE	0x8100	e1000_hw.h	802.3ac packet
15434	ETHERNET_IP_TYPE	0x0800	e1000_hw.h	IP packets
15435	ETHERNET_ARP_TYPE	0x0806	e1000_hw.h	Address Resolution Protocol (ARP)
15436	IP_PROTOCOL_TCP	6	e1000_hw.h
15437	IP_PROTOCOL_UDP	0x11	e1000_hw.h
15438	POLL_IMS_ENABLE_MASK	( \ E1000_IMS_RXDMT0 \| \ E1000_IMS_RXSEQ)	e1000_hw.h
15439	IMS_ENABLE_MASK	( \ E1000_IMS_RXT0 \| \ E1000_IMS_TXDW \| \ E1000_IMS_RXDMT0 \| \ E1000_IMS_RXSEQ \| \ E1000_IMS_LSC \| \ E10	e1000_hw.h
15440	IMS_ICH8LAN_ENABLE_MASK	(\ E1000_IMS_DSW \| \ E1000_IMS_PHYINT \| \ E1000_IMS_EPRST)	e1000_hw.h
15441	E1000_RAR_ENTRIES	15	e1000_hw.h
15442	E1000_RAR_ENTRIES_ICH8LAN	6	e1000_hw.h
15443	MIN_NUMBER_OF_DESCRIPTORS	8	e1000_hw.h
15444	MAX_NUMBER_OF_DESCRIPTORS	0xFFF8	e1000_hw.h
15445	MAX_PS_BUFFERS	4	e1000_hw.h
15446	E1000_RXD_STAT_DD	0x01	e1000_hw.h	Descriptor Done
15447	E1000_RXD_STAT_EOP	0x02	e1000_hw.h	End of Packet
15448	E1000_RXD_STAT_IXSM	0x04	e1000_hw.h	Ignore checksum
15449	E1000_RXD_STAT_VP	0x08	e1000_hw.h	IEEE VLAN Packet
15450	E1000_RXD_STAT_UDPCS	0x10	e1000_hw.h	UDP xsum caculated
15451	E1000_RXD_STAT_TCPCS	0x20	e1000_hw.h	TCP xsum calculated
15452	E1000_RXD_STAT_IPCS	0x40	e1000_hw.h	IP xsum calculated
15453	E1000_RXD_STAT_PIF	0x80	e1000_hw.h	passed in-exact filter
15454	E1000_RXD_STAT_IPIDV	0x200	e1000_hw.h	IP identification valid
15455	E1000_RXD_STAT_UDPV	0x400	e1000_hw.h	Valid UDP checksum
15456	E1000_RXD_STAT_ACK	0x8000	e1000_hw.h	ACK Packet indication
15457	E1000_RXD_ERR_CE	0x01	e1000_hw.h	CRC Error
15458	E1000_RXD_ERR_SE	0x02	e1000_hw.h	Symbol Error
15459	E1000_RXD_ERR_SEQ	0x04	e1000_hw.h	Sequence Error
15460	E1000_RXD_ERR_CXE	0x10	e1000_hw.h	Carrier Extension Error
15461	E1000_RXD_ERR_TCPE	0x20	e1000_hw.h	TCP/UDP Checksum Error
15462	E1000_RXD_ERR_IPE	0x40	e1000_hw.h	IP Checksum Error
15463	E1000_RXD_ERR_RXE	0x80	e1000_hw.h	Rx Data Error
15464	E1000_RXD_SPC_VLAN_MASK	0x0FFF	e1000_hw.h	VLAN ID is in lower 12 bits
15465	E1000_RXD_SPC_PRI_MASK	0xE000	e1000_hw.h	Priority is in upper 3 bits
15466	E1000_RXD_SPC_PRI_SHIFT	13	e1000_hw.h
15467	E1000_RXD_SPC_CFI_MASK	0x1000	e1000_hw.h	CFI is bit 12
15468	E1000_RXD_SPC_CFI_SHIFT	12	e1000_hw.h
15469	E1000_RXDEXT_STATERR_CE	0x01000000	e1000_hw.h
15470	E1000_RXDEXT_STATERR_SE	0x02000000	e1000_hw.h
15471	E1000_RXDEXT_STATERR_SEQ	0x04000000	e1000_hw.h
15472	E1000_RXDEXT_STATERR_CXE	0x10000000	e1000_hw.h
15473	E1000_RXDEXT_STATERR_TCPE	0x20000000	e1000_hw.h
15474	E1000_RXDEXT_STATERR_IPE	0x40000000	e1000_hw.h
15475	E1000_RXDEXT_STATERR_RXE	0x80000000	e1000_hw.h
15476	E1000_RXDPS_HDRSTAT_HDRSP	0x00008000	e1000_hw.h
15477	E1000_RXDPS_HDRSTAT_HDRLEN_MASK	0x000003FF	e1000_hw.h
15478	E1000_RXD_ERR_FRAME_ERR_MASK	( \ E1000_RXD_ERR_CE \| \ E1000_RXD_ERR_SE \| \ E1000_RXD_ERR_SEQ \| \ E1000_RXD_ER	e1000_hw.h
15479	E1000_RXDEXT_ERR_FRAME_ERR_MASK	( \ E1000_RXDEXT_STATERR_CE \| \ E1000_RXDEXT_STATERR_SE \| \ E1000_RXDEXT_STATERR_SEQ \| \ E10	e1000_hw.h
15480	E1000_TXD_DTYP_D	0x00100000	e1000_hw.h	Data Descriptor
15481	E1000_TXD_DTYP_C	0x00000000	e1000_hw.h	Context Descriptor
15482	E1000_TXD_POPTS_IXSM	0x01	e1000_hw.h	Insert IP checksum
15483	E1000_TXD_POPTS_TXSM	0x02	e1000_hw.h	Insert TCP/UDP checksum
15484	E1000_TXD_CMD_EOP	0x01000000	e1000_hw.h	End of Packet
15485	E1000_TXD_CMD_IFCS	0x02000000	e1000_hw.h	Insert FCS (Ethernet CRC)
15486	E1000_TXD_CMD_IC	0x04000000	e1000_hw.h	Insert Checksum
15487	E1000_TXD_CMD_RS	0x08000000	e1000_hw.h	Report Status
15488	E1000_TXD_CMD_RPS	0x10000000	e1000_hw.h	Report Packet Sent
15489	E1000_TXD_CMD_DEXT	0x20000000	e1000_hw.h	Descriptor extension (0 = legacy)
15490	E1000_TXD_CMD_VLE	0x40000000	e1000_hw.h	Add VLAN tag
15491	E1000_TXD_CMD_IDE	0x80000000	e1000_hw.h	Enable Tidv register
15492	E1000_TXD_STAT_DD	0x00000001	e1000_hw.h	Descriptor Done
15493	E1000_TXD_STAT_EC	0x00000002	e1000_hw.h	Excess Collisions
15494	E1000_TXD_STAT_LC	0x00000004	e1000_hw.h	Late Collisions
15495	E1000_TXD_STAT_TU	0x00000008	e1000_hw.h	Transmit underrun
15496	E1000_TXD_CMD_TCP	0x01000000	e1000_hw.h	TCP packet
15497	E1000_TXD_CMD_IP	0x02000000	e1000_hw.h	IP packet
15498	E1000_TXD_CMD_TSE	0x04000000	e1000_hw.h	TCP Seg enable
15499	E1000_TXD_STAT_TC	0x00000004	e1000_hw.h	Tx Underrun
15500	E1000_NUM_UNICAST	16	e1000_hw.h	Unicast filter entries
15501	E1000_MC_TBL_SIZE	128	e1000_hw.h	Multicast Filter Table (4096 bits)
15502	E1000_VLAN_FILTER_TBL_SIZE	128	e1000_hw.h	VLAN Filter Table (4096 bits)
15503	E1000_NUM_UNICAST_ICH8LAN	7	e1000_hw.h
15504	E1000_MC_TBL_SIZE_ICH8LAN	32	e1000_hw.h
15505	E1000_NUM_MTA_REGISTERS	128	e1000_hw.h
15506	E1000_NUM_MTA_REGISTERS_ICH8LAN	32	e1000_hw.h
15507	E1000_WAKEUP_IP_ADDRESS_COUNT_M	4	e1000_hw.h
15508	E1000_IP4AT_SIZE	E1000_WAKEUP_IP_ADDRESS_COUNT_MAX	e1000_hw.h
15509	E1000_IP4AT_SIZE_ICH8LAN	3	e1000_hw.h
15510	E1000_IP6AT_SIZE	1	e1000_hw.h
15511	E1000_FLEXIBLE_FILTER_COUNT_MAX	4	e1000_hw.h
15512	E1000_FLEXIBLE_FILTER_SIZE_MAX	128	e1000_hw.h
15513	E1000_FFLT_SIZE	E1000_FLEXIBLE_FILTER_COUNT_MAX	e1000_hw.h
15514	E1000_FFMT_SIZE	E1000_FLEXIBLE_FILTER_SIZE_MAX	e1000_hw.h
15515	E1000_FFVT_SIZE	E1000_FLEXIBLE_FILTER_SIZE_MAX	e1000_hw.h
15516	E1000_DISABLE_SERDES_LOOPBACK	0x0400	e1000_hw.h
15517	E1000_CTRL	0x00000	e1000_hw.h	Device Control - RW
15518	E1000_CTRL_DUP	0x00004	e1000_hw.h	Device Control Duplicate (Shadow) - RW
15519	E1000_STATUS	0x00008	e1000_hw.h	Device Status - RO
15520	E1000_EECD	0x00010	e1000_hw.h	EEPROM/Flash Control - RW
15521	E1000_EERD	0x00014	e1000_hw.h	EEPROM Read - RW
15522	E1000_CTRL_EXT	0x00018	e1000_hw.h	Extended Device Control - RW
15523	E1000_FLA	0x0001C	e1000_hw.h	Flash Access - RW
15524	E1000_MDIC	0x00020	e1000_hw.h	MDI Control - RW
15525	E1000_SCTL	0x00024	e1000_hw.h	SerDes Control - RW
15526	E1000_FEXTNVM	0x00028	e1000_hw.h	Future Extended NVM register
15527	E1000_FCAL	0x00028	e1000_hw.h	Flow Control Address Low - RW
15528	E1000_FCAH	0x0002C	e1000_hw.h	Flow Control Address High -RW
15529	E1000_FCT	0x00030	e1000_hw.h	Flow Control Type - RW
15530	E1000_VET	0x00038	e1000_hw.h	VLAN Ether Type - RW
15531	E1000_ICR	0x000C0	e1000_hw.h	Interrupt Cause Read - R/clr
15532	E1000_ITR	0x000C4	e1000_hw.h	Interrupt Throttling Rate - RW
15533	E1000_ICS	0x000C8	e1000_hw.h	Interrupt Cause Set - WO
15534	E1000_IMS	0x000D0	e1000_hw.h	Interrupt Mask Set - RW
15535	E1000_IMC	0x000D8	e1000_hw.h	Interrupt Mask Clear - WO
15536	E1000_IAM	0x000E0	e1000_hw.h	Interrupt Acknowledge Auto Mask
15537	E1000_RCTL	0x00100	e1000_hw.h	RX Control - RW
15538	E1000_RDTR1	0x02820	e1000_hw.h	RX Delay Timer (1) - RW
15539	E1000_RDBAL1	0x02900	e1000_hw.h	RX Descriptor Base Address Low (1) - RW
15540	E1000_RDBAH1	0x02904	e1000_hw.h	RX Descriptor Base Address High (1) - RW
15541	E1000_RDLEN1	0x02908	e1000_hw.h	RX Descriptor Length (1) - RW
15542	E1000_RDH1	0x02910	e1000_hw.h	RX Descriptor Head (1) - RW
15543	E1000_RDT1	0x02918	e1000_hw.h	RX Descriptor Tail (1) - RW
15544	E1000_FCTTV	0x00170	e1000_hw.h	Flow Control Transmit Timer Value - RW
15545	E1000_TXCW	0x00178	e1000_hw.h	TX Configuration Word - RW
15546	E1000_RXCW	0x00180	e1000_hw.h	RX Configuration Word - RO
15547	E1000_TCTL	0x00400	e1000_hw.h	TX Control - RW
15548	E1000_TCTL_EXT	0x00404	e1000_hw.h	Extended TX Control - RW
15549	E1000_TIPG	0x00410	e1000_hw.h	TX Inter-packet gap -RW
15550	E1000_TBT	0x00448	e1000_hw.h	TX Burst Timer - RW
15551	E1000_AIT	0x00458	e1000_hw.h	Adaptive Interframe Spacing Throttle - RW
15552	E1000_LEDCTL	0x00E00	e1000_hw.h	LED Control - RW
15553	E1000_EXTCNF_CTRL	0x00F00	e1000_hw.h	Extended Configuration Control
15554	E1000_EXTCNF_SIZE	0x00F08	e1000_hw.h	Extended Configuration Size
15555	E1000_PHY_CTRL	0x00F10	e1000_hw.h	PHY Control Register in CSR
15556	FEXTNVM_SW_CONFIG	0x0001	e1000_hw.h
15557	E1000_PBA	0x01000	e1000_hw.h	Packet Buffer Allocation - RW
15558	E1000_PBS	0x01008	e1000_hw.h	Packet Buffer Size
15559	E1000_EEMNGCTL	0x01010	e1000_hw.h	MNG EEprom Control
15560	E1000_FLASH_UPDATES	1000	e1000_hw.h
15561	E1000_EEARBC	0x01024	e1000_hw.h	EEPROM Auto Read Bus Control
15562	E1000_FLASHT	0x01028	e1000_hw.h	FLASH Timer Register
15563	E1000_EEWR	0x0102C	e1000_hw.h	EEPROM Write Register - RW
15564	E1000_FLSWCTL	0x01030	e1000_hw.h	FLASH control register
15565	E1000_FLSWDATA	0x01034	e1000_hw.h	FLASH data register
15566	E1000_FLSWCNT	0x01038	e1000_hw.h	FLASH Access Counter
15567	E1000_FLOP	0x0103C	e1000_hw.h	FLASH Opcode Register
15568	E1000_ERT	0x02008	e1000_hw.h	Early Rx Threshold - RW
15569	E1000_FCRTL	0x02160	e1000_hw.h	Flow Control Receive Threshold Low - RW
15570	E1000_FCRTH	0x02168	e1000_hw.h	Flow Control Receive Threshold High - RW
15571	E1000_PSRCTL	0x02170	e1000_hw.h	Packet Split Receive Control - RW
15572	E1000_RDBAL	0x02800	e1000_hw.h	RX Descriptor Base Address Low - RW
15573	E1000_RDBAH	0x02804	e1000_hw.h	RX Descriptor Base Address High - RW
15574	E1000_RDLEN	0x02808	e1000_hw.h	RX Descriptor Length - RW
15575	E1000_RDH	0x02810	e1000_hw.h	RX Descriptor Head - RW
15576	E1000_RDT	0x02818	e1000_hw.h	RX Descriptor Tail - RW
15577	E1000_RDTR	0x02820	e1000_hw.h	RX Delay Timer - RW
15578	E1000_RDBAL0	E1000_RDBAL	e1000_hw.h	RX Desc Base Address Low (0) - RW
15579	E1000_RDBAH0	E1000_RDBAH	e1000_hw.h	RX Desc Base Address High (0) - RW
15580	E1000_RDLEN0	E1000_RDLEN	e1000_hw.h	RX Desc Length (0) - RW
15581	E1000_RDH0	E1000_RDH	e1000_hw.h	RX Desc Head (0) - RW
15582	E1000_RDT0	E1000_RDT	e1000_hw.h	RX Desc Tail (0) - RW
15583	E1000_RDTR0	E1000_RDTR	e1000_hw.h	RX Delay Timer (0) - RW
15584	E1000_RXDCTL	0x02828	e1000_hw.h	RX Descriptor Control queue 0 - RW
15585	E1000_RXDCTL1	0x02928	e1000_hw.h	RX Descriptor Control queue 1 - RW
15586	E1000_RADV	0x0282C	e1000_hw.h	RX Interrupt Absolute Delay Timer - RW
15587	E1000_RSRPD	0x02C00	e1000_hw.h	RX Small Packet Detect - RW
15588	E1000_RAID	0x02C08	e1000_hw.h	Receive Ack Interrupt Delay - RW
15589	E1000_TXDMAC	0x03000	e1000_hw.h	TX DMA Control - RW
15590	E1000_KABGTXD	0x03004	e1000_hw.h	AFE Band Gap Transmit Ref Data
15591	E1000_TDFH	0x03410	e1000_hw.h	TX Data FIFO Head - RW
15592	E1000_TDFT	0x03418	e1000_hw.h	TX Data FIFO Tail - RW
15593	E1000_TDFHS	0x03420	e1000_hw.h	TX Data FIFO Head Saved - RW
15594	E1000_TDFTS	0x03428	e1000_hw.h	TX Data FIFO Tail Saved - RW
15595	E1000_TDFPC	0x03430	e1000_hw.h	TX Data FIFO Packet Count - RW
15596	E1000_TDBAL	0x03800	e1000_hw.h	TX Descriptor Base Address Low - RW
15597	E1000_TDBAH	0x03804	e1000_hw.h	TX Descriptor Base Address High - RW
15598	E1000_TDLEN	0x03808	e1000_hw.h	TX Descriptor Length - RW
15599	E1000_TDH	0x03810	e1000_hw.h	TX Descriptor Head - RW
15600	E1000_TDT	0x03818	e1000_hw.h	TX Descripotr Tail - RW
15601	E1000_TIDV	0x03820	e1000_hw.h	TX Interrupt Delay Value - RW
15602	E1000_TXDCTL	0x03828	e1000_hw.h	TX Descriptor Control - RW
15603	E1000_TADV	0x0382C	e1000_hw.h	TX Interrupt Absolute Delay Val - RW
15604	E1000_TSPMT	0x03830	e1000_hw.h	TCP Segmentation PAD & Min Threshold - RW
15605	E1000_TARC0	0x03840	e1000_hw.h	TX Arbitration Count (0)
15606	E1000_TDBAL1	0x03900	e1000_hw.h	TX Desc Base Address Low (1) - RW
15607	E1000_TDBAH1	0x03904	e1000_hw.h	TX Desc Base Address High (1) - RW
15608	E1000_TDLEN1	0x03908	e1000_hw.h	TX Desc Length (1) - RW
15609	E1000_TDH1	0x03910	e1000_hw.h	TX Desc Head (1) - RW
15610	E1000_TDT1	0x03918	e1000_hw.h	TX Desc Tail (1) - RW
15611	E1000_TXDCTL1	0x03928	e1000_hw.h	TX Descriptor Control (1) - RW
15612	E1000_TARC1	0x03940	e1000_hw.h	TX Arbitration Count (1)
15613	E1000_CRCERRS	0x04000	e1000_hw.h	CRC Error Count - R/clr
15614	E1000_ALGNERRC	0x04004	e1000_hw.h	Alignment Error Count - R/clr
15615	E1000_SYMERRS	0x04008	e1000_hw.h	Symbol Error Count - R/clr
15616	E1000_RXERRC	0x0400C	e1000_hw.h	Receive Error Count - R/clr
15617	E1000_MPC	0x04010	e1000_hw.h	Missed Packet Count - R/clr
15618	E1000_SCC	0x04014	e1000_hw.h	Single Collision Count - R/clr
15619	E1000_ECOL	0x04018	e1000_hw.h	Excessive Collision Count - R/clr
15620	E1000_MCC	0x0401C	e1000_hw.h	Multiple Collision Count - R/clr
15621	E1000_LATECOL	0x04020	e1000_hw.h	Late Collision Count - R/clr
15622	E1000_COLC	0x04028	e1000_hw.h	Collision Count - R/clr
15623	E1000_DC	0x04030	e1000_hw.h	Defer Count - R/clr
15624	E1000_TNCRS	0x04034	e1000_hw.h	TX-No CRS - R/clr
15625	E1000_SEC	0x04038	e1000_hw.h	Sequence Error Count - R/clr
15626	E1000_CEXTERR	0x0403C	e1000_hw.h	Carrier Extension Error Count - R/clr
15627	E1000_RLEC	0x04040	e1000_hw.h	Receive Length Error Count - R/clr
15628	E1000_XONRXC	0x04048	e1000_hw.h	XON RX Count - R/clr
15629	E1000_XONTXC	0x0404C	e1000_hw.h	XON TX Count - R/clr
15630	E1000_XOFFRXC	0x04050	e1000_hw.h	XOFF RX Count - R/clr
15631	E1000_XOFFTXC	0x04054	e1000_hw.h	XOFF TX Count - R/clr
15632	E1000_FCRUC	0x04058	e1000_hw.h	Flow Control RX Unsupported Count- R/clr
15633	E1000_PRC64	0x0405C	e1000_hw.h	Packets RX (64 bytes) - R/clr
15634	E1000_PRC127	0x04060	e1000_hw.h	Packets RX (65-127 bytes) - R/clr
15635	E1000_PRC255	0x04064	e1000_hw.h	Packets RX (128-255 bytes) - R/clr
15636	E1000_PRC511	0x04068	e1000_hw.h	Packets RX (255-511 bytes) - R/clr
15637	E1000_PRC1023	0x0406C	e1000_hw.h	Packets RX (512-1023 bytes) - R/clr
15638	E1000_PRC1522	0x04070	e1000_hw.h	Packets RX (1024-1522 bytes) - R/clr
15639	E1000_GPRC	0x04074	e1000_hw.h	Good Packets RX Count - R/clr
15640	E1000_BPRC	0x04078	e1000_hw.h	Broadcast Packets RX Count - R/clr
15641	E1000_MPRC	0x0407C	e1000_hw.h	Multicast Packets RX Count - R/clr
15642	E1000_GPTC	0x04080	e1000_hw.h	Good Packets TX Count - R/clr
15643	E1000_GORCL	0x04088	e1000_hw.h	Good Octets RX Count Low - R/clr
15644	E1000_GORCH	0x0408C	e1000_hw.h	Good Octets RX Count High - R/clr
15645	E1000_GOTCL	0x04090	e1000_hw.h	Good Octets TX Count Low - R/clr
15646	E1000_GOTCH	0x04094	e1000_hw.h	Good Octets TX Count High - R/clr
15647	E1000_RNBC	0x040A0	e1000_hw.h	RX No Buffers Count - R/clr
15648	E1000_RUC	0x040A4	e1000_hw.h	RX Undersize Count - R/clr
15649	E1000_RFC	0x040A8	e1000_hw.h	RX Fragment Count - R/clr
15650	E1000_ROC	0x040AC	e1000_hw.h	RX Oversize Count - R/clr
15651	E1000_RJC	0x040B0	e1000_hw.h	RX Jabber Count - R/clr
15652	E1000_MGTPRC	0x040B4	e1000_hw.h	Management Packets RX Count - R/clr
15653	E1000_MGTPDC	0x040B8	e1000_hw.h	Management Packets Dropped Count - R/clr
15654	E1000_MGTPTC	0x040BC	e1000_hw.h	Management Packets TX Count - R/clr
15655	E1000_TORL	0x040C0	e1000_hw.h	Total Octets RX Low - R/clr
15656	E1000_TORH	0x040C4	e1000_hw.h	Total Octets RX High - R/clr
15657	E1000_TOTL	0x040C8	e1000_hw.h	Total Octets TX Low - R/clr
15658	E1000_TOTH	0x040CC	e1000_hw.h	Total Octets TX High - R/clr
15659	E1000_TPR	0x040D0	e1000_hw.h	Total Packets RX - R/clr
15660	E1000_TPT	0x040D4	e1000_hw.h	Total Packets TX - R/clr
15661	E1000_PTC64	0x040D8	e1000_hw.h	Packets TX (64 bytes) - R/clr
15662	E1000_PTC127	0x040DC	e1000_hw.h	Packets TX (65-127 bytes) - R/clr
15663	E1000_PTC255	0x040E0	e1000_hw.h	Packets TX (128-255 bytes) - R/clr
15664	E1000_PTC511	0x040E4	e1000_hw.h	Packets TX (256-511 bytes) - R/clr
15665	E1000_PTC1023	0x040E8	e1000_hw.h	Packets TX (512-1023 bytes) - R/clr
15666	E1000_PTC1522	0x040EC	e1000_hw.h	Packets TX (1024-1522 Bytes) - R/clr
15667	E1000_MPTC	0x040F0	e1000_hw.h	Multicast Packets TX Count - R/clr
15668	E1000_BPTC	0x040F4	e1000_hw.h	Broadcast Packets TX Count - R/clr
15669	E1000_TSCTC	0x040F8	e1000_hw.h	TCP Segmentation Context TX - R/clr
15670	E1000_TSCTFC	0x040FC	e1000_hw.h	TCP Segmentation Context TX Fail - R/clr
15671	E1000_IAC	0x04100	e1000_hw.h	Interrupt Assertion Count
15672	E1000_ICRXPTC	0x04104	e1000_hw.h	Interrupt Cause Rx Packet Timer Expire Count
15673	E1000_ICRXATC	0x04108	e1000_hw.h	Interrupt Cause Rx Absolute Timer Expire Count
15674	E1000_ICTXPTC	0x0410C	e1000_hw.h	Interrupt Cause Tx Packet Timer Expire Count
15675	E1000_ICTXATC	0x04110	e1000_hw.h	Interrupt Cause Tx Absolute Timer Expire Count
15676	E1000_ICTXQEC	0x04118	e1000_hw.h	Interrupt Cause Tx Queue Empty Count
15677	E1000_ICTXQMTC	0x0411C	e1000_hw.h	Interrupt Cause Tx Queue Minimum Threshold Count
15678	E1000_ICRXDMTC	0x04120	e1000_hw.h	Interrupt Cause Rx Descriptor Minimum Threshold Count
15679	E1000_ICRXOC	0x04124	e1000_hw.h	Interrupt Cause Receiver Overrun Count
15680	E1000_RXCSUM	0x05000	e1000_hw.h	RX Checksum Control - RW
15681	E1000_RFCTL	0x05008	e1000_hw.h	Receive Filter Control
15682	E1000_MTA	0x05200	e1000_hw.h	Multicast Table Array - RW Array
15683	E1000_RA	0x05400	e1000_hw.h	Receive Address - RW Array
15684	E1000_VFTA	0x05600	e1000_hw.h	VLAN Filter Table Array - RW Array
15685	E1000_WUC	0x05800	e1000_hw.h	Wakeup Control - RW
15686	E1000_WUFC	0x05808	e1000_hw.h	Wakeup Filter Control - RW
15687	E1000_WUS	0x05810	e1000_hw.h	Wakeup Status - RO
15688	E1000_MANC	0x05820	e1000_hw.h	Management Control - RW
15689	E1000_IPAV	0x05838	e1000_hw.h	IP Address Valid - RW
15690	E1000_IP4AT	0x05840	e1000_hw.h	IPv4 Address Table - RW Array
15691	E1000_IP6AT	0x05880	e1000_hw.h	IPv6 Address Table - RW Array
15692	E1000_WUPL	0x05900	e1000_hw.h	Wakeup Packet Length - RW
15693	E1000_WUPM	0x05A00	e1000_hw.h	Wakeup Packet Memory - RO A
15694	E1000_FFLT	0x05F00	e1000_hw.h	Flexible Filter Length Table - RW Array
15695	E1000_HOST_IF	0x08800	e1000_hw.h	Host Interface
15696	E1000_FFMT	0x09000	e1000_hw.h	Flexible Filter Mask Table - RW Array
15697	E1000_FFVT	0x09800	e1000_hw.h	Flexible Filter Value Table - RW Array
15698	E1000_KUMCTRLSTA	0x00034	e1000_hw.h	MAC-PHY interface - RW
15699	E1000_MDPHYA	0x0003C	e1000_hw.h	PHY address - RW
15700	E1000_MANC2H	0x05860	e1000_hw.h	Managment Control To Host - RW
15701	E1000_SW_FW_SYNC	0x05B5C	e1000_hw.h	Software-Firmware Synchronization - RW
15702	E1000_GCR	0x05B00	e1000_hw.h	PCI-Ex Control
15703	E1000_GSCL_1	0x05B10	e1000_hw.h	PCI-Ex Statistic Control #1
15704	E1000_GSCL_2	0x05B14	e1000_hw.h	PCI-Ex Statistic Control #2
15705	E1000_GSCL_3	0x05B18	e1000_hw.h	PCI-Ex Statistic Control #3
15706	E1000_GSCL_4	0x05B1C	e1000_hw.h	PCI-Ex Statistic Control #4
15707	E1000_FACTPS	0x05B30	e1000_hw.h	Function Active and Power State to MNG
15708	E1000_SWSM	0x05B50	e1000_hw.h	SW Semaphore
15709	E1000_FWSM	0x05B54	e1000_hw.h	FW Semaphore
15710	E1000_FFLT_DBG	0x05F04	e1000_hw.h	Debug Register
15711	E1000_HICR	0x08F00	e1000_hw.h	Host Inteface Control
15712	E1000_CPUVEC	0x02C10	e1000_hw.h	CPU Vector Register - RW
15713	E1000_MRQC	0x05818	e1000_hw.h	Multiple Receive Control - RW
15714	E1000_RETA	0x05C00	e1000_hw.h	Redirection Table - RW Array
15715	E1000_RSSRK	0x05C80	e1000_hw.h	RSS Random Key - RW Array
15716	E1000_RSSIM	0x05864	e1000_hw.h	RSS Interrupt Mask
15717	E1000_RSSIR	0x05868	e1000_hw.h	RSS Interrupt Request
15718	E1000_82542_CTRL	E1000_CTRL	e1000_hw.h
15719	E1000_82542_CTRL_DUP	E1000_CTRL_DUP	e1000_hw.h
15720	E1000_82542_STATUS	E1000_STATUS	e1000_hw.h
15721	E1000_82542_EECD	E1000_EECD	e1000_hw.h
15722	E1000_82542_EERD	E1000_EERD	e1000_hw.h
15723	E1000_82542_CTRL_EXT	E1000_CTRL_EXT	e1000_hw.h
15724	E1000_82542_FLA	E1000_FLA	e1000_hw.h
15725	E1000_82542_MDIC	E1000_MDIC	e1000_hw.h
15726	E1000_82542_SCTL	E1000_SCTL	e1000_hw.h
15727	E1000_82542_FEXTNVM	E1000_FEXTNVM	e1000_hw.h
15728	E1000_82542_FCAL	E1000_FCAL	e1000_hw.h
15729	E1000_82542_FCAH	E1000_FCAH	e1000_hw.h
15730	E1000_82542_FCT	E1000_FCT	e1000_hw.h
15731	E1000_82542_VET	E1000_VET	e1000_hw.h
15732	E1000_82542_RA	0x00040	e1000_hw.h
15733	E1000_82542_ICR	E1000_ICR	e1000_hw.h
15734	E1000_82542_ITR	E1000_ITR	e1000_hw.h
15735	E1000_82542_ICS	E1000_ICS	e1000_hw.h
15736	E1000_82542_IMS	E1000_IMS	e1000_hw.h
15737	E1000_82542_IMC	E1000_IMC	e1000_hw.h
15738	E1000_82542_RCTL	E1000_RCTL	e1000_hw.h
15739	E1000_82542_RDTR	0x00108	e1000_hw.h
15740	E1000_82542_RDBAL	0x00110	e1000_hw.h
15741	E1000_82542_RDBAH	0x00114	e1000_hw.h
15742	E1000_82542_RDLEN	0x00118	e1000_hw.h
15743	E1000_82542_RDH	0x00120	e1000_hw.h
15744	E1000_82542_RDT	0x00128	e1000_hw.h
15745	E1000_82542_RDTR0	E1000_82542_RDTR	e1000_hw.h
15746	E1000_82542_RDBAL0	E1000_82542_RDBAL	e1000_hw.h
15747	E1000_82542_RDBAH0	E1000_82542_RDBAH	e1000_hw.h
15748	E1000_82542_RDLEN0	E1000_82542_RDLEN	e1000_hw.h
15749	E1000_82542_RDH0	E1000_82542_RDH	e1000_hw.h
15750	E1000_82542_RDT0	E1000_82542_RDT	e1000_hw.h
15751	E1000_82542_RDBAH3	0x02B04	e1000_hw.h	RX Desc Base High Queue 3 - RW
15752	E1000_82542_RDBAL3	0x02B00	e1000_hw.h	RX Desc Low Queue 3 - RW
15753	E1000_82542_RDLEN3	0x02B08	e1000_hw.h	RX Desc Length Queue 3 - RW
15754	E1000_82542_RDH3	0x02B10	e1000_hw.h	RX Desc Head Queue 3 - RW
15755	E1000_82542_RDT3	0x02B18	e1000_hw.h	RX Desc Tail Queue 3 - RW
15756	E1000_82542_RDBAL2	0x02A00	e1000_hw.h	RX Desc Base Low Queue 2 - RW
15757	E1000_82542_RDBAH2	0x02A04	e1000_hw.h	RX Desc Base High Queue 2 - RW
15758	E1000_82542_RDLEN2	0x02A08	e1000_hw.h	RX Desc Length Queue 2 - RW
15759	E1000_82542_RDH2	0x02A10	e1000_hw.h	RX Desc Head Queue 2 - RW
15760	E1000_82542_RDT2	0x02A18	e1000_hw.h	RX Desc Tail Queue 2 - RW
15761	E1000_82542_RDTR1	0x00130	e1000_hw.h
15762	E1000_82542_RDBAL1	0x00138	e1000_hw.h
15763	E1000_82542_RDBAH1	0x0013C	e1000_hw.h
15764	E1000_82542_RDLEN1	0x00140	e1000_hw.h
15765	E1000_82542_RDH1	0x00148	e1000_hw.h
15766	E1000_82542_RDT1	0x00150	e1000_hw.h
15767	E1000_82542_FCRTH	0x00160	e1000_hw.h
15768	E1000_82542_FCRTL	0x00168	e1000_hw.h
15769	E1000_82542_FCTTV	E1000_FCTTV	e1000_hw.h
15770	E1000_82542_TXCW	E1000_TXCW	e1000_hw.h
15771	E1000_82542_RXCW	E1000_RXCW	e1000_hw.h
15772	E1000_82542_MTA	0x00200	e1000_hw.h
15773	E1000_82542_TCTL	E1000_TCTL	e1000_hw.h
15774	E1000_82542_TCTL_EXT	E1000_TCTL_EXT	e1000_hw.h
15775	E1000_82542_TIPG	E1000_TIPG	e1000_hw.h
15776	E1000_82542_TDBAL	0x00420	e1000_hw.h
15777	E1000_82542_TDBAH	0x00424	e1000_hw.h
15778	E1000_82542_TDLEN	0x00428	e1000_hw.h
15779	E1000_82542_TDH	0x00430	e1000_hw.h
15780	E1000_82542_TDT	0x00438	e1000_hw.h
15781	E1000_82542_TIDV	0x00440	e1000_hw.h
15782	E1000_82542_TBT	E1000_TBT	e1000_hw.h
15783	E1000_82542_AIT	E1000_AIT	e1000_hw.h
15784	E1000_82542_VFTA	0x00600	e1000_hw.h
15785	E1000_82542_LEDCTL	E1000_LEDCTL	e1000_hw.h
15786	E1000_82542_PBA	E1000_PBA	e1000_hw.h
15787	E1000_82542_PBS	E1000_PBS	e1000_hw.h
15788	E1000_82542_EEMNGCTL	E1000_EEMNGCTL	e1000_hw.h
15789	E1000_82542_EEARBC	E1000_EEARBC	e1000_hw.h
15790	E1000_82542_FLASHT	E1000_FLASHT	e1000_hw.h
15791	E1000_82542_EEWR	E1000_EEWR	e1000_hw.h
15792	E1000_82542_FLSWCTL	E1000_FLSWCTL	e1000_hw.h
15793	E1000_82542_FLSWDATA	E1000_FLSWDATA	e1000_hw.h
15794	E1000_82542_FLSWCNT	E1000_FLSWCNT	e1000_hw.h
15795	E1000_82542_FLOP	E1000_FLOP	e1000_hw.h
15796	E1000_82542_EXTCNF_CTRL	E1000_EXTCNF_CTRL	e1000_hw.h
15797	E1000_82542_EXTCNF_SIZE	E1000_EXTCNF_SIZE	e1000_hw.h
15798	E1000_82542_PHY_CTRL	E1000_PHY_CTRL	e1000_hw.h
15799	E1000_82542_ERT	E1000_ERT	e1000_hw.h
15800	E1000_82542_RXDCTL	E1000_RXDCTL	e1000_hw.h
15801	E1000_82542_RXDCTL1	E1000_RXDCTL1	e1000_hw.h
15802	E1000_82542_RADV	E1000_RADV	e1000_hw.h
15803	E1000_82542_RSRPD	E1000_RSRPD	e1000_hw.h
15804	E1000_82542_TXDMAC	E1000_TXDMAC	e1000_hw.h
15805	E1000_82542_KABGTXD	E1000_KABGTXD	e1000_hw.h
15806	E1000_82542_TDFHS	E1000_TDFHS	e1000_hw.h
15807	E1000_82542_TDFTS	E1000_TDFTS	e1000_hw.h
15808	E1000_82542_TDFPC	E1000_TDFPC	e1000_hw.h
15809	E1000_82542_TXDCTL	E1000_TXDCTL	e1000_hw.h
15810	E1000_82542_TADV	E1000_TADV	e1000_hw.h
15811	E1000_82542_TSPMT	E1000_TSPMT	e1000_hw.h
15812	E1000_82542_CRCERRS	E1000_CRCERRS	e1000_hw.h
15813	E1000_82542_ALGNERRC	E1000_ALGNERRC	e1000_hw.h
15814	E1000_82542_SYMERRS	E1000_SYMERRS	e1000_hw.h
15815	E1000_82542_RXERRC	E1000_RXERRC	e1000_hw.h
15816	E1000_82542_MPC	E1000_MPC	e1000_hw.h
15817	E1000_82542_SCC	E1000_SCC	e1000_hw.h
15818	E1000_82542_ECOL	E1000_ECOL	e1000_hw.h
15819	E1000_82542_MCC	E1000_MCC	e1000_hw.h
15820	E1000_82542_LATECOL	E1000_LATECOL	e1000_hw.h
15821	E1000_82542_COLC	E1000_COLC	e1000_hw.h
15822	E1000_82542_DC	E1000_DC	e1000_hw.h
15823	E1000_82542_TNCRS	E1000_TNCRS	e1000_hw.h
15824	E1000_82542_SEC	E1000_SEC	e1000_hw.h
15825	E1000_82542_CEXTERR	E1000_CEXTERR	e1000_hw.h
15826	E1000_82542_RLEC	E1000_RLEC	e1000_hw.h
15827	E1000_82542_XONRXC	E1000_XONRXC	e1000_hw.h
15828	E1000_82542_XONTXC	E1000_XONTXC	e1000_hw.h
15829	E1000_82542_XOFFRXC	E1000_XOFFRXC	e1000_hw.h
15830	E1000_82542_XOFFTXC	E1000_XOFFTXC	e1000_hw.h
15831	E1000_82542_FCRUC	E1000_FCRUC	e1000_hw.h
15832	E1000_82542_PRC64	E1000_PRC64	e1000_hw.h
15833	E1000_82542_PRC127	E1000_PRC127	e1000_hw.h
15834	E1000_82542_PRC255	E1000_PRC255	e1000_hw.h
15835	E1000_82542_PRC511	E1000_PRC511	e1000_hw.h
15836	E1000_82542_PRC1023	E1000_PRC1023	e1000_hw.h
15837	E1000_82542_PRC1522	E1000_PRC1522	e1000_hw.h
15838	E1000_82542_GPRC	E1000_GPRC	e1000_hw.h
15839	E1000_82542_BPRC	E1000_BPRC	e1000_hw.h
15840	E1000_82542_MPRC	E1000_MPRC	e1000_hw.h
15841	E1000_82542_GPTC	E1000_GPTC	e1000_hw.h
15842	E1000_82542_GORCL	E1000_GORCL	e1000_hw.h
15843	E1000_82542_GORCH	E1000_GORCH	e1000_hw.h
15844	E1000_82542_GOTCL	E1000_GOTCL	e1000_hw.h
15845	E1000_82542_GOTCH	E1000_GOTCH	e1000_hw.h
15846	E1000_82542_RNBC	E1000_RNBC	e1000_hw.h
15847	E1000_82542_RUC	E1000_RUC	e1000_hw.h
15848	E1000_82542_RFC	E1000_RFC	e1000_hw.h
15849	E1000_82542_ROC	E1000_ROC	e1000_hw.h
15850	E1000_82542_RJC	E1000_RJC	e1000_hw.h
15851	E1000_82542_MGTPRC	E1000_MGTPRC	e1000_hw.h
15852	E1000_82542_MGTPDC	E1000_MGTPDC	e1000_hw.h
15853	E1000_82542_MGTPTC	E1000_MGTPTC	e1000_hw.h
15854	E1000_82542_TORL	E1000_TORL	e1000_hw.h
15855	E1000_82542_TORH	E1000_TORH	e1000_hw.h
15856	E1000_82542_TOTL	E1000_TOTL	e1000_hw.h
15857	E1000_82542_TOTH	E1000_TOTH	e1000_hw.h
15858	E1000_82542_TPR	E1000_TPR	e1000_hw.h
15859	E1000_82542_TPT	E1000_TPT	e1000_hw.h
15860	E1000_82542_PTC64	E1000_PTC64	e1000_hw.h
15861	E1000_82542_PTC127	E1000_PTC127	e1000_hw.h
15862	E1000_82542_PTC255	E1000_PTC255	e1000_hw.h
15863	E1000_82542_PTC511	E1000_PTC511	e1000_hw.h
15864	E1000_82542_PTC1023	E1000_PTC1023	e1000_hw.h
15865	E1000_82542_PTC1522	E1000_PTC1522	e1000_hw.h
15866	E1000_82542_MPTC	E1000_MPTC	e1000_hw.h
15867	E1000_82542_BPTC	E1000_BPTC	e1000_hw.h
15868	E1000_82542_TSCTC	E1000_TSCTC	e1000_hw.h
15869	E1000_82542_TSCTFC	E1000_TSCTFC	e1000_hw.h
15870	E1000_82542_RXCSUM	E1000_RXCSUM	e1000_hw.h
15871	E1000_82542_WUC	E1000_WUC	e1000_hw.h
15872	E1000_82542_WUFC	E1000_WUFC	e1000_hw.h
15873	E1000_82542_WUS	E1000_WUS	e1000_hw.h
15874	E1000_82542_MANC	E1000_MANC	e1000_hw.h
15875	E1000_82542_IPAV	E1000_IPAV	e1000_hw.h
15876	E1000_82542_IP4AT	E1000_IP4AT	e1000_hw.h
15877	E1000_82542_IP6AT	E1000_IP6AT	e1000_hw.h
15878	E1000_82542_WUPL	E1000_WUPL	e1000_hw.h
15879	E1000_82542_WUPM	E1000_WUPM	e1000_hw.h
15880	E1000_82542_FFLT	E1000_FFLT	e1000_hw.h
15881	E1000_82542_TDFH	0x08010	e1000_hw.h
15882	E1000_82542_TDFT	0x08018	e1000_hw.h
15883	E1000_82542_FFMT	E1000_FFMT	e1000_hw.h
15884	E1000_82542_FFVT	E1000_FFVT	e1000_hw.h
15885	E1000_82542_HOST_IF	E1000_HOST_IF	e1000_hw.h
15886	E1000_82542_IAM	E1000_IAM	e1000_hw.h
15887	E1000_82542_EEMNGCTL	E1000_EEMNGCTL	e1000_hw.h
15888	E1000_82542_PSRCTL	E1000_PSRCTL	e1000_hw.h
15889	E1000_82542_RAID	E1000_RAID	e1000_hw.h
15890	E1000_82542_TARC0	E1000_TARC0	e1000_hw.h
15891	E1000_82542_TDBAL1	E1000_TDBAL1	e1000_hw.h
15892	E1000_82542_TDBAH1	E1000_TDBAH1	e1000_hw.h
15893	E1000_82542_TDLEN1	E1000_TDLEN1	e1000_hw.h
15894	E1000_82542_TDH1	E1000_TDH1	e1000_hw.h
15895	E1000_82542_TDT1	E1000_TDT1	e1000_hw.h
15896	E1000_82542_TXDCTL1	E1000_TXDCTL1	e1000_hw.h
15897	E1000_82542_TARC1	E1000_TARC1	e1000_hw.h
15898	E1000_82542_RFCTL	E1000_RFCTL	e1000_hw.h
15899	E1000_82542_GCR	E1000_GCR	e1000_hw.h
15900	E1000_82542_GSCL_1	E1000_GSCL_1	e1000_hw.h
15901	E1000_82542_GSCL_2	E1000_GSCL_2	e1000_hw.h
15902	E1000_82542_GSCL_3	E1000_GSCL_3	e1000_hw.h
15903	E1000_82542_GSCL_4	E1000_GSCL_4	e1000_hw.h
15904	E1000_82542_FACTPS	E1000_FACTPS	e1000_hw.h
15905	E1000_82542_SWSM	E1000_SWSM	e1000_hw.h
15906	E1000_82542_FWSM	E1000_FWSM	e1000_hw.h
15907	E1000_82542_FFLT_DBG	E1000_FFLT_DBG	e1000_hw.h
15908	E1000_82542_IAC	E1000_IAC	e1000_hw.h
15909	E1000_82542_ICRXPTC	E1000_ICRXPTC	e1000_hw.h
15910	E1000_82542_ICRXATC	E1000_ICRXATC	e1000_hw.h
15911	E1000_82542_ICTXPTC	E1000_ICTXPTC	e1000_hw.h
15912	E1000_82542_ICTXATC	E1000_ICTXATC	e1000_hw.h
15913	E1000_82542_ICTXQEC	E1000_ICTXQEC	e1000_hw.h
15914	E1000_82542_ICTXQMTC	E1000_ICTXQMTC	e1000_hw.h
15915	E1000_82542_ICRXDMTC	E1000_ICRXDMTC	e1000_hw.h
15916	E1000_82542_ICRXOC	E1000_ICRXOC	e1000_hw.h
15917	E1000_82542_HICR	E1000_HICR	e1000_hw.h
15918	E1000_82542_CPUVEC	E1000_CPUVEC	e1000_hw.h
15919	E1000_82542_MRQC	E1000_MRQC	e1000_hw.h
15920	E1000_82542_RETA	E1000_RETA	e1000_hw.h
15921	E1000_82542_RSSRK	E1000_RSSRK	e1000_hw.h
15922	E1000_82542_RSSIM	E1000_RSSIM	e1000_hw.h
15923	E1000_82542_RSSIR	E1000_RSSIR	e1000_hw.h
15924	E1000_82542_KUMCTRLSTA	E1000_KUMCTRLSTA	e1000_hw.h
15925	E1000_82542_SW_FW_SYNC	E1000_SW_FW_SYNC	e1000_hw.h
15926	E1000_82542_MANC2H	E1000_MANC2H	e1000_hw.h
15927	E1000_EEPROM_SWDPIN0	0x0001	e1000_hw.h	SWDPIN 0 EEPROM Value
15928	E1000_EEPROM_LED_LOGIC	0x0020	e1000_hw.h	Led Logic Word
15929	E1000_EEPROM_RW_REG_DATA	16	e1000_hw.h	Offset to data in EEPROM read/write registers
15930	E1000_EEPROM_RW_REG_DONE	2	e1000_hw.h	Offset to READ/WRITE done bit
15931	E1000_EEPROM_RW_REG_START	1	e1000_hw.h	First bit for telling part to start operation
15932	E1000_EEPROM_RW_ADDR_SHIFT	2	e1000_hw.h	Shift to the address bits
15933	E1000_EEPROM_POLL_WRITE	1	e1000_hw.h	Flag for polling for write complete
15934	E1000_EEPROM_POLL_READ	0	e1000_hw.h	Flag for polling for read complete
15935	E1000_CTRL_FD	0x00000001	e1000_hw.h	Full duplex.0=half; 1=full
15936	E1000_CTRL_BEM	0x00000002	e1000_hw.h	Endian Mode.0=little,1=big
15937	E1000_CTRL_PRIOR	0x00000004	e1000_hw.h	Priority on PCI. 0=rx,1=fair
15938	E1000_CTRL_GIO_MASTER_DISABLE	0x00000004	e1000_hw.h	Blocks new Master requests
15939	E1000_CTRL_LRST	0x00000008	e1000_hw.h	Link reset. 0=normal,1=reset
15940	E1000_CTRL_TME	0x00000010	e1000_hw.h	Test mode. 0=normal,1=test
15941	E1000_CTRL_SLE	0x00000020	e1000_hw.h	Serial Link on 0=dis,1=en
15942	E1000_CTRL_ASDE	0x00000020	e1000_hw.h	Auto-speed detect enable
15943	E1000_CTRL_SLU	0x00000040	e1000_hw.h	Set link up (Force Link)
15944	E1000_CTRL_ILOS	0x00000080	e1000_hw.h	Invert Loss-Of Signal
15945	E1000_CTRL_SPD_SEL	0x00000300	e1000_hw.h	Speed Select Mask
15946	E1000_CTRL_SPD_10	0x00000000	e1000_hw.h	Force 10Mb
15947	E1000_CTRL_SPD_100	0x00000100	e1000_hw.h	Force 100Mb
15948	E1000_CTRL_SPD_1000	0x00000200	e1000_hw.h	Force 1Gb
15949	E1000_CTRL_BEM32	0x00000400	e1000_hw.h	Big Endian 32 mode
15950	E1000_CTRL_FRCSPD	0x00000800	e1000_hw.h	Force Speed
15951	E1000_CTRL_FRCDPX	0x00001000	e1000_hw.h	Force Duplex
15952	E1000_CTRL_D_UD_EN	0x00002000	e1000_hw.h	Dock/Undock enable
15953	E1000_CTRL_D_UD_POLARITY	0x00004000	e1000_hw.h	Defined polarity of Dock/Undock indication in SDP[0]
15954	E1000_CTRL_FORCE_PHY_RESET	0x00008000	e1000_hw.h	Reset both PHY ports, through PHYRST_N pin
15955	E1000_CTRL_EXT_LINK_EN	0x00010000	e1000_hw.h	enable link status from external LINK_0 and LINK_1 pins
15956	E1000_CTRL_SWDPIN0	0x00040000	e1000_hw.h	SWDPIN 0 value
15957	E1000_CTRL_SWDPIN1	0x00080000	e1000_hw.h	SWDPIN 1 value
15958	E1000_CTRL_SWDPIN2	0x00100000	e1000_hw.h	SWDPIN 2 value
15959	E1000_CTRL_SWDPIN3	0x00200000	e1000_hw.h	SWDPIN 3 value
15960	E1000_CTRL_SWDPIO0	0x00400000	e1000_hw.h	SWDPIN 0 Input or output
15961	E1000_CTRL_SWDPIO1	0x00800000	e1000_hw.h	SWDPIN 1 input or output
15962	E1000_CTRL_SWDPIO2	0x01000000	e1000_hw.h	SWDPIN 2 input or output
15963	E1000_CTRL_SWDPIO3	0x02000000	e1000_hw.h	SWDPIN 3 input or output
15964	E1000_CTRL_RST	0x04000000	e1000_hw.h	Global reset
15965	E1000_CTRL_RFCE	0x08000000	e1000_hw.h	Receive Flow Control enable
15966	E1000_CTRL_TFCE	0x10000000	e1000_hw.h	Transmit flow control enable
15967	E1000_CTRL_RTE	0x20000000	e1000_hw.h	Routing tag enable
15968	E1000_CTRL_VME	0x40000000	e1000_hw.h	IEEE VLAN mode enable
15969	E1000_CTRL_PHY_RST	0x80000000	e1000_hw.h	PHY Reset
15970	E1000_CTRL_SW2FW_INT	0x02000000	e1000_hw.h	Initiate an interrupt to manageability engine
15971	E1000_STATUS_FD	0x00000001	e1000_hw.h	Full duplex.0=half,1=full
15972	E1000_STATUS_LU	0x00000002	e1000_hw.h	Link up.0=no,1=link
15973	E1000_STATUS_FUNC_MASK	0x0000000C	e1000_hw.h	PCI Function Mask
15974	E1000_STATUS_FUNC_SHIFT	2	e1000_hw.h
15975	E1000_STATUS_FUNC_0	0x00000000	e1000_hw.h	Function 0
15976	E1000_STATUS_FUNC_1	0x00000004	e1000_hw.h	Function 1
15977	E1000_STATUS_TXOFF	0x00000010	e1000_hw.h	transmission paused
15978	E1000_STATUS_TBIMODE	0x00000020	e1000_hw.h	TBI mode
15979	E1000_STATUS_SPEED_MASK	0x000000C0	e1000_hw.h
15980	E1000_STATUS_SPEED_10	0x00000000	e1000_hw.h	Speed 10Mb/s
15981	E1000_STATUS_SPEED_100	0x00000040	e1000_hw.h	Speed 100Mb/s
15982	E1000_STATUS_SPEED_1000	0x00000080	e1000_hw.h	Speed 1000Mb/s
15983	E1000_STATUS_LAN_INIT_DONE	0x00000200	e1000_hw.h	Lan Init Completion
15984	E1000_STATUS_ASDV	0x00000300	e1000_hw.h	Auto speed detect value
15985	E1000_STATUS_DOCK_CI	0x00000800	e1000_hw.h	Change in Dock/Undock state. Clear on write '0'.
15986	E1000_STATUS_GIO_MASTER_ENABLE	0x00080000	e1000_hw.h	Status of Master requests.
15987	E1000_STATUS_MTXCKOK	0x00000400	e1000_hw.h	MTX clock running OK
15988	E1000_STATUS_PCI66	0x00000800	e1000_hw.h	In 66Mhz slot
15989	E1000_STATUS_BUS64	0x00001000	e1000_hw.h	In 64 bit slot
15990	E1000_STATUS_PCIX_MODE	0x00002000	e1000_hw.h	PCI-X mode
15991	E1000_STATUS_PCIX_SPEED	0x0000C000	e1000_hw.h	PCI-X bus speed
15992	E1000_STATUS_BMC_SKU_0	0x00100000	e1000_hw.h	BMC USB redirect disabled
15993	E1000_STATUS_BMC_SKU_1	0x00200000	e1000_hw.h	BMC SRAM disabled
15994	E1000_STATUS_BMC_SKU_2	0x00400000	e1000_hw.h	BMC SDRAM disabled
15995	E1000_STATUS_BMC_CRYPTO	0x00800000	e1000_hw.h	BMC crypto disabled
15996	E1000_STATUS_BMC_LITE	0x01000000	e1000_hw.h	BMC external code execution disabled
15997	E1000_STATUS_RGMII_ENABLE	0x02000000	e1000_hw.h	RGMII disabled
15998	E1000_STATUS_FUSE_8	0x04000000	e1000_hw.h
15999	E1000_STATUS_FUSE_9	0x08000000	e1000_hw.h
16000	E1000_STATUS_SERDES0_DIS	0x10000000	e1000_hw.h	SERDES disabled on port 0
16001	E1000_STATUS_SERDES1_DIS	0x20000000	e1000_hw.h	SERDES disabled on port 1
16002	E1000_STATUS_PCIX_SPEED_66	0x00000000	e1000_hw.h	PCI-X bus speed 50-66 MHz
16003	E1000_STATUS_PCIX_SPEED_100	0x00004000	e1000_hw.h	PCI-X bus speed 66-100 MHz
16004	E1000_STATUS_PCIX_SPEED_133	0x00008000	e1000_hw.h	PCI-X bus speed 100-133 MHz
16005	E1000_EECD_SK	0x00000001	e1000_hw.h	EEPROM Clock
16006	E1000_EECD_CS	0x00000002	e1000_hw.h	EEPROM Chip Select
16007	E1000_EECD_DI	0x00000004	e1000_hw.h	EEPROM Data In
16008	E1000_EECD_DO	0x00000008	e1000_hw.h	EEPROM Data Out
16009	E1000_EECD_FWE_MASK	0x00000030	e1000_hw.h
16010	E1000_EECD_FWE_DIS	0x00000010	e1000_hw.h	Disable FLASH writes
16011	E1000_EECD_FWE_EN	0x00000020	e1000_hw.h	Enable FLASH writes
16012	E1000_EECD_FWE_SHIFT	4	e1000_hw.h
16013	E1000_EECD_REQ	0x00000040	e1000_hw.h	EEPROM Access Request
16014	E1000_EECD_GNT	0x00000080	e1000_hw.h	EEPROM Access Grant
16015	E1000_EECD_PRES	0x00000100	e1000_hw.h	EEPROM Present
16016	E1000_EECD_SIZE	0x00000200	e1000_hw.h	EEPROM Size (0=64 word 1=256 word)
16017	E1000_EECD_ADDR_BITS	0x00000400	e1000_hw.h	EEPROM Addressing bits based on type
16018	E1000_EECD_TYPE	0x00002000	e1000_hw.h	EEPROM Type (1-SPI, 0-Microwire)
16019	E1000_EEPROM_GRANT_ATTEMPTS	1000	e1000_hw.h	EEPROM # attempts to gain grant
16020	E1000_EECD_AUTO_RD	0x00000200	e1000_hw.h	EEPROM Auto Read done
16021	E1000_EECD_SIZE_EX_MASK	0x00007800	e1000_hw.h	EEprom Size
16022	E1000_EECD_SIZE_EX_SHIFT	11	e1000_hw.h
16023	E1000_EECD_NVADDS	0x00018000	e1000_hw.h	NVM Address Size
16024	E1000_EECD_SELSHAD	0x00020000	e1000_hw.h	Select Shadow RAM
16025	E1000_EECD_INITSRAM	0x00040000	e1000_hw.h	Initialize Shadow RAM
16026	E1000_EECD_FLUPD	0x00080000	e1000_hw.h	Update FLASH
16027	E1000_EECD_AUPDEN	0x00100000	e1000_hw.h	Enable Autonomous FLASH update
16028	E1000_EECD_SHADV	0x00200000	e1000_hw.h	Shadow RAM Data Valid
16029	E1000_EECD_SEC1VAL	0x00400000	e1000_hw.h	Sector One Valid
16030	E1000_EECD_SECVAL_SHIFT	22	e1000_hw.h
16031	E1000_STM_OPCODE	0xDB00	e1000_hw.h
16032	E1000_HICR_FW_RESET	0xC0	e1000_hw.h
16033	E1000_SHADOW_RAM_WORDS	2048	e1000_hw.h
16034	E1000_ICH_NVM_SIG_WORD	0x13	e1000_hw.h
16035	E1000_ICH_NVM_SIG_MASK	0xC0	e1000_hw.h
16036	E1000_EERD_START	0x00000001	e1000_hw.h	Start Read
16037	E1000_EERD_DONE	0x00000010	e1000_hw.h	Read Done
16038	E1000_EERD_ADDR_SHIFT	8	e1000_hw.h
16039	E1000_EERD_ADDR_MASK	0x0000FF00	e1000_hw.h	Read Address
16040	E1000_EERD_DATA_SHIFT	16	e1000_hw.h
16041	E1000_EERD_DATA_MASK	0xFFFF0000	e1000_hw.h	Read Data
16042	EEPROM_STATUS_RDY_SPI	0x01	e1000_hw.h
16043	EEPROM_STATUS_WEN_SPI	0x02	e1000_hw.h
16044	EEPROM_STATUS_BP0_SPI	0x04	e1000_hw.h
16045	EEPROM_STATUS_BP1_SPI	0x08	e1000_hw.h
16046	EEPROM_STATUS_WPEN_SPI	0x80	e1000_hw.h
16047	E1000_CTRL_EXT_GPI0_EN	0x00000001	e1000_hw.h	Maps SDP4 to GPI0
16048	E1000_CTRL_EXT_GPI1_EN	0x00000002	e1000_hw.h	Maps SDP5 to GPI1
16049	E1000_CTRL_EXT_PHYINT_EN	E1000_CTRL_EXT_GPI1_EN	e1000_hw.h
16050	E1000_CTRL_EXT_GPI2_EN	0x00000004	e1000_hw.h	Maps SDP6 to GPI2
16051	E1000_CTRL_EXT_GPI3_EN	0x00000008	e1000_hw.h	Maps SDP7 to GPI3
16052	E1000_CTRL_EXT_SDP4_DATA	0x00000010	e1000_hw.h	Value of SW Defineable Pin 4
16053	E1000_CTRL_EXT_SDP5_DATA	0x00000020	e1000_hw.h	Value of SW Defineable Pin 5
16054	E1000_CTRL_EXT_PHY_INT	E1000_CTRL_EXT_SDP5_DATA	e1000_hw.h
16055	E1000_CTRL_EXT_SDP6_DATA	0x00000040	e1000_hw.h	Value of SW Defineable Pin 6
16056	E1000_CTRL_EXT_SDP7_DATA	0x00000080	e1000_hw.h	Value of SW Defineable Pin 7
16057	E1000_CTRL_EXT_SDP4_DIR	0x00000100	e1000_hw.h	Direction of SDP4 0=in 1=out
16058	E1000_CTRL_EXT_SDP5_DIR	0x00000200	e1000_hw.h	Direction of SDP5 0=in 1=out
16059	E1000_CTRL_EXT_SDP6_DIR	0x00000400	e1000_hw.h	Direction of SDP6 0=in 1=out
16060	E1000_CTRL_EXT_SDP7_DIR	0x00000800	e1000_hw.h	Direction of SDP7 0=in 1=out
16061	E1000_CTRL_EXT_ASDCHK	0x00001000	e1000_hw.h	Initiate an ASD sequence
16062	E1000_CTRL_EXT_EE_RST	0x00002000	e1000_hw.h	Reinitialize from EEPROM
16063	E1000_CTRL_EXT_IPS	0x00004000	e1000_hw.h	Invert Power State
16064	E1000_CTRL_EXT_SPD_BYPS	0x00008000	e1000_hw.h	Speed Select Bypass
16065	E1000_CTRL_EXT_RO_DIS	0x00020000	e1000_hw.h	Relaxed Ordering disable
16066	E1000_CTRL_EXT_LINK_MODE_MASK	0x00C00000	e1000_hw.h
16067	E1000_CTRL_EXT_LINK_MODE_GMII	0x00000000	e1000_hw.h
16068	E1000_CTRL_EXT_LINK_MODE_TBI	0x00C00000	e1000_hw.h
16069	E1000_CTRL_EXT_LINK_MODE_KMRN	0x00000000	e1000_hw.h
16070	E1000_CTRL_EXT_LINK_MODE_SERDES	0x00C00000	e1000_hw.h
16071	E1000_CTRL_EXT_LINK_MODE_SGMII	0x00800000	e1000_hw.h
16072	E1000_CTRL_EXT_WR_WMARK_MASK	0x03000000	e1000_hw.h
16073	E1000_CTRL_EXT_WR_WMARK_256	0x00000000	e1000_hw.h
16074	E1000_CTRL_EXT_WR_WMARK_320	0x01000000	e1000_hw.h
16075	E1000_CTRL_EXT_WR_WMARK_384	0x02000000	e1000_hw.h
16076	E1000_CTRL_EXT_WR_WMARK_448	0x03000000	e1000_hw.h
16077	E1000_CTRL_EXT_DRV_LOAD	0x10000000	e1000_hw.h	Driver loaded bit for FW
16078	E1000_CTRL_EXT_IAME	0x08000000	e1000_hw.h	Interrupt acknowledge Auto-mask
16079	E1000_CTRL_EXT_INT_TIMER_CLR	0x20000000	e1000_hw.h	Clear Interrupt timers after IMS clear
16080	E1000_CRTL_EXT_PB_PAREN	0x01000000	e1000_hw.h	packet buffer parity error detection enabled
16081	E1000_CTRL_EXT_DF_PAREN	0x02000000	e1000_hw.h	descriptor FIFO parity error detection enable
16082	E1000_CTRL_EXT_GHOST_PAREN	0x40000000	e1000_hw.h
16083	E1000_MDIC_DATA_MASK	0x0000FFFF	e1000_hw.h
16084	E1000_MDIC_REG_MASK	0x001F0000	e1000_hw.h
16085	E1000_MDIC_REG_SHIFT	16	e1000_hw.h
16086	E1000_MDIC_PHY_MASK	0x03E00000	e1000_hw.h
16087	E1000_MDIC_PHY_SHIFT	21	e1000_hw.h
16088	E1000_MDIC_OP_WRITE	0x04000000	e1000_hw.h
16089	E1000_MDIC_OP_READ	0x08000000	e1000_hw.h
16090	E1000_MDIC_READY	0x10000000	e1000_hw.h
16091	E1000_MDIC_INT_EN	0x20000000	e1000_hw.h
16092	E1000_MDIC_ERROR	0x40000000	e1000_hw.h
16093	E1000_KUMCTRLSTA_MASK	0x0000FFFF	e1000_hw.h
16094	E1000_KUMCTRLSTA_OFFSET	0x001F0000	e1000_hw.h
16095	E1000_KUMCTRLSTA_OFFSET_SHIFT	16	e1000_hw.h
16096	E1000_KUMCTRLSTA_REN	0x00200000	e1000_hw.h
16097	E1000_KUMCTRLSTA_OFFSET_FIFO_CT	0x00000000	e1000_hw.h
16098	E1000_KUMCTRLSTA_OFFSET_CTRL	0x00000001	e1000_hw.h
16099	E1000_KUMCTRLSTA_OFFSET_INB_CTR	0x00000002	e1000_hw.h
16100	E1000_KUMCTRLSTA_OFFSET_DIAG	0x00000003	e1000_hw.h
16101	E1000_KUMCTRLSTA_OFFSET_TIMEOUT	0x00000004	e1000_hw.h
16102	E1000_KUMCTRLSTA_OFFSET_INB_PAR	0x00000009	e1000_hw.h
16103	E1000_KUMCTRLSTA_OFFSET_HD_CTRL	0x00000010	e1000_hw.h
16104	E1000_KUMCTRLSTA_OFFSET_M2P_SER	0x0000001E	e1000_hw.h
16105	E1000_KUMCTRLSTA_OFFSET_M2P_MOD	0x0000001F	e1000_hw.h
16106	E1000_KUMCTRLSTA_FIFO_CTRL_RX_B	0x00000008	e1000_hw.h
16107	E1000_KUMCTRLSTA_FIFO_CTRL_TX_B	0x00000800	e1000_hw.h
16108	E1000_KUMCTRLSTA_INB_CTRL_LINK_	0x00000500	e1000_hw.h
16109	E1000_KUMCTRLSTA_INB_CTRL_DIS_P	0x00000010	e1000_hw.h
16110	E1000_KUMCTRLSTA_HD_CTRL_10_100	0x00000004	e1000_hw.h
16111	E1000_KUMCTRLSTA_HD_CTRL_1000_D	0x00000000	e1000_hw.h
16112	E1000_KUMCTRLSTA_OFFSET_K0S_CTR	0x0000001E	e1000_hw.h
16113	E1000_KUMCTRLSTA_DIAG_FELPBK	0x2000	e1000_hw.h
16114	E1000_KUMCTRLSTA_DIAG_NELPBK	0x1000	e1000_hw.h
16115	E1000_KUMCTRLSTA_K0S_100_EN	0x2000	e1000_hw.h
16116	E1000_KUMCTRLSTA_K0S_GBE_EN	0x1000	e1000_hw.h
16117	E1000_KUMCTRLSTA_K0S_ENTRY_LATE	0x0003	e1000_hw.h
16118	E1000_KABGTXD_BGSQLBIAS	0x00050000	e1000_hw.h
16119	E1000_PHY_CTRL_SPD_EN	0x00000001	e1000_hw.h
16120	E1000_PHY_CTRL_D0A_LPLU	0x00000002	e1000_hw.h
16121	E1000_PHY_CTRL_NOND0A_LPLU	0x00000004	e1000_hw.h
16122	E1000_PHY_CTRL_NOND0A_GBE_DISAB	0x00000008	e1000_hw.h
16123	E1000_PHY_CTRL_GBE_DISABLE	0x00000040	e1000_hw.h
16124	E1000_PHY_CTRL_B2B_EN	0x00000080	e1000_hw.h
16125	E1000_LEDCTL_LED0_MODE_MASK	0x0000000F	e1000_hw.h
16126	E1000_LEDCTL_LED0_MODE_SHIFT	0	e1000_hw.h
16127	E1000_LEDCTL_LED0_BLINK_RATE	0x0000020	e1000_hw.h
16128	E1000_LEDCTL_LED0_IVRT	0x00000040	e1000_hw.h
16129	E1000_LEDCTL_LED0_BLINK	0x00000080	e1000_hw.h
16130	E1000_LEDCTL_LED1_MODE_MASK	0x00000F00	e1000_hw.h
16131	E1000_LEDCTL_LED1_MODE_SHIFT	8	e1000_hw.h
16132	E1000_LEDCTL_LED1_BLINK_RATE	0x0002000	e1000_hw.h
16133	E1000_LEDCTL_LED1_IVRT	0x00004000	e1000_hw.h
16134	E1000_LEDCTL_LED1_BLINK	0x00008000	e1000_hw.h
16135	E1000_LEDCTL_LED2_MODE_MASK	0x000F0000	e1000_hw.h
16136	E1000_LEDCTL_LED2_MODE_SHIFT	16	e1000_hw.h
16137	E1000_LEDCTL_LED2_BLINK_RATE	0x00200000	e1000_hw.h
16138	E1000_LEDCTL_LED2_IVRT	0x00400000	e1000_hw.h
16139	E1000_LEDCTL_LED2_BLINK	0x00800000	e1000_hw.h
16140	E1000_LEDCTL_LED3_MODE_MASK	0x0F000000	e1000_hw.h
16141	E1000_LEDCTL_LED3_MODE_SHIFT	24	e1000_hw.h
16142	E1000_LEDCTL_LED3_BLINK_RATE	0x20000000	e1000_hw.h
16143	E1000_LEDCTL_LED3_IVRT	0x40000000	e1000_hw.h
16144	E1000_LEDCTL_LED3_BLINK	0x80000000	e1000_hw.h
16145	E1000_LEDCTL_MODE_LINK_10_1000	0x0	e1000_hw.h
16146	E1000_LEDCTL_MODE_LINK_100_1000	0x1	e1000_hw.h
16147	E1000_LEDCTL_MODE_LINK_UP	0x2	e1000_hw.h
16148	E1000_LEDCTL_MODE_ACTIVITY	0x3	e1000_hw.h
16149	E1000_LEDCTL_MODE_LINK_ACTIVITY	0x4	e1000_hw.h
16150	E1000_LEDCTL_MODE_LINK_10	0x5	e1000_hw.h
16151	E1000_LEDCTL_MODE_LINK_100	0x6	e1000_hw.h
16152	E1000_LEDCTL_MODE_LINK_1000	0x7	e1000_hw.h
16153	E1000_LEDCTL_MODE_PCIX_MODE	0x8	e1000_hw.h
16154	E1000_LEDCTL_MODE_FULL_DUPLEX	0x9	e1000_hw.h
16155	E1000_LEDCTL_MODE_COLLISION	0xA	e1000_hw.h
16156	E1000_LEDCTL_MODE_BUS_SPEED	0xB	e1000_hw.h
16157	E1000_LEDCTL_MODE_BUS_SIZE	0xC	e1000_hw.h
16158	E1000_LEDCTL_MODE_PAUSED	0xD	e1000_hw.h
16159	E1000_LEDCTL_MODE_LED_ON	0xE	e1000_hw.h
16160	E1000_LEDCTL_MODE_LED_OFF	0xF	e1000_hw.h
16161	E1000_RAH_AV	0x80000000	e1000_hw.h	Receive descriptor valid
16162	E1000_RAH_POOL_1	0x00040000	e1000_hw.h
16163	E1000_ICR_TXDW	0x00000001	e1000_hw.h	Transmit desc written back
16164	E1000_ICR_TXQE	0x00000002	e1000_hw.h	Transmit Queue empty
16165	E1000_ICR_LSC	0x00000004	e1000_hw.h	Link Status Change
16166	E1000_ICR_RXSEQ	0x00000008	e1000_hw.h	rx sequence error
16167	E1000_ICR_RXDMT0	0x00000010	e1000_hw.h	rx desc min. threshold (0)
16168	E1000_ICR_DOUTSYNC	0x10000000	e1000_hw.h	NIC DMA out of sync
16169	E1000_ICR_RXO	0x00000040	e1000_hw.h	rx overrun
16170	E1000_ICR_RXT0	0x00000080	e1000_hw.h	rx timer intr (ring 0)
16171	E1000_ICR_MDAC	0x00000200	e1000_hw.h	MDIO access complete
16172	E1000_ICR_RXCFG	0x00000400	e1000_hw.h	RX /c/ ordered set
16173	E1000_ICR_GPI_EN0	0x00000800	e1000_hw.h	GP Int 0
16174	E1000_ICR_GPI_EN1	0x00001000	e1000_hw.h	GP Int 1
16175	E1000_ICR_GPI_EN2	0x00002000	e1000_hw.h	GP Int 2
16176	E1000_ICR_GPI_EN3	0x00004000	e1000_hw.h	GP Int 3
16177	E1000_ICR_TXD_LOW	0x00008000	e1000_hw.h
16178	E1000_ICR_SRPD	0x00010000	e1000_hw.h
16179	E1000_ICR_ACK	0x00020000	e1000_hw.h	Receive Ack frame
16180	E1000_ICR_MNG	0x00040000	e1000_hw.h	Manageability event
16181	E1000_ICR_DOCK	0x00080000	e1000_hw.h	Dock/Undock
16182	E1000_ICR_INT_ASSERTED	0x80000000	e1000_hw.h	If this bit asserted, the driver should claim the interrupt
16183	E1000_ICR_RXD_FIFO_PAR0	0x00100000	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
16184	E1000_ICR_TXD_FIFO_PAR0	0x00200000	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
16185	E1000_ICR_HOST_ARB_PAR	0x00400000	e1000_hw.h	host arb read buffer parity error
16186	E1000_ICR_PB_PAR	0x00800000	e1000_hw.h	packet buffer parity error
16187	E1000_ICR_RXD_FIFO_PAR1	0x01000000	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
16188	E1000_ICR_TXD_FIFO_PAR1	0x02000000	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
16189	E1000_ICR_ALL_PARITY	0x03F00000	e1000_hw.h	all parity error bits
16190	E1000_ICR_DSW	0x00000020	e1000_hw.h	FW changed the status of DISSW bit in the FWSM
16191	E1000_ICR_PHYINT	0x00001000	e1000_hw.h	LAN connected device generates an interrupt
16192	E1000_ICR_EPRST	0x00100000	e1000_hw.h	ME handware reset occurs
16193	E1000_ICS_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
16194	E1000_ICS_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
16195	E1000_ICS_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
16196	E1000_ICS_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
16197	E1000_ICS_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
16198	E1000_ICS_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
16199	E1000_ICS_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
16200	E1000_ICS_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
16201	E1000_ICS_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
16202	E1000_ICS_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
16203	E1000_ICS_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
16204	E1000_ICS_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
16205	E1000_ICS_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
16206	E1000_ICS_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
16207	E1000_ICS_SRPD	E1000_ICR_SRPD	e1000_hw.h
16208	E1000_ICS_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
16209	E1000_ICS_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
16210	E1000_ICS_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
16211	E1000_ICS_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
16212	E1000_ICS_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
16213	E1000_ICS_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
16214	E1000_ICS_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
16215	E1000_ICS_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
16216	E1000_ICS_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
16217	E1000_ICS_DSW	E1000_ICR_DSW	e1000_hw.h
16218	E1000_ICS_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
16219	E1000_ICS_EPRST	E1000_ICR_EPRST	e1000_hw.h
16220	E1000_IMS_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
16221	E1000_IMS_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
16222	E1000_IMS_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
16223	E1000_IMS_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
16224	E1000_IMS_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
16225	E1000_IMS_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
16226	E1000_IMS_DOUTSYNC	E1000_ICR_DOUTSYNC	e1000_hw.h	NIC DMA out of sync
16227	E1000_IMS_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
16228	E1000_IMS_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
16229	E1000_IMS_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
16230	E1000_IMS_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
16231	E1000_IMS_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
16232	E1000_IMS_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
16233	E1000_IMS_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
16234	E1000_IMS_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
16235	E1000_IMS_SRPD	E1000_ICR_SRPD	e1000_hw.h
16236	E1000_IMS_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
16237	E1000_IMS_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
16238	E1000_IMS_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
16239	E1000_IMS_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
16240	E1000_IMS_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
16241	E1000_IMS_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
16242	E1000_IMS_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
16243	E1000_IMS_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
16244	E1000_IMS_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
16245	E1000_IMS_DSW	E1000_ICR_DSW	e1000_hw.h
16246	E1000_IMS_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
16247	E1000_IMS_EPRST	E1000_ICR_EPRST	e1000_hw.h
16248	E1000_IMC_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
16249	E1000_IMC_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
16250	E1000_IMC_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
16251	E1000_IMC_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
16252	E1000_IMC_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
16253	E1000_IMC_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
16254	E1000_IMC_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
16255	E1000_IMC_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
16256	E1000_IMC_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
16257	E1000_IMC_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
16258	E1000_IMC_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
16259	E1000_IMC_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
16260	E1000_IMC_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
16261	E1000_IMC_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
16262	E1000_IMC_SRPD	E1000_ICR_SRPD	e1000_hw.h
16263	E1000_IMC_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
16264	E1000_IMC_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
16265	E1000_IMC_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
16266	E1000_IMC_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
16267	E1000_IMC_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
16268	E1000_IMC_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
16269	E1000_IMC_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
16270	E1000_IMC_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
16271	E1000_IMC_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
16272	E1000_IMC_DSW	E1000_ICR_DSW	e1000_hw.h
16273	E1000_IMC_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
16274	E1000_IMC_EPRST	E1000_ICR_EPRST	e1000_hw.h
16275	E1000_RCTL_RST	0x00000001	e1000_hw.h	Software reset
16276	E1000_RCTL_EN	0x00000002	e1000_hw.h	enable
16277	E1000_RCTL_SBP	0x00000004	e1000_hw.h	store bad packet
16278	E1000_RCTL_UPE	0x00000008	e1000_hw.h	unicast promiscuous enable
16279	E1000_RCTL_MPE	0x00000010	e1000_hw.h	multicast promiscuous enab
16280	E1000_RCTL_LPE	0x00000020	e1000_hw.h	long packet enable
16281	E1000_RCTL_LBM_NO	0x00000000	e1000_hw.h	no loopback mode
16282	E1000_RCTL_LBM_MAC	0x00000040	e1000_hw.h	MAC loopback mode
16283	E1000_RCTL_LBM_SLP	0x00000080	e1000_hw.h	serial link loopback mode
16284	E1000_RCTL_LBM_TCVR	0x000000C0	e1000_hw.h	tcvr loopback mode
16285	E1000_RCTL_DTYP_MASK	0x00000C00	e1000_hw.h	Descriptor type mask
16286	E1000_RCTL_DTYP_PS	0x00000400	e1000_hw.h	Packet Split descriptor
16287	E1000_RCTL_RDMTS_HALF	0x00000000	e1000_hw.h	rx desc min threshold size
16288	E1000_RCTL_RDMTS_QUAT	0x00000100	e1000_hw.h	rx desc min threshold size
16289	E1000_RCTL_RDMTS_EIGTH	0x00000200	e1000_hw.h	rx desc min threshold size
16290	E1000_RCTL_MO_SHIFT	12	e1000_hw.h	multicast offset shift
16291	E1000_RCTL_MO_0	0x00000000	e1000_hw.h	multicast offset 11:0
16292	E1000_RCTL_MO_1	0x00001000	e1000_hw.h	multicast offset 12:1
16293	E1000_RCTL_MO_2	0x00002000	e1000_hw.h	multicast offset 13:2
16294	E1000_RCTL_MO_3	0x00003000	e1000_hw.h	multicast offset 15:4
16295	E1000_RCTL_MDR	0x00004000	e1000_hw.h	multicast desc ring 0
16296	E1000_RCTL_BAM	0x00008000	e1000_hw.h	broadcast enable
16297	E1000_RCTL_SZ_2048	0x00000000	e1000_hw.h	rx buffer size 2048
16298	E1000_RCTL_SZ_1024	0x00010000	e1000_hw.h	rx buffer size 1024
16299	E1000_RCTL_SZ_512	0x00020000	e1000_hw.h	rx buffer size 512
16300	E1000_RCTL_SZ_256	0x00030000	e1000_hw.h	rx buffer size 256
16301	E1000_RCTL_SZ_16384	0x00010000	e1000_hw.h	rx buffer size 16384
16302	E1000_RCTL_SZ_8192	0x00020000	e1000_hw.h	rx buffer size 8192
16303	E1000_RCTL_SZ_4096	0x00030000	e1000_hw.h	rx buffer size 4096
16304	E1000_RCTL_VFE	0x00040000	e1000_hw.h	vlan filter enable
16305	E1000_RCTL_CFIEN	0x00080000	e1000_hw.h	canonical form enable
16306	E1000_RCTL_CFI	0x00100000	e1000_hw.h	canonical form indicator
16307	E1000_RCTL_DPF	0x00400000	e1000_hw.h	discard pause frames
16308	E1000_RCTL_PMCF	0x00800000	e1000_hw.h	pass MAC control frames
16309	E1000_RCTL_BSEX	0x02000000	e1000_hw.h	Buffer size extension
16310	E1000_RCTL_SECRC	0x04000000	e1000_hw.h	Strip Ethernet CRC
16311	E1000_RCTL_FLXBUF_MASK	0x78000000	e1000_hw.h	Flexible buffer size
16312	E1000_RCTL_FLXBUF_SHIFT	27	e1000_hw.h	Flexible buffer shift
16313	E1000_PSRCTL_BSIZE0_MASK	0x0000007F	e1000_hw.h
16314	E1000_PSRCTL_BSIZE1_MASK	0x00003F00	e1000_hw.h
16315	E1000_PSRCTL_BSIZE2_MASK	0x003F0000	e1000_hw.h
16316	E1000_PSRCTL_BSIZE3_MASK	0x3F000000	e1000_hw.h
16317	E1000_PSRCTL_BSIZE0_SHIFT	7	e1000_hw.h	Shift _right_ 7
16318	E1000_PSRCTL_BSIZE1_SHIFT	2	e1000_hw.h	Shift _right_ 2
16319	E1000_PSRCTL_BSIZE2_SHIFT	6	e1000_hw.h	Shift _left_ 6
16320	E1000_PSRCTL_BSIZE3_SHIFT	14	e1000_hw.h	Shift _left_ 14
16321	E1000_SWFW_EEP_SM	0x0001	e1000_hw.h
16322	E1000_SWFW_PHY0_SM	0x0002	e1000_hw.h
16323	E1000_SWFW_PHY1_SM	0x0004	e1000_hw.h
16324	E1000_SWFW_MAC_CSR_SM	0x0008	e1000_hw.h
16325	E1000_RDT_DELAY	0x0000ffff	e1000_hw.h	Delay timer (1=1024us)
16326	E1000_RDT_FPDB	0x80000000	e1000_hw.h	Flush descriptor block
16327	E1000_RDLEN_LEN	0x0007ff80	e1000_hw.h	descriptor length
16328	E1000_RDH_RDH	0x0000ffff	e1000_hw.h	receive descriptor head
16329	E1000_RDT_RDT	0x0000ffff	e1000_hw.h	receive descriptor tail
16330	E1000_FCRTH_RTH	0x0000FFF8	e1000_hw.h	Mask Bits[15:3] for RTH
16331	E1000_FCRTH_XFCE	0x80000000	e1000_hw.h	External Flow Control Enable
16332	E1000_FCRTL_RTL	0x0000FFF8	e1000_hw.h	Mask Bits[15:3] for RTL
16333	E1000_FCRTL_XONE	0x80000000	e1000_hw.h	Enable XON frame transmission
16334	E1000_RFCTL_ISCSI_DIS	0x00000001	e1000_hw.h
16335	E1000_RFCTL_ISCSI_DWC_MASK	0x0000003E	e1000_hw.h
16336	E1000_RFCTL_ISCSI_DWC_SHIFT	1	e1000_hw.h
16337	E1000_RFCTL_NFSW_DIS	0x00000040	e1000_hw.h
16338	E1000_RFCTL_NFSR_DIS	0x00000080	e1000_hw.h
16339	E1000_RFCTL_NFS_VER_MASK	0x00000300	e1000_hw.h
16340	E1000_RFCTL_NFS_VER_SHIFT	8	e1000_hw.h
16341	E1000_RFCTL_IPV6_DIS	0x00000400	e1000_hw.h
16342	E1000_RFCTL_IPV6_XSUM_DIS	0x00000800	e1000_hw.h
16343	E1000_RFCTL_ACK_DIS	0x00001000	e1000_hw.h
16344	E1000_RFCTL_ACKD_DIS	0x00002000	e1000_hw.h
16345	E1000_RFCTL_IPFRSP_DIS	0x00004000	e1000_hw.h
16346	E1000_RFCTL_EXTEN	0x00008000	e1000_hw.h
16347	E1000_RFCTL_IPV6_EX_DIS	0x00010000	e1000_hw.h
16348	E1000_RFCTL_NEW_IPV6_EXT_DIS	0x00020000	e1000_hw.h
16349	E1000_RXDCTL_PTHRESH	0x0000003F	e1000_hw.h	RXDCTL Prefetch Threshold
16350	E1000_RXDCTL_HTHRESH	0x00003F00	e1000_hw.h	RXDCTL Host Threshold
16351	E1000_RXDCTL_WTHRESH	0x003F0000	e1000_hw.h	RXDCTL Writeback Threshold
16352	E1000_RXDCTL_GRAN	0x01000000	e1000_hw.h	RXDCTL Granularity
16353	E1000_RXDCTL_QUEUE_ENABLE	0x02000000	e1000_hw.h	Enable specific Rx Queue
16354	IGB_RX_PTHRESH	16	e1000_hw.h
16355	IGB_RX_HTHRESH	8	e1000_hw.h
16356	IGB_RX_WTHRESH	1	e1000_hw.h
16357	E1000_TXDCTL_PTHRESH	0x0000003F	e1000_hw.h	TXDCTL Prefetch Threshold
16358	E1000_TXDCTL_HTHRESH	0x00003F00	e1000_hw.h	TXDCTL Host Threshold
16359	E1000_TXDCTL_WTHRESH	0x003F0000	e1000_hw.h	TXDCTL Writeback Threshold
16360	E1000_TXDCTL_GRAN	0x01000000	e1000_hw.h	TXDCTL Granularity
16361	E1000_TXDCTL_LWTHRESH	0xFE000000	e1000_hw.h	TXDCTL Low Threshold
16362	E1000_TXDCTL_FULL_TX_DESC_WB	0x01010000	e1000_hw.h	GRAN=1, WTHRESH=1
16363	E1000_TXDCTL_COUNT_DESC	0x00400000	e1000_hw.h	Enable the counting of desc.
16364	E1000_TXDCTL_QUEUE_ENABLE	0x02000000	e1000_hw.h	Enable specific Tx Queue
16365	E1000_TXCW_FD	0x00000020	e1000_hw.h	TXCW full duplex
16366	E1000_TXCW_HD	0x00000040	e1000_hw.h	TXCW half duplex
16367	E1000_TXCW_PAUSE	0x00000080	e1000_hw.h	TXCW sym pause request
16368	E1000_TXCW_ASM_DIR	0x00000100	e1000_hw.h	TXCW astm pause direction
16369	E1000_TXCW_PAUSE_MASK	0x00000180	e1000_hw.h	TXCW pause request mask
16370	E1000_TXCW_RF	0x00003000	e1000_hw.h	TXCW remote fault
16371	E1000_TXCW_NP	0x00008000	e1000_hw.h	TXCW next page
16372	E1000_TXCW_CW	0x0000ffff	e1000_hw.h	TxConfigWord mask
16373	E1000_TXCW_TXC	0x40000000	e1000_hw.h	Transmit Config control
16374	E1000_TXCW_ANE	0x80000000	e1000_hw.h	Auto-neg enable
16375	E1000_RXCW_CW	0x0000ffff	e1000_hw.h	RxConfigWord mask
16376	E1000_RXCW_NC	0x04000000	e1000_hw.h	Receive config no carrier
16377	E1000_RXCW_IV	0x08000000	e1000_hw.h	Receive config invalid
16378	E1000_RXCW_CC	0x10000000	e1000_hw.h	Receive config change
16379	E1000_RXCW_C	0x20000000	e1000_hw.h	Receive config
16380	E1000_RXCW_SYNCH	0x40000000	e1000_hw.h	Receive config synch
16381	E1000_RXCW_ANC	0x80000000	e1000_hw.h	Auto-neg complete
16382	E1000_TCTL_RST	0x00000001	e1000_hw.h	software reset
16383	E1000_TCTL_EN	0x00000002	e1000_hw.h	enable tx
16384	E1000_TCTL_BCE	0x00000004	e1000_hw.h	busy check enable
16385	E1000_TCTL_PSP	0x00000008	e1000_hw.h	pad short packets
16386	E1000_TCTL_CT	0x00000ff0	e1000_hw.h	collision threshold
16387	E1000_TCTL_COLD	0x003ff000	e1000_hw.h	collision distance
16388	E1000_TCTL_SWXOFF	0x00400000	e1000_hw.h	SW Xoff transmission
16389	E1000_TCTL_PBE	0x00800000	e1000_hw.h	Packet Burst Enable
16390	E1000_TCTL_RTLC	0x01000000	e1000_hw.h	Re-transmit on late collision
16391	E1000_TCTL_NRTU	0x02000000	e1000_hw.h	No Re-transmit on underrun
16392	E1000_TCTL_MULR	0x10000000	e1000_hw.h	Multiple request support
16393	E1000_TCTL_EXT_BST_MASK	0x000003FF	e1000_hw.h	Backoff Slot Time
16394	E1000_TCTL_EXT_GCEX_MASK	0x000FFC00	e1000_hw.h	Gigabit Carry Extend Padding
16395	DEFAULT_80003ES2LAN_TCTL_EXT_GC	0x00010000	e1000_hw.h
16396	E1000_RXCSUM_PCSS_MASK	0x000000FF	e1000_hw.h	Packet Checksum Start
16397	E1000_RXCSUM_IPOFL	0x00000100	e1000_hw.h	IPv4 checksum offload
16398	E1000_RXCSUM_TUOFL	0x00000200	e1000_hw.h	TCP / UDP checksum offload
16399	E1000_RXCSUM_IPV6OFL	0x00000400	e1000_hw.h	IPv6 checksum offload
16400	E1000_RXCSUM_IPPCSE	0x00001000	e1000_hw.h	IP payload checksum enable
16401	E1000_RXCSUM_PCSD	0x00002000	e1000_hw.h	packet checksum disabled
16402	E1000_MRQC_ENABLE_MASK	0x00000003	e1000_hw.h
16403	E1000_MRQC_ENABLE_VMDQ	0x00000003	e1000_hw.h
16404	E1000_MRQC_ENABLE_RSS_2Q	0x00000001	e1000_hw.h
16405	E1000_MRQC_ENABLE_RSS_INT	0x00000004	e1000_hw.h
16406	E1000_MRQC_RSS_FIELD_MASK	0xFFFF0000	e1000_hw.h
16407	E1000_MRQC_RSS_FIELD_IPV4_TCP	0x00010000	e1000_hw.h
16408	E1000_MRQC_RSS_FIELD_IPV4	0x00020000	e1000_hw.h
16409	E1000_MRQC_RSS_FIELD_IPV6_TCP_E	0x00040000	e1000_hw.h
16410	E1000_MRQC_RSS_FIELD_IPV6_EX	0x00080000	e1000_hw.h
16411	E1000_MRQC_RSS_FIELD_IPV6	0x00100000	e1000_hw.h
16412	E1000_MRQC_RSS_FIELD_IPV6_TCP	0x00200000	e1000_hw.h
16413	E1000_WUC_APME	0x00000001	e1000_hw.h	APM Enable
16414	E1000_WUC_PME_EN	0x00000002	e1000_hw.h	PME Enable
16415	E1000_WUC_PME_STATUS	0x00000004	e1000_hw.h	PME Status
16416	E1000_WUC_APMPME	0x00000008	e1000_hw.h	Assert PME on APM Wakeup
16417	E1000_WUC_SPM	0x80000000	e1000_hw.h	Enable SPM
16418	E1000_WUFC_LNKC	0x00000001	e1000_hw.h	Link Status Change Wakeup Enable
16419	E1000_WUFC_MAG	0x00000002	e1000_hw.h	Magic Packet Wakeup Enable
16420	E1000_WUFC_EX	0x00000004	e1000_hw.h	Directed Exact Wakeup Enable
16421	E1000_WUFC_MC	0x00000008	e1000_hw.h	Directed Multicast Wakeup Enable
16422	E1000_WUFC_BC	0x00000010	e1000_hw.h	Broadcast Wakeup Enable
16423	E1000_WUFC_ARP	0x00000020	e1000_hw.h	ARP Request Packet Wakeup Enable
16424	E1000_WUFC_IPV4	0x00000040	e1000_hw.h	Directed IPv4 Packet Wakeup Enable
16425	E1000_WUFC_IPV6	0x00000080	e1000_hw.h	Directed IPv6 Packet Wakeup Enable
16426	E1000_WUFC_IGNORE_TCO	0x00008000	e1000_hw.h	Ignore WakeOn TCO packets
16427	E1000_WUFC_FLX0	0x00010000	e1000_hw.h	Flexible Filter 0 Enable
16428	E1000_WUFC_FLX1	0x00020000	e1000_hw.h	Flexible Filter 1 Enable
16429	E1000_WUFC_FLX2	0x00040000	e1000_hw.h	Flexible Filter 2 Enable
16430	E1000_WUFC_FLX3	0x00080000	e1000_hw.h	Flexible Filter 3 Enable
16431	E1000_WUFC_ALL_FILTERS	0x000F00FF	e1000_hw.h	Mask for all wakeup filters
16432	E1000_WUFC_FLX_OFFSET	16	e1000_hw.h	Offset to the Flexible Filters bits
16433	E1000_WUFC_FLX_FILTERS	0x000F0000	e1000_hw.h	Mask for the 4 flexible filters
16434	E1000_WUS_LNKC	0x00000001	e1000_hw.h	Link Status Changed
16435	E1000_WUS_MAG	0x00000002	e1000_hw.h	Magic Packet Received
16436	E1000_WUS_EX	0x00000004	e1000_hw.h	Directed Exact Received
16437	E1000_WUS_MC	0x00000008	e1000_hw.h	Directed Multicast Received
16438	E1000_WUS_BC	0x00000010	e1000_hw.h	Broadcast Received
16439	E1000_WUS_ARP	0x00000020	e1000_hw.h	ARP Request Packet Received
16440	E1000_WUS_IPV4	0x00000040	e1000_hw.h	Directed IPv4 Packet Wakeup Received
16441	E1000_WUS_IPV6	0x00000080	e1000_hw.h	Directed IPv6 Packet Wakeup Received
16442	E1000_WUS_FLX0	0x00010000	e1000_hw.h	Flexible Filter 0 Match
16443	E1000_WUS_FLX1	0x00020000	e1000_hw.h	Flexible Filter 1 Match
16444	E1000_WUS_FLX2	0x00040000	e1000_hw.h	Flexible Filter 2 Match
16445	E1000_WUS_FLX3	0x00080000	e1000_hw.h	Flexible Filter 3 Match
16446	E1000_WUS_FLX_FILTERS	0x000F0000	e1000_hw.h	Mask for the 4 flexible filters
16447	E1000_MANC_SMBUS_EN	0x00000001	e1000_hw.h	SMBus Enabled - RO
16448	E1000_MANC_ASF_EN	0x00000002	e1000_hw.h	ASF Enabled - RO
16449	E1000_MANC_R_ON_FORCE	0x00000004	e1000_hw.h	Reset on Force TCO - RO
16450	E1000_MANC_RMCP_EN	0x00000100	e1000_hw.h	Enable RCMP 026Fh Filtering
16451	E1000_MANC_0298_EN	0x00000200	e1000_hw.h	Enable RCMP 0298h Filtering
16452	E1000_MANC_IPV4_EN	0x00000400	e1000_hw.h	Enable IPv4
16453	E1000_MANC_IPV6_EN	0x00000800	e1000_hw.h	Enable IPv6
16454	E1000_MANC_SNAP_EN	0x00001000	e1000_hw.h	Accept LLC/SNAP
16455	E1000_MANC_ARP_EN	0x00002000	e1000_hw.h	Enable ARP Request Filtering
16456	E1000_MANC_NEIGHBOR_EN	0x00004000	e1000_hw.h	Enable Neighbor Discovery
16457	E1000_MANC_ARP_RES_EN	0x00008000	e1000_hw.h	Enable ARP response Filtering
16458	E1000_MANC_TCO_RESET	0x00010000	e1000_hw.h	TCO Reset Occurred
16459	E1000_MANC_RCV_TCO_EN	0x00020000	e1000_hw.h	Receive TCO Packets Enabled
16460	E1000_MANC_REPORT_STATUS	0x00040000	e1000_hw.h	Status Reporting Enabled
16461	E1000_MANC_RCV_ALL	0x00080000	e1000_hw.h	Receive All Enabled
16462	E1000_MANC_BLK_PHY_RST_ON_IDE	0x00040000	e1000_hw.h	Block phy resets
16463	E1000_MANC_EN_MAC_ADDR_FILTER	0x00100000	e1000_hw.h	Enable MAC address
16464	E1000_MANC_EN_MNG2HOST	0x00200000	e1000_hw.h	Enable MNG packets to host
16465	E1000_MANC_EN_IP_ADDR_FILTER	0x00400000	e1000_hw.h	Enable IP address
16466	E1000_MANC_EN_XSUM_FILTER	0x00800000	e1000_hw.h	Enable checksum filtering
16467	E1000_MANC_BR_EN	0x01000000	e1000_hw.h	Enable broadcast filtering
16468	E1000_MANC_SMB_REQ	0x01000000	e1000_hw.h	SMBus Request
16469	E1000_MANC_SMB_GNT	0x02000000	e1000_hw.h	SMBus Grant
16470	E1000_MANC_SMB_CLK_IN	0x04000000	e1000_hw.h	SMBus Clock In
16471	E1000_MANC_SMB_DATA_IN	0x08000000	e1000_hw.h	SMBus Data In
16472	E1000_MANC_SMB_DATA_OUT	0x10000000	e1000_hw.h	SMBus Data Out
16473	E1000_MANC_SMB_CLK_OUT	0x20000000	e1000_hw.h	SMBus Clock Out
16474	E1000_MANC_SMB_DATA_OUT_SHIFT	28	e1000_hw.h	SMBus Data Out Shift
16475	E1000_MANC_SMB_CLK_OUT_SHIFT	29	e1000_hw.h	SMBus Clock Out Shift
16476	E1000_SWSM_SMBI	0x00000001	e1000_hw.h	Driver Semaphore bit
16477	E1000_SWSM_SWESMBI	0x00000002	e1000_hw.h	FW Semaphore bit
16478	E1000_SWSM_WMNG	0x00000004	e1000_hw.h	Wake MNG Clock
16479	E1000_SWSM_DRV_LOAD	0x00000008	e1000_hw.h	Driver Loaded Bit
16480	E1000_FWSM_MODE_MASK	0x0000000E	e1000_hw.h	FW mode
16481	E1000_FWSM_MODE_SHIFT	1	e1000_hw.h
16482	E1000_FWSM_FW_VALID	0x00008000	e1000_hw.h	FW established a valid mode
16483	E1000_FWSM_RSPCIPHY	0x00000040	e1000_hw.h	Reset PHY on PCI reset
16484	E1000_FWSM_DISSW	0x10000000	e1000_hw.h	FW disable SW Write Access
16485	E1000_FWSM_SKUSEL_MASK	0x60000000	e1000_hw.h	LAN SKU select
16486	E1000_FWSM_SKUEL_SHIFT	29	e1000_hw.h
16487	E1000_FWSM_SKUSEL_EMB	0x0	e1000_hw.h	Embedded SKU
16488	E1000_FWSM_SKUSEL_CONS	0x1	e1000_hw.h	Consumer SKU
16489	E1000_FWSM_SKUSEL_PERF_100	0x2	e1000_hw.h	Perf & Corp 10/100 SKU
16490	E1000_FWSM_SKUSEL_PERF_GBE	0x3	e1000_hw.h	Perf & Copr GbE SKU
16491	E1000_FFLT_DBG_INVC	0x00100000	e1000_hw.h	Invalid /C/ code handling
16492	E1000_HICR_EN	0x00000001	e1000_hw.h	Enable Bit - RO
16493	E1000_HICR_C	0x00000002	e1000_hw.h	Driver sets this bit when done
16494	E1000_HICR_SV	0x00000004	e1000_hw.h	Status Validity
16495	E1000_HICR_FWR	0x00000080	e1000_hw.h	FW reset. Set by the Host
16496	E1000_HI_MAX_DATA_LENGTH	252	e1000_hw.h	Host Interface data length
16497	E1000_HI_MAX_BLOCK_BYTE_LENGTH	1792	e1000_hw.h	Number of bytes in range
16498	E1000_HI_MAX_BLOCK_DWORD_LENGTH	448	e1000_hw.h	Number of dwords in range
16499	E1000_HI_COMMAND_TIMEOUT	500	e1000_hw.h	Time in ms to process HI command
16500	E1000_HSMC0R_CLKIN	0x00000001	e1000_hw.h	SMB Clock in
16501	E1000_HSMC0R_DATAIN	0x00000002	e1000_hw.h	SMB Data in
16502	E1000_HSMC0R_DATAOUT	0x00000004	e1000_hw.h	SMB Data out
16503	E1000_HSMC0R_CLKOUT	0x00000008	e1000_hw.h	SMB Clock out
16504	E1000_HSMC1R_CLKIN	E1000_HSMC0R_CLKIN	e1000_hw.h
16505	E1000_HSMC1R_DATAIN	E1000_HSMC0R_DATAIN	e1000_hw.h
16506	E1000_HSMC1R_DATAOUT	E1000_HSMC0R_DATAOUT	e1000_hw.h
16507	E1000_HSMC1R_CLKOUT	E1000_HSMC0R_CLKOUT	e1000_hw.h
16508	E1000_FWSTS_FWS_MASK	0x000000FF	e1000_hw.h	FW Status
16509	E1000_WUPL_LENGTH_MASK	0x0FFF	e1000_hw.h	Only the lower 12 bits are valid
16510	E1000_MDALIGN	4096	e1000_hw.h
16511	E1000_GCR_RXD_NO_SNOOP	0x00000001	e1000_hw.h
16512	E1000_GCR_RXDSCW_NO_SNOOP	0x00000002	e1000_hw.h
16513	E1000_GCR_RXDSCR_NO_SNOOP	0x00000004	e1000_hw.h
16514	E1000_GCR_TXD_NO_SNOOP	0x00000008	e1000_hw.h
16515	E1000_GCR_TXDSCW_NO_SNOOP	0x00000010	e1000_hw.h
16516	E1000_GCR_TXDSCR_NO_SNOOP	0x00000020	e1000_hw.h
16517	PCI_EX_NO_SNOOP_ALL	(E1000_GCR_RXD_NO_SNOOP \| \ E1000_GCR_RXDSCW_NO_SNOOP \| \ E1000_GCR_RXDSCR_NO_SNOOP \| \ E1000_GCR_TXD_NO_SNOO	e1000_hw.h
16518	PCI_EX_82566_SNOOP_ALL	PCI_EX_NO_SNOOP_ALL	e1000_hw.h
16519	E1000_GCR_L1_ACT_WITHOUT_L0S_RX	0x08000000	e1000_hw.h
16520	E1000_FACTPS_FUNC0_POWER_STATE_	0x00000003	e1000_hw.h
16521	E1000_FACTPS_LAN0_VALID	0x00000004	e1000_hw.h
16522	E1000_FACTPS_FUNC0_AUX_EN	0x00000008	e1000_hw.h
16523	E1000_FACTPS_FUNC1_POWER_STATE_	0x000000C0	e1000_hw.h
16524	E1000_FACTPS_FUNC1_POWER_STATE_	6	e1000_hw.h
16525	E1000_FACTPS_LAN1_VALID	0x00000100	e1000_hw.h
16526	E1000_FACTPS_FUNC1_AUX_EN	0x00000200	e1000_hw.h
16527	E1000_FACTPS_FUNC2_POWER_STATE_	0x00003000	e1000_hw.h
16528	E1000_FACTPS_FUNC2_POWER_STATE_	12	e1000_hw.h
16529	E1000_FACTPS_IDE_ENABLE	0x00004000	e1000_hw.h
16530	E1000_FACTPS_FUNC2_AUX_EN	0x00008000	e1000_hw.h
16531	E1000_FACTPS_FUNC3_POWER_STATE_	0x000C0000	e1000_hw.h
16532	E1000_FACTPS_FUNC3_POWER_STATE_	18	e1000_hw.h
16533	E1000_FACTPS_SP_ENABLE	0x00100000	e1000_hw.h
16534	E1000_FACTPS_FUNC3_AUX_EN	0x00200000	e1000_hw.h
16535	E1000_FACTPS_FUNC4_POWER_STATE_	0x03000000	e1000_hw.h
16536	E1000_FACTPS_FUNC4_POWER_STATE_	24	e1000_hw.h
16537	E1000_FACTPS_IPMI_ENABLE	0x04000000	e1000_hw.h
16538	E1000_FACTPS_FUNC4_AUX_EN	0x08000000	e1000_hw.h
16539	E1000_FACTPS_MNGCG	0x20000000	e1000_hw.h
16540	E1000_FACTPS_LAN_FUNC_SEL	0x40000000	e1000_hw.h
16541	E1000_FACTPS_PM_STATE_CHANGED	0x80000000	e1000_hw.h
16542	PCI_EX_LINK_STATUS	0x12	e1000_hw.h
16543	PCI_EX_LINK_WIDTH_MASK	0x3F0	e1000_hw.h
16544	PCI_EX_LINK_WIDTH_SHIFT	4	e1000_hw.h
16545	EEPROM_READ_OPCODE_MICROWIRE	0x6	e1000_hw.h	EEPROM read opcode
16546	EEPROM_WRITE_OPCODE_MICROWIRE	0x5	e1000_hw.h	EEPROM write opcode
16547	EEPROM_ERASE_OPCODE_MICROWIRE	0x7	e1000_hw.h	EEPROM erase opcode
16548	EEPROM_EWEN_OPCODE_MICROWIRE	0x13	e1000_hw.h	EEPROM erase/write enable
16549	EEPROM_EWDS_OPCODE_MICROWIRE	0x10	e1000_hw.h	EEPROM erast/write disable
16550	EEPROM_MAX_RETRY_SPI	5000	e1000_hw.h	Max wait of 5ms, for RDY signal
16551	EEPROM_READ_OPCODE_SPI	0x03	e1000_hw.h	EEPROM read opcode
16552	EEPROM_WRITE_OPCODE_SPI	0x02	e1000_hw.h	EEPROM write opcode
16553	EEPROM_A8_OPCODE_SPI	0x08	e1000_hw.h	opcode bit-3 = address bit-8
16554	EEPROM_WREN_OPCODE_SPI	0x06	e1000_hw.h	EEPROM set Write Enable latch
16555	EEPROM_WRDI_OPCODE_SPI	0x04	e1000_hw.h	EEPROM reset Write Enable latch
16556	EEPROM_RDSR_OPCODE_SPI	0x05	e1000_hw.h	EEPROM read Status register
16557	EEPROM_WRSR_OPCODE_SPI	0x01	e1000_hw.h	EEPROM write Status register
16558	EEPROM_ERASE4K_OPCODE_SPI	0x20	e1000_hw.h	EEPROM ERASE 4KB
16559	EEPROM_ERASE64K_OPCODE_SPI	0xD8	e1000_hw.h	EEPROM ERASE 64KB
16560	EEPROM_ERASE256_OPCODE_SPI	0xDB	e1000_hw.h	EEPROM ERASE 256B
16561	EEPROM_WORD_SIZE_SHIFT	6	e1000_hw.h
16562	EEPROM_SIZE_SHIFT	10	e1000_hw.h
16563	EEPROM_SIZE_MASK	0x1C00	e1000_hw.h
16564	EEPROM_COMPAT	0x0003	e1000_hw.h
16565	EEPROM_ID_LED_SETTINGS	0x0004	e1000_hw.h
16566	EEPROM_VERSION	0x0005	e1000_hw.h
16567	EEPROM_SERDES_AMPLITUDE	0x0006	e1000_hw.h	For SERDES output amplitude adjustment.
16568	EEPROM_PHY_CLASS_WORD	0x0007	e1000_hw.h
16569	EEPROM_INIT_CONTROL1_REG	0x000A	e1000_hw.h
16570	EEPROM_INIT_CONTROL2_REG	0x000F	e1000_hw.h
16571	EEPROM_SWDEF_PINS_CTRL_PORT_1	0x0010	e1000_hw.h
16572	EEPROM_INIT_CONTROL3_PORT_B	0x0014	e1000_hw.h
16573	EEPROM_INIT_3GIO_3	0x001A	e1000_hw.h
16574	EEPROM_SWDEF_PINS_CTRL_PORT_0	0x0020	e1000_hw.h
16575	EEPROM_INIT_CONTROL3_PORT_A	0x0024	e1000_hw.h
16576	EEPROM_CFG	0x0012	e1000_hw.h
16577	EEPROM_FLASH_VERSION	0x0032	e1000_hw.h
16578	EEPROM_ALT_MAC_ADDR_PTR	0x0037	e1000_hw.h
16579	EEPROM_CHECKSUM_REG	0x003F	e1000_hw.h
16580	E1000_EEPROM_CFG_DONE	0x00040000	e1000_hw.h	MNG config cycle done
16581	E1000_EEPROM_CFG_DONE_PORT_1	0x00080000	e1000_hw.h	...for second port
16582	ID_LED_RESERVED_0000	0x0000	e1000_hw.h
16583	ID_LED_RESERVED_FFFF	0xFFFF	e1000_hw.h
16584	ID_LED_RESERVED_82573	0xF746	e1000_hw.h
16585	ID_LED_DEFAULT_82573	0x1811	e1000_hw.h
16586	ID_LED_DEFAULT	((ID_LED_OFF1_ON2 << 12) \| \ (ID_LED_OFF1_OFF2 << 8) \| \ (ID_LED_DEF1_DEF2 << 4) \| \ (ID_LED_DEF1_DEF2))	e1000_hw.h
16587	ID_LED_DEFAULT_ICH8LAN	((ID_LED_DEF1_DEF2 << 12) \| \ (ID_LED_DEF1_OFF2 << 8) \| \ (ID_LED_DEF1_ON2 << 4) \| \ (ID_LED_DEF1_DEF2))	e1000_hw.h
16588	ID_LED_DEF1_DEF2	0x1	e1000_hw.h
16589	ID_LED_DEF1_ON2	0x2	e1000_hw.h
16590	ID_LED_DEF1_OFF2	0x3	e1000_hw.h
16591	ID_LED_ON1_DEF2	0x4	e1000_hw.h
16592	ID_LED_ON1_ON2	0x5	e1000_hw.h
16593	ID_LED_ON1_OFF2	0x6	e1000_hw.h
16594	ID_LED_OFF1_DEF2	0x7	e1000_hw.h
16595	ID_LED_OFF1_ON2	0x8	e1000_hw.h
16596	ID_LED_OFF1_OFF2	0x9	e1000_hw.h
16597	IGP_ACTIVITY_LED_MASK	0xFFFFF0FF	e1000_hw.h
16598	IGP_ACTIVITY_LED_ENABLE	0x0300	e1000_hw.h
16599	IGP_LED3_MODE	0x07000000	e1000_hw.h
16600	EEPROM_SERDES_AMPLITUDE_MASK	0x000F	e1000_hw.h
16601	EEPROM_PHY_CLASS_A	0x8000	e1000_hw.h
16602	EEPROM_WORD0A_ILOS	0x0010	e1000_hw.h
16603	EEPROM_WORD0A_SWDPIO	0x01E0	e1000_hw.h
16604	EEPROM_WORD0A_LRST	0x0200	e1000_hw.h
16605	EEPROM_WORD0A_FD	0x0400	e1000_hw.h
16606	EEPROM_WORD0A_66MHZ	0x0800	e1000_hw.h
16607	EEPROM_WORD0F_PAUSE_MASK	0x3000	e1000_hw.h
16608	EEPROM_WORD0F_PAUSE	0x1000	e1000_hw.h
16609	EEPROM_WORD0F_ASM_DIR	0x2000	e1000_hw.h
16610	EEPROM_WORD0F_ANE	0x0800	e1000_hw.h
16611	EEPROM_WORD0F_SWPDIO_EXT	0x00F0	e1000_hw.h
16612	EEPROM_WORD0F_LPLU	0x0001	e1000_hw.h
16613	EEPROM_WORD1020_GIGA_DISABLE	0x0010	e1000_hw.h
16614	EEPROM_WORD1020_GIGA_DISABLE_NO	0x0008	e1000_hw.h
16615	EEPROM_WORD1A_ASPM_MASK	0x000C	e1000_hw.h
16616	EEPROM_SUM	0xBABA	e1000_hw.h
16617	EEPROM_NODE_ADDRESS_BYTE_0	0	e1000_hw.h
16618	EEPROM_PBA_BYTE_1	8	e1000_hw.h
16619	EEPROM_RESERVED_WORD	0xFFFF	e1000_hw.h
16620	PBA_SIZE	4	e1000_hw.h
16621	E1000_COLLISION_THRESHOLD	15	e1000_hw.h
16622	E1000_CT_SHIFT	4	e1000_hw.h
16623	E1000_COLLISION_DISTANCE	63	e1000_hw.h
16624	E1000_COLLISION_DISTANCE_82542	64	e1000_hw.h
16625	E1000_FDX_COLLISION_DISTANCE	E1000_COLLISION_DISTANCE	e1000_hw.h
16626	E1000_HDX_COLLISION_DISTANCE	E1000_COLLISION_DISTANCE	e1000_hw.h
16627	E1000_COLD_SHIFT	12	e1000_hw.h
16628	REQ_TX_DESCRIPTOR_MULTIPLE	8	e1000_hw.h
16629	REQ_RX_DESCRIPTOR_MULTIPLE	8	e1000_hw.h
16630	DEFAULT_82542_TIPG_IPGT	10	e1000_hw.h
16631	DEFAULT_82543_TIPG_IPGT_FIBER	9	e1000_hw.h
16632	DEFAULT_82543_TIPG_IPGT_COPPER	8	e1000_hw.h
16633	E1000_TIPG_IPGT_MASK	0x000003FF	e1000_hw.h
16634	E1000_TIPG_IPGR1_MASK	0x000FFC00	e1000_hw.h
16635	E1000_TIPG_IPGR2_MASK	0x3FF00000	e1000_hw.h
16636	DEFAULT_82542_TIPG_IPGR1	2	e1000_hw.h
16637	DEFAULT_82543_TIPG_IPGR1	8	e1000_hw.h
16638	E1000_TIPG_IPGR1_SHIFT	10	e1000_hw.h
16639	DEFAULT_82542_TIPG_IPGR2	10	e1000_hw.h
16640	DEFAULT_82543_TIPG_IPGR2	6	e1000_hw.h
16641	DEFAULT_80003ES2LAN_TIPG_IPGR2	7	e1000_hw.h
16642	E1000_TIPG_IPGR2_SHIFT	20	e1000_hw.h
16643	DEFAULT_80003ES2LAN_TIPG_IPGT_1	0x00000009	e1000_hw.h
16644	DEFAULT_80003ES2LAN_TIPG_IPGT_1	0x00000008	e1000_hw.h
16645	E1000_TXDMAC_DPP	0x00000001	e1000_hw.h
16646	TX_THRESHOLD_START	8	e1000_hw.h
16647	TX_THRESHOLD_INCREMENT	10	e1000_hw.h
16648	TX_THRESHOLD_DECREMENT	1	e1000_hw.h
16649	TX_THRESHOLD_STOP	190	e1000_hw.h
16650	TX_THRESHOLD_DISABLE	0	e1000_hw.h
16651	TX_THRESHOLD_TIMER_MS	10000	e1000_hw.h
16652	MIN_NUM_XMITS	1000	e1000_hw.h
16653	IFS_MAX	80	e1000_hw.h
16654	IFS_STEP	10	e1000_hw.h
16655	IFS_MIN	40	e1000_hw.h
16656	IFS_RATIO	4	e1000_hw.h
16657	E1000_EXTCNF_CTRL_PCIE_WRITE_EN	0x00000001	e1000_hw.h
16658	E1000_EXTCNF_CTRL_PHY_WRITE_ENA	0x00000002	e1000_hw.h
16659	E1000_EXTCNF_CTRL_D_UD_ENABLE	0x00000004	e1000_hw.h
16660	E1000_EXTCNF_CTRL_D_UD_LATENCY	0x00000008	e1000_hw.h
16661	E1000_EXTCNF_CTRL_D_UD_OWNER	0x00000010	e1000_hw.h
16662	E1000_EXTCNF_CTRL_MDIO_SW_OWNER	0x00000020	e1000_hw.h
16663	E1000_EXTCNF_CTRL_MDIO_HW_OWNER	0x00000040	e1000_hw.h
16664	E1000_EXTCNF_CTRL_EXT_CNF_POINT	0x0FFF0000	e1000_hw.h
16665	E1000_EXTCNF_SIZE_EXT_PHY_LENGT	0x000000FF	e1000_hw.h
16666	E1000_EXTCNF_SIZE_EXT_DOCK_LENG	0x0000FF00	e1000_hw.h
16667	E1000_EXTCNF_SIZE_EXT_PCIE_LENG	0x00FF0000	e1000_hw.h
16668	E1000_EXTCNF_CTRL_LCD_WRITE_ENA	0x00000001	e1000_hw.h
16669	E1000_EXTCNF_CTRL_SWFLAG	0x00000020	e1000_hw.h
16670	E1000_PBA_8K	0x0008	e1000_hw.h	8KB, default Rx allocation
16671	E1000_PBA_12K	0x000C	e1000_hw.h	12KB, default Rx allocation
16672	E1000_PBA_16K	0x0010	e1000_hw.h	16KB, default TX allocation
16673	E1000_PBA_20K	0x0014	e1000_hw.h
16674	E1000_PBA_22K	0x0016	e1000_hw.h
16675	E1000_PBA_24K	0x0018	e1000_hw.h
16676	E1000_PBA_30K	0x001E	e1000_hw.h
16677	E1000_PBA_32K	0x0020	e1000_hw.h
16678	E1000_PBA_34K	0x0022	e1000_hw.h
16679	E1000_PBA_38K	0x0026	e1000_hw.h
16680	E1000_PBA_40K	0x0028	e1000_hw.h
16681	E1000_PBA_48K	0x0030	e1000_hw.h	48KB, default RX allocation
16682	E1000_PBA_64K	0x0040	e1000_hw.h	64KB
16683	E1000_PBS_16K	E1000_PBA_16K	e1000_hw.h
16684	FLOW_CONTROL_ADDRESS_LOW	0x00C28001	e1000_hw.h
16685	FLOW_CONTROL_ADDRESS_HIGH	0x00000100	e1000_hw.h
16686	FLOW_CONTROL_TYPE	0x8808	e1000_hw.h
16687	FC_DEFAULT_HI_THRESH	(0x8000)	e1000_hw.h	32KB
16688	FC_DEFAULT_LO_THRESH	(0x4000)	e1000_hw.h	16KB
16689	FC_DEFAULT_TX_TIMER	(0x100)	e1000_hw.h	~130 us
16690	PCIX_COMMAND_REGISTER	0xE6	e1000_hw.h
16691	PCIX_STATUS_REGISTER_LO	0xE8	e1000_hw.h
16692	PCIX_STATUS_REGISTER_HI	0xEA	e1000_hw.h
16693	PCIX_COMMAND_MMRBC_MASK	0x000C	e1000_hw.h
16694	PCIX_COMMAND_MMRBC_SHIFT	0x2	e1000_hw.h
16695	PCIX_STATUS_HI_MMRBC_MASK	0x0060	e1000_hw.h
16696	PCIX_STATUS_HI_MMRBC_SHIFT	0x5	e1000_hw.h
16697	PCIX_STATUS_HI_MMRBC_4K	0x3	e1000_hw.h
16698	PCIX_STATUS_HI_MMRBC_2K	0x2	e1000_hw.h
16699	PAUSE_SHIFT	5	e1000_hw.h
16700	SWDPIO_SHIFT	17	e1000_hw.h
16701	SWDPIO__EXT_SHIFT	4	e1000_hw.h
16702	ILOS_SHIFT	3	e1000_hw.h
16703	RECEIVE_BUFFER_ALIGN_SIZE	(256)	e1000_hw.h
16704	LINK_UP_TIMEOUT	500	e1000_hw.h
16705	MASTER_DISABLE_TIMEOUT	800	e1000_hw.h
16706	AUTO_READ_DONE_TIMEOUT	10	e1000_hw.h
16707	PHY_CFG_TIMEOUT	100	e1000_hw.h
16708	E1000_TX_BUFFER_SIZE	((uint32_t)1514)	e1000_hw.h
16709	CARRIER_EXTENSION	0x0F	e1000_hw.h
16710	E1000_CTRL_PHY_RESET_DIR	E1000_CTRL_SWDPIO0	e1000_hw.h
16711	E1000_CTRL_PHY_RESET	E1000_CTRL_SWDPIN0	e1000_hw.h
16712	E1000_CTRL_MDIO_DIR	E1000_CTRL_SWDPIO2	e1000_hw.h
16713	E1000_CTRL_MDIO	E1000_CTRL_SWDPIN2	e1000_hw.h
16714	E1000_CTRL_MDC_DIR	E1000_CTRL_SWDPIO3	e1000_hw.h
16715	E1000_CTRL_MDC	E1000_CTRL_SWDPIN3	e1000_hw.h
16716	E1000_CTRL_PHY_RESET_DIR4	E1000_CTRL_EXT_SDP4_DIR	e1000_hw.h
16717	E1000_CTRL_PHY_RESET4	E1000_CTRL_EXT_SDP4_DATA	e1000_hw.h
16718	PHY_CTRL	0x00	e1000_hw.h	Control Register
16719	PHY_STATUS	0x01	e1000_hw.h	Status Regiser
16720	PHY_ID1	0x02	e1000_hw.h	Phy Id Reg (word 1)
16721	PHY_ID2	0x03	e1000_hw.h	Phy Id Reg (word 2)
16722	PHY_AUTONEG_ADV	0x04	e1000_hw.h	Autoneg Advertisement
16723	PHY_LP_ABILITY	0x05	e1000_hw.h	Link Partner Ability (Base Page)
16724	PHY_AUTONEG_EXP	0x06	e1000_hw.h	Autoneg Expansion Reg
16725	PHY_NEXT_PAGE_TX	0x07	e1000_hw.h	Next Page TX
16726	PHY_LP_NEXT_PAGE	0x08	e1000_hw.h	Link Partner Next Page
16727	PHY_1000T_CTRL	0x09	e1000_hw.h	1000Base-T Control Reg
16728	PHY_1000T_STATUS	0x0A	e1000_hw.h	1000Base-T Status Reg
16729	PHY_EXT_STATUS	0x0F	e1000_hw.h	Extended Status Reg
16730	MAX_PHY_REG_ADDRESS	0x1F	e1000_hw.h	5 bit address bus (0-0x1F)
16731	MAX_PHY_MULTI_PAGE_REG	0xF	e1000_hw.h	Registers equal on all pages
16732	M88E1000_PHY_SPEC_CTRL	0x10	e1000_hw.h	PHY Specific Control Register
16733	M88E1000_PHY_SPEC_STATUS	0x11	e1000_hw.h	PHY Specific Status Register
16734	M88E1000_INT_ENABLE	0x12	e1000_hw.h	Interrupt Enable Register
16735	M88E1000_INT_STATUS	0x13	e1000_hw.h	Interrupt Status Register
16736	M88E1000_EXT_PHY_SPEC_CTRL	0x14	e1000_hw.h	Extended PHY Specific Control
16737	M88E1000_RX_ERR_CNTR	0x15	e1000_hw.h	Receive Error Counter
16738	M88E1000_PHY_EXT_CTRL	0x1A	e1000_hw.h	PHY extend control register
16739	M88E1000_PHY_PAGE_SELECT	0x1D	e1000_hw.h	Reg 29 for page number setting
16740	M88E1000_PHY_GEN_CONTROL	0x1E	e1000_hw.h	Its meaning depends on reg 29
16741	M88E1000_PHY_VCO_REG_BIT8	0x100	e1000_hw.h	Bits 8 & 11 are adjusted for
16742	M88E1000_PHY_VCO_REG_BIT11	0x800	e1000_hw.h	improved BER performance
16743	IGP01E1000_IEEE_REGS_PAGE	0x0000	e1000_hw.h
16744	IGP01E1000_IEEE_RESTART_AUTONEG	0x3300	e1000_hw.h
16745	IGP01E1000_IEEE_FORCE_GIGA	0x0140	e1000_hw.h
16746	IGP01E1000_PHY_PORT_CONFIG	0x10	e1000_hw.h	PHY Specific Port Config Register
16747	IGP01E1000_PHY_PORT_STATUS	0x11	e1000_hw.h	PHY Specific Status Register
16748	IGP01E1000_PHY_PORT_CTRL	0x12	e1000_hw.h	PHY Specific Control Register
16749	IGP01E1000_PHY_LINK_HEALTH	0x13	e1000_hw.h	PHY Link Health Register
16750	IGP01E1000_GMII_FIFO	0x14	e1000_hw.h	GMII FIFO Register
16751	IGP01E1000_PHY_CHANNEL_QUALITY	0x15	e1000_hw.h	PHY Channel Quality Register
16752	IGP02E1000_PHY_POWER_MGMT	0x19	e1000_hw.h
16753	IGP01E1000_PHY_PAGE_SELECT	0x1F	e1000_hw.h	PHY Page Select Core Register
16754	IGP01E1000_PHY_AGC_A	0x1172	e1000_hw.h
16755	IGP01E1000_PHY_AGC_B	0x1272	e1000_hw.h
16756	IGP01E1000_PHY_AGC_C	0x1472	e1000_hw.h
16757	IGP01E1000_PHY_AGC_D	0x1872	e1000_hw.h
16758	IGP02E1000_PHY_AGC_A	0x11B1	e1000_hw.h
16759	IGP02E1000_PHY_AGC_B	0x12B1	e1000_hw.h
16760	IGP02E1000_PHY_AGC_C	0x14B1	e1000_hw.h
16761	IGP02E1000_PHY_AGC_D	0x18B1	e1000_hw.h
16762	IGP01E1000_PHY_DSP_RESET	0x1F33	e1000_hw.h
16763	IGP01E1000_PHY_DSP_SET	0x1F71	e1000_hw.h
16764	IGP01E1000_PHY_DSP_FFE	0x1F35	e1000_hw.h
16765	IGP01E1000_PHY_CHANNEL_NUM	4	e1000_hw.h
16766	IGP02E1000_PHY_CHANNEL_NUM	4	e1000_hw.h
16767	IGP01E1000_PHY_AGC_PARAM_A	0x1171	e1000_hw.h
16768	IGP01E1000_PHY_AGC_PARAM_B	0x1271	e1000_hw.h
16769	IGP01E1000_PHY_AGC_PARAM_C	0x1471	e1000_hw.h
16770	IGP01E1000_PHY_AGC_PARAM_D	0x1871	e1000_hw.h
16771	IGP01E1000_PHY_EDAC_MU_INDEX	0xC000	e1000_hw.h
16772	IGP01E1000_PHY_EDAC_SIGN_EXT_9_	0x8000	e1000_hw.h
16773	IGP01E1000_PHY_ANALOG_TX_STATE	0x2890	e1000_hw.h
16774	IGP01E1000_PHY_ANALOG_CLASS_A	0x2000	e1000_hw.h
16775	IGP01E1000_PHY_FORCE_ANALOG_ENA	0x0004	e1000_hw.h
16776	IGP01E1000_PHY_DSP_FFE_CM_CP	0x0069	e1000_hw.h
16777	IGP01E1000_PHY_DSP_FFE_DEFAULT	0x002A	e1000_hw.h
16778	IGP01E1000_PHY_PCS_INIT_REG	0x00B4	e1000_hw.h
16779	IGP01E1000_PHY_PCS_CTRL_REG	0x00B5	e1000_hw.h
16780	IGP01E1000_ANALOG_REGS_PAGE	0x20C0	e1000_hw.h
16781	GG82563_PAGE_SHIFT	5	e1000_hw.h
16782	GG82563_MIN_ALT_REG	30	e1000_hw.h
16783	GG82563_PHY_SPEC_CTRL	GG82563_REG(0, 16)	e1000_hw.h	PHY Specific Control
16784	GG82563_PHY_SPEC_STATUS	GG82563_REG(0, 17)	e1000_hw.h	PHY Specific Status
16785	GG82563_PHY_INT_ENABLE	GG82563_REG(0, 18)	e1000_hw.h	Interrupt Enable
16786	GG82563_PHY_SPEC_STATUS_2	GG82563_REG(0, 19)	e1000_hw.h	PHY Specific Status 2
16787	GG82563_PHY_RX_ERR_CNTR	GG82563_REG(0, 21)	e1000_hw.h	Receive Error Counter
16788	GG82563_PHY_PAGE_SELECT	GG82563_REG(0, 22)	e1000_hw.h	Page Select
16789	GG82563_PHY_SPEC_CTRL_2	GG82563_REG(0, 26)	e1000_hw.h	PHY Specific Control 2
16790	GG82563_PHY_PAGE_SELECT_ALT	GG82563_REG(0, 29)	e1000_hw.h	Alternate Page Select
16791	GG82563_PHY_TEST_CLK_CTRL	GG82563_REG(0, 30)	e1000_hw.h	Test Clock Control (use reg. 29 to select)
16792	GG82563_PHY_MAC_SPEC_CTRL	GG82563_REG(2, 21)	e1000_hw.h	MAC Specific Control Register
16793	GG82563_PHY_MAC_SPEC_CTRL_2	GG82563_REG(2, 26)	e1000_hw.h	MAC Specific Control 2
16794	GG82563_PHY_DSP_DISTANCE	GG82563_REG(5, 26)	e1000_hw.h	DSP Distance
16795	GG82563_PHY_KMRN_MODE_CTRL	GG82563_REG(193, 16)	e1000_hw.h	Kumeran Mode Control
16796	GG82563_PHY_PORT_RESET	GG82563_REG(193, 17)	e1000_hw.h	Port Reset
16797	GG82563_PHY_REVISION_ID	GG82563_REG(193, 18)	e1000_hw.h	Revision ID
16798	GG82563_PHY_DEVICE_ID	GG82563_REG(193, 19)	e1000_hw.h	Device ID
16799	GG82563_PHY_PWR_MGMT_CTRL	GG82563_REG(193, 20)	e1000_hw.h	Power Management Control
16800	GG82563_PHY_RATE_ADAPT_CTRL	GG82563_REG(193, 25)	e1000_hw.h	Rate Adaptation Control
16801	GG82563_PHY_KMRN_FIFO_CTRL_STAT	GG82563_REG(194, 16)	e1000_hw.h	FIFO's Control/Status
16802	GG82563_PHY_KMRN_CTRL	GG82563_REG(194, 17)	e1000_hw.h	Control
16803	GG82563_PHY_INBAND_CTRL	GG82563_REG(194, 18)	e1000_hw.h	Inband Control
16804	GG82563_PHY_KMRN_DIAGNOSTIC	GG82563_REG(194, 19)	e1000_hw.h	Diagnostic
16805	GG82563_PHY_ACK_TIMEOUTS	GG82563_REG(194, 20)	e1000_hw.h	Acknowledge Timeouts
16806	GG82563_PHY_ADV_ABILITY	GG82563_REG(194, 21)	e1000_hw.h	Advertised Ability
16807	GG82563_PHY_LINK_PARTNER_ADV_AB	GG82563_REG(194, 23)	e1000_hw.h	Link Partner Advertised Ability
16808	GG82563_PHY_ADV_NEXT_PAGE	GG82563_REG(194, 24)	e1000_hw.h	Advertised Next Page
16809	GG82563_PHY_LINK_PARTNER_ADV_NE	GG82563_REG(194, 25)	e1000_hw.h	Link Partner Advertised Next page
16810	GG82563_PHY_KMRN_MISC	GG82563_REG(194, 26)	e1000_hw.h	Misc.
16811	MII_CR_SPEED_SELECT_MSB	0x0040	e1000_hw.h	bits 6,13: 10=1000, 01=100, 00=10
16812	MII_CR_COLL_TEST_ENABLE	0x0080	e1000_hw.h	Collision test enable
16813	MII_CR_FULL_DUPLEX	0x0100	e1000_hw.h	FDX =1, half duplex =0
16814	MII_CR_RESTART_AUTO_NEG	0x0200	e1000_hw.h	Restart auto negotiation
16815	MII_CR_ISOLATE	0x0400	e1000_hw.h	Isolate PHY from MII
16816	MII_CR_POWER_DOWN	0x0800	e1000_hw.h	Power down
16817	MII_CR_AUTO_NEG_EN	0x1000	e1000_hw.h	Auto Neg Enable
16818	MII_CR_SPEED_SELECT_LSB	0x2000	e1000_hw.h	bits 6,13: 10=1000, 01=100, 00=10
16819	MII_CR_LOOPBACK	0x4000	e1000_hw.h	0 = normal, 1 = loopback
16820	MII_CR_RESET	0x8000	e1000_hw.h	0 = normal, 1 = PHY reset
16821	MII_SR_EXTENDED_CAPS	0x0001	e1000_hw.h	Extended register capabilities
16822	MII_SR_JABBER_DETECT	0x0002	e1000_hw.h	Jabber Detected
16823	MII_SR_LINK_STATUS	0x0004	e1000_hw.h	Link Status 1 = link
16824	MII_SR_AUTONEG_CAPS	0x0008	e1000_hw.h	Auto Neg Capable
16825	MII_SR_REMOTE_FAULT	0x0010	e1000_hw.h	Remote Fault Detect
16826	MII_SR_AUTONEG_COMPLETE	0x0020	e1000_hw.h	Auto Neg Complete
16827	MII_SR_PREAMBLE_SUPPRESS	0x0040	e1000_hw.h	Preamble may be suppressed
16828	MII_SR_EXTENDED_STATUS	0x0100	e1000_hw.h	Ext. status info in Reg 0x0F
16829	MII_SR_100T2_HD_CAPS	0x0200	e1000_hw.h	100T2 Half Duplex Capable
16830	MII_SR_100T2_FD_CAPS	0x0400	e1000_hw.h	100T2 Full Duplex Capable
16831	MII_SR_10T_HD_CAPS	0x0800	e1000_hw.h	10T Half Duplex Capable
16832	MII_SR_10T_FD_CAPS	0x1000	e1000_hw.h	10T Full Duplex Capable
16833	MII_SR_100X_HD_CAPS	0x2000	e1000_hw.h	100X Half Duplex Capable
16834	MII_SR_100X_FD_CAPS	0x4000	e1000_hw.h	100X Full Duplex Capable
16835	MII_SR_100T4_CAPS	0x8000	e1000_hw.h	100T4 Capable
16836	NWAY_AR_SELECTOR_FIELD	0x0001	e1000_hw.h	indicates IEEE 802.3 CSMA/CD
16837	NWAY_AR_10T_HD_CAPS	0x0020	e1000_hw.h	10T Half Duplex Capable
16838	NWAY_AR_10T_FD_CAPS	0x0040	e1000_hw.h	10T Full Duplex Capable
16839	NWAY_AR_100TX_HD_CAPS	0x0080	e1000_hw.h	100TX Half Duplex Capable
16840	NWAY_AR_100TX_FD_CAPS	0x0100	e1000_hw.h	100TX Full Duplex Capable
16841	NWAY_AR_100T4_CAPS	0x0200	e1000_hw.h	100T4 Capable
16842	NWAY_AR_PAUSE	0x0400	e1000_hw.h	Pause operation desired
16843	NWAY_AR_ASM_DIR	0x0800	e1000_hw.h	Asymmetric Pause Direction bit
16844	NWAY_AR_REMOTE_FAULT	0x2000	e1000_hw.h	Remote Fault detected
16845	NWAY_AR_NEXT_PAGE	0x8000	e1000_hw.h	Next Page ability supported
16846	NWAY_LPAR_SELECTOR_FIELD	0x0000	e1000_hw.h	LP protocol selector field
16847	NWAY_LPAR_10T_HD_CAPS	0x0020	e1000_hw.h	LP is 10T Half Duplex Capable
16848	NWAY_LPAR_10T_FD_CAPS	0x0040	e1000_hw.h	LP is 10T Full Duplex Capable
16849	NWAY_LPAR_100TX_HD_CAPS	0x0080	e1000_hw.h	LP is 100TX Half Duplex Capable
16850	NWAY_LPAR_100TX_FD_CAPS	0x0100	e1000_hw.h	LP is 100TX Full Duplex Capable
16851	NWAY_LPAR_100T4_CAPS	0x0200	e1000_hw.h	LP is 100T4 Capable
16852	NWAY_LPAR_PAUSE	0x0400	e1000_hw.h	LP Pause operation desired
16853	NWAY_LPAR_ASM_DIR	0x0800	e1000_hw.h	LP Asymmetric Pause Direction bit
16854	NWAY_LPAR_REMOTE_FAULT	0x2000	e1000_hw.h	LP has detected Remote Fault
16855	NWAY_LPAR_ACKNOWLEDGE	0x4000	e1000_hw.h	LP has rx'd link code word
16856	NWAY_LPAR_NEXT_PAGE	0x8000	e1000_hw.h	Next Page ability supported
16857	NWAY_ER_LP_NWAY_CAPS	0x0001	e1000_hw.h	LP has Auto Neg Capability
16858	NWAY_ER_PAGE_RXD	0x0002	e1000_hw.h	LP is 10T Half Duplex Capable
16859	NWAY_ER_NEXT_PAGE_CAPS	0x0004	e1000_hw.h	LP is 10T Full Duplex Capable
16860	NWAY_ER_LP_NEXT_PAGE_CAPS	0x0008	e1000_hw.h	LP is 100TX Half Duplex Capable
16861	NWAY_ER_PAR_DETECT_FAULT	0x0010	e1000_hw.h	LP is 100TX Full Duplex Capable
16862	NPTX_MSG_CODE_FIELD	0x0001	e1000_hw.h	NP msg code or unformatted data
16863	NPTX_TOGGLE	0x0800	e1000_hw.h	Toggles between exchanges
16864	NPTX_ACKNOWLDGE2	0x1000	e1000_hw.h	1 = will comply with msg
16865	NPTX_MSG_PAGE	0x2000	e1000_hw.h	formatted(1)/unformatted(0) pg
16866	NPTX_NEXT_PAGE	0x8000	e1000_hw.h	1 = addition NP will follow
16867	LP_RNPR_MSG_CODE_FIELD	0x0001	e1000_hw.h	NP msg code or unformatted data
16868	LP_RNPR_TOGGLE	0x0800	e1000_hw.h	Toggles between exchanges
16869	LP_RNPR_ACKNOWLDGE2	0x1000	e1000_hw.h	1 = will comply with msg
16870	LP_RNPR_MSG_PAGE	0x2000	e1000_hw.h	formatted(1)/unformatted(0) pg
16871	LP_RNPR_ACKNOWLDGE	0x4000	e1000_hw.h	1 = ACK / 0 = NO ACK
16872	LP_RNPR_NEXT_PAGE	0x8000	e1000_hw.h	1 = addition NP will follow
16873	CR_1000T_ASYM_PAUSE	0x0080	e1000_hw.h	Advertise asymmetric pause bit
16874	CR_1000T_HD_CAPS	0x0100	e1000_hw.h	Advertise 1000T HD capability
16875	CR_1000T_FD_CAPS	0x0200	e1000_hw.h	Advertise 1000T FD capability
16876	CR_1000T_REPEATER_DTE	0x0400	e1000_hw.h	1=Repeater/switch device port
16877	CR_1000T_MS_VALUE	0x0800	e1000_hw.h	1=Configure PHY as Master
16878	CR_1000T_MS_ENABLE	0x1000	e1000_hw.h	1=Master/Slave manual config value
16879	CR_1000T_TEST_MODE_NORMAL	0x0000	e1000_hw.h	Normal Operation
16880	CR_1000T_TEST_MODE_1	0x2000	e1000_hw.h	Transmit Waveform test
16881	CR_1000T_TEST_MODE_2	0x4000	e1000_hw.h	Master Transmit Jitter test
16882	CR_1000T_TEST_MODE_3	0x6000	e1000_hw.h	Slave Transmit Jitter test
16883	CR_1000T_TEST_MODE_4	0x8000	e1000_hw.h	Transmitter Distortion test
16884	SR_1000T_IDLE_ERROR_CNT	0x00FF	e1000_hw.h	Num idle errors since last read
16885	SR_1000T_ASYM_PAUSE_DIR	0x0100	e1000_hw.h	LP asymmetric pause direction bit
16886	SR_1000T_LP_HD_CAPS	0x0400	e1000_hw.h	LP is 1000T HD capable
16887	SR_1000T_LP_FD_CAPS	0x0800	e1000_hw.h	LP is 1000T FD capable
16888	SR_1000T_REMOTE_RX_STATUS	0x1000	e1000_hw.h	Remote receiver OK
16889	SR_1000T_LOCAL_RX_STATUS	0x2000	e1000_hw.h	Local receiver OK
16890	SR_1000T_MS_CONFIG_RES	0x4000	e1000_hw.h	1=Local TX is Master, 0=Slave
16891	SR_1000T_MS_CONFIG_FAULT	0x8000	e1000_hw.h	Master/Slave config fault
16892	SR_1000T_REMOTE_RX_STATUS_SHIFT	12	e1000_hw.h
16893	SR_1000T_LOCAL_RX_STATUS_SHIFT	13	e1000_hw.h
16894	SR_1000T_PHY_EXCESSIVE_IDLE_ERR	5	e1000_hw.h
16895	FFE_IDLE_ERR_COUNT_TIMEOUT_20	20	e1000_hw.h
16896	FFE_IDLE_ERR_COUNT_TIMEOUT_100	100	e1000_hw.h
16897	IEEE_ESR_1000T_HD_CAPS	0x1000	e1000_hw.h	1000T HD capable
16898	IEEE_ESR_1000T_FD_CAPS	0x2000	e1000_hw.h	1000T FD capable
16899	IEEE_ESR_1000X_HD_CAPS	0x4000	e1000_hw.h	1000X HD capable
16900	IEEE_ESR_1000X_FD_CAPS	0x8000	e1000_hw.h	1000X FD capable
16901	PHY_TX_POLARITY_MASK	0x0100	e1000_hw.h	register 10h bit 8 (polarity bit)
16902	PHY_TX_NORMAL_POLARITY	0	e1000_hw.h	register 10h bit 8 (normal polarity)
16903	AUTO_POLARITY_DISABLE	0x0010	e1000_hw.h	register 11h bit 4
16904	M88E1000_PSCR_JABBER_DISABLE	0x0001	e1000_hw.h	1=Jabber Function disabled
16905	M88E1000_PSCR_POLARITY_REVERSAL	0x0002	e1000_hw.h	1=Polarity Reversal enabled
16906	M88E1000_PSCR_SQE_TEST	0x0004	e1000_hw.h	1=SQE Test enabled
16907	M88E1000_PSCR_CLK125_DISABLE	0x0010	e1000_hw.h	1=CLK125 low,
16908	M88E1000_PSCR_MDI_MANUAL_MODE	0x0000	e1000_hw.h	MDI Crossover Mode bits 6:5
16909	M88E1000_PSCR_MDIX_MANUAL_MODE	0x0020	e1000_hw.h	Manual MDIX configuration
16910	M88E1000_PSCR_AUTO_X_1000T	0x0040	e1000_hw.h	1000BASE-T: Auto crossover,
16911	M88E1000_PSCR_AUTO_X_MODE	0x0060	e1000_hw.h	Auto crossover enabled
16912	M88E1000_PSCR_10BT_EXT_DIST_ENA	0x0080	e1000_hw.h
16913	M88E1000_PSCR_MII_5BIT_ENABLE	0x0100	e1000_hw.h
16914	M88E1000_PSCR_SCRAMBLER_DISABLE	0x0200	e1000_hw.h	1=Scrambler disable
16915	M88E1000_PSCR_FORCE_LINK_GOOD	0x0400	e1000_hw.h	1=Force link good
16916	M88E1000_PSCR_ASSERT_CRS_ON_TX	0x0800	e1000_hw.h	1=Assert CRS on Transmit
16917	M88E1000_PSCR_POLARITY_REVERSAL	1	e1000_hw.h
16918	M88E1000_PSCR_AUTO_X_MODE_SHIFT	5	e1000_hw.h
16919	M88E1000_PSCR_10BT_EXT_DIST_ENA	7	e1000_hw.h
16920	M88E1000_PSSR_JABBER	0x0001	e1000_hw.h	1=Jabber
16921	M88E1000_PSSR_REV_POLARITY	0x0002	e1000_hw.h	1=Polarity reversed
16922	M88E1000_PSSR_DOWNSHIFT	0x0020	e1000_hw.h	1=Downshifted
16923	M88E1000_PSSR_MDIX	0x0040	e1000_hw.h	1=MDIX; 0=MDI
16924	M88E1000_PSSR_CABLE_LENGTH	0x0380	e1000_hw.h	0=<50M;1=50-80M;2=80-110M;
16925	M88E1000_PSSR_LINK	0x0400	e1000_hw.h	1=Link up, 0=Link down
16926	M88E1000_PSSR_SPD_DPLX_RESOLVED	0x0800	e1000_hw.h	1=Speed & Duplex resolved
16927	M88E1000_PSSR_PAGE_RCVD	0x1000	e1000_hw.h	1=Page received
16928	M88E1000_PSSR_DPLX	0x2000	e1000_hw.h	1=Duplex 0=Half Duplex
16929	M88E1000_PSSR_SPEED	0xC000	e1000_hw.h	Speed, bits 14:15
16930	M88E1000_PSSR_10MBS	0x0000	e1000_hw.h	00=10Mbs
16931	M88E1000_PSSR_100MBS	0x4000	e1000_hw.h	01=100Mbs
16932	M88E1000_PSSR_1000MBS	0x8000	e1000_hw.h	10=1000Mbs
16933	M88E1000_PSSR_REV_POLARITY_SHIF	1	e1000_hw.h
16934	M88E1000_PSSR_DOWNSHIFT_SHIFT	5	e1000_hw.h
16935	M88E1000_PSSR_MDIX_SHIFT	6	e1000_hw.h
16936	M88E1000_PSSR_CABLE_LENGTH_SHIF	7	e1000_hw.h
16937	M88E1000_EPSCR_FIBER_LOOPBACK	0x4000	e1000_hw.h	1=Fiber loopback
16938	M88E1000_EPSCR_DOWN_NO_IDLE	0x8000	e1000_hw.h	1=Lost lock detect enabled.
16939	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0C00	e1000_hw.h
16940	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0000	e1000_hw.h
16941	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0400	e1000_hw.h
16942	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0800	e1000_hw.h
16943	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0C00	e1000_hw.h
16944	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0300	e1000_hw.h
16945	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0000	e1000_hw.h
16946	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0100	e1000_hw.h
16947	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0200	e1000_hw.h
16948	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0300	e1000_hw.h
16949	M88E1000_EPSCR_TX_CLK_2_5	0x0060	e1000_hw.h	2.5 MHz TX_CLK
16950	M88E1000_EPSCR_TX_CLK_25	0x0070	e1000_hw.h	25 MHz TX_CLK
16951	M88E1000_EPSCR_TX_CLK_0	0x0000	e1000_hw.h	NO TX_CLK
16952	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0E00	e1000_hw.h
16953	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0000	e1000_hw.h
16954	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0200	e1000_hw.h
16955	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0400	e1000_hw.h
16956	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0600	e1000_hw.h
16957	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0800	e1000_hw.h
16958	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0A00	e1000_hw.h
16959	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0C00	e1000_hw.h
16960	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0E00	e1000_hw.h
16961	IGP01E1000_PSCFR_AUTO_MDIX_PAR_	0x0010	e1000_hw.h
16962	IGP01E1000_PSCFR_PRE_EN	0x0020	e1000_hw.h
16963	IGP01E1000_PSCFR_SMART_SPEED	0x0080	e1000_hw.h
16964	IGP01E1000_PSCFR_DISABLE_TPLOOP	0x0100	e1000_hw.h
16965	IGP01E1000_PSCFR_DISABLE_JABBER	0x0400	e1000_hw.h
16966	IGP01E1000_PSCFR_DISABLE_TRANSM	0x2000	e1000_hw.h
16967	IGP01E1000_PSSR_AUTONEG_FAILED	0x0001	e1000_hw.h	RO LH SC
16968	IGP01E1000_PSSR_POLARITY_REVERS	0x0002	e1000_hw.h
16969	IGP01E1000_PSSR_CABLE_LENGTH	0x007C	e1000_hw.h
16970	IGP01E1000_PSSR_FULL_DUPLEX	0x0200	e1000_hw.h
16971	IGP01E1000_PSSR_LINK_UP	0x0400	e1000_hw.h
16972	IGP01E1000_PSSR_MDIX	0x0800	e1000_hw.h
16973	IGP01E1000_PSSR_SPEED_MASK	0xC000	e1000_hw.h	speed bits mask
16974	IGP01E1000_PSSR_SPEED_10MBPS	0x4000	e1000_hw.h
16975	IGP01E1000_PSSR_SPEED_100MBPS	0x8000	e1000_hw.h
16976	IGP01E1000_PSSR_SPEED_1000MBPS	0xC000	e1000_hw.h
16977	IGP01E1000_PSSR_CABLE_LENGTH_SH	0x0002	e1000_hw.h	shift right 2
16978	IGP01E1000_PSSR_MDIX_SHIFT	0x000B	e1000_hw.h	shift right 11
16979	IGP01E1000_PSCR_TP_LOOPBACK	0x0010	e1000_hw.h
16980	IGP01E1000_PSCR_CORRECT_NC_SCMB	0x0200	e1000_hw.h
16981	IGP01E1000_PSCR_TEN_CRS_SELECT	0x0400	e1000_hw.h
16982	IGP01E1000_PSCR_FLIP_CHIP	0x0800	e1000_hw.h
16983	IGP01E1000_PSCR_AUTO_MDIX	0x1000	e1000_hw.h
16984	IGP01E1000_PSCR_FORCE_MDI_MDIX	0x2000	e1000_hw.h	0-MDI, 1-MDIX
16985	IGP01E1000_PLHR_SS_DOWNGRADE	0x8000	e1000_hw.h
16986	IGP01E1000_PLHR_GIG_SCRAMBLER_E	0x4000	e1000_hw.h
16987	IGP01E1000_PLHR_MASTER_FAULT	0x2000	e1000_hw.h
16988	IGP01E1000_PLHR_MASTER_RESOLUTI	0x1000	e1000_hw.h
16989	IGP01E1000_PLHR_GIG_REM_RCVR_NO	0x0800	e1000_hw.h	LH
16990	IGP01E1000_PLHR_IDLE_ERROR_CNT_	0x0400	e1000_hw.h	LH
16991	IGP01E1000_PLHR_DATA_ERR_1	0x0200	e1000_hw.h	LH
16992	IGP01E1000_PLHR_DATA_ERR_0	0x0100	e1000_hw.h
16993	IGP01E1000_PLHR_AUTONEG_FAULT	0x0040	e1000_hw.h
16994	IGP01E1000_PLHR_AUTONEG_ACTIVE	0x0010	e1000_hw.h
16995	IGP01E1000_PLHR_VALID_CHANNEL_D	0x0008	e1000_hw.h
16996	IGP01E1000_PLHR_VALID_CHANNEL_C	0x0004	e1000_hw.h
16997	IGP01E1000_PLHR_VALID_CHANNEL_B	0x0002	e1000_hw.h
16998	IGP01E1000_PLHR_VALID_CHANNEL_A	0x0001	e1000_hw.h
16999	IGP01E1000_MSE_CHANNEL_D	0x000F	e1000_hw.h
17000	IGP01E1000_MSE_CHANNEL_C	0x00F0	e1000_hw.h
17001	IGP01E1000_MSE_CHANNEL_B	0x0F00	e1000_hw.h
17002	IGP01E1000_MSE_CHANNEL_A	0xF000	e1000_hw.h
17003	IGP02E1000_PM_SPD	0x0001	e1000_hw.h	Smart Power Down
17004	IGP02E1000_PM_D3_LPLU	0x0004	e1000_hw.h	Enable LPLU in non-D0a modes
17005	IGP02E1000_PM_D0_LPLU	0x0002	e1000_hw.h	Enable LPLU in D0a mode
17006	DSP_RESET_ENABLE	0x0	e1000_hw.h
17007	DSP_RESET_DISABLE	0x2	e1000_hw.h
17008	E1000_MAX_DSP_RESETS	10	e1000_hw.h
17009	IGP01E1000_AGC_LENGTH_SHIFT	7	e1000_hw.h	Coarse - 13:11, Fine - 10:7
17010	IGP02E1000_AGC_LENGTH_SHIFT	9	e1000_hw.h	Coarse - 15:13, Fine - 12:9
17011	IGP02E1000_AGC_LENGTH_MASK	0x7F	e1000_hw.h
17012	IGP01E1000_AGC_LENGTH_TABLE_SIZ	128	e1000_hw.h
17013	IGP02E1000_AGC_LENGTH_TABLE_SIZ	113	e1000_hw.h
17014	IGP01E1000_AGC_RANGE	10	e1000_hw.h
17015	IGP02E1000_AGC_RANGE	15	e1000_hw.h
17016	IGP01E1000_PHY_POLARITY_MASK	0x0078	e1000_hw.h
17017	IGP01E1000_GMII_FLEX_SPD	0x10	e1000_hw.h	Enable flexible speed
17018	IGP01E1000_GMII_SPD	0x20	e1000_hw.h	Enable SPD
17019	IGP01E1000_ANALOG_SPARE_FUSE_ST	0x20D1	e1000_hw.h
17020	IGP01E1000_ANALOG_FUSE_STATUS	0x20D0	e1000_hw.h
17021	IGP01E1000_ANALOG_FUSE_CONTROL	0x20DC	e1000_hw.h
17022	IGP01E1000_ANALOG_FUSE_BYPASS	0x20DE	e1000_hw.h
17023	IGP01E1000_ANALOG_FUSE_POLY_MAS	0xF000	e1000_hw.h
17024	IGP01E1000_ANALOG_FUSE_FINE_MAS	0x0F80	e1000_hw.h
17025	IGP01E1000_ANALOG_FUSE_COARSE_M	0x0070	e1000_hw.h
17026	IGP01E1000_ANALOG_SPARE_FUSE_EN	0x0100	e1000_hw.h
17027	IGP01E1000_ANALOG_FUSE_ENABLE_S	0x0002	e1000_hw.h
17028	IGP01E1000_ANALOG_FUSE_COARSE_T	0x0040	e1000_hw.h
17029	IGP01E1000_ANALOG_FUSE_COARSE_1	0x0010	e1000_hw.h
17030	IGP01E1000_ANALOG_FUSE_FINE_1	0x0080	e1000_hw.h
17031	IGP01E1000_ANALOG_FUSE_FINE_10	0x0500	e1000_hw.h
17032	GG82563_PSCR_DISABLE_JABBER	0x0001	e1000_hw.h	1=Disable Jabber
17033	GG82563_PSCR_POLARITY_REVERSAL_	0x0002	e1000_hw.h	1=Polarity Reversal Disabled
17034	GG82563_PSCR_POWER_DOWN	0x0004	e1000_hw.h	1=Power Down
17035	GG82563_PSCR_COPPER_TRANSMITER_	0x0008	e1000_hw.h	1=Transmitter Disabled
17036	GG82563_PSCR_CROSSOVER_MODE_MAS	0x0060	e1000_hw.h
17037	GG82563_PSCR_CROSSOVER_MODE_MDI	0x0000	e1000_hw.h	00=Manual MDI configuration
17038	GG82563_PSCR_CROSSOVER_MODE_MDI	0x0020	e1000_hw.h	01=Manual MDIX configuration
17039	GG82563_PSCR_CROSSOVER_MODE_AUT	0x0060	e1000_hw.h	11=Automatic crossover
17040	GG82563_PSCR_ENALBE_EXTENDED_DI	0x0080	e1000_hw.h	1=Enable Extended Distance
17041	GG82563_PSCR_ENERGY_DETECT_MASK	0x0300	e1000_hw.h
17042	GG82563_PSCR_ENERGY_DETECT_OFF	0x0000	e1000_hw.h	00,01=Off
17043	GG82563_PSCR_ENERGY_DETECT_RX	0x0200	e1000_hw.h	10=Sense on Rx only (Energy Detect)
17044	GG82563_PSCR_ENERGY_DETECT_RX_T	0x0300	e1000_hw.h	11=Sense and Tx NLP
17045	GG82563_PSCR_FORCE_LINK_GOOD	0x0400	e1000_hw.h	1=Force Link Good
17046	GG82563_PSCR_DOWNSHIFT_ENABLE	0x0800	e1000_hw.h	1=Enable Downshift
17047	GG82563_PSCR_DOWNSHIFT_COUNTER_	0x7000	e1000_hw.h
17048	GG82563_PSCR_DOWNSHIFT_COUNTER_	12	e1000_hw.h
17049	GG82563_PSSR_JABBER	0x0001	e1000_hw.h	1=Jabber
17050	GG82563_PSSR_POLARITY	0x0002	e1000_hw.h	1=Polarity Reversed
17051	GG82563_PSSR_LINK	0x0008	e1000_hw.h	1=Link is Up
17052	GG82563_PSSR_ENERGY_DETECT	0x0010	e1000_hw.h	1=Sleep, 0=Active
17053	GG82563_PSSR_DOWNSHIFT	0x0020	e1000_hw.h	1=Downshift
17054	GG82563_PSSR_CROSSOVER_STATUS	0x0040	e1000_hw.h	1=MDIX, 0=MDI
17055	GG82563_PSSR_RX_PAUSE_ENABLED	0x0100	e1000_hw.h	1=Receive Pause Enabled
17056	GG82563_PSSR_TX_PAUSE_ENABLED	0x0200	e1000_hw.h	1=Transmit Pause Enabled
17057	GG82563_PSSR_LINK_UP	0x0400	e1000_hw.h	1=Link Up
17058	GG82563_PSSR_SPEED_DUPLEX_RESOL	0x0800	e1000_hw.h	1=Resolved
17059	GG82563_PSSR_PAGE_RECEIVED	0x1000	e1000_hw.h	1=Page Received
17060	GG82563_PSSR_DUPLEX	0x2000	e1000_hw.h	1-Full-Duplex
17061	GG82563_PSSR_SPEED_MASK	0xC000	e1000_hw.h
17062	GG82563_PSSR_SPEED_10MBPS	0x0000	e1000_hw.h	00=10Mbps
17063	GG82563_PSSR_SPEED_100MBPS	0x4000	e1000_hw.h	01=100Mbps
17064	GG82563_PSSR_SPEED_1000MBPS	0x8000	e1000_hw.h	10=1000Mbps
17065	GG82563_PSSR2_JABBER	0x0001	e1000_hw.h	1=Jabber
17066	GG82563_PSSR2_POLARITY_CHANGED	0x0002	e1000_hw.h	1=Polarity Changed
17067	GG82563_PSSR2_ENERGY_DETECT_CHA	0x0010	e1000_hw.h	1=Energy Detect Changed
17068	GG82563_PSSR2_DOWNSHIFT_INTERRU	0x0020	e1000_hw.h	1=Downshift Detected
17069	GG82563_PSSR2_MDI_CROSSOVER_CHA	0x0040	e1000_hw.h	1=Crossover Changed
17070	GG82563_PSSR2_FALSE_CARRIER	0x0100	e1000_hw.h	1=False Carrier
17071	GG82563_PSSR2_SYMBOL_ERROR	0x0200	e1000_hw.h	1=Symbol Error
17072	GG82563_PSSR2_LINK_STATUS_CHANG	0x0400	e1000_hw.h	1=Link Status Changed
17073	GG82563_PSSR2_AUTO_NEG_COMPLETE	0x0800	e1000_hw.h	1=Auto-Neg Completed
17074	GG82563_PSSR2_PAGE_RECEIVED	0x1000	e1000_hw.h	1=Page Received
17075	GG82563_PSSR2_DUPLEX_CHANGED	0x2000	e1000_hw.h	1=Duplex Changed
17076	GG82563_PSSR2_SPEED_CHANGED	0x4000	e1000_hw.h	1=Speed Changed
17077	GG82563_PSSR2_AUTO_NEG_ERROR	0x8000	e1000_hw.h	1=Auto-Neg Error
17078	GG82563_PSCR2_10BT_POLARITY_FOR	0x0002	e1000_hw.h	1=Force Negative Polarity
17079	GG82563_PSCR2_1000MB_TEST_SELEC	0x000C	e1000_hw.h
17080	GG82563_PSCR2_1000MB_TEST_SELEC	0x0000	e1000_hw.h	00,01=Normal Operation
17081	GG82563_PSCR2_1000MB_TEST_SELEC	0x0008	e1000_hw.h	10=Select 112ns Sequence
17082	GG82563_PSCR2_1000MB_TEST_SELEC	0x000C	e1000_hw.h	11=Select 16ns Sequence
17083	GG82563_PSCR2_REVERSE_AUTO_NEG	0x2000	e1000_hw.h	1=Reverse Auto-Negotiation
17084	GG82563_PSCR2_1000BT_DISABLE	0x4000	e1000_hw.h	1=Disable 1000BASE-T
17085	GG82563_PSCR2_TRANSMITER_TYPE_M	0x8000	e1000_hw.h
17086	GG82563_PSCR2_TRANSMITTER_TYPE_	0x0000	e1000_hw.h	0=Class B
17087	GG82563_PSCR2_TRANSMITTER_TYPE_	0x8000	e1000_hw.h	1=Class A
17088	GG82563_MSCR_TX_CLK_MASK	0x0007	e1000_hw.h
17089	GG82563_MSCR_TX_CLK_10MBPS_2_5M	0x0004	e1000_hw.h
17090	GG82563_MSCR_TX_CLK_100MBPS_25M	0x0005	e1000_hw.h
17091	GG82563_MSCR_TX_CLK_1000MBPS_2_	0x0006	e1000_hw.h
17092	GG82563_MSCR_TX_CLK_1000MBPS_25	0x0007	e1000_hw.h
17093	GG82563_MSCR_ASSERT_CRS_ON_TX	0x0010	e1000_hw.h	1=Assert
17094	GG82563_DSPD_CABLE_LENGTH	0x0007	e1000_hw.h	0 = <50M;
17095	GG82563_KMCR_PHY_LEDS_EN	0x0020	e1000_hw.h	1=PHY LEDs, 0=Kumeran Inband LEDs
17096	GG82563_KMCR_FORCE_LINK_UP	0x0040	e1000_hw.h	1=Force Link Up
17097	GG82563_KMCR_SUPPRESS_SGMII_EPD	0x0080	e1000_hw.h
17098	GG82563_KMCR_MDIO_BUS_SPEED_SEL	0x0400	e1000_hw.h
17099	GG82563_KMCR_MDIO_BUS_SPEED_SEL	0x0400	e1000_hw.h	1=6.25MHz, 0=0.8MHz
17100	GG82563_KMCR_PASS_FALSE_CARRIER	0x0800	e1000_hw.h
17101	GG82563_PMCR_ENABLE_ELECTRICAL_	0x0001	e1000_hw.h	1=Enalbe SERDES Electrical Idle
17102	GG82563_PMCR_DISABLE_PORT	0x0002	e1000_hw.h	1=Disable Port
17103	GG82563_PMCR_DISABLE_SERDES	0x0004	e1000_hw.h	1=Disable SERDES
17104	GG82563_PMCR_REVERSE_AUTO_NEG	0x0008	e1000_hw.h	1=Enable Reverse Auto-Negotiation
17105	GG82563_PMCR_DISABLE_1000_NON_D	0x0010	e1000_hw.h	1=Disable 1000Mbps Auto-Neg in non D0
17106	GG82563_PMCR_DISABLE_1000	0x0020	e1000_hw.h	1=Disable 1000Mbps Auto-Neg Always
17107	GG82563_PMCR_REVERSE_AUTO_NEG_D	0x0040	e1000_hw.h	1=Enable D0a Reverse Auto-Negotiation
17108	GG82563_PMCR_FORCE_POWER_STATE	0x0080	e1000_hw.h	1=Force Power State
17109	GG82563_PMCR_PROGRAMMED_POWER_S	0x0300	e1000_hw.h
17110	GG82563_PMCR_PROGRAMMED_POWER_S	0x0000	e1000_hw.h	00=Dr
17111	GG82563_PMCR_PROGRAMMED_POWER_S	0x0100	e1000_hw.h	01=D0u
17112	GG82563_PMCR_PROGRAMMED_POWER_S	0x0200	e1000_hw.h	10=D0a
17113	GG82563_PMCR_PROGRAMMED_POWER_S	0x0300	e1000_hw.h	11=D3
17114	GG82563_ICR_DIS_PADDING	0x0010	e1000_hw.h	Disable Padding Use
17115	M88_VENDOR	0x0141	e1000_hw.h
17116	M88E1000_E_PHY_ID	0x01410C50	e1000_hw.h
17117	M88E1000_I_PHY_ID	0x01410C30	e1000_hw.h
17118	M88E1011_I_PHY_ID	0x01410C20	e1000_hw.h
17119	IGP01E1000_I_PHY_ID	0x02A80380	e1000_hw.h
17120	M88E1000_12_PHY_ID	M88E1000_E_PHY_ID	e1000_hw.h
17121	M88E1000_14_PHY_ID	M88E1000_E_PHY_ID	e1000_hw.h
17122	M88E1011_I_REV_4	0x04	e1000_hw.h
17123	M88E1111_I_PHY_ID	0x01410CC0	e1000_hw.h
17124	L1LXT971A_PHY_ID	0x001378E0	e1000_hw.h
17125	GG82563_E_PHY_ID	0x01410CA0	e1000_hw.h
17126	PHY_PAGE_SHIFT	5	e1000_hw.h
17127	IGP3_PHY_PORT_CTRL	PHY_REG(769, 17)	e1000_hw.h	Port General Configuration
17128	IGP3_PHY_RATE_ADAPT_CTRL	PHY_REG(769, 25)	e1000_hw.h	Rate Adapter Control Register
17129	IGP3_KMRN_FIFO_CTRL_STATS	PHY_REG(770, 16)	e1000_hw.h	KMRN FIFO's control/status register
17130	IGP3_KMRN_POWER_MNG_CTRL	PHY_REG(770, 17)	e1000_hw.h	KMRN Power Management Control Register
17131	IGP3_KMRN_INBAND_CTRL	PHY_REG(770, 18)	e1000_hw.h	KMRN Inband Control Register
17132	IGP3_KMRN_DIAG	PHY_REG(770, 19)	e1000_hw.h	KMRN Diagnostic register
17133	IGP3_KMRN_DIAG_PCS_LOCK_LOSS	0x0002	e1000_hw.h	RX PCS is not synced
17134	IGP3_KMRN_ACK_TIMEOUT	PHY_REG(770, 20)	e1000_hw.h	KMRN Acknowledge Timeouts register
17135	IGP3_VR_CTRL	PHY_REG(776, 18)	e1000_hw.h	Voltage regulator control register
17136	IGP3_VR_CTRL_MODE_SHUT	0x0200	e1000_hw.h	Enter powerdown, shutdown VRs
17137	IGP3_VR_CTRL_MODE_MASK	0x0300	e1000_hw.h	Shutdown VR Mask
17138	IGP3_CAPABILITY	PHY_REG(776, 19)	e1000_hw.h	IGP3 Capability Register
17139	IGP3_CAP_INITIATE_TEAM	0x0001	e1000_hw.h	Able to initiate a team
17140	IGP3_CAP_WFM	0x0002	e1000_hw.h	Support WoL and PXE
17141	IGP3_CAP_ASF	0x0004	e1000_hw.h	Support ASF
17142	IGP3_CAP_LPLU	0x0008	e1000_hw.h	Support Low Power Link Up
17143	IGP3_CAP_DC_AUTO_SPEED	0x0010	e1000_hw.h	Support AC/DC Auto Link Speed
17144	IGP3_CAP_SPD	0x0020	e1000_hw.h	Support Smart Power Down
17145	IGP3_CAP_MULT_QUEUE	0x0040	e1000_hw.h	Support 2 tx & 2 rx queues
17146	IGP3_CAP_RSS	0x0080	e1000_hw.h	Support RSS
17147	IGP3_CAP_8021PQ	0x0100	e1000_hw.h	Support 802.1Q & 802.1p
17148	IGP3_CAP_AMT_CB	0x0200	e1000_hw.h	Support active manageability and circuit breaker
17149	IGP3_PPC_JORDAN_EN	0x0001	e1000_hw.h
17150	IGP3_PPC_JORDAN_GIGA_SPEED	0x0002	e1000_hw.h
17151	IGP3_KMRN_PMC_EE_IDLE_LINK_DIS	0x0001	e1000_hw.h
17152	IGP3_KMRN_PMC_K0S_ENTRY_LATENCY	0x001E	e1000_hw.h
17153	IGP3_KMRN_PMC_K0S_MODE1_EN_GIGA	0x0020	e1000_hw.h
17154	IGP3_KMRN_PMC_K0S_MODE1_EN_100	0x0040	e1000_hw.h
17155	IGP3E1000_PHY_MISC_CTRL	0x1B	e1000_hw.h	Misc. Ctrl register
17156	IGP3_PHY_MISC_DUPLEX_MANUAL_SET	0x1000	e1000_hw.h	Duplex Manual Set
17157	IGP3_KMRN_EXT_CTRL	PHY_REG(770, 18)	e1000_hw.h
17158	IGP3_KMRN_EC_DIS_INBAND	0x0080	e1000_hw.h
17159	IGP03E1000_E_PHY_ID	0x02A80390	e1000_hw.h
17160	IFE_E_PHY_ID	0x02A80330	e1000_hw.h	10/100 PHY
17161	IFE_PLUS_E_PHY_ID	0x02A80320	e1000_hw.h
17162	IFE_C_E_PHY_ID	0x02A80310	e1000_hw.h
17163	IFE_PHY_EXTENDED_STATUS_CONTROL	0x10	e1000_hw.h	100BaseTx Extended Status, Control and Address
17164	IFE_PHY_SPECIAL_CONTROL	0x11	e1000_hw.h	100BaseTx PHY special control register
17165	IFE_PHY_RCV_FALSE_CARRIER	0x13	e1000_hw.h	100BaseTx Receive False Carrier Counter
17166	IFE_PHY_RCV_DISCONNECT	0x14	e1000_hw.h	100BaseTx Receive Disconnet Counter
17167	IFE_PHY_RCV_ERROT_FRAME	0x15	e1000_hw.h	100BaseTx Receive Error Frame Counter
17168	IFE_PHY_RCV_SYMBOL_ERR	0x16	e1000_hw.h	Receive Symbol Error Counter
17169	IFE_PHY_PREM_EOF_ERR	0x17	e1000_hw.h	100BaseTx Receive Premature End Of Frame Error Counter
17170	IFE_PHY_RCV_EOF_ERR	0x18	e1000_hw.h	10BaseT Receive End Of Frame Error Counter
17171	IFE_PHY_TX_JABBER_DETECT	0x19	e1000_hw.h	10BaseT Transmit Jabber Detect Counter
17172	IFE_PHY_EQUALIZER	0x1A	e1000_hw.h	PHY Equalizer Control and Status
17173	IFE_PHY_SPECIAL_CONTROL_LED	0x1B	e1000_hw.h	PHY special control and LED configuration
17174	IFE_PHY_MDIX_CONTROL	0x1C	e1000_hw.h	MDI/MDI-X Control register
17175	IFE_PHY_HWI_CONTROL	0x1D	e1000_hw.h	Hardware Integrity Control (HWI)
17176	IFE_PESC_REDUCED_POWER_DOWN_DIS	0x2000	e1000_hw.h	Defaut 1 = Disable auto reduced power down
17177	IFE_PESC_100BTX_POWER_DOWN	0x0400	e1000_hw.h	Indicates the power state of 100BASE-TX
17178	IFE_PESC_10BTX_POWER_DOWN	0x0200	e1000_hw.h	Indicates the power state of 10BASE-T
17179	IFE_PESC_POLARITY_REVERSED	0x0100	e1000_hw.h	Indicates 10BASE-T polarity
17180	IFE_PESC_PHY_ADDR_MASK	0x007C	e1000_hw.h	Bit 6:2 for sampled PHY address
17181	IFE_PESC_SPEED	0x0002	e1000_hw.h	Auto-negotiation speed result 1=100Mbs, 0=10Mbs
17182	IFE_PESC_DUPLEX	0x0001	e1000_hw.h	Auto-negotiation duplex result 1=Full, 0=Half
17183	IFE_PESC_POLARITY_REVERSED_SHIF	8	e1000_hw.h
17184	IFE_PSC_DISABLE_DYNAMIC_POWER_D	0x0100	e1000_hw.h	1 = Dyanmic Power Down disabled
17185	IFE_PSC_FORCE_POLARITY	0x0020	e1000_hw.h	1=Reversed Polarity, 0=Normal
17186	IFE_PSC_AUTO_POLARITY_DISABLE	0x0010	e1000_hw.h	1=Auto Polarity Disabled, 0=Enabled
17187	IFE_PSC_JABBER_FUNC_DISABLE	0x0001	e1000_hw.h	1=Jabber Disabled, 0=Normal Jabber Operation
17188	IFE_PSC_FORCE_POLARITY_SHIFT	5	e1000_hw.h
17189	IFE_PSC_AUTO_POLARITY_DISABLE_S	4	e1000_hw.h
17190	IFE_PMC_AUTO_MDIX	0x0080	e1000_hw.h	1=enable MDI/MDI-X feature, default 0=disabled
17191	IFE_PMC_FORCE_MDIX	0x0040	e1000_hw.h	1=force MDIX-X, 0=force MDI
17192	IFE_PMC_MDIX_STATUS	0x0020	e1000_hw.h	1=MDI-X, 0=MDI
17193	IFE_PMC_AUTO_MDIX_COMPLETE	0x0010	e1000_hw.h	Resolution algorithm is completed
17194	IFE_PMC_MDIX_MODE_SHIFT	6	e1000_hw.h
17195	IFE_PHC_MDIX_RESET_ALL_MASK	0x0000	e1000_hw.h	Disable auto MDI-X
17196	IFE_PHC_HWI_ENABLE	0x8000	e1000_hw.h	Enable the HWI feature
17197	IFE_PHC_ABILITY_CHECK	0x4000	e1000_hw.h	1= Test Passed, 0=failed
17198	IFE_PHC_TEST_EXEC	0x2000	e1000_hw.h	PHY launch test pulses on the wire
17199	IFE_PHC_HIGHZ	0x0200	e1000_hw.h	1 = Open Circuit
17200	IFE_PHC_LOWZ	0x0400	e1000_hw.h	1 = Short Circuit
17201	IFE_PHC_LOW_HIGH_Z_MASK	0x0600	e1000_hw.h	Mask for indication type of problem on the line
17202	IFE_PHC_DISTANCE_MASK	0x01FF	e1000_hw.h	Mask for distance to the cable problem, in 80cm granularity
17203	IFE_PHC_RESET_ALL_MASK	0x0000	e1000_hw.h	Disable HWI
17204	IFE_PSCL_PROBE_MODE	0x0020	e1000_hw.h	LED Probe mode
17205	IFE_PSCL_PROBE_LEDS_OFF	0x0006	e1000_hw.h	Force LEDs 0 and 2 off
17206	IFE_PSCL_PROBE_LEDS_ON	0x0007	e1000_hw.h	Force LEDs 0 and 2 on
17207	ICH_FLASH_COMMAND_TIMEOUT	5000	e1000_hw.h	5000 uSecs - adjusted
17208	ICH_FLASH_ERASE_TIMEOUT	3000000	e1000_hw.h	Up to 3 seconds - worst case
17209	ICH_FLASH_CYCLE_REPEAT_COUNT	10	e1000_hw.h	10 cycles
17210	ICH_FLASH_SEG_SIZE_256	256	e1000_hw.h
17211	ICH_FLASH_SEG_SIZE_4K	4096	e1000_hw.h
17212	ICH_FLASH_SEG_SIZE_64K	65536	e1000_hw.h
17213	ICH_CYCLE_READ	0x0	e1000_hw.h
17214	ICH_CYCLE_RESERVED	0x1	e1000_hw.h
17215	ICH_CYCLE_WRITE	0x2	e1000_hw.h
17216	ICH_CYCLE_ERASE	0x3	e1000_hw.h
17217	ICH_FLASH_GFPREG	0x0000	e1000_hw.h
17218	ICH_FLASH_HSFSTS	0x0004	e1000_hw.h
17219	ICH_FLASH_HSFCTL	0x0006	e1000_hw.h
17220	ICH_FLASH_FADDR	0x0008	e1000_hw.h
17221	ICH_FLASH_FDATA0	0x0010	e1000_hw.h
17222	ICH_FLASH_FRACC	0x0050	e1000_hw.h
17223	ICH_FLASH_FREG0	0x0054	e1000_hw.h
17224	ICH_FLASH_FREG1	0x0058	e1000_hw.h
17225	ICH_FLASH_FREG2	0x005C	e1000_hw.h
17226	ICH_FLASH_FREG3	0x0060	e1000_hw.h
17227	ICH_FLASH_FPR0	0x0074	e1000_hw.h
17228	ICH_FLASH_FPR1	0x0078	e1000_hw.h
17229	ICH_FLASH_SSFSTS	0x0090	e1000_hw.h
17230	ICH_FLASH_SSFCTL	0x0092	e1000_hw.h
17231	ICH_FLASH_PREOP	0x0094	e1000_hw.h
17232	ICH_FLASH_OPTYPE	0x0096	e1000_hw.h
17233	ICH_FLASH_OPMENU	0x0098	e1000_hw.h
17234	ICH_FLASH_REG_MAPSIZE	0x00A0	e1000_hw.h
17235	ICH_FLASH_SECTOR_SIZE	4096	e1000_hw.h
17236	ICH_GFPREG_BASE_MASK	0x1FFF	e1000_hw.h
17237	ICH_FLASH_LINEAR_ADDR_MASK	0x00FFFFFF	e1000_hw.h
17238	PHY_PREAMBLE	0xFFFFFFFF	e1000_hw.h
17239	PHY_SOF	0x01	e1000_hw.h
17240	PHY_OP_READ	0x02	e1000_hw.h
17241	PHY_OP_WRITE	0x01	e1000_hw.h
17242	PHY_TURNAROUND	0x02	e1000_hw.h
17243	PHY_PREAMBLE_SIZE	32	e1000_hw.h
17244	MII_CR_SPEED_1000	0x0040	e1000_hw.h
17245	MII_CR_SPEED_100	0x2000	e1000_hw.h
17246	MII_CR_SPEED_10	0x0000	e1000_hw.h
17247	E1000_PHY_ADDRESS	0x01	e1000_hw.h
17248	PHY_AUTO_NEG_TIME	45	e1000_hw.h	4.5 Seconds
17249	PHY_FORCE_TIME	20	e1000_hw.h	2.0 Seconds
17250	PHY_REVISION_MASK	0xFFFFFFF0	e1000_hw.h
17251	DEVICE_SPEED_MASK	0x00000300	e1000_hw.h	Device Ctrl Reg Speed Mask
17252	REG4_SPEED_MASK	0x01E0	e1000_hw.h
17253	REG9_SPEED_MASK	0x0300	e1000_hw.h
17254	ADVERTISE_10_HALF	0x0001	e1000_hw.h
17255	ADVERTISE_10_FULL	0x0002	e1000_hw.h
17256	ADVERTISE_100_HALF	0x0004	e1000_hw.h
17257	ADVERTISE_100_FULL	0x0008	e1000_hw.h
17258	ADVERTISE_1000_HALF	0x0010	e1000_hw.h
17259	ADVERTISE_1000_FULL	0x0020	e1000_hw.h
17260	AUTONEG_ADVERTISE_SPEED_DEFAULT	0x002F	e1000_hw.h	Everything but 1000-Half
17261	AUTONEG_ADVERTISE_10_100_ALL	0x000F	e1000_hw.h	All 10/100 speeds
17262	AUTONEG_ADVERTISE_10_ALL	0x0003	e1000_hw.h	10Mbps Full & Half speeds
17263	DEBUGOUT2	DEBUGOUT1	e1000_osdep.h
17264	DEBUGOUT3	DEBUGOUT1	e1000_osdep.h
17265	DEBUGOUT7	DEBUGOUT1	e1000_osdep.h
17266	E1000_READ_REG_ARRAY_DWORD	E1000_READ_REG_ARRAY	e1000_osdep.h
17267	E1000_WRITE_REG_ARRAY_DWORD	E1000_WRITE_REG_ARRAY	e1000_osdep.h
17268	NX_CDRP_CLEAR	0x00000000	nxhal_nic_interface.h
17269	NX_CDRP_CMD_BIT	0x80000000	nxhal_nic_interface.h
17270	NX_CDRP_RSP_OK	0x00000001	nxhal_nic_interface.h
17271	NX_CDRP_RSP_FAIL	0x00000002	nxhal_nic_interface.h
17272	NX_CDRP_RSP_TIMEOUT	0x00000003	nxhal_nic_interface.h
17273	NX_CDRP_CMD_SUBMIT_CAPABILITIES	0x00000001	nxhal_nic_interface.h
17274	NX_CDRP_CMD_READ_MAX_RDS_PER_CT	0x00000002	nxhal_nic_interface.h
17275	NX_CDRP_CMD_READ_MAX_SDS_PER_CT	0x00000003	nxhal_nic_interface.h
17276	NX_CDRP_CMD_READ_MAX_RULES_PER_	0x00000004	nxhal_nic_interface.h
17277	NX_CDRP_CMD_READ_MAX_RX_CTX	0x00000005	nxhal_nic_interface.h
17278	NX_CDRP_CMD_READ_MAX_TX_CTX	0x00000006	nxhal_nic_interface.h
17279	NX_CDRP_CMD_CREATE_RX_CTX	0x00000007	nxhal_nic_interface.h
17280	NX_CDRP_CMD_DESTROY_RX_CTX	0x00000008	nxhal_nic_interface.h
17281	NX_CDRP_CMD_CREATE_TX_CTX	0x00000009	nxhal_nic_interface.h
17282	NX_CDRP_CMD_DESTROY_TX_CTX	0x0000000a	nxhal_nic_interface.h
17283	NX_CDRP_CMD_SETUP_STATISTICS	0x0000000e	nxhal_nic_interface.h
17284	NX_CDRP_CMD_GET_STATISTICS	0x0000000f	nxhal_nic_interface.h
17285	NX_CDRP_CMD_DELETE_STATISTICS	0x00000010	nxhal_nic_interface.h
17286	NX_CDRP_CMD_MAX	0x00000011	nxhal_nic_interface.h
17287	NX_CAP0_LEGACY_CONTEXT	NX_CAP_BIT(0, 0)	nxhal_nic_interface.h
17288	NX_CAP0_MULTI_CONTEXT	NX_CAP_BIT(0, 1)	nxhal_nic_interface.h
17289	NX_CAP0_LEGACY_MN	NX_CAP_BIT(0, 2)	nxhal_nic_interface.h
17290	NX_CAP0_LEGACY_MS	NX_CAP_BIT(0, 3)	nxhal_nic_interface.h
17291	NX_CAP0_CUT_THROUGH	NX_CAP_BIT(0, 4)	nxhal_nic_interface.h
17292	NX_CAP0_LRO	NX_CAP_BIT(0, 5)	nxhal_nic_interface.h
17293	NX_CAP0_LSO	NX_CAP_BIT(0, 6)	nxhal_nic_interface.h
17294	NX_CAP1_NIC	NX_CAP_BIT(1, 0)	nxhal_nic_interface.h
17295	NX_CAP1_PXE	NX_CAP_BIT(1, 1)	nxhal_nic_interface.h
17296	NX_CAP1_CHIMNEY	NX_CAP_BIT(1, 2)	nxhal_nic_interface.h
17297	NX_CAP1_LSA	NX_CAP_BIT(1, 3)	nxhal_nic_interface.h
17298	NX_CAP1_RDMA	NX_CAP_BIT(1, 4)	nxhal_nic_interface.h
17299	NX_CAP1_ISCSI	NX_CAP_BIT(1, 5)	nxhal_nic_interface.h
17300	NX_CAP1_FCOE	NX_CAP_BIT(1, 6)	nxhal_nic_interface.h
17301	NX_RX_RULETYPE_DEFAULT	0	nxhal_nic_interface.h
17302	NX_RX_RULETYPE_MAC	1	nxhal_nic_interface.h
17303	NX_RX_RULETYPE_MAC_VLAN	2	nxhal_nic_interface.h
17304	NX_RX_RULETYPE_MAC_RSS	3	nxhal_nic_interface.h
17305	NX_RX_RULETYPE_MAC_VLAN_RSS	4	nxhal_nic_interface.h
17306	NX_RX_RULETYPE_MAX	5	nxhal_nic_interface.h
17307	NX_RX_RULECMD_ADD	0	nxhal_nic_interface.h
17308	NX_RX_RULECMD_REMOVE	1	nxhal_nic_interface.h
17309	NX_RX_RULECMD_MAX	2	nxhal_nic_interface.h
17310	NX_HOST_CTX_STATE_FREED	0	nxhal_nic_interface.h	Invalid state
17311	NX_HOST_CTX_STATE_ALLOCATED	1	nxhal_nic_interface.h	Not committed
17312	NX_HOST_CTX_STATE_ACTIVE	2	nxhal_nic_interface.h
17313	NX_HOST_CTX_STATE_DISABLED	3	nxhal_nic_interface.h
17314	NX_HOST_CTX_STATE_QUIESCED	4	nxhal_nic_interface.h
17315	NX_HOST_CTX_STATE_MAX	5	nxhal_nic_interface.h
17316	NX_HOST_INT_CRB_MODE_UNIQUE	0	nxhal_nic_interface.h
17317	NX_HOST_INT_CRB_MODE_SHARED	1	nxhal_nic_interface.h	<= LEGACY
17318	NX_HOST_INT_CRB_MODE_NORX	2	nxhal_nic_interface.h
17319	NX_HOST_INT_CRB_MODE_NOTX	3	nxhal_nic_interface.h
17320	NX_HOST_INT_CRB_MODE_NORXTX	4	nxhal_nic_interface.h
17321	NX_DESTROY_CTX_RESET	0	nxhal_nic_interface.h
17322	NX_DESTROY_CTX_D3_RESET	1	nxhal_nic_interface.h
17323	NX_DESTROY_CTX_MAX	2	nxhal_nic_interface.h
17324	NX_HOST_RDS_CRB_MODE_UNIQUE	0	nxhal_nic_interface.h	<= LEGACY
17325	NX_HOST_RDS_CRB_MODE_SHARED	1	nxhal_nic_interface.h
17326	NX_HOST_RDS_CRB_MODE_CUSTOM	2	nxhal_nic_interface.h
17327	NX_HOST_RDS_CRB_MODE_MAX	3	nxhal_nic_interface.h
17328	NX_RDS_RING_TYPE_NORMAL	0	nxhal_nic_interface.h
17329	NX_RDS_RING_TYPE_JUMBO	1	nxhal_nic_interface.h
17330	NX_RDS_RING_TYPE_LRO	2	nxhal_nic_interface.h
17331	NX_RDS_RING_TYPE_MAX	3	nxhal_nic_interface.h
17332	NX_STATISTICS_MODE_INVALID	0	nxhal_nic_interface.h
17333	NX_STATISTICS_MODE_PULL	1	nxhal_nic_interface.h
17334	NX_STATISTICS_MODE_PUSH	2	nxhal_nic_interface.h
17335	NX_STATISTICS_MODE_SINGLE_SHOT	3	nxhal_nic_interface.h
17336	NX_STATISTICS_MODE_MAX	4	nxhal_nic_interface.h
17337	NX_STATISTICS_TYPE_INVALID	0	nxhal_nic_interface.h
17338	NX_STATISTICS_TYPE_NIC_RX_CORE	1	nxhal_nic_interface.h
17339	NX_STATISTICS_TYPE_NIC_TX_CORE	2	nxhal_nic_interface.h
17340	NX_STATISTICS_TYPE_NIC_RX_ALL	3	nxhal_nic_interface.h
17341	NX_STATISTICS_TYPE_NIC_TX_ALL	4	nxhal_nic_interface.h
17342	NX_STATISTICS_TYPE_MAX	5	nxhal_nic_interface.h
17343	NXHAL_VERSION	1	phantom.h
17344	UNM_DMA_BUFFER_ALIGN	16	phantom.h
17345	__unm_dma_aligned	__attribute__ (( aligned ( UNM_DMA_BUFFER_ALIGN ) ))	phantom.h
17346	UNM_128M_CRB_WINDOW	0x6110210UL	phantom.h
17347	UNM_32M_CRB_WINDOW	0x0110210UL	phantom.h
17348	UNM_2M_CRB_WINDOW	0x0130060UL	phantom.h
17349	UNM_CRB_PCIE	UNM_CRB_BASE ( UNM_CRB_BLK_PCIE )	phantom.h
17350	UNM_PCIE_SEM2_LOCK	( UNM_CRB_PCIE + 0x1c010 )	phantom.h
17351	UNM_PCIE_SEM2_UNLOCK	( UNM_CRB_PCIE + 0x1c014 )	phantom.h
17352	UNM_CRB_CAM	UNM_CRB_BASE ( UNM_CRB_BLK_CAM )	phantom.h
17353	UNM_CAM_RAM	( UNM_CRB_CAM + 0x02000 )	phantom.h
17354	UNM_CAM_RAM_PORT_MODE	( UNM_CAM_RAM + 0x00024 )	phantom.h
17355	UNM_CAM_RAM_PORT_MODE_AUTO_NEG	4	phantom.h
17356	UNM_CAM_RAM_PORT_MODE_AUTO_NEG_	5	phantom.h
17357	UNM_CAM_RAM_DMESG_SIG_MAGIC	0xcafebabeUL	phantom.h
17358	UNM_CAM_RAM_NUM_DMESG_BUFFERS	5	phantom.h
17359	UNM_CAM_RAM_CLP_COMMAND	( UNM_CAM_RAM + 0x000c0 )	phantom.h
17360	UNM_CAM_RAM_CLP_COMMAND_LAST	0x00000080UL	phantom.h
17361	UNM_CAM_RAM_CLP_DATA_LO	( UNM_CAM_RAM + 0x000c4 )	phantom.h
17362	UNM_CAM_RAM_CLP_DATA_HI	( UNM_CAM_RAM + 0x000c8 )	phantom.h
17363	UNM_CAM_RAM_CLP_STATUS	( UNM_CAM_RAM + 0x000cc )	phantom.h
17364	UNM_CAM_RAM_CLP_STATUS_START	0x00000001UL	phantom.h
17365	UNM_CAM_RAM_CLP_STATUS_DONE	0x00000002UL	phantom.h
17366	UNM_CAM_RAM_CLP_STATUS_ERROR	0x0000ff00UL	phantom.h
17367	UNM_CAM_RAM_CLP_STATUS_UNINITIA	0xffffffffUL	phantom.h
17368	UNM_CAM_RAM_BOOT_ENABLE	( UNM_CAM_RAM + 0x000fc )	phantom.h
17369	UNM_CAM_RAM_WOL_PORT_MODE	( UNM_CAM_RAM + 0x00198 )	phantom.h
17370	UNM_CAM_RAM_MAC_ADDRS	( UNM_CAM_RAM + 0x001c0 )	phantom.h
17371	UNM_CAM_RAM_COLD_BOOT	( UNM_CAM_RAM + 0x001fc )	phantom.h
17372	UNM_CAM_RAM_COLD_BOOT_MAGIC	0x55555555UL	phantom.h
17373	UNM_NIC_REG	( UNM_CRB_CAM + 0x02200 )	phantom.h
17374	UNM_NIC_REG_NX_CDRP	( UNM_NIC_REG + 0x00018 )	phantom.h
17375	UNM_NIC_REG_NX_ARG1	( UNM_NIC_REG + 0x0001c )	phantom.h
17376	UNM_NIC_REG_NX_ARG2	( UNM_NIC_REG + 0x00020 )	phantom.h
17377	UNM_NIC_REG_NX_ARG3	( UNM_NIC_REG + 0x00024 )	phantom.h
17378	UNM_NIC_REG_NX_SIGN	( UNM_NIC_REG + 0x00028 )	phantom.h
17379	UNM_NIC_REG_DUMMY_BUF_ADDR_HI	( UNM_NIC_REG + 0x0003c )	phantom.h
17380	UNM_NIC_REG_DUMMY_BUF_ADDR_LO	( UNM_NIC_REG + 0x00040 )	phantom.h
17381	UNM_NIC_REG_CMDPEG_STATE	( UNM_NIC_REG + 0x00050 )	phantom.h
17382	UNM_NIC_REG_CMDPEG_STATE_INITIA	0xff01	phantom.h
17383	UNM_NIC_REG_CMDPEG_STATE_INITIA	0xf00f	phantom.h
17384	UNM_NIC_REG_DUMMY_BUF	( UNM_NIC_REG + 0x000fc )	phantom.h
17385	UNM_NIC_REG_DUMMY_BUF_INIT	0	phantom.h
17386	UNM_NIC_REG_XG_STATE_P3	( UNM_NIC_REG + 0x00098 )	phantom.h
17387	UNM_NIC_REG_XG_STATE_P3_LINK_UP	0x01	phantom.h
17388	UNM_NIC_REG_XG_STATE_P3_LINK_DO	0x02	phantom.h
17389	UNM_NIC_REG_RCVPEG_STATE	( UNM_NIC_REG + 0x0013c )	phantom.h
17390	UNM_NIC_REG_RCVPEG_STATE_INITIA	0xff01	phantom.h
17391	UNM_NIC_REG_SW_INT_MASK_0	( UNM_NIC_REG + 0x001d8 )	phantom.h
17392	UNM_NIC_REG_SW_INT_MASK_1	( UNM_NIC_REG + 0x001e0 )	phantom.h
17393	UNM_NIC_REG_SW_INT_MASK_2	( UNM_NIC_REG + 0x001e4 )	phantom.h
17394	UNM_NIC_REG_SW_INT_MASK_3	( UNM_NIC_REG + 0x001e8 )	phantom.h
17395	UNM_CRB_ROMUSB	UNM_CRB_BASE ( UNM_CRB_BLK_ROMUSB )	phantom.h
17396	UNM_ROMUSB_GLB	( UNM_CRB_ROMUSB + 0x00000 )	phantom.h
17397	UNM_ROMUSB_GLB_STATUS	( UNM_ROMUSB_GLB + 0x00004 )	phantom.h
17398	UNM_ROMUSB_GLB_STATUS_ROM_DONE	( 1 << 1 )	phantom.h
17399	UNM_ROMUSB_GLB_SW_RESET	( UNM_ROMUSB_GLB + 0x00008 )	phantom.h
17400	UNM_ROMUSB_GLB_SW_RESET_MAGIC	0x0080000fUL	phantom.h
17401	UNM_ROMUSB_GLB_PEGTUNE_DONE	( UNM_ROMUSB_GLB + 0x0005c )	phantom.h
17402	UNM_ROMUSB_GLB_PEGTUNE_DONE_MAG	0x31	phantom.h
17403	UNM_ROMUSB_ROM	( UNM_CRB_ROMUSB + 0x10000 )	phantom.h
17404	UNM_ROMUSB_ROM_INSTR_OPCODE	( UNM_ROMUSB_ROM + 0x00004 )	phantom.h
17405	UNM_ROMUSB_ROM_ADDRESS	( UNM_ROMUSB_ROM + 0x00008 )	phantom.h
17406	UNM_ROMUSB_ROM_WDATA	( UNM_ROMUSB_ROM + 0x0000c )	phantom.h
17407	UNM_ROMUSB_ROM_ABYTE_CNT	( UNM_ROMUSB_ROM + 0x00010 )	phantom.h
17408	UNM_ROMUSB_ROM_DUMMY_BYTE_CNT	( UNM_ROMUSB_ROM + 0x00014 )	phantom.h
17409	UNM_ROMUSB_ROM_RDATA	( UNM_ROMUSB_ROM + 0x00018 )	phantom.h
17410	UNM_CRB_TEST	UNM_CRB_BASE ( UNM_CRB_BLK_TEST )	phantom.h
17411	UNM_TEST_CONTROL	( UNM_CRB_TEST + 0x00090 )	phantom.h
17412	UNM_TEST_CONTROL_START	0x01	phantom.h
17413	UNM_TEST_CONTROL_ENABLE	0x02	phantom.h
17414	UNM_TEST_CONTROL_BUSY	0x08	phantom.h
17415	UNM_TEST_ADDR_LO	( UNM_CRB_TEST + 0x00094 )	phantom.h
17416	UNM_TEST_ADDR_HI	( UNM_CRB_TEST + 0x00098 )	phantom.h
17417	UNM_TEST_RDDATA_LO	( UNM_CRB_TEST + 0x000a8 )	phantom.h
17418	UNM_TEST_RDDATA_HI	( UNM_CRB_TEST + 0x000ac )	phantom.h
17419	UNM_CRB_PEG_0	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_0 )	phantom.h
17420	UNM_PEG_0_HALT_STATUS	( UNM_CRB_PEG_0 + 0x00030 )	phantom.h
17421	UNM_PEG_0_HALT	( UNM_CRB_PEG_0 + 0x0003c )	phantom.h
17422	UNM_CRB_PEG_1	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_1 )	phantom.h
17423	UNM_PEG_1_HALT_STATUS	( UNM_CRB_PEG_1 + 0x00030 )	phantom.h
17424	UNM_PEG_1_HALT	( UNM_CRB_PEG_1 + 0x0003c )	phantom.h
17425	UNM_CRB_PEG_2	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_2 )	phantom.h
17426	UNM_PEG_2_HALT_STATUS	( UNM_CRB_PEG_2 + 0x00030 )	phantom.h
17427	UNM_PEG_2_HALT	( UNM_CRB_PEG_2 + 0x0003c )	phantom.h
17428	UNM_CRB_PEG_3	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_3 )	phantom.h
17429	UNM_PEG_3_HALT_STATUS	( UNM_CRB_PEG_3 + 0x00030 )	phantom.h
17430	UNM_PEG_3_HALT	( UNM_CRB_PEG_3 + 0x0003c )	phantom.h
17431	UNM_CRB_PEG_4	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_4 )	phantom.h
17432	UNM_PEG_4_HALT_STATUS	( UNM_CRB_PEG_4 + 0x00030 )	phantom.h
17433	UNM_PEG_4_HALT	( UNM_CRB_PEG_4 + 0x0003c )	phantom.h
17434	MAX_RX_SIZE	IEEE80211_MAX_FRAME_LEN	rtl818x.h
17435	RF_PARAM_ANALOGPHY	(1 << 0)	rtl818x.h
17436	RF_PARAM_ANTBDEFAULT	(1 << 1)	rtl818x.h
17437	RF_PARAM_CARRIERSENSE1	(1 << 2)	rtl818x.h
17438	RF_PARAM_CARRIERSENSE2	(1 << 3)	rtl818x.h
17439	BB_ANTATTEN_CHAN14	0x0C	rtl818x.h
17440	BB_ANTENNA_B	0x40	rtl818x.h
17441	BB_HOST_BANG	(1 << 30)	rtl818x.h
17442	BB_HOST_BANG_EN	(1 << 2)	rtl818x.h
17443	BB_HOST_BANG_CLK	(1 << 1)	rtl818x.h
17444	BB_HOST_BANG_DATA	1	rtl818x.h
17445	ANAPARAM_TXDACOFF_SHIFT	27	rtl818x.h
17446	ANAPARAM_PWR0_SHIFT	28	rtl818x.h
17447	ANAPARAM_PWR0_MASK	(0x07 << ANAPARAM_PWR0_SHIFT)	rtl818x.h
17448	ANAPARAM_PWR1_SHIFT	20	rtl818x.h
17449	ANAPARAM_PWR1_MASK	(0x7F << ANAPARAM_PWR1_SHIFT)	rtl818x.h
17450	RTL818X_RX_RING_SIZE	8	rtl818x.h	doesn't have to be a power of 2
17451	RTL818X_TX_RING_SIZE	8	rtl818x.h	nor this [but 2^n is very slightly faster]
17452	RTL818X_RING_ALIGN	256	rtl818x.h
17453	RTL818X_MAX_RETRIES	4	rtl818x.h
17454	RTL818X_RF_DRIVERS	__table(struct rtl818x_rf_ops, "rtl818x_rf_drivers")	rtl818x.h
17455	__rtl818x_rf_driver	__table_entry(RTL818X_RF_DRIVERS, 01)	rtl818x.h
17456	WRAP	0	mucurses.h
17457	NOWRAP	1	mucurses.h
17458	ASSERTING	0	assert.h
17459	ASSERTING	1	assert.h
17460	NON_STANDARD_BOOTP_SERVER	1067	bootp.h
17461	NON_STANDARD_BOOTP_CLIENT	1068	bootp.h
17462	BOOTP_SERVER	NON_STANDARD_BOOTP_SERVER	bootp.h
17463	BOOTP_SERVER	67	bootp.h
17464	BOOTP_CLIENT	NON_STANDARD_BOOTP_CLIENT	bootp.h
17465	BOOTP_CLIENT	68	bootp.h
17466	PROXYDHCP_SERVER	4011	bootp.h	For PXE
17467	BOOTP_REQUEST	1	bootp.h
17468	BOOTP_REPLY	2	bootp.h
17469	RFC1533_COOKIE	99, 130, 83, 99	bootp.h
17470	RFC1533_PAD	0	bootp.h
17471	RFC1533_NETMASK	1	bootp.h
17472	RFC1533_TIMEOFFSET	2	bootp.h
17473	RFC1533_GATEWAY	3	bootp.h
17474	RFC1533_TIMESERVER	4	bootp.h
17475	RFC1533_IEN116NS	5	bootp.h
17476	RFC1533_DNS	6	bootp.h
17477	RFC1533_LOGSERVER	7	bootp.h
17478	RFC1533_COOKIESERVER	8	bootp.h
17479	RFC1533_LPRSERVER	9	bootp.h
17480	RFC1533_IMPRESSSERVER	10	bootp.h
17481	RFC1533_RESOURCESERVER	11	bootp.h
17482	RFC1533_HOSTNAME	12	bootp.h
17483	RFC1533_BOOTFILESIZE	13	bootp.h
17484	RFC1533_MERITDUMPFILE	14	bootp.h
17485	RFC1533_DOMAINNAME	15	bootp.h
17486	RFC1533_SWAPSERVER	16	bootp.h
17487	RFC1533_ROOTPATH	17	bootp.h
17488	RFC1533_EXTENSIONPATH	18	bootp.h
17489	RFC1533_IPFORWARDING	19	bootp.h
17490	RFC1533_IPSOURCEROUTING	20	bootp.h
17491	RFC1533_IPPOLICYFILTER	21	bootp.h
17492	RFC1533_IPMAXREASSEMBLY	22	bootp.h
17493	RFC1533_IPTTL	23	bootp.h
17494	RFC1533_IPMTU	24	bootp.h
17495	RFC1533_IPMTUPLATEAU	25	bootp.h
17496	RFC1533_INTMTU	26	bootp.h
17497	RFC1533_INTLOCALSUBNETS	27	bootp.h
17498	RFC1533_INTBROADCAST	28	bootp.h
17499	RFC1533_INTICMPDISCOVER	29	bootp.h
17500	RFC1533_INTICMPRESPOND	30	bootp.h
17501	RFC1533_INTROUTEDISCOVER	31	bootp.h
17502	RFC1533_INTROUTESOLICIT	32	bootp.h
17503	RFC1533_INTSTATICROUTES	33	bootp.h
17504	RFC1533_LLTRAILERENCAP	34	bootp.h
17505	RFC1533_LLARPCACHETMO	35	bootp.h
17506	RFC1533_LLETHERNETENCAP	36	bootp.h
17507	RFC1533_TCPTTL	37	bootp.h
17508	RFC1533_TCPKEEPALIVETMO	38	bootp.h
17509	RFC1533_TCPKEEPALIVEGB	39	bootp.h
17510	RFC1533_NISDOMAIN	40	bootp.h
17511	RFC1533_NISSERVER	41	bootp.h
17512	RFC1533_NTPSERVER	42	bootp.h
17513	RFC1533_VENDOR	43	bootp.h
17514	RFC1533_NBNS	44	bootp.h
17515	RFC1533_NBDD	45	bootp.h
17516	RFC1533_NBNT	46	bootp.h
17517	RFC1533_NBSCOPE	47	bootp.h
17518	RFC1533_XFS	48	bootp.h
17519	RFC1533_XDM	49	bootp.h
17520	RFC2132_REQ_ADDR	50	bootp.h
17521	RFC2132_MSG_TYPE	53	bootp.h
17522	RFC2132_SRV_ID	54	bootp.h
17523	RFC2132_PARAM_LIST	55	bootp.h
17524	RFC2132_MAX_SIZE	57	bootp.h
17525	RFC2132_VENDOR_CLASS_ID	60	bootp.h
17526	RFC2132_CLIENT_ID	61	bootp.h
17527	RFC2132_TFTP_SERVER_NAME	66	bootp.h
17528	RFC2132_BOOTFILE_NAME	67	bootp.h
17529	RFC3004_USER_CLASS	77	bootp.h
17530	RFC3679_PXE_CLIENT_ARCH	93	bootp.h
17531	RFC3679_PXE_CLIENT_NDI	94	bootp.h
17532	RFC3679_PXE_CLIENT_UUID	97	bootp.h
17533	RFC3679_PXE_CLIENT_ARCH_LENGTH	2	bootp.h
17534	RFC3679_PXE_CLIENT_NDI_LENGTH	3	bootp.h
17535	RFC3679_PXE_CLIENT_UUID_LENGTH	17	bootp.h
17536	RFC3679_PXE_CLIENT_ARCH_IAX86PC	0,0	bootp.h
17537	RFC3679_PXE_CLIENT_ARCH_NECPC98	0,1	bootp.h
17538	RFC3679_PXE_CLIENT_ARCH_IA64PC	0,2	bootp.h
17539	RFC3679_PXE_CLIENT_ARCH_DECALPH	0,3	bootp.h
17540	RFC3679_PXE_CLIENT_ARCH_ARCX86	0,4	bootp.h
17541	RFC3679_PXE_CLIENT_ARCH_INTELLE	0,5	bootp.h
17542	RFC3679_PXE_CLIENT_NDI_21	1,2,1	bootp.h
17543	RFC3679_PXE_CLIENT_UUID_TYPE	0	bootp.h
17544	RFC3679_PXE_CLIENT_UUID_DEFAULT	RFC3679_PXE_CLIENT_UUID_TYPE, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF	bootp.h
17545	RFC2132_VENDOR_CLASS_ID_PXE_LEN	32	bootp.h
17546	RFC2132_VENDOR_CLASS_ID_PXE	'P','X','E','C','l','i','e','n','t',':', \ 'A','r','c','h',':','0','0','0','0','0',':', \ 'U','N','D','I',':','0','0','2','0'	bootp.h
17547	RFC1533_VENDOR_PXE_OPT128	128	bootp.h
17548	RFC1533_VENDOR_PXE_OPT129	129	bootp.h
17549	RFC1533_VENDOR_PXE_OPT130	130	bootp.h
17550	RFC1533_VENDOR_PXE_OPT131	131	bootp.h
17551	RFC1533_VENDOR_PXE_OPT132	132	bootp.h
17552	RFC1533_VENDOR_PXE_OPT133	133	bootp.h
17553	RFC1533_VENDOR_PXE_OPT134	134	bootp.h
17554	RFC1533_VENDOR_PXE_OPT135	135	bootp.h
17555	DHCPDISCOVER	1	bootp.h
17556	DHCPOFFER	2	bootp.h
17557	DHCPREQUEST	3	bootp.h
17558	DHCPACK	5	bootp.h
17559	RFC1533_VENDOR_MAJOR	0	bootp.h
17560	RFC1533_VENDOR_MINOR	0	bootp.h
17561	RFC1533_VENDOR_MAGIC	128	bootp.h
17562	RFC1533_VENDOR_ADDPARM	129	bootp.h
17563	RFC1533_VENDOR_ETHDEV	130	bootp.h
17564	RFC1533_VENDOR_ETHERBOOT_ENCAP	150	bootp.h
17565	RFC1533_VENDOR_HOWTO	132	bootp.h
17566	RFC1533_VENDOR_KERNEL_ENV	133	bootp.h
17567	RFC1533_VENDOR_NIC_DEV_ID	175	bootp.h
17568	RFC1533_VENDOR_ARCH	177	bootp.h
17569	RFC1533_END	255	bootp.h
17570	BOOTP_VENDOR_LEN	64	bootp.h
17571	DHCP_OPT_LEN	312	bootp.h
17572	u32	unsigned int	btext.h
17573	u16	unsigned short	btext.h
17574	u8	unsigned char	btext.h
17575	BOOTX_COLORTABLE_SIZE	(256UL3UL2UL)	btext.h
17576	CMDL_BUFFER_SIZE	256	cmdlinelib.h
17577	CMDL_PROMPT_SIZE	8	cmdlinelib.h
17578	CMDL_MAX_TAB_COMPLETE_RESULT	256	cmdlinelib.h
17579	NULL	((void *)0)	cmdlinelib.h
17580	F_RELFLG	0x0001	coff.h	If set, not reloc. info. Clear for executables
17581	F_EXEC	0x0002	coff.h	No unresolved symbols. Executable file !
17582	F_LNNO	0x0004	coff.h	If set, line information numbers removed
17583	F_LSYMS	0x0008	coff.h	If set, local symbols removed
17584	F_AR32WR	0x0100	coff.h	Indicates little endian file
17585	EM_E1	0x17a	coff.h	Magic number for Hyperstone. Big endian format
17586	O_MAGIC	0x017c	coff.h	Optional's header magic number for Hyperstone
17587	S_TYPE_TEXT	0x0020	coff.h	If set, the section contains only executable
17588	S_TYPE_DATA	0x0040	coff.h	If set, the section contains only initialized data
17589	S_TYPE_BSS	0x0080	coff.h	If set, the section is BSS no data stored
17590	OBJECT_SYMBOL	PREFIX_OBJECT ( obj_ )	compiler.h
17591	CONFIG_SYMBOL	PREFIX_OBJECT ( obj_config_ )	compiler.h
17592	ERRFILE	PREFIX_OBJECT ( ERRFILE_ )	compiler.h
17593	DEBUG_SYMBOL	PREFIX_OBJECT ( debug_ )	compiler.h
17594	DBGLVL_MAX	DEBUG_SYMBOL	compiler.h
17595	DBGLVL_MAX	0	compiler.h
17596	DBGLVL	( DBGLVL_MAX & ~__debug_disable )	compiler.h
17597	DBGLVL	0	compiler.h
17598	DBGLVL_LOG	1	compiler.h
17599	DBG_LOG	( DBGLVL & DBGLVL_LOG )	compiler.h
17600	DBGLVL_EXTRA	2	compiler.h
17601	DBG_EXTRA	( DBGLVL & DBGLVL_EXTRA )	compiler.h
17602	DBGLVL_PROFILE	4	compiler.h
17603	DBG_PROFILE	( DBGLVL & DBGLVL_PROFILE )	compiler.h
17604	DBGLVL_IO	8	compiler.h
17605	DBG_IO	( DBGLVL & DBGLVL_IO )	compiler.h
17606	PACKED	__attribute__ (( packed ))	compiler.h
17607	__unused	__attribute__ (( unused ))	compiler.h
17608	__pure	__attribute__ (( pure ))	compiler.h
17609	__const	__attribute__ (( const ))	compiler.h
17610	__nonnull	__attribute__ (( nonnull ))	compiler.h
17611	__malloc	__attribute__ (( malloc ))	compiler.h
17612	__used	__attribute__ (( used ))	compiler.h
17613	__aligned	__attribute__ (( aligned ( 16 ) ))	compiler.h
17614	__always_inline	__attribute__ (( always_inline ))	compiler.h
17615	__shared	__asm__ ( "_shared_bss" ) __aligned	compiler.h
17616	FILE_LICENCE_PUBLIC_DOMAIN	PROVIDE_SYMBOL ( __licence_public_domain )	compiler.h
17617	FILE_LICENCE_GPL2_OR_LATER	PROVIDE_SYMBOL ( __licence_gpl2_or_later )	compiler.h
17618	FILE_LICENCE_GPL2_ONLY	PROVIDE_SYMBOL ( __licence_gpl2_only )	compiler.h
17619	FILE_LICENCE_GPL_ANY	PROVIDE_SYMBOL ( __licence_gpl_any )	compiler.h
17620	FILE_LICENCE_BSD3	PROVIDE_SYMBOL ( __licence_bsd3 )	compiler.h
17621	FILE_LICENCE_BSD2	PROVIDE_SYMBOL ( __licence_bsd2 )	compiler.h
17622	FILE_LICENCE_MIT	PROVIDE_SYMBOL ( __licence_mit )	compiler.h
17623	CONSOLES	__table ( struct console_driver, "consoles" )	console.h
17624	__console_driver	__table_entry ( CONSOLES, 01 )	console.h
17625	ERR	(-1)	curses.h
17626	FALSE	(0)	curses.h
17627	OK	(0)	curses.h
17628	TRUE	(1)	curses.h
17629	stdscr	( &_stdscr )	curses.h
17630	COLS	_COLS	curses.h
17631	LINES	_LINES	curses.h
17632	CPAIR_SHIFT	8	curses.h
17633	ATTRS_SHIFT	16	curses.h
17634	WA_DEFAULT	( 0x0000 << ATTRS_SHIFT )	curses.h
17635	WA_ALTCHARSET	( 0x0001 << ATTRS_SHIFT )	curses.h
17636	WA_BLINK	( 0x0002 << ATTRS_SHIFT )	curses.h
17637	WA_BOLD	( 0x0004 << ATTRS_SHIFT )	curses.h
17638	WA_DIM	( 0x0008 << ATTRS_SHIFT )	curses.h
17639	WA_INVIS	( 0x0010 << ATTRS_SHIFT )	curses.h
17640	WA_PROTECT	( 0x0020 << ATTRS_SHIFT )	curses.h
17641	WA_REVERSE	( 0x0040 << ATTRS_SHIFT )	curses.h
17642	WA_STANDOUT	( 0x0080 << ATTRS_SHIFT )	curses.h
17643	WA_UNDERLINE	( 0x0100 << ATTRS_SHIFT )	curses.h
17644	WA_HORIZONTAL	( 0x0200 << ATTRS_SHIFT )	curses.h
17645	WA_VERTICAL	( 0x0400 << ATTRS_SHIFT )	curses.h
17646	WA_LEFT	( 0x0800 << ATTRS_SHIFT )	curses.h
17647	WA_RIGHT	( 0x1000 << ATTRS_SHIFT )	curses.h
17648	WA_LOW	( 0x2000 << ATTRS_SHIFT )	curses.h
17649	WA_TOP	( 0x4000 << ATTRS_SHIFT )	curses.h
17650	A_DEFAULT	WA_DEFAULT	curses.h
17651	A_ALTCHARSET	WA_ALTCHARSET	curses.h
17652	A_BLINK	WA_BLINK	curses.h
17653	A_BOLD	WA_BOLD	curses.h
17654	A_DIM	WA_DIM	curses.h
17655	A_INVIS	WA_INVIS	curses.h
17656	A_PROTECT	WA_PROTECT	curses.h
17657	A_REVERSE	WA_REVERSE	curses.h
17658	A_STANDOUT	WA_STANDOUT	curses.h
17659	A_UNDERLINE	WA_UNDERLINE	curses.h
17660	A_ATTRIBUTES	( 0xffff << ATTRS_SHIFT )	curses.h
17661	A_CHARTEXT	( 0xff )	curses.h
17662	A_COLOUR	( 0xff << CPAIR_SHIFT )	curses.h
17663	A_COLOR	A_COLOUR	curses.h
17664	COLOUR_PAIRS	8	curses.h	Arbitrary limit
17665	COLOR_PAIRS	COLOUR_PAIRS	curses.h
17666	ACS_ULCORNER	'+'	curses.h
17667	ACS_LLCORNER	'+'	curses.h
17668	ACS_URCORNER	'+'	curses.h
17669	ACS_LRCORNER	'+'	curses.h
17670	ACS_RTEE	'+'	curses.h
17671	ACS_LTEE	'+'	curses.h
17672	ACS_BTEE	'+'	curses.h
17673	ACS_TTEE	'+'	curses.h
17674	ACS_HLINE	'-'	curses.h
17675	ACS_VLINE	'\|'	curses.h
17676	ACS_PLUS	'+'	curses.h
17677	ACS_S1	'-'	curses.h
17678	ACS_S9	'_'	curses.h
17679	ACS_DIAMOND	'+'	curses.h
17680	ACS_CKBOARD	':'	curses.h
17681	ACS_DEGREE	'\''	curses.h
17682	ACS_PLMINUS	'#'	curses.h
17683	ACS_BULLET	'o'	curses.h
17684	ACS_LARROW	'<'	curses.h
17685	ACS_RARROW	'>'	curses.h
17686	ACS_DARROW	'v'	curses.h
17687	ACS_UARROW	'^'	curses.h
17688	ACS_BOARD	'#'	curses.h
17689	ACS_LANTERN	'#'	curses.h
17690	ACS_BLOCK	'#'	curses.h
17691	COLOUR_BLACK	0	curses.h
17692	COLOUR_RED	1	curses.h
17693	COLOUR_GREEN	2	curses.h
17694	COLOUR_YELLOW	3	curses.h
17695	COLOUR_BLUE	4	curses.h
17696	COLOUR_MAGENTA	5	curses.h
17697	COLOUR_CYAN	6	curses.h
17698	COLOUR_WHITE	7	curses.h
17699	COLOURS	7	curses.h
17700	COLOUR_FG	30	curses.h
17701	COLOUR_BG	40	curses.h
17702	COLOR_FG	COLOUR_FG	curses.h
17703	COLOR_BG	COLOUR_BG	curses.h
17704	COLOR_BLACK	COLOUR_BLACK	curses.h
17705	COLOR_BLUE	COLOUR_BLUE	curses.h
17706	COLOR_GREEN	COLOUR_GREEN	curses.h
17707	COLOR_CYAN	COLOUR_CYAN	curses.h
17708	COLOR_RED	COLOUR_RED	curses.h
17709	COLOR_MAGENTA	COLOUR_MAGENTA	curses.h
17710	COLOR_YELLOW	COLOUR_YELLOW	curses.h
17711	COLOR_WHITE	COLOUR_WHITE	curses.h
17712	COLORS	COLOURS	curses.h
17713	init_color	( c, r, g, b ) init_colour ( (c), (r), (g), (b) )	curses.h
17714	EI_NIDENT	16	elf.h	Size of e_ident array.
17715	ET_NONE	0	elf.h	No file type
17716	ET_REL	1	elf.h	Relocatable file
17717	ET_EXEC	2	elf.h	Executable file
17718	ET_DYN	3	elf.h	Shared object file
17719	ET_CORE	4	elf.h	Core file
17720	EM_NONE	0	elf.h	No machine
17721	EM_M32	1	elf.h	AT&T WE 32100
17722	EM_SPARC	2	elf.h	SUN SPARC
17723	EM_386	3	elf.h	Intel 80386+
17724	EM_68K	4	elf.h	Motorola m68k family
17725	EM_88K	5	elf.h	Motorola m88k family
17726	EM_486	6	elf.h	Perhaps disused
17727	EM_860	7	elf.h	Intel 80860
17728	EM_MIPS	8	elf.h	MIPS R3000 big-endian
17729	EM_S370	9	elf.h	IBM System/370
17730	EM_MIPS_RS3_LE	10	elf.h	MIPS R3000 little-endian
17731	EM_PARISC	15	elf.h	HPPA
17732	EM_VPP500	17	elf.h	Fujitsu VPP500
17733	EM_SPARC32PLUS	18	elf.h	Sun's "v8plus"
17734	EM_960	19	elf.h	Intel 80960
17735	EM_PPC	20	elf.h	PowerPC
17736	EM_PPC64	21	elf.h	PowerPC 64-bit
17737	EM_S390	22	elf.h	IBM S390
17738	EM_V800	36	elf.h	NEC V800 series
17739	EM_FR20	37	elf.h	Fujitsu FR20
17740	EM_RH32	38	elf.h	TRW RH-32
17741	EM_RCE	39	elf.h	Motorola RCE
17742	EM_ARM	40	elf.h	ARM
17743	EM_FAKE_ALPHA	41	elf.h	Digital Alpha
17744	EM_SH	42	elf.h	Hitachi SH
17745	EM_SPARCV9	43	elf.h	SPARC v9 64-bit
17746	EM_TRICORE	44	elf.h	Siemens Tricore
17747	EM_ARC	45	elf.h	Argonaut RISC Core
17748	EM_H8_300	46	elf.h	Hitachi H8/300
17749	EM_H8_300H	47	elf.h	Hitachi H8/300H
17750	EM_H8S	48	elf.h	Hitachi H8S
17751	EM_H8_500	49	elf.h	Hitachi H8/500
17752	EM_IA_64	50	elf.h	Intel Merced
17753	EM_MIPS_X	51	elf.h	Stanford MIPS-X
17754	EM_COLDFIRE	52	elf.h	Motorola Coldfire
17755	EM_68HC12	53	elf.h	Motorola M68HC12
17756	EM_MMA	54	elf.h	Fujitsu MMA Multimedia Accelerator
17757	EM_PCP	55	elf.h	Siemens PCP
17758	EM_NCPU	56	elf.h	Sony nCPU embeeded RISC
17759	EM_NDR1	57	elf.h	Denso NDR1 microprocessor
17760	EM_STARCORE	58	elf.h	Motorola Start*Core processor
17761	EM_ME16	59	elf.h	Toyota ME16 processor
17762	EM_ST100	60	elf.h	STMicroelectronic ST100 processor
17763	EM_TINYJ	61	elf.h	Advanced Logic Corp. Tinyj emb.fam
17764	EM_X86_64	62	elf.h	AMD x86-64 architecture
17765	EM_PDSP	63	elf.h	Sony DSP Processor
17766	EM_FX66	66	elf.h	Siemens FX66 microcontroller
17767	EM_ST9PLUS	67	elf.h	STMicroelectronics ST9+ 8/16 mc
17768	EM_ST7	68	elf.h	STmicroelectronics ST7 8 bit mc
17769	EM_68HC16	69	elf.h	Motorola MC68HC16 microcontroller
17770	EM_68HC11	70	elf.h	Motorola MC68HC11 microcontroller
17771	EM_68HC08	71	elf.h	Motorola MC68HC08 microcontroller
17772	EM_68HC05	72	elf.h	Motorola MC68HC05 microcontroller
17773	EM_SVX	73	elf.h	Silicon Graphics SVx
17774	EM_AT19	74	elf.h	STMicroelectronics ST19 8 bit mc
17775	EM_VAX	75	elf.h	Digital VAX
17776	EM_CRIS	76	elf.h	Axis Communications 32-bit embedded processor
17777	EM_JAVELIN	77	elf.h	Infineon Technologies 32-bit embedded processor
17778	EM_FIREPATH	78	elf.h	Element 14 64-bit DSP Processor
17779	EM_ZSP	79	elf.h	LSI Logic 16-bit DSP Processor
17780	EM_MMIX	80	elf.h	Donald Knuth's educational 64-bit processor
17781	EM_HUANY	81	elf.h	Harvard University machine-independent object files
17782	EM_PRISM	82	elf.h	SiTera Prism
17783	EM_AVR	83	elf.h	Atmel AVR 8-bit microcontroller
17784	EM_FR30	84	elf.h	Fujitsu FR30
17785	EM_D10V	85	elf.h	Mitsubishi D10V
17786	EM_D30V	86	elf.h	Mitsubishi D30V
17787	EM_V850	87	elf.h	NEC v850
17788	EM_M32R	88	elf.h	Mitsubishi M32R
17789	EM_MN10300	89	elf.h	Matsushita MN10300
17790	EM_MN10200	90	elf.h	Matsushita MN10200
17791	EM_PJ	91	elf.h	picoJava
17792	EM_OPENRISC	92	elf.h	OpenRISC 32-bit embedded processor
17793	EM_ARC_A5	93	elf.h	ARC Cores Tangent-A5
17794	EM_XTENSA	94	elf.h	Tensilica Xtensa Architecture
17795	EM_NUM	95	elf.h
17796	PT_NULL	0	elf.h	Unused entry.
17797	PT_LOAD	1	elf.h	Loadable segment.
17798	PT_DYNAMIC	2	elf.h	Dynamic linking information segment.
17799	PT_INTERP	3	elf.h	Pathname of interpreter.
17800	PT_NOTE	4	elf.h	Auxiliary information.
17801	PT_SHLIB	5	elf.h	Reserved (not used).
17802	PT_PHDR	6	elf.h	Location of program header itself.
17803	PF_X	0x1	elf.h	Executable.
17804	PF_W	0x2	elf.h	Writable.
17805	PF_R	0x4	elf.h	Readable.
17806	ELF_PROGRAM_RETURNS_BIT	0x8000000	elf.h	e_flags bit 31
17807	EI_MAG0	0	elf.h
17808	ELFMAG0	0x7f	elf.h
17809	EI_MAG1	1	elf.h
17810	ELFMAG1	'E'	elf.h
17811	EI_MAG2	2	elf.h
17812	ELFMAG2	'L'	elf.h
17813	EI_MAG3	3	elf.h
17814	ELFMAG3	'F'	elf.h
17815	ELFMAG	"\177ELF"	elf.h
17816	SELFMAG	4	elf.h
17817	EI_CLASS	4	elf.h	File class byte index
17818	ELFCLASSNONE	0	elf.h	Invalid class
17819	ELFCLASS32	1	elf.h	32-bit objects
17820	ELFCLASS64	2	elf.h	64-bit objects
17821	EI_DATA	5	elf.h	Data encodeing byte index
17822	ELFDATANONE	0	elf.h	Invalid data encoding
17823	ELFDATA2LSB	1	elf.h	2's complement little endian
17824	ELFDATA2MSB	2	elf.h	2's complement big endian
17825	EI_VERSION	6	elf.h	File version byte index
17826	EV_NONE	0	elf.h	Invalid ELF Version
17827	EV_CURRENT	1	elf.h	Current version
17828	ELF32_PHDR_SIZE	(8*4)	elf.h	Size of an elf program header
17829	__LITTLE_ENDIAN	1234	endian.h
17830	__BIG_ENDIAN	4321	endian.h
17831	__PDP_ENDIAN	3412	endian.h
17832	ERRFILE	( 0 * ( ( int ) missing_errfile_declaration ) )	errno.h
17833	PXENV_STATUS_SUCCESS	0x0000	errno.h
17834	PXENV_STATUS_FAILURE	0x0001	errno.h
17835	PXENV_STATUS_BAD_FUNC	0x0002	errno.h
17836	PXENV_STATUS_UNSUPPORTED	0x0003	errno.h
17837	PXENV_STATUS_KEEP_UNDI	0x0004	errno.h
17838	PXENV_STATUS_KEEP_ALL	0x0005	errno.h
17839	PXENV_STATUS_OUT_OF_RESOURCES	0x0006	errno.h
17840	PXENV_STATUS_ARP_TIMEOUT	0x0011	errno.h
17841	PXENV_STATUS_UDP_CLOSED	0x0018	errno.h
17842	PXENV_STATUS_UDP_OPEN	0x0019	errno.h
17843	PXENV_STATUS_TFTP_CLOSED	0x001a	errno.h
17844	PXENV_STATUS_TFTP_OPEN	0x001b	errno.h
17845	PXENV_STATUS_MCOPY_PROBLEM	0x0020	errno.h
17846	PXENV_STATUS_BIS_INTEGRITY_FAIL	0x0021	errno.h
17847	PXENV_STATUS_BIS_VALIDATE_FAILU	0x0022	errno.h
17848	PXENV_STATUS_BIS_INIT_FAILURE	0x0023	errno.h
17849	PXENV_STATUS_BIS_SHUTDOWN_FAILU	0x0024	errno.h
17850	PXENV_STATUS_BIS_GBOA_FAILURE	0x0025	errno.h
17851	PXENV_STATUS_BIS_FREE_FAILURE	0x0026	errno.h
17852	PXENV_STATUS_BIS_GSI_FAILURE	0x0027	errno.h
17853	PXENV_STATUS_BIS_BAD_CKSUM	0x0028	errno.h
17854	PXENV_STATUS_TFTP_CANNOT_ARP_AD	0x0030	errno.h
17855	PXENV_STATUS_TFTP_OPEN_TIMEOUT	0x0032	errno.h
17856	PXENV_STATUS_TFTP_UNKNOWN_OPCOD	0x0033	errno.h
17857	PXENV_STATUS_TFTP_READ_TIMEOUT	0x0035	errno.h
17858	PXENV_STATUS_TFTP_ERROR_OPCODE	0x0036	errno.h
17859	PXENV_STATUS_TFTP_CANNOT_OPEN_C	0x0038	errno.h
17860	PXENV_STATUS_TFTP_CANNOT_READ_F	0x0039	errno.h
17861	PXENV_STATUS_TFTP_TOO_MANY_PACK	0x003a	errno.h
17862	PXENV_STATUS_TFTP_FILE_NOT_FOUN	0x003b	errno.h
17863	PXENV_STATUS_TFTP_ACCESS_VIOLAT	0x003c	errno.h
17864	PXENV_STATUS_TFTP_NO_MCAST_ADDR	0x003d	errno.h
17865	PXENV_STATUS_TFTP_NO_FILESIZE	0x003e	errno.h
17866	PXENV_STATUS_TFTP_INVALID_PACKE	0x003f	errno.h
17867	PXENV_STATUS_DHCP_TIMEOUT	0x0051	errno.h
17868	PXENV_STATUS_DHCP_NO_IP_ADDRESS	0x0052	errno.h
17869	PXENV_STATUS_DHCP_NO_BOOTFILE_N	0x0053	errno.h
17870	PXENV_STATUS_DHCP_BAD_IP_ADDRES	0x0054	errno.h
17871	PXENV_STATUS_UNDI_INVALID_FUNCT	0x0060	errno.h
17872	PXENV_STATUS_UNDI_MEDIATEST_FAI	0x0061	errno.h
17873	PXENV_STATUS_UNDI_CANNOT_INIT_N	0x0062	errno.h
17874	PXENV_STATUS_UNDI_CANNOT_INITIA	0x0063	errno.h
17875	PXENV_STATUS_UNDI_CANNOT_INITIA	0x0064	errno.h
17876	PXENV_STATUS_UNDI_CANNOT_READ_C	0x0065	errno.h
17877	PXENV_STATUS_UNDI_CANNOT_READ_I	0x0066	errno.h
17878	PXENV_STATUS_UNDI_BAD_MAC_ADDRE	0x0067	errno.h
17879	PXENV_STATUS_UNDI_BAD_EEPROM_CH	0x0068	errno.h
17880	PXENV_STATUS_UNDI_ERROR_SETTING	0x0069	errno.h
17881	PXENV_STATUS_UNDI_INVALID_STATE	0x006a	errno.h
17882	PXENV_STATUS_UNDI_TRANSMIT_ERRO	0x006b	errno.h
17883	PXENV_STATUS_UNDI_INVALID_PARAM	0x006c	errno.h
17884	PXENV_STATUS_BSTRAP_PROMPT_MENU	0x0074	errno.h
17885	PXENV_STATUS_BSTRAP_MCAST_ADDR	0x0076	errno.h
17886	PXENV_STATUS_BSTRAP_MISSING_LIS	0x0077	errno.h
17887	PXENV_STATUS_BSTRAP_NO_RESPONSE	0x0078	errno.h
17888	PXENV_STATUS_BSTRAP_FILE_TOO_BI	0x0079	errno.h
17889	PXENV_STATUS_BINL_CANCELED_BY_K	0x00a0	errno.h
17890	PXENV_STATUS_BINL_NO_PXE_SERVER	0x00a1	errno.h
17891	PXENV_STATUS_NOT_AVAILABLE_IN_P	0x00a2	errno.h
17892	PXENV_STATUS_NOT_AVAILABLE_IN_R	0x00a3	errno.h
17893	PXENV_STATUS_BUSD_DEVICE_NOT_SU	0x00b0	errno.h
17894	PXENV_STATUS_LOADER_NO_FREE_BAS	0x00c0	errno.h
17895	PXENV_STATUS_LOADER_NO_BC_ROMID	0x00c1	errno.h
17896	PXENV_STATUS_LOADER_BAD_BC_ROMI	0x00c2	errno.h
17897	PXENV_STATUS_LOADER_BAD_BC_RUNT	0x00c3	errno.h
17898	PXENV_STATUS_LOADER_NO_UNDI_ROM	0x00c4	errno.h
17899	PXENV_STATUS_LOADER_BAD_UNDI_RO	0x00c5	errno.h
17900	PXENV_STATUS_LOADER_BAD_UNDI_DR	0x00c6	errno.h
17901	PXENV_STATUS_LOADER_NO_PXE_STRU	0x00c8	errno.h
17902	PXENV_STATUS_LOADER_NO_PXENV_ST	0x00c9	errno.h
17903	PXENV_STATUS_LOADER_UNDI_START	0x00ca	errno.h
17904	PXENV_STATUS_LOADER_BC_START	0x00cb	errno.h
17905	ENOERR	( ERRFILE \| PXENV_STATUS_SUCCESS \| 0x00000000 )	errno.h
17906	E2BIG	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x01000000 )	errno.h
17907	EACCES	( ERRFILE \| PXENV_STATUS_TFTP_ACCESS_VIOLATION \| 0x02000000 )	errno.h
17908	EADDRINUSE	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x03000000 )	errno.h
17909	EADDRNOTAVAIL	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x04000000 )	errno.h
17910	EAFNOSUPPORT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x05000000 )	errno.h
17911	EAGAIN	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x06000000 )	errno.h
17912	EALREADY	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x07000000 )	errno.h
17913	EBADF	( ERRFILE \| PXENV_STATUS_TFTP_CLOSED \| 0x08000000 )	errno.h
17914	EBADMSG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x09000000 )	errno.h
17915	EBUSY	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x0a000000 )	errno.h
17916	ECANCELED	( ERRFILE \| PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE \| 0x0b000000 )	errno.h
17917	ECHILD	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x0c000000 )	errno.h
17918	ECONNABORTED	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x0d000000 )	errno.h
17919	ECONNREFUSED	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION \| 0x0e000000 )	errno.h
17920	ECONNRESET	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x0f000000 )	errno.h
17921	EDEADLK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x10000000 )	errno.h
17922	EDESTADDRREQ	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x11000000 )	errno.h
17923	EDOM	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x12000000 )	errno.h
17924	EDQUOT	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x13000000 )	errno.h
17925	EEXIST	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x14000000 )	errno.h
17926	EFAULT	( ERRFILE \| PXENV_STATUS_MCOPY_PROBLEM \| 0x15000000 )	errno.h
17927	EFBIG	( ERRFILE \| PXENV_STATUS_MCOPY_PROBLEM \| 0x16000000 )	errno.h
17928	EHOSTUNREACH	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x17000000 )	errno.h
17929	EIDRM	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x18000000 )	errno.h
17930	EILSEQ	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x19000000 )	errno.h
17931	EINPROGRESS	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1a000000 )	errno.h
17932	EINTR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1b000000 )	errno.h
17933	EINVAL	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x1c000000 )	errno.h
17934	EIO	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x1d000000 )	errno.h
17935	EISCONN	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x1e000000 )	errno.h
17936	EISDIR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1f000000 )	errno.h
17937	ELOOP	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x20000000 )	errno.h
17938	EMFILE	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x21000000 )	errno.h
17939	EMLINK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x22000000 )	errno.h
17940	EMSGSIZE	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x23000000 )	errno.h
17941	EMULTIHOP	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x24000000 )	errno.h
17942	ENAMETOOLONG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x25000000 )	errno.h
17943	ENETDOWN	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x26000000 )	errno.h
17944	ENETRESET	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x27000000 )	errno.h
17945	ENETUNREACH	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x28000000 )	errno.h
17946	ENFILE	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x29000000 )	errno.h
17947	ENOBUFS	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x2a000000 )	errno.h
17948	ENODATA	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2b000000 )	errno.h
17949	ENODEV	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x2c000000 )	errno.h
17950	ENOENT	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x2d000000 )	errno.h
17951	ENOEXEC	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2e000000 )	errno.h
17952	ENOLCK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2f000000 )	errno.h
17953	ENOLINK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x30000000 )	errno.h
17954	ENOMEM	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x31000000 )	errno.h
17955	ENOMSG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x32000000 )	errno.h
17956	ENOPROTOOPT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x33000000 )	errno.h
17957	ENOSPC	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x34000000 )	errno.h
17958	ENOSR	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x35000000 )	errno.h
17959	ENOSTR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x36000000 )	errno.h
17960	ENOSYS	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x37000000 )	errno.h
17961	ENOTCONN	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x38000000 )	errno.h
17962	ENOTDIR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x39000000 )	errno.h
17963	ENOTEMPTY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3a000000 )	errno.h
17964	ENOTSOCK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3b000000 )	errno.h
17965	ENOTSUP	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x3c000000 )	errno.h
17966	ENOTTY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3d000000 )	errno.h
17967	ENXIO	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x3e000000 )	errno.h
17968	EOPNOTSUPP	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x3f000000 )	errno.h
17969	EOVERFLOW	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x40000000 )	errno.h
17970	EPERM	( ERRFILE \| PXENV_STATUS_TFTP_ACCESS_VIOLATION \| 0x41000000 )	errno.h
17971	EPIPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x42000000 )	errno.h
17972	EPROTO	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x43000000 )	errno.h
17973	EPROTONOSUPPORT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x44000000 )	errno.h
17974	EPROTOTYPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x45000000 )	errno.h
17975	ERANGE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x46000000 )	errno.h
17976	EROFS	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x47000000 )	errno.h
17977	ESPIPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x48000000 )	errno.h
17978	ESRCH	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x49000000 )	errno.h
17979	ESTALE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4a000000 )	errno.h
17980	ETIME	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4b000000 )	errno.h
17981	ETIMEDOUT	( ERRFILE \| PXENV_STATUS_TFTP_READ_TIMEOUT \| 0x4c000000 )	errno.h
17982	ETXTBSY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4d000000 )	errno.h
17983	EWOULDBLOCK	( ERRFILE \| PXENV_STATUS_TFTP_OPEN \| 0x4e000000 )	errno.h
17984	EXDEV	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4f000000 )	errno.h
17985	EUNIQ_01	0x00000100	errno.h
17986	EUNIQ_02	0x00000200	errno.h
17987	EUNIQ_03	0x00000300	errno.h
17988	EUNIQ_04	0x00000400	errno.h
17989	EUNIQ_05	0x00000500	errno.h
17990	EUNIQ_06	0x00000600	errno.h
17991	EUNIQ_07	0x00000700	errno.h
17992	EUNIQ_08	0x00000800	errno.h
17993	EUNIQ_09	0x00000900	errno.h
17994	EUNIQ_0A	0x00000a00	errno.h
17995	EUNIQ_0B	0x00000b00	errno.h
17996	EUNIQ_0C	0x00000c00	errno.h
17997	EUNIQ_0D	0x00000d00	errno.h
17998	EUNIQ_0E	0x00000e00	errno.h
17999	EUNIQ_0F	0x00000f00	errno.h
18000	EUNIQ_10	0x00001000	errno.h
18001	EUNIQ_11	0x00001100	errno.h
18002	EUNIQ_12	0x00001200	errno.h
18003	EUNIQ_13	0x00001300	errno.h
18004	EUNIQ_14	0x00001400	errno.h
18005	EUNIQ_15	0x00001500	errno.h
18006	EUNIQ_16	0x00001600	errno.h
18007	EUNIQ_17	0x00001700	errno.h
18008	EUNIQ_18	0x00001800	errno.h
18009	EUNIQ_19	0x00001900	errno.h
18010	EUNIQ_1A	0x00001a00	errno.h
18011	EUNIQ_1B	0x00001b00	errno.h
18012	EUNIQ_1C	0x00001c00	errno.h
18013	EUNIQ_1D	0x00001d00	errno.h
18014	EUNIQ_1E	0x00001e00	errno.h
18015	EUNIQ_1F	0x00001f00	errno.h
18016	VALID_LINK_TIMEOUT	100	etherboot.h	10.0 seconds
18017	DISK_IDE	1	fs.h
18018	DISK_MEM	2	fs.h
18019	DISK_USB	3	fs.h
18020	PARTITION_UNKNOWN	0xbad6a7	fs.h
18021	I365_IDENT	0x00	i82365.h	Identification and revision
18022	I365_STATUS	0x01	i82365.h	Interface status
18023	I365_POWER	0x02	i82365.h	Power and RESETDRV control
18024	I365_INTCTL	0x03	i82365.h	Interrupt and general control
18025	I365_CSC	0x04	i82365.h	Card status change
18026	I365_CSCINT	0x05	i82365.h	Card status change interrupt control
18027	I365_ADDRWIN	0x06	i82365.h	Address window enable
18028	I365_IOCTL	0x07	i82365.h	I/O control
18029	I365_GENCTL	0x16	i82365.h	Card detect and general control
18030	I365_GBLCTL	0x1E	i82365.h	Global control register
18031	I365_W_START	0	i82365.h
18032	I365_W_STOP	2	i82365.h
18033	I365_W_OFF	4	i82365.h
18034	I365_CS_BVD1	0x01	i82365.h
18035	I365_CS_STSCHG	0x01	i82365.h
18036	I365_CS_BVD2	0x02	i82365.h
18037	I365_CS_SPKR	0x02	i82365.h
18038	I365_CS_DETECT	0x0C	i82365.h
18039	I365_CS_WRPROT	0x10	i82365.h
18040	I365_CS_READY	0x20	i82365.h	Inverted
18041	I365_CS_POWERON	0x40	i82365.h
18042	I365_CS_GPI	0x80	i82365.h
18043	I365_PWR_OFF	0x00	i82365.h	Turn off the socket
18044	I365_PWR_OUT	0x80	i82365.h	Output enable
18045	I365_PWR_NORESET	0x40	i82365.h	Disable RESETDRV on resume
18046	I365_PWR_AUTO	0x20	i82365.h	Auto pwr switch enable
18047	I365_VCC_MASK	0x18	i82365.h	Mask for turning off Vcc
18048	I365_VCC_5V	0x10	i82365.h	Vcc = 5.0v
18049	I365_VCC_3V	0x18	i82365.h	Vcc = 3.3v
18050	I365_VPP2_MASK	0x0c	i82365.h	Mask for turning off Vpp2
18051	I365_VPP2_5V	0x04	i82365.h	Vpp2 = 5.0v
18052	I365_VPP2_12V	0x08	i82365.h	Vpp2 = 12.0v
18053	I365_VPP1_MASK	0x03	i82365.h	Mask for turning off Vpp1
18054	I365_VPP1_5V	0x01	i82365.h	Vpp2 = 5.0v
18055	I365_VPP1_12V	0x02	i82365.h	Vpp2 = 12.0v
18056	I365_RING_ENA	0x80	i82365.h
18057	I365_PC_RESET	0x40	i82365.h
18058	I365_PC_IOCARD	0x20	i82365.h
18059	I365_INTR_ENA	0x10	i82365.h
18060	I365_IRQ_MASK	0x0F	i82365.h
18061	I365_CSC_BVD1	0x01	i82365.h
18062	I365_CSC_STSCHG	0x01	i82365.h
18063	I365_CSC_BVD2	0x02	i82365.h
18064	I365_CSC_READY	0x04	i82365.h
18065	I365_CSC_DETECT	0x08	i82365.h
18066	I365_CSC_ANY	0x0F	i82365.h
18067	I365_CSC_GPI	0x10	i82365.h
18068	I365_CTL_16DELAY	0x01	i82365.h
18069	I365_CTL_RESET	0x02	i82365.h
18070	I365_CTL_GPI_ENA	0x04	i82365.h
18071	I365_CTL_GPI_CTL	0x08	i82365.h
18072	I365_CTL_RESUME	0x10	i82365.h
18073	I365_CTL_SW_IRQ	0x20	i82365.h
18074	I365_GBL_PWRDOWN	0x01	i82365.h
18075	I365_GBL_CSC_LEV	0x02	i82365.h
18076	I365_GBL_WRBACK	0x04	i82365.h
18077	I365_GBL_IRQ_0_LEV	0x08	i82365.h
18078	I365_GBL_IRQ_1_LEV	0x10	i82365.h
18079	I365_MEM_16BIT	0x8000	i82365.h	In memory start high byte
18080	I365_MEM_0WS	0x4000	i82365.h
18081	I365_MEM_WS1	0x8000	i82365.h	In memory stop high byte
18082	I365_MEM_WS0	0x4000	i82365.h
18083	I365_MEM_WRPROT	0x8000	i82365.h	In offset high byte
18084	I365_MEM_REG	0x4000	i82365.h
18085	I365_IDENT_VADEM	0x08	i82365.h
18086	VG468_VPP2_MASK	0x0c	i82365.h
18087	VG468_VPP2_5V	0x04	i82365.h
18088	VG468_VPP2_12V	0x08	i82365.h
18089	VG469_VSENSE	0x1f	i82365.h	Card voltage sense
18090	VG469_VSELECT	0x2f	i82365.h	Card voltage select
18091	VG468_CTL	0x38	i82365.h	Control register
18092	VG468_TIMER	0x39	i82365.h	Timer control
18093	VG468_MISC	0x3a	i82365.h	Miscellaneous
18094	VG468_GPIO_CFG	0x3b	i82365.h	GPIO configuration
18095	VG469_EXT_MODE	0x3c	i82365.h	Extended mode register
18096	VG468_SELECT	0x3d	i82365.h	Programmable chip select
18097	VG468_SELECT_CFG	0x3e	i82365.h	Chip select configuration
18098	VG468_ATA	0x3f	i82365.h	ATA control
18099	VG469_VSENSE_A_VS1	0x01	i82365.h
18100	VG469_VSENSE_A_VS2	0x02	i82365.h
18101	VG469_VSENSE_B_VS1	0x04	i82365.h
18102	VG469_VSENSE_B_VS2	0x08	i82365.h
18103	VG469_VSEL_VCC	0x03	i82365.h
18104	VG469_VSEL_5V	0x00	i82365.h
18105	VG469_VSEL_3V	0x03	i82365.h
18106	VG469_VSEL_MAX	0x0c	i82365.h
18107	VG469_VSEL_EXT_STAT	0x10	i82365.h
18108	VG469_VSEL_EXT_BUS	0x20	i82365.h
18109	VG469_VSEL_MIXED	0x40	i82365.h
18110	VG469_VSEL_ISA	0x80	i82365.h
18111	VG468_CTL_SLOW	0x01	i82365.h	600ns memory timing
18112	VG468_CTL_ASYNC	0x02	i82365.h	Asynchronous bus clocking
18113	VG468_CTL_TSSI	0x08	i82365.h	Tri-state some outputs
18114	VG468_CTL_DELAY	0x10	i82365.h	Card detect debounce
18115	VG468_CTL_INPACK	0x20	i82365.h	Obey INPACK signal?
18116	VG468_CTL_POLARITY	0x40	i82365.h	VCCEN polarity
18117	VG468_CTL_COMPAT	0x80	i82365.h	Compatibility stuff
18118	VG469_CTL_WS_COMPAT	0x04	i82365.h	Wait state compatibility
18119	VG469_CTL_STRETCH	0x10	i82365.h	LED stretch
18120	VG468_TIMER_ZEROPWR	0x10	i82365.h	Zero power control
18121	VG468_TIMER_SIGEN	0x20	i82365.h	Power up
18122	VG468_TIMER_STATUS	0x40	i82365.h	Activity timer status
18123	VG468_TIMER_RES	0x80	i82365.h	Timer resolution
18124	VG468_TIMER_MASK	0x0f	i82365.h	Activity timer timeout
18125	VG468_MISC_GPIO	0x04	i82365.h	General-purpose IO
18126	VG468_MISC_DMAWSB	0x08	i82365.h	DMA wait state control
18127	VG469_MISC_LEDENA	0x10	i82365.h	LED enable
18128	VG468_MISC_VADEMREV	0x40	i82365.h	Vadem revision control
18129	VG468_MISC_UNLOCK	0x80	i82365.h	Unique register lock
18130	VG469_MODE_VPPST	0x03	i82365.h	Vpp steering control
18131	VG469_MODE_INT_SENSE	0x04	i82365.h	Internal voltage sense
18132	VG469_MODE_CABLE	0x08	i82365.h
18133	VG469_MODE_COMPAT	0x10	i82365.h	i82365sl B or DF step
18134	VG469_MODE_TEST	0x20	i82365.h
18135	VG469_MODE_RIO	0x40	i82365.h	Steer RIO to INTR?
18136	VG469_MODE_B_3V	0x01	i82365.h	3.3v for socket B
18137	RF5C_MODE_CTL	0x1f	i82365.h	Mode control
18138	RF5C_PWR_CTL	0x2f	i82365.h	Mixed voltage control
18139	RF5C_CHIP_ID	0x3a	i82365.h	Chip identification
18140	RF5C_MODE_CTL_3	0x3b	i82365.h	Mode control 3
18141	RF5C_MODE_ATA	0x01	i82365.h	ATA mode
18142	RF5C_MODE_LED_ENA	0x02	i82365.h	IRQ 12 is LED
18143	RF5C_MODE_CA21	0x04	i82365.h
18144	RF5C_MODE_CA22	0x08	i82365.h
18145	RF5C_MODE_CA23	0x10	i82365.h
18146	RF5C_MODE_CA24	0x20	i82365.h
18147	RF5C_MODE_CA25	0x40	i82365.h
18148	RF5C_MODE_3STATE_BIT7	0x80	i82365.h
18149	RF5C_PWR_VCC_3V	0x01	i82365.h
18150	RF5C_PWR_IREQ_HIGH	0x02	i82365.h
18151	RF5C_PWR_INPACK_ENA	0x04	i82365.h
18152	RF5C_PWR_5V_DET	0x08	i82365.h
18153	RF5C_PWR_TC_SEL	0x10	i82365.h	Terminal Count: irq 11 or 15
18154	RF5C_PWR_DREQ_LOW	0x20	i82365.h
18155	RF5C_PWR_DREQ_OFF	0x00	i82365.h	DREQ steering control
18156	RF5C_PWR_DREQ_INPACK	0x40	i82365.h
18157	RF5C_PWR_DREQ_SPKR	0x80	i82365.h
18158	RF5C_PWR_DREQ_IOIS16	0xc0	i82365.h
18159	RF5C_CHIP_RF5C296	0x32	i82365.h
18160	RF5C_CHIP_RF5C396	0xb2	i82365.h
18161	RF5C_MCTL3_DISABLE	0x01	i82365.h	Disable PCMCIA interface
18162	RF5C_MCTL3_DMA_ENA	0x02	i82365.h
18163	RL5C46X_BCR_3E0_ENA	0x0800	i82365.h
18164	RL5C46X_BCR_3E2_ENA	0x1000	i82365.h
18165	RL5C4XX_CONFIG	0x80	i82365.h	16 bit
18166	RL5C4XX_CONFIG_IO_1_MODE	0x0200	i82365.h
18167	RL5C4XX_CONFIG_IO_0_MODE	0x0100	i82365.h
18168	RL5C4XX_CONFIG_PREFETCH	0x0001	i82365.h
18169	RL5C4XX_MISC	0x0082	i82365.h	16 bit
18170	RL5C4XX_MISC_HW_SUSPEND_ENA	0x0002	i82365.h
18171	RL5C4XX_MISC_VCCEN_POL	0x0100	i82365.h
18172	RL5C4XX_MISC_VPPEN_POL	0x0200	i82365.h
18173	RL5C46X_MISC_SUSPEND	0x0001	i82365.h
18174	RL5C46X_MISC_PWR_SAVE_2	0x0004	i82365.h
18175	RL5C46X_MISC_IFACE_BUSY	0x0008	i82365.h
18176	RL5C46X_MISC_B_LOCK	0x0010	i82365.h
18177	RL5C46X_MISC_A_LOCK	0x0020	i82365.h
18178	RL5C46X_MISC_PCI_LOCK	0x0040	i82365.h
18179	RL5C47X_MISC_IFACE_BUSY	0x0004	i82365.h
18180	RL5C47X_MISC_PCI_INT_MASK	0x0018	i82365.h
18181	RL5C47X_MISC_PCI_INT_DIS	0x0020	i82365.h
18182	RL5C47X_MISC_SUBSYS_WR	0x0040	i82365.h
18183	RL5C47X_MISC_SRIRQ_ENA	0x0080	i82365.h
18184	RL5C47X_MISC_5V_DISABLE	0x0400	i82365.h
18185	RL5C47X_MISC_LED_POL	0x0800	i82365.h
18186	RL5C4XX_16BIT_CTL	0x0084	i82365.h	16 bit
18187	RL5C4XX_16CTL_IO_TIMING	0x0100	i82365.h
18188	RL5C4XX_16CTL_MEM_TIMING	0x0200	i82365.h
18189	RL5C46X_16CTL_LEVEL_1	0x0010	i82365.h
18190	RL5C46X_16CTL_LEVEL_2	0x0020	i82365.h
18191	RL5C4XX_16BIT_IO_0	0x0088	i82365.h	16 bit
18192	RL5C4XX_16BIT_MEM_0	0x0088	i82365.h	16 bit
18193	RL5C4XX_SETUP_MASK	0x0007	i82365.h
18194	RL5C4XX_SETUP_SHIFT	0	i82365.h
18195	RL5C4XX_CMD_MASK	0x01f0	i82365.h
18196	RL5C4XX_CMD_SHIFT	4	i82365.h
18197	RL5C4XX_HOLD_MASK	0x1c00	i82365.h
18198	RL5C4XX_HOLD_SHIFT	10	i82365.h
18199	RL5C4XX_MISC_CONTROL	0x2F	i82365.h	8 bit
18200	RL5C4XX_ZV_ENABLE	0x08	i82365.h
18201	PCI_VENDOR_ID_CIRRUS	0x1013	i82365.h
18202	PCI_DEVICE_ID_CIRRUS_6729	0x1100	i82365.h
18203	PCI_DEVICE_ID_CIRRUS_6832	0x1110	i82365.h
18204	PD67_MISC_CTL_1	0x16	i82365.h	Misc control 1
18205	PD67_FIFO_CTL	0x17	i82365.h	FIFO control
18206	PD67_MISC_CTL_2	0x1E	i82365.h	Misc control 2
18207	PD67_CHIP_INFO	0x1f	i82365.h	Chip information
18208	PD67_ATA_CTL	0x026	i82365.h	6730: ATA control
18209	PD67_EXT_INDEX	0x2e	i82365.h	Extension index
18210	PD67_EXT_DATA	0x2f	i82365.h	Extension data
18211	PD67_DATA_MASK0	0x01	i82365.h	Data mask 0
18212	PD67_DATA_MASK1	0x02	i82365.h	Data mask 1
18213	PD67_DMA_CTL	0x03	i82365.h	DMA control
18214	PD67_EXT_CTL_1	0x03	i82365.h	Extension control 1
18215	PD67_EXTERN_DATA	0x0a	i82365.h
18216	PD67_MISC_CTL_3	0x25	i82365.h
18217	PD67_SMB_PWR_CTL	0x26	i82365.h
18218	PD67_MC1_5V_DET	0x01	i82365.h	5v detect
18219	PD67_MC1_MEDIA_ENA	0x01	i82365.h	6730: Multimedia enable
18220	PD67_MC1_VCC_3V	0x02	i82365.h	3.3v Vcc
18221	PD67_MC1_PULSE_MGMT	0x04	i82365.h
18222	PD67_MC1_PULSE_IRQ	0x08	i82365.h
18223	PD67_MC1_SPKR_ENA	0x10	i82365.h
18224	PD67_MC1_INPACK_ENA	0x80	i82365.h
18225	PD67_FIFO_EMPTY	0x80	i82365.h
18226	PD67_MC2_FREQ_BYPASS	0x01	i82365.h
18227	PD67_MC2_DYNAMIC_MODE	0x02	i82365.h
18228	PD67_MC2_SUSPEND	0x04	i82365.h
18229	PD67_MC2_5V_CORE	0x08	i82365.h
18230	PD67_MC2_LED_ENA	0x10	i82365.h	IRQ 12 is LED enable
18231	PD67_MC2_FAST_PCI	0x10	i82365.h	6729: PCI bus > 25 MHz
18232	PD67_MC2_3STATE_BIT7	0x20	i82365.h	Floppy change bit
18233	PD67_MC2_DMA_MODE	0x40	i82365.h
18234	PD67_MC2_IRQ15_RI	0x80	i82365.h	IRQ 15 is ring enable
18235	PD67_INFO_SLOTS	0x20	i82365.h	0 = 1 slot, 1 = 2 slots
18236	PD67_INFO_CHIP_ID	0xc0	i82365.h
18237	PD67_INFO_REV	0x1c	i82365.h
18238	PD67_TIME_SCALE	0xc0	i82365.h
18239	PD67_TIME_SCALE_1	0x00	i82365.h
18240	PD67_TIME_SCALE_16	0x40	i82365.h
18241	PD67_TIME_SCALE_256	0x80	i82365.h
18242	PD67_TIME_SCALE_4096	0xc0	i82365.h
18243	PD67_TIME_MULT	0x3f	i82365.h
18244	PD67_DMA_MODE	0xc0	i82365.h
18245	PD67_DMA_OFF	0x00	i82365.h
18246	PD67_DMA_DREQ_INPACK	0x40	i82365.h
18247	PD67_DMA_DREQ_WP	0x80	i82365.h
18248	PD67_DMA_DREQ_BVD2	0xc0	i82365.h
18249	PD67_DMA_PULLUP	0x20	i82365.h	Disable socket pullups?
18250	PD67_EC1_VCC_PWR_LOCK	0x01	i82365.h
18251	PD67_EC1_AUTO_PWR_CLEAR	0x02	i82365.h
18252	PD67_EC1_LED_ENA	0x04	i82365.h
18253	PD67_EC1_INV_CARD_IRQ	0x08	i82365.h
18254	PD67_EC1_INV_MGMT_IRQ	0x10	i82365.h
18255	PD67_EC1_PULLUP_CTL	0x20	i82365.h
18256	PD67_MC3_IRQ_MASK	0x03	i82365.h
18257	PD67_MC3_IRQ_PCPCI	0x00	i82365.h
18258	PD67_MC3_IRQ_EXTERN	0x01	i82365.h
18259	PD67_MC3_IRQ_PCIWAY	0x02	i82365.h
18260	PD67_MC3_IRQ_PCI	0x03	i82365.h
18261	PD67_MC3_PWR_MASK	0x0c	i82365.h
18262	PD67_MC3_PWR_SERIAL	0x00	i82365.h
18263	PD67_MC3_PWR_TI2202	0x08	i82365.h
18264	PD67_MC3_PWR_SMB	0x0c	i82365.h
18265	PD68_EXT_CTL_2	0x0b	i82365.h
18266	PD68_PCI_SPACE	0x22	i82365.h
18267	PD68_PCCARD_SPACE	0x23	i82365.h
18268	PD68_WINDOW_TYPE	0x24	i82365.h
18269	PD68_EXT_CSC	0x2e	i82365.h
18270	PD68_MISC_CTL_4	0x2f	i82365.h
18271	PD68_MISC_CTL_5	0x30	i82365.h
18272	PD68_MISC_CTL_6	0x31	i82365.h
18273	PD68_MC3_HW_SUSP	0x10	i82365.h
18274	PD68_MC3_MM_EXPAND	0x40	i82365.h
18275	PD68_MC3_MM_ARM	0x80	i82365.h
18276	PD6832_BCR_MGMT_IRQ_ENA	0x0800	i82365.h
18277	PD6832_SOCKET_NUMBER	0x004c	i82365.h	8 bit
18278	MII_BMCR	0x00	mii.h	Basic mode control register
18279	MII_BMSR	0x01	mii.h	Basic mode status register
18280	MII_PHYSID1	0x02	mii.h	PHYS ID 1
18281	MII_PHYSID2	0x03	mii.h	PHYS ID 2
18282	MII_ADVERTISE	0x04	mii.h	Advertisement control reg
18283	MII_LPA	0x05	mii.h	Link partner ability reg
18284	MII_EXPANSION	0x06	mii.h	Expansion register
18285	MII_CTRL1000	0x09	mii.h	1000BASE-T control
18286	MII_STAT1000	0x0a	mii.h	1000BASE-T status
18287	MII_ESTATUS	0x0f	mii.h	Extended Status
18288	MII_DCOUNTER	0x12	mii.h	Disconnect counter
18289	MII_FCSCOUNTER	0x13	mii.h	False carrier counter
18290	MII_NWAYTEST	0x14	mii.h	N-way auto-neg test reg
18291	MII_RERRCOUNTER	0x15	mii.h	Receive error counter
18292	MII_SREVISION	0x16	mii.h	Silicon revision
18293	MII_RESV1	0x17	mii.h	Reserved...
18294	MII_LBRERROR	0x18	mii.h	Lpback, rx, bypass error
18295	MII_PHYADDR	0x19	mii.h	PHY address
18296	MII_RESV2	0x1a	mii.h	Reserved...
18297	MII_TPISTATUS	0x1b	mii.h	TPI status for 10mbps
18298	MII_NCONFIG	0x1c	mii.h	Network interface config
18299	BMCR_RESV	0x003f	mii.h	Unused...
18300	BMCR_SPEED1000	0x0040	mii.h	MSB of Speed (1000)
18301	BMCR_CTST	0x0080	mii.h	Collision test
18302	BMCR_FULLDPLX	0x0100	mii.h	Full duplex
18303	BMCR_ANRESTART	0x0200	mii.h	Auto negotiation restart
18304	BMCR_ISOLATE	0x0400	mii.h	Disconnect DP83840 from MII
18305	BMCR_PDOWN	0x0800	mii.h	Powerdown the DP83840
18306	BMCR_ANENABLE	0x1000	mii.h	Enable auto negotiation
18307	BMCR_SPEED100	0x2000	mii.h	Select 100Mbps
18308	BMCR_LOOPBACK	0x4000	mii.h	TXD loopback bits
18309	BMCR_RESET	0x8000	mii.h	Reset the DP83840
18310	BMSR_ERCAP	0x0001	mii.h	Ext-reg capability
18311	BMSR_JCD	0x0002	mii.h	Jabber detected
18312	BMSR_LSTATUS	0x0004	mii.h	Link status
18313	BMSR_ANEGCAPABLE	0x0008	mii.h	Able to do auto-negotiation
18314	BMSR_RFAULT	0x0010	mii.h	Remote fault detected
18315	BMSR_ANEGCOMPLETE	0x0020	mii.h	Auto-negotiation complete
18316	BMSR_RESV	0x00c0	mii.h	Unused...
18317	BMSR_ESTATEN	0x0100	mii.h	Extended Status in R15
18318	BMSR_100HALF2	0x0200	mii.h	Can do 100BASE-T2 HDX
18319	BMSR_100FULL2	0x0400	mii.h	Can do 100BASE-T2 FDX
18320	BMSR_10HALF	0x0800	mii.h	Can do 10mbps, half-duplex
18321	BMSR_10FULL	0x1000	mii.h	Can do 10mbps, full-duplex
18322	BMSR_100HALF	0x2000	mii.h	Can do 100mbps, half-duplex
18323	BMSR_100FULL	0x4000	mii.h	Can do 100mbps, full-duplex
18324	BMSR_100BASE4	0x8000	mii.h	Can do 100mbps, 4k packets
18325	ADVERTISE_SLCT	0x001f	mii.h	Selector bits
18326	ADVERTISE_CSMA	0x0001	mii.h	Only selector supported
18327	ADVERTISE_10HALF	0x0020	mii.h	Try for 10mbps half-duplex
18328	ADVERTISE_1000XFULL	0x0020	mii.h	Try for 1000BASE-X full-duplex
18329	ADVERTISE_10FULL	0x0040	mii.h	Try for 10mbps full-duplex
18330	ADVERTISE_1000XHALF	0x0040	mii.h	Try for 1000BASE-X half-duplex
18331	ADVERTISE_100HALF	0x0080	mii.h	Try for 100mbps half-duplex
18332	ADVERTISE_1000XPAUSE	0x0080	mii.h	Try for 1000BASE-X pause
18333	ADVERTISE_100FULL	0x0100	mii.h	Try for 100mbps full-duplex
18334	ADVERTISE_1000XPSE_ASYM	0x0100	mii.h	Try for 1000BASE-X asym pause
18335	ADVERTISE_100BASE4	0x0200	mii.h	Try for 100mbps 4k packets
18336	ADVERTISE_PAUSE_CAP	0x0400	mii.h	Try for pause
18337	ADVERTISE_PAUSE_ASYM	0x0800	mii.h	Try for asymetric pause
18338	ADVERTISE_RESV	0x1000	mii.h	Unused...
18339	ADVERTISE_RFAULT	0x2000	mii.h	Say we can detect faults
18340	ADVERTISE_LPACK	0x4000	mii.h	Ack link partners response
18341	ADVERTISE_NPAGE	0x8000	mii.h	Next page bit
18342	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	mii.h
18343	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	mii.h
18344	LPA_SLCT	0x001f	mii.h	Same as advertise selector
18345	LPA_10HALF	0x0020	mii.h	Can do 10mbps half-duplex
18346	LPA_1000XFULL	0x0020	mii.h	Can do 1000BASE-X full-duplex
18347	LPA_10FULL	0x0040	mii.h	Can do 10mbps full-duplex
18348	LPA_1000XHALF	0x0040	mii.h	Can do 1000BASE-X half-duplex
18349	LPA_100HALF	0x0080	mii.h	Can do 100mbps half-duplex
18350	LPA_1000XPAUSE	0x0080	mii.h	Can do 1000BASE-X pause
18351	LPA_100FULL	0x0100	mii.h	Can do 100mbps full-duplex
18352	LPA_1000XPAUSE_ASYM	0x0100	mii.h	Can do 1000BASE-X pause asym
18353	LPA_100BASE4	0x0200	mii.h	Can do 100mbps 4k packets
18354	LPA_PAUSE_CAP	0x0400	mii.h	Can pause
18355	LPA_PAUSE_ASYM	0x0800	mii.h	Can pause asymetrically
18356	LPA_RESV	0x1000	mii.h	Unused...
18357	LPA_RFAULT	0x2000	mii.h	Link partner faulted
18358	LPA_LPACK	0x4000	mii.h	Link partner acked us
18359	LPA_NPAGE	0x8000	mii.h	Next page bit
18360	LPA_DUPLEX	(LPA_10FULL \| LPA_100FULL)	mii.h
18361	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	mii.h
18362	EXPANSION_NWAY	0x0001	mii.h	Can do N-way auto-nego
18363	EXPANSION_LCWP	0x0002	mii.h	Got new RX page code word
18364	EXPANSION_ENABLENPAGE	0x0004	mii.h	This enables npage words
18365	EXPANSION_NPCAPABLE	0x0008	mii.h	Link partner supports npage
18366	EXPANSION_MFAULTS	0x0010	mii.h	Multiple faults detected
18367	EXPANSION_RESV	0xffe0	mii.h	Unused...
18368	ESTATUS_1000_TFULL	0x2000	mii.h	Can do 1000BT Full
18369	ESTATUS_1000_THALF	0x1000	mii.h	Can do 1000BT Half
18370	NWAYTEST_RESV1	0x00ff	mii.h	Unused...
18371	NWAYTEST_LOOPBACK	0x0100	mii.h	Enable loopback for N-way
18372	NWAYTEST_RESV2	0xfe00	mii.h	Unused...
18373	ADVERTISE_1000FULL	0x0200	mii.h	Advertise 1000BASE-T full duplex
18374	ADVERTISE_1000HALF	0x0100	mii.h	Advertise 1000BASE-T half duplex
18375	LPA_1000LOCALRXOK	0x2000	mii.h	Link partner local receiver status
18376	LPA_1000REMRXOK	0x1000	mii.h	Link partner remote receiver status
18377	LPA_1000FULL	0x0800	mii.h	Link partner 1000BASE-T full duplex
18378	LPA_1000HALF	0x0400	mii.h	Link partner 1000BASE-T half duplex
18379	TCP_INITIAL_TIMEOUT	(3*TICKS_PER_SEC)	old_tcp.h
18380	TCP_MAX_TIMEOUT	(60*TICKS_PER_SEC)	old_tcp.h
18381	TCP_MIN_TIMEOUT	(TICKS_PER_SEC)	old_tcp.h
18382	TCP_MAX_RETRY	10	old_tcp.h
18383	TCP_MAX_HEADER	((int)sizeof(struct iphdr)+64)	old_tcp.h
18384	TCP_MIN_WINDOW	(1500-TCP_MAX_HEADER)	old_tcp.h
18385	TCP_MAX_WINDOW	(65535-TCP_MAX_HEADER)	old_tcp.h
18386	FIN	1	old_tcp.h
18387	SYN	2	old_tcp.h
18388	RST	4	old_tcp.h
18389	PSH	8	old_tcp.h
18390	ACK	16	old_tcp.h
18391	URG	32	old_tcp.h
18392	_yes_	1	pcmcia-opts.h
18393	_no_	0	pcmcia-opts.h
18394	SUPPORT_I82365	(_yes_)	pcmcia-opts.h
18395	PCMCIA_SHUTDOWN	(_yes_)	pcmcia-opts.h
18396	MAP_ATTRMEM_TO	0xd0000	pcmcia-opts.h
18397	MAP_ATTRMEM_LEN	0x02000	pcmcia-opts.h
18398	PDEBUG	3	pcmcia-opts.h
18399	MAXPCCSOCKS	8	pcmcia.h
18400	MAXPCCCONFIGS	8	pcmcia.h
18401	EINVAL	22	pcmcia.h
18402	SS_WRPROT	0x0001	pcmcia.h
18403	SS_CARDLOCK	0x0002	pcmcia.h
18404	SS_EJECTION	0x0004	pcmcia.h
18405	SS_INSERTION	0x0008	pcmcia.h
18406	SS_BATDEAD	0x0010	pcmcia.h
18407	SS_BATWARN	0x0020	pcmcia.h
18408	SS_READY	0x0040	pcmcia.h
18409	SS_DETECT	0x0080	pcmcia.h
18410	SS_POWERON	0x0100	pcmcia.h
18411	SS_GPI	0x0200	pcmcia.h
18412	SS_STSCHG	0x0400	pcmcia.h
18413	SS_CARDBUS	0x0800	pcmcia.h
18414	SS_3VCARD	0x1000	pcmcia.h
18415	SS_XVCARD	0x2000	pcmcia.h
18416	SS_PENDING	0x4000	pcmcia.h
18417	SS_CAP_PAGE_REGS	0x0001	pcmcia.h
18418	SS_CAP_VIRTUAL_BUS	0x0002	pcmcia.h
18419	SS_CAP_MEM_ALIGN	0x0004	pcmcia.h
18420	SS_CAP_STATIC_MAP	0x0008	pcmcia.h
18421	SS_CAP_PCCARD	0x4000	pcmcia.h
18422	SS_CAP_CARDBUS	0x8000	pcmcia.h
18423	SS_PWR_AUTO	0x0010	pcmcia.h
18424	SS_IOCARD	0x0020	pcmcia.h
18425	SS_RESET	0x0040	pcmcia.h
18426	SS_DMA_MODE	0x0080	pcmcia.h
18427	SS_SPKR_ENA	0x0100	pcmcia.h
18428	SS_OUTPUT_ENA	0x0200	pcmcia.h
18429	SS_DEBOUNCED	0x0400	pcmcia.h	Tell driver that the debounce delay has ended
18430	SS_ZVCARD	0x0800	pcmcia.h
18431	MAP_ACTIVE	0x01	pcmcia.h
18432	MAP_16BIT	0x02	pcmcia.h
18433	MAP_AUTOSZ	0x04	pcmcia.h
18434	MAP_0WS	0x08	pcmcia.h
18435	MAP_WRPROT	0x10	pcmcia.h
18436	MAP_ATTRIB	0x20	pcmcia.h
18437	MAP_USE_WAIT	0x40	pcmcia.h
18438	MAP_PREFETCH	0x80	pcmcia.h
18439	MAP_IOSPACE	0x20	pcmcia.h
18440	NULL	((void *)0)	stddef.h
18441	__WCHAR_TYPE__	long int	stddef.h
18442	__SIZE_TYPE__	unsigned long	stdint.h	safe choice on most systems
18443	AES_BLOCKSIZE	16	aes.h
18444	AES_CTX_SIZE	sizeof ( struct aes_context )	aes.h
18445	ANSIESC_MAX_PARAMS	4	ansiesc.h
18446	ESC	0x1b	ansiesc.h
18447	CSI	"\033["	ansiesc.h
18448	ANSIESC_CUP	'H'	ansiesc.h
18449	ANSIESC_ED	'J'	ansiesc.h
18450	ANSIESC_ED_TO_END	0	ansiesc.h
18451	ANSIESC_ED_FROM_START	1	ansiesc.h
18452	ANSIESC_ED_ALL	2	ansiesc.h
18453	ANSIESC_SGR	'm'	ansiesc.h
18454	AOE_FL_EXTENDED	0x40	aoe.h	*< LBA48 extended addressing
18455	AOE_FL_DEV_HEAD	0x10	aoe.h	*< Device/head flag
18456	AOE_FL_ASYNC	0x02	aoe.h	*< Asynchronous write
18457	AOE_FL_WRITE	0x01	aoe.h	*< Write command
18458	AOE_VERSION	0x10	aoe.h	*< Version 1
18459	AOE_VERSION_MASK	0xf0	aoe.h	*< Version part of ver_flags field
18460	AOE_FL_RESPONSE	0x08	aoe.h	*< Message is a response
18461	AOE_FL_ERROR	0x04	aoe.h	*< Command generated an error
18462	AOE_MAJOR_BROADCAST	0xffff	aoe.h
18463	AOE_MINOR_BROADCAST	0xff	aoe.h
18464	AOE_CMD_ATA	0x00	aoe.h	*< Issue ATA command
18465	AOE_CMD_CONFIG	0x01	aoe.h	*< Query Config Information
18466	AOE_TAG_MAGIC	0xebeb0000	aoe.h
18467	AOE_ERR_BAD_COMMAND	1	aoe.h	*< Unrecognised command code
18468	AOE_ERR_BAD_PARAMETER	2	aoe.h	*< Bad argument parameter
18469	AOE_ERR_UNAVAILABLE	3	aoe.h	*< Device unavailable
18470	AOE_ERR_CONFIG_EXISTS	4	aoe.h	*< Config string present
18471	AOE_ERR_BAD_VERSION	5	aoe.h	*< Unsupported version
18472	AOE_STATUS_ERR_MASK	0x0f	aoe.h	*< Error portion of status code
18473	AOE_STATUS_PENDING	0x80	aoe.h	*< Command pending
18474	AOE_MAX_COUNT	2	aoe.h
18475	ARC4_CTX_SIZE	sizeof ( struct arc4_ctx )	arc4.h
18476	ARP_NET_PROTOCOLS	__table ( struct arp_net_protocol, "arp_net_protocols" )	arp.h
18477	__arp_net_protocol	__table_entry ( ARP_NET_PROTOCOLS, 01 )	arp.h
18478	ASN1_INTEGER	0x02	asn1.h
18479	ASN1_BIT_STRING	0x03	asn1.h
18480	ASN1_OCTET_STRING	0x04	asn1.h
18481	ASN1_NULL	0x05	asn1.h
18482	ASN1_OID	0x06	asn1.h
18483	ASN1_SEQUENCE	0x30	asn1.h
18484	ASN1_IP_ADDRESS	0x40	asn1.h
18485	ASN1_EXPLICIT_TAG	0xa0	asn1.h
18486	ATA_DEV_OBSOLETE	0xa0	ata.h
18487	ATA_DEV_LBA	0x40	ata.h
18488	ATA_DEV_SLAVE	0x10	ata.h
18489	ATA_DEV_MASTER	0x00	ata.h
18490	ATA_DEV_MASK	0xf0	ata.h
18491	ATA_CMD_READ	0x20	ata.h
18492	ATA_CMD_READ_EXT	0x24	ata.h
18493	ATA_CMD_WRITE	0x30	ata.h
18494	ATA_CMD_WRITE_EXT	0x34	ata.h
18495	ATA_CMD_IDENTIFY	0xec	ata.h
18496	ATA_SUPPORTS_LBA48	( 1 << 10 )	ata.h
18497	ATA_SECTOR_SIZE	512	ata.h
18498	BITMAP_BLKSIZE	( sizeof ( bitmap_block_t ) * 8 )	bitmap.h
18499	cpu_to_BIT64	cpu_to_le64	bitops.h
18500	cpu_to_BIT32	cpu_to_le32	bitops.h
18501	BIT64_to_cpu	le64_to_cpu	bitops.h
18502	BIT32_to_cpu	le32_to_cpu	bitops.h
18503	cpu_to_BIT64	cpu_to_be64	bitops.h
18504	cpu_to_BIT32	cpu_to_be32	bitops.h
18505	BIT64_to_cpu	be64_to_cpu	bitops.h
18506	BIT32_to_cpu	be32_to_cpu	bitops.h
18507	COMMANDS	__table ( struct command, "commands" )	command.h
18508	__command	__table_entry ( COMMANDS, 01 )	command.h
18509	CPIO_MAGIC	"070701"	cpio.h
18510	BUS_TYPE_PCI	1	device.h
18511	BUS_TYPE_ISAPNP	2	device.h
18512	BUS_TYPE_EISA	3	device.h
18513	BUS_TYPE_MCA	4	device.h
18514	BUS_TYPE_ISA	5	device.h
18515	ROOT_DEVICES	__table ( struct root_device, "root_devices" )	device.h
18516	__root_device	__table_entry ( ROOT_DEVICES, 01 )	device.h
18517	BOOTPS_PORT	67	dhcp.h
18518	BOOTPC_PORT	68	dhcp.h
18519	PXE_PORT	4011	dhcp.h
18520	DHCP_PAD	0	dhcp.h
18521	DHCP_MIN_OPTION	1	dhcp.h
18522	DHCP_SUBNET_MASK	1	dhcp.h
18523	DHCP_ROUTERS	3	dhcp.h
18524	DHCP_DNS_SERVERS	6	dhcp.h
18525	DHCP_LOG_SERVERS	7	dhcp.h
18526	DHCP_HOST_NAME	12	dhcp.h
18527	DHCP_DOMAIN_NAME	15	dhcp.h
18528	DHCP_ROOT_PATH	17	dhcp.h
18529	DHCP_VENDOR_ENCAP	43	dhcp.h
18530	DHCP_PXE_DISCOVERY_CONTROL	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 6 )	dhcp.h
18531	DHCP_PXE_BOOT_SERVER_MCAST	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 7 )	dhcp.h
18532	DHCP_PXE_BOOT_SERVERS	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 8 )	dhcp.h
18533	DHCP_PXE_BOOT_MENU	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 9 )	dhcp.h
18534	DHCP_PXE_BOOT_MENU_PROMPT	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 10 )	dhcp.h
18535	DHCP_PXE_BOOT_MENU_ITEM	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 71 )	dhcp.h
18536	DHCP_REQUESTED_ADDRESS	50	dhcp.h
18537	DHCP_LEASE_TIME	51	dhcp.h
18538	DHCP_OPTION_OVERLOAD	52	dhcp.h
18539	DHCP_OPTION_OVERLOAD_FILE	1	dhcp.h
18540	DHCP_OPTION_OVERLOAD_SNAME	2	dhcp.h
18541	DHCP_MESSAGE_TYPE	53	dhcp.h
18542	DHCPNONE	0	dhcp.h
18543	DHCPDISCOVER	1	dhcp.h
18544	DHCPOFFER	2	dhcp.h
18545	DHCPREQUEST	3	dhcp.h
18546	DHCPDECLINE	4	dhcp.h
18547	DHCPACK	5	dhcp.h
18548	DHCPNAK	6	dhcp.h
18549	DHCPRELEASE	7	dhcp.h
18550	DHCPINFORM	8	dhcp.h
18551	DHCP_SERVER_IDENTIFIER	54	dhcp.h
18552	DHCP_PARAMETER_REQUEST_LIST	55	dhcp.h
18553	DHCP_MAX_MESSAGE_SIZE	57	dhcp.h
18554	DHCP_VENDOR_CLASS_ID	60	dhcp.h
18555	DHCP_CLIENT_ID	61	dhcp.h
18556	DHCP_TFTP_SERVER_NAME	66	dhcp.h
18557	DHCP_BOOTFILE_NAME	67	dhcp.h
18558	DHCP_USER_CLASS_ID	77	dhcp.h
18559	DHCP_CLIENT_ARCHITECTURE	93	dhcp.h
18560	DHCP_CLIENT_NDI	94	dhcp.h
18561	DHCP_CLIENT_UUID	97	dhcp.h
18562	DHCP_CLIENT_UUID_TYPE	0	dhcp.h
18563	DHCP_EB_ENCAP	175	dhcp.h
18564	DHCP_EB_PRIORITY	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x01 )	dhcp.h
18565	DHCP_EB_YIADDR	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x02 )	dhcp.h
18566	DHCP_EB_SIADDR	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x03 )	dhcp.h
18567	DHCP_EB_KEEP_SAN	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x08 )	dhcp.h
18568	DHCP_EB_NO_PXEDHCP	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb0 )	dhcp.h
18569	DHCP_EB_BUS_ID	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb1 )	dhcp.h
18570	DHCP_EB_USE_CACHED	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb2 )	dhcp.h
18571	DHCP_EB_BIOS_DRIVE	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbd )	dhcp.h
18572	DHCP_EB_USERNAME	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbe )	dhcp.h
18573	DHCP_EB_PASSWORD	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbf )	dhcp.h
18574	DHCP_EB_REVERSE_USERNAME	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc0 )	dhcp.h
18575	DHCP_EB_REVERSE_PASSWORD	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc1 )	dhcp.h
18576	DHCP_EB_VERSION	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xeb )	dhcp.h
18577	DHCP_ISCSI_PRIMARY_TARGET_IQN	201	dhcp.h
18578	DHCP_ISCSI_SECONDARY_TARGET_IQN	202	dhcp.h
18579	DHCP_ISCSI_INITIATOR_IQN	203	dhcp.h
18580	DHCP_MAX_OPTION	254	dhcp.h
18581	DHCP_END	255	dhcp.h
18582	DHCP_OPTION_HEADER_LEN	( offsetof ( struct dhcp_option, data ) )	dhcp.h
18583	DHCP_MAX_LEN	0xff	dhcp.h
18584	BOOTP_REQUEST	1	dhcp.h
18585	BOOTP_REPLY	2	dhcp.h
18586	BOOTP_FL_BROADCAST	0x8000	dhcp.h
18587	DHCP_MAGIC_COOKIE	0x63825363UL	dhcp.h
18588	DHCP_MIN_LEN	552	dhcp.h
18589	DHCP_MIN_TIMEOUT	( 1 * TICKS_PER_SEC )	dhcp.h
18590	DHCP_MAX_TIMEOUT	( 10 * TICKS_PER_SEC )	dhcp.h
18591	PROXYDHCP_MAX_TIMEOUT	( 2 * TICKS_PER_SEC )	dhcp.h
18592	PXEBS_MAX_TIMEOUT	( 3 * TICKS_PER_SEC )	dhcp.h
18593	DHCP_SETTINGS_NAME	"dhcp"	dhcp.h
18594	PROXYDHCP_SETTINGS_NAME	"proxydhcp"	dhcp.h
18595	PXEBS_SETTINGS_NAME	"pxebs"	dhcp.h
18596	DNS_TYPE_A	1	dns.h
18597	DNS_TYPE_CNAME	5	dns.h
18598	DNS_TYPE_ANY	255	dns.h
18599	DNS_CLASS_IN	1	dns.h
18600	DNS_CLASS_CS	2	dns.h
18601	DNS_CLASS_CH	3	dns.h
18602	DNS_CLASS_HS	4	dns.h
18603	DNS_FLAG_QUERY	( 0x00 << 15 )	dns.h
18604	DNS_FLAG_RESPONSE	( 0x01 << 15 )	dns.h
18605	DNS_FLAG_OPCODE_QUERY	( 0x00 << 11 )	dns.h
18606	DNS_FLAG_OPCODE_IQUERY	( 0x01 << 11 )	dns.h
18607	DNS_FLAG_OPCODE_STATUS	( 0x02 << 11 )	dns.h
18608	DNS_FLAG_RD	( 0x01 << 8 )	dns.h
18609	DNS_FLAG_RA	( 0x01 << 7 )	dns.h
18610	DNS_FLAG_RCODE_OK	( 0x00 << 0 )	dns.h
18611	DNS_FLAG_RCODE_NX	( 0x03 << 0 )	dns.h
18612	DNS_PORT	53	dns.h
18613	DNS_MAX_RETRIES	3	dns.h
18614	DNS_MAX_CNAME_RECURSION	0x30	dns.h
18615	EAPOL_TYPE_EAP	0	eapol.h	*< EAP authentication handshake packet
18616	EAPOL_TYPE_START	1	eapol.h	*< Request by Peer to begin (no data)
18617	EAPOL_TYPE_LOGOFF	2	eapol.h	*< Request by Peer to terminate (no data)
18618	EAPOL_TYPE_KEY	3	eapol.h	*< EAPOL-Key packet
18619	EAPOL_THIS_VERSION	1	eapol.h
18620	EAPOL_HDR_LEN	4	eapol.h
18621	EAPOL_HANDLERS	__table ( struct eapol_handler, "eapol_handlers" )	eapol.h
18622	__eapol_handler	__table_entry ( EAPOL_HANDLERS, 01 )	eapol.h
18623	EISA_MIN_SLOT	(0x1)	eisa.h
18624	EISA_MAX_SLOT	(0xf)	eisa.h	Must be 2^n - 1
18625	EISA_VENDOR_ID	( 0xc80 )	eisa.h
18626	EISA_PROD_ID	( 0xc82 )	eisa.h
18627	EISA_GLOBAL_CONFIG	( 0xc84 )	eisa.h
18628	EISA_CMD_RESET	( 1 << 2 )	eisa.h
18629	EISA_CMD_ENABLE	( 1 << 0 )	eisa.h
18630	EISA_DRIVERS	__table ( struct eisa_driver, "eisa_drivers" )	eisa.h
18631	__eisa_driver	__table_entry ( EISA_DRIVERS, 01 )	eisa.h
18632	ERRFILE_CORE	0x00002000	errfile.h	*< Core code
18633	ERRFILE_DRIVER	0x00004000	errfile.h	*< Driver code
18634	ERRFILE_NET	0x00006000	errfile.h	*< Networking code
18635	ERRFILE_IMAGE	0x00008000	errfile.h	*< Image code
18636	ERRFILE_OTHER	0x0000e000	errfile.h	*< Any other code
18637	ERRFILE_ARCH	0x00800000	errfile.h
18638	ERRFILE_asprintf	( ERRFILE_CORE \| 0x00000000 )	errfile.h
18639	ERRFILE_downloader	( ERRFILE_CORE \| 0x00010000 )	errfile.h
18640	ERRFILE_exec	( ERRFILE_CORE \| 0x00020000 )	errfile.h
18641	ERRFILE_hw	( ERRFILE_CORE \| 0x00030000 )	errfile.h
18642	ERRFILE_iobuf	( ERRFILE_CORE \| 0x00040000 )	errfile.h
18643	ERRFILE_job	( ERRFILE_CORE \| 0x00050000 )	errfile.h
18644	ERRFILE_linebuf	( ERRFILE_CORE \| 0x00060000 )	errfile.h
18645	ERRFILE_monojob	( ERRFILE_CORE \| 0x00070000 )	errfile.h
18646	ERRFILE_nvo	( ERRFILE_CORE \| 0x00080000 )	errfile.h
18647	ERRFILE_open	( ERRFILE_CORE \| 0x00090000 )	errfile.h
18648	ERRFILE_posix_io	( ERRFILE_CORE \| 0x000a0000 )	errfile.h
18649	ERRFILE_resolv	( ERRFILE_CORE \| 0x000b0000 )	errfile.h
18650	ERRFILE_settings	( ERRFILE_CORE \| 0x000c0000 )	errfile.h
18651	ERRFILE_vsprintf	( ERRFILE_CORE \| 0x000d0000 )	errfile.h
18652	ERRFILE_xfer	( ERRFILE_CORE \| 0x000e0000 )	errfile.h
18653	ERRFILE_bitmap	( ERRFILE_CORE \| 0x000f0000 )	errfile.h
18654	ERRFILE_eisa	( ERRFILE_DRIVER \| 0x00000000 )	errfile.h
18655	ERRFILE_isa	( ERRFILE_DRIVER \| 0x00010000 )	errfile.h
18656	ERRFILE_isapnp	( ERRFILE_DRIVER \| 0x00020000 )	errfile.h
18657	ERRFILE_mca	( ERRFILE_DRIVER \| 0x00030000 )	errfile.h
18658	ERRFILE_pci	( ERRFILE_DRIVER \| 0x00040000 )	errfile.h
18659	ERRFILE_nvs	( ERRFILE_DRIVER \| 0x00100000 )	errfile.h
18660	ERRFILE_spi	( ERRFILE_DRIVER \| 0x00110000 )	errfile.h
18661	ERRFILE_i2c_bit	( ERRFILE_DRIVER \| 0x00120000 )	errfile.h
18662	ERRFILE_spi_bit	( ERRFILE_DRIVER \| 0x00130000 )	errfile.h
18663	ERRFILE_3c509	( ERRFILE_DRIVER \| 0x00200000 )	errfile.h
18664	ERRFILE_bnx2	( ERRFILE_DRIVER \| 0x00210000 )	errfile.h
18665	ERRFILE_cs89x0	( ERRFILE_DRIVER \| 0x00220000 )	errfile.h
18666	ERRFILE_eepro	( ERRFILE_DRIVER \| 0x00230000 )	errfile.h
18667	ERRFILE_etherfabric	( ERRFILE_DRIVER \| 0x00240000 )	errfile.h
18668	ERRFILE_legacy	( ERRFILE_DRIVER \| 0x00250000 )	errfile.h
18669	ERRFILE_natsemi	( ERRFILE_DRIVER \| 0x00260000 )	errfile.h
18670	ERRFILE_pnic	( ERRFILE_DRIVER \| 0x00270000 )	errfile.h
18671	ERRFILE_prism2_pci	( ERRFILE_DRIVER \| 0x00280000 )	errfile.h
18672	ERRFILE_prism2_plx	( ERRFILE_DRIVER \| 0x00290000 )	errfile.h
18673	ERRFILE_rtl8139	( ERRFILE_DRIVER \| 0x002a0000 )	errfile.h
18674	ERRFILE_smc9000	( ERRFILE_DRIVER \| 0x002b0000 )	errfile.h
18675	ERRFILE_tg3	( ERRFILE_DRIVER \| 0x002c0000 )	errfile.h
18676	ERRFILE_3c509_eisa	( ERRFILE_DRIVER \| 0x002d0000 )	errfile.h
18677	ERRFILE_3c515	( ERRFILE_DRIVER \| 0x002e0000 )	errfile.h
18678	ERRFILE_3c529	( ERRFILE_DRIVER \| 0x002f0000 )	errfile.h
18679	ERRFILE_3c595	( ERRFILE_DRIVER \| 0x00300000 )	errfile.h
18680	ERRFILE_3c5x9	( ERRFILE_DRIVER \| 0x00310000 )	errfile.h
18681	ERRFILE_3c90x	( ERRFILE_DRIVER \| 0x00320000 )	errfile.h
18682	ERRFILE_amd8111e	( ERRFILE_DRIVER \| 0x00330000 )	errfile.h
18683	ERRFILE_davicom	( ERRFILE_DRIVER \| 0x00340000 )	errfile.h
18684	ERRFILE_depca	( ERRFILE_DRIVER \| 0x00350000 )	errfile.h
18685	ERRFILE_dmfe	( ERRFILE_DRIVER \| 0x00360000 )	errfile.h
18686	ERRFILE_eepro100	( ERRFILE_DRIVER \| 0x00380000 )	errfile.h
18687	ERRFILE_epic100	( ERRFILE_DRIVER \| 0x00390000 )	errfile.h
18688	ERRFILE_forcedeth	( ERRFILE_DRIVER \| 0x003a0000 )	errfile.h
18689	ERRFILE_mtd80x	( ERRFILE_DRIVER \| 0x003b0000 )	errfile.h
18690	ERRFILE_ns83820	( ERRFILE_DRIVER \| 0x003c0000 )	errfile.h
18691	ERRFILE_ns8390	( ERRFILE_DRIVER \| 0x003d0000 )	errfile.h
18692	ERRFILE_pcnet32	( ERRFILE_DRIVER \| 0x003e0000 )	errfile.h
18693	ERRFILE_r8169	( ERRFILE_DRIVER \| 0x003f0000 )	errfile.h
18694	ERRFILE_sis900	( ERRFILE_DRIVER \| 0x00400000 )	errfile.h
18695	ERRFILE_sundance	( ERRFILE_DRIVER \| 0x00410000 )	errfile.h
18696	ERRFILE_tlan	( ERRFILE_DRIVER \| 0x00420000 )	errfile.h
18697	ERRFILE_tulip	( ERRFILE_DRIVER \| 0x00430000 )	errfile.h
18698	ERRFILE_via_rhine	( ERRFILE_DRIVER \| 0x00440000 )	errfile.h
18699	ERRFILE_via_velocity	( ERRFILE_DRIVER \| 0x00450000 )	errfile.h
18700	ERRFILE_w89c840	( ERRFILE_DRIVER \| 0x00460000 )	errfile.h
18701	ERRFILE_ipoib	( ERRFILE_DRIVER \| 0x00470000 )	errfile.h
18702	ERRFILE_e1000	( ERRFILE_DRIVER \| 0x00480000 )	errfile.h
18703	ERRFILE_e1000_hw	( ERRFILE_DRIVER \| 0x00490000 )	errfile.h
18704	ERRFILE_mtnic	( ERRFILE_DRIVER \| 0x004a0000 )	errfile.h
18705	ERRFILE_phantom	( ERRFILE_DRIVER \| 0x004b0000 )	errfile.h
18706	ERRFILE_ne2k_isa	( ERRFILE_DRIVER \| 0x004c0000 )	errfile.h
18707	ERRFILE_b44	( ERRFILE_DRIVER \| 0x004d0000 )	errfile.h
18708	ERRFILE_rtl818x	( ERRFILE_DRIVER \| 0x004e0000 )	errfile.h
18709	ERRFILE_sky2	( ERRFILE_DRIVER \| 0x004f0000 )	errfile.h
18710	ERRFILE_ath5k	( ERRFILE_DRIVER \| 0x00500000 )	errfile.h
18711	ERRFILE_atl1e	( ERRFILE_DRIVER \| 0x00510000 )	errfile.h
18712	ERRFILE_sis190	( ERRFILE_DRIVER \| 0x00520000 )	errfile.h
18713	ERRFILE_myri10ge	( ERRFILE_DRIVER \| 0x00530000 )	errfile.h
18714	ERRFILE_skge	( ERRFILE_DRIVER \| 0x00540000 )	errfile.h
18715	ERRFILE_scsi	( ERRFILE_DRIVER \| 0x00700000 )	errfile.h
18716	ERRFILE_arbel	( ERRFILE_DRIVER \| 0x00710000 )	errfile.h
18717	ERRFILE_hermon	( ERRFILE_DRIVER \| 0x00720000 )	errfile.h
18718	ERRFILE_linda	( ERRFILE_DRIVER \| 0x00730000 )	errfile.h
18719	ERRFILE_ata	( ERRFILE_DRIVER \| 0x00740000 )	errfile.h
18720	ERRFILE_srp	( ERRFILE_DRIVER \| 0x00750000 )	errfile.h
18721	ERRFILE_aoe	( ERRFILE_NET \| 0x00000000 )	errfile.h
18722	ERRFILE_arp	( ERRFILE_NET \| 0x00010000 )	errfile.h
18723	ERRFILE_dhcpopts	( ERRFILE_NET \| 0x00020000 )	errfile.h
18724	ERRFILE_ethernet	( ERRFILE_NET \| 0x00030000 )	errfile.h
18725	ERRFILE_icmpv6	( ERRFILE_NET \| 0x00040000 )	errfile.h
18726	ERRFILE_ipv4	( ERRFILE_NET \| 0x00050000 )	errfile.h
18727	ERRFILE_ipv6	( ERRFILE_NET \| 0x00060000 )	errfile.h
18728	ERRFILE_ndp	( ERRFILE_NET \| 0x00070000 )	errfile.h
18729	ERRFILE_netdevice	( ERRFILE_NET \| 0x00080000 )	errfile.h
18730	ERRFILE_nullnet	( ERRFILE_NET \| 0x00090000 )	errfile.h
18731	ERRFILE_tcp	( ERRFILE_NET \| 0x000a0000 )	errfile.h
18732	ERRFILE_ftp	( ERRFILE_NET \| 0x000b0000 )	errfile.h
18733	ERRFILE_http	( ERRFILE_NET \| 0x000c0000 )	errfile.h
18734	ERRFILE_iscsi	( ERRFILE_NET \| 0x000d0000 )	errfile.h
18735	ERRFILE_tcpip	( ERRFILE_NET \| 0x000e0000 )	errfile.h
18736	ERRFILE_udp	( ERRFILE_NET \| 0x000f0000 )	errfile.h
18737	ERRFILE_dhcp	( ERRFILE_NET \| 0x00100000 )	errfile.h
18738	ERRFILE_dns	( ERRFILE_NET \| 0x00110000 )	errfile.h
18739	ERRFILE_tftp	( ERRFILE_NET \| 0x00120000 )	errfile.h
18740	ERRFILE_infiniband	( ERRFILE_NET \| 0x00130000 )	errfile.h
18741	ERRFILE_netdev_settings	( ERRFILE_NET \| 0x00140000 )	errfile.h
18742	ERRFILE_dhcppkt	( ERRFILE_NET \| 0x00150000 )	errfile.h
18743	ERRFILE_slam	( ERRFILE_NET \| 0x00160000 )	errfile.h
18744	ERRFILE_ib_sma	( ERRFILE_NET \| 0x00170000 )	errfile.h
18745	ERRFILE_ib_packet	( ERRFILE_NET \| 0x00180000 )	errfile.h
18746	ERRFILE_icmp	( ERRFILE_NET \| 0x00190000 )	errfile.h
18747	ERRFILE_ib_qset	( ERRFILE_NET \| 0x001a0000 )	errfile.h
18748	ERRFILE_ib_gma	( ERRFILE_NET \| 0x001b0000 )	errfile.h
18749	ERRFILE_ib_pathrec	( ERRFILE_NET \| 0x001c0000 )	errfile.h
18750	ERRFILE_ib_mcast	( ERRFILE_NET \| 0x001d0000 )	errfile.h
18751	ERRFILE_ib_cm	( ERRFILE_NET \| 0x001e0000 )	errfile.h
18752	ERRFILE_net80211	( ERRFILE_NET \| 0x001f0000 )	errfile.h
18753	ERRFILE_ib_mi	( ERRFILE_NET \| 0x00200000 )	errfile.h
18754	ERRFILE_ib_cmrc	( ERRFILE_NET \| 0x00210000 )	errfile.h
18755	ERRFILE_ib_srp	( ERRFILE_NET \| 0x00220000 )	errfile.h
18756	ERRFILE_sec80211	( ERRFILE_NET \| 0x00230000 )	errfile.h
18757	ERRFILE_wep	( ERRFILE_NET \| 0x00240000 )	errfile.h
18758	ERRFILE_eapol	( ERRFILE_NET \| 0x00250000 )	errfile.h
18759	ERRFILE_wpa	( ERRFILE_NET \| 0x00260000 )	errfile.h
18760	ERRFILE_wpa_psk	( ERRFILE_NET \| 0x00270000 )	errfile.h
18761	ERRFILE_wpa_tkip	( ERRFILE_NET \| 0x00280000 )	errfile.h
18762	ERRFILE_wpa_ccmp	( ERRFILE_NET \| 0x00290000 )	errfile.h
18763	ERRFILE_image	( ERRFILE_IMAGE \| 0x00000000 )	errfile.h
18764	ERRFILE_elf	( ERRFILE_IMAGE \| 0x00010000 )	errfile.h
18765	ERRFILE_script	( ERRFILE_IMAGE \| 0x00020000 )	errfile.h
18766	ERRFILE_segment	( ERRFILE_IMAGE \| 0x00030000 )	errfile.h
18767	ERRFILE_efi_image	( ERRFILE_IMAGE \| 0x00040000 )	errfile.h
18768	ERRFILE_embedded	( ERRFILE_IMAGE \| 0x00050000 )	errfile.h
18769	ERRFILE_asn1	( ERRFILE_OTHER \| 0x00000000 )	errfile.h
18770	ERRFILE_chap	( ERRFILE_OTHER \| 0x00010000 )	errfile.h
18771	ERRFILE_aoeboot	( ERRFILE_OTHER \| 0x00020000 )	errfile.h
18772	ERRFILE_autoboot	( ERRFILE_OTHER \| 0x00030000 )	errfile.h
18773	ERRFILE_dhcpmgmt	( ERRFILE_OTHER \| 0x00040000 )	errfile.h
18774	ERRFILE_imgmgmt	( ERRFILE_OTHER \| 0x00050000 )	errfile.h
18775	ERRFILE_pxe_tftp	( ERRFILE_OTHER \| 0x00060000 )	errfile.h
18776	ERRFILE_pxe_udp	( ERRFILE_OTHER \| 0x00070000 )	errfile.h
18777	ERRFILE_axtls_aes	( ERRFILE_OTHER \| 0x00080000 )	errfile.h
18778	ERRFILE_cipher	( ERRFILE_OTHER \| 0x00090000 )	errfile.h
18779	ERRFILE_image_cmd	( ERRFILE_OTHER \| 0x000a0000 )	errfile.h
18780	ERRFILE_uri_test	( ERRFILE_OTHER \| 0x000b0000 )	errfile.h
18781	ERRFILE_ibft	( ERRFILE_OTHER \| 0x000c0000 )	errfile.h
18782	ERRFILE_tls	( ERRFILE_OTHER \| 0x000d0000 )	errfile.h
18783	ERRFILE_ifmgmt	( ERRFILE_OTHER \| 0x000e0000 )	errfile.h
18784	ERRFILE_iscsiboot	( ERRFILE_OTHER \| 0x000f0000 )	errfile.h
18785	ERRFILE_efi_pci	( ERRFILE_OTHER \| 0x00100000 )	errfile.h
18786	ERRFILE_efi_snp	( ERRFILE_OTHER \| 0x00110000 )	errfile.h
18787	ERRFILE_smbios	( ERRFILE_OTHER \| 0x00120000 )	errfile.h
18788	ERRFILE_smbios_settings	( ERRFILE_OTHER \| 0x00130000 )	errfile.h
18789	ERRFILE_efi_smbios	( ERRFILE_OTHER \| 0x00140000 )	errfile.h
18790	ERRFILE_pxemenu	( ERRFILE_OTHER \| 0x00150000 )	errfile.h
18791	ERRFILE_x509	( ERRFILE_OTHER \| 0x00160000 )	errfile.h
18792	ERRFILE_login_ui	( ERRFILE_OTHER \| 0x00170000 )	errfile.h
18793	ERRFILE_ib_srpboot	( ERRFILE_OTHER \| 0x00180000 )	errfile.h
18794	ERRFILE_iwmgmt	( ERRFILE_OTHER \| 0x00190000 )	errfile.h
18795	ERRORTAB	__table ( struct errortab, "errortab" )	errortab.h
18796	__errortab	__table_entry ( ERRORTAB, 01 )	errortab.h
18797	FEATURE_PROTOCOL	01	features.h	*< Network protocols
18798	FEATURE_IMAGE	02	features.h	*< Image formats
18799	FEATURE_MISC	03	features.h	*< Miscellaneous
18800	DHCP_EB_FEATURE_PXE_EXT	0x10	features.h	*< PXE API extensions
18801	DHCP_EB_FEATURE_ISCSI	0x11	features.h	*< iSCSI protocol
18802	DHCP_EB_FEATURE_AOE	0x12	features.h	*< AoE protocol
18803	DHCP_EB_FEATURE_HTTP	0x13	features.h	*< HTTP protocol
18804	DHCP_EB_FEATURE_HTTPS	0x14	features.h	*< HTTPS protocol
18805	DHCP_EB_FEATURE_TFTP	0x15	features.h	*< TFTP protocol
18806	DHCP_EB_FEATURE_FTP	0x16	features.h	*< FTP protocol
18807	DHCP_EB_FEATURE_DNS	0x17	features.h	*< DNS protocol
18808	DHCP_EB_FEATURE_BZIMAGE	0x18	features.h	*< bzImage format
18809	DHCP_EB_FEATURE_MULTIBOOT	0x19	features.h	*< Multiboot format
18810	DHCP_EB_FEATURE_SLAM	0x1a	features.h	*< SLAM protocol
18811	DHCP_EB_FEATURE_SRP	0x1b	features.h	*< SRP protocol
18812	DHCP_EB_FEATURE_NBI	0x20	features.h	*< NBI format
18813	DHCP_EB_FEATURE_PXE	0x21	features.h	*< PXE format
18814	DHCP_EB_FEATURE_ELF	0x22	features.h	*< ELF format
18815	DHCP_EB_FEATURE_COMBOOT	0x23	features.h	*< COMBOOT format
18816	DHCP_EB_FEATURE_EFI	0x24	features.h	*< EFI format
18817	DHCP_FEATURES	__table ( uint8_t, "dhcp_features" )	features.h
18818	__dhcp_feature	__table_entry ( DHCP_FEATURES, 01 )	features.h
18819	FEATURES	__table ( struct feature, "features" )	features.h
18820	FTP_PORT	21	ftp.h
18821	GDB_TRANSPORTS	__table ( struct gdb_transport, "gdb_transports" )	gdbstub.h
18822	__gdb_transport	__table_entry ( GDB_TRANSPORTS, 01 )	gdbstub.h
18823	HTTP_PORT	80	http.h
18824	HTTPS_PORT	443	http.h
18825	I2C_TENBIT_ADDRESS	0x7800	i2c.h
18826	I2C_WRITE	0	i2c.h
18827	I2C_READ	1	i2c.h
18828	I2C_UDELAY	5	i2c.h
18829	I2C_RESET_MAX_CYCLES	32	i2c.h
18830	IB_SMP_CLASS_VERSION	1	ib_mad.h
18831	IB_SMP_STATUS_D_INBOUND	0x8000	ib_mad.h
18832	IB_SMP_ATTR_NOTICE	0x0002	ib_mad.h
18833	IB_SMP_ATTR_NODE_DESC	0x0010	ib_mad.h
18834	IB_SMP_ATTR_NODE_INFO	0x0011	ib_mad.h
18835	IB_SMP_ATTR_SWITCH_INFO	0x0012	ib_mad.h
18836	IB_SMP_ATTR_GUID_INFO	0x0014	ib_mad.h
18837	IB_SMP_ATTR_PORT_INFO	0x0015	ib_mad.h
18838	IB_SMP_ATTR_PKEY_TABLE	0x0016	ib_mad.h
18839	IB_SMP_ATTR_SL_TO_VL_TABLE	0x0017	ib_mad.h
18840	IB_SMP_ATTR_VL_ARB_TABLE	0x0018	ib_mad.h
18841	IB_SMP_ATTR_LINEAR_FORWARD_TABL	0x0019	ib_mad.h
18842	IB_SMP_ATTR_RANDOM_FORWARD_TABL	0x001A	ib_mad.h
18843	IB_SMP_ATTR_MCAST_FORWARD_TABLE	0x001B	ib_mad.h
18844	IB_SMP_ATTR_SM_INFO	0x0020	ib_mad.h
18845	IB_SMP_ATTR_VENDOR_DIAG	0x0030	ib_mad.h
18846	IB_SMP_ATTR_LED_INFO	0x0031	ib_mad.h
18847	IB_SMP_ATTR_VENDOR_MASK	0xFF00	ib_mad.h
18848	IB_NODE_TYPE_HCA	0x01	ib_mad.h
18849	IB_NODE_TYPE_SWITCH	0x02	ib_mad.h
18850	IB_NODE_TYPE_ROUTER	0x03	ib_mad.h
18851	IB_LINK_WIDTH_1X	0x01	ib_mad.h
18852	IB_LINK_WIDTH_4X	0x02	ib_mad.h
18853	IB_LINK_WIDTH_8X	0x04	ib_mad.h
18854	IB_LINK_WIDTH_12X	0x08	ib_mad.h
18855	IB_LINK_SPEED_SDR	0x01	ib_mad.h
18856	IB_LINK_SPEED_DDR	0x02	ib_mad.h
18857	IB_LINK_SPEED_QDR	0x04	ib_mad.h
18858	IB_PORT_STATE_DOWN	0x01	ib_mad.h
18859	IB_PORT_STATE_INIT	0x02	ib_mad.h
18860	IB_PORT_STATE_ARMED	0x03	ib_mad.h
18861	IB_PORT_STATE_ACTIVE	0x04	ib_mad.h
18862	IB_PORT_PHYS_STATE_SLEEP	0x01	ib_mad.h
18863	IB_PORT_PHYS_STATE_POLLING	0x02	ib_mad.h
18864	IB_MTU_256	0x01	ib_mad.h
18865	IB_MTU_512	0x02	ib_mad.h
18866	IB_MTU_1024	0x03	ib_mad.h
18867	IB_MTU_2048	0x04	ib_mad.h
18868	IB_MTU_4096	0x05	ib_mad.h
18869	IB_VL_0	0x01	ib_mad.h
18870	IB_VL_0_1	0x02	ib_mad.h
18871	IB_VL_0_3	0x03	ib_mad.h
18872	IB_VL_0_7	0x04	ib_mad.h
18873	IB_VL_0_14	0x05	ib_mad.h
18874	IB_SA_CLASS_VERSION	2	ib_mad.h
18875	IB_SA_METHOD_DELETE_RESP	0x95	ib_mad.h
18876	IB_SA_ATTR_MC_MEMBER_REC	0x38	ib_mad.h
18877	IB_SA_ATTR_PATH_REC	0x35	ib_mad.h
18878	IB_SA_PATH_REC_DGID	(1<<2)	ib_mad.h
18879	IB_SA_PATH_REC_SGID	(1<<3)	ib_mad.h
18880	IB_SA_MCMEMBER_REC_MGID	(1<<0)	ib_mad.h
18881	IB_SA_MCMEMBER_REC_PORT_GID	(1<<1)	ib_mad.h
18882	IB_SA_MCMEMBER_REC_QKEY	(1<<2)	ib_mad.h
18883	IB_SA_MCMEMBER_REC_MLID	(1<<3)	ib_mad.h
18884	IB_SA_MCMEMBER_REC_MTU_SELECTOR	(1<<4)	ib_mad.h
18885	IB_SA_MCMEMBER_REC_MTU	(1<<5)	ib_mad.h
18886	IB_SA_MCMEMBER_REC_TRAFFIC_CLAS	(1<<6)	ib_mad.h
18887	IB_SA_MCMEMBER_REC_PKEY	(1<<7)	ib_mad.h
18888	IB_SA_MCMEMBER_REC_RATE_SELECTO	(1<<8)	ib_mad.h
18889	IB_SA_MCMEMBER_REC_RATE	(1<<9)	ib_mad.h
18890	IB_SA_MCMEMBER_REC_PACKET_LIFE_	(1<<10)	ib_mad.h
18891	IB_SA_MCMEMBER_REC_PACKET_LIFE_	(1<<11)	ib_mad.h
18892	IB_SA_MCMEMBER_REC_SL	(1<<12)	ib_mad.h
18893	IB_SA_MCMEMBER_REC_FLOW_LABEL	(1<<13)	ib_mad.h
18894	IB_SA_MCMEMBER_REC_HOP_LIMIT	(1<<14)	ib_mad.h
18895	IB_SA_MCMEMBER_REC_SCOPE	(1<<15)	ib_mad.h
18896	IB_SA_MCMEMBER_REC_JOIN_STATE	(1<<16)	ib_mad.h
18897	IB_SA_MCMEMBER_REC_PROXY_JOIN	(1<<17)	ib_mad.h
18898	IB_CM_CLASS_VERSION	2	ib_mad.h
18899	IB_CM_ATTR_CLASS_PORT_INFO	0x0001	ib_mad.h
18900	IB_CM_ATTR_CONNECT_REQUEST	0x0010	ib_mad.h
18901	IB_CM_ATTR_MSG_RCPT_ACK	0x0011	ib_mad.h
18902	IB_CM_ATTR_CONNECT_REJECT	0x0012	ib_mad.h
18903	IB_CM_ATTR_CONNECT_REPLY	0x0013	ib_mad.h
18904	IB_CM_ATTR_READY_TO_USE	0x0014	ib_mad.h
18905	IB_CM_ATTR_DISCONNECT_REQUEST	0x0015	ib_mad.h
18906	IB_CM_ATTR_DISCONNECT_REPLY	0x0016	ib_mad.h
18907	IB_CM_ATTR_SERVICE_ID_RES_REQ	0x0016	ib_mad.h
18908	IB_CM_ATTR_SERVICE_ID_RES_REQ_R	0x0018	ib_mad.h
18909	IB_CM_ATTR_LOAD_ALTERNATE_PATH	0x0019	ib_mad.h
18910	IB_CM_ATTR_ALTERNATE_PATH_RESPO	0x001a	ib_mad.h
18911	IB_CM_TRANSPORT_RC	0	ib_mad.h
18912	IB_CM_TRANSPORT_UC	1	ib_mad.h
18913	IB_CM_TRANSPORT_RD	2	ib_mad.h
18914	IB_CM_REJECT_BAD_SERVICE_ID	8	ib_mad.h
18915	IB_CM_REJECT_STALE_CONN	10	ib_mad.h
18916	IB_CM_REJECT_CONSUMER	28	ib_mad.h
18917	IB_MGMT_BASE_VERSION	1	ib_mad.h
18918	IB_MGMT_CLASS_SUBN_LID_ROUTED	0x01	ib_mad.h
18919	IB_MGMT_CLASS_SUBN_DIRECTED_ROU	0x81	ib_mad.h
18920	IB_MGMT_CLASS_SUBN_ADM	0x03	ib_mad.h
18921	IB_MGMT_CLASS_PERF_MGMT	0x04	ib_mad.h
18922	IB_MGMT_CLASS_BM	0x05	ib_mad.h
18923	IB_MGMT_CLASS_DEVICE_MGMT	0x06	ib_mad.h
18924	IB_MGMT_CLASS_CM	0x07	ib_mad.h
18925	IB_MGMT_CLASS_SNMP	0x08	ib_mad.h
18926	IB_MGMT_CLASS_VENDOR_RANGE2_STA	0x30	ib_mad.h
18927	IB_MGMT_CLASS_VENDOR_RANGE2_END	0x4f	ib_mad.h
18928	IB_MGMT_CLASS_MASK	0x7f	ib_mad.h
18929	IB_MGMT_METHOD_GET	0x01	ib_mad.h
18930	IB_MGMT_METHOD_SET	0x02	ib_mad.h
18931	IB_MGMT_METHOD_GET_RESP	0x81	ib_mad.h
18932	IB_MGMT_METHOD_SEND	0x03	ib_mad.h
18933	IB_MGMT_METHOD_TRAP	0x05	ib_mad.h
18934	IB_MGMT_METHOD_REPORT	0x06	ib_mad.h
18935	IB_MGMT_METHOD_REPORT_RESP	0x86	ib_mad.h
18936	IB_MGMT_METHOD_TRAP_REPRESS	0x07	ib_mad.h
18937	IB_MGMT_METHOD_DELETE	0x15	ib_mad.h
18938	IB_MGMT_STATUS_OK	0x0000	ib_mad.h
18939	IB_MGMT_STATUS_BAD_VERSION	0x0001	ib_mad.h
18940	IB_MGMT_STATUS_UNSUPPORTED_METH	0x0002	ib_mad.h
18941	IB_MGMT_STATUS_UNSUPPORTED_METH	0x0003	ib_mad.h
18942	IB_MGMT_STATUS_INVALID_VALUE	0x0004	ib_mad.h
18943	IB_MAD_AGENTS	__table ( struct ib_mad_agent, "ib_mad_agents" )	ib_mi.h
18944	__ib_mad_agent	__table_entry ( IB_MAD_AGENTS, 01 )	ib_mi.h
18945	IB_LID_NONE	0xffff	ib_packet.h
18946	IB_GRH_IPVER_IPv6	0x06	ib_packet.h
18947	IB_GRH_NXTHDR_IBA	0x1b	ib_packet.h
18948	IB_MAX_HEADER_SIZE	sizeof ( union ib_headers )	ib_packet.h
18949	ICMP_ECHO_RESPONSE	0	icmp.h
18950	ICMP_ECHO_REQUEST	8	icmp.h
18951	ICMP6_NSOLICIT	135	icmp6.h
18952	ICMP6_NADVERT	136	icmp6.h
18953	ICMP6_FLAGS_ROUTER	0x80	icmp6.h
18954	ICMP6_FLAGS_SOLICITED	0x40	icmp6.h
18955	ICMP6_FLAGS_OVERRIDE	0x20	icmp6.h
18956	IEEE80211_MAX_DATA_LEN	2304	ieee80211.h
18957	IEEE80211_LLC_HEADER_LEN	8	ieee80211.h
18958	IEEE80211_MAX_CRYPTO_HEADER	8	ieee80211.h
18959	IEEE80211_MAX_CRYPTO_TRAILER	8	ieee80211.h
18960	IEEE80211_MAX_CRYPTO_OVERHEAD	16	ieee80211.h
18961	IEEE80211_MAX_FRAME_DATA	2296	ieee80211.h
18962	IEEE80211_TYP_FRAME_HEADER_LEN	24	ieee80211.h
18963	IEEE80211_MAX_FRAME_HEADER_LEN	32	ieee80211.h
18964	IEEE80211_MAX_FRAME_LEN	2352	ieee80211.h
18965	IEEE80211_MAX_SSID_LEN	32	ieee80211.h
18966	IEEE80211_FC_VERSION	0x0003	ieee80211.h
18967	IEEE80211_THIS_VERSION	0x0000	ieee80211.h
18968	IEEE80211_FC_TYPE	0x000C	ieee80211.h
18969	IEEE80211_TYPE_MGMT	0x0000	ieee80211.h
18970	IEEE80211_TYPE_CTRL	0x0004	ieee80211.h
18971	IEEE80211_TYPE_DATA	0x0008	ieee80211.h
18972	IEEE80211_FC_SUBTYPE	0x00F0	ieee80211.h
18973	IEEE80211_STYPE_ASSOC_REQ	0x0000	ieee80211.h
18974	IEEE80211_STYPE_ASSOC_RESP	0x0010	ieee80211.h
18975	IEEE80211_STYPE_REASSOC_REQ	0x0020	ieee80211.h
18976	IEEE80211_STYPE_REASSOC_RESP	0x0030	ieee80211.h
18977	IEEE80211_STYPE_PROBE_REQ	0x0040	ieee80211.h
18978	IEEE80211_STYPE_PROBE_RESP	0x0050	ieee80211.h
18979	IEEE80211_STYPE_BEACON	0x0080	ieee80211.h
18980	IEEE80211_STYPE_DISASSOC	0x00A0	ieee80211.h
18981	IEEE80211_STYPE_AUTH	0x00B0	ieee80211.h
18982	IEEE80211_STYPE_DEAUTH	0x00C0	ieee80211.h
18983	IEEE80211_STYPE_ACTION	0x00D0	ieee80211.h
18984	IEEE80211_STYPE_RTS	0x00B0	ieee80211.h
18985	IEEE80211_STYPE_CTS	0x00C0	ieee80211.h
18986	IEEE80211_STYPE_ACK	0x00D0	ieee80211.h
18987	IEEE80211_STYPE_DATA	0x0000	ieee80211.h
18988	IEEE80211_STYPE_NODATA	0x0040	ieee80211.h
18989	IEEE80211_FC_TODS	0x0100	ieee80211.h
18990	IEEE80211_FC_FROMDS	0x0200	ieee80211.h
18991	IEEE80211_FC_MORE_FRAG	0x0400	ieee80211.h
18992	IEEE80211_FC_RETRY	0x0800	ieee80211.h
18993	IEEE80211_FC_PWR_MGMT	0x1000	ieee80211.h
18994	IEEE80211_FC_MORE_DATA	0x2000	ieee80211.h
18995	IEEE80211_FC_PROTECTED	0x4000	ieee80211.h
18996	IEEE80211_FC_ORDER	0x8000	ieee80211.h
18997	IEEE80211_LLC_DSAP	0xAA	ieee80211.h
18998	IEEE80211_LLC_SSAP	0xAA	ieee80211.h
18999	IEEE80211_LLC_CTRL	0x03	ieee80211.h
19000	IEEE80211_RTS_LEN	16	ieee80211.h
19001	ieee80211_cts	ieee80211_cts_or_ack	ieee80211.h
19002	ieee80211_ack	ieee80211_cts_or_ack	ieee80211.h
19003	IEEE80211_CTS_LEN	10	ieee80211.h
19004	IEEE80211_ACK_LEN	10	ieee80211.h
19005	IEEE80211_CAPAB_MANAGED	0x0001	ieee80211.h
19006	IEEE80211_CAPAB_ADHOC	0x0002	ieee80211.h
19007	IEEE80211_CAPAB_CFPOLL	0x0004	ieee80211.h
19008	IEEE80211_CAPAB_CFPR	0x0008	ieee80211.h
19009	IEEE80211_CAPAB_PRIVACY	0x0010	ieee80211.h
19010	IEEE80211_CAPAB_SHORT_PMBL	0x0020	ieee80211.h
19011	IEEE80211_CAPAB_PBCC	0x0040	ieee80211.h
19012	IEEE80211_CAPAB_CHAN_AGILITY	0x0080	ieee80211.h
19013	IEEE80211_CAPAB_SPECTRUM_MGMT	0x0100	ieee80211.h
19014	IEEE80211_CAPAB_QOS	0x0200	ieee80211.h
19015	IEEE80211_CAPAB_SHORT_SLOT	0x0400	ieee80211.h
19016	IEEE80211_CAPAB_APSD	0x0800	ieee80211.h
19017	IEEE80211_CAPAB_DSSS_OFDM	0x2000	ieee80211.h
19018	IEEE80211_CAPAB_DELAYED_BACK	0x4000	ieee80211.h
19019	IEEE80211_CAPAB_IMMED_BACK	0x8000	ieee80211.h
19020	IEEE80211_STATUS_SUCCESS	0	ieee80211.h
19021	IEEE80211_STATUS_FAILURE	1	ieee80211.h
19022	IEEE80211_STATUS_CAPAB_UNSUPP	10	ieee80211.h
19023	IEEE80211_STATUS_REASSOC_INVALI	11	ieee80211.h
19024	IEEE80211_STATUS_ASSOC_DENIED	12	ieee80211.h
19025	IEEE80211_STATUS_AUTH_ALGO_UNSU	13	ieee80211.h
19026	IEEE80211_STATUS_AUTH_SEQ_INVAL	14	ieee80211.h
19027	IEEE80211_STATUS_AUTH_CHALL_INV	15	ieee80211.h
19028	IEEE80211_STATUS_AUTH_TIMEOUT	16	ieee80211.h
19029	IEEE80211_STATUS_ASSOC_NO_ROOM	17	ieee80211.h
19030	IEEE80211_STATUS_ASSOC_NEED_RAT	18	ieee80211.h
19031	IEEE80211_STATUS_ASSOC_NEED_SHO	19	ieee80211.h
19032	IEEE80211_STATUS_ASSOC_NEED_PBC	20	ieee80211.h
19033	IEEE80211_STATUS_ASSOC_NEED_CHA	21	ieee80211.h
19034	IEEE80211_STATUS_ASSOC_NEED_SPE	22	ieee80211.h
19035	IEEE80211_STATUS_ASSOC_BAD_POWE	23	ieee80211.h
19036	IEEE80211_STATUS_ASSOC_BAD_CHAN	24	ieee80211.h
19037	IEEE80211_STATUS_ASSOC_NEED_SHO	25	ieee80211.h
19038	IEEE80211_STATUS_ASSOC_NEED_DSS	26	ieee80211.h
19039	IEEE80211_STATUS_QOS_FAILURE	32	ieee80211.h
19040	IEEE80211_STATUS_QOS_NO_ROOM	33	ieee80211.h
19041	IEEE80211_STATUS_LINK_IS_HORRIB	34	ieee80211.h
19042	IEEE80211_STATUS_ASSOC_NEED_QOS	35	ieee80211.h
19043	IEEE80211_STATUS_REQUEST_DECLIN	37	ieee80211.h
19044	IEEE80211_STATUS_REQUEST_INVALI	38	ieee80211.h
19045	IEEE80211_STATUS_TS_NOT_CREATED	39	ieee80211.h
19046	IEEE80211_STATUS_INVALID_IE	40	ieee80211.h
19047	IEEE80211_STATUS_GROUP_CIPHER_I	41	ieee80211.h
19048	IEEE80211_STATUS_PAIR_CIPHER_IN	42	ieee80211.h
19049	IEEE80211_STATUS_AKMP_INVALID	43	ieee80211.h
19050	IEEE80211_STATUS_RSN_VERSION_UN	44	ieee80211.h
19051	IEEE80211_STATUS_RSN_CAPAB_INVA	45	ieee80211.h
19052	IEEE80211_STATUS_CIPHER_REJECTE	46	ieee80211.h
19053	IEEE80211_STATUS_TS_NOT_CREATED	47	ieee80211.h
19054	IEEE80211_STATUS_DIRECT_LINK_FO	48	ieee80211.h
19055	IEEE80211_STATUS_DEST_NOT_PRESE	49	ieee80211.h
19056	IEEE80211_STATUS_DEST_NOT_QOS	50	ieee80211.h
19057	IEEE80211_STATUS_ASSOC_LISTEN_T	51	ieee80211.h
19058	IEEE80211_REASON_NONE	0	ieee80211.h
19059	IEEE80211_REASON_UNSPECIFIED	1	ieee80211.h
19060	IEEE80211_REASON_AUTH_NO_LONGER	2	ieee80211.h
19061	IEEE80211_REASON_LEAVING	3	ieee80211.h
19062	IEEE80211_REASON_INACTIVITY	4	ieee80211.h
19063	IEEE80211_REASON_OUT_OF_RESOURC	5	ieee80211.h
19064	IEEE80211_REASON_NEED_AUTH	6	ieee80211.h
19065	IEEE80211_REASON_NEED_ASSOC	7	ieee80211.h
19066	IEEE80211_REASON_LEAVING_TO_ROA	8	ieee80211.h
19067	IEEE80211_REASON_REASSOC_INVALI	9	ieee80211.h
19068	IEEE80211_REASON_BAD_POWER	10	ieee80211.h
19069	IEEE80211_REASON_BAD_CHANNELS	11	ieee80211.h
19070	IEEE80211_REASON_INVALID_IE	13	ieee80211.h
19071	IEEE80211_REASON_MIC_FAILURE	14	ieee80211.h
19072	IEEE80211_REASON_4WAY_TIMEOUT	15	ieee80211.h
19073	IEEE80211_REASON_GROUPKEY_TIMEO	16	ieee80211.h
19074	IEEE80211_REASON_4WAY_INVALID	17	ieee80211.h
19075	IEEE80211_REASON_GROUP_CIPHER_I	18	ieee80211.h
19076	IEEE80211_REASON_PAIR_CIPHER_IN	19	ieee80211.h
19077	IEEE80211_REASON_AKMP_INVALID	20	ieee80211.h
19078	IEEE80211_REASON_RSN_VERSION_IN	21	ieee80211.h
19079	IEEE80211_REASON_RSN_CAPAB_INVA	22	ieee80211.h
19080	IEEE80211_REASON_8021X_FAILURE	23	ieee80211.h
19081	IEEE80211_REASON_CIPHER_REJECTE	24	ieee80211.h
19082	IEEE80211_REASON_QOS_UNSPECIFIE	32	ieee80211.h
19083	IEEE80211_REASON_QOS_OUT_OF_RES	33	ieee80211.h
19084	IEEE80211_REASON_LINK_IS_HORRIB	34	ieee80211.h
19085	IEEE80211_REASON_INVALID_TXOP	35	ieee80211.h
19086	IEEE80211_REASON_REQUESTED_LEAV	36	ieee80211.h
19087	IEEE80211_REASON_REQUESTED_NO_U	37	ieee80211.h
19088	IEEE80211_REASON_REQUESTED_NEED	38	ieee80211.h
19089	IEEE80211_REASON_REQUESTED_TIME	39	ieee80211.h
19090	IEEE80211_REASON_CIPHER_UNSUPPO	45	ieee80211.h
19091	IEEE80211_IE_SSID	0	ieee80211.h
19092	IEEE80211_IE_RATES	1	ieee80211.h
19093	IEEE80211_IE_EXT_RATES	50	ieee80211.h
19094	IEEE80211_IE_DS_PARAM	3	ieee80211.h
19095	IEEE80211_IE_COUNTRY	7	ieee80211.h
19096	IEEE80211_IE_REQUEST	10	ieee80211.h
19097	IEEE80211_IE_CHALLENGE_TEXT	16	ieee80211.h
19098	IEEE80211_IE_POWER_CONSTRAINT	52	ieee80211.h
19099	IEEE80211_IE_POWER_CAPAB	33	ieee80211.h
19100	IEEE80211_IE_CHANNELS	36	ieee80211.h
19101	IEEE80211_IE_ERP_INFO	42	ieee80211.h
19102	IEEE80211_ERP_NONERP_PRESENT	0x01	ieee80211.h
19103	IEEE80211_ERP_USE_PROTECTION	0x02	ieee80211.h
19104	IEEE80211_ERP_BARKER_LONG	0x04	ieee80211.h
19105	IEEE80211_IE_RSN	48	ieee80211.h
19106	OUI_ORG_MASK	0xFFFFFF00	ieee80211.h
19107	OUI_TYPE_MASK	0x000000FF	ieee80211.h
19108	OUI_ORG_MASK	0x00FFFFFF	ieee80211.h
19109	OUI_TYPE_MASK	0xFF000000	ieee80211.h
19110	IEEE80211_RSN_OUI	_MKOUI ( 0x00, 0x0F, 0xAC, 0 )	ieee80211.h
19111	IEEE80211_WPA_OUI	_MKOUI ( 0x00, 0x50, 0xF2, 0 )	ieee80211.h
19112	IEEE80211_WPA_OUI_VEN	_MKOUI ( 0x00, 0x50, 0xF2, 0x01 )	ieee80211.h
19113	IEEE80211_RSN_VERSION	1	ieee80211.h
19114	IEEE80211_RSN_CTYPE_WEP40	_MKOUI ( 0, 0, 0, 0x01 )	ieee80211.h
19115	IEEE80211_RSN_CTYPE_WEP104	_MKOUI ( 0, 0, 0, 0x05 )	ieee80211.h
19116	IEEE80211_RSN_CTYPE_TKIP	_MKOUI ( 0, 0, 0, 0x02 )	ieee80211.h
19117	IEEE80211_RSN_CTYPE_CCMP	_MKOUI ( 0, 0, 0, 0x04 )	ieee80211.h
19118	IEEE80211_RSN_CTYPE_USEGROUP	_MKOUI ( 0, 0, 0, 0x00 )	ieee80211.h
19119	IEEE80211_RSN_ATYPE_8021X	_MKOUI ( 0, 0, 0, 0x01 )	ieee80211.h
19120	IEEE80211_RSN_ATYPE_PSK	_MKOUI ( 0, 0, 0, 0x02 )	ieee80211.h
19121	IEEE80211_RSN_CAPAB_PREAUTH	0x001	ieee80211.h
19122	IEEE80211_RSN_CAPAB_NO_PAIRWISE	0x002	ieee80211.h
19123	IEEE80211_RSN_CAPAB_PTKSA_REPLA	0x00C	ieee80211.h
19124	IEEE80211_RSN_CAPAB_GTKSA_REPLA	0x030	ieee80211.h
19125	IEEE80211_RSN_CAPAB_PEERKEY	0x200	ieee80211.h
19126	IEEE80211_RSN_1_CTR	0x000	ieee80211.h
19127	IEEE80211_RSN_2_CTR	0x014	ieee80211.h
19128	IEEE80211_RSN_4_CTR	0x028	ieee80211.h
19129	IEEE80211_RSN_16_CTR	0x03C	ieee80211.h
19130	IEEE80211_IE_VENDOR	221	ieee80211.h
19131	ieee80211_beacon	ieee80211_beacon_or_probe_resp	ieee80211.h
19132	ieee80211_probe_resp	ieee80211_beacon_or_probe_resp	ieee80211.h
19133	ieee80211_disassoc	ieee80211_disassoc_or_deauth	ieee80211.h
19134	ieee80211_deauth	ieee80211_disassoc_or_deauth	ieee80211.h
19135	ieee80211_assoc_resp	ieee80211_assoc_or_reassoc_resp	ieee80211.h
19136	ieee80211_reassoc_resp	ieee80211_assoc_or_reassoc_resp	ieee80211.h
19137	IEEE80211_AUTH_OPEN_SYSTEM	0	ieee80211.h
19138	IEEE80211_AUTH_SHARED_KEY	1	ieee80211.h
19139	ARPHRD_NETROM	0	if_arp.h	*< from KA9Q: NET/ROM pseudo
19140	ARPHRD_ETHER	1	if_arp.h	*< Ethernet 10Mbps
19141	ARPHRD_EETHER	2	if_arp.h	*< Experimental Ethernet
19142	ARPHRD_AX25	3	if_arp.h	*< AX.25 Level 2
19143	ARPHRD_PRONET	4	if_arp.h	*< PROnet token ring
19144	ARPHRD_CHAOS	5	if_arp.h	*< Chaosnet
19145	ARPHRD_IEEE802	6	if_arp.h	*< IEEE 802.2 Ethernet/TR/TB
19146	ARPHRD_ARCNET	7	if_arp.h	*< ARCnet
19147	ARPHRD_APPLETLK	8	if_arp.h	*< APPLEtalk
19148	ARPHRD_DLCI	15	if_arp.h	*< Frame Relay DLCI
19149	ARPHRD_ATM	19	if_arp.h	*< ATM
19150	ARPHRD_METRICOM	23	if_arp.h	*< Metricom STRIP (new IANA id)
19151	ARPHRD_IEEE1394	24	if_arp.h	*< IEEE 1394 IPv4 - RFC 2734
19152	ARPHRD_EUI64	27	if_arp.h	*< EUI-64
19153	ARPHRD_INFINIBAND	32	if_arp.h	*< InfiniBand
19154	ARPOP_REQUEST	1	if_arp.h	*< ARP request
19155	ARPOP_REPLY	2	if_arp.h	*< ARP reply
19156	ARPOP_RREQUEST	3	if_arp.h	*< RARP request
19157	ARPOP_RREPLY	4	if_arp.h	*< RARP reply
19158	ARPOP_InREQUEST	8	if_arp.h	*< InARP request
19159	ARPOP_InREPLY	9	if_arp.h	*< InARP reply
19160	ARPOP_NAK	10	if_arp.h	*< (ATM)ARP NAK
19161	ETH_ALEN	6	if_ether.h	Size of Ethernet address
19162	ETH_HLEN	14	if_ether.h	Size of ethernet header
19163	ETH_ZLEN	60	if_ether.h	Minimum packet
19164	ETH_FRAME_LEN	1514	if_ether.h	Maximum packet
19165	ETH_DATA_ALIGN	2	if_ether.h	Amount needed to align the data after an ethernet header
19166	ETH_MAX_MTU	(ETH_FRAME_LEN-ETH_HLEN)	if_ether.h
19167	ETH_P_RAW	0x0000	if_ether.h	Raw packet
19168	ETH_P_IP	0x0800	if_ether.h	Internet Protocl Packet
19169	ETH_P_ARP	0x0806	if_ether.h	Address Resolution Protocol
19170	ETH_P_RARP	0x8035	if_ether.h	Reverse Address resolution Protocol
19171	ETH_P_IPV6	0x86DD	if_ether.h	IPv6 over blueblook
19172	ETH_P_SLOW	0x8809	if_ether.h	Ethernet slow protocols
19173	ETH_P_EAPOL	0x888E	if_ether.h	802.1X EAP over LANs
19174	ETH_P_AOE	0x88A2	if_ether.h	ATA over Ethernet
19175	IMAGE_LOADED	0x0001	image.h
19176	PROBE_MULTIBOOT	01	image.h
19177	PROBE_NORMAL	02	image.h
19178	PROBE_PXE	03	image.h
19179	IMAGE_TYPES	__table ( struct image_type, "image_types" )	image.h
19180	IP_ICMP	1	in.h
19181	IP_TCP	6	in.h
19182	IP_UDP	17	in.h
19183	IP_ICMP6	58	in.h
19184	INADDR_NONE	0xffffffff	in.h
19185	INADDR_BROADCAST	0xffffffff	in.h
19186	IN_CLASSA_NET	0xff000000	in.h
19187	IN_CLASSB_NET	0xffff0000	in.h
19188	IN_CLASSC_NET	0xffffff00	in.h
19189	IB_QPN_SMI	0	infiniband.h
19190	IB_QKEY_SMI	0	infiniband.h
19191	IB_QPN_GSI	1	infiniband.h
19192	IB_QKEY_GSI	0x80010000UL	infiniband.h
19193	IB_QPN_BROADCAST	0xffffffUL	infiniband.h
19194	IB_QPN_MASK	0xffffffUL	infiniband.h
19195	IB_PKEY_DEFAULT	0xffff	infiniband.h
19196	IB_PKEY_FULL	0x8000	infiniband.h
19197	IB_MAX_PAYLOAD_SIZE	2048	infiniband.h
19198	INIT_FNS	__table ( struct init_fn, "init_fns" )	init.h
19199	INIT_EARLY	01	init.h	*< Early initialisation
19200	INIT_SERIAL	02	init.h	*< Serial driver initialisation
19201	INIT_CONSOLE	03	init.h	*< Console initialisation
19202	INIT_NORMAL	04	init.h	*< Normal initialisation
19203	STARTUP_FNS	__table ( struct startup_fn, "startup_fns" )	init.h
19204	STARTUP_EARLY	01	init.h	*< Early startup
19205	STARTUP_NORMAL	02	init.h	*< Normal startup
19206	STARTUP_LATE	03	init.h	*< Late startup
19207	IOB_ALIGN	2048	iobuf.h
19208	IOB_ZLEN	64	iobuf.h
19209	IP_VER	0x40U	ip.h
19210	IP_MASK_VER	0xf0U	ip.h
19211	IP_MASK_HLEN	0x0fU	ip.h
19212	IP_MASK_OFFSET	0x1fffU	ip.h
19213	IP_MASK_DONOTFRAG	0x4000U	ip.h
19214	IP_MASK_MOREFRAGS	0x2000U	ip.h
19215	IP_PSHLEN	12	ip.h
19216	IP_TOS	0	ip.h
19217	IP_TTL	64	ip.h
19218	IP_FRAG_IOB_SIZE	1500	ip.h
19219	IP_FRAG_TIMEOUT	50	ip.h
19220	IP6_VERSION	0x6	ip6.h
19221	IP6_HOP_LIMIT	255	ip6.h
19222	MAX_HDR_LEN	100	ip6.h
19223	MAX_IOB_LEN	1500	ip6.h
19224	MIN_IOB_LEN	MAX_HDR_LEN + 100	ip6.h	To account for padding by LL
19225	IP6_HOPBYHOP	0x00	ip6.h
19226	IP6_ROUTING	0x43	ip6.h
19227	IP6_FRAGMENT	0x44	ip6.h
19228	IP6_AUTHENTICATION	0x51	ip6.h
19229	IP6_DEST_OPTS	0x60	ip6.h
19230	IP6_ESP	0x50	ip6.h
19231	IP6_ICMP6	0x58	ip6.h
19232	IP6_NO_HEADER	0x59	ip6.h
19233	IPOIB_ALEN	20	ipoib.h
19234	IPOIB_HLEN	4	ipoib.h
19235	ISA_DRIVERS	__table ( struct isa_driver, "isa_drivers" )	isa.h
19236	__isa_driver	__table_entry ( ISA_DRIVERS, 01 )	isa.h
19237	ISAPNP_ADDRESS	0x279	isapnp.h
19238	ISAPNP_WRITE_DATA	0xa79	isapnp.h
19239	ISAPNP_READ_PORT_MIN	0x203	isapnp.h
19240	ISAPNP_READ_PORT_START	0x213	isapnp.h	ISAPnP spec says 0x203, but
19241	ISAPNP_READ_PORT_MAX	0x3ff	isapnp.h
19242	ISAPNP_READ_PORT_STEP	0x10	isapnp.h	Can be any multiple of 4
19243	ISAPNP_CSN_MIN	0x01	isapnp.h
19244	ISAPNP_CSN_MAX	0x0f	isapnp.h
19245	ISAPNP_READPORT	0x00	isapnp.h
19246	ISAPNP_SERIALISOLATION	0x01	isapnp.h
19247	ISAPNP_CONFIGCONTROL	0x02	isapnp.h
19248	ISAPNP_WAKE	0x03	isapnp.h
19249	ISAPNP_RESOURCEDATA	0x04	isapnp.h
19250	ISAPNP_STATUS	0x05	isapnp.h
19251	ISAPNP_CARDSELECTNUMBER	0x06	isapnp.h
19252	ISAPNP_LOGICALDEVICENUMBER	0x07	isapnp.h
19253	ISAPNP_ACTIVATE	0x30	isapnp.h
19254	ISAPNP_IORANGECHECK	0x31	isapnp.h
19255	ISAPNP_CONFIG_RESET	( 1 << 0 )	isapnp.h
19256	ISAPNP_CONFIG_WAIT_FOR_KEY	( 1 << 1 )	isapnp.h
19257	ISAPNP_CONFIG_RESET_CSN	( 1 << 2 )	isapnp.h
19258	ISAPNP_CONFIG_RESET_DRV	( ISAPNP_CONFIG_RESET \| \ ISAPNP_CONFIG_WAIT_FOR_KEY \| \ ISAPNP_CONFIG_RESET_CSN )	isapnp.h
19259	ISAPNP_LFSR_SEED	0x6a	isapnp.h
19260	ISAPNP_TAG_PNPVERNO	0x01	isapnp.h
19261	ISAPNP_TAG_LOGDEVID	0x02	isapnp.h
19262	ISAPNP_TAG_COMPATDEVID	0x03	isapnp.h
19263	ISAPNP_TAG_IRQ	0x04	isapnp.h
19264	ISAPNP_TAG_DMA	0x05	isapnp.h
19265	ISAPNP_TAG_STARTDEP	0x06	isapnp.h
19266	ISAPNP_TAG_ENDDEP	0x07	isapnp.h
19267	ISAPNP_TAG_IOPORT	0x08	isapnp.h
19268	ISAPNP_TAG_FIXEDIO	0x09	isapnp.h
19269	ISAPNP_TAG_RSVDSHORTA	0x0A	isapnp.h
19270	ISAPNP_TAG_RSVDSHORTB	0x0B	isapnp.h
19271	ISAPNP_TAG_RSVDSHORTC	0x0C	isapnp.h
19272	ISAPNP_TAG_RSVDSHORTD	0x0D	isapnp.h
19273	ISAPNP_TAG_VENDORSHORT	0x0E	isapnp.h
19274	ISAPNP_TAG_END	0x0F	isapnp.h
19275	ISAPNP_TAG_MEMRANGE	0x81	isapnp.h
19276	ISAPNP_TAG_ANSISTR	0x82	isapnp.h
19277	ISAPNP_TAG_UNICODESTR	0x83	isapnp.h
19278	ISAPNP_TAG_VENDORLONG	0x84	isapnp.h
19279	ISAPNP_TAG_MEM32RANGE	0x85	isapnp.h
19280	ISAPNP_TAG_FIXEDMEM32RANGE	0x86	isapnp.h
19281	ISAPNP_TAG_RSVDLONG0	0xF0	isapnp.h
19282	ISAPNP_TAG_RSVDLONG1	0xF1	isapnp.h
19283	ISAPNP_TAG_RSVDLONG2	0xF2	isapnp.h
19284	ISAPNP_TAG_RSVDLONG3	0xF3	isapnp.h
19285	ISAPNP_TAG_RSVDLONG4	0xF4	isapnp.h
19286	ISAPNP_TAG_RSVDLONG5	0xF5	isapnp.h
19287	ISAPNP_TAG_RSVDLONG6	0xF6	isapnp.h
19288	ISAPNP_TAG_RSVDLONG7	0xF7	isapnp.h
19289	ISAPNP_TAG_RSVDLONG8	0xF8	isapnp.h
19290	ISAPNP_TAG_RSVDLONG9	0xF9	isapnp.h
19291	ISAPNP_TAG_RSVDLONGA	0xFA	isapnp.h
19292	ISAPNP_TAG_RSVDLONGB	0xFB	isapnp.h
19293	ISAPNP_TAG_RSVDLONGC	0xFC	isapnp.h
19294	ISAPNP_TAG_RSVDLONGD	0xFD	isapnp.h
19295	ISAPNP_TAG_RSVDLONGE	0xFE	isapnp.h
19296	ISAPNP_TAG_RSVDLONGF	0xFF	isapnp.h
19297	ISAPNP_TAG_PSEUDO_NEWBOARD	0x100	isapnp.h
19298	ISAPNP_DRIVERS	__table ( struct isapnp_driver, "isapnp_drivers" )	isapnp.h
19299	__isapnp_driver	__table_entry ( ISAPNP_DRIVERS, 01 )	isapnp.h
19300	GENERIC_ISAPNP_VENDOR	ISAPNP_VENDOR ( 'P','N','P' )	isa_ids.h
19301	ISA_PROD_ID_MASK	( 0xf0ff )	isa_ids.h
19302	ISCSI_PORT	3260	iscsi.h
19303	ISCSI_OPCODE_MASK	0x3f	iscsi.h
19304	ISCSI_FLAG_IMMEDIATE	0x40	iscsi.h
19305	ISCSI_FLAG_FINAL	0x80	iscsi.h
19306	ISCSI_OPCODE_LOGIN_REQUEST	0x03	iscsi.h
19307	ISCSI_LOGIN_FLAG_TRANSITION	0x80	iscsi.h
19308	ISCSI_LOGIN_FLAG_CONTINUE	0x40	iscsi.h
19309	ISCSI_LOGIN_CSG_MASK	0x0c	iscsi.h
19310	ISCSI_LOGIN_CSG_SECURITY_NEGOTI	0x00	iscsi.h
19311	ISCSI_LOGIN_CSG_OPERATIONAL_NEG	0x04	iscsi.h
19312	ISCSI_LOGIN_CSG_FULL_FEATURE_PH	0x0c	iscsi.h
19313	ISCSI_LOGIN_NSG_MASK	0x03	iscsi.h
19314	ISCSI_LOGIN_NSG_SECURITY_NEGOTI	0x00	iscsi.h
19315	ISCSI_LOGIN_NSG_OPERATIONAL_NEG	0x01	iscsi.h
19316	ISCSI_LOGIN_NSG_FULL_FEATURE_PH	0x03	iscsi.h
19317	ISCSI_ISID_IANA	0x40000000	iscsi.h
19318	IANA_EN_FEN_SYSTEMS	10019	iscsi.h
19319	ISCSI_OPCODE_LOGIN_RESPONSE	0x23	iscsi.h
19320	ISCSI_STATUS_SUCCESS	0x00	iscsi.h
19321	ISCSI_STATUS_REDIRECT	0x01	iscsi.h
19322	ISCSI_STATUS_INITIATOR_ERROR	0x02	iscsi.h
19323	ISCSI_STATUS_INITIATOR_ERROR_AU	0x01	iscsi.h
19324	ISCSI_STATUS_INITIATOR_ERROR_AU	0x02	iscsi.h
19325	ISCSI_STATUS_INITIATOR_ERROR_NO	0x03	iscsi.h
19326	ISCSI_STATUS_INITIATOR_ERROR_RE	0x04	iscsi.h
19327	ISCSI_STATUS_TARGET_ERROR	0x03	iscsi.h
19328	ISCSI_OPCODE_SCSI_COMMAND	0x01	iscsi.h
19329	ISCSI_COMMAND_FLAG_READ	0x40	iscsi.h
19330	ISCSI_COMMAND_FLAG_WRITE	0x20	iscsi.h
19331	ISCSI_COMMAND_ATTR_UNTAGGED	0x00	iscsi.h
19332	ISCSI_COMMAND_ATTR_SIMPLE	0x01	iscsi.h
19333	ISCSI_COMMAND_ATTR_ORDERED	0x02	iscsi.h
19334	ISCSI_COMMAND_ATTR_HEAD_OF_QUEU	0x03	iscsi.h
19335	ISCSI_COMMAND_ATTR_ACA	0x04	iscsi.h
19336	ISCSI_OPCODE_SCSI_RESPONSE	0x21	iscsi.h
19337	ISCSI_RESPONSE_COMMAND_COMPLETE	0x00	iscsi.h
19338	ISCSI_RESPONSE_TARGET_FAILURE	0x01	iscsi.h
19339	ISCSI_SENSE_RESPONSE_CODE_OFFSE	2	iscsi.h
19340	ISCSI_OPCODE_DATA_IN	0x25	iscsi.h
19341	ISCSI_DATA_FLAG_ACKNOWLEDGE	0x40	iscsi.h
19342	ISCSI_DATA_FLAG_OVERFLOW	0x04	iscsi.h
19343	ISCSI_DATA_FLAG_UNDERFLOW	0x02	iscsi.h
19344	ISCSI_DATA_FLAG_STATUS	0x01	iscsi.h
19345	ISCSI_OPCODE_DATA_OUT	0x05	iscsi.h
19346	ISCSI_OPCODE_R2T	0x31	iscsi.h
19347	ISCSI_STATUS_SECURITY_NEGOTIATI	( ISCSI_LOGIN_CSG_SECURITY_NEGOTIATION \| \ ISCSI_LOGIN_NSG_OPERATIONAL_NEGOTIATION )	iscsi.h
19348	ISCSI_STATUS_OPERATIONAL_NEGOTI	( ISCSI_LOGIN_CSG_OPERATIONAL_NEGOTIATION \| \ ISCSI_LOGIN_NSG_FULL_FEATURE_PHASE )	iscsi.h
19349	ISCSI_STATUS_FULL_FEATURE_PHASE	ISCSI_LOGIN_CSG_FULL_FEATURE_PHASE	iscsi.h
19350	ISCSI_STATUS_PHASE_MASK	( ISCSI_LOGIN_CSG_MASK \| ISCSI_LOGIN_NSG_MASK )	iscsi.h
19351	ISCSI_STATUS_STRINGS_SECURITY	0x0100	iscsi.h
19352	ISCSI_STATUS_STRINGS_CHAP_ALGOR	0x0200	iscsi.h
19353	ISCSI_STATUS_STRINGS_CHAP_RESPO	0x0400	iscsi.h
19354	ISCSI_STATUS_STRINGS_CHAP_CHALL	0x0800	iscsi.h
19355	ISCSI_STATUS_STRINGS_OPERATIONA	0x1000	iscsi.h
19356	ISCSI_STATUS_STRINGS_MASK	0xff00	iscsi.h
19357	ISCSI_STATUS_AUTH_FORWARD_REQUI	0x00010000	iscsi.h
19358	ISCSI_STATUS_AUTH_REVERSE_REQUI	0x00020000	iscsi.h
19359	ISCSI_STATUS_AUTH_REVERSE_OK	0x00040000	iscsi.h
19360	ISCSI_MAX_RETRIES	2	iscsi.h
19361	NUL	0x00	keys.h
19362	CTRL_A	0x01	keys.h
19363	CTRL_B	0x02	keys.h
19364	CTRL_C	0x03	keys.h
19365	CTRL_D	0x04	keys.h
19366	CTRL_E	0x05	keys.h
19367	CTRL_F	0x06	keys.h
19368	CTRL_G	0x07	keys.h
19369	CTRL_H	0x08	keys.h
19370	CTRL_I	0x09	keys.h
19371	CTRL_J	0x0a	keys.h
19372	CTRL_K	0x0b	keys.h
19373	CTRL_L	0x0c	keys.h
19374	CTRL_M	0x0d	keys.h
19375	CTRL_N	0x0e	keys.h
19376	CTRL_O	0x0f	keys.h
19377	CTRL_P	0x10	keys.h
19378	CTRL_Q	0x11	keys.h
19379	CTRL_R	0x12	keys.h
19380	CTRL_S	0x13	keys.h
19381	CTRL_T	0x14	keys.h
19382	CTRL_U	0x15	keys.h
19383	CTRL_V	0x16	keys.h
19384	CTRL_W	0x17	keys.h
19385	CTRL_X	0x18	keys.h
19386	CTRL_Y	0x19	keys.h
19387	CTRL_Z	0x1a	keys.h
19388	BACKSPACE	CTRL_H	keys.h
19389	TAB	CTRL_I	keys.h
19390	LF	CTRL_J	keys.h
19391	CR	CTRL_M	keys.h
19392	ESC	0x1b	keys.h
19393	KEY_MIN	0x101	keys.h
19394	KEY_UP	KEY_ANSI ( 0, 'A' )	keys.h	*< Up arrow
19395	KEY_DOWN	KEY_ANSI ( 0, 'B' )	keys.h	*< Down arrow
19396	KEY_RIGHT	KEY_ANSI ( 0, 'C' )	keys.h	*< Right arrow
19397	KEY_LEFT	KEY_ANSI ( 0, 'D' )	keys.h	*< Left arrow
19398	KEY_END	KEY_ANSI ( 0, 'F' )	keys.h	*< End
19399	KEY_HOME	KEY_ANSI ( 0, 'H' )	keys.h	*< Home
19400	KEY_IC	KEY_ANSI ( 2, '~' )	keys.h	*< Insert
19401	KEY_DC	KEY_ANSI ( 3, '~' )	keys.h	*< Delete
19402	KEY_PPAGE	KEY_ANSI ( 5, '~' )	keys.h	*< Page up
19403	KEY_NPAGE	KEY_ANSI ( 6, '~' )	keys.h	*< Page down
19404	KEY_F8	KEY_ANSI ( 19, '~' )	keys.h	*< F8 (for PXE)
19405	KEY_BACKSPACE	BACKSPACE	keys.h
19406	KEY_ENTER	LF	keys.h
19407	printk	printf	linux_compat.h
19408	MCA_MOTHERBOARD_SETUP_REG	0x94	mca.h
19409	MCA_ADAPTER_SETUP_REG	0x96	mca.h
19410	MCA_MAX_SLOT_NR	0x07	mca.h	Must be 2^n - 1
19411	GENERIC_MCA_VENDOR	ISA_VENDOR ( 'M', 'C', 'A' )	mca.h
19412	MCA_DRIVERS	__table ( struct mca_driver, "mca_drivers" )	mca.h
19413	__mca_driver	__table_entry ( MCA_DRIVERS, 01 )	mca.h
19414	MD5_DIGEST_SIZE	16	md5.h
19415	MD5_BLOCK_WORDS	16	md5.h
19416	MD5_HASH_WORDS	4	md5.h
19417	MD5_CTX_SIZE	sizeof ( struct md5_ctx )	md5.h
19418	MAX_MEMORY_REGIONS	8	memmap.h
19419	NDP_STATE_INVALID	0	ndp.h
19420	NDP_STATE_INCOMPLETE	1	ndp.h
19421	NDP_STATE_REACHABLE	2	ndp.h
19422	NDP_STATE_DELAY	3	ndp.h
19423	NDP_STATE_PROBE	4	ndp.h
19424	NDP_STATE_STALE	5	ndp.h
19425	NET80211_BAND_2GHZ	0	net80211.h
19426	NET80211_BAND_5GHZ	1	net80211.h
19427	NET80211_NR_BANDS	2	net80211.h
19428	NET80211_BAND_BIT_2GHZ	(1 << 0)	net80211.h
19429	NET80211_BAND_BIT_5GHZ	(1 << 1)	net80211.h
19430	NET80211_MODE_A	(1 << 0)	net80211.h
19431	NET80211_MODE_B	(1 << 1)	net80211.h
19432	NET80211_MODE_G	(1 << 2)	net80211.h
19433	NET80211_MODE_N	(1 << 3)	net80211.h
19434	NET80211_CFG_CHANNEL	(1 << 0)	net80211.h
19435	NET80211_CFG_RATE	(1 << 1)	net80211.h
19436	NET80211_CFG_ASSOC	(1 << 2)	net80211.h
19437	NET80211_CFG_PHY_PARAMS	(1 << 3)	net80211.h
19438	NET80211_STATUS_MASK	0x7F	net80211.h
19439	NET80211_IS_REASON	0x80	net80211.h
19440	NET80211_PROBED	(1 << 8)	net80211.h
19441	NET80211_AUTHENTICATED	(1 << 9)	net80211.h
19442	NET80211_ASSOCIATED	(1 << 10)	net80211.h
19443	NET80211_CRYPTO_SYNCED	(1 << 11)	net80211.h
19444	NET80211_WORKING	(1 << 12)	net80211.h
19445	NET80211_WAITING	(1 << 13)	net80211.h
19446	NET80211_NO_ASSOC	(1 << 14)	net80211.h
19447	NET80211_AUTO_SSID	(1 << 15)	net80211.h
19448	NET80211_PHY_USE_PROTECTION	(1 << 1)	net80211.h
19449	NET80211_PHY_USE_SHORT_PREAMBLE	(1 << 2)	net80211.h
19450	NET80211_PHY_USE_SHORT_SLOT	(1 << 3)	net80211.h
19451	NET80211_MAX_RATES	16	net80211.h
19452	NET80211_MAX_CHANNELS	32	net80211.h
19453	NET80211_FRAG_TIMEOUT	2	net80211.h
19454	NET80211_NR_CONCURRENT_FRAGS	3	net80211.h
19455	NET80211_REG_TXPOWER	20	net80211.h
19456	NET80211_HANDSHAKERS	__table ( struct net80211_handshaker, \ "net80211_handshakers" )	net80211.h
19457	__net80211_handshaker	__table_entry ( NET80211_HANDSHAKERS, 01 )	net80211.h
19458	NET80211_CRYPTOS	__table ( struct net80211_crypto, "net80211_cryptos" )	net80211.h
19459	__net80211_crypto	__table_entry ( NET80211_CRYPTOS, 01 )	net80211.h
19460	MAX_HW_ADDR_LEN	8	netdevice.h
19461	MAX_LL_ADDR_LEN	20	netdevice.h
19462	MAX_LL_HEADER_LEN	32	netdevice.h
19463	MAX_NET_ADDR_LEN	4	netdevice.h
19464	NETDEV_MAX_UNIQUE_ERRORS	4	netdevice.h
19465	NETDEV_OPEN	0x0001	netdevice.h
19466	LL_PROTOCOLS	__table ( struct ll_protocol, "ll_protocols" )	netdevice.h
19467	__ll_protocol	__table_entry ( LL_PROTOCOLS, 01 )	netdevice.h
19468	NET_PROTOCOLS	__table ( struct net_protocol, "net_protocols" )	netdevice.h
19469	__net_protocol	__table_entry ( NET_PROTOCOLS, 01 )	netdevice.h
19470	NAP_PREFIX_null	__null_	null_nap.h
19471	URI_OPENERS	__table ( struct uri_opener, "uri_openers" )	open.h
19472	__uri_opener	__table_entry ( URI_OPENERS, 01 )	open.h
19473	SOCKET_OPENERS	__table ( struct socket_opener, "socket_openers" )	open.h
19474	__socket_opener	__table_entry ( SOCKET_OPENERS, 01 )	open.h
19475	PCI_COMMAND_IO	0x1	pci.h	Enable response in I/O space
19476	PCI_COMMAND_MEM	0x2	pci.h	Enable response in mem space
19477	PCI_COMMAND_MASTER	0x4	pci.h	Enable bus mastering
19478	PCI_CACHE_LINE_SIZE	0x0c	pci.h	8 bits
19479	PCI_LATENCY_TIMER	0x0d	pci.h	8 bits
19480	PCI_COMMAND_SPECIAL	0x8	pci.h	Enable response to special cycles
19481	PCI_COMMAND_INVALIDATE	0x10	pci.h	Use memory write and invalidate
19482	PCI_COMMAND_VGA_PALETTE	0x20	pci.h	Enable palette snooping
19483	PCI_COMMAND_PARITY	0x40	pci.h	Enable parity checking
19484	PCI_COMMAND_WAIT	0x80	pci.h	Enable address/data stepping
19485	PCI_COMMAND_SERR	0x100	pci.h	Enable SERR
19486	PCI_COMMAND_FAST_BACK	0x200	pci.h	Enable back-to-back writes
19487	PCI_COMMAND_INTX_DISABLE	0x400	pci.h	INTx Emulation Disable
19488	PCI_VENDOR_ID	0x00	pci.h	16 bits
19489	PCI_DEVICE_ID	0x02	pci.h	16 bits
19490	PCI_COMMAND	0x04	pci.h	16 bits
19491	PCI_STATUS	0x06	pci.h	16 bits
19492	PCI_STATUS_CAP_LIST	0x10	pci.h	Support Capability List
19493	PCI_STATUS_66MHZ	0x20	pci.h	Support 66 Mhz PCI 2.1 bus
19494	PCI_STATUS_UDF	0x40	pci.h	Support User Definable Features [obsolete]
19495	PCI_STATUS_FAST_BACK	0x80	pci.h	Accept fast-back to back
19496	PCI_STATUS_PARITY	0x100	pci.h	Detected parity error
19497	PCI_STATUS_DEVSEL_MASK	0x600	pci.h	DEVSEL timing
19498	PCI_STATUS_DEVSEL_FAST	0x000	pci.h
19499	PCI_STATUS_DEVSEL_MEDIUM	0x200	pci.h
19500	PCI_STATUS_DEVSEL_SLOW	0x400	pci.h
19501	PCI_STATUS_SIG_TARGET_ABORT	0x800	pci.h	Set on target abort
19502	PCI_STATUS_REC_TARGET_ABORT	0x1000	pci.h	Master ack of "
19503	PCI_STATUS_REC_MASTER_ABORT	0x2000	pci.h	Set on master abort
19504	PCI_STATUS_SIG_SYSTEM_ERROR	0x4000	pci.h	Set when we drive SERR
19505	PCI_STATUS_DETECTED_PARITY	0x8000	pci.h	Set on parity error
19506	PCI_REVISION	0x08	pci.h	8 bits
19507	PCI_REVISION_ID	0x08	pci.h	8 bits
19508	PCI_CLASS_REVISION	0x08	pci.h	32 bits
19509	PCI_CLASS_CODE	0x0b	pci.h	8 bits
19510	PCI_SUBCLASS_CODE	0x0a	pci.h	8 bits
19511	PCI_HEADER_TYPE	0x0e	pci.h	8 bits
19512	PCI_HEADER_TYPE_NORMAL	0	pci.h
19513	PCI_HEADER_TYPE_BRIDGE	1	pci.h
19514	PCI_HEADER_TYPE_CARDBUS	2	pci.h
19515	PCI_CARDBUS_CIS	0x28	pci.h
19516	PCI_SUBSYSTEM_VENDOR_ID	0x2c	pci.h
19517	PCI_SUBSYSTEM_ID	0x2e	pci.h
19518	PCI_BASE_ADDRESS_0	0x10	pci.h	32 bits
19519	PCI_BASE_ADDRESS_1	0x14	pci.h	32 bits
19520	PCI_BASE_ADDRESS_2	0x18	pci.h	32 bits
19521	PCI_BASE_ADDRESS_3	0x1c	pci.h	32 bits
19522	PCI_BASE_ADDRESS_4	0x20	pci.h	32 bits
19523	PCI_BASE_ADDRESS_5	0x24	pci.h	32 bits
19524	PCI_BASE_ADDRESS_SPACE	0x01	pci.h	0 = memory, 1 = I/O
19525	PCI_BASE_ADDRESS_SPACE_IO	0x01	pci.h
19526	PCI_BASE_ADDRESS_SPACE_MEMORY	0x00	pci.h
19527	PCI_BASE_ADDRESS_MEM_TYPE_MASK	0x06	pci.h
19528	PCI_BASE_ADDRESS_MEM_TYPE_32	0x00	pci.h	32 bit address
19529	PCI_BASE_ADDRESS_MEM_TYPE_1M	0x02	pci.h	Below 1M [obsolete]
19530	PCI_BASE_ADDRESS_MEM_TYPE_64	0x04	pci.h	64 bit address
19531	PCI_BASE_ADDRESS_MEM_MASK	(~0x0f)	pci.h
19532	PCI_BASE_ADDRESS_IO_MASK	(~0x03)	pci.h
19533	PCI_ROM_ADDRESS	0x30	pci.h	32 bits
19534	PCI_ROM_ADDRESS_ENABLE	0x01	pci.h	Write 1 to enable ROM,
19535	PCI_CAPABILITY_LIST	0x34	pci.h	Offset of first capability list entry
19536	PCI_INTERRUPT_LINE	0x3c	pci.h	IRQ number (0-15)
19537	PCI_INTERRUPT_PIN	0x3d	pci.h	IRQ pin on PCI bus (A-D)
19538	PCI_PRIMARY_BUS	0x18	pci.h	Primary bus number
19539	PCI_SECONDARY_BUS	0x19	pci.h	Secondary bus number
19540	PCI_SUBORDINATE_BUS	0x1a	pci.h	Highest bus number behind the bridge
19541	PCI_SEC_LATENCY_TIMER	0x1b	pci.h	Latency timer for secondary interface
19542	PCI_IO_BASE	0x1c	pci.h	I/O range behind the bridge
19543	PCI_IO_LIMIT	0x1d	pci.h
19544	PCI_IO_RANGE_TYPE_MASK	0x0f	pci.h	I/O bridging type
19545	PCI_IO_RANGE_TYPE_16	0x00	pci.h
19546	PCI_IO_RANGE_TYPE_32	0x01	pci.h
19547	PCI_IO_RANGE_MASK	~0x0f	pci.h
19548	PCI_SEC_STATUS	0x1e	pci.h	Secondary status register, only bit 14 used
19549	PCI_MEMORY_BASE	0x20	pci.h	Memory range behind
19550	PCI_MEMORY_LIMIT	0x22	pci.h
19551	PCI_MEMORY_RANGE_TYPE_MASK	0x0f	pci.h
19552	PCI_MEMORY_RANGE_MASK	~0x0f	pci.h
19553	PCI_PREF_MEMORY_BASE	0x24	pci.h	Prefetchable memory range behind
19554	PCI_PREF_MEMORY_LIMIT	0x26	pci.h
19555	PCI_PREF_RANGE_TYPE_MASK	0x0f	pci.h
19556	PCI_PREF_RANGE_TYPE_32	0x00	pci.h
19557	PCI_PREF_RANGE_TYPE_64	0x01	pci.h
19558	PCI_PREF_RANGE_MASK	~0x0f	pci.h
19559	PCI_PREF_BASE_UPPER32	0x28	pci.h	Upper half of prefetchable memory range
19560	PCI_PREF_LIMIT_UPPER32	0x2c	pci.h
19561	PCI_IO_BASE_UPPER16	0x30	pci.h	Upper half of I/O addresses
19562	PCI_IO_LIMIT_UPPER16	0x32	pci.h
19563	PCI_ROM_ADDRESS1	0x38	pci.h	Same as PCI_ROM_ADDRESS, but for htype 1
19564	PCI_BRIDGE_CONTROL	0x3e	pci.h
19565	PCI_BRIDGE_CTL_PARITY	0x01	pci.h	Enable parity detection on secondary interface
19566	PCI_BRIDGE_CTL_SERR	0x02	pci.h	The same for SERR forwarding
19567	PCI_BRIDGE_CTL_NO_ISA	0x04	pci.h	Disable bridging of ISA ports
19568	PCI_BRIDGE_CTL_VGA	0x08	pci.h	Forward VGA addresses
19569	PCI_BRIDGE_CTL_MASTER_ABORT	0x20	pci.h	Report master aborts
19570	PCI_BRIDGE_CTL_BUS_RESET	0x40	pci.h	Secondary bus reset
19571	PCI_BRIDGE_CTL_FAST_BACK	0x80	pci.h	Fast Back2Back enabled on secondary interface
19572	PCI_CB_CAPABILITY_LIST	0x14	pci.h
19573	PCI_CAP_LIST_ID	0	pci.h	Capability ID
19574	PCI_CAP_ID_PM	0x01	pci.h	Power Management
19575	PCI_CAP_ID_AGP	0x02	pci.h	Accelerated Graphics Port
19576	PCI_CAP_ID_VPD	0x03	pci.h	Vital Product Data
19577	PCI_CAP_ID_SLOTID	0x04	pci.h	Slot Identification
19578	PCI_CAP_ID_MSI	0x05	pci.h	Message Signalled Interrupts
19579	PCI_CAP_ID_CHSWP	0x06	pci.h	CompactPCI HotSwap
19580	PCI_CAP_ID_EXP	0x10	pci.h	PCI Express
19581	PCI_CAP_LIST_NEXT	1	pci.h	Next capability in the list
19582	PCI_CAP_FLAGS	2	pci.h	Capability defined flags (16 bits)
19583	PCI_CAP_SIZEOF	4	pci.h
19584	PCI_PM_PMC	2	pci.h	PM Capabilities Register
19585	PCI_PM_CAP_VER_MASK	0x0007	pci.h	Version
19586	PCI_PM_CAP_PME_CLOCK	0x0008	pci.h	PME clock required
19587	PCI_PM_CAP_RESERVED	0x0010	pci.h	Reserved field
19588	PCI_PM_CAP_DSI	0x0020	pci.h	Device specific initialization
19589	PCI_PM_CAP_AUX_POWER	0x01C0	pci.h	Auxilliary power support mask
19590	PCI_PM_CAP_D1	0x0200	pci.h	D1 power state support
19591	PCI_PM_CAP_D2	0x0400	pci.h	D2 power state support
19592	PCI_PM_CAP_PME	0x0800	pci.h	PME pin supported
19593	PCI_PM_CAP_PME_MASK	0xF800	pci.h	PME Mask of all supported states
19594	PCI_PM_CAP_PME_D0	0x0800	pci.h	PME# from D0
19595	PCI_PM_CAP_PME_D1	0x1000	pci.h	PME# from D1
19596	PCI_PM_CAP_PME_D2	0x2000	pci.h	PME# from D2
19597	PCI_PM_CAP_PME_D3	0x4000	pci.h	PME# from D3 (hot)
19598	PCI_PM_CAP_PME_D3cold	0x8000	pci.h	PME# from D3 (cold)
19599	PCI_PM_CTRL	4	pci.h	PM control and status register
19600	PCI_PM_CTRL_STATE_MASK	0x0003	pci.h	Current power state (D0 to D3)
19601	PCI_PM_CTRL_PME_ENABLE	0x0100	pci.h	PME pin enable
19602	PCI_PM_CTRL_DATA_SEL_MASK	0x1e00	pci.h	Data select (??)
19603	PCI_PM_CTRL_DATA_SCALE_MASK	0x6000	pci.h	Data scale (??)
19604	PCI_PM_CTRL_PME_STATUS	0x8000	pci.h	PME pin status
19605	PCI_PM_PPB_EXTENSIONS	6	pci.h	PPB support extensions (??)
19606	PCI_PM_PPB_B2_B3	0x40	pci.h	Stop clock when in D3hot (??)
19607	PCI_PM_BPCC_ENABLE	0x80	pci.h	Bus power/clock control enable (??)
19608	PCI_PM_DATA_REGISTER	7	pci.h	(??)
19609	PCI_PM_SIZEOF	8	pci.h
19610	PCI_AGP_VERSION	2	pci.h	BCD version number
19611	PCI_AGP_RFU	3	pci.h	Rest of capability flags
19612	PCI_AGP_STATUS	4	pci.h	Status register
19613	PCI_AGP_STATUS_RQ_MASK	0xff000000	pci.h	Maximum number of requests - 1
19614	PCI_AGP_STATUS_SBA	0x0200	pci.h	Sideband addressing supported
19615	PCI_AGP_STATUS_64BIT	0x0020	pci.h	64-bit addressing supported
19616	PCI_AGP_STATUS_FW	0x0010	pci.h	FW transfers supported
19617	PCI_AGP_STATUS_RATE4	0x0004	pci.h	4x transfer rate supported
19618	PCI_AGP_STATUS_RATE2	0x0002	pci.h	2x transfer rate supported
19619	PCI_AGP_STATUS_RATE1	0x0001	pci.h	1x transfer rate supported
19620	PCI_AGP_COMMAND	8	pci.h	Control register
19621	PCI_AGP_COMMAND_RQ_MASK	0xff000000	pci.h	Master: Maximum number of requests
19622	PCI_AGP_COMMAND_SBA	0x0200	pci.h	Sideband addressing enabled
19623	PCI_AGP_COMMAND_AGP	0x0100	pci.h	Allow processing of AGP transactions
19624	PCI_AGP_COMMAND_64BIT	0x0020	pci.h	Allow processing of 64-bit addresses
19625	PCI_AGP_COMMAND_FW	0x0010	pci.h	Force FW transfers
19626	PCI_AGP_COMMAND_RATE4	0x0004	pci.h	Use 4x rate
19627	PCI_AGP_COMMAND_RATE2	0x0002	pci.h	Use 2x rate
19628	PCI_AGP_COMMAND_RATE1	0x0001	pci.h	Use 1x rate
19629	PCI_AGP_SIZEOF	12	pci.h
19630	PCI_SID_ESR	2	pci.h	Expansion Slot Register
19631	PCI_SID_ESR_NSLOTS	0x1f	pci.h	Number of expansion slots available
19632	PCI_SID_ESR_FIC	0x20	pci.h	First In Chassis Flag
19633	PCI_SID_CHASSIS_NR	3	pci.h	Chassis Number
19634	PCI_MSI_FLAGS	2	pci.h	Various flags
19635	PCI_MSI_FLAGS_64BIT	0x80	pci.h	64-bit addresses allowed
19636	PCI_MSI_FLAGS_QSIZE	0x70	pci.h	Message queue size configured
19637	PCI_MSI_FLAGS_QMASK	0x0e	pci.h	Maximum queue size available
19638	PCI_MSI_FLAGS_ENABLE	0x01	pci.h	MSI feature enabled
19639	PCI_MSI_RFU	3	pci.h	Rest of capability flags
19640	PCI_MSI_ADDRESS_LO	4	pci.h	Lower 32 bits
19641	PCI_MSI_ADDRESS_HI	8	pci.h	Upper 32 bits (if PCI_MSI_FLAGS_64BIT set)
19642	PCI_MSI_DATA_32	8	pci.h	16 bits of data for 32-bit devices
19643	PCI_MSI_DATA_64	12	pci.h	16 bits of data for 64-bit devices
19644	PCI_ERR_UNCOR_STATUS	4	pci.h	Uncorrectable Error Status
19645	PCI_ERR_UNC_TRAIN	0x00000001	pci.h	Training
19646	PCI_ERR_UNC_DLP	0x00000010	pci.h	Data Link Protocol
19647	PCI_ERR_UNC_POISON_TLP	0x00001000	pci.h	Poisoned TLP
19648	PCI_ERR_UNC_FCP	0x00002000	pci.h	Flow Control Protocol
19649	PCI_ERR_UNC_COMP_TIME	0x00004000	pci.h	Completion Timeout
19650	PCI_ERR_UNC_COMP_ABORT	0x00008000	pci.h	Completer Abort
19651	PCI_ERR_UNC_UNX_COMP	0x00010000	pci.h	Unexpected Completion
19652	PCI_ERR_UNC_RX_OVER	0x00020000	pci.h	Receiver Overflow
19653	PCI_ERR_UNC_MALF_TLP	0x00040000	pci.h	Malformed TLP
19654	PCI_ERR_UNC_ECRC	0x00080000	pci.h	ECRC Error Status
19655	PCI_ERR_UNC_UNSUP	0x00100000	pci.h	Unsupported Request
19656	PCI_ERR_UNCOR_MASK	8	pci.h	Uncorrectable Error Mask
19657	PCI_ERR_UNCOR_SEVER	12	pci.h	Uncorrectable Error Severity
19658	PCI_ERR_COR_STATUS	16	pci.h	Correctable Error Status
19659	PCI_ERR_COR_RCVR	0x00000001	pci.h	Receiver Error Status
19660	PCI_ERR_COR_BAD_TLP	0x00000040	pci.h	Bad TLP Status
19661	PCI_ERR_COR_BAD_DLLP	0x00000080	pci.h	Bad DLLP Status
19662	PCI_ERR_COR_REP_ROLL	0x00000100	pci.h	REPLAY_NUM Rollover
19663	PCI_ERR_COR_REP_TIMER	0x00001000	pci.h	Replay Timer Timeout
19664	PCI_ERR_COR_MASK	20	pci.h	Correctable Error Mask
19665	PCI_ANY_ID	0xffff	pci.h
19666	PCI_DRIVERS	__table ( struct pci_driver, "pci_drivers" )	pci.h
19667	__pci_driver	__table_entry ( PCI_DRIVERS, 01 )	pci.h
19668	PCI_CONFIG_BACKUP_EXCLUDE_END	0xff	pcibackup.h
19669	PCI_CLASS_NOT_DEFINED	0x0000	pci_ids.h
19670	PCI_CLASS_NOT_DEFINED_VGA	0x0001	pci_ids.h
19671	PCI_BASE_CLASS_STORAGE	0x01	pci_ids.h
19672	PCI_CLASS_STORAGE_SCSI	0x0100	pci_ids.h
19673	PCI_CLASS_STORAGE_IDE	0x0101	pci_ids.h
19674	PCI_CLASS_STORAGE_FLOPPY	0x0102	pci_ids.h
19675	PCI_CLASS_STORAGE_IPI	0x0103	pci_ids.h
19676	PCI_CLASS_STORAGE_RAID	0x0104	pci_ids.h
19677	PCI_CLASS_STORAGE_OTHER	0x0180	pci_ids.h
19678	PCI_BASE_CLASS_NETWORK	0x02	pci_ids.h
19679	PCI_CLASS_NETWORK_ETHERNET	0x0200	pci_ids.h
19680	PCI_CLASS_NETWORK_TOKEN_RING	0x0201	pci_ids.h
19681	PCI_CLASS_NETWORK_FDDI	0x0202	pci_ids.h
19682	PCI_CLASS_NETWORK_ATM	0x0203	pci_ids.h
19683	PCI_CLASS_NETWORK_OTHER	0x0280	pci_ids.h
19684	PCI_BASE_CLASS_DISPLAY	0x03	pci_ids.h
19685	PCI_CLASS_DISPLAY_VGA	0x0300	pci_ids.h
19686	PCI_CLASS_DISPLAY_XGA	0x0301	pci_ids.h
19687	PCI_CLASS_DISPLAY_3D	0x0302	pci_ids.h
19688	PCI_CLASS_DISPLAY_OTHER	0x0380	pci_ids.h
19689	PCI_BASE_CLASS_MULTIMEDIA	0x04	pci_ids.h
19690	PCI_CLASS_MULTIMEDIA_VIDEO	0x0400	pci_ids.h
19691	PCI_CLASS_MULTIMEDIA_AUDIO	0x0401	pci_ids.h
19692	PCI_CLASS_MULTIMEDIA_PHONE	0x0402	pci_ids.h
19693	PCI_CLASS_MULTIMEDIA_OTHER	0x0480	pci_ids.h
19694	PCI_BASE_CLASS_MEMORY	0x05	pci_ids.h
19695	PCI_CLASS_MEMORY_RAM	0x0500	pci_ids.h
19696	PCI_CLASS_MEMORY_FLASH	0x0501	pci_ids.h
19697	PCI_CLASS_MEMORY_OTHER	0x0580	pci_ids.h
19698	PCI_BASE_CLASS_BRIDGE	0x06	pci_ids.h
19699	PCI_CLASS_BRIDGE_HOST	0x0600	pci_ids.h
19700	PCI_CLASS_BRIDGE_ISA	0x0601	pci_ids.h
19701	PCI_CLASS_BRIDGE_EISA	0x0602	pci_ids.h
19702	PCI_CLASS_BRIDGE_MC	0x0603	pci_ids.h
19703	PCI_CLASS_BRIDGE_PCI	0x0604	pci_ids.h
19704	PCI_CLASS_BRIDGE_PCMCIA	0x0605	pci_ids.h
19705	PCI_CLASS_BRIDGE_NUBUS	0x0606	pci_ids.h
19706	PCI_CLASS_BRIDGE_CARDBUS	0x0607	pci_ids.h
19707	PCI_CLASS_BRIDGE_RACEWAY	0x0608	pci_ids.h
19708	PCI_CLASS_BRIDGE_OTHER	0x0680	pci_ids.h
19709	PCI_BASE_CLASS_COMMUNICATION	0x07	pci_ids.h
19710	PCI_CLASS_COMMUNICATION_SERIAL	0x0700	pci_ids.h
19711	PCI_CLASS_COMMUNICATION_PARALLE	0x0701	pci_ids.h
19712	PCI_CLASS_COMMUNICATION_MULTISE	0x0702	pci_ids.h
19713	PCI_CLASS_COMMUNICATION_MODEM	0x0703	pci_ids.h
19714	PCI_CLASS_COMMUNICATION_OTHER	0x0780	pci_ids.h
19715	PCI_BASE_CLASS_SYSTEM	0x08	pci_ids.h
19716	PCI_CLASS_SYSTEM_PIC	0x0800	pci_ids.h
19717	PCI_CLASS_SYSTEM_DMA	0x0801	pci_ids.h
19718	PCI_CLASS_SYSTEM_TIMER	0x0802	pci_ids.h
19719	PCI_CLASS_SYSTEM_RTC	0x0803	pci_ids.h
19720	PCI_CLASS_SYSTEM_PCI_HOTPLUG	0x0804	pci_ids.h
19721	PCI_CLASS_SYSTEM_OTHER	0x0880	pci_ids.h
19722	PCI_BASE_CLASS_INPUT	0x09	pci_ids.h
19723	PCI_CLASS_INPUT_KEYBOARD	0x0900	pci_ids.h
19724	PCI_CLASS_INPUT_PEN	0x0901	pci_ids.h
19725	PCI_CLASS_INPUT_MOUSE	0x0902	pci_ids.h
19726	PCI_CLASS_INPUT_SCANNER	0x0903	pci_ids.h
19727	PCI_CLASS_INPUT_GAMEPORT	0x0904	pci_ids.h
19728	PCI_CLASS_INPUT_OTHER	0x0980	pci_ids.h
19729	PCI_BASE_CLASS_DOCKING	0x0a	pci_ids.h
19730	PCI_CLASS_DOCKING_GENERIC	0x0a00	pci_ids.h
19731	PCI_CLASS_DOCKING_OTHER	0x0a80	pci_ids.h
19732	PCI_BASE_CLASS_PROCESSOR	0x0b	pci_ids.h
19733	PCI_CLASS_PROCESSOR_386	0x0b00	pci_ids.h
19734	PCI_CLASS_PROCESSOR_486	0x0b01	pci_ids.h
19735	PCI_CLASS_PROCESSOR_PENTIUM	0x0b02	pci_ids.h
19736	PCI_CLASS_PROCESSOR_ALPHA	0x0b10	pci_ids.h
19737	PCI_CLASS_PROCESSOR_POWERPC	0x0b20	pci_ids.h
19738	PCI_CLASS_PROCESSOR_MIPS	0x0b30	pci_ids.h
19739	PCI_CLASS_PROCESSOR_CO	0x0b40	pci_ids.h
19740	PCI_BASE_CLASS_SERIAL	0x0c	pci_ids.h
19741	PCI_CLASS_SERIAL_FIREWIRE	0x0c00	pci_ids.h
19742	PCI_CLASS_SERIAL_ACCESS	0x0c01	pci_ids.h
19743	PCI_CLASS_SERIAL_SSA	0x0c02	pci_ids.h
19744	PCI_CLASS_SERIAL_USB	0x0c03	pci_ids.h
19745	PCI_CLASS_SERIAL_FIBER	0x0c04	pci_ids.h
19746	PCI_CLASS_SERIAL_SMBUS	0x0c05	pci_ids.h
19747	PCI_BASE_CLASS_INTELLIGENT	0x0e	pci_ids.h
19748	PCI_CLASS_INTELLIGENT_I2O	0x0e00	pci_ids.h
19749	PCI_BASE_CLASS_SATELLITE	0x0f	pci_ids.h
19750	PCI_CLASS_SATELLITE_TV	0x0f00	pci_ids.h
19751	PCI_CLASS_SATELLITE_AUDIO	0x0f01	pci_ids.h
19752	PCI_CLASS_SATELLITE_VOICE	0x0f03	pci_ids.h
19753	PCI_CLASS_SATELLITE_DATA	0x0f04	pci_ids.h
19754	PCI_BASE_CLASS_CRYPT	0x10	pci_ids.h
19755	PCI_CLASS_CRYPT_NETWORK	0x1000	pci_ids.h
19756	PCI_CLASS_CRYPT_ENTERTAINMENT	0x1001	pci_ids.h
19757	PCI_CLASS_CRYPT_OTHER	0x1080	pci_ids.h
19758	PCI_BASE_CLASS_SIGNAL_PROCESSIN	0x11	pci_ids.h
19759	PCI_CLASS_SP_DPIO	0x1100	pci_ids.h
19760	PCI_CLASS_SP_OTHER	0x1180	pci_ids.h
19761	PCI_CLASS_OTHERS	0xff	pci_ids.h
19762	PCI_VENDOR_ID_DYNALINK	0x0675	pci_ids.h
19763	PCI_VENDOR_ID_BERKOM	0x0871	pci_ids.h
19764	PCI_VENDOR_ID_COMPAQ	0x0e11	pci_ids.h
19765	PCI_VENDOR_ID_NCR	0x1000	pci_ids.h
19766	PCI_VENDOR_ID_LSI_LOGIC	0x1000	pci_ids.h
19767	PCI_VENDOR_ID_ATI	0x1002	pci_ids.h
19768	PCI_VENDOR_ID_VLSI	0x1004	pci_ids.h
19769	PCI_VENDOR_ID_ADL	0x1005	pci_ids.h
19770	PCI_VENDOR_ID_NS	0x100b	pci_ids.h
19771	PCI_VENDOR_ID_TSENG	0x100c	pci_ids.h
19772	PCI_VENDOR_ID_WEITEK	0x100e	pci_ids.h
19773	PCI_VENDOR_ID_DEC	0x1011	pci_ids.h
19774	PCI_VENDOR_ID_CIRRUS	0x1013	pci_ids.h
19775	PCI_VENDOR_ID_IBM	0x1014	pci_ids.h
19776	PCI_VENDOR_ID_COMPEX2	0x101a	pci_ids.h
19777	PCI_VENDOR_ID_WD	0x101c	pci_ids.h
19778	PCI_VENDOR_ID_AMI	0x101e	pci_ids.h
19779	PCI_VENDOR_ID_AMD	0x1022	pci_ids.h
19780	PCI_VENDOR_ID_TRIDENT	0x1023	pci_ids.h
19781	PCI_VENDOR_ID_AI	0x1025	pci_ids.h
19782	PCI_VENDOR_ID_DELL	0x1028	pci_ids.h
19783	PCI_VENDOR_ID_MATROX	0x102B	pci_ids.h
19784	PCI_VENDOR_ID_CT	0x102c	pci_ids.h
19785	PCI_VENDOR_ID_MIRO	0x1031	pci_ids.h
19786	PCI_VENDOR_ID_NEC	0x1033	pci_ids.h
19787	PCI_VENDOR_ID_FD	0x1036	pci_ids.h
19788	PCI_VENDOR_ID_SIS	0x1039	pci_ids.h
19789	PCI_VENDOR_ID_SI	0x1039	pci_ids.h
19790	PCI_VENDOR_ID_HP	0x103c	pci_ids.h
19791	PCI_VENDOR_ID_PCTECH	0x1042	pci_ids.h
19792	PCI_VENDOR_ID_ASUSTEK	0x1043	pci_ids.h
19793	PCI_VENDOR_ID_DPT	0x1044	pci_ids.h
19794	PCI_VENDOR_ID_OPTI	0x1045	pci_ids.h
19795	PCI_VENDOR_ID_ELSA	0x1048	pci_ids.h
19796	PCI_VENDOR_ID_ELSA	0x1048	pci_ids.h
19797	PCI_VENDOR_ID_SGS	0x104a	pci_ids.h
19798	PCI_VENDOR_ID_BUSLOGIC	0x104B	pci_ids.h
19799	PCI_VENDOR_ID_TI	0x104c	pci_ids.h
19800	PCI_VENDOR_ID_SONY	0x104d	pci_ids.h
19801	PCI_VENDOR_ID_OAK	0x104e	pci_ids.h
19802	PCI_VENDOR_ID_WINBOND2	0x1050	pci_ids.h
19803	PCI_VENDOR_ID_ANIGMA	0x1051	pci_ids.h
19804	PCI_VENDOR_ID_EFAR	0x1055	pci_ids.h
19805	PCI_VENDOR_ID_MOTOROLA	0x1057	pci_ids.h
19806	PCI_VENDOR_ID_MOTOROLA_OOPS	0x1507	pci_ids.h
19807	PCI_VENDOR_ID_PROMISE	0x105a	pci_ids.h
19808	PCI_VENDOR_ID_N9	0x105d	pci_ids.h
19809	PCI_VENDOR_ID_UMC	0x1060	pci_ids.h
19810	PCI_VENDOR_ID_X	0x1061	pci_ids.h
19811	PCI_VENDOR_ID_MYLEX	0x1069	pci_ids.h
19812	PCI_VENDOR_ID_PICOP	0x1066	pci_ids.h
19813	PCI_VENDOR_ID_APPLE	0x106b	pci_ids.h
19814	PCI_VENDOR_ID_YAMAHA	0x1073	pci_ids.h
19815	PCI_VENDOR_ID_NEXGEN	0x1074	pci_ids.h
19816	PCI_VENDOR_ID_QLOGIC	0x1077	pci_ids.h
19817	PCI_VENDOR_ID_CYRIX	0x1078	pci_ids.h
19818	PCI_VENDOR_ID_LEADTEK	0x107d	pci_ids.h
19819	PCI_VENDOR_ID_INTERPHASE	0x107e	pci_ids.h
19820	PCI_VENDOR_ID_CONTAQ	0x1080	pci_ids.h
19821	PCI_VENDOR_ID_FOREX	0x1083	pci_ids.h
19822	PCI_VENDOR_ID_OLICOM	0x108d	pci_ids.h
19823	PCI_VENDOR_ID_SUN	0x108e	pci_ids.h
19824	PCI_VENDOR_ID_CMD	0x1095	pci_ids.h
19825	PCI_VENDOR_ID_VISION	0x1098	pci_ids.h
19826	PCI_VENDOR_ID_BROOKTREE	0x109e	pci_ids.h
19827	PCI_VENDOR_ID_SIERRA	0x10a8	pci_ids.h
19828	PCI_VENDOR_ID_SGI	0x10a9	pci_ids.h
19829	PCI_VENDOR_ID_ACC	0x10aa	pci_ids.h
19830	PCI_VENDOR_ID_WINBOND	0x10ad	pci_ids.h
19831	PCI_VENDOR_ID_DATABOOK	0x10b3	pci_ids.h
19832	PCI_VENDOR_ID_PLX	0x10b5	pci_ids.h
19833	PCI_VENDOR_ID_MADGE	0x10b6	pci_ids.h
19834	PCI_VENDOR_ID_3COM	0x10b7	pci_ids.h
19835	PCI_VENDOR_ID_SMC	0x10b8	pci_ids.h
19836	PCI_VENDOR_ID_SUNDANCE	0x13F0	pci_ids.h
19837	PCI_VENDOR_ID_AL	0x10b9	pci_ids.h
19838	PCI_VENDOR_ID_MITSUBISHI	0x10ba	pci_ids.h
19839	PCI_VENDOR_ID_SURECOM	0x10bd	pci_ids.h
19840	PCI_VENDOR_ID_NEOMAGIC	0x10c8	pci_ids.h
19841	PCI_VENDOR_ID_ASP	0x10cd	pci_ids.h
19842	PCI_VENDOR_ID_MACRONIX	0x10d9	pci_ids.h
19843	PCI_VENDOR_ID_TCONRAD	0x10da	pci_ids.h
19844	PCI_VENDOR_ID_CERN	0x10dc	pci_ids.h
19845	PCI_VENDOR_ID_NVIDIA	0x10de	pci_ids.h
19846	PCI_VENDOR_ID_IMS	0x10e0	pci_ids.h
19847	PCI_VENDOR_ID_TEKRAM2	0x10e1	pci_ids.h
19848	PCI_VENDOR_ID_TUNDRA	0x10e3	pci_ids.h
19849	PCI_VENDOR_ID_AMCC	0x10e8	pci_ids.h
19850	PCI_VENDOR_ID_INTERG	0x10ea	pci_ids.h
19851	PCI_VENDOR_ID_REALTEK	0x10ec	pci_ids.h
19852	PCI_VENDOR_ID_XILINX	0x10ee	pci_ids.h
19853	PCI_VENDOR_ID_TRUEVISION	0x10fa	pci_ids.h
19854	PCI_VENDOR_ID_INIT	0x1101	pci_ids.h
19855	PCI_VENDOR_ID_CREATIVE	0x1102	pci_ids.h
19856	PCI_VENDOR_ID_ECTIVA	0x1102	pci_ids.h
19857	PCI_VENDOR_ID_TTI	0x1103	pci_ids.h
19858	PCI_VENDOR_ID_VIA	0x1106	pci_ids.h
19859	PCI_VENDOR_ID_VIATEC	0x1106	pci_ids.h
19860	PCI_VENDOR_ID_SIEMENS	0x110A	pci_ids.h
19861	PCI_VENDOR_ID_SMC2	0x1113	pci_ids.h
19862	PCI_VENDOR_ID_VORTEX	0x1119	pci_ids.h
19863	PCI_VENDOR_ID_EF	0x111a	pci_ids.h
19864	PCI_VENDOR_ID_IDT	0x111d	pci_ids.h
19865	PCI_VENDOR_ID_FORE	0x1127	pci_ids.h
19866	PCI_VENDOR_ID_IMAGINGTECH	0x112f	pci_ids.h
19867	PCI_VENDOR_ID_PHILIPS	0x1131	pci_ids.h
19868	PCI_VENDOR_ID_EICON	0x1133	pci_ids.h
19869	PCI_VENDOR_ID_CYCLONE	0x113c	pci_ids.h
19870	PCI_VENDOR_ID_ALLIANCE	0x1142	pci_ids.h
19871	PCI_VENDOR_ID_SYSKONNECT	0x1148	pci_ids.h
19872	PCI_VENDOR_ID_VMIC	0x114a	pci_ids.h
19873	PCI_VENDOR_ID_DIGI	0x114f	pci_ids.h
19874	PCI_VENDOR_ID_MUTECH	0x1159	pci_ids.h
19875	PCI_VENDOR_ID_XIRCOM	0x115d	pci_ids.h
19876	PCI_VENDOR_ID_RENDITION	0x1163	pci_ids.h
19877	PCI_VENDOR_ID_SERVERWORKS	0x1166	pci_ids.h
19878	PCI_VENDOR_ID_SBE	0x1176	pci_ids.h
19879	PCI_VENDOR_ID_TOSHIBA	0x1179	pci_ids.h
19880	PCI_VENDOR_ID_RICOH	0x1180	pci_ids.h
19881	PCI_VENDOR_ID_DLINK	0x1186	pci_ids.h
19882	PCI_VENDOR_ID_ARTOP	0x1191	pci_ids.h
19883	PCI_VENDOR_ID_ZEITNET	0x1193	pci_ids.h
19884	PCI_VENDOR_ID_OMEGA	0x119b	pci_ids.h
19885	PCI_VENDOR_ID_FUJITSU_ME	0x119e	pci_ids.h
19886	PCI_SUBVENDOR_ID_KEYSPAN	0x11a9	pci_ids.h
19887	PCI_VENDOR_ID_GALILEO	0x11ab	pci_ids.h
19888	PCI_VENDOR_ID_LINKSYS	0x11ad	pci_ids.h
19889	PCI_VENDOR_ID_LITEON	0x11ad	pci_ids.h
19890	PCI_VENDOR_ID_V3	0x11b0	pci_ids.h
19891	PCI_VENDOR_ID_NP	0x11bc	pci_ids.h
19892	PCI_VENDOR_ID_ATT	0x11c1	pci_ids.h
19893	PCI_VENDOR_ID_SPECIALIX	0x11cb	pci_ids.h
19894	PCI_VENDOR_ID_AURAVISION	0x11d1	pci_ids.h
19895	PCI_VENDOR_ID_ANALOG_DEVICES	0x11d4	pci_ids.h
19896	PCI_VENDOR_ID_IKON	0x11d5	pci_ids.h
19897	PCI_VENDOR_ID_ZORAN	0x11de	pci_ids.h
19898	PCI_VENDOR_ID_KINETIC	0x11f4	pci_ids.h
19899	PCI_VENDOR_ID_COMPEX	0x11f6	pci_ids.h
19900	PCI_VENDOR_ID_RP	0x11fe	pci_ids.h
19901	PCI_VENDOR_ID_CYCLADES	0x120e	pci_ids.h
19902	PCI_VENDOR_ID_ESSENTIAL	0x120f	pci_ids.h
19903	PCI_VENDOR_ID_O2	0x1217	pci_ids.h
19904	PCI_VENDOR_ID_3DFX	0x121a	pci_ids.h
19905	PCI_VENDOR_ID_SIGMADES	0x1236	pci_ids.h
19906	PCI_VENDOR_ID_CCUBE	0x123f	pci_ids.h
19907	PCI_VENDOR_ID_AVM	0x1244	pci_ids.h
19908	PCI_VENDOR_ID_DIPIX	0x1246	pci_ids.h
19909	PCI_VENDOR_ID_STALLION	0x124d	pci_ids.h
19910	PCI_VENDOR_ID_OPTIBASE	0x1255	pci_ids.h
19911	PCI_VENDOR_ID_ESS	0x125d	pci_ids.h
19912	PCI_VENDOR_ID_HARRIS	0x1260	pci_ids.h
19913	PCI_VENDOR_ID_SATSAGEM	0x1267	pci_ids.h
19914	PCI_VENDOR_ID_HUGHES	0x1273	pci_ids.h
19915	PCI_VENDOR_ID_ENSONIQ	0x1274	pci_ids.h
19916	PCI_VENDOR_ID_ROCKWELL	0x127A	pci_ids.h
19917	PCI_VENDOR_ID_DAVICOM	0x1282	pci_ids.h
19918	PCI_VENDOR_ID_ITE	0x1283	pci_ids.h
19919	PCI_VENDOR_ID_ESS_OLD	0x1285	pci_ids.h
19920	PCI_VENDOR_ID_ALTEON	0x12ae	pci_ids.h
19921	PCI_VENDOR_ID_USR	0x12B9	pci_ids.h
19922	PCI_VENDOR_ID_HOLTEK	0x12c3	pci_ids.h
19923	PCI_SUBVENDOR_ID_CONNECT_TECH	0x12c4	pci_ids.h
19924	PCI_VENDOR_ID_PICTUREL	0x12c5	pci_ids.h
19925	PCI_VENDOR_ID_NVIDIA_SGS	0x12d2	pci_ids.h
19926	PCI_SUBVENDOR_ID_CHASE_PCIFAST	0x12E0	pci_ids.h
19927	PCI_SUBVENDOR_ID_CHASE_PCIRAS	0x124D	pci_ids.h
19928	PCI_VENDOR_ID_AUREAL	0x12eb	pci_ids.h
19929	PCI_VENDOR_ID_CBOARDS	0x1307	pci_ids.h
19930	PCI_VENDOR_ID_SIIG	0x131f	pci_ids.h
19931	PCI_VENDOR_ID_ADMTEK	0x1317	pci_ids.h
19932	PCI_VENDOR_ID_DOMEX	0x134a	pci_ids.h
19933	PCI_VENDOR_ID_QUATECH	0x135C	pci_ids.h
19934	PCI_VENDOR_ID_SEALEVEL	0x135e	pci_ids.h
19935	PCI_VENDOR_ID_HYPERCOPE	0x1365	pci_ids.h
19936	PCI_VENDOR_ID_KAWASAKI	0x136b	pci_ids.h
19937	PCI_VENDOR_ID_LMC	0x1376	pci_ids.h
19938	PCI_VENDOR_ID_NETGEAR	0x1385	pci_ids.h
19939	PCI_VENDOR_ID_APPLICOM	0x1389	pci_ids.h
19940	PCI_VENDOR_ID_MOXA	0x1393	pci_ids.h
19941	PCI_VENDOR_ID_CCD	0x1397	pci_ids.h
19942	PCI_VENDOR_ID_MICROGATE	0x13c0	pci_ids.h
19943	PCI_VENDOR_ID_3WARE	0x13C1	pci_ids.h
19944	PCI_VENDOR_ID_ABOCOM	0x13D1	pci_ids.h
19945	PCI_VENDOR_ID_CMEDIA	0x13f6	pci_ids.h
19946	PCI_VENDOR_ID_LAVA	0x1407	pci_ids.h
19947	PCI_VENDOR_ID_TIMEDIA	0x1409	pci_ids.h
19948	PCI_VENDOR_ID_OXSEMI	0x1415	pci_ids.h
19949	PCI_VENDOR_ID_AIRONET	0x14b9	pci_ids.h
19950	PCI_VENDOR_ID_MYRICOM	0x14c1	pci_ids.h
19951	PCI_VENDOR_ID_TITAN	0x14D2	pci_ids.h
19952	PCI_VENDOR_ID_PANACOM	0x14d4	pci_ids.h
19953	PCI_VENDOR_ID_BROADCOM	0x14e4	pci_ids.h
19954	PCI_VENDOR_ID_SYBA	0x1592	pci_ids.h
19955	PCI_VENDOR_ID_MORETON	0x15aa	pci_ids.h
19956	PCI_VENDOR_ID_ZOLTRIX	0x15b0	pci_ids.h
19957	PCI_VENDOR_ID_PDC	0x15e9	pci_ids.h
19958	PCI_VENDOR_ID_FSC	0x1734	pci_ids.h
19959	PCI_VENDOR_ID_SYMPHONY	0x1c1c	pci_ids.h
19960	PCI_VENDOR_ID_TEKRAM	0x1de1	pci_ids.h
19961	PCI_VENDOR_ID_3DLABS	0x3d3d	pci_ids.h
19962	PCI_VENDOR_ID_AVANCE	0x4005	pci_ids.h
19963	PCI_VENDOR_ID_AKS	0x416c	pci_ids.h
19964	PCI_VENDOR_ID_NETVIN	0x4a14	pci_ids.h
19965	PCI_VENDOR_ID_S3	0x5333	pci_ids.h
19966	PCI_VENDOR_ID_DCI	0x6666	pci_ids.h
19967	PCI_VENDOR_ID_GENROCO	0x5555	pci_ids.h
19968	PCI_VENDOR_ID_INTEL	0x8086	pci_ids.h
19969	PCI_VENDOR_ID_COMPUTONE	0x8e0e	pci_ids.h
19970	PCI_SUBVENDOR_ID_COMPUTONE	0x8e0e	pci_ids.h
19971	PCI_VENDOR_ID_KTI	0x8e2e	pci_ids.h
19972	PCI_VENDOR_ID_ADAPTEC	0x9004	pci_ids.h
19973	PCI_VENDOR_ID_ADAPTEC2	0x9005	pci_ids.h
19974	PCI_VENDOR_ID_ATRONICS	0x907f	pci_ids.h
19975	PCI_VENDOR_ID_HOLTEK2	0x9412	pci_ids.h
19976	PCI_VENDOR_ID_NETMOS	0x9710	pci_ids.h
19977	PCI_SUBVENDOR_ID_EXSYS	0xd84d	pci_ids.h
19978	PCI_VENDOR_ID_TIGERJET	0xe159	pci_ids.h
19979	PCI_VENDOR_ID_ARK	0xedd8	pci_ids.h
19980	POSIX_FD_MIN	( 1 )	posix_io.h
19981	POSIX_FD_MAX	( 31 )	posix_io.h
19982	RESOLV_NUMERIC	01	resolv.h
19983	RESOLV_NORMAL	02	resolv.h
19984	RESOLVERS	__table ( struct resolver, "resolvers" )	resolv.h
19985	DEFAULT_MIN_TIMEOUT	( TICKS_PER_SEC / 4 )	retry.h
19986	DEFAULT_MAX_TIMEOUT	( 10 * TICKS_PER_SEC )	retry.h
19987	SANBOOT_PROTOCOLS	__table ( struct sanboot_protocol, "sanboot_protocols" )	sanboot.h
19988	__sanboot_protocol	__table_entry ( SANBOOT_PROTOCOLS, 01 )	sanboot.h
19989	SCSI_OPCODE_READ_10	0x28	scsi.h	*< READ (10)
19990	SCSI_OPCODE_READ_16	0x88	scsi.h	*< READ (16)
19991	SCSI_OPCODE_WRITE_10	0x2a	scsi.h	*< WRITE (10)
19992	SCSI_OPCODE_WRITE_16	0x8a	scsi.h	*< WRITE (16)
19993	SCSI_OPCODE_READ_CAPACITY_10	0x25	scsi.h	*< READ CAPACITY (10)
19994	SCSI_OPCODE_SERVICE_ACTION_IN	0x9e	scsi.h	*< SERVICE ACTION IN
19995	SCSI_SERVICE_ACTION_READ_CAPACI	0x10	scsi.h	*< READ CAPACITY (16)
19996	SCSI_FL_FUA_NV	0x02	scsi.h	*< Force unit access to NVS
19997	SCSI_FL_FUA	0x08	scsi.h	*< Force unit access
19998	SCSI_FL_DPO	0x10	scsi.h	*< Disable cache page out
19999	SCSI_CDB_FORMAT	"%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:" \ "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x"	scsi.h
20000	SETTINGS	__table ( struct setting, "settings" )	settings.h
20001	__setting	__table_entry ( SETTINGS, 01 )	settings.h
20002	SETTING_TYPES	__table ( struct setting_type, "setting_types" )	settings.h
20003	__setting_type	__table_entry ( SETTING_TYPES, 01 )	settings.h
20004	SETTINGS_APPLICATORS	__table ( struct settings_applicator, "settings_applicators" )	settings.h
20005	__settings_applicator	__table_entry ( SETTINGS_APPLICATORS, 01 )	settings.h
20006	SHA1_CTX_SIZE	sizeof ( SHA1_CTX )	sha1.h
20007	SHA1_DIGEST_SIZE	SHA1_SIZE	sha1.h
20008	SMBIOS_SIGNATURE	( ( '_' << 0 ) + ( 'S' << 8 ) + ( 'M' << 16 ) + ( '_' << 24 ) )	smbios.h
20009	SMBIOS_TYPE_SYSTEM_INFORMATION	1	smbios.h
20010	SMBIOS_TYPE_ENCLOSURE_INFORMATI	3	smbios.h
20011	TCP_SOCK_STREAM	0x1	socket.h
20012	SOCK_STREAM	tcp_sock_stream	socket.h
20013	UDP_SOCK_DGRAM	0x2	socket.h
20014	SOCK_DGRAM	udp_sock_dgram	socket.h
20015	AF_INET	1	socket.h	*< IPv4 Internet addresses
20016	AF_INET6	2	socket.h	*< IPv6 Internet addresses
20017	SA_LEN	32	socket.h
20018	SPI_WRSR	0x01	spi.h
20019	SPI_WRITE	0x02	spi.h
20020	SPI_READ	0x03	spi.h
20021	SPI_WRDI	0x04	spi.h
20022	SPI_RDSR	0x05	spi.h
20023	SPI_WREN	0x06	spi.h
20024	ATMEL_SECTOR_ERASE	0x52	spi.h
20025	ATMEL_CHIP_ERASE	0x62	spi.h
20026	ATMEL_RDID	0x15	spi.h
20027	SPI_STATUS_WPEN	0x80	spi.h
20028	SPI_STATUS_BP2	0x10	spi.h
20029	SPI_STATUS_BP1	0x08	spi.h
20030	SPI_STATUS_BP0	0x04	spi.h
20031	SPI_STATUS_WEN	0x02	spi.h
20032	SPI_STATUS_NRDY	0x01	spi.h
20033	SPI_AUTODETECT_ADDRESS_LEN	0	spi.h
20034	SPI_MODE_CPHA	0x01	spi.h
20035	SPI_MODE_CPOL	0x02	spi.h
20036	SPI_MODE_SSPOL	0x10	spi.h
20037	SPI_MODE_MICROWIRE	1	spi.h
20038	SPI_MODE_MICROWIRE_PLUS	0	spi.h
20039	SPI_MODE_THREEWIRE	( SPI_MODE_MICROWIRE_PLUS \| SPI_MODE_SSPOL )	spi.h
20040	SPI_BIT_UDELAY	1	spi_bit.h
20041	SPI_BIT_BIG_ENDIAN	0	spi_bit.h
20042	SPI_BIT_LITTLE_ENDIAN	1	spi_bit.h
20043	SRP_LOGIN_REQ	0x00	srp.h
20044	SRP_LOGIN_REQ_FMT_IDBD	0x04	srp.h
20045	SRP_LOGIN_REQ_FMT_DDBD	0x02	srp.h
20046	SRP_LOGIN_REQ_FLAG_AESOLNT	0x40	srp.h
20047	SRP_LOGIN_REQ_FLAG_CRSOLNT	0x20	srp.h
20048	SRP_LOGIN_REQ_FLAG_LOSOLNT	0x10	srp.h
20049	SRP_LOGIN_REQ_MCA_MASK	0x03	srp.h
20050	SRP_LOGIN_REQ_MCA_SINGLE_CHANNE	0x00	srp.h
20051	SRP_LOGIN_REQ_MCA_MULTIPLE_CHAN	0x01	srp.h
20052	SRP_LOGIN_RSP	0xc0	srp.h
20053	SRP_LOGIN_RSP_FMT_IDBD	0x04	srp.h
20054	SRP_LOGIN_RSP_FMT_DDBD	0x02	srp.h
20055	SRP_LOGIN_RSP_FLAG_SOLNTSUP	0x10	srp.h
20056	SRP_LOGIN_RSP_MCR_MASK	0x03	srp.h
20057	SRP_LOGIN_RSP_MCR_NO_EXISTING_C	0x00	srp.h
20058	SRP_LOGIN_RSP_MCR_EXISTING_CHAN	0x01	srp.h
20059	SRP_LOGIN_RSP_MCR_EXISTING_CHAN	0x02	srp.h
20060	SRP_LOGIN_REJ	0xc2	srp.h
20061	SRP_LOGIN_REJ_REASON_UNKNOWN	0x00010000UL	srp.h
20062	SRP_LOGIN_REJ_REASON_INSUFFICIE	0x00010001UL	srp.h
20063	SRP_LOGIN_REJ_REASON_BAD_MAX_I_	0x00010002UL	srp.h
20064	SRP_LOGIN_REJ_REASON_CANNOT_ASS	0x00010003UL	srp.h
20065	SRP_LOGIN_REJ_REASON_UNSUPPORTE	0x00010004UL	srp.h
20066	SRP_LOGIN_REJ_REASON_NO_MULTIPL	0x00010005UL	srp.h
20067	SRP_LOGIN_REJ_REASON_NO_MORE_CH	0x00010006UL	srp.h
20068	SRP_LOGIN_REJ_FMT_IDBD	0x04	srp.h
20069	SRP_LOGIN_REJ_FMT_DDBD	0x02	srp.h
20070	SRP_I_LOGOUT	0x03	srp.h
20071	SRP_T_LOGOUT	0x80	srp.h
20072	SRP_T_LOGOUT_FLAG_SOLNT	0x01	srp.h
20073	SRP_T_LOGOUT_REASON_UNKNOWN	0x00000000UL	srp.h
20074	SRP_T_LOGOUT_REASON_INACTIVE	0x00000001UL	srp.h
20075	SRP_T_LOGOUT_REASON_INVALID_TYP	0x00000002UL	srp.h
20076	SRP_T_LOGOUT_REASON_SPURIOUS_RE	0x00000003UL	srp.h
20077	SRP_T_LOGOUT_REASON_MCA	0x00000004UL	srp.h
20078	SRP_T_LOGOUT_UNSUPPORTED_DATA_O	0x00000005UL	srp.h
20079	SRP_T_LOGOUT_UNSUPPORTED_DATA_I	0x00000006UL	srp.h
20080	SRP_T_LOGOUT_INVALID_IU_LEN	0x00000008UL	srp.h
20081	SRP_TSK_MGMT	0x01	srp.h
20082	SRP_TSK_MGMT_FLAG_UCSOLNT	0x04	srp.h
20083	SRP_TSK_MGMT_FLAG_SCSOLNT	0x02	srp.h
20084	SRP_TSK_MGMT_FUNC_ABORT_TASK	0x01	srp.h
20085	SRP_TSK_MGMT_FUNC_ABORT_TASK_SE	0x02	srp.h
20086	SRP_TSK_MGMT_FUNC_CLEAR_TASK_SE	0x04	srp.h
20087	SRP_TSK_MGMT_FUNC_LOGICAL_UNIT_	0x08	srp.h
20088	SRP_TSK_MGMT_FUNC_CLEAR_ACA	0x40	srp.h
20089	SRP_CMD	0x02	srp.h
20090	SRP_CMD_FLAG_UCSOLNT	0x04	srp.h
20091	SRP_CMD_FLAG_SCSOLNT	0x02	srp.h
20092	SRP_CMD_DO_FMT_MASK	0xf0	srp.h
20093	SRP_CMD_DO_FMT_DIRECT	0x10	srp.h
20094	SRP_CMD_DO_FMT_INDIRECT	0x20	srp.h
20095	SRP_CMD_DI_FMT_MASK	0x0f	srp.h
20096	SRP_CMD_DI_FMT_DIRECT	0x01	srp.h
20097	SRP_CMD_DI_FMT_INDIRECT	0x02	srp.h
20098	SRP_CMD_TASK_ATTR_SIMPLE	0x00	srp.h
20099	SRP_CMD_TASK_ATTR_QUEUE_HEAD	0x01	srp.h
20100	SRP_CMD_TASK_ATTR_ORDERED	0x02	srp.h
20101	SRP_CMD_TASK_ATTR_AUTOMATIC_CON	0x08	srp.h
20102	SRP_RSP	0xc1	srp.h
20103	SRP_RSP_FLAG_SOLNT	0x01	srp.h
20104	SRP_RSP_VALID_DIUNDER	0x20	srp.h
20105	SRP_RSP_VALID_DIOVER	0x10	srp.h
20106	SRP_RSP_VALID_DOUNDER	0x08	srp.h
20107	SRP_RSP_VALID_DOOVER	0x04	srp.h
20108	SRP_RSP_VALID_SNSVALID	0x02	srp.h
20109	SRP_RSP_VALID_RSPVALID	0x01	srp.h
20110	SRP_CRED_REQ	0x81	srp.h
20111	SRP_CRED_REQ_FLAG_SOLNT	0x01	srp.h
20112	SRP_CRED_RSP	0x41	srp.h
20113	SRP_AER_REQ	0x82	srp.h
20114	SRP_AER_REQ_FLAG_SOLNT	0x01	srp.h
20115	SRP_AER_RSP	0x42	srp.h
20116	SRP_MAX_I_T_IU_LEN	80	srp.h
20117	SRP_MAX_RETRIES	3	srp.h
20118	ICC_ALIGN_HACK_FACTOR	128	tables.h
20119	TCP_OPTION_END	0	tcp.h
20120	TCP_OPTION_NOP	1	tcp.h
20121	TCP_OPTION_MSS	2	tcp.h
20122	TCP_OPTION_TS	8	tcp.h
20123	TCP_CWR	0x80	tcp.h
20124	TCP_ECE	0x40	tcp.h
20125	TCP_URG	0x20	tcp.h
20126	TCP_ACK	0x10	tcp.h
20127	TCP_PSH	0x08	tcp.h
20128	TCP_RST	0x04	tcp.h
20129	TCP_SYN	0x02	tcp.h
20130	TCP_FIN	0x01	tcp.h
20131	TCP_CLOSED	TCP_RST	tcp.h
20132	TCP_LISTEN	0	tcp.h
20133	TCP_SYN_SENT	( TCP_STATE_SENT ( TCP_SYN ) )	tcp.h
20134	TCP_SYN_RCVD	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
20135	TCP_ESTABLISHED	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
20136	TCP_FIN_WAIT_1	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
20137	TCP_FIN_WAIT_2	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN \| TCP_FIN ) \| \ TCP_STATE_RCVD ( TCP_SYN )	tcp.h
20138	TCP_CLOSING_OR_LAST_ACK	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN \| TCP_FI	tcp.h
20139	TCP_TIME_WAIT	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN \| TCP_FIN ) \| \ TCP_STATE_RCVD ( TCP_SYN \|	tcp.h
20140	TCP_CLOSE_WAIT	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN \| TCP_FIN ) )	tcp.h
20141	TCP_MASK_HLEN	0xf0	tcp.h
20142	TCP_MIN_PORT	1	tcp.h
20143	MAX_HDR_LEN	100	tcp.h
20144	MAX_IOB_LEN	1500	tcp.h
20145	MIN_IOB_LEN	MAX_HDR_LEN + 100	tcp.h	To account for padding by LL
20146	TCP_MAX_WINDOW_SIZE	( 65536 - 4 )	tcp.h
20147	TCP_PATH_MTU	1460	tcp.h
20148	TCP_MSS	1460	tcp.h
20149	TCP_MSL	( 2 * 60 * TICKS_PER_SEC )	tcp.h
20150	TCPIP_EMPTY_CSUM	0xffff	tcpip.h
20151	TCPIP_PROTOCOLS	__table ( struct tcpip_protocol, "tcpip_protocols" )	tcpip.h
20152	__tcpip_protocol	__table_entry ( TCPIP_PROTOCOLS, 01 )	tcpip.h
20153	TCPIP_NET_PROTOCOLS	__table ( struct tcpip_net_protocol, "tcpip_net_protocols" )	tcpip.h
20154	__tcpip_net_protocol	__table_entry ( TCPIP_NET_PROTOCOLS, 01 )	tcpip.h
20155	TFTP_PORT	69	tftp.h	*< Default TFTP server port
20156	TFTP_DEFAULT_BLKSIZE	512	tftp.h	*< Default TFTP data block size
20157	TFTP_MAX_BLKSIZE	1432	tftp.h
20158	TFTP_RRQ	1	tftp.h	*< Read request opcode
20159	TFTP_WRQ	2	tftp.h	*< Write request opcode
20160	TFTP_DATA	3	tftp.h	*< Data block opcode
20161	TFTP_ACK	4	tftp.h	*< Data block acknowledgement opcode
20162	TFTP_ERROR	5	tftp.h	*< Error opcode
20163	TFTP_OACK	6	tftp.h	*< Options acknowledgement opcode
20164	TFTP_ERR_FILE_NOT_FOUND	1	tftp.h	*< File not found
20165	TFTP_ERR_ACCESS_DENIED	2	tftp.h	*< Access violation
20166	TFTP_ERR_DISK_FULL	3	tftp.h	*< Disk full or allocation exceeded
20167	TFTP_ERR_ILLEGAL_OP	4	tftp.h	*< Illegal TFTP operation
20168	TFTP_ERR_UNKNOWN_TID	5	tftp.h	*< Unknown transfer ID
20169	TFTP_ERR_FILE_EXISTS	6	tftp.h	*< File already exists
20170	TFTP_ERR_UNKNOWN_USER	7	tftp.h	*< No such user
20171	TFTP_ERR_BAD_OPTS	8	tftp.h	*< Option negotiation failed
20172	MTFTP_PORT	1759	tftp.h	*< Default MTFTP server port
20173	THREEWIRE_READ	0x6	threewire.h
20174	THREEWIRE_WRITE	0x5	threewire.h
20175	THREEWIRE_EWEN	0x4	threewire.h
20176	THREEWIRE_EWEN_ADDRESS	INT_MAX	threewire.h
20177	THREEWIRE_WRITE_MDELAY	10	threewire.h
20178	TICKS_PER_SEC	( ticks_per_sec() )	timer.h
20179	TLS_VERSION_TLS_1_0	0x0301	tls.h
20180	TLS_VERSION_TLS_1_1	0x0302	tls.h
20181	TLS_TYPE_CHANGE_CIPHER	20	tls.h
20182	TLS_TYPE_ALERT	21	tls.h
20183	TLS_TYPE_HANDSHAKE	22	tls.h
20184	TLS_TYPE_DATA	23	tls.h
20185	TLS_HELLO_REQUEST	0	tls.h
20186	TLS_CLIENT_HELLO	1	tls.h
20187	TLS_SERVER_HELLO	2	tls.h
20188	TLS_CERTIFICATE	11	tls.h
20189	TLS_SERVER_KEY_EXCHANGE	12	tls.h
20190	TLS_CERTIFICATE_REQUEST	13	tls.h
20191	TLS_SERVER_HELLO_DONE	14	tls.h
20192	TLS_CERTIFICATE_VERIFY	15	tls.h
20193	TLS_CLIENT_KEY_EXCHANGE	16	tls.h
20194	TLS_FINISHED	20	tls.h
20195	TLS_ALERT_WARNING	1	tls.h
20196	TLS_ALERT_FATAL	2	tls.h
20197	TLS_RSA_WITH_NULL_MD5	0x0001	tls.h
20198	TLS_RSA_WITH_NULL_SHA	0x0002	tls.h
20199	TLS_RSA_WITH_AES_128_CBC_SHA	0x002f	tls.h
20200	TLS_RSA_WITH_AES_256_CBC_SHA	0x0035	tls.h
20201	UNULL	( ( userptr_t ) 0 )	uaccess.h
20202	UDP_MAX_HLEN	72	udp.h
20203	UDP_MAX_TXIOB	ETH_MAX_MTU	udp.h
20204	UDP_MIN_TXIOB	ETH_ZLEN	udp.h
20205	URI_ALL	( URI_SCHEME_BIT \| URI_OPAQUE_BIT \| URI_USER_BIT \| \ URI_PASSWORD_BIT \| URI_HOST_BIT \| URI_PORT_BIT \| \ URI_PATH_BIT \| URI_QUER	uri.h
20206	URI_ENCODED	( URI_USER_BIT \| URI_PASSWORD_BIT \| URI_HOST_BIT \| \ URI_PATH_BIT \| URI_QUERY_BIT \| URI_FRAGMENT_BIT )	uri.h
20207	VIRTIO_PCI_HOST_FEATURES	0	virtio-pci.h
20208	VIRTIO_PCI_GUEST_FEATURES	4	virtio-pci.h
20209	VIRTIO_PCI_QUEUE_PFN	8	virtio-pci.h
20210	VIRTIO_PCI_QUEUE_NUM	12	virtio-pci.h
20211	VIRTIO_PCI_QUEUE_SEL	14	virtio-pci.h
20212	VIRTIO_PCI_QUEUE_NOTIFY	16	virtio-pci.h
20213	VIRTIO_PCI_STATUS	18	virtio-pci.h
20214	VIRTIO_PCI_ISR	19	virtio-pci.h
20215	VIRTIO_PCI_ISR_CONFIG	0x2	virtio-pci.h
20216	VIRTIO_PCI_CONFIG	20	virtio-pci.h
20217	VIRTIO_PCI_ABI_VERSION	0	virtio-pci.h
20218	PAGE_SHIFT	(12)	virtio-ring.h
20219	PAGE_SIZE	(1<<PAGE_SHIFT)	virtio-ring.h
20220	PAGE_MASK	(PAGE_SIZE-1)	virtio-ring.h
20221	VIRTIO_CONFIG_S_ACKNOWLEDGE	1	virtio-ring.h
20222	VIRTIO_CONFIG_S_DRIVER	2	virtio-ring.h
20223	VIRTIO_CONFIG_S_DRIVER_OK	4	virtio-ring.h
20224	VIRTIO_CONFIG_S_FAILED	0x80	virtio-ring.h
20225	MAX_QUEUE_NUM	(512)	virtio-ring.h
20226	VRING_DESC_F_NEXT	1	virtio-ring.h
20227	VRING_DESC_F_WRITE	2	virtio-ring.h
20228	VRING_AVAIL_F_NO_INTERRUPT	1	virtio-ring.h
20229	VRING_USED_F_NO_NOTIFY	1	virtio-ring.h
20230	EAPOL_KEY_TYPE_RSN	2	wpa.h
20231	EAPOL_KEY_TYPE_WPA	254	wpa.h
20232	EAPOL_KEY_INFO_VERSION	0x0007	wpa.h
20233	EAPOL_KEY_INFO_TYPE	0x0008	wpa.h
20234	EAPOL_KEY_INFO_INSTALL	0x0040	wpa.h
20235	EAPOL_KEY_INFO_KEY_ACK	0x0080	wpa.h
20236	EAPOL_KEY_INFO_KEY_MIC	0x0100	wpa.h
20237	EAPOL_KEY_INFO_SECURE	0x0200	wpa.h
20238	EAPOL_KEY_INFO_ERROR	0x0400	wpa.h
20239	EAPOL_KEY_INFO_REQUEST	0x0800	wpa.h
20240	EAPOL_KEY_INFO_KEY_ENC	0x1000	wpa.h
20241	EAPOL_KEY_INFO_SMC_MESS	0x2000	wpa.h
20242	EAPOL_KEY_VERSION_WPA	1	wpa.h
20243	EAPOL_KEY_VERSION_WPA2	2	wpa.h
20244	EAPOL_KEY_TYPE_PTK	0x0008	wpa.h
20245	EAPOL_KEY_TYPE_GTK	0x0000	wpa.h
20246	WPA_NONCE_LEN	32	wpa.h
20247	WPA_TKIP_KEY_LEN	16	wpa.h
20248	WPA_TKIP_MIC_KEY_LEN	8	wpa.h
20249	WPA_CCMP_KEY_LEN	16	wpa.h
20250	WPA_KCK_LEN	16	wpa.h
20251	WPA_KEK_LEN	16	wpa.h
20252	WPA_PMK_LEN	32	wpa.h
20253	WPA_PMKID_LEN	16	wpa.h
20254	WPA_KIES	__table ( struct wpa_kie, "wpa_kies" )	wpa.h
20255	__wpa_kie	__table_entry ( WPA_KIES, 01 )	wpa.h
20256	WPA_GTK_KID	0x03	wpa.h
20257	WPA_GTK_TXBIT	0x04	wpa.h
20258	WPA_KDE_GTK	_MKOUI ( 0x00, 0x0F, 0xAC, 0x01 )	wpa.h
20259	WPA_KDE_MAC	_MKOUI ( 0x00, 0x0F, 0xAC, 0x03 )	wpa.h
20260	WPA_KDE_PMKID	_MKOUI ( 0x00, 0x0F, 0xAC, 0x04 )	wpa.h
20261	WPA_KDE_NONCE	_MKOUI ( 0x00, 0x0F, 0xAC, 0x06 )	wpa.h
20262	WPA_KDE_LIFETIME	_MKOUI ( 0x00, 0x0F, 0xAC, 0x07 )	wpa.h
20263	CONST	const	Base.h
20264	STATIC	static	Base.h
20265	VOID	void	Base.h
20266	TRUE	((BOOLEAN)(1==1))	Base.h
20267	FALSE	((BOOLEAN)(0==1))	Base.h
20268	NULL	((VOID *) 0)	Base.h
20269	BIT0	0x00000001	Base.h
20270	BIT1	0x00000002	Base.h
20271	BIT2	0x00000004	Base.h
20272	BIT3	0x00000008	Base.h
20273	BIT4	0x00000010	Base.h
20274	BIT5	0x00000020	Base.h
20275	BIT6	0x00000040	Base.h
20276	BIT7	0x00000080	Base.h
20277	BIT8	0x00000100	Base.h
20278	BIT9	0x00000200	Base.h
20279	BIT10	0x00000400	Base.h
20280	BIT11	0x00000800	Base.h
20281	BIT12	0x00001000	Base.h
20282	BIT13	0x00002000	Base.h
20283	BIT14	0x00004000	Base.h
20284	BIT15	0x00008000	Base.h
20285	BIT16	0x00010000	Base.h
20286	BIT17	0x00020000	Base.h
20287	BIT18	0x00040000	Base.h
20288	BIT19	0x00080000	Base.h
20289	BIT20	0x00100000	Base.h
20290	BIT21	0x00200000	Base.h
20291	BIT22	0x00400000	Base.h
20292	BIT23	0x00800000	Base.h
20293	BIT24	0x01000000	Base.h
20294	BIT25	0x02000000	Base.h
20295	BIT26	0x04000000	Base.h
20296	BIT27	0x08000000	Base.h
20297	BIT28	0x10000000	Base.h
20298	BIT29	0x20000000	Base.h
20299	BIT30	0x40000000	Base.h
20300	BIT31	0x80000000	Base.h
20301	BIT32	0x0000000100000000UL	Base.h
20302	BIT33	0x0000000200000000UL	Base.h
20303	BIT34	0x0000000400000000UL	Base.h
20304	BIT35	0x0000000800000000UL	Base.h
20305	BIT36	0x0000001000000000UL	Base.h
20306	BIT37	0x0000002000000000UL	Base.h
20307	BIT38	0x0000004000000000UL	Base.h
20308	BIT39	0x0000008000000000UL	Base.h
20309	BIT40	0x0000010000000000UL	Base.h
20310	BIT41	0x0000020000000000UL	Base.h
20311	BIT42	0x0000040000000000UL	Base.h
20312	BIT43	0x0000080000000000UL	Base.h
20313	BIT44	0x0000100000000000UL	Base.h
20314	BIT45	0x0000200000000000UL	Base.h
20315	BIT46	0x0000400000000000UL	Base.h
20316	BIT47	0x0000800000000000UL	Base.h
20317	BIT48	0x0001000000000000UL	Base.h
20318	BIT49	0x0002000000000000UL	Base.h
20319	BIT50	0x0004000000000000UL	Base.h
20320	BIT51	0x0008000000000000UL	Base.h
20321	BIT52	0x0010000000000000UL	Base.h
20322	BIT53	0x0020000000000000UL	Base.h
20323	BIT54	0x0040000000000000UL	Base.h
20324	BIT55	0x0080000000000000UL	Base.h
20325	BIT56	0x0100000000000000UL	Base.h
20326	BIT57	0x0200000000000000UL	Base.h
20327	BIT58	0x0400000000000000UL	Base.h
20328	BIT59	0x0800000000000000UL	Base.h
20329	BIT60	0x1000000000000000UL	Base.h
20330	BIT61	0x2000000000000000UL	Base.h
20331	BIT62	0x4000000000000000UL	Base.h
20332	BIT63	0x8000000000000000UL	Base.h
20333	RETURN_SUCCESS	0	Base.h
20334	RETURN_LOAD_ERROR	ENCODE_ERROR (1)	Base.h
20335	RETURN_INVALID_PARAMETER	ENCODE_ERROR (2)	Base.h
20336	RETURN_UNSUPPORTED	ENCODE_ERROR (3)	Base.h
20337	RETURN_BAD_BUFFER_SIZE	ENCODE_ERROR (4)	Base.h
20338	RETURN_BUFFER_TOO_SMALL	ENCODE_ERROR (5)	Base.h
20339	RETURN_NOT_READY	ENCODE_ERROR (6)	Base.h
20340	RETURN_DEVICE_ERROR	ENCODE_ERROR (7)	Base.h
20341	RETURN_WRITE_PROTECTED	ENCODE_ERROR (8)	Base.h
20342	RETURN_OUT_OF_RESOURCES	ENCODE_ERROR (9)	Base.h
20343	RETURN_VOLUME_CORRUPTED	ENCODE_ERROR (10)	Base.h
20344	RETURN_VOLUME_FULL	ENCODE_ERROR (11)	Base.h
20345	RETURN_NO_MEDIA	ENCODE_ERROR (12)	Base.h
20346	RETURN_MEDIA_CHANGED	ENCODE_ERROR (13)	Base.h
20347	RETURN_NOT_FOUND	ENCODE_ERROR (14)	Base.h
20348	RETURN_ACCESS_DENIED	ENCODE_ERROR (15)	Base.h
20349	RETURN_NO_RESPONSE	ENCODE_ERROR (16)	Base.h
20350	RETURN_NO_MAPPING	ENCODE_ERROR (17)	Base.h
20351	RETURN_TIMEOUT	ENCODE_ERROR (18)	Base.h
20352	RETURN_NOT_STARTED	ENCODE_ERROR (19)	Base.h
20353	RETURN_ALREADY_STARTED	ENCODE_ERROR (20)	Base.h
20354	RETURN_ABORTED	ENCODE_ERROR (21)	Base.h
20355	RETURN_ICMP_ERROR	ENCODE_ERROR (22)	Base.h
20356	RETURN_TFTP_ERROR	ENCODE_ERROR (23)	Base.h
20357	RETURN_PROTOCOL_ERROR	ENCODE_ERROR (24)	Base.h
20358	RETURN_INCOMPATIBLE_VERSION	ENCODE_ERROR (25)	Base.h
20359	RETURN_SECURITY_VIOLATION	ENCODE_ERROR (26)	Base.h
20360	RETURN_CRC_ERROR	ENCODE_ERROR (27)	Base.h
20361	RETURN_END_OF_MEDIA	ENCODE_ERROR (28)	Base.h
20362	RETURN_END_OF_FILE	ENCODE_ERROR (31)	Base.h
20363	RETURN_INVALID_LANGUAGE	ENCODE_ERROR (32)	Base.h
20364	RETURN_WARN_UNKNOWN_GLYPH	ENCODE_WARNING (1)	Base.h
20365	RETURN_WARN_DELETE_FAILURE	ENCODE_WARNING (2)	Base.h
20366	RETURN_WARN_WRITE_FAILURE	ENCODE_WARNING (3)	Base.h
20367	RETURN_WARN_BUFFER_TOO_SMALL	ENCODE_WARNING (4)	Base.h
20368	__GNUC__	1	efi.h
20369	EFI_PROTOCOLS	__table ( struct efi_protocol, "efi_protocols" )	efi.h
20370	__efi_protocol	__table_entry ( EFI_PROTOCOLS, 01 )	efi.h
20371	EFI_CONFIG_TABLES	__table ( struct efi_config_table, "efi_config_tables" )	efi.h
20372	__efi_config_table	__table_entry ( EFI_CONFIG_TABLES, 01 )	efi.h
20373	IOAPI_PREFIX_efi	__efi_	efi_io.h
20374	PCIAPI_PREFIX_efi	__efi_	efi_pci.h
20375	EFIPCI_WIDTH_BYTE	0	efi_pci.h
20376	EFIPCI_WIDTH_WORD	1	efi_pci.h
20377	EFIPCI_WIDTH_DWORD	2	efi_pci.h
20378	SMBIOS_PREFIX_efi	__efi_	efi_smbios.h
20379	TIMER_PREFIX_efi	__efi_	efi_timer.h
20380	UACCESS_PREFIX_efi	__efi_	efi_uaccess.h
20381	UMALLOC_PREFIX_efi	__efi_	efi_umalloc.h
20382	EFI_PC_ANSI_GUID	{ \ 0xe0c14753, 0xf9be, 0x11d2, {0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PcAnsi.h
20383	EFI_VT_100_GUID	{ \ 0xdfa66065, 0xb419, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PcAnsi.h
20384	EFI_VT_100_PLUS_GUID	{ \ 0x7baec70b, 0x57e0, 0x4c76, {0x8e, 0x87, 0x2f, 0x9e, 0x28, 0x08, 0x83, 0x43 } \ }	PcAnsi.h
20385	EFI_VT_UTF8_GUID	{ \ 0xad15a0d6, 0x8bec, 0x4acf, {0xa0, 0x73, 0xd0, 0x1d, 0xe7, 0x7e, 0x2d, 0x88 } \ }	PcAnsi.h
20386	EFI_UART_DEVICE_PATH_GUID	{ \ 0x37499a9d, 0x542f, 0x4c89, {0xa0, 0x26, 0x35, 0xda, 0x14, 0x20, 0x94, 0xe4 } \ }	PcAnsi.h
20387	EFI_SAS_DEVICE_PATH_GUID	{ \ 0xd487ddb4, 0x008b, 0x11d9, {0xaf, 0xdc, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \ }	PcAnsi.h
20388	EFI_SMBIOS_TABLE_GUID	{ \ 0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	SmBios.h
20389	SMBIOS_TABLE_GUID	EFI_SMBIOS_TABLE_GUID	SmBios.h
20390	UINT8_MAX	0xff	ProcessorBind.h
20391	MAX_BIT	0x80000000	ProcessorBind.h
20392	MAX_2_BITS	0xC0000000	ProcessorBind.h
20393	MAX_ADDRESS	0xFFFFFFFF	ProcessorBind.h
20394	CPU_STACK_ALIGNMENT	sizeof(UINTN)	ProcessorBind.h
20395	EFIAPI	__cdecl	ProcessorBind.h
20396	EFIAPI	__attribute__((cdecl,regparm(0)))	ProcessorBind.h
20397	GLOBAL_REMOVE_IF_UNREFERENCED	__declspec(selectany)	ProcessorBind.h
20398	PCI_MAX_SEGMENT	0	Pci22.h
20399	PCI_MAX_BUS	255	Pci22.h
20400	PCI_MAX_DEVICE	31	Pci22.h
20401	PCI_MAX_FUNC	7	Pci22.h
20402	PCI_CLASS_OLD	0x00	Pci22.h
20403	PCI_CLASS_OLD_OTHER	0x00	Pci22.h
20404	PCI_CLASS_OLD_VGA	0x01	Pci22.h
20405	PCI_CLASS_MASS_STORAGE	0x01	Pci22.h
20406	PCI_CLASS_MASS_STORAGE_SCSI	0x00	Pci22.h
20407	PCI_CLASS_MASS_STORAGE_IDE	0x01	Pci22.h
20408	PCI_CLASS_MASS_STORAGE_FLOPPY	0x02	Pci22.h
20409	PCI_CLASS_MASS_STORAGE_IPI	0x03	Pci22.h
20410	PCI_CLASS_MASS_STORAGE_RAID	0x04	Pci22.h
20411	PCI_CLASS_MASS_STORAGE_OTHER	0x80	Pci22.h
20412	PCI_CLASS_NETWORK	0x02	Pci22.h
20413	PCI_CLASS_NETWORK_ETHERNET	0x00	Pci22.h
20414	PCI_CLASS_NETWORK_TOKENRING	0x01	Pci22.h
20415	PCI_CLASS_NETWORK_FDDI	0x02	Pci22.h
20416	PCI_CLASS_NETWORK_ATM	0x03	Pci22.h
20417	PCI_CLASS_NETWORK_ISDN	0x04	Pci22.h
20418	PCI_CLASS_NETWORK_OTHER	0x80	Pci22.h
20419	PCI_CLASS_DISPLAY	0x03	Pci22.h
20420	PCI_CLASS_DISPLAY_VGA	0x00	Pci22.h
20421	PCI_IF_VGA_VGA	0x00	Pci22.h
20422	PCI_IF_VGA_8514	0x01	Pci22.h
20423	PCI_CLASS_DISPLAY_XGA	0x01	Pci22.h
20424	PCI_CLASS_DISPLAY_3D	0x02	Pci22.h
20425	PCI_CLASS_DISPLAY_OTHER	0x80	Pci22.h
20426	PCI_CLASS_DISPLAY_GFX	0x80	Pci22.h
20427	PCI_CLASS_MEDIA	0x04	Pci22.h
20428	PCI_CLASS_MEDIA_VIDEO	0x00	Pci22.h
20429	PCI_CLASS_MEDIA_AUDIO	0x01	Pci22.h
20430	PCI_CLASS_MEDIA_TELEPHONE	0x02	Pci22.h
20431	PCI_CLASS_MEDIA_OTHER	0x80	Pci22.h
20432	PCI_CLASS_MEMORY_CONTROLLER	0x05	Pci22.h
20433	PCI_CLASS_MEMORY_RAM	0x00	Pci22.h
20434	PCI_CLASS_MEMORY_FLASH	0x01	Pci22.h
20435	PCI_CLASS_MEMORY_OTHER	0x80	Pci22.h
20436	PCI_CLASS_BRIDGE	0x06	Pci22.h
20437	PCI_CLASS_BRIDGE_HOST	0x00	Pci22.h
20438	PCI_CLASS_BRIDGE_ISA	0x01	Pci22.h
20439	PCI_CLASS_BRIDGE_EISA	0x02	Pci22.h
20440	PCI_CLASS_BRIDGE_MCA	0x03	Pci22.h
20441	PCI_CLASS_BRIDGE_P2P	0x04	Pci22.h
20442	PCI_IF_BRIDGE_P2P	0x00	Pci22.h
20443	PCI_IF_BRIDGE_P2P_SUBTRACTIVE	0x01	Pci22.h
20444	PCI_CLASS_BRIDGE_PCMCIA	0x05	Pci22.h
20445	PCI_CLASS_BRIDGE_NUBUS	0x06	Pci22.h
20446	PCI_CLASS_BRIDGE_CARDBUS	0x07	Pci22.h
20447	PCI_CLASS_BRIDGE_RACEWAY	0x08	Pci22.h
20448	PCI_CLASS_BRIDGE_OTHER	0x80	Pci22.h
20449	PCI_CLASS_BRIDGE_ISA_PDECODE	0x80	Pci22.h
20450	PCI_CLASS_SCC	0x07	Pci22.h	< Simple communications controllers
20451	PCI_SUBCLASS_SERIAL	0x00	Pci22.h
20452	PCI_IF_GENERIC_XT	0x00	Pci22.h
20453	PCI_IF_16450	0x01	Pci22.h
20454	PCI_IF_16550	0x02	Pci22.h
20455	PCI_IF_16650	0x03	Pci22.h
20456	PCI_IF_16750	0x04	Pci22.h
20457	PCI_IF_16850	0x05	Pci22.h
20458	PCI_IF_16950	0x06	Pci22.h
20459	PCI_SUBCLASS_PARALLEL	0x01	Pci22.h
20460	PCI_IF_PARALLEL_PORT	0x00	Pci22.h
20461	PCI_IF_BI_DIR_PARALLEL_PORT	0x01	Pci22.h
20462	PCI_IF_ECP_PARALLEL_PORT	0x02	Pci22.h
20463	PCI_IF_1284_CONTROLLER	0x03	Pci22.h
20464	PCI_IF_1284_DEVICE	0xFE	Pci22.h
20465	PCI_SUBCLASS_MULTIPORT_SERIAL	0x02	Pci22.h
20466	PCI_SUBCLASS_MODEM	0x03	Pci22.h
20467	PCI_IF_GENERIC_MODEM	0x00	Pci22.h
20468	PCI_IF_16450_MODEM	0x01	Pci22.h
20469	PCI_IF_16550_MODEM	0x02	Pci22.h
20470	PCI_IF_16650_MODEM	0x03	Pci22.h
20471	PCI_IF_16750_MODEM	0x04	Pci22.h
20472	PCI_SUBCLASS_SCC_OTHER	0x80	Pci22.h
20473	PCI_CLASS_SYSTEM_PERIPHERAL	0x08	Pci22.h
20474	PCI_SUBCLASS_PIC	0x00	Pci22.h
20475	PCI_IF_8259_PIC	0x00	Pci22.h
20476	PCI_IF_ISA_PIC	0x01	Pci22.h
20477	PCI_IF_EISA_PIC	0x02	Pci22.h
20478	PCI_IF_APIC_CONTROLLER	0x10	Pci22.h	< I/O APIC interrupt controller , 32 bye none-prefectable memory.
20479	PCI_IF_APIC_CONTROLLER2	0x20	Pci22.h
20480	PCI_SUBCLASS_DMA	0x01	Pci22.h
20481	PCI_IF_8237_DMA	0x00	Pci22.h
20482	PCI_IF_ISA_DMA	0x01	Pci22.h
20483	PCI_IF_EISA_DMA	0x02	Pci22.h
20484	PCI_SUBCLASS_TIMER	0x02	Pci22.h
20485	PCI_IF_8254_TIMER	0x00	Pci22.h
20486	PCI_IF_ISA_TIMER	0x01	Pci22.h
20487	PCI_IF_EISA_TIMER	0x02	Pci22.h
20488	PCI_SUBCLASS_RTC	0x03	Pci22.h
20489	PCI_IF_GENERIC_RTC	0x00	Pci22.h
20490	PCI_IF_ISA_RTC	0x00	Pci22.h
20491	PCI_SUBCLASS_PNP_CONTROLLER	0x04	Pci22.h	< HotPlug Controller
20492	PCI_SUBCLASS_PERIPHERAL_OTHER	0x80	Pci22.h
20493	PCI_CLASS_INPUT_DEVICE	0x09	Pci22.h
20494	PCI_SUBCLASS_KEYBOARD	0x00	Pci22.h
20495	PCI_SUBCLASS_PEN	0x01	Pci22.h
20496	PCI_SUBCLASS_MOUSE_CONTROLLER	0x02	Pci22.h
20497	PCI_SUBCLASS_SCAN_CONTROLLER	0x03	Pci22.h
20498	PCI_SUBCLASS_GAMEPORT	0x04	Pci22.h
20499	PCI_IF_GAMEPORT	0x00	Pci22.h
20500	PCI_IF_GAMEPORT1	0x01	Pci22.h
20501	PCI_SUBCLASS_INPUT_OTHER	0x80	Pci22.h
20502	PCI_CLASS_DOCKING_STATION	0x0A	Pci22.h
20503	PCI_CLASS_PROCESSOR	0x0B	Pci22.h
20504	PCI_SUBCLASS_PROC_386	0x00	Pci22.h
20505	PCI_SUBCLASS_PROC_486	0x01	Pci22.h
20506	PCI_SUBCLASS_PROC_PENTIUM	0x02	Pci22.h
20507	PCI_SUBCLASS_PROC_ALPHA	0x10	Pci22.h
20508	PCI_SUBCLASS_PROC_POWERPC	0x20	Pci22.h
20509	PCI_SUBCLASS_PROC_MIPS	0x30	Pci22.h
20510	PCI_SUBCLASS_PROC_CO_PORC	0x40	Pci22.h	< Co-Processor
20511	PCI_CLASS_SERIAL	0x0C	Pci22.h
20512	PCI_CLASS_SERIAL_FIREWIRE	0x00	Pci22.h
20513	PCI_IF_1394	0x00	Pci22.h
20514	PCI_IF_1394_OPEN_HCI	0x10	Pci22.h
20515	PCI_CLASS_SERIAL_ACCESS_BUS	0x01	Pci22.h
20516	PCI_CLASS_SERIAL_SSA	0x02	Pci22.h
20517	PCI_CLASS_SERIAL_USB	0x03	Pci22.h
20518	PCI_IF_UHCI	0x00	Pci22.h
20519	PCI_IF_OHCI	0x10	Pci22.h
20520	PCI_IF_USB_OTHER	0x80	Pci22.h
20521	PCI_IF_USB_DEVICE	0xFE	Pci22.h
20522	PCI_CLASS_SERIAL_FIBRECHANNEL	0x04	Pci22.h
20523	PCI_CLASS_SERIAL_SMB	0x05	Pci22.h
20524	PCI_CLASS_WIRELESS	0x0D	Pci22.h
20525	PCI_SUBCLASS_IRDA	0x00	Pci22.h
20526	PCI_SUBCLASS_IR	0x01	Pci22.h
20527	PCI_SUBCLASS_RF	0x02	Pci22.h
20528	PCI_SUBCLASS_WIRELESS_OTHER	0x80	Pci22.h
20529	PCI_CLASS_INTELLIGENT_IO	0x0E	Pci22.h
20530	PCI_CLASS_SATELLITE	0x0F	Pci22.h
20531	PCI_SUBCLASS_TV	0x01	Pci22.h
20532	PCI_SUBCLASS_AUDIO	0x02	Pci22.h
20533	PCI_SUBCLASS_VOICE	0x03	Pci22.h
20534	PCI_SUBCLASS_DATA	0x04	Pci22.h
20535	PCI_SECURITY_CONTROLLER	0x10	Pci22.h	< Encryption and decryption controller
20536	PCI_SUBCLASS_NET_COMPUT	0x00	Pci22.h
20537	PCI_SUBCLASS_ENTERTAINMENT	0x10	Pci22.h
20538	PCI_SUBCLASS_SECURITY_OTHER	0x80	Pci22.h
20539	PCI_CLASS_DPIO	0x11	Pci22.h
20540	PCI_SUBCLASS_DPIO	0x00	Pci22.h
20541	PCI_SUBCLASS_DPIO_OTHER	0x80	Pci22.h
20542	HEADER_TYPE_DEVICE	0x00	Pci22.h
20543	HEADER_TYPE_PCI_TO_PCI_BRIDGE	0x01	Pci22.h
20544	HEADER_TYPE_CARDBUS_BRIDGE	0x02	Pci22.h
20545	HEADER_TYPE_MULTI_FUNCTION	0x80	Pci22.h
20546	HEADER_LAYOUT_CODE	0x7f	Pci22.h
20547	PCI_BRIDGE_ROMBAR	0x38	Pci22.h
20548	PCI_MAX_BAR	0x0006	Pci22.h
20549	PCI_MAX_CONFIG_OFFSET	0x0100	Pci22.h
20550	PCI_VENDOR_ID_OFFSET	0x00	Pci22.h
20551	PCI_DEVICE_ID_OFFSET	0x02	Pci22.h
20552	PCI_COMMAND_OFFSET	0x04	Pci22.h
20553	PCI_PRIMARY_STATUS_OFFSET	0x06	Pci22.h
20554	PCI_REVISION_ID_OFFSET	0x08	Pci22.h
20555	PCI_CLASSCODE_OFFSET	0x09	Pci22.h
20556	PCI_CACHELINE_SIZE_OFFSET	0x0C	Pci22.h
20557	PCI_LATENCY_TIMER_OFFSET	0x0D	Pci22.h
20558	PCI_HEADER_TYPE_OFFSET	0x0E	Pci22.h
20559	PCI_BIST_OFFSET	0x0F	Pci22.h
20560	PCI_BASE_ADDRESSREG_OFFSET	0x10	Pci22.h
20561	PCI_CARDBUS_CIS_OFFSET	0x28	Pci22.h
20562	PCI_SVID_OFFSET	0x2C	Pci22.h	< SubSystem Vendor id
20563	PCI_SUBSYSTEM_VENDOR_ID_OFFSET	0x2C	Pci22.h
20564	PCI_SID_OFFSET	0x2E	Pci22.h	< SubSystem ID
20565	PCI_SUBSYSTEM_ID_OFFSET	0x2E	Pci22.h
20566	PCI_EXPANSION_ROM_BASE	0x30	Pci22.h
20567	PCI_CAPBILITY_POINTER_OFFSET	0x34	Pci22.h
20568	PCI_INT_LINE_OFFSET	0x3C	Pci22.h	< Interrupt Line Register
20569	PCI_INT_PIN_OFFSET	0x3D	Pci22.h	< Interrupt Pin Register
20570	PCI_MAXGNT_OFFSET	0x3E	Pci22.h	< Max Grant Register
20571	PCI_MAXLAT_OFFSET	0x3F	Pci22.h	< Max Latency Register
20572	PCI_BRIDGE_PRIMARY_BUS_REGISTER	0x18	Pci22.h
20573	PCI_BRIDGE_SECONDARY_BUS_REGIST	0x19	Pci22.h
20574	PCI_BRIDGE_SUBORDINATE_BUS_REGI	0x1a	Pci22.h
20575	PCI_BRIDGE_STATUS_REGISTER_OFFS	0x1E	Pci22.h
20576	PCI_BRIDGE_CONTROL_REGISTER_OFF	0x3E	Pci22.h
20577	PCI_INT_LINE_UNKNOWN	0xFF	Pci22.h
20578	EFI_PCI_COMMAND_IO_SPACE	BIT0	Pci22.h	< 0x0001
20579	EFI_PCI_COMMAND_MEMORY_SPACE	BIT1	Pci22.h	< 0x0002
20580	EFI_PCI_COMMAND_BUS_MASTER	BIT2	Pci22.h	< 0x0004
20581	EFI_PCI_COMMAND_SPECIAL_CYCLE	BIT3	Pci22.h	< 0x0008
20582	EFI_PCI_COMMAND_MEMORY_WRITE_AN	BIT4	Pci22.h	< 0x0010
20583	EFI_PCI_COMMAND_VGA_PALETTE_SNO	BIT5	Pci22.h	< 0x0020
20584	EFI_PCI_COMMAND_PARITY_ERROR_RE	BIT6	Pci22.h	< 0x0040
20585	EFI_PCI_COMMAND_STEPPING_CONTRO	BIT7	Pci22.h	< 0x0080
20586	EFI_PCI_COMMAND_SERR	BIT8	Pci22.h	< 0x0100
20587	EFI_PCI_COMMAND_FAST_BACK_TO_BA	BIT9	Pci22.h	< 0x0200
20588	EFI_PCI_BRIDGE_CONTROL_PARITY_E	BIT0	Pci22.h	< 0x0001
20589	EFI_PCI_BRIDGE_CONTROL_SERR	BIT1	Pci22.h	< 0x0002
20590	EFI_PCI_BRIDGE_CONTROL_ISA	BIT2	Pci22.h	< 0x0004
20591	EFI_PCI_BRIDGE_CONTROL_VGA	BIT3	Pci22.h	< 0x0008
20592	EFI_PCI_BRIDGE_CONTROL_VGA_16	BIT4	Pci22.h	< 0x0010
20593	EFI_PCI_BRIDGE_CONTROL_MASTER_A	BIT5	Pci22.h	< 0x0020
20594	EFI_PCI_BRIDGE_CONTROL_RESET_SE	BIT6	Pci22.h	< 0x0040
20595	EFI_PCI_BRIDGE_CONTROL_FAST_BAC	BIT7	Pci22.h	< 0x0080
20596	EFI_PCI_BRIDGE_CONTROL_PRIMARY_	BIT8	Pci22.h	< 0x0100
20597	EFI_PCI_BRIDGE_CONTROL_SECONDAR	BIT9	Pci22.h	< 0x0200
20598	EFI_PCI_BRIDGE_CONTROL_TIMER_ST	BIT10	Pci22.h	< 0x0400
20599	EFI_PCI_BRIDGE_CONTROL_DISCARD_	BIT11	Pci22.h	< 0x0800
20600	EFI_PCI_BRIDGE_CONTROL_IREQINT_	BIT7	Pci22.h	< 0x0080
20601	EFI_PCI_BRIDGE_CONTROL_RANGE0_M	BIT8	Pci22.h	< 0x0100
20602	EFI_PCI_BRIDGE_CONTROL_RANGE1_M	BIT9	Pci22.h	< 0x0200
20603	EFI_PCI_BRIDGE_CONTROL_WRITE_PO	BIT10	Pci22.h	< 0x0400
20604	EFI_PCI_STATUS_CAPABILITY	BIT4	Pci22.h	< 0x0010
20605	EFI_PCI_STATUS_66MZ_CAPABLE	BIT5	Pci22.h	< 0x0020
20606	EFI_PCI_FAST_BACK_TO_BACK_CAPAB	BIT7	Pci22.h	< 0x0080
20607	EFI_PCI_MASTER_DATA_PARITY_ERRO	BIT8	Pci22.h	< 0x0100
20608	EFI_PCI_CARDBUS_BRIDGE_CAPABILI	0x14	Pci22.h
20609	EFI_PCI_CAPABILITY_ID_PMI	0x01	Pci22.h
20610	EFI_PCI_CAPABILITY_ID_AGP	0x02	Pci22.h
20611	EFI_PCI_CAPABILITY_ID_VPD	0x03	Pci22.h
20612	EFI_PCI_CAPABILITY_ID_SLOTID	0x04	Pci22.h
20613	EFI_PCI_CAPABILITY_ID_MSI	0x05	Pci22.h
20614	EFI_PCI_CAPABILITY_ID_HOTPLUG	0x06	Pci22.h
20615	DEVICE_ID_NOCARE	0xFFFF	Pci22.h
20616	PCI_ACPI_UNUSED	0	Pci22.h
20617	PCI_BAR_NOCHANGE	0	Pci22.h
20618	PCI_BAR_OLD_ALIGN	0xFFFFFFFFFFFFFFFFULL	Pci22.h
20619	PCI_BAR_EVEN_ALIGN	0xFFFFFFFFFFFFFFFEULL	Pci22.h
20620	PCI_BAR_SQUAD_ALIGN	0xFFFFFFFFFFFFFFFDULL	Pci22.h
20621	PCI_BAR_DQUAD_ALIGN	0xFFFFFFFFFFFFFFFCULL	Pci22.h
20622	PCI_BAR_IDX0	0x00	Pci22.h
20623	PCI_BAR_IDX1	0x01	Pci22.h
20624	PCI_BAR_IDX2	0x02	Pci22.h
20625	PCI_BAR_IDX3	0x03	Pci22.h
20626	PCI_BAR_IDX4	0x04	Pci22.h
20627	PCI_BAR_IDX5	0x05	Pci22.h
20628	PCI_BAR_ALL	0xFF	Pci22.h
20629	EFI_ROOT_BRIDGE_LIST	'eprb'	Pci22.h
20630	EFI_PCI_EXPANSION_ROM_HEADER_EF	0x0EF1	Pci22.h	< defined in UEFI Spec.
20631	PCI_EXPANSION_ROM_HEADER_SIGNAT	0xaa55	Pci22.h
20632	PCI_DATA_STRUCTURE_SIGNATURE	SIGNATURE_32 ('P', 'C', 'I', 'R')	Pci22.h
20633	PCI_CODE_TYPE_PCAT_IMAGE	0x00	Pci22.h
20634	EFI_PCI_EXPANSION_ROM_HEADER_CO	0x0001	Pci22.h	<defined in UEFI spec.
20635	EFI_IMAGE_SUBSYSTEM_EFI_APPLICA	10	PeImage.h
20636	EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SE	11	PeImage.h
20637	EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME	12	PeImage.h
20638	EFI_IMAGE_SUBSYSTEM_EFI_EFI_ROM	13	PeImage.h
20639	EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME	13	PeImage.h	< defined PI Specification, 1.0
20640	IMAGE_FILE_MACHINE_I386	0x014c	PeImage.h
20641	IMAGE_FILE_MACHINE_IA64	0x0200	PeImage.h
20642	IMAGE_FILE_MACHINE_EBC	0x0EBC	PeImage.h
20643	IMAGE_FILE_MACHINE_X64	0x8664	PeImage.h
20644	EFI_IMAGE_MACHINE_IA32	IMAGE_FILE_MACHINE_I386	PeImage.h
20645	EFI_IMAGE_MACHINE_IA64	IMAGE_FILE_MACHINE_IA64	PeImage.h
20646	EFI_IMAGE_MACHINE_IPF	IMAGE_FILE_MACHINE_IA64	PeImage.h
20647	EFI_IMAGE_MACHINE_EBC	IMAGE_FILE_MACHINE_EBC	PeImage.h
20648	EFI_IMAGE_MACHINE_X64	IMAGE_FILE_MACHINE_X64	PeImage.h
20649	EFI_IMAGE_DOS_SIGNATURE	SIGNATURE_16('M', 'Z')	PeImage.h
20650	EFI_IMAGE_OS2_SIGNATURE	SIGNATURE_16('N', 'E')	PeImage.h
20651	EFI_IMAGE_OS2_SIGNATURE_LE	SIGNATURE_16('L', 'E')	PeImage.h
20652	EFI_IMAGE_NT_SIGNATURE	SIGNATURE_32('P', 'E', '\0', '\0')	PeImage.h
20653	EFI_IMAGE_SIZEOF_FILE_HEADER	20	PeImage.h
20654	EFI_IMAGE_FILE_RELOCS_STRIPPED	BIT0	PeImage.h	< 0x0001 Relocation info stripped from file.
20655	EFI_IMAGE_FILE_EXECUTABLE_IMAGE	BIT1	PeImage.h	< 0x0002 File is executable (i.e. no unresolved externel references).
20656	EFI_IMAGE_FILE_LINE_NUMS_STRIPP	BIT2	PeImage.h	< 0x0004 Line nunbers stripped from file.
20657	EFI_IMAGE_FILE_LOCAL_SYMS_STRIP	BIT3	PeImage.h	< 0x0008 Local symbols stripped from file.
20658	EFI_IMAGE_FILE_BYTES_REVERSED_L	BIT7	PeImage.h	< 0x0080 Bytes of machine word are reversed.
20659	EFI_IMAGE_FILE_32BIT_MACHINE	BIT8	PeImage.h	< 0x0100 32 bit word machine.
20660	EFI_IMAGE_FILE_DEBUG_STRIPPED	BIT9	PeImage.h	< 0x0200 Debugging info stripped from file in .DBG file
20661	EFI_IMAGE_FILE_SYSTEM	BIT12	PeImage.h	< 0x1000 System File.
20662	EFI_IMAGE_FILE_DLL	BIT13	PeImage.h	< 0x2000 File is a DLL.
20663	EFI_IMAGE_FILE_BYTES_REVERSED_H	BIT15	PeImage.h	< 0x8000 Bytes of machine word are reversed.
20664	EFI_IMAGE_FILE_MACHINE_UNKNOWN	0	PeImage.h	< Any machine type
20665	EFI_IMAGE_FILE_MACHINE_I386	0x14c	PeImage.h	< Intel 386.
20666	EFI_IMAGE_FILE_MACHINE_R3000	0x162	PeImage.h	< MIPS* little-endian, 0540 big-endian
20667	EFI_IMAGE_FILE_MACHINE_R4000	0x166	PeImage.h	< MIPS* little-endian
20668	EFI_IMAGE_FILE_MACHINE_POWERPC	0x1F0	PeImage.h	< IBM* PowerPC Little-Endian
20669	EFI_IMAGE_ROM_OPTIONAL_HDR_MAGI	0x107	PeImage.h
20670	EFI_IMAGE_DIRECTORY_ENTRY_EXPOR	0	PeImage.h
20671	EFI_IMAGE_DIRECTORY_ENTRY_IMPOR	1	PeImage.h
20672	EFI_IMAGE_DIRECTORY_ENTRY_RESOU	2	PeImage.h
20673	EFI_IMAGE_DIRECTORY_ENTRY_EXCEP	3	PeImage.h
20674	EFI_IMAGE_DIRECTORY_ENTRY_SECUR	4	PeImage.h
20675	EFI_IMAGE_DIRECTORY_ENTRY_BASER	5	PeImage.h
20676	EFI_IMAGE_DIRECTORY_ENTRY_DEBUG	6	PeImage.h
20677	EFI_IMAGE_DIRECTORY_ENTRY_COPYR	7	PeImage.h
20678	EFI_IMAGE_DIRECTORY_ENTRY_GLOBA	8	PeImage.h
20679	EFI_IMAGE_DIRECTORY_ENTRY_TLS	9	PeImage.h
20680	EFI_IMAGE_DIRECTORY_ENTRY_LOAD_	10	PeImage.h
20681	EFI_IMAGE_NUMBER_OF_DIRECTORY_E	16	PeImage.h
20682	EFI_IMAGE_NT_OPTIONAL_HDR32_MAG	0x10b	PeImage.h
20683	EFI_IMAGE_NT_OPTIONAL_HDR64_MAG	0x20b	PeImage.h
20684	EFI_IMAGE_SIZEOF_NT_OPTIONAL32_	sizeof (EFI_IMAGE_NT_HEADERS32)	PeImage.h
20685	EFI_IMAGE_SIZEOF_NT_OPTIONAL64_	sizeof (EFI_IMAGE_NT_HEADERS64)	PeImage.h
20686	EFI_IMAGE_SUBSYSTEM_UNKNOWN	0	PeImage.h
20687	EFI_IMAGE_SUBSYSTEM_NATIVE	1	PeImage.h
20688	EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI	2	PeImage.h
20689	EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI	3	PeImage.h
20690	EFI_IMAGE_SUBSYSTEM_OS2_CUI	5	PeImage.h
20691	EFI_IMAGE_SUBSYSTEM_POSIX_CUI	7	PeImage.h
20692	EFI_IMAGE_SIZEOF_SHORT_NAME	8	PeImage.h
20693	EFI_IMAGE_SIZEOF_SECTION_HEADER	40	PeImage.h
20694	EFI_IMAGE_SCN_TYPE_NO_PAD	BIT3	PeImage.h	< 0x00000008 ///< Reserved.
20695	EFI_IMAGE_SCN_CNT_CODE	BIT5	PeImage.h	< 0x00000020
20696	EFI_IMAGE_SCN_CNT_INITIALIZED_D	BIT6	PeImage.h	< 0x00000040
20697	EFI_IMAGE_SCN_CNT_UNINITIALIZED	BIT7	PeImage.h	< 0x00000080
20698	EFI_IMAGE_SCN_LNK_OTHER	BIT8	PeImage.h	< 0x00000100 ///< Reserved.
20699	EFI_IMAGE_SCN_LNK_INFO	BIT9	PeImage.h	< 0x00000200 ///< Section contains comments or some other type of information.
20700	EFI_IMAGE_SCN_LNK_REMOVE	BIT10	PeImage.h	< 0x00000800 ///< Section contents will not become part of image.
20701	EFI_IMAGE_SCN_LNK_COMDAT	BIT12	PeImage.h	< 0x00001000
20702	EFI_IMAGE_SCN_ALIGN_1BYTES	BIT20	PeImage.h	< 0x00100000
20703	EFI_IMAGE_SCN_ALIGN_2BYTES	BIT21	PeImage.h	< 0x00200000
20704	EFI_IMAGE_SCN_ALIGN_4BYTES	(BIT20\|BIT21)	PeImage.h	< 0x00300000
20705	EFI_IMAGE_SCN_ALIGN_8BYTES	BIT22	PeImage.h	< 0x00400000
20706	EFI_IMAGE_SCN_ALIGN_16BYTES	(BIT20\|BIT22)	PeImage.h	< 0x00500000
20707	EFI_IMAGE_SCN_ALIGN_32BYTES	(BIT21\|BIT22)	PeImage.h	< 0x00600000
20708	EFI_IMAGE_SCN_ALIGN_64BYTES	(BIT20\|BIT21\|BIT22)	PeImage.h	< 0x00700000
20709	EFI_IMAGE_SCN_MEM_DISCARDABLE	BIT25	PeImage.h	< 0x02000000
20710	EFI_IMAGE_SCN_MEM_NOT_CACHED	BIT26	PeImage.h	< 0x04000000
20711	EFI_IMAGE_SCN_MEM_NOT_PAGED	BIT27	PeImage.h	< 0x08000000
20712	EFI_IMAGE_SCN_MEM_SHARED	BIT28	PeImage.h	< 0x10000000
20713	EFI_IMAGE_SCN_MEM_EXECUTE	BIT29	PeImage.h	< 0x20000000
20714	EFI_IMAGE_SCN_MEM_READ	BIT30	PeImage.h	< 0x40000000
20715	EFI_IMAGE_SCN_MEM_WRITE	BIT31	PeImage.h	< 0x80000000
20716	EFI_IMAGE_SIZEOF_SYMBOL	18	PeImage.h
20717	EFI_IMAGE_SYM_UNDEFINED	(UINT16) 0	PeImage.h	< Symbol is undefined or is common.
20718	EFI_IMAGE_SYM_ABSOLUTE	(UINT16) -1	PeImage.h	< Symbol is an absolute value.
20719	EFI_IMAGE_SYM_DEBUG	(UINT16) -2	PeImage.h	< Symbol is a special debug item.
20720	EFI_IMAGE_SYM_TYPE_NULL	0	PeImage.h	< no type.
20721	EFI_IMAGE_SYM_TYPE_VOID	1	PeImage.h	< no valid type.
20722	EFI_IMAGE_SYM_TYPE_CHAR	2	PeImage.h	< type character.
20723	EFI_IMAGE_SYM_TYPE_SHORT	3	PeImage.h	< type short integer.
20724	EFI_IMAGE_SYM_TYPE_INT	4	PeImage.h
20725	EFI_IMAGE_SYM_TYPE_LONG	5	PeImage.h
20726	EFI_IMAGE_SYM_TYPE_FLOAT	6	PeImage.h
20727	EFI_IMAGE_SYM_TYPE_DOUBLE	7	PeImage.h
20728	EFI_IMAGE_SYM_TYPE_STRUCT	8	PeImage.h
20729	EFI_IMAGE_SYM_TYPE_UNION	9	PeImage.h
20730	EFI_IMAGE_SYM_TYPE_ENUM	10	PeImage.h	< enumeration.
20731	EFI_IMAGE_SYM_TYPE_MOE	11	PeImage.h	< member of enumeration.
20732	EFI_IMAGE_SYM_TYPE_BYTE	12	PeImage.h
20733	EFI_IMAGE_SYM_TYPE_WORD	13	PeImage.h
20734	EFI_IMAGE_SYM_TYPE_UINT	14	PeImage.h
20735	EFI_IMAGE_SYM_TYPE_DWORD	15	PeImage.h
20736	EFI_IMAGE_SYM_DTYPE_NULL	0	PeImage.h	< no derived type.
20737	EFI_IMAGE_SYM_DTYPE_POINTER	1	PeImage.h
20738	EFI_IMAGE_SYM_DTYPE_FUNCTION	2	PeImage.h
20739	EFI_IMAGE_SYM_DTYPE_ARRAY	3	PeImage.h
20740	EFI_IMAGE_SYM_CLASS_END_OF_FUNC	((UINT8) -1)	PeImage.h
20741	EFI_IMAGE_SYM_CLASS_NULL	0	PeImage.h
20742	EFI_IMAGE_SYM_CLASS_AUTOMATIC	1	PeImage.h
20743	EFI_IMAGE_SYM_CLASS_EXTERNAL	2	PeImage.h
20744	EFI_IMAGE_SYM_CLASS_STATIC	3	PeImage.h
20745	EFI_IMAGE_SYM_CLASS_REGISTER	4	PeImage.h
20746	EFI_IMAGE_SYM_CLASS_EXTERNAL_DE	5	PeImage.h
20747	EFI_IMAGE_SYM_CLASS_LABEL	6	PeImage.h
20748	EFI_IMAGE_SYM_CLASS_UNDEFINED_L	7	PeImage.h
20749	EFI_IMAGE_SYM_CLASS_MEMBER_OF_S	8	PeImage.h
20750	EFI_IMAGE_SYM_CLASS_ARGUMENT	9	PeImage.h
20751	EFI_IMAGE_SYM_CLASS_STRUCT_TAG	10	PeImage.h
20752	EFI_IMAGE_SYM_CLASS_MEMBER_OF_U	11	PeImage.h
20753	EFI_IMAGE_SYM_CLASS_UNION_TAG	12	PeImage.h
20754	EFI_IMAGE_SYM_CLASS_TYPE_DEFINI	13	PeImage.h
20755	EFI_IMAGE_SYM_CLASS_UNDEFINED_S	14	PeImage.h
20756	EFI_IMAGE_SYM_CLASS_ENUM_TAG	15	PeImage.h
20757	EFI_IMAGE_SYM_CLASS_MEMBER_OF_E	16	PeImage.h
20758	EFI_IMAGE_SYM_CLASS_REGISTER_PA	17	PeImage.h
20759	EFI_IMAGE_SYM_CLASS_BIT_FIELD	18	PeImage.h
20760	EFI_IMAGE_SYM_CLASS_BLOCK	100	PeImage.h
20761	EFI_IMAGE_SYM_CLASS_FUNCTION	101	PeImage.h
20762	EFI_IMAGE_SYM_CLASS_END_OF_STRU	102	PeImage.h
20763	EFI_IMAGE_SYM_CLASS_FILE	103	PeImage.h
20764	EFI_IMAGE_SYM_CLASS_SECTION	104	PeImage.h
20765	EFI_IMAGE_SYM_CLASS_WEAK_EXTERN	105	PeImage.h
20766	EFI_IMAGE_N_BTMASK	017	PeImage.h
20767	EFI_IMAGE_N_TMASK	060	PeImage.h
20768	EFI_IMAGE_N_TMASK1	0300	PeImage.h
20769	EFI_IMAGE_N_TMASK2	0360	PeImage.h
20770	EFI_IMAGE_N_BTSHFT	4	PeImage.h
20771	EFI_IMAGE_N_TSHIFT	2	PeImage.h
20772	EFI_IMAGE_COMDAT_SELECT_NODUPLI	1	PeImage.h
20773	EFI_IMAGE_COMDAT_SELECT_ANY	2	PeImage.h
20774	EFI_IMAGE_COMDAT_SELECT_SAME_SI	3	PeImage.h
20775	EFI_IMAGE_COMDAT_SELECT_EXACT_M	4	PeImage.h
20776	EFI_IMAGE_COMDAT_SELECT_ASSOCIA	5	PeImage.h
20777	EFI_IMAGE_WEAK_EXTERN_SEARCH_NO	1	PeImage.h
20778	EFI_IMAGE_WEAK_EXTERN_SEARCH_LI	2	PeImage.h
20779	EFI_IMAGE_WEAK_EXTERN_SEARCH_AL	3	PeImage.h
20780	EFI_IMAGE_SIZEOF_RELOCATION	10	PeImage.h
20781	EFI_IMAGE_REL_I386_ABSOLUTE	0x0000	PeImage.h	< Reference is absolute, no relocation is necessary
20782	EFI_IMAGE_REL_I386_DIR16	0x0001	PeImage.h	< Direct 16-bit reference to the symbols virtual address
20783	EFI_IMAGE_REL_I386_REL16	0x0002	PeImage.h	< PC-relative 16-bit reference to the symbols virtual address
20784	EFI_IMAGE_REL_I386_DIR32	0x0006	PeImage.h	< Direct 32-bit reference to the symbols virtual address
20785	EFI_IMAGE_REL_I386_DIR32NB	0x0007	PeImage.h	< Direct 32-bit reference to the symbols virtual address, base not included
20786	EFI_IMAGE_REL_I386_SEG12	0x0009	PeImage.h	< Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address
20787	EFI_IMAGE_REL_I386_SECTION	0x000A	PeImage.h
20788	EFI_IMAGE_REL_I386_SECREL	0x000B	PeImage.h
20789	EFI_IMAGE_REL_I386_REL32	0x0014	PeImage.h	< PC-relative 32-bit reference to the symbols virtual address
20790	IMAGE_REL_AMD64_ABSOLUTE	0x0000	PeImage.h
20791	IMAGE_REL_AMD64_ADDR64	0x0001	PeImage.h
20792	IMAGE_REL_AMD64_ADDR32	0x0002	PeImage.h
20793	IMAGE_REL_AMD64_ADDR32NB	0x0003	PeImage.h
20794	IMAGE_REL_AMD64_REL32	0x0004	PeImage.h
20795	IMAGE_REL_AMD64_REL32_1	0x0005	PeImage.h
20796	IMAGE_REL_AMD64_REL32_2	0x0006	PeImage.h
20797	IMAGE_REL_AMD64_REL32_3	0x0007	PeImage.h
20798	IMAGE_REL_AMD64_REL32_4	0x0008	PeImage.h
20799	IMAGE_REL_AMD64_REL32_5	0x0009	PeImage.h
20800	IMAGE_REL_AMD64_SECTION	0x000A	PeImage.h
20801	IMAGE_REL_AMD64_SECREL	0x000B	PeImage.h
20802	IMAGE_REL_AMD64_SECREL7	0x000C	PeImage.h
20803	IMAGE_REL_AMD64_TOKEN	0x000D	PeImage.h
20804	IMAGE_REL_AMD64_SREL32	0x000E	PeImage.h
20805	IMAGE_REL_AMD64_PAIR	0x000F	PeImage.h
20806	IMAGE_REL_AMD64_SSPAN32	0x0010	PeImage.h
20807	EFI_IMAGE_SIZEOF_BASE_RELOCATIO	8	PeImage.h
20808	EFI_IMAGE_REL_BASED_ABSOLUTE	0	PeImage.h
20809	EFI_IMAGE_REL_BASED_HIGH	1	PeImage.h
20810	EFI_IMAGE_REL_BASED_LOW	2	PeImage.h
20811	EFI_IMAGE_REL_BASED_HIGHLOW	3	PeImage.h
20812	EFI_IMAGE_REL_BASED_HIGHADJ	4	PeImage.h
20813	EFI_IMAGE_REL_BASED_MIPS_JMPADD	5	PeImage.h
20814	EFI_IMAGE_REL_BASED_IA64_IMM64	9	PeImage.h
20815	IMAGE_REL_BASED_MIPS_JMPADDR16	9	PeImage.h
20816	EFI_IMAGE_REL_BASED_DIR64	10	PeImage.h
20817	EFI_IMAGE_SIZEOF_LINENUMBER	6	PeImage.h
20818	EFI_IMAGE_ARCHIVE_START_SIZE	8	PeImage.h
20819	EFI_IMAGE_ARCHIVE_START	"!<arch>\n"	PeImage.h
20820	EFI_IMAGE_ARCHIVE_END	"`\n"	PeImage.h
20821	EFI_IMAGE_ARCHIVE_PAD	"\n"	PeImage.h
20822	EFI_IMAGE_ARCHIVE_LINKER_MEMBER	"/ "	PeImage.h
20823	EFI_IMAGE_ARCHIVE_LONGNAMES_MEM	"// "	PeImage.h
20824	EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER	60	PeImage.h
20825	EFI_IMAGE_ORDINAL_FLAG	BIT31	PeImage.h	< Flag for PE32
20826	EFI_IMAGE_DEBUG_TYPE_CODEVIEW	2	PeImage.h	< The Visual C++ debug information
20827	CODEVIEW_SIGNATURE_NB10	SIGNATURE_32('N', 'B', '1', '0')	PeImage.h
20828	CODEVIEW_SIGNATURE_RSDS	SIGNATURE_32('R', 'S', 'D', 'S')	PeImage.h
20829	EFI_TE_IMAGE_HEADER_SIGNATURE	SIGNATURE_16('V', 'Z')	PeImage.h
20830	EFI_TE_IMAGE_DIRECTORY_ENTRY_BA	0	PeImage.h
20831	EFI_TE_IMAGE_DIRECTORY_ENTRY_DE	1	PeImage.h
20832	BOOT_WITH_FULL_CONFIGURATION	0x00	PiBootMode.h
20833	BOOT_WITH_MINIMAL_CONFIGURATION	0x01	PiBootMode.h
20834	BOOT_ASSUMING_NO_CONFIGURATION_	0x02	PiBootMode.h
20835	BOOT_WITH_FULL_CONFIGURATION_PL	0x03	PiBootMode.h
20836	BOOT_WITH_DEFAULT_SETTINGS	0x04	PiBootMode.h
20837	BOOT_ON_S4_RESUME	0x05	PiBootMode.h
20838	BOOT_ON_S5_RESUME	0x06	PiBootMode.h
20839	BOOT_ON_S2_RESUME	0x10	PiBootMode.h
20840	BOOT_ON_S3_RESUME	0x11	PiBootMode.h
20841	BOOT_ON_FLASH_UPDATE	0x12	PiBootMode.h
20842	BOOT_IN_RECOVERY_MODE	0x20	PiBootMode.h
20843	EFI_DEP_BEFORE	0x00	PiDependency.h
20844	EFI_DEP_AFTER	0x01	PiDependency.h
20845	EFI_DEP_PUSH	0x02	PiDependency.h
20846	EFI_DEP_AND	0x03	PiDependency.h
20847	EFI_DEP_OR	0x04	PiDependency.h
20848	EFI_DEP_NOT	0x05	PiDependency.h
20849	EFI_DEP_TRUE	0x06	PiDependency.h
20850	EFI_DEP_FALSE	0x07	PiDependency.h
20851	EFI_DEP_END	0x08	PiDependency.h
20852	EFI_DEP_SOR	0x09	PiDependency.h
20853	DXE_SERVICES_SIGNATURE	0x565245535f455844ULL	PiDxeCis.h
20854	DXE_SERVICES_REVISION	((1<<16) \| (00))	PiDxeCis.h
20855	EFI_FV_FILETYPE_ALL	0x00	PiFirmwareFile.h
20856	EFI_FV_FILETYPE_RAW	0x01	PiFirmwareFile.h
20857	EFI_FV_FILETYPE_FREEFORM	0x02	PiFirmwareFile.h
20858	EFI_FV_FILETYPE_SECURITY_CORE	0x03	PiFirmwareFile.h
20859	EFI_FV_FILETYPE_PEI_CORE	0x04	PiFirmwareFile.h
20860	EFI_FV_FILETYPE_DXE_CORE	0x05	PiFirmwareFile.h
20861	EFI_FV_FILETYPE_PEIM	0x06	PiFirmwareFile.h
20862	EFI_FV_FILETYPE_DRIVER	0x07	PiFirmwareFile.h
20863	EFI_FV_FILETYPE_COMBINED_PEIM_D	0x08	PiFirmwareFile.h
20864	EFI_FV_FILETYPE_APPLICATION	0x09	PiFirmwareFile.h
20865	EFI_FV_FILETYPE_FIRMWARE_VOLUME	0x0B	PiFirmwareFile.h
20866	EFI_FV_FILETYPE_OEM_MIN	0xc0	PiFirmwareFile.h
20867	EFI_FV_FILETYPE_OEM_MAX	0xdf	PiFirmwareFile.h
20868	EFI_FV_FILETYPE_DEBUG_MIN	0xe0	PiFirmwareFile.h
20869	EFI_FV_FILETYPE_DEBUG_MAX	0xef	PiFirmwareFile.h
20870	EFI_FV_FILETYPE_FFS_MIN	0xf0	PiFirmwareFile.h
20871	EFI_FV_FILETYPE_FFS_MAX	0xff	PiFirmwareFile.h
20872	EFI_FV_FILETYPE_FFS_PAD	0xf0	PiFirmwareFile.h
20873	FFS_ATTRIB_FIXED	0x04	PiFirmwareFile.h
20874	FFS_ATTRIB_DATA_ALIGNMENT	0x38	PiFirmwareFile.h
20875	FFS_ATTRIB_CHECKSUM	0x40	PiFirmwareFile.h
20876	EFI_FILE_HEADER_CONSTRUCTION	0x01	PiFirmwareFile.h
20877	EFI_FILE_HEADER_VALID	0x02	PiFirmwareFile.h
20878	EFI_FILE_DATA_VALID	0x04	PiFirmwareFile.h
20879	EFI_FILE_MARKED_FOR_UPDATE	0x08	PiFirmwareFile.h
20880	EFI_FILE_DELETED	0x10	PiFirmwareFile.h
20881	EFI_FILE_HEADER_INVALID	0x20	PiFirmwareFile.h
20882	EFI_SECTION_ALL	0x00	PiFirmwareFile.h
20883	EFI_SECTION_COMPRESSION	0x01	PiFirmwareFile.h
20884	EFI_SECTION_GUID_DEFINED	0x02	PiFirmwareFile.h
20885	EFI_SECTION_PE32	0x10	PiFirmwareFile.h
20886	EFI_SECTION_PIC	0x11	PiFirmwareFile.h
20887	EFI_SECTION_TE	0x12	PiFirmwareFile.h
20888	EFI_SECTION_DXE_DEPEX	0x13	PiFirmwareFile.h
20889	EFI_SECTION_VERSION	0x14	PiFirmwareFile.h
20890	EFI_SECTION_USER_INTERFACE	0x15	PiFirmwareFile.h
20891	EFI_SECTION_COMPATIBILITY16	0x16	PiFirmwareFile.h
20892	EFI_SECTION_FIRMWARE_VOLUME_IMA	0x17	PiFirmwareFile.h
20893	EFI_SECTION_FREEFORM_SUBTYPE_GU	0x18	PiFirmwareFile.h
20894	EFI_SECTION_RAW	0x19	PiFirmwareFile.h
20895	EFI_SECTION_PEI_DEPEX	0x1B	PiFirmwareFile.h
20896	EFI_NOT_COMPRESSED	0x00	PiFirmwareFile.h
20897	EFI_STANDARD_COMPRESSION	0x01	PiFirmwareFile.h
20898	EFI_GUIDED_SECTION_PROCESSING_R	0x01	PiFirmwareFile.h
20899	EFI_GUIDED_SECTION_AUTH_STATUS_	0x02	PiFirmwareFile.h
20900	EFI_FV_FILE_ATTRIB_ALIGNMENT	0x0000001F	PiFirmwareVolume.h
20901	EFI_FV_FILE_ATTRIB_FIXED	0x00000100	PiFirmwareVolume.h
20902	EFI_FV_FILE_ATTRIB_MEMORY_MAPPE	0x00000200	PiFirmwareVolume.h
20903	EFI_FVB2_READ_DISABLED_CAP	0x00000001	PiFirmwareVolume.h
20904	EFI_FVB2_READ_ENABLED_CAP	0x00000002	PiFirmwareVolume.h
20905	EFI_FVB2_READ_STATUS	0x00000004	PiFirmwareVolume.h
20906	EFI_FVB2_WRITE_DISABLED_CAP	0x00000008	PiFirmwareVolume.h
20907	EFI_FVB2_WRITE_ENABLED_CAP	0x00000010	PiFirmwareVolume.h
20908	EFI_FVB2_WRITE_STATUS	0x00000020	PiFirmwareVolume.h
20909	EFI_FVB2_LOCK_CAP	0x00000040	PiFirmwareVolume.h
20910	EFI_FVB2_LOCK_STATUS	0x00000080	PiFirmwareVolume.h
20911	EFI_FVB2_STICKY_WRITE	0x00000200	PiFirmwareVolume.h
20912	EFI_FVB2_MEMORY_MAPPED	0x00000400	PiFirmwareVolume.h
20913	EFI_FVB2_ERASE_POLARITY	0x00000800	PiFirmwareVolume.h
20914	EFI_FVB2_READ_LOCK_CAP	0x00001000	PiFirmwareVolume.h
20915	EFI_FVB2_READ_LOCK_STATUS	0x00002000	PiFirmwareVolume.h
20916	EFI_FVB2_WRITE_LOCK_CAP	0x00004000	PiFirmwareVolume.h
20917	EFI_FVB2_WRITE_LOCK_STATUS	0x00008000	PiFirmwareVolume.h
20918	EFI_FVB2_ALIGNMENT	0x001F0000	PiFirmwareVolume.h
20919	EFI_FVB2_ALIGNMENT_1	0x00000000	PiFirmwareVolume.h
20920	EFI_FVB2_ALIGNMENT_2	0x00010000	PiFirmwareVolume.h
20921	EFI_FVB2_ALIGNMENT_4	0x00020000	PiFirmwareVolume.h
20922	EFI_FVB2_ALIGNMENT_8	0x00030000	PiFirmwareVolume.h
20923	EFI_FVB2_ALIGNMENT_16	0x00040000	PiFirmwareVolume.h
20924	EFI_FVB2_ALIGNMENT_32	0x00050000	PiFirmwareVolume.h
20925	EFI_FVB2_ALIGNMENT_64	0x00060000	PiFirmwareVolume.h
20926	EFI_FVB2_ALIGNMENT_128	0x00070000	PiFirmwareVolume.h
20927	EFI_FVB2_ALIGNMENT_256	0x00080000	PiFirmwareVolume.h
20928	EFI_FVB2_ALIGNMENT_512	0x00090000	PiFirmwareVolume.h
20929	EFI_FVB2_ALIGNMENT_1K	0x000A0000	PiFirmwareVolume.h
20930	EFI_FVB2_ALIGNMENT_2K	0x000B0000	PiFirmwareVolume.h
20931	EFI_FVB2_ALIGNMENT_4K	0x000C0000	PiFirmwareVolume.h
20932	EFI_FVB2_ALIGNMENT_8K	0x000D0000	PiFirmwareVolume.h
20933	EFI_FVB2_ALIGNMENT_16K	0x000E0000	PiFirmwareVolume.h
20934	EFI_FVB2_ALIGNMENT_32K	0x000F0000	PiFirmwareVolume.h
20935	EFI_FVB2_ALIGNMENT_64K	0x00100000	PiFirmwareVolume.h
20936	EFI_FVB2_ALIGNMENT_128K	0x00110000	PiFirmwareVolume.h
20937	EFI_FVB2_ALIGNMENT_256K	0x00120000	PiFirmwareVolume.h
20938	EFI_FVB2_ALIGNMNET_512K	0x00130000	PiFirmwareVolume.h
20939	EFI_FVB2_ALIGNMENT_1M	0x00140000	PiFirmwareVolume.h
20940	EFI_FVB2_ALIGNMENT_2M	0x00150000	PiFirmwareVolume.h
20941	EFI_FVB2_ALIGNMENT_4M	0x00160000	PiFirmwareVolume.h
20942	EFI_FVB2_ALIGNMENT_8M	0x00170000	PiFirmwareVolume.h
20943	EFI_FVB2_ALIGNMENT_16M	0x00180000	PiFirmwareVolume.h
20944	EFI_FVB2_ALIGNMENT_32M	0x00190000	PiFirmwareVolume.h
20945	EFI_FVB2_ALIGNMENT_64M	0x001A0000	PiFirmwareVolume.h
20946	EFI_FVB2_ALIGNMENT_128M	0x001B0000	PiFirmwareVolume.h
20947	EFI_FVB2_ALIGNMENT_256M	0x001C0000	PiFirmwareVolume.h
20948	EFI_FVB2_ALIGNMENT_512M	0x001D0000	PiFirmwareVolume.h
20949	EFI_FVB2_ALIGNMENT_1G	0x001E0000	PiFirmwareVolume.h
20950	EFI_FVB2_ALIGNMENT_2G	0x001F0000	PiFirmwareVolume.h
20951	EFI_FVH_SIGNATURE	EFI_SIGNATURE_32 ('_', 'F', 'V', 'H')	PiFirmwareVolume.h
20952	EFI_FVH_REVISION	0x02	PiFirmwareVolume.h
20953	EFI_FV_EXT_TYPE_OEM_TYPE	0x01	PiFirmwareVolume.h
20954	EFI_HOB_TYPE_HANDOFF	0x0001	PiHob.h
20955	EFI_HOB_TYPE_MEMORY_ALLOCATION	0x0002	PiHob.h
20956	EFI_HOB_TYPE_RESOURCE_DESCRIPTO	0x0003	PiHob.h
20957	EFI_HOB_TYPE_GUID_EXTENSION	0x0004	PiHob.h
20958	EFI_HOB_TYPE_FV	0x0005	PiHob.h
20959	EFI_HOB_TYPE_CPU	0x0006	PiHob.h
20960	EFI_HOB_TYPE_MEMORY_POOL	0x0007	PiHob.h
20961	EFI_HOB_TYPE_FV2	0x0009	PiHob.h
20962	EFI_HOB_TYPE_LOAD_PEIM	0x000A	PiHob.h
20963	EFI_HOB_TYPE_UNUSED	0xFFFE	PiHob.h
20964	EFI_HOB_TYPE_END_OF_HOB_LIST	0xFFFF	PiHob.h
20965	EFI_HOB_HANDOFF_TABLE_VERSION	0x0009	PiHob.h
20966	EFI_RESOURCE_SYSTEM_MEMORY	0x00000000	PiHob.h
20967	EFI_RESOURCE_MEMORY_MAPPED_IO	0x00000001	PiHob.h
20968	EFI_RESOURCE_IO	0x00000002	PiHob.h
20969	EFI_RESOURCE_FIRMWARE_DEVICE	0x00000003	PiHob.h
20970	EFI_RESOURCE_MEMORY_MAPPED_IO_P	0x00000004	PiHob.h
20971	EFI_RESOURCE_MEMORY_RESERVED	0x00000005	PiHob.h
20972	EFI_RESOURCE_IO_RESERVED	0x00000006	PiHob.h
20973	EFI_RESOURCE_MAX_MEMORY_TYPE	0x00000007	PiHob.h
20974	EFI_RESOURCE_ATTRIBUTE_PRESENT	0x00000001	PiHob.h
20975	EFI_RESOURCE_ATTRIBUTE_INITIALI	0x00000002	PiHob.h
20976	EFI_RESOURCE_ATTRIBUTE_TESTED	0x00000004	PiHob.h
20977	EFI_RESOURCE_ATTRIBUTE_SINGLE_B	0x00000008	PiHob.h
20978	EFI_RESOURCE_ATTRIBUTE_MULTIPLE	0x00000010	PiHob.h
20979	EFI_RESOURCE_ATTRIBUTE_ECC_RESE	0x00000020	PiHob.h
20980	EFI_RESOURCE_ATTRIBUTE_ECC_RESE	0x00000040	PiHob.h
20981	EFI_RESOURCE_ATTRIBUTE_READ_PRO	0x00000080	PiHob.h
20982	EFI_RESOURCE_ATTRIBUTE_WRITE_PR	0x00000100	PiHob.h
20983	EFI_RESOURCE_ATTRIBUTE_EXECUTIO	0x00000200	PiHob.h
20984	EFI_RESOURCE_ATTRIBUTE_UNCACHEA	0x00000400	PiHob.h
20985	EFI_RESOURCE_ATTRIBUTE_WRITE_CO	0x00000800	PiHob.h
20986	EFI_RESOURCE_ATTRIBUTE_WRITE_TH	0x00001000	PiHob.h
20987	EFI_RESOURCE_ATTRIBUTE_WRITE_BA	0x00002000	PiHob.h
20988	EFI_RESOURCE_ATTRIBUTE_16_BIT_I	0x00004000	PiHob.h
20989	EFI_RESOURCE_ATTRIBUTE_32_BIT_I	0x00008000	PiHob.h
20990	EFI_RESOURCE_ATTRIBUTE_64_BIT_I	0x00010000	PiHob.h
20991	EFI_RESOURCE_ATTRIBUTE_UNCACHED	0x00020000	PiHob.h
20992	EFI_NOT_AVAILABLE_YET	EFIERR (32)	PiMultiPhase.h
20993	EFI_STATUS_CODE_TYPE_MASK	0x000000FF	PiMultiPhase.h
20994	EFI_STATUS_CODE_SEVERITY_MASK	0xFF000000	PiMultiPhase.h
20995	EFI_STATUS_CODE_RESERVED_MASK	0x00FFFF00	PiMultiPhase.h
20996	EFI_PROGRESS_CODE	0x00000001	PiMultiPhase.h
20997	EFI_ERROR_CODE	0x00000002	PiMultiPhase.h
20998	EFI_DEBUG_CODE	0x00000003	PiMultiPhase.h
20999	EFI_ERROR_MINOR	0x40000000	PiMultiPhase.h
21000	EFI_ERROR_MAJOR	0x80000000	PiMultiPhase.h
21001	EFI_ERROR_UNRECOVERED	0x90000000	PiMultiPhase.h
21002	EFI_ERROR_UNCONTAINED	0xa0000000	PiMultiPhase.h
21003	EFI_STATUS_CODE_CLASS_MASK	0xFF000000	PiMultiPhase.h
21004	EFI_STATUS_CODE_SUBCLASS_MASK	0x00FF0000	PiMultiPhase.h
21005	EFI_STATUS_CODE_OPERATION_MASK	0x0000FFFF	PiMultiPhase.h
21006	EFI_AUTH_STATUS_PLATFORM_OVERRI	0x01	PiMultiPhase.h
21007	EFI_AUTH_STATUS_IMAGE_SIGNED	0x02	PiMultiPhase.h
21008	EFI_AUTH_STATUS_NOT_TESTED	0x04	PiMultiPhase.h
21009	EFI_AUTH_STATUS_TEST_FAILED	0x08	PiMultiPhase.h
21010	EFI_AUTH_STATUS_ALL	0x0f	PiMultiPhase.h
21011	EFI_COMPONENT_NAME2_PROTOCOL_GU	{0x6a7a5cff, 0xe8d9, 0x4f70, { 0xba, 0xda, 0x75, 0xab, 0x30, 0x25, 0xce, 0x14 } }	ComponentName2.h
21012	EFI_CPU_ARCH_PROTOCOL_GUID	{ 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }	Cpu.h
21013	EFI_CPU_IO_PROTOCOL_GUID	{ \ 0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \ }	CpuIo.h
21014	EFI_DEBUG_SUPPORT_PROTOCOL_GUID	{ \ 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \ }	DebugSupport.h
21015	EXCEPT_IA32_DIVIDE_ERROR	0	DebugSupport.h
21016	EXCEPT_IA32_DEBUG	1	DebugSupport.h
21017	EXCEPT_IA32_NMI	2	DebugSupport.h
21018	EXCEPT_IA32_BREAKPOINT	3	DebugSupport.h
21019	EXCEPT_IA32_OVERFLOW	4	DebugSupport.h
21020	EXCEPT_IA32_BOUND	5	DebugSupport.h
21021	EXCEPT_IA32_INVALID_OPCODE	6	DebugSupport.h
21022	EXCEPT_IA32_DOUBLE_FAULT	8	DebugSupport.h
21023	EXCEPT_IA32_INVALID_TSS	10	DebugSupport.h
21024	EXCEPT_IA32_SEG_NOT_PRESENT	11	DebugSupport.h
21025	EXCEPT_IA32_STACK_FAULT	12	DebugSupport.h
21026	EXCEPT_IA32_GP_FAULT	13	DebugSupport.h
21027	EXCEPT_IA32_PAGE_FAULT	14	DebugSupport.h
21028	EXCEPT_IA32_FP_ERROR	16	DebugSupport.h
21029	EXCEPT_IA32_ALIGNMENT_CHECK	17	DebugSupport.h
21030	EXCEPT_IA32_MACHINE_CHECK	18	DebugSupport.h
21031	EXCEPT_IA32_SIMD	19	DebugSupport.h
21032	EXCEPT_X64_DIVIDE_ERROR	0	DebugSupport.h
21033	EXCEPT_X64_DEBUG	1	DebugSupport.h
21034	EXCEPT_X64_NMI	2	DebugSupport.h
21035	EXCEPT_X64_BREAKPOINT	3	DebugSupport.h
21036	EXCEPT_X64_OVERFLOW	4	DebugSupport.h
21037	EXCEPT_X64_BOUND	5	DebugSupport.h
21038	EXCEPT_X64_INVALID_OPCODE	6	DebugSupport.h
21039	EXCEPT_X64_DOUBLE_FAULT	8	DebugSupport.h
21040	EXCEPT_X64_INVALID_TSS	10	DebugSupport.h
21041	EXCEPT_X64_SEG_NOT_PRESENT	11	DebugSupport.h
21042	EXCEPT_X64_STACK_FAULT	12	DebugSupport.h
21043	EXCEPT_X64_GP_FAULT	13	DebugSupport.h
21044	EXCEPT_X64_PAGE_FAULT	14	DebugSupport.h
21045	EXCEPT_X64_FP_ERROR	16	DebugSupport.h
21046	EXCEPT_X64_ALIGNMENT_CHECK	17	DebugSupport.h
21047	EXCEPT_X64_MACHINE_CHECK	18	DebugSupport.h
21048	EXCEPT_X64_SIMD	19	DebugSupport.h
21049	EXCEPT_IPF_VHTP_TRANSLATION	0	DebugSupport.h
21050	EXCEPT_IPF_INSTRUCTION_TLB	1	DebugSupport.h
21051	EXCEPT_IPF_DATA_TLB	2	DebugSupport.h
21052	EXCEPT_IPF_ALT_INSTRUCTION_TLB	3	DebugSupport.h
21053	EXCEPT_IPF_ALT_DATA_TLB	4	DebugSupport.h
21054	EXCEPT_IPF_DATA_NESTED_TLB	5	DebugSupport.h
21055	EXCEPT_IPF_INSTRUCTION_KEY_MISS	6	DebugSupport.h
21056	EXCEPT_IPF_DATA_KEY_MISSED	7	DebugSupport.h
21057	EXCEPT_IPF_DIRTY_BIT	8	DebugSupport.h
21058	EXCEPT_IPF_INSTRUCTION_ACCESS_B	9	DebugSupport.h
21059	EXCEPT_IPF_DATA_ACCESS_BIT	10	DebugSupport.h
21060	EXCEPT_IPF_BREAKPOINT	11	DebugSupport.h
21061	EXCEPT_IPF_EXTERNAL_INTERRUPT	12	DebugSupport.h
21062	EXCEPT_IPF_PAGE_NOT_PRESENT	20	DebugSupport.h
21063	EXCEPT_IPF_KEY_PERMISSION	21	DebugSupport.h
21064	EXCEPT_IPF_INSTRUCTION_ACCESS_R	22	DebugSupport.h
21065	EXCEPT_IPF_DATA_ACCESS_RIGHTS	23	DebugSupport.h
21066	EXCEPT_IPF_GENERAL_EXCEPTION	24	DebugSupport.h
21067	EXCEPT_IPF_DISABLED_FP_REGISTER	25	DebugSupport.h
21068	EXCEPT_IPF_NAT_CONSUMPTION	26	DebugSupport.h
21069	EXCEPT_IPF_SPECULATION	27	DebugSupport.h
21070	EXCEPT_IPF_DEBUG	29	DebugSupport.h
21071	EXCEPT_IPF_UNALIGNED_REFERENCE	30	DebugSupport.h
21072	EXCEPT_IPF_UNSUPPORTED_DATA_REF	31	DebugSupport.h
21073	EXCEPT_IPF_FP_FAULT	32	DebugSupport.h
21074	EXCEPT_IPF_FP_TRAP	33	DebugSupport.h
21075	EXCEPT_IPF_LOWER_PRIVILEGE_TRAN	34	DebugSupport.h
21076	EXCEPT_IPF_TAKEN_BRANCH	35	DebugSupport.h
21077	EXCEPT_IPF_SINGLE_STEP	36	DebugSupport.h
21078	EXCEPT_IPF_IA32_EXCEPTION	45	DebugSupport.h
21079	EXCEPT_IPF_IA32_INTERCEPT	46	DebugSupport.h
21080	EXCEPT_IPF_IA32_INTERRUPT	47	DebugSupport.h
21081	EXCEPT_EBC_UNDEFINED	0	DebugSupport.h
21082	EXCEPT_EBC_DIVIDE_ERROR	1	DebugSupport.h
21083	EXCEPT_EBC_DEBUG	2	DebugSupport.h
21084	EXCEPT_EBC_BREAKPOINT	3	DebugSupport.h
21085	EXCEPT_EBC_OVERFLOW	4	DebugSupport.h
21086	EXCEPT_EBC_INVALID_OPCODE	5	DebugSupport.h	opcode out of range
21087	EXCEPT_EBC_STACK_FAULT	6	DebugSupport.h
21088	EXCEPT_EBC_ALIGNMENT_CHECK	7	DebugSupport.h
21089	EXCEPT_EBC_INSTRUCTION_ENCODING	8	DebugSupport.h	malformed instruction
21090	EXCEPT_EBC_BAD_BREAK	9	DebugSupport.h	BREAK 0 or undefined BREAK
21091	EXCEPT_EBC_STEP	10	DebugSupport.h	to support debug stepping
21092	MAX_EBC_EXCEPTION	EXCEPT_EBC_STEP	DebugSupport.h
21093	EFI_DEVICE_PATH_PROTOCOL_GUID	{ \ 0x9576e91, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	DevicePath.h
21094	DEVICE_PATH_PROTOCOL	EFI_DEVICE_PATH_PROTOCOL_GUID	DevicePath.h
21095	HARDWARE_DEVICE_PATH	0x01	DevicePath.h
21096	HW_PCI_DP	0x01	DevicePath.h
21097	HW_PCCARD_DP	0x02	DevicePath.h
21098	HW_MEMMAP_DP	0x03	DevicePath.h
21099	HW_VENDOR_DP	0x04	DevicePath.h
21100	HW_CONTROLLER_DP	0x05	DevicePath.h
21101	ACPI_DEVICE_PATH	0x02	DevicePath.h
21102	ACPI_DP	0x01	DevicePath.h
21103	ACPI_EXTENDED_DP	0x02	DevicePath.h
21104	PNP_EISA_ID_CONST	0x41d0	DevicePath.h
21105	PNP_EISA_ID_MASK	0xffff	DevicePath.h
21106	ACPI_ADR_DP	0x03	DevicePath.h
21107	ACPI_ADR_DISPLAY_TYPE_OTHER	0	DevicePath.h
21108	ACPI_ADR_DISPLAY_TYPE_VGA	1	DevicePath.h
21109	ACPI_ADR_DISPLAY_TYPE_TV	2	DevicePath.h
21110	ACPI_ADR_DISPLAY_TYPE_EXTERNAL_	3	DevicePath.h
21111	ACPI_ADR_DISPLAY_TYPE_INTERNAL_	4	DevicePath.h
21112	MESSAGING_DEVICE_PATH	0x03	DevicePath.h
21113	MSG_ATAPI_DP	0x01	DevicePath.h
21114	MSG_SCSI_DP	0x02	DevicePath.h
21115	MSG_FIBRECHANNEL_DP	0x03	DevicePath.h
21116	MSG_1394_DP	0x04	DevicePath.h
21117	MSG_USB_DP	0x05	DevicePath.h
21118	MSG_USB_CLASS_DP	0x0f	DevicePath.h
21119	MSG_USB_WWID_DP	0x10	DevicePath.h
21120	MSG_DEVICE_LOGICAL_UNIT_DP	0x11	DevicePath.h
21121	MSG_SATA_DP	0x12	DevicePath.h
21122	MSG_I2O_DP	0x06	DevicePath.h
21123	MSG_MAC_ADDR_DP	0x0b	DevicePath.h
21124	MSG_IPv4_DP	0x0c	DevicePath.h
21125	MSG_IPv6_DP	0x0d	DevicePath.h
21126	MSG_INFINIBAND_DP	0x09	DevicePath.h
21127	INFINIBAND_RESOURCE_FLAG_IOC_SE	0x01	DevicePath.h
21128	INFINIBAND_RESOURCE_FLAG_EXTEND	0x02	DevicePath.h
21129	INFINIBAND_RESOURCE_FLAG_CONSOL	0x04	DevicePath.h
21130	INFINIBAND_RESOURCE_FLAG_STORAG	0x08	DevicePath.h
21131	INFINIBAND_RESOURCE_FLAG_NETWOR	0x10	DevicePath.h
21132	MSG_UART_DP	0x0e	DevicePath.h
21133	MSG_VENDOR_DP	0x0a	DevicePath.h
21134	DEVICE_PATH_MESSAGING_PC_ANSI	EFI_PC_ANSI_GUID	DevicePath.h
21135	DEVICE_PATH_MESSAGING_VT_100	EFI_VT_100_GUID	DevicePath.h
21136	DEVICE_PATH_MESSAGING_VT_100_PL	EFI_VT_100_PLUS_GUID	DevicePath.h
21137	DEVICE_PATH_MESSAGING_VT_UTF8	EFI_VT_UTF8_GUID	DevicePath.h
21138	DEVICE_PATH_MESSAGING_UART_FLOW	EFI_UART_DEVICE_PATH_GUID	DevicePath.h
21139	DEVICE_PATH_MESSAGING_SAS	EFI_SAS_DEVICE_PATH_GUID	DevicePath.h
21140	MSG_ISCSI_DP	0x13	DevicePath.h
21141	ISCSI_LOGIN_OPTION_NO_HEADER_DI	0x0000	DevicePath.h
21142	ISCSI_LOGIN_OPTION_HEADER_DIGES	0x0002	DevicePath.h
21143	ISCSI_LOGIN_OPTION_NO_DATA_DIGE	0x0000	DevicePath.h
21144	ISCSI_LOGIN_OPTION_DATA_DIGEST_	0x0008	DevicePath.h
21145	ISCSI_LOGIN_OPTION_AUTHMETHOD_C	0x0000	DevicePath.h
21146	ISCSI_LOGIN_OPTION_AUTHMETHOD_N	0x1000	DevicePath.h
21147	ISCSI_LOGIN_OPTION_CHAP_BI	0x0000	DevicePath.h
21148	ISCSI_LOGIN_OPTION_CHAP_UNI	0x2000	DevicePath.h
21149	MEDIA_DEVICE_PATH	0x04	DevicePath.h
21150	MEDIA_HARDDRIVE_DP	0x01	DevicePath.h
21151	MBR_TYPE_PCAT	0x01	DevicePath.h
21152	MBR_TYPE_EFI_PARTITION_TABLE_HE	0x02	DevicePath.h
21153	SIGNATURE_TYPE_MBR	0x01	DevicePath.h
21154	SIGNATURE_TYPE_GUID	0x02	DevicePath.h
21155	MEDIA_CDROM_DP	0x02	DevicePath.h
21156	MEDIA_VENDOR_DP	0x03	DevicePath.h
21157	MEDIA_FILEPATH_DP	0x04	DevicePath.h
21158	SIZE_OF_FILEPATH_DEVICE_PATH	EFI_FIELD_OFFSET(FILEPATH_DEVICE_PATH,PathName)	DevicePath.h
21159	MEDIA_PROTOCOL_DP	0x05	DevicePath.h
21160	MEDIA_PIWG_FW_VOL_DP	0x7	DevicePath.h
21161	MEDIA_PIWG_FW_FILE_DP	0x6	DevicePath.h
21162	BBS_DEVICE_PATH	0x05	DevicePath.h
21163	BBS_BBS_DP	0x01	DevicePath.h
21164	BBS_TYPE_FLOPPY	0x01	DevicePath.h
21165	BBS_TYPE_HARDDRIVE	0x02	DevicePath.h
21166	BBS_TYPE_CDROM	0x03	DevicePath.h
21167	BBS_TYPE_PCMCIA	0x04	DevicePath.h
21168	BBS_TYPE_USB	0x05	DevicePath.h
21169	BBS_TYPE_EMBEDDED_NETWORK	0x06	DevicePath.h
21170	BBS_TYPE_BEV	0x80	DevicePath.h
21171	BBS_TYPE_UNKNOWN	0xFF	DevicePath.h
21172	END_DEVICE_PATH_TYPE	0x7f	DevicePath.h
21173	END_ENTIRE_DEVICE_PATH_SUBTYPE	0xFF	DevicePath.h
21174	END_INSTANCE_DEVICE_PATH_SUBTYP	0x01	DevicePath.h
21175	EFI_DRIVER_BINDING_PROTOCOL_GUI	{ \ 0x18a031ab, 0xb443, 0x4d1a, {0xa5, 0xc0, 0xc, 0x9, 0x26, 0x1e, 0x9f, 0x71 } \ }	DriverBinding.h
21176	EFI_NETWORK_INTERFACE_IDENTIFIE	{ \ 0xE18541CD, 0xF755, 0x4f73, {0x92, 0x8D, 0x64, 0x3C, 0x8A, 0x79, 0xB2, 0x29 } \ }	NetworkInterfaceIdentifier.h
21177	EFI_NETWORK_INTERFACE_IDENTIFIE	0x00010000	NetworkInterfaceIdentifier.h
21178	EFI_NETWORK_INTERFACE_IDENTIFIE	EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION	NetworkInterfaceIdentifier.h
21179	EFI_PCI_IO_PROTOCOL_GUID	{ \ 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \ }	PciIo.h
21180	EFI_PCI_IO_PASS_THROUGH_BAR	0xff	PciIo.h	< Special BAR that passes a memory or I/O cycle through unchanged
21181	EFI_PCI_IO_ATTRIBUTE_MASK	0x077f	PciIo.h	< All the following I/O and Memory cycles
21182	EFI_PCI_IO_ATTRIBUTE_ISA_MOTHER	0x0001	PciIo.h	< I/O cycles 0x0000-0x00FF (10 bit decode)
21183	EFI_PCI_IO_ATTRIBUTE_ISA_IO	0x0002	PciIo.h	< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
21184	EFI_PCI_IO_ATTRIBUTE_VGA_PALETT	0x0004	PciIo.h	< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
21185	EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY	0x0008	PciIo.h	< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
21186	EFI_PCI_IO_ATTRIBUTE_VGA_IO	0x0010	PciIo.h	< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
21187	EFI_PCI_IO_ATTRIBUTE_IDE_PRIMAR	0x0020	PciIo.h	< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
21188	EFI_PCI_IO_ATTRIBUTE_IDE_SECOND	0x0040	PciIo.h	< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
21189	EFI_PCI_IO_ATTRIBUTE_MEMORY_WRI	0x0080	PciIo.h	< Map a memory range so write are combined
21190	EFI_PCI_IO_ATTRIBUTE_IO	0x0100	PciIo.h	< Enable the I/O decode bit in the PCI Config Header
21191	EFI_PCI_IO_ATTRIBUTE_MEMORY	0x0200	PciIo.h	< Enable the Memory decode bit in the PCI Config Header
21192	EFI_PCI_IO_ATTRIBUTE_BUS_MASTER	0x0400	PciIo.h	< Enable the DMA bit in the PCI Config Header
21193	EFI_PCI_IO_ATTRIBUTE_MEMORY_CAC	0x0800	PciIo.h	< Map a memory range so all r/w accesses are cached
21194	EFI_PCI_IO_ATTRIBUTE_MEMORY_DIS	0x1000	PciIo.h	< Disable a memory range
21195	EFI_PCI_IO_ATTRIBUTE_EMBEDDED_D	0x2000	PciIo.h	< Clear for an add-in PCI Device
21196	EFI_PCI_IO_ATTRIBUTE_EMBEDDED_R	0x4000	PciIo.h	< Clear for a physical PCI Option ROM accessed through ROM BAR
21197	EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRE	0x8000	PciIo.h	< Clear for PCI controllers that can not genrate a DAC
21198	EFI_PCI_IO_ATTRIBUTE_ISA_IO_16	0x10000	PciIo.h	< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
21199	EFI_PCI_IO_ATTRIBUTE_VGA_PALETT	0x20000	PciIo.h	< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
21200	EFI_PCI_IO_ATTRIBUTE_VGA_IO_16	0x30000	PciIo.h	< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
21201	EFI_PCI_DEVICE_ENABLE	(EFI_PCI_IO_ATTRIBUTE_IO \| EFI_PCI_IO_ATTRIBUTE_MEMORY \| EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)	PciIo.h
21202	EFI_VGA_DEVICE_ENABLE	(EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO \| EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY \| EFI_PCI_IO_ATTRIBUTE_VGA_IO \| EFI_PCI_IO_ATTRIBUTE_IO)	PciIo.h
21203	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	{ \ 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PciRootBridgeIo.h
21204	EFI_PCI_ATTRIBUTE_ISA_MOTHERBOA	0x0001	PciRootBridgeIo.h
21205	EFI_PCI_ATTRIBUTE_ISA_IO	0x0002	PciRootBridgeIo.h
21206	EFI_PCI_ATTRIBUTE_VGA_PALETTE_I	0x0004	PciRootBridgeIo.h
21207	EFI_PCI_ATTRIBUTE_VGA_MEMORY	0x0008	PciRootBridgeIo.h
21208	EFI_PCI_ATTRIBUTE_VGA_IO	0x0010	PciRootBridgeIo.h
21209	EFI_PCI_ATTRIBUTE_IDE_PRIMARY_I	0x0020	PciRootBridgeIo.h
21210	EFI_PCI_ATTRIBUTE_IDE_SECONDARY	0x0040	PciRootBridgeIo.h
21211	EFI_PCI_ATTRIBUTE_MEMORY_WRITE_	0x0080	PciRootBridgeIo.h
21212	EFI_PCI_ATTRIBUTE_MEMORY_CACHED	0x0800	PciRootBridgeIo.h
21213	EFI_PCI_ATTRIBUTE_MEMORY_DISABL	0x1000	PciRootBridgeIo.h
21214	EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_	0x8000	PciRootBridgeIo.h
21215	EFI_PCI_ATTRIBUTE_VALID_FOR_ALL	(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE \| EFI_PCI_ATTRIBUTE_MEMORY_CACHED \| EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)	PciRootBridgeIo.h
21216	EFI_PCI_ATTRIBUTE_INVALID_FOR_A	(~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)	PciRootBridgeIo.h
21217	EFI_SIMPLE_NETWORK_PROTOCOL_GUI	{ \ 0xA19832B9, 0xAC25, 0x11D3, {0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \ }	SimpleNetwork.h
21218	EFI_SIMPLE_NETWORK_RECEIVE_UNIC	0x01	SimpleNetwork.h
21219	EFI_SIMPLE_NETWORK_RECEIVE_MULT	0x02	SimpleNetwork.h
21220	EFI_SIMPLE_NETWORK_RECEIVE_BROA	0x04	SimpleNetwork.h
21221	EFI_SIMPLE_NETWORK_RECEIVE_PROM	0x08	SimpleNetwork.h
21222	EFI_SIMPLE_NETWORK_RECEIVE_PROM	0x10	SimpleNetwork.h
21223	EFI_SIMPLE_NETWORK_RECEIVE_INTE	0x01	SimpleNetwork.h
21224	EFI_SIMPLE_NETWORK_TRANSMIT_INT	0x02	SimpleNetwork.h
21225	EFI_SIMPLE_NETWORK_COMMAND_INTE	0x04	SimpleNetwork.h
21226	EFI_SIMPLE_NETWORK_SOFTWARE_INT	0x08	SimpleNetwork.h
21227	MAX_MCAST_FILTER_CNT	16	SimpleNetwork.h
21228	EFI_SIMPLE_NETWORK_PROTOCOL_REV	0x00010000	SimpleNetwork.h
21229	EFI_SIMPLE_NETWORK_INTERFACE_RE	EFI_SIMPLE_NETWORK_PROTOCOL_REVISION	SimpleNetwork.h
21230	EFI_SIMPLE_TEXT_INPUT_PROTOCOL_	{ \ 0x387477c1, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	SimpleTextIn.h
21231	SIMPLE_INPUT_PROTOCOL	EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID	SimpleTextIn.h
21232	CHAR_NULL	0x0000	SimpleTextIn.h
21233	CHAR_BACKSPACE	0x0008	SimpleTextIn.h
21234	CHAR_TAB	0x0009	SimpleTextIn.h
21235	CHAR_LINEFEED	0x000A	SimpleTextIn.h
21236	CHAR_CARRIAGE_RETURN	0x000D	SimpleTextIn.h
21237	SCAN_NULL	0x0000	SimpleTextIn.h
21238	SCAN_UP	0x0001	SimpleTextIn.h
21239	SCAN_DOWN	0x0002	SimpleTextIn.h
21240	SCAN_RIGHT	0x0003	SimpleTextIn.h
21241	SCAN_LEFT	0x0004	SimpleTextIn.h
21242	SCAN_HOME	0x0005	SimpleTextIn.h
21243	SCAN_END	0x0006	SimpleTextIn.h
21244	SCAN_INSERT	0x0007	SimpleTextIn.h
21245	SCAN_DELETE	0x0008	SimpleTextIn.h
21246	SCAN_PAGE_UP	0x0009	SimpleTextIn.h
21247	SCAN_PAGE_DOWN	0x000A	SimpleTextIn.h
21248	SCAN_F1	0x000B	SimpleTextIn.h
21249	SCAN_F2	0x000C	SimpleTextIn.h
21250	SCAN_F3	0x000D	SimpleTextIn.h
21251	SCAN_F4	0x000E	SimpleTextIn.h
21252	SCAN_F5	0x000F	SimpleTextIn.h
21253	SCAN_F6	0x0010	SimpleTextIn.h
21254	SCAN_F7	0x0011	SimpleTextIn.h
21255	SCAN_F8	0x0012	SimpleTextIn.h
21256	SCAN_F9	0x0013	SimpleTextIn.h
21257	SCAN_F10	0x0014	SimpleTextIn.h
21258	SCAN_F11	0x0015	SimpleTextIn.h
21259	SCAN_F12	0x0016	SimpleTextIn.h
21260	SCAN_ESC	0x0017	SimpleTextIn.h
21261	EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL	{ \ 0x387477c2, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	SimpleTextOut.h
21262	SIMPLE_TEXT_OUTPUT_PROTOCOL	EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID	SimpleTextOut.h
21263	BOXDRAW_HORIZONTAL	0x2500	SimpleTextOut.h
21264	BOXDRAW_VERTICAL	0x2502	SimpleTextOut.h
21265	BOXDRAW_DOWN_RIGHT	0x250c	SimpleTextOut.h
21266	BOXDRAW_DOWN_LEFT	0x2510	SimpleTextOut.h
21267	BOXDRAW_UP_RIGHT	0x2514	SimpleTextOut.h
21268	BOXDRAW_UP_LEFT	0x2518	SimpleTextOut.h
21269	BOXDRAW_VERTICAL_RIGHT	0x251c	SimpleTextOut.h
21270	BOXDRAW_VERTICAL_LEFT	0x2524	SimpleTextOut.h
21271	BOXDRAW_DOWN_HORIZONTAL	0x252c	SimpleTextOut.h
21272	BOXDRAW_UP_HORIZONTAL	0x2534	SimpleTextOut.h
21273	BOXDRAW_VERTICAL_HORIZONTAL	0x253c	SimpleTextOut.h
21274	BOXDRAW_DOUBLE_HORIZONTAL	0x2550	SimpleTextOut.h
21275	BOXDRAW_DOUBLE_VERTICAL	0x2551	SimpleTextOut.h
21276	BOXDRAW_DOWN_RIGHT_DOUBLE	0x2552	SimpleTextOut.h
21277	BOXDRAW_DOWN_DOUBLE_RIGHT	0x2553	SimpleTextOut.h
21278	BOXDRAW_DOUBLE_DOWN_RIGHT	0x2554	SimpleTextOut.h
21279	BOXDRAW_DOWN_LEFT_DOUBLE	0x2555	SimpleTextOut.h
21280	BOXDRAW_DOWN_DOUBLE_LEFT	0x2556	SimpleTextOut.h
21281	BOXDRAW_DOUBLE_DOWN_LEFT	0x2557	SimpleTextOut.h
21282	BOXDRAW_UP_RIGHT_DOUBLE	0x2558	SimpleTextOut.h
21283	BOXDRAW_UP_DOUBLE_RIGHT	0x2559	SimpleTextOut.h
21284	BOXDRAW_DOUBLE_UP_RIGHT	0x255a	SimpleTextOut.h
21285	BOXDRAW_UP_LEFT_DOUBLE	0x255b	SimpleTextOut.h
21286	BOXDRAW_UP_DOUBLE_LEFT	0x255c	SimpleTextOut.h
21287	BOXDRAW_DOUBLE_UP_LEFT	0x255d	SimpleTextOut.h
21288	BOXDRAW_VERTICAL_RIGHT_DOUBLE	0x255e	SimpleTextOut.h
21289	BOXDRAW_VERTICAL_DOUBLE_RIGHT	0x255f	SimpleTextOut.h
21290	BOXDRAW_DOUBLE_VERTICAL_RIGHT	0x2560	SimpleTextOut.h
21291	BOXDRAW_VERTICAL_LEFT_DOUBLE	0x2561	SimpleTextOut.h
21292	BOXDRAW_VERTICAL_DOUBLE_LEFT	0x2562	SimpleTextOut.h
21293	BOXDRAW_DOUBLE_VERTICAL_LEFT	0x2563	SimpleTextOut.h
21294	BOXDRAW_DOWN_HORIZONTAL_DOUBLE	0x2564	SimpleTextOut.h
21295	BOXDRAW_DOWN_DOUBLE_HORIZONTAL	0x2565	SimpleTextOut.h
21296	BOXDRAW_DOUBLE_DOWN_HORIZONTAL	0x2566	SimpleTextOut.h
21297	BOXDRAW_UP_HORIZONTAL_DOUBLE	0x2567	SimpleTextOut.h
21298	BOXDRAW_UP_DOUBLE_HORIZONTAL	0x2568	SimpleTextOut.h
21299	BOXDRAW_DOUBLE_UP_HORIZONTAL	0x2569	SimpleTextOut.h
21300	BOXDRAW_VERTICAL_HORIZONTAL_DOU	0x256a	SimpleTextOut.h
21301	BOXDRAW_VERTICAL_DOUBLE_HORIZON	0x256b	SimpleTextOut.h
21302	BOXDRAW_DOUBLE_VERTICAL_HORIZON	0x256c	SimpleTextOut.h
21303	BLOCKELEMENT_FULL_BLOCK	0x2588	SimpleTextOut.h
21304	BLOCKELEMENT_LIGHT_SHADE	0x2591	SimpleTextOut.h
21305	GEOMETRICSHAPE_UP_TRIANGLE	0x25b2	SimpleTextOut.h
21306	GEOMETRICSHAPE_RIGHT_TRIANGLE	0x25ba	SimpleTextOut.h
21307	GEOMETRICSHAPE_DOWN_TRIANGLE	0x25bc	SimpleTextOut.h
21308	GEOMETRICSHAPE_LEFT_TRIANGLE	0x25c4	SimpleTextOut.h
21309	ARROW_LEFT	0x2190	SimpleTextOut.h
21310	ARROW_UP	0x2191	SimpleTextOut.h
21311	ARROW_RIGHT	0x2192	SimpleTextOut.h
21312	ARROW_DOWN	0x2193	SimpleTextOut.h
21313	EFI_BLACK	0x00	SimpleTextOut.h
21314	EFI_BLUE	0x01	SimpleTextOut.h
21315	EFI_GREEN	0x02	SimpleTextOut.h
21316	EFI_CYAN	(EFI_BLUE \| EFI_GREEN)	SimpleTextOut.h
21317	EFI_RED	0x04	SimpleTextOut.h
21318	EFI_MAGENTA	(EFI_BLUE \| EFI_RED)	SimpleTextOut.h
21319	EFI_BROWN	(EFI_GREEN \| EFI_RED)	SimpleTextOut.h
21320	EFI_LIGHTGRAY	(EFI_BLUE \| EFI_GREEN \| EFI_RED)	SimpleTextOut.h
21321	EFI_BRIGHT	0x08	SimpleTextOut.h
21322	EFI_DARKGRAY	(EFI_BRIGHT)	SimpleTextOut.h
21323	EFI_LIGHTBLUE	(EFI_BLUE \| EFI_BRIGHT)	SimpleTextOut.h
21324	EFI_LIGHTGREEN	(EFI_GREEN \| EFI_BRIGHT)	SimpleTextOut.h
21325	EFI_LIGHTCYAN	(EFI_CYAN \| EFI_BRIGHT)	SimpleTextOut.h
21326	EFI_LIGHTRED	(EFI_RED \| EFI_BRIGHT)	SimpleTextOut.h
21327	EFI_LIGHTMAGENTA	(EFI_MAGENTA \| EFI_BRIGHT)	SimpleTextOut.h
21328	EFI_YELLOW	(EFI_BROWN \| EFI_BRIGHT)	SimpleTextOut.h
21329	EFI_WHITE	(EFI_BLUE \| EFI_GREEN \| EFI_RED \| EFI_BRIGHT)	SimpleTextOut.h
21330	EFI_BACKGROUND_BLACK	0x00	SimpleTextOut.h
21331	EFI_BACKGROUND_BLUE	0x10	SimpleTextOut.h
21332	EFI_BACKGROUND_GREEN	0x20	SimpleTextOut.h
21333	EFI_BACKGROUND_CYAN	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_GREEN)	SimpleTextOut.h
21334	EFI_BACKGROUND_RED	0x40	SimpleTextOut.h
21335	EFI_BACKGROUND_MAGENTA	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_RED)	SimpleTextOut.h
21336	EFI_BACKGROUND_BROWN	(EFI_BACKGROUND_GREEN \| EFI_BACKGROUND_RED)	SimpleTextOut.h
21337	EFI_BACKGROUND_LIGHTGRAY	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_GREEN \| EFI_BACKGROUND_RED)	SimpleTextOut.h
21338	EFI_WIDE_ATTRIBUTE	0x80	SimpleTextOut.h
21339	EFI_SUCCESS	RETURN_SUCCESS	UefiBaseType.h
21340	EFI_LOAD_ERROR	RETURN_LOAD_ERROR	UefiBaseType.h
21341	EFI_INVALID_PARAMETER	RETURN_INVALID_PARAMETER	UefiBaseType.h
21342	EFI_UNSUPPORTED	RETURN_UNSUPPORTED	UefiBaseType.h
21343	EFI_BAD_BUFFER_SIZE	RETURN_BAD_BUFFER_SIZE	UefiBaseType.h
21344	EFI_BUFFER_TOO_SMALL	RETURN_BUFFER_TOO_SMALL	UefiBaseType.h
21345	EFI_NOT_READY	RETURN_NOT_READY	UefiBaseType.h
21346	EFI_DEVICE_ERROR	RETURN_DEVICE_ERROR	UefiBaseType.h
21347	EFI_WRITE_PROTECTED	RETURN_WRITE_PROTECTED	UefiBaseType.h
21348	EFI_OUT_OF_RESOURCES	RETURN_OUT_OF_RESOURCES	UefiBaseType.h
21349	EFI_VOLUME_CORRUPTED	RETURN_VOLUME_CORRUPTED	UefiBaseType.h
21350	EFI_VOLUME_FULL	RETURN_VOLUME_FULL	UefiBaseType.h
21351	EFI_NO_MEDIA	RETURN_NO_MEDIA	UefiBaseType.h
21352	EFI_MEDIA_CHANGED	RETURN_MEDIA_CHANGED	UefiBaseType.h
21353	EFI_NOT_FOUND	RETURN_NOT_FOUND	UefiBaseType.h
21354	EFI_ACCESS_DENIED	RETURN_ACCESS_DENIED	UefiBaseType.h
21355	EFI_NO_RESPONSE	RETURN_NO_RESPONSE	UefiBaseType.h
21356	EFI_NO_MAPPING	RETURN_NO_MAPPING	UefiBaseType.h
21357	EFI_TIMEOUT	RETURN_TIMEOUT	UefiBaseType.h
21358	EFI_NOT_STARTED	RETURN_NOT_STARTED	UefiBaseType.h
21359	EFI_ALREADY_STARTED	RETURN_ALREADY_STARTED	UefiBaseType.h
21360	EFI_ABORTED	RETURN_ABORTED	UefiBaseType.h
21361	EFI_ICMP_ERROR	RETURN_ICMP_ERROR	UefiBaseType.h
21362	EFI_TFTP_ERROR	RETURN_TFTP_ERROR	UefiBaseType.h
21363	EFI_PROTOCOL_ERROR	RETURN_PROTOCOL_ERROR	UefiBaseType.h
21364	EFI_INCOMPATIBLE_VERSION	RETURN_INCOMPATIBLE_VERSION	UefiBaseType.h
21365	EFI_SECURITY_VIOLATION	RETURN_SECURITY_VIOLATION	UefiBaseType.h
21366	EFI_CRC_ERROR	RETURN_CRC_ERROR	UefiBaseType.h
21367	EFI_END_OF_MEDIA	RETURN_END_OF_MEDIA	UefiBaseType.h
21368	EFI_END_OF_FILE	RETURN_END_OF_FILE	UefiBaseType.h
21369	EFI_INVALID_LANGUAGE	RETURN_INVALID_LANGUAGE	UefiBaseType.h
21370	EFI_WARN_UNKNOWN_GLYPH	RETURN_WARN_UNKNOWN_GLYPH	UefiBaseType.h
21371	EFI_WARN_DELETE_FAILURE	RETURN_WARN_DELETE_FAILURE	UefiBaseType.h
21372	EFI_WARN_WRITE_FAILURE	RETURN_WARN_WRITE_FAILURE	UefiBaseType.h
21373	EFI_WARN_BUFFER_TOO_SMALL	RETURN_WARN_BUFFER_TOO_SMALL	UefiBaseType.h
21374	EFI_PAGE_SIZE	0x1000	UefiBaseType.h
21375	EFI_PAGE_MASK	0xFFF	UefiBaseType.h
21376	EFI_PAGE_SHIFT	12	UefiBaseType.h
21377	EFI_MAX_BIT	MAX_BIT	UefiBaseType.h
21378	EFI_MAX_ADDRESS	MAX_ADDRESS	UefiBaseType.h
21379	RFC_3066_ENTRY_SIZE	(42 + 1)	UefiBaseType.h
21380	ISO_639_2_ENTRY_SIZE	3	UefiBaseType.h
21381	PRIMARY_PART_HEADER_LBA	1	UefiGpt.h
21382	EFI_PTAB_HEADER_ID	0x5452415020494645ULL	UefiGpt.h
21383	EFI_HII_PACKAGE_TYPE_ALL	0x00	UefiInternalFormRepresentation.h
21384	EFI_HII_PACKAGE_TYPE_GUID	0x01	UefiInternalFormRepresentation.h
21385	EFI_HII_PACKAGE_FORMS	0x02	UefiInternalFormRepresentation.h
21386	EFI_HII_PACKAGE_STRINGS	0x04	UefiInternalFormRepresentation.h
21387	EFI_HII_PACKAGE_FONTS	0x05	UefiInternalFormRepresentation.h
21388	EFI_HII_PACKAGE_IMAGES	0x06	UefiInternalFormRepresentation.h
21389	EFI_HII_PACKAGE_SIMPLE_FONTS	0x07	UefiInternalFormRepresentation.h
21390	EFI_HII_PACKAGE_DEVICE_PATH	0x08	UefiInternalFormRepresentation.h
21391	EFI_HII_PACKAGE_KEYBOARD_LAYOUT	0x09	UefiInternalFormRepresentation.h
21392	EFI_HII_PACKAGE_END	0xDF	UefiInternalFormRepresentation.h
21393	EFI_HII_PACKAGE_TYPE_SYSTEM_BEG	0xE0	UefiInternalFormRepresentation.h
21394	EFI_HII_PACKAGE_TYPE_SYSTEM_END	0xFF	UefiInternalFormRepresentation.h
21395	EFI_GLYPH_NON_SPACING	0x01	UefiInternalFormRepresentation.h
21396	EFI_GLYPH_WIDE	0x02	UefiInternalFormRepresentation.h
21397	EFI_GLYPH_HEIGHT	19	UefiInternalFormRepresentation.h
21398	EFI_GLYPH_WIDTH	8	UefiInternalFormRepresentation.h
21399	EFI_HII_FONT_STYLE_NORMAL	0x00000000	UefiInternalFormRepresentation.h
21400	EFI_HII_FONT_STYLE_BOLD	0x00000001	UefiInternalFormRepresentation.h
21401	EFI_HII_FONT_STYLE_ITALIC	0x00000002	UefiInternalFormRepresentation.h
21402	EFI_HII_FONT_STYLE_EMBOSS	0x00010000	UefiInternalFormRepresentation.h
21403	EFI_HII_FONT_STYLE_OUTLINE	0x00020000	UefiInternalFormRepresentation.h
21404	EFI_HII_FONT_STYLE_SHADOW	0x00040000	UefiInternalFormRepresentation.h
21405	EFI_HII_FONT_STYLE_UNDERLINE	0x00080000	UefiInternalFormRepresentation.h
21406	EFI_HII_FONT_STYLE_DBL_UNDER	0x00100000	UefiInternalFormRepresentation.h
21407	EFI_HII_GIBT_END	0x00	UefiInternalFormRepresentation.h
21408	EFI_HII_GIBT_GLYPH	0x10	UefiInternalFormRepresentation.h
21409	EFI_HII_GIBT_GLYPHS	0x11	UefiInternalFormRepresentation.h
21410	EFI_HII_GIBT_GLYPH_DEFAULT	0x12	UefiInternalFormRepresentation.h
21411	EFI_HII_GIBT_GLYPHS_DEFAULT	0x13	UefiInternalFormRepresentation.h
21412	EFI_HII_GIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
21413	EFI_HII_GIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
21414	EFI_HII_GIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
21415	EFI_HII_GIBT_DEFAULTS	0x23	UefiInternalFormRepresentation.h
21416	EFI_HII_GIBT_EXT1	0x30	UefiInternalFormRepresentation.h
21417	EFI_HII_GIBT_EXT2	0x31	UefiInternalFormRepresentation.h
21418	EFI_HII_GIBT_EXT4	0x32	UefiInternalFormRepresentation.h
21419	UEFI_CONFIG_LANG	L"x-UEFI"	UefiInternalFormRepresentation.h
21420	UEFI_CONFIG_LANG2	L"x-i-UEFI"	UefiInternalFormRepresentation.h
21421	EFI_HII_SIBT_END	0x00	UefiInternalFormRepresentation.h
21422	EFI_HII_SIBT_STRING_SCSU	0x10	UefiInternalFormRepresentation.h
21423	EFI_HII_SIBT_STRING_SCSU_FONT	0x11	UefiInternalFormRepresentation.h
21424	EFI_HII_SIBT_STRINGS_SCSU	0x12	UefiInternalFormRepresentation.h
21425	EFI_HII_SIBT_STRINGS_SCSU_FONT	0x13	UefiInternalFormRepresentation.h
21426	EFI_HII_SIBT_STRING_UCS2	0x14	UefiInternalFormRepresentation.h
21427	EFI_HII_SIBT_STRING_UCS2_FONT	0x15	UefiInternalFormRepresentation.h
21428	EFI_HII_SIBT_STRINGS_UCS2	0x16	UefiInternalFormRepresentation.h
21429	EFI_HII_SIBT_STRINGS_UCS2_FONT	0x17	UefiInternalFormRepresentation.h
21430	EFI_HII_SIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
21431	EFI_HII_SIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
21432	EFI_HII_SIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
21433	EFI_HII_SIBT_EXT1	0x30	UefiInternalFormRepresentation.h
21434	EFI_HII_SIBT_EXT2	0x31	UefiInternalFormRepresentation.h
21435	EFI_HII_SIBT_EXT4	0x32	UefiInternalFormRepresentation.h
21436	EFI_HII_SIBT_FONT	0x40	UefiInternalFormRepresentation.h
21437	EFI_HII_IIBT_END	0x00	UefiInternalFormRepresentation.h
21438	EFI_HII_IIBT_IMAGE_1BIT	0x10	UefiInternalFormRepresentation.h
21439	EFI_HII_IIBT_IMAGE_1BIT_TRANS	0x11	UefiInternalFormRepresentation.h
21440	EFI_HII_IIBT_IMAGE_4BIT	0x12	UefiInternalFormRepresentation.h
21441	EFI_HII_IIBT_IMAGE_4BIT_TRANS	0x13	UefiInternalFormRepresentation.h
21442	EFI_HII_IIBT_IMAGE_8BIT	0x14	UefiInternalFormRepresentation.h
21443	EFI_HII_IIBT_IMAGE_8BIT_TRANS	0x15	UefiInternalFormRepresentation.h
21444	EFI_HII_IIBT_IMAGE_24BIT	0x16	UefiInternalFormRepresentation.h
21445	EFI_HII_IIBT_IMAGE_24BIT_TRANS	0x17	UefiInternalFormRepresentation.h
21446	EFI_HII_IIBT_IMAGE_JPEG	0x18	UefiInternalFormRepresentation.h
21447	EFI_HII_IIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
21448	EFI_HII_IIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
21449	EFI_HII_IIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
21450	EFI_HII_IIBT_EXT1	0x30	UefiInternalFormRepresentation.h
21451	EFI_HII_IIBT_EXT2	0x31	UefiInternalFormRepresentation.h
21452	EFI_HII_IIBT_EXT4	0x32	UefiInternalFormRepresentation.h
21453	EFI_IFR_FORM_OP	0x01	UefiInternalFormRepresentation.h
21454	EFI_IFR_SUBTITLE_OP	0x02	UefiInternalFormRepresentation.h
21455	EFI_IFR_TEXT_OP	0x03	UefiInternalFormRepresentation.h
21456	EFI_IFR_IMAGE_OP	0x04	UefiInternalFormRepresentation.h
21457	EFI_IFR_ONE_OF_OP	0x05	UefiInternalFormRepresentation.h
21458	EFI_IFR_CHECKBOX_OP	0x06	UefiInternalFormRepresentation.h
21459	EFI_IFR_NUMERIC_OP	0x07	UefiInternalFormRepresentation.h
21460	EFI_IFR_PASSWORD_OP	0x08	UefiInternalFormRepresentation.h
21461	EFI_IFR_ONE_OF_OPTION_OP	0x09	UefiInternalFormRepresentation.h
21462	EFI_IFR_SUPPRESS_IF_OP	0x0A	UefiInternalFormRepresentation.h
21463	EFI_IFR_LOCKED_OP	0x0B	UefiInternalFormRepresentation.h
21464	EFI_IFR_ACTION_OP	0x0C	UefiInternalFormRepresentation.h
21465	EFI_IFR_RESET_BUTTON_OP	0x0D	UefiInternalFormRepresentation.h
21466	EFI_IFR_FORM_SET_OP	0x0E	UefiInternalFormRepresentation.h
21467	EFI_IFR_REF_OP	0x0F	UefiInternalFormRepresentation.h
21468	EFI_IFR_NO_SUBMIT_IF_OP	0x10	UefiInternalFormRepresentation.h
21469	EFI_IFR_INCONSISTENT_IF_OP	0x11	UefiInternalFormRepresentation.h
21470	EFI_IFR_EQ_ID_VAL_OP	0x12	UefiInternalFormRepresentation.h
21471	EFI_IFR_EQ_ID_ID_OP	0x13	UefiInternalFormRepresentation.h
21472	EFI_IFR_EQ_ID_LIST_OP	0x14	UefiInternalFormRepresentation.h
21473	EFI_IFR_AND_OP	0x15	UefiInternalFormRepresentation.h
21474	EFI_IFR_OR_OP	0x16	UefiInternalFormRepresentation.h
21475	EFI_IFR_NOT_OP	0x17	UefiInternalFormRepresentation.h
21476	EFI_IFR_RULE_OP	0x18	UefiInternalFormRepresentation.h
21477	EFI_IFR_GRAY_OUT_IF_OP	0x19	UefiInternalFormRepresentation.h
21478	EFI_IFR_DATE_OP	0x1A	UefiInternalFormRepresentation.h
21479	EFI_IFR_TIME_OP	0x1B	UefiInternalFormRepresentation.h
21480	EFI_IFR_STRING_OP	0x1C	UefiInternalFormRepresentation.h
21481	EFI_IFR_REFRESH_OP	0x1D	UefiInternalFormRepresentation.h
21482	EFI_IFR_DISABLE_IF_OP	0x1E	UefiInternalFormRepresentation.h
21483	EFI_IFR_TO_LOWER_OP	0x20	UefiInternalFormRepresentation.h
21484	EFI_IFR_TO_UPPER_OP	0x21	UefiInternalFormRepresentation.h
21485	EFI_IFR_ORDERED_LIST_OP	0x23	UefiInternalFormRepresentation.h
21486	EFI_IFR_VARSTORE_OP	0x24	UefiInternalFormRepresentation.h
21487	EFI_IFR_VARSTORE_NAME_VALUE_OP	0x25	UefiInternalFormRepresentation.h
21488	EFI_IFR_VARSTORE_EFI_OP	0x26	UefiInternalFormRepresentation.h
21489	EFI_IFR_VARSTORE_DEVICE_OP	0x27	UefiInternalFormRepresentation.h
21490	EFI_IFR_VERSION_OP	0x28	UefiInternalFormRepresentation.h
21491	EFI_IFR_END_OP	0x29	UefiInternalFormRepresentation.h
21492	EFI_IFR_MATCH_OP	0x2A	UefiInternalFormRepresentation.h
21493	EFI_IFR_EQUAL_OP	0x2F	UefiInternalFormRepresentation.h
21494	EFI_IFR_NOT_EQUAL_OP	0x30	UefiInternalFormRepresentation.h
21495	EFI_IFR_GREATER_THAN_OP	0x31	UefiInternalFormRepresentation.h
21496	EFI_IFR_GREATER_EQUAL_OP	0x32	UefiInternalFormRepresentation.h
21497	EFI_IFR_LESS_THAN_OP	0x33	UefiInternalFormRepresentation.h
21498	EFI_IFR_LESS_EQUAL_OP	0x34	UefiInternalFormRepresentation.h
21499	EFI_IFR_BITWISE_AND_OP	0x35	UefiInternalFormRepresentation.h
21500	EFI_IFR_BITWISE_OR_OP	0x36	UefiInternalFormRepresentation.h
21501	EFI_IFR_BITWISE_NOT_OP	0x37	UefiInternalFormRepresentation.h
21502	EFI_IFR_SHIFT_LEFT_OP	0x38	UefiInternalFormRepresentation.h
21503	EFI_IFR_SHIFT_RIGHT_OP	0x39	UefiInternalFormRepresentation.h
21504	EFI_IFR_ADD_OP	0x3A	UefiInternalFormRepresentation.h
21505	EFI_IFR_SUBTRACT_OP	0x3B	UefiInternalFormRepresentation.h
21506	EFI_IFR_MULTIPLY_OP	0x3C	UefiInternalFormRepresentation.h
21507	EFI_IFR_DIVIDE_OP	0x3D	UefiInternalFormRepresentation.h
21508	EFI_IFR_MODULO_OP	0x3E	UefiInternalFormRepresentation.h
21509	EFI_IFR_RULE_REF_OP	0x3F	UefiInternalFormRepresentation.h
21510	EFI_IFR_QUESTION_REF1_OP	0x40	UefiInternalFormRepresentation.h
21511	EFI_IFR_QUESTION_REF2_OP	0x41	UefiInternalFormRepresentation.h
21512	EFI_IFR_UINT8_OP	0x42	UefiInternalFormRepresentation.h
21513	EFI_IFR_UINT16_OP	0x43	UefiInternalFormRepresentation.h
21514	EFI_IFR_UINT32_OP	0x44	UefiInternalFormRepresentation.h
21515	EFI_IFR_UINT64_OP	0x45	UefiInternalFormRepresentation.h
21516	EFI_IFR_TRUE_OP	0x46	UefiInternalFormRepresentation.h
21517	EFI_IFR_FALSE_OP	0x47	UefiInternalFormRepresentation.h
21518	EFI_IFR_TO_UINT_OP	0x48	UefiInternalFormRepresentation.h
21519	EFI_IFR_TO_STRING_OP	0x49	UefiInternalFormRepresentation.h
21520	EFI_IFR_TO_BOOLEAN_OP	0x4A	UefiInternalFormRepresentation.h
21521	EFI_IFR_MID_OP	0x4B	UefiInternalFormRepresentation.h
21522	EFI_IFR_FIND_OP	0x4C	UefiInternalFormRepresentation.h
21523	EFI_IFR_TOKEN_OP	0x4D	UefiInternalFormRepresentation.h
21524	EFI_IFR_STRING_REF1_OP	0x4E	UefiInternalFormRepresentation.h
21525	EFI_IFR_STRING_REF2_OP	0x4F	UefiInternalFormRepresentation.h
21526	EFI_IFR_CONDITIONAL_OP	0x50	UefiInternalFormRepresentation.h
21527	EFI_IFR_QUESTION_REF3_OP	0x51	UefiInternalFormRepresentation.h
21528	EFI_IFR_ZERO_OP	0x52	UefiInternalFormRepresentation.h
21529	EFI_IFR_ONE_OP	0x53	UefiInternalFormRepresentation.h
21530	EFI_IFR_ONES_OP	0x54	UefiInternalFormRepresentation.h
21531	EFI_IFR_UNDEFINED_OP	0x55	UefiInternalFormRepresentation.h
21532	EFI_IFR_LENGTH_OP	0x56	UefiInternalFormRepresentation.h
21533	EFI_IFR_DUP_OP	0x57	UefiInternalFormRepresentation.h
21534	EFI_IFR_THIS_OP	0x58	UefiInternalFormRepresentation.h
21535	EFI_IFR_SPAN_OP	0x59	UefiInternalFormRepresentation.h
21536	EFI_IFR_VALUE_OP	0x5A	UefiInternalFormRepresentation.h
21537	EFI_IFR_DEFAULT_OP	0x5B	UefiInternalFormRepresentation.h
21538	EFI_IFR_DEFAULTSTORE_OP	0x5C	UefiInternalFormRepresentation.h
21539	EFI_IFR_CATENATE_OP	0x5E	UefiInternalFormRepresentation.h
21540	EFI_IFR_GUID_OP	0x5F	UefiInternalFormRepresentation.h
21541	EFI_IFR_FLAG_READ_ONLY	0x01	UefiInternalFormRepresentation.h
21542	EFI_IFR_FLAG_CALLBACK	0x04	UefiInternalFormRepresentation.h
21543	EFI_IFR_FLAG_RESET_REQUIRED	0x10	UefiInternalFormRepresentation.h
21544	EFI_IFR_FLAG_OPTIONS_ONLY	0x80	UefiInternalFormRepresentation.h
21545	EFI_HII_DEFAULT_CLASS_STANDARD	0x0000	UefiInternalFormRepresentation.h
21546	EFI_HII_DEFAULT_CLASS_MANUFACTU	0x0001	UefiInternalFormRepresentation.h
21547	EFI_HII_DEFAULT_CLASS_SAFE	0x0002	UefiInternalFormRepresentation.h
21548	EFI_HII_DEFAULT_CLASS_PLATFORM_	0x4000	UefiInternalFormRepresentation.h
21549	EFI_HII_DEFAULT_CLASS_PLATFORM_	0x7fff	UefiInternalFormRepresentation.h
21550	EFI_HII_DEFAULT_CLASS_HARDWARE_	0x8000	UefiInternalFormRepresentation.h
21551	EFI_HII_DEFAULT_CLASS_HARDWARE_	0xbfff	UefiInternalFormRepresentation.h
21552	EFI_HII_DEFAULT_CLASS_FIRMWARE_	0xc000	UefiInternalFormRepresentation.h
21553	EFI_HII_DEFAULT_CLASS_FIRMWARE_	0xffff	UefiInternalFormRepresentation.h
21554	EFI_IFR_FLAGS_HORIZONTAL	0x01	UefiInternalFormRepresentation.h
21555	EFI_IFR_CHECKBOX_DEFAULT	0x01	UefiInternalFormRepresentation.h
21556	EFI_IFR_CHECKBOX_DEFAULT_MFG	0x02	UefiInternalFormRepresentation.h
21557	EFI_QF_DATE_YEAR_SUPPRESS	0x01	UefiInternalFormRepresentation.h
21558	EFI_QF_DATE_MONTH_SUPPRESS	0x02	UefiInternalFormRepresentation.h
21559	EFI_QF_DATE_DAY_SUPPRESS	0x04	UefiInternalFormRepresentation.h
21560	EFI_QF_DATE_STORAGE	0x30	UefiInternalFormRepresentation.h
21561	QF_DATE_STORAGE_NORMAL	0x00	UefiInternalFormRepresentation.h
21562	QF_DATE_STORAGE_TIME	0x10	UefiInternalFormRepresentation.h
21563	QF_DATE_STORAGE_WAKEUP	0x20	UefiInternalFormRepresentation.h
21564	EFI_IFR_NUMERIC_SIZE	0x03	UefiInternalFormRepresentation.h
21565	EFI_IFR_NUMERIC_SIZE_1	0x00	UefiInternalFormRepresentation.h
21566	EFI_IFR_NUMERIC_SIZE_2	0x01	UefiInternalFormRepresentation.h
21567	EFI_IFR_NUMERIC_SIZE_4	0x02	UefiInternalFormRepresentation.h
21568	EFI_IFR_NUMERIC_SIZE_8	0x03	UefiInternalFormRepresentation.h
21569	EFI_IFR_DISPLAY	0x30	UefiInternalFormRepresentation.h
21570	EFI_IFR_DISPLAY_INT_DEC	0x00	UefiInternalFormRepresentation.h
21571	EFI_IFR_DISPLAY_UINT_DEC	0x10	UefiInternalFormRepresentation.h
21572	EFI_IFR_DISPLAY_UINT_HEX	0x20	UefiInternalFormRepresentation.h
21573	EFI_IFR_STRING_MULTI_LINE	0x01	UefiInternalFormRepresentation.h
21574	EFI_IFR_UNIQUE_SET	0x01	UefiInternalFormRepresentation.h
21575	EFI_IFR_NO_EMPTY_SET	0x02	UefiInternalFormRepresentation.h
21576	QF_TIME_HOUR_SUPPRESS	0x01	UefiInternalFormRepresentation.h
21577	QF_TIME_MINUTE_SUPPRESS	0x02	UefiInternalFormRepresentation.h
21578	QF_TIME_SECOND_SUPPRESS	0x04	UefiInternalFormRepresentation.h
21579	QF_TIME_STORAGE	0x30	UefiInternalFormRepresentation.h
21580	QF_TIME_STORAGE_NORMAL	0x00	UefiInternalFormRepresentation.h
21581	QF_TIME_STORAGE_TIME	0x10	UefiInternalFormRepresentation.h
21582	QF_TIME_STORAGE_WAKEUP	0x20	UefiInternalFormRepresentation.h
21583	EFI_IFR_TYPE_NUM_SIZE_8	0x00	UefiInternalFormRepresentation.h
21584	EFI_IFR_TYPE_NUM_SIZE_16	0x01	UefiInternalFormRepresentation.h
21585	EFI_IFR_TYPE_NUM_SIZE_32	0x02	UefiInternalFormRepresentation.h
21586	EFI_IFR_TYPE_NUM_SIZE_64	0x03	UefiInternalFormRepresentation.h
21587	EFI_IFR_TYPE_BOOLEAN	0x04	UefiInternalFormRepresentation.h
21588	EFI_IFR_TYPE_TIME	0x05	UefiInternalFormRepresentation.h
21589	EFI_IFR_TYPE_DATE	0x06	UefiInternalFormRepresentation.h
21590	EFI_IFR_TYPE_STRING	0x07	UefiInternalFormRepresentation.h
21591	EFI_IFR_TYPE_OTHER	0x08	UefiInternalFormRepresentation.h
21592	EFI_IFR_OPTION_DEFAULT	0x10	UefiInternalFormRepresentation.h
21593	EFI_IFR_OPTION_DEFAULT_MFG	0x20	UefiInternalFormRepresentation.h
21594	EFI_IFR_STRING_UNSIGNED_DEC	0	UefiInternalFormRepresentation.h
21595	EFI_IFR_STRING_SIGNED_DEC	1	UefiInternalFormRepresentation.h
21596	EFI_IFR_STRING_LOWERCASE_HEX	2	UefiInternalFormRepresentation.h
21597	EFI_IFR_STRING_UPPERCASE_HEX	3	UefiInternalFormRepresentation.h
21598	EFI_IFR_STRING_ASCII	0	UefiInternalFormRepresentation.h
21599	EFI_IFR_STRING_UNICODE	8	UefiInternalFormRepresentation.h
21600	EFI_IFR_FF_CASE_SENSITIVE	0x00	UefiInternalFormRepresentation.h
21601	EFI_IFR_FF_CASE_INSENSITIVE	0x01	UefiInternalFormRepresentation.h
21602	EFI_IFR_FLAGS_FIRST_MATCHING	0x00	UefiInternalFormRepresentation.h
21603	EFI_IFR_FLAGS_FIRST_NON_MATCHIN	0x01	UefiInternalFormRepresentation.h
21604	EFI_AFFECTED_BY_STANDARD_SHIFT	0x0001	UefiInternalFormRepresentation.h
21605	EFI_AFFECTED_BY_CAPS_LOCK	0x0002	UefiInternalFormRepresentation.h
21606	EFI_AFFECTED_BY_NUM_LOCK	0x0004	UefiInternalFormRepresentation.h
21607	EFI_NULL_MODIFIER	0x0000	UefiInternalFormRepresentation.h
21608	EFI_LEFT_CONTROL_MODIFIER	0x0001	UefiInternalFormRepresentation.h
21609	EFI_RIGHT_CONTROL_MODIFIER	0x0002	UefiInternalFormRepresentation.h
21610	EFI_LEFT_ALT_MODIFIER	0x0003	UefiInternalFormRepresentation.h
21611	EFI_RIGHT_ALT_MODIFIER	0x0004	UefiInternalFormRepresentation.h
21612	EFI_ALT_GR_MODIFIER	0x0005	UefiInternalFormRepresentation.h
21613	EFI_INSERT_MODIFIER	0x0006	UefiInternalFormRepresentation.h
21614	EFI_DELETE_MODIFIER	0x0007	UefiInternalFormRepresentation.h
21615	EFI_PAGE_DOWN_MODIFIER	0x0008	UefiInternalFormRepresentation.h
21616	EFI_PAGE_UP_MODIFIER	0x0009	UefiInternalFormRepresentation.h
21617	EFI_HOME_MODIFIER	0x000A	UefiInternalFormRepresentation.h
21618	EFI_END_MODIFIER	0x000B	UefiInternalFormRepresentation.h
21619	EFI_LEFT_SHIFT_MODIFIER	0x000C	UefiInternalFormRepresentation.h
21620	EFI_RIGHT_SHIFT_MODIFIER	0x000D	UefiInternalFormRepresentation.h
21621	EFI_CAPS_LOCK_MODIFIER	0x000E	UefiInternalFormRepresentation.h
21622	EFI_NUM_LOCK_MODIFIER	0x000F	UefiInternalFormRepresentation.h
21623	EFI_LEFT_ARROW_MODIFIER	0x0010	UefiInternalFormRepresentation.h
21624	EFI_RIGHT_ARROW_MODIFIER	0x0011	UefiInternalFormRepresentation.h
21625	EFI_DOWN_ARROW_MODIFIER	0x0012	UefiInternalFormRepresentation.h
21626	EFI_UP_ARROW_MODIFIER	0x0013	UefiInternalFormRepresentation.h
21627	EFI_NS_KEY_MODIFIER	0x0014	UefiInternalFormRepresentation.h
21628	EFI_NS_KEY_DEPENDENCY_MODIFIER	0x0015	UefiInternalFormRepresentation.h
21629	EFI_FUNCTION_KEY_ONE_MODIFIER	0x0016	UefiInternalFormRepresentation.h
21630	EFI_FUNCTION_KEY_TWO_MODIFIER	0x0017	UefiInternalFormRepresentation.h
21631	EFI_FUNCTION_KEY_THREE_MODIFIER	0x0018	UefiInternalFormRepresentation.h
21632	EFI_FUNCTION_KEY_FOUR_MODIFIER	0x0019	UefiInternalFormRepresentation.h
21633	EFI_FUNCTION_KEY_FIVE_MODIFIER	0x001A	UefiInternalFormRepresentation.h
21634	EFI_FUNCTION_KEY_SIX_MODIFIER	0x001B	UefiInternalFormRepresentation.h
21635	EFI_FUNCTION_KEY_SEVEN_MODIFIER	0x001C	UefiInternalFormRepresentation.h
21636	EFI_FUNCTION_KEY_EIGHT_MODIFIER	0x001D	UefiInternalFormRepresentation.h
21637	EFI_FUNCTION_KEY_NINE_MODIFIER	0x001E	UefiInternalFormRepresentation.h
21638	EFI_FUNCTION_KEY_TEN_MODIFIER	0x001F	UefiInternalFormRepresentation.h
21639	EFI_FUNCTION_KEY_ELEVEN_MODIFIE	0x0020	UefiInternalFormRepresentation.h
21640	EFI_FUNCTION_KEY_TWELVE_MODIFIE	0x0021	UefiInternalFormRepresentation.h
21641	EFI_PRINT_MODIFIER	0x0022	UefiInternalFormRepresentation.h
21642	EFI_SYS_REQUEST_MODIFIER	0x0023	UefiInternalFormRepresentation.h
21643	EFI_SCROLL_LOCK_MODIFIER	0x0024	UefiInternalFormRepresentation.h
21644	EFI_PAUSE_MODIFIER	0x0025	UefiInternalFormRepresentation.h
21645	EFI_BREAK_MODIFIER	0x0026	UefiInternalFormRepresentation.h
21646	EFI_LEFT_LOGO_MODIFIER	0x0027	UefiInternalFormRepresentation.h
21647	EFI_RIGHT_LOGO_MODIFIER	0x0028	UefiInternalFormRepresentation.h
21648	EFI_MENU_MODIFIER	0x0029	UefiInternalFormRepresentation.h
21649	EFI_VARIABLE_NON_VOLATILE	0x00000001	UefiMultiPhase.h
21650	EFI_VARIABLE_BOOTSERVICE_ACCESS	0x00000002	UefiMultiPhase.h
21651	EFI_VARIABLE_RUNTIME_ACCESS	0x00000004	UefiMultiPhase.h
21652	EFI_VARIABLE_HARDWARE_ERROR_REC	0x00000008	UefiMultiPhase.h
21653	EFI_VARIABLE_AUTHENTICATED_WRIT	0x00000010	UefiMultiPhase.h
21654	WIN_CERT_TYPE_EFI_PKCS115	0x0EF0	UefiMultiPhase.h
21655	WIN_CERT_TYPE_EFI_GUID	0x0EF1	UefiMultiPhase.h
21656	EFI_CERT_TYPE_RSA2048_SHA256_GU	{0xa7717414, 0xc616, 0x4977, {0x94, 0x20, 0x84, 0x47, 0x12, 0xa7, 0x35, 0xbf } }	UefiMultiPhase.h
21657	PXE_BUSTYPE_PXE	PXE_BUSTYPE ('!', 'P', 'X', 'E')	UefiPxe.h
21658	PXE_BUSTYPE_PCI	PXE_BUSTYPE ('P', 'C', 'I', 'R')	UefiPxe.h
21659	PXE_BUSTYPE_PC_CARD	PXE_BUSTYPE ('P', 'C', 'C', 'R')	UefiPxe.h
21660	PXE_BUSTYPE_USB	PXE_BUSTYPE ('U', 'S', 'B', 'R')	UefiPxe.h
21661	PXE_BUSTYPE_1394	PXE_BUSTYPE ('1', '3', '9', '4')	UefiPxe.h
21662	PXE_CPBSIZE_NOT_USED	0	UefiPxe.h	< zero
21663	PXE_DBSIZE_NOT_USED	0	UefiPxe.h	< zero
21664	PXE_CPBADDR_NOT_USED	(PXE_UINT64) 0	UefiPxe.h	< zero
21665	PXE_DBADDR_NOT_USED	(PXE_UINT64) 0	UefiPxe.h	< zero
21666	PXE_CONST	CONST	UefiPxe.h
21667	PXE_VOLATILE	volatile	UefiPxe.h
21668	PXE_FALSE	0	UefiPxe.h	< zero
21669	PXE_TRUE	(!PXE_FALSE)	UefiPxe.h
21670	PXE_OPCODE_GET_STATE	0x0000	UefiPxe.h
21671	PXE_OPCODE_START	0x0001	UefiPxe.h
21672	PXE_OPCODE_STOP	0x0002	UefiPxe.h
21673	PXE_OPCODE_GET_INIT_INFO	0x0003	UefiPxe.h
21674	PXE_OPCODE_GET_CONFIG_INFO	0x0004	UefiPxe.h
21675	PXE_OPCODE_INITIALIZE	0x0005	UefiPxe.h
21676	PXE_OPCODE_RESET	0x0006	UefiPxe.h
21677	PXE_OPCODE_SHUTDOWN	0x0007	UefiPxe.h
21678	PXE_OPCODE_INTERRUPT_ENABLES	0x0008	UefiPxe.h
21679	PXE_OPCODE_RECEIVE_FILTERS	0x0009	UefiPxe.h
21680	PXE_OPCODE_STATION_ADDRESS	0x000A	UefiPxe.h
21681	PXE_OPCODE_STATISTICS	0x000B	UefiPxe.h
21682	PXE_OPCODE_MCAST_IP_TO_MAC	0x000C	UefiPxe.h
21683	PXE_OPCODE_NVDATA	0x000D	UefiPxe.h
21684	PXE_OPCODE_GET_STATUS	0x000E	UefiPxe.h
21685	PXE_OPCODE_FILL_HEADER	0x000F	UefiPxe.h
21686	PXE_OPCODE_TRANSMIT	0x0010	UefiPxe.h
21687	PXE_OPCODE_RECEIVE	0x0011	UefiPxe.h
21688	PXE_OPCODE_LAST_VALID	0x0011	UefiPxe.h
21689	PXE_OPFLAGS_NOT_USED	0x0000	UefiPxe.h
21690	PXE_OPFLAGS_INITIALIZE_CABLE_DE	0x0001	UefiPxe.h
21691	PXE_OPFLAGS_INITIALIZE_DETECT_C	0x0000	UefiPxe.h
21692	PXE_OPFLAGS_INITIALIZE_DO_NOT_D	0x0001	UefiPxe.h
21693	PXE_OPFLAGS_RESET_DISABLE_INTER	0x0001	UefiPxe.h
21694	PXE_OPFLAGS_RESET_DISABLE_FILTE	0x0002	UefiPxe.h
21695	PXE_OPFLAGS_INTERRUPT_OPMASK	0xC000	UefiPxe.h
21696	PXE_OPFLAGS_INTERRUPT_ENABLE	0x8000	UefiPxe.h
21697	PXE_OPFLAGS_INTERRUPT_DISABLE	0x4000	UefiPxe.h
21698	PXE_OPFLAGS_INTERRUPT_READ	0x0000	UefiPxe.h
21699	PXE_OPFLAGS_INTERRUPT_RECEIVE	0x0001	UefiPxe.h
21700	PXE_OPFLAGS_INTERRUPT_TRANSMIT	0x0002	UefiPxe.h
21701	PXE_OPFLAGS_INTERRUPT_COMMAND	0x0004	UefiPxe.h
21702	PXE_OPFLAGS_INTERRUPT_SOFTWARE	0x0008	UefiPxe.h
21703	PXE_OPFLAGS_RECEIVE_FILTER_OPMA	0xC000	UefiPxe.h
21704	PXE_OPFLAGS_RECEIVE_FILTER_ENAB	0x8000	UefiPxe.h
21705	PXE_OPFLAGS_RECEIVE_FILTER_DISA	0x4000	UefiPxe.h
21706	PXE_OPFLAGS_RECEIVE_FILTER_READ	0x0000	UefiPxe.h
21707	PXE_OPFLAGS_RECEIVE_FILTER_RESE	0x2000	UefiPxe.h
21708	PXE_OPFLAGS_RECEIVE_FILTER_UNIC	0x0001	UefiPxe.h
21709	PXE_OPFLAGS_RECEIVE_FILTER_BROA	0x0002	UefiPxe.h
21710	PXE_OPFLAGS_RECEIVE_FILTER_FILT	0x0004	UefiPxe.h
21711	PXE_OPFLAGS_RECEIVE_FILTER_PROM	0x0008	UefiPxe.h
21712	PXE_OPFLAGS_RECEIVE_FILTER_ALL_	0x0010	UefiPxe.h
21713	PXE_OPFLAGS_STATION_ADDRESS_REA	0x0000	UefiPxe.h
21714	PXE_OPFLAGS_STATION_ADDRESS_WRI	0x0000	UefiPxe.h
21715	PXE_OPFLAGS_STATION_ADDRESS_RES	0x0001	UefiPxe.h
21716	PXE_OPFLAGS_STATISTICS_READ	0x0000	UefiPxe.h
21717	PXE_OPFLAGS_STATISTICS_RESET	0x0001	UefiPxe.h
21718	PXE_OPFLAGS_MCAST_IP_TO_MAC_OPM	0x0003	UefiPxe.h
21719	PXE_OPFLAGS_MCAST_IPV4_TO_MAC	0x0000	UefiPxe.h
21720	PXE_OPFLAGS_MCAST_IPV6_TO_MAC	0x0001	UefiPxe.h
21721	PXE_OPFLAGS_NVDATA_OPMASK	0x0001	UefiPxe.h
21722	PXE_OPFLAGS_NVDATA_READ	0x0000	UefiPxe.h
21723	PXE_OPFLAGS_NVDATA_WRITE	0x0001	UefiPxe.h
21724	PXE_OPFLAGS_GET_INTERRUPT_STATU	0x0001	UefiPxe.h
21725	PXE_OPFLAGS_GET_TRANSMITTED_BUF	0x0002	UefiPxe.h
21726	PXE_OPFLAGS_FILL_HEADER_OPMASK	0x0001	UefiPxe.h
21727	PXE_OPFLAGS_FILL_HEADER_FRAGMEN	0x0001	UefiPxe.h
21728	PXE_OPFLAGS_FILL_HEADER_WHOLE	0x0000	UefiPxe.h
21729	PXE_OPFLAGS_SWUNDI_TRANSMIT_OPM	0x0001	UefiPxe.h
21730	PXE_OPFLAGS_TRANSMIT_BLOCK	0x0001	UefiPxe.h
21731	PXE_OPFLAGS_TRANSMIT_DONT_BLOCK	0x0000	UefiPxe.h
21732	PXE_OPFLAGS_TRANSMIT_OPMASK	0x0002	UefiPxe.h
21733	PXE_OPFLAGS_TRANSMIT_FRAGMENTED	0x0002	UefiPxe.h
21734	PXE_OPFLAGS_TRANSMIT_WHOLE	0x0000	UefiPxe.h
21735	PXE_STATFLAGS_INITIALIZE	0x0000	UefiPxe.h
21736	PXE_STATFLAGS_STATUS_MASK	0xC000	UefiPxe.h
21737	PXE_STATFLAGS_COMMAND_COMPLETE	0xC000	UefiPxe.h
21738	PXE_STATFLAGS_COMMAND_FAILED	0x8000	UefiPxe.h
21739	PXE_STATFLAGS_COMMAND_QUEUED	0x4000	UefiPxe.h
21740	PXE_STATFLAGS_GET_STATE_MASK	0x0003	UefiPxe.h
21741	PXE_STATFLAGS_GET_STATE_INITIAL	0x0002	UefiPxe.h
21742	PXE_STATFLAGS_GET_STATE_STARTED	0x0001	UefiPxe.h
21743	PXE_STATFLAGS_GET_STATE_STOPPED	0x0000	UefiPxe.h
21744	PXE_STATFLAGS_CABLE_DETECT_MASK	0x0001	UefiPxe.h
21745	PXE_STATFLAGS_CABLE_DETECT_NOT_	0x0000	UefiPxe.h
21746	PXE_STATFLAGS_CABLE_DETECT_SUPP	0x0001	UefiPxe.h
21747	PXE_STATFLAGS_INITIALIZED_NO_ME	0x0001	UefiPxe.h
21748	PXE_STATFLAGS_RESET_NO_MEDIA	0x0001	UefiPxe.h
21749	PXE_STATFLAGS_INTERRUPT_RECEIVE	0x0001	UefiPxe.h
21750	PXE_STATFLAGS_INTERRUPT_TRANSMI	0x0002	UefiPxe.h
21751	PXE_STATFLAGS_INTERRUPT_COMMAND	0x0004	UefiPxe.h
21752	PXE_STATFLAGS_RECEIVE_FILTER_UN	0x0001	UefiPxe.h
21753	PXE_STATFLAGS_RECEIVE_FILTER_BR	0x0002	UefiPxe.h
21754	PXE_STATFLAGS_RECEIVE_FILTER_FI	0x0004	UefiPxe.h
21755	PXE_STATFLAGS_RECEIVE_FILTER_PR	0x0008	UefiPxe.h
21756	PXE_STATFLAGS_RECEIVE_FILTER_AL	0x0010	UefiPxe.h
21757	PXE_STATFLAGS_GET_STATUS_INTERR	0x000F	UefiPxe.h
21758	PXE_STATFLAGS_GET_STATUS_NO_INT	0x0000	UefiPxe.h
21759	PXE_STATFLAGS_GET_STATUS_RECEIV	0x0001	UefiPxe.h
21760	PXE_STATFLAGS_GET_STATUS_TRANSM	0x0002	UefiPxe.h
21761	PXE_STATFLAGS_GET_STATUS_COMMAN	0x0004	UefiPxe.h
21762	PXE_STATFLAGS_GET_STATUS_SOFTWA	0x0008	UefiPxe.h
21763	PXE_STATFLAGS_GET_STATUS_TXBUF_	0x0010	UefiPxe.h
21764	PXE_STATFLAGS_GET_STATUS_NO_TXB	0x0020	UefiPxe.h
21765	PXE_STATCODE_INITIALIZE	0x0000	UefiPxe.h
21766	PXE_STATCODE_SUCCESS	0x0000	UefiPxe.h
21767	PXE_STATCODE_INVALID_CDB	0x0001	UefiPxe.h
21768	PXE_STATCODE_INVALID_CPB	0x0002	UefiPxe.h
21769	PXE_STATCODE_BUSY	0x0003	UefiPxe.h
21770	PXE_STATCODE_QUEUE_FULL	0x0004	UefiPxe.h
21771	PXE_STATCODE_ALREADY_STARTED	0x0005	UefiPxe.h
21772	PXE_STATCODE_NOT_STARTED	0x0006	UefiPxe.h
21773	PXE_STATCODE_NOT_SHUTDOWN	0x0007	UefiPxe.h
21774	PXE_STATCODE_ALREADY_INITIALIZE	0x0008	UefiPxe.h
21775	PXE_STATCODE_NOT_INITIALIZED	0x0009	UefiPxe.h
21776	PXE_STATCODE_DEVICE_FAILURE	0x000A	UefiPxe.h
21777	PXE_STATCODE_NVDATA_FAILURE	0x000B	UefiPxe.h
21778	PXE_STATCODE_UNSUPPORTED	0x000C	UefiPxe.h
21779	PXE_STATCODE_BUFFER_FULL	0x000D	UefiPxe.h
21780	PXE_STATCODE_INVALID_PARAMETER	0x000E	UefiPxe.h
21781	PXE_STATCODE_INVALID_UNDI	0x000F	UefiPxe.h
21782	PXE_STATCODE_IPV4_NOT_SUPPORTED	0x0010	UefiPxe.h
21783	PXE_STATCODE_IPV6_NOT_SUPPORTED	0x0011	UefiPxe.h
21784	PXE_STATCODE_NOT_ENOUGH_MEMORY	0x0012	UefiPxe.h
21785	PXE_STATCODE_NO_DATA	0x0013	UefiPxe.h
21786	PXE_IFNUM_START	0x0000	UefiPxe.h
21787	PXE_IFNUM_INVALID	0x0000	UefiPxe.h
21788	PXE_CONTROL_QUEUE_IF_BUSY	0x0002	UefiPxe.h
21789	PXE_CONTROL_LINK	0x0001	UefiPxe.h
21790	PXE_CONTROL_LAST_CDB_IN_LIST	0x0000	UefiPxe.h
21791	PXE_FRAME_TYPE_NONE	0x00	UefiPxe.h
21792	PXE_FRAME_TYPE_UNICAST	0x01	UefiPxe.h
21793	PXE_FRAME_TYPE_BROADCAST	0x02	UefiPxe.h
21794	PXE_FRAME_TYPE_FILTERED_MULTICA	0x03	UefiPxe.h
21795	PXE_FRAME_TYPE_PROMISCUOUS	0x04	UefiPxe.h
21796	PXE_FRAME_TYPE_PROMISCUOUS_MULT	0x05	UefiPxe.h
21797	PXE_FRAME_TYPE_MULTICAST	PXE_FRAME_TYPE_FILTERED_MULTICAST	UefiPxe.h
21798	PXE_MAC_LENGTH	32	UefiPxe.h
21799	PXE_IFTYPE_ETHERNET	0x01	UefiPxe.h
21800	PXE_IFTYPE_TOKENRING	0x04	UefiPxe.h
21801	PXE_IFTYPE_FIBRE_CHANNEL	0x12	UefiPxe.h
21802	PXE_HWSTAT_STATE_MASK	0xC0000000	UefiPxe.h
21803	PXE_HWSTAT_BUSY	0xC0000000	UefiPxe.h
21804	PXE_HWSTAT_INITIALIZED	0x80000000	UefiPxe.h
21805	PXE_HWSTAT_STARTED	0x40000000	UefiPxe.h
21806	PXE_HWSTAT_STOPPED	0x00000000	UefiPxe.h
21807	PXE_HWSTAT_COMMAND_FAILED	0x20000000	UefiPxe.h
21808	PXE_HWSTAT_PROMISCUOUS_MULTICAS	0x00001000	UefiPxe.h
21809	PXE_HWSTAT_PROMISCUOUS_RX_ENABL	0x00000800	UefiPxe.h
21810	PXE_HWSTAT_BROADCAST_RX_ENABLED	0x00000400	UefiPxe.h
21811	PXE_HWSTAT_MULTICAST_RX_ENABLED	0x00000200	UefiPxe.h
21812	PXE_HWSTAT_UNICAST_RX_ENABLED	0x00000100	UefiPxe.h
21813	PXE_HWSTAT_SOFTWARE_INT_ENABLED	0x00000080	UefiPxe.h
21814	PXE_HWSTAT_TX_COMPLETE_INT_ENAB	0x00000040	UefiPxe.h
21815	PXE_HWSTAT_PACKET_RX_INT_ENABLE	0x00000020	UefiPxe.h
21816	PXE_HWSTAT_CMD_COMPLETE_INT_ENA	0x00000010	UefiPxe.h
21817	PXE_HWSTAT_SOFTWARE_INT_PENDING	0x00000008	UefiPxe.h
21818	PXE_HWSTAT_TX_COMPLETE_INT_PEND	0x00000004	UefiPxe.h
21819	PXE_HWSTAT_PACKET_RX_INT_PENDIN	0x00000002	UefiPxe.h
21820	PXE_HWSTAT_CMD_COMPLETE_INT_PEN	0x00000001	UefiPxe.h
21821	PXE_HWCMD_ISSUE_COMMAND	0x80000000	UefiPxe.h
21822	PXE_HWCMD_INTS_AND_FILTS	0x00000000	UefiPxe.h
21823	PXE_HWCMD_PROMISCUOUS_MULTICAST	0x00001000	UefiPxe.h
21824	PXE_HWCMD_PROMISCUOUS_RX_ENABLE	0x00000800	UefiPxe.h
21825	PXE_HWCMD_BROADCAST_RX_ENABLE	0x00000400	UefiPxe.h
21826	PXE_HWCMD_MULTICAST_RX_ENABLE	0x00000200	UefiPxe.h
21827	PXE_HWCMD_UNICAST_RX_ENABLE	0x00000100	UefiPxe.h
21828	PXE_HWCMD_SOFTWARE_INT_ENABLE	0x00000080	UefiPxe.h
21829	PXE_HWCMD_TX_COMPLETE_INT_ENABL	0x00000040	UefiPxe.h
21830	PXE_HWCMD_PACKET_RX_INT_ENABLE	0x00000020	UefiPxe.h
21831	PXE_HWCMD_CMD_COMPLETE_INT_ENAB	0x00000010	UefiPxe.h
21832	PXE_HWCMD_CLEAR_SOFTWARE_INT	0x00000008	UefiPxe.h
21833	PXE_HWCMD_CLEAR_TX_COMPLETE_INT	0x00000004	UefiPxe.h
21834	PXE_HWCMD_CLEAR_PACKET_RX_INT	0x00000002	UefiPxe.h
21835	PXE_HWCMD_CLEAR_CMD_COMPLETE_IN	0x00000001	UefiPxe.h
21836	PXE_ROMID_SIGNATURE	PXE_BUSTYPE ('!', 'P', 'X', 'E')	UefiPxe.h
21837	PXE_ROMID_REV	0x02	UefiPxe.h
21838	PXE_ROMID_MAJORVER	0x03	UefiPxe.h
21839	PXE_ROMID_MINORVER	0x01	UefiPxe.h
21840	PXE_ROMID_IMP_HW_UNDI	0x80000000	UefiPxe.h
21841	PXE_ROMID_IMP_SW_VIRT_ADDR	0x40000000	UefiPxe.h
21842	PXE_ROMID_IMP_64BIT_DEVICE	0x00010000	UefiPxe.h
21843	PXE_ROMID_IMP_FRAG_SUPPORTED	0x00008000	UefiPxe.h
21844	PXE_ROMID_IMP_CMD_LINK_SUPPORTE	0x00004000	UefiPxe.h
21845	PXE_ROMID_IMP_CMD_QUEUE_SUPPORT	0x00002000	UefiPxe.h
21846	PXE_ROMID_IMP_MULTI_FRAME_SUPPO	0x00001000	UefiPxe.h
21847	PXE_ROMID_IMP_NVDATA_SUPPORT_MA	0x00000C00	UefiPxe.h
21848	PXE_ROMID_IMP_NVDATA_BULK_WRITA	0x00000C00	UefiPxe.h
21849	PXE_ROMID_IMP_NVDATA_SPARSE_WRI	0x00000800	UefiPxe.h
21850	PXE_ROMID_IMP_NVDATA_READ_ONLY	0x00000400	UefiPxe.h
21851	PXE_ROMID_IMP_NVDATA_NOT_AVAILA	0x00000000	UefiPxe.h
21852	PXE_ROMID_IMP_STATISTICS_SUPPOR	0x00000200	UefiPxe.h
21853	PXE_ROMID_IMP_STATION_ADDR_SETT	0x00000100	UefiPxe.h
21854	PXE_ROMID_IMP_PROMISCUOUS_MULTI	0x00000080	UefiPxe.h
21855	PXE_ROMID_IMP_PROMISCUOUS_RX_SU	0x00000040	UefiPxe.h
21856	PXE_ROMID_IMP_BROADCAST_RX_SUPP	0x00000020	UefiPxe.h
21857	PXE_ROMID_IMP_FILTERED_MULTICAS	0x00000010	UefiPxe.h
21858	PXE_ROMID_IMP_SOFTWARE_INT_SUPP	0x00000008	UefiPxe.h
21859	PXE_ROMID_IMP_TX_COMPLETE_INT_S	0x00000004	UefiPxe.h
21860	PXE_ROMID_IMP_PACKET_RX_INT_SUP	0x00000002	UefiPxe.h
21861	PXE_ROMID_IMP_CMD_COMPLETE_INT_	0x00000001	UefiPxe.h
21862	MAX_PCI_CONFIG_LEN	64	UefiPxe.h	< # of dwords
21863	MAX_EEPROM_LEN	128	UefiPxe.h	< # of dwords
21864	MAX_XMIT_BUFFERS	32	UefiPxe.h	< recycling Q length for xmit_done
21865	MAX_MCAST_ADDRESS_CNT	8	UefiPxe.h
21866	TO_AND_FROM_DEVICE	0	UefiPxe.h
21867	FROM_DEVICE	1	UefiPxe.h
21868	TO_DEVICE	2	UefiPxe.h
21869	PXE_DELAY_MILLISECOND	1000	UefiPxe.h
21870	PXE_DELAY_SECOND	1000000	UefiPxe.h
21871	PXE_IO_READ	0	UefiPxe.h
21872	PXE_IO_WRITE	1	UefiPxe.h
21873	PXE_MEM_READ	2	UefiPxe.h
21874	PXE_MEM_WRITE	4	UefiPxe.h
21875	PXE_MAX_TXRX_UNIT_ETHER	1500	UefiPxe.h
21876	PXE_HWADDR_LEN_ETHER	0x0006	UefiPxe.h
21877	PXE_MAC_HEADER_LEN_ETHER	0x000E	UefiPxe.h
21878	PXE_DUPLEX_ENABLE_FULL_SUPPORTE	1	UefiPxe.h
21879	PXE_DUPLEX_FORCE_FULL_SUPPORTED	2	UefiPxe.h
21880	PXE_LOOPBACK_INTERNAL_SUPPORTED	1	UefiPxe.h
21881	PXE_LOOPBACK_EXTERNAL_SUPPORTED	2	UefiPxe.h
21882	PXE_DUPLEX_DEFAULT	0x00	UefiPxe.h
21883	PXE_FORCE_FULL_DUPLEX	0x01	UefiPxe.h
21884	PXE_ENABLE_FULL_DUPLEX	0x02	UefiPxe.h
21885	PXE_FORCE_HALF_DUPLEX	0x04	UefiPxe.h
21886	PXE_DISABLE_FULL_DUPLEX	0x08	UefiPxe.h
21887	LOOPBACK_NORMAL	0	UefiPxe.h
21888	LOOPBACK_INTERNAL	1	UefiPxe.h
21889	LOOPBACK_EXTERNAL	2	UefiPxe.h
21890	PXE_STATISTICS_RX_TOTAL_FRAMES	0x00	UefiPxe.h
21891	PXE_STATISTICS_RX_GOOD_FRAMES	0x01	UefiPxe.h
21892	PXE_STATISTICS_RX_UNDERSIZE_FRA	0x02	UefiPxe.h
21893	PXE_STATISTICS_RX_OVERSIZE_FRAM	0x03	UefiPxe.h
21894	PXE_STATISTICS_RX_DROPPED_FRAME	0x04	UefiPxe.h
21895	PXE_STATISTICS_RX_UNICAST_FRAME	0x05	UefiPxe.h
21896	PXE_STATISTICS_RX_BROADCAST_FRA	0x06	UefiPxe.h
21897	PXE_STATISTICS_RX_MULTICAST_FRA	0x07	UefiPxe.h
21898	PXE_STATISTICS_RX_CRC_ERROR_FRA	0x08	UefiPxe.h
21899	PXE_STATISTICS_RX_TOTAL_BYTES	0x09	UefiPxe.h
21900	PXE_STATISTICS_TX_TOTAL_FRAMES	0x0A	UefiPxe.h
21901	PXE_STATISTICS_TX_GOOD_FRAMES	0x0B	UefiPxe.h
21902	PXE_STATISTICS_TX_UNDERSIZE_FRA	0x0C	UefiPxe.h
21903	PXE_STATISTICS_TX_OVERSIZE_FRAM	0x0D	UefiPxe.h
21904	PXE_STATISTICS_TX_DROPPED_FRAME	0x0E	UefiPxe.h
21905	PXE_STATISTICS_TX_UNICAST_FRAME	0x0F	UefiPxe.h
21906	PXE_STATISTICS_TX_BROADCAST_FRA	0x10	UefiPxe.h
21907	PXE_STATISTICS_TX_MULTICAST_FRA	0x11	UefiPxe.h
21908	PXE_STATISTICS_TX_CRC_ERROR_FRA	0x12	UefiPxe.h
21909	PXE_STATISTICS_TX_TOTAL_BYTES	0x13	UefiPxe.h
21910	PXE_STATISTICS_COLLISIONS	0x14	UefiPxe.h
21911	PXE_STATISTICS_UNSUPPORTED_PROT	0x15	UefiPxe.h
21912	PXE_PROTOCOL_ETHERNET_IP	0x0800	UefiPxe.h
21913	PXE_PROTOCOL_ETHERNET_ARP	0x0806	UefiPxe.h
21914	MAX_XMIT_FRAGMENTS	16	UefiPxe.h
21915	EFI_TIME_ADJUST_DAYLIGHT	0x01	UefiSpec.h
21916	EFI_TIME_IN_DAYLIGHT	0x02	UefiSpec.h
21917	EFI_UNSPECIFIED_TIMEZONE	0x07FF	UefiSpec.h
21918	EFI_MEMORY_UC	0x0000000000000001ULL	UefiSpec.h
21919	EFI_MEMORY_WC	0x0000000000000002ULL	UefiSpec.h
21920	EFI_MEMORY_WT	0x0000000000000004ULL	UefiSpec.h
21921	EFI_MEMORY_WB	0x0000000000000008ULL	UefiSpec.h
21922	EFI_MEMORY_UCE	0x0000000000000010ULL	UefiSpec.h
21923	EFI_MEMORY_WP	0x0000000000001000ULL	UefiSpec.h
21924	EFI_MEMORY_RP	0x0000000000002000ULL	UefiSpec.h
21925	EFI_MEMORY_XP	0x0000000000004000ULL	UefiSpec.h
21926	EFI_MEMORY_RUNTIME	0x8000000000000000ULL	UefiSpec.h
21927	EFI_MEMORY_DESCRIPTOR_VERSION	1	UefiSpec.h
21928	EFI_OPTIONAL_PTR	0x00000001	UefiSpec.h
21929	EFI_OPTIONAL_POINTER	EFI_OPTIONAL_PTR	UefiSpec.h
21930	EVT_TIMER	0x80000000	UefiSpec.h
21931	EVT_RUNTIME	0x40000000	UefiSpec.h
21932	EVT_NOTIFY_WAIT	0x00000100	UefiSpec.h
21933	EVT_NOTIFY_SIGNAL	0x00000200	UefiSpec.h
21934	EVT_SIGNAL_EXIT_BOOT_SERVICES	0x00000201	UefiSpec.h
21935	EVT_SIGNAL_VIRTUAL_ADDRESS_CHAN	0x60000202	UefiSpec.h
21936	EVT_RUNTIME_CONTEXT	0x20000000	UefiSpec.h
21937	TPL_APPLICATION	4	UefiSpec.h
21938	TPL_CALLBACK	8	UefiSpec.h
21939	TPL_NOTIFY	16	UefiSpec.h
21940	TPL_HIGH_LEVEL	31	UefiSpec.h
21941	EFI_OPEN_PROTOCOL_BY_HANDLE_PRO	0x00000001	UefiSpec.h
21942	EFI_OPEN_PROTOCOL_GET_PROTOCOL	0x00000002	UefiSpec.h
21943	EFI_OPEN_PROTOCOL_TEST_PROTOCOL	0x00000004	UefiSpec.h
21944	EFI_OPEN_PROTOCOL_BY_CHILD_CONT	0x00000008	UefiSpec.h
21945	EFI_OPEN_PROTOCOL_BY_DRIVER	0x00000010	UefiSpec.h
21946	EFI_OPEN_PROTOCOL_EXCLUSIVE	0x00000020	UefiSpec.h
21947	CAPSULE_FLAGS_PERSIST_ACROSS_RE	0x00010000	UefiSpec.h
21948	CAPSULE_FLAGS_POPULATE_SYSTEM_T	0x00020000	UefiSpec.h
21949	EFI_SYSTEM_TABLE_SIGNATURE	0x5453595320494249ULL	UefiSpec.h
21950	EFI_SYSTEM_TABLE_REVISION	((2<<16) \| (10))	UefiSpec.h
21951	EFI_2_10_SYSTEM_TABLE_REVISION	((2<<16) \| (10))	UefiSpec.h
21952	EFI_2_00_SYSTEM_TABLE_REVISION	((2<<16) \| (00))	UefiSpec.h
21953	EFI_1_10_SYSTEM_TABLE_REVISION	((1<<16) \| (10))	UefiSpec.h
21954	EFI_1_02_SYSTEM_TABLE_REVISION	((1<<16) \| (02))	UefiSpec.h
21955	EFI_RUNTIME_SERVICES_SIGNATURE	0x56524553544e5552ULL	UefiSpec.h
21956	EFI_RUNTIME_SERVICES_REVISION	EFI_2_10_SYSTEM_TABLE_REVISION	UefiSpec.h
21957	EFI_BOOT_SERVICES_SIGNATURE	0x56524553544f4f42ULL	UefiSpec.h
21958	EFI_BOOT_SERVICES_REVISION	EFI_2_10_SYSTEM_TABLE_REVISION	UefiSpec.h
21959	LOAD_OPTION_ACTIVE	0x00000001	UefiSpec.h
21960	LOAD_OPTION_FORCE_RECONNECT	0x00000002	UefiSpec.h
21961	LOAD_OPTION_HIDDEN	0x00000008	UefiSpec.h
21962	LOAD_OPTION_CATEGORY	0x00001F00	UefiSpec.h
21963	LOAD_OPTION_CATEGORY_BOOT	0x00000000	UefiSpec.h
21964	LOAD_OPTION_CATEGORY_APP	0x00000100	UefiSpec.h
21965	EFI_BOOT_OPTION_SUPPORT_KEY	0x00000001	UefiSpec.h
21966	EFI_BOOT_OPTION_SUPPORT_APP	0x00000002	UefiSpec.h
21967	EFI_BOOT_OPTION_SUPPORT_COUNT	0x00000300	UefiSpec.h
21968	EFI_KEY_OPTION_SHIFT	0x00000001	UefiSpec.h
21969	EFI_KEY_OPTION_CONTROL	0x00000002	UefiSpec.h
21970	EFI_KEY_OPTION_ALT	0x00000004	UefiSpec.h
21971	EFI_KEY_OPTION_LOGO	0x00000008	UefiSpec.h
21972	EFI_KEY_OPTION_MENU	0x00000010	UefiSpec.h
21973	EFI_KEY_OPTION_SYSREQ	0x00000020	UefiSpec.h
21974	EFI_KEY_CODE_COUNT	0x00000300	UefiSpec.h
21975	EFI_REMOVABLE_MEDIA_FILE_NAME_I	L"\\EFI\\BOOT\\BOOTIA32.EFI"	UefiSpec.h
21976	EFI_REMOVABLE_MEDIA_FILE_NAME_I	L"\\EFI\\BOOT\\BOOTIA64.EFI"	UefiSpec.h
21977	EFI_REMOVABLE_MEDIA_FILE_NAME_X	L"\\EFI\\BOOT\\BOOTX64.EFI"	UefiSpec.h
21978	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_IA32	UefiSpec.h
21979	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_IA64	UefiSpec.h
21980	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_X64	UefiSpec.h
21981	UINT8_MAX	0xff	ProcessorBind.h
21982	MAX_BIT	0x8000000000000000ULL	ProcessorBind.h
21983	MAX_2_BITS	0xC000000000000000ULL	ProcessorBind.h
21984	MAX_ADDRESS	0xFFFFFFFFFFFFFFFFULL	ProcessorBind.h
21985	CPU_STACK_ALIGNMENT	16	ProcessorBind.h
21986	EFIAPI	__cdecl	ProcessorBind.h
21987	EFIAPI	__attribute__((ms_abi))	ProcessorBind.h
21988	GLOBAL_REMOVE_IF_UNREFERENCED	__declspec(selectany)	ProcessorBind.h
21989	BS_BOOTSIGNATURE	0x29	fat.h
21990	BS_SIGNATURE	0xAA55	fat.h
21991	LIBFAT_SECTOR_SHIFT	9	libfat.h
21992	LIBFAT_SECTOR_SIZE	512	libfat.h
21993	LIBFAT_SECTOR_MASK	511	libfat.h
21994	ADV_END	0	advconst.h
21995	ADV_BOOTONCE	1	advconst.h
21996	ADV_MENUSAVE	2	advconst.h
21997	ADV_SIZE	512	syslinux.h	Total size
21998	ADV_LEN	(ADV_SIZE-3*4)	syslinux.h	Usable data size
21999	SECTOR_SHIFT	9	syslxint.h	512-byte sectors
22000	SECTOR_SIZE	(1 << SECTOR_SHIFT)	syslxint.h
22001	BIOS_INT13	(0x13*4)	bda.h	INT 13h vector
22002	BIOS_INT15	(0x15*4)	bda.h	INT 15h vector
22003	BIOS_INT1E	(0x1E*4)	bda.h	INT 1Eh vector
22004	BIOS_INT40	(0x40*4)	bda.h	INT 13h vector
22005	BIOS_INT41	(0x41*4)	bda.h	INT 41h vector
22006	BIOS_INT46	(0x46*4)	bda.h	INT 46h vector
22007	BIOS_BASEMEM	0x413	bda.h	Amount of DOS memory
22008	BIOS_EQUIP	0x410	bda.h	BIOS equipment list
22009	BIOS_HD_COUNT	0x475	bda.h	Number of hard drives present
22010	__cdecl	__attribute__((cdecl,regparm(0)))	memdisk.h
22011	sys_bounce	((void *)rm_args.rm_bounce)	memdisk.h
22012	shdr	((struct setup_header *)rm_args.rm_base)	memdisk.h
22013	FIRSTYEAR	"2001"	version.h
22014	COPYYEAR	"2008"	version.h
22015	MALLOC_CHUNK_SIZE	65536	malloc.h
22016	MALLOC_CHUNK_MASK	(MALLOC_CHUNK_SIZE-1)	malloc.h
22017	ARENA_TYPE_USED	0x64e69c70	malloc.h
22018	ARENA_TYPE_FREE	0x012d610a	malloc.h
22019	ARENA_TYPE_HEAD	0x971676b5	malloc.h
22020	ARENA_TYPE_DEAD	0xeeeeeeee	malloc.h
22021	ARENA_TYPE_USED	0	malloc.h
22022	ARENA_TYPE_FREE	1	malloc.h
22023	ARENA_TYPE_HEAD	2	malloc.h
22024	ARENA_SIZE_MASK	(sizeof(struct arena_header)-1)	malloc.h
22025	bool	_Bool	stdbool.h
22026	true	1	stdbool.h
22027	false	0	stdbool.h
22028	bool	bool	stdbool.h
22029	true	true	stdbool.h
22030	false	false	stdbool.h
22031	__bool_true_false_are_defined	1	stdbool.h
22032	INT8_MIN	(-128)	stdint.h
22033	INT16_MIN	(-32767-1)	stdint.h
22034	INT32_MIN	(-2147483647-1)	stdint.h
22035	INT64_MIN	(-9223372036854775807LL-1)	stdint.h
22036	INT8_MAX	(127)	stdint.h
22037	INT16_MAX	(32767)	stdint.h
22038	INT32_MAX	(2147483647)	stdint.h
22039	INT64_MAX	(9223372036854775807LL)	stdint.h
22040	UINT8_MAX	(255U)	stdint.h
22041	UINT16_MAX	(65535U)	stdint.h
22042	UINT32_MAX	(4294967295U)	stdint.h
22043	UINT64_MAX	(18446744073709551615ULL)	stdint.h
22044	INT_LEAST8_MIN	(-128)	stdint.h
22045	INT_LEAST16_MIN	(-32767-1)	stdint.h
22046	INT_LEAST32_MIN	(-2147483647-1)	stdint.h
22047	INT_LEAST64_MIN	(-9223372036854775807LL-1)	stdint.h
22048	INT_LEAST8_MAX	(127)	stdint.h
22049	INT_LEAST16_MAX	(32767)	stdint.h
22050	INT_LEAST32_MAX	(2147483647)	stdint.h
22051	INT_LEAST64_MAX	(9223372036854775807LL)	stdint.h
22052	UINT_LEAST8_MAX	(255U)	stdint.h
22053	UINT_LEAST16_MAX	(65535U)	stdint.h
22054	UINT_LEAST32_MAX	(4294967295U)	stdint.h
22055	UINT_LEAST64_MAX	(18446744073709551615ULL)	stdint.h
22056	INT_FAST8_MIN	(-128)	stdint.h
22057	INT_FAST16_MIN	(-32767-1)	stdint.h
22058	INT_FAST32_MIN	(-2147483647-1)	stdint.h
22059	INT_FAST64_MIN	(-9223372036854775807LL-1)	stdint.h
22060	INT_FAST8_MAX	(127)	stdint.h
22061	INT_FAST16_MAX	(32767)	stdint.h
22062	INT_FAST32_MAX	(2147483647)	stdint.h
22063	INT_FAST64_MAX	(9223372036854775807LL)	stdint.h
22064	UINT_FAST8_MAX	(255U)	stdint.h
22065	UINT_FAST16_MAX	(65535U)	stdint.h
22066	UINT_FAST32_MAX	(4294967295U)	stdint.h
22067	UINT_FAST64_MAX	(18446744073709551615ULL)	stdint.h
22068	INTPTR_MIN	(-2147483647-1)	stdint.h
22069	INTPTR_MAX	(2147483647)	stdint.h
22070	UINTPTR_MAX	(4294967295U)	stdint.h
22071	INTMAX_MIN	(-9223372036854775807LL-1)	stdint.h
22072	INTMAX_MAX	(9223372036854775807LL)	stdint.h
22073	UINTMAX_MAX	(18446744073709551615ULL)	stdint.h
22074	PTRDIFF_MIN	(-2147483647-1)	stdint.h
22075	PTRDIFF_MAX	(2147483647)	stdint.h
22076	SIG_ATOMIC_MIN	(-2147483647-1)	stdint.h
22077	SIG_ATOMIC_MAX	(2147483647)	stdint.h
22078	SIZE_MAX	(4294967295U)	stdint.h
22079	stdin	0	stdio.h
22080	stdout	1	stdio.h
22081	stderr	2	stdio.h
22082	NULL	((void *)0)	stdlib.h
22083	VERSION	3.86	version.h
22084	VERSION_STR	"3.86"	version.h
22085	VERSION_MAJOR	3	version.h
22086	VERSION_MINOR	86	version.h
22087	YEAR	2010	version.h
22088	YEAR_STR	"2010"	version.h
22089	NULL	((void *)0)	com32io.h
22090	INSERT_ON	(1<<7)	com32io.h
22091	CAPSLOCK_ON	(1<<6)	com32io.h
22092	NUMLOCK_ON	(1<<5)	com32io.h
22093	SCRLLOCK_ON	(1<<4)	com32io.h
22094	ALT_PRESSED	(1<<3)	com32io.h
22095	CTRL_PRESSED	(1<<2)	com32io.h
22096	SHIFT_PRESSED	(1<<1 \| 1 <<0)	com32io.h
22097	HELP_TITLE_HEIGHT	1	help.h
22098	HELP_BODY_ROW	(HELP_TITLE_HEIGHT+3)	help.h
22099	HELP_LEFT_MARGIN	2	help.h
22100	HELP_RIGHT_MARGIN	2	help.h	Assume all lines dont cross this
22101	HELP_BOTTOM_MARGIN	1	help.h	Number of lines not use from bottom of screen
22102	HELPBOX	BOX_SINSIN	help.h
22103	HELPDIRLEN	64	help.h
22104	HELPPAGE	2	help.h
22105	HELP_MORE_ABOVE	'^'	help.h	to print when more is available above
22106	HELP_MORE_BELOW	'v'	help.h	same as above but for below
22107	TIMEOUTSTEPSIZE	10	menu.h
22108	TIMEOUTNUMSTEPS	30000L	menu.h
22109	NORMALATTR	0x17	menu.h
22110	NORMALHLITE	0x1F	menu.h	Normal Highlight attribute
22111	REVERSEATTR	0x70	menu.h
22112	REVERSEHLITE	0x78	menu.h	Reverse Hightlight attribute
22113	INACTATTR	0x18	menu.h
22114	INACTHLITE	0x10	menu.h	Inactive Highlight attribute
22115	REVINACTATTR	0x78	menu.h
22116	REVINACTHLITE	0x70	menu.h	Reverse Inactive Highlight attr
22117	STATUSATTR	0x74	menu.h
22118	STATUSHLITE	0x7B	menu.h	Status highlight
22119	FILLCHAR	' '	menu.h
22120	FILLATTR	NORMALATTR	menu.h
22121	SHADOWATTR	0x00	menu.h
22122	SPACECHAR	' '	menu.h
22123	TFILLCHAR	' '	menu.h
22124	TITLEATTR	0x70	menu.h
22125	ENABLEHLITE	'<'	menu.h	Char which turns on highlight
22126	DISABLEHLITE	'>'	menu.h	Char which turns off highlight
22127	NOHLITE	0	menu.h	The offset into attrib array for non-hilite
22128	HLITE	1	menu.h	The offset for Hlite attrib
22129	MOREABOVE	'^'	menu.h	char to print when more menu items available above
22130	MOREBELOW	'v'	menu.h	more items available below
22131	MAXMENUS	250	menu.h	Maximum number of menu's allowed
22132	MAXMENUSIZE	100	menu.h	Default value for max num of entries in each menu
22133	MAXMENUHEIGHT	20	menu.h	Maximum number of entries displayed
22134	MENUBOXTYPE	BOX_SINSIN	menu.h	Default box type Look at tui.h for other values
22135	MENULEN	78	menu.h	Each menu entry is atmost MENULEN chars
22136	STATLEN	78	menu.h	Maximum length of status string
22137	TITLELEN	78	menu.h	Maximum length of title string
22138	ACTIONLEN	255	menu.h	Maximum length of an action string
22139	MENUROW	3	menu.h	Row where menu is displayed (relative to window)
22140	MENUCOL	4	menu.h	Col where menu is displayed (relative to window)
22141	MENUPAGE	1	menu.h	show in display page 1
22142	STATLINE	24	menu.h	Line number where status line starts (relative to window)
22143	DEBUGLINE	23	menu.h	debugging info goes here
22144	RADIOMENUCHAR	'>'	menu.h	> symbol for radio menu?
22145	CHECKED	'\140'	menu.h	Check mark
22146	UNCHECKED	'\146'	menu.h	Light bullet
22147	RADIOSEL	'.'	menu.h	Current Radio Selection
22148	RADIOUNSEL	' '	menu.h	Radio option not selected
22149	NORMALMENU	1	menu.h
22150	RADIOMENU	2	menu.h
22151	MAX_USERS	128	passwords.h	Maximum number of users
22152	USERNAME_LENGTH	12	passwords.h	Max length of user name
22153	PWDHASH_LENGTH	40	passwords.h	Max lenght of pwd hash
22154	GUEST_USER	"guest"	passwords.h
22155	NULL	((void *)0)	tui.h
22156	SO	'\016'	tui.h
22157	SI	'\017'	tui.h
22158	TOP_LEFT_CORNER_BORDER	'\154'	tui.h
22159	TOP_BORDER	'\161'	tui.h
22160	TOP_RIGHT_CORNER_BORDER	'\153'	tui.h
22161	BOTTOM_LEFT_CORNER_BORDER	'\155'	tui.h
22162	BOTTOM_BORDER	'\161'	tui.h
22163	BOTTOM_RIGHT_CORNER_BORDER	'\152'	tui.h
22164	LEFT_BORDER	'\170'	tui.h
22165	RIGHT_BORDER	'\170'	tui.h
22166	LEFT_MIDDLE_BORDER	'\164'	tui.h
22167	MIDDLE_BORDER	'\161'	tui.h
22168	RIGHT_MIDDLE_BORDER	'\165'	tui.h
22169	BELL	0x07	tui.h
22170	GETSTRATTR	0x07	tui.h
22171	PAGE_SIZE	4096	cpuid.h
22172	CPU_MODEL_SIZE	48	cpuid.h
22173	CPU_VENDOR_SIZE	48	cpuid.h
22174	X86_EFLAGS_CF	0x00000001	cpuid.h	Carry Flag
22175	X86_EFLAGS_PF	0x00000004	cpuid.h	Parity Flag
22176	X86_EFLAGS_AF	0x00000010	cpuid.h	Auxillary carry Flag
22177	X86_EFLAGS_ZF	0x00000040	cpuid.h	Zero Flag
22178	X86_EFLAGS_SF	0x00000080	cpuid.h	Sign Flag
22179	X86_EFLAGS_TF	0x00000100	cpuid.h	Trap Flag
22180	X86_EFLAGS_IF	0x00000200	cpuid.h	Interrupt Flag
22181	X86_EFLAGS_DF	0x00000400	cpuid.h	Direction Flag
22182	X86_EFLAGS_OF	0x00000800	cpuid.h	Overflow Flag
22183	X86_EFLAGS_IOPL	0x00003000	cpuid.h	IOPL mask
22184	X86_EFLAGS_NT	0x00004000	cpuid.h	Nested Task
22185	X86_EFLAGS_RF	0x00010000	cpuid.h	Resume Flag
22186	X86_EFLAGS_VM	0x00020000	cpuid.h	Virtual Mode
22187	X86_EFLAGS_AC	0x00040000	cpuid.h	Alignment Check
22188	X86_EFLAGS_VIF	0x00080000	cpuid.h	Virtual Interrupt Flag
22189	X86_EFLAGS_VIP	0x00100000	cpuid.h	Virtual Interrupt Pending
22190	X86_EFLAGS_ID	0x00200000	cpuid.h	CPUID detection flag
22191	X86_VENDOR_INTEL	0	cpuid.h
22192	X86_VENDOR_CYRIX	1	cpuid.h
22193	X86_VENDOR_AMD	2	cpuid.h
22194	X86_VENDOR_UMC	3	cpuid.h
22195	X86_VENDOR_NEXGEN	4	cpuid.h
22196	X86_VENDOR_CENTAUR	5	cpuid.h
22197	X86_VENDOR_RISE	6	cpuid.h
22198	X86_VENDOR_TRANSMETA	7	cpuid.h
22199	X86_VENDOR_NSC	8	cpuid.h
22200	X86_VENDOR_NUM	9	cpuid.h
22201	X86_VENDOR_UNKNOWN	0xff	cpuid.h
22202	SMP_MAGIC_IDENT	(('_'<<24)\|('P'<<16)\|('M'<<8)\|'_')	cpuid.h
22203	E820MAX	128	memory.h
22204	E820_RAM	1	memory.h
22205	E820_RESERVED	2	memory.h
22206	E820_ACPI	3	memory.h	usable as RAM once ACPI tables have been read
22207	E820_NVS	4	memory.h
22208	RES_START	0xa0000	memory.h
22209	RES_END	0x100000	memory.h
22210	SECTOR	512	common.h	bytes/sector
22211	EDINV	0x01	errno_disk.h	Invalid function in AH or invalid parameter
22212	EDADDR	0x02	errno_disk.h	Address mark not found
22213	EDRO	0x03	errno_disk.h	Disk write-protected
22214	EDNOFND	0x04	errno_disk.h	Sector not found/read error
22215	EDRFAIL	0x05	errno_disk.h	Reset failed (hard disk)
22216	EDCHANG	0x06	errno_disk.h	Disk changed (floppy)
22217	EDFAIL	0x07	errno_disk.h	Drive parameter activity failed (hard disk)
22218	EDDMA	0x08	errno_disk.h	DMA overrun
22219	EDBOUND	0x09	errno_disk.h	Data boundary error (attempted DMA across 64K boundary or >80h sectors)
22220	EDBADS	0x0A	errno_disk.h	Bad sector detected (hard disk)
22221	EDBADT	0x0B	errno_disk.h	Bad track detected (hard disk)
22222	EDINVM	0x0C	errno_disk.h	Unsupported track or invalid media
22223	EDINVS	0x0D	errno_disk.h	Invalid number of sectors on format (PS/2 hard disk)
22224	EDADDRM	0x0E	errno_disk.h	Control data address mark detected (hard disk)
22225	EDDMARG	0x0F	errno_disk.h	DMA arbitration level out of range (hard disk)
22226	EDCRCF	0x10	errno_disk.h	Uncorrectable CRC or ECC error on read
22227	EDCRCV	0x11	errno_disk.h	Data ECC corrected (hard disk)
22228	EDCTRL	0x20	errno_disk.h	Controller failure
22229	EDMEDIA	0x31	errno_disk.h	No media in drive (IBM/MS INT 13 extensions)
22230	EDCMOS	0x32	errno_disk.h	Incorrect drive type stored in CMOS (Compaq)
22231	EDSEEKF	0x40	errno_disk.h	Seek failed
22232	EDTIME	0x80	errno_disk.h	Timeout (not ready)
22233	EDREADY	0xAA	errno_disk.h	Drive not ready (hard disk)
22234	EDNLOCK	0xB0	errno_disk.h	Volume not locked in drive (INT 13 extensions)
22235	EDLOCK	0xB1	errno_disk.h	Volume locked in drive (INT 13 extensions)
22236	EDREMOV	0xB2	errno_disk.h	Volume not removable (INT 13 extensions)
22237	EDUSED	0xB3	errno_disk.h	Volume in use (INT 13 extensions)
22238	EDCOUNT	0xB4	errno_disk.h	Lock count exceeded (INT 13 extensions)
22239	EDEJF	0xB5	errno_disk.h	Valid eject request failed (INT 13 extensions)
22240	EDUNKOWN	0xBB	errno_disk.h	Undefined error (hard disk)
22241	EDWF	0xCC	errno_disk.h	Write fault (hard disk)
22242	EDRF	0xE0	errno_disk.h	Status register error (hard disk)
22243	EDSF	0xFF	errno_disk.h	Sense operation failed (hard disk)
22244	PARTITION_TABLES_OFFSET	0x1be	partition.h
22245	SWSUSP_SIG	"S1SUSPEND"	swsusp.h
22246	DMI_BUFFER_SIZE	16	dmi.h
22247	MAX_DMI_MEMORY_ITEMS	32	dmi.h
22248	MAX_DMI_CACHE_ITEMS	32	dmi.h
22249	OEM_STRINGS_SIZE	512	dmi.h
22250	HARDWARE_SECURITY_SIZE	16	dmi.h
22251	PAGE_SIZE	4096	dmi.h
22252	BASE_BOARD_MANUFACTURER_SIZE	32	dmi_base_board.h
22253	BASE_BOARD_PRODUCT_NAME_SIZE	32	dmi_base_board.h
22254	BASE_BOARD_VERSION_SIZE	16	dmi_base_board.h
22255	BASE_BOARD_SERIAL_SIZE	32	dmi_base_board.h
22256	BASE_BOARD_ASSET_TAG_SIZE	32	dmi_base_board.h
22257	BASE_BOARD_LOCATION_SIZE	32	dmi_base_board.h
22258	BASE_BOARD_FEATURES_SIZE	32	dmi_base_board.h
22259	BASE_BOARD_TYPE_SIZE	32	dmi_base_board.h
22260	BASE_BOARD_NB_ELEMENTS	5	dmi_base_board.h
22261	BATTERY_LOCATION_SIZE	255	dmi_battery.h
22262	BATTERY_MANUFACTURER_SIZE	255	dmi_battery.h
22263	BATTERY_MANUFACTURE_DATE_SIZE	255	dmi_battery.h
22264	BATTERY_SERIAL_SIZE	255	dmi_battery.h
22265	BATTERY_DEVICE_NAME_SIZE	255	dmi_battery.h
22266	BATTERY_CHEMISTRY_SIZE	32	dmi_battery.h
22267	BATTERY_CAPACITY_SIZE	16	dmi_battery.h
22268	BATTERY_DESIGN_VOLTAGE_SIZE	16	dmi_battery.h
22269	BATTERY_SBDS_SIZE	255	dmi_battery.h
22270	BATTERY_MAXIMUM_ERROR_SIZE	32	dmi_battery.h
22271	BATTERY_SBDS_SERIAL_SIZE	32	dmi_battery.h
22272	BATTERY_SBDS_MANUFACTURE_DATE_S	255	dmi_battery.h
22273	BATTERY_SBDS_CHEMISTRY_SIZE	16	dmi_battery.h
22274	BATTERY_OEM_INFO_SIZE	255	dmi_battery.h
22275	BIOS_VENDOR_SIZE	32	dmi_bios.h
22276	BIOS_VERSION_SIZE	32	dmi_bios.h
22277	BIOS_RELEASE_SIZE	16	dmi_bios.h
22278	BIOS_RUNTIME_SIZE_UNIT_SIZE	16	dmi_bios.h
22279	BIOS_ROM_UNIT_SIZE	16	dmi_bios.h
22280	BIOS_BIOS_REVISION_SIZE	16	dmi_bios.h
22281	BIOS_FIRMWARE_REVISION_SIZE	16	dmi_bios.h
22282	BIOS_CHAR_NB_ELEMENTS	28	dmi_bios.h
22283	BIOS_CHAR_X1_NB_ELEMENTS	8	dmi_bios.h
22284	BIOS_CHAR_X2_NB_ELEMENTS	3	dmi_bios.h
22285	CHASSIS_MANUFACTURER_SIZE	32	dmi_chassis.h
22286	CHASSIS_TYPE_SIZE	16	dmi_chassis.h
22287	CHASSIS_LOCK_SIZE	16	dmi_chassis.h
22288	CHASSIS_VERSION_SIZE	16	dmi_chassis.h
22289	CHASSIS_SERIAL_SIZE	32	dmi_chassis.h
22290	CHASSIS_ASSET_TAG_SIZE	32	dmi_chassis.h
22291	CHASSIS_BOOT_UP_STATE_SIZE	32	dmi_chassis.h
22292	CHASSIS_POWER_SUPPLY_STATE_SIZE	32	dmi_chassis.h
22293	CHASSIS_THERMAL_STATE_SIZE	32	dmi_chassis.h
22294	CHASSIS_SECURITY_STATUS_SIZE	32	dmi_chassis.h
22295	CHASSIS_OEM_INFORMATION_SIZE	32	dmi_chassis.h
22296	IPMI_INTERFACE_TYPE_SIZE	32	dmi_ipmi.h
22297	IPMI_MEMORY_MODEL_SIZE	16	dmi_ipmi.h
22298	MEMORY_MANUFACTURER_SIZE	32	dmi_memory.h
22299	MEMORY_ERROR_SIZE	16	dmi_memory.h
22300	MEMORY_TOTAL_WIDTH_SIZE	16	dmi_memory.h
22301	MEMORY_DATA_WIDTH_SIZE	16	dmi_memory.h
22302	MEMORY_SIZE_SIZE	32	dmi_memory.h
22303	MEMORY_FORM_FACTOR_SIZE	32	dmi_memory.h
22304	MEMORY_DEVICE_SET_SIZE	32	dmi_memory.h
22305	MEMORY_DEVICE_LOCATOR_SIZE	32	dmi_memory.h
22306	MEMORY_BANK_LOCATOR_SIZE	32	dmi_memory.h
22307	MEMORY_TYPE_SIZE	32	dmi_memory.h
22308	MEMORY_TYPE_DETAIL_SIZE	16	dmi_memory.h
22309	MEMORY_SPEED_SIZE	16	dmi_memory.h
22310	MEMORY_SERIAL_SIZE	16	dmi_memory.h
22311	MEMORY_ASSET_TAG_SIZE	16	dmi_memory.h
22312	MEMORY_PART_NUMBER_SIZE	16	dmi_memory.h
22313	PROCESSOR_SOCKET_DESIGNATION_SI	32	dmi_processor.h
22314	PROCESSOR_TYPE_SIZE	32	dmi_processor.h
22315	PROCESSOR_FAMILY_SIZE	32	dmi_processor.h
22316	PROCESSOR_MANUFACTURER_SIZE	64	dmi_processor.h
22317	PROCESSOR_VERSION_SIZE	32	dmi_processor.h
22318	PROCESSOR_VOLTAGE_SIZE	16	dmi_processor.h
22319	PROCESSOR_STATUS_SIZE	16	dmi_processor.h
22320	PROCESSOR_UPGRADE_SIZE	16	dmi_processor.h
22321	PROCESSOR_CACHE_SIZE	16	dmi_processor.h
22322	PROCESSOR_SERIAL_SIZE	32	dmi_processor.h
22323	PROCESSOR_ASSET_TAG_SIZE	32	dmi_processor.h
22324	PROCESSOR_PART_NUMBER_SIZE	32	dmi_processor.h
22325	PROCESSOR_ID_SIZE	32	dmi_processor.h
22326	PROCESSOR_FLAGS_ELEMENTS	32	dmi_processor.h
22327	SYSTEM_MANUFACTURER_SIZE	32	dmi_system.h
22328	SYSTEM_PRODUCT_NAME_SIZE	32	dmi_system.h
22329	SYSTEM_VERSION_SIZE	16	dmi_system.h
22330	SYSTEM_SERIAL_SIZE	32	dmi_system.h
22331	SYSTEM_UUID_SIZE	40	dmi_system.h
22332	SYSTEM_WAKEUP_TYPE_SIZE	32	dmi_system.h
22333	SYSTEM_SKU_NUMBER_SIZE	32	dmi_system.h
22334	SYSTEM_FAMILY_SIZE	32	dmi_system.h
22335	SYSTEM_BOOT_STATUS_SIZE	50	dmi_system.h
22336	SYSTEM_CONFIGURATION_OPTIONS_SI	50	dmi_system.h
22337	DEBUG	0	hdt-cli.h
22338	dprintf	printf	hdt-cli.h
22339	MAX_LINE_SIZE	256	hdt-cli.h
22340	CLI_SPACE	" "	hdt-cli.h
22341	CLI_LF	"\n"	hdt-cli.h
22342	CLI_MENU	"menu"	hdt-cli.h
22343	CLI_CLEAR	"clear"	hdt-cli.h
22344	CLI_EXIT	"exit"	hdt-cli.h
22345	CLI_HELP	"help"	hdt-cli.h
22346	CLI_REBOOT	"reboot"	hdt-cli.h
22347	CLI_SHOW	"show"	hdt-cli.h
22348	CLI_SET	"set"	hdt-cli.h
22349	CLI_MODE	"mode"	hdt-cli.h
22350	CLI_HDT	"hdt"	hdt-cli.h
22351	CLI_PCI	"pci"	hdt-cli.h
22352	CLI_PXE	"pxe"	hdt-cli.h
22353	CLI_KERNEL	"kernel"	hdt-cli.h
22354	CLI_SYSLINUX	"syslinux"	hdt-cli.h
22355	CLI_VESA	"vesa"	hdt-cli.h
22356	CLI_SUMMARY	"summary"	hdt-cli.h
22357	CLI_COMMANDS	"commands"	hdt-cli.h
22358	CLI_DMI	"dmi"	hdt-cli.h
22359	CLI_CPU	"cpu"	hdt-cli.h
22360	CLI_DISK	"disk"	hdt-cli.h
22361	CLI_SHOW_LIST	"list"	hdt-cli.h
22362	CLI_IRQ	"irq"	hdt-cli.h
22363	CLI_MODES	"modes"	hdt-cli.h
22364	CLI_VPD	"vpd"	hdt-cli.h
22365	CLI_MEMORY	"memory"	hdt-cli.h
22366	CLI_ENABLE	"enable"	hdt-cli.h
22367	CLI_DISABLE	"disable"	hdt-cli.h
22368	PROMPT_SIZE	32	hdt-cli.h
22369	MAX_HISTORY_SIZE	32	hdt-cli.h
22370	INPUT	hdt_cli.history[hdt_cli.history_pos]	hdt-cli.h
22371	MAX_ALIASES	2	hdt-cli.h
22372	CLI_HISTORY	"history"	hdt-cli.h
22373	CLI_DMI_BASE_BOARD	"base_board"	hdt-cli.h
22374	CLI_DMI_BATTERY	"battery"	hdt-cli.h
22375	CLI_DMI_BIOS	"bios"	hdt-cli.h
22376	CLI_DMI_CHASSIS	"chassis"	hdt-cli.h
22377	CLI_DMI_MEMORY	"memory"	hdt-cli.h
22378	CLI_DMI_MEMORY_BANK	"bank"	hdt-cli.h
22379	CLI_DMI_PROCESSOR	"cpu"	hdt-cli.h
22380	CLI_DMI_SYSTEM	"system"	hdt-cli.h
22381	CLI_DMI_IPMI	"ipmi"	hdt-cli.h
22382	CLI_DMI_CACHE	"cache"	hdt-cli.h
22383	CLI_DMI_OEM	"oem"	hdt-cli.h
22384	CLI_DMI_SECURITY	"security"	hdt-cli.h
22385	CLI_DMI_LIST	CLI_SHOW_LIST	hdt-cli.h
22386	CLI_PCI_DEVICE	"device"	hdt-cli.h
22387	__unused	__attribute__ (( unused ))	hdt-common.h
22388	HDT_SWITCH_TO_CLI	"hdt_switch_to_cli"	hdt-common.h
22389	HDT_RETURN_TO_CLI	100	hdt-common.h
22390	MAX_VESA_MODES	255	hdt-common.h
22391	MAX_NB_AUTO_COMMANDS	255	hdt-common.h
22392	AUTO_COMMAND_SIZE	255	hdt-common.h
22393	AUTO_SEPARATOR	";"	hdt-common.h
22394	AUTO_DELIMITER	"'"	hdt-common.h
22395	CLI_DEFAULT_BACKGROUND	"backgnd.png"	hdt-common.h
22396	MAX_CLI_LINES	20	hdt-common.h
22397	MAX_VESA_CLI_LINES	24	hdt-common.h
22398	EDITPROMPT	21	hdt-menu.h
22399	SUBMENULEN	46	hdt-menu.h
22400	SUBMENU_Y	3	hdt-menu.h
22401	SUBMENU_X	29	hdt-menu.h
22402	MAX_PCI_SUB_MENU	128	hdt-menu.h
22403	MAX_MEMORY_SUB_MENU	32	hdt-menu.h
22404	MAX_DISK_SUB_MENU	32	hdt-menu.h
22405	PRODUCT_NAME	"Hardware Detection Tool"	hdt.h
22406	AUTHOR	"Erwan Velu"	hdt.h
22407	CORE_DEVELOPER	"Pierre-Alexandre Meyer"	hdt.h
22408	CONTACT	"hdt@zytor.com"	hdt.h
22409	VERSION	"0.3.6"	hdt.h
22410	CODENAME	"bluelabel"	hdt.h
22411	NB_CONTRIBUTORS	3	hdt.h
22412	CONTRIBUTORS	{"Sebastien Gonzalve (Patches)", "Gert Hulselmans (Tests)", "Alexander Andino (Design)"}	hdt.h
22413	WEBSITE_URL	"http://hdt-project.org"	hdt.h
22414	ATTR_PACKED	__attribute__((packed))	hdt.h
22415	WITH_PCI	1	hdt.h
22416	WITH_MENU_DISPLAY	1	hdt.h
22417	EFLAGS_CF	0x00000001	com32.h
22418	EFLAGS_PF	0x00000004	com32.h
22419	EFLAGS_AF	0x00000010	com32.h
22420	EFLAGS_ZF	0x00000040	com32.h
22421	EFLAGS_SF	0x00000080	com32.h
22422	EFLAGS_TF	0x00000100	com32.h
22423	EFLAGS_IF	0x00000200	com32.h
22424	EFLAGS_DF	0x00000400	com32.h
22425	EFLAGS_OF	0x00000800	com32.h
22426	EFLAGS_IOPL	0x00003000	com32.h
22427	EFLAGS_NT	0x00004000	com32.h
22428	EFLAGS_RF	0x00010000	com32.h
22429	EFLAGS_VM	0x00020000	com32.h
22430	EFLAGS_AC	0x00040000	com32.h
22431	EFLAGS_VIF	0x00080000	com32.h
22432	EFLAGS_VIP	0x00100000	com32.h
22433	EFLAGS_ID	0x00200000	com32.h
22434	NCAPINTS	7	cpufeature.h	N 32-bit words worth of info
22435	X86_FEATURE_FPU	(0*32+ 0)	cpufeature.h	Onboard FPU
22436	X86_FEATURE_VME	(0*32+ 1)	cpufeature.h	Virtual Mode Extensions
22437	X86_FEATURE_DE	(0*32+ 2)	cpufeature.h	Debugging Extensions
22438	X86_FEATURE_PSE	(0*32+ 3)	cpufeature.h	Page Size Extensions
22439	X86_FEATURE_TSC	(0*32+ 4)	cpufeature.h	Time Stamp Counter
22440	X86_FEATURE_MSR	(0*32+ 5)	cpufeature.h	Model-Specific Registers, RDMSR, WRMSR
22441	X86_FEATURE_PAE	(0*32+ 6)	cpufeature.h	Physical Address Extensions
22442	X86_FEATURE_MCE	(0*32+ 7)	cpufeature.h	Machine Check Architecture
22443	X86_FEATURE_CX8	(0*32+ 8)	cpufeature.h	CMPXCHG8 instruction
22444	X86_FEATURE_APIC	(0*32+ 9)	cpufeature.h	Onboard APIC
22445	X86_FEATURE_SEP	(0*32+11)	cpufeature.h	SYSENTER/SYSEXIT
22446	X86_FEATURE_MTRR	(0*32+12)	cpufeature.h	Memory Type Range Registers
22447	X86_FEATURE_PGE	(0*32+13)	cpufeature.h	Page Global Enable
22448	X86_FEATURE_MCA	(0*32+14)	cpufeature.h	Machine Check Architecture
22449	X86_FEATURE_CMOV	(0*32+15)	cpufeature.h	CMOV instruction (FCMOVCC and FCOMI too if FPU present)
22450	X86_FEATURE_PAT	(0*32+16)	cpufeature.h	Page Attribute Table
22451	X86_FEATURE_PSE36	(0*32+17)	cpufeature.h	36-bit PSEs
22452	X86_FEATURE_PN	(0*32+18)	cpufeature.h	Processor serial number
22453	X86_FEATURE_CLFLSH	(0*32+19)	cpufeature.h	Supports the CLFLUSH instruction
22454	X86_FEATURE_DTES	(0*32+21)	cpufeature.h	Debug Trace Store
22455	X86_FEATURE_ACPI	(0*32+22)	cpufeature.h	ACPI via MSR
22456	X86_FEATURE_MMX	(0*32+23)	cpufeature.h	Multimedia Extensions
22457	X86_FEATURE_FXSR	(0*32+24)	cpufeature.h	FXSAVE and FXRSTOR instructions (fast save and restore
22458	X86_FEATURE_XMM	(0*32+25)	cpufeature.h	Streaming SIMD Extensions
22459	X86_FEATURE_XMM2	(0*32+26)	cpufeature.h	Streaming SIMD Extensions-2
22460	X86_FEATURE_SELFSNOOP	(0*32+27)	cpufeature.h	CPU self snoop
22461	X86_FEATURE_HT	(0*32+28)	cpufeature.h	Hyper-Threading
22462	X86_FEATURE_ACC	(0*32+29)	cpufeature.h	Automatic clock control
22463	X86_FEATURE_IA64	(0*32+30)	cpufeature.h	IA-64 processor
22464	X86_FEATURE_PBE	(0*32+31)	cpufeature.h	Pending Break Enable
22465	X86_FEATURE_SYSCALL	(1*32+11)	cpufeature.h	SYSCALL/SYSRET
22466	X86_FEATURE_MP	(1*32+19)	cpufeature.h	MP Capable.
22467	X86_FEATURE_NX	(1*32+20)	cpufeature.h	Execute Disable
22468	X86_FEATURE_MMXEXT	(1*32+22)	cpufeature.h	AMD MMX extensions
22469	X86_FEATURE_FXSR_OPT	(1*32+25)	cpufeature.h	FXSAVE/FXRSTOR optimizations
22470	X86_FEATURE_GBPAGES	(1*32+26)	cpufeature.h	"pdpe1gb" GB pages
22471	X86_FEATURE_RDTSCP	(1*32+27)	cpufeature.h	RDTSCP
22472	X86_FEATURE_LM	(1*32+29)	cpufeature.h	Long Mode (x86-64)
22473	X86_FEATURE_3DNOWEXT	(1*32+30)	cpufeature.h	AMD 3DNow! extensions
22474	X86_FEATURE_3DNOW	(1*32+31)	cpufeature.h	3DNow!
22475	X86_FEATURE_RECOVERY	(2*32+ 0)	cpufeature.h	CPU in recovery mode
22476	X86_FEATURE_LONGRUN	(2*32+ 1)	cpufeature.h	Longrun power control
22477	X86_FEATURE_LRTI	(2*32+ 3)	cpufeature.h	LongRun table interface
22478	X86_FEATURE_CXMMX	(3*32+ 0)	cpufeature.h	Cyrix MMX extensions
22479	X86_FEATURE_K6_MTRR	(3*32+ 1)	cpufeature.h	AMD K6 nonstandard MTRRs
22480	X86_FEATURE_CYRIX_ARR	(3*32+ 2)	cpufeature.h	Cyrix ARRs (= MTRRs)
22481	X86_FEATURE_CENTAUR_MCR	(3*32+ 3)	cpufeature.h	Centaur MCRs (= MTRRs)
22482	X86_FEATURE_K8	(3*32+ 4)	cpufeature.h	Opteron, Athlon64
22483	X86_FEATURE_K7	(3*32+ 5)	cpufeature.h	Athlon
22484	X86_FEATURE_P3	(3*32+ 6)	cpufeature.h	P3
22485	X86_FEATURE_P4	(3*32+ 7)	cpufeature.h	P4
22486	X86_FEATURE_XMM3	(4*32+ 0)	cpufeature.h	Streaming SIMD Extensions-3
22487	X86_FEATURE_PCLMULQDQ	(4*32+ 1)	cpufeature.h	PCLMULQDQ instruction
22488	X86_FEATURE_DTES64	(4*32+ 2)	cpufeature.h	64-bit Debug Store
22489	X86_FEATURE_MWAIT	(4*32+ 3)	cpufeature.h	Monitor/Mwait support
22490	X86_FEATURE_DSCPL	(4*32+ 4)	cpufeature.h	CPL Qualified Debug Store
22491	X86_FEATURE_VMX	(4*32+ 5)	cpufeature.h	Hardware virtualization
22492	X86_FEATURE_SMX	(4*32+ 6)	cpufeature.h	Safer mode
22493	X86_FEATURE_EST	(4*32+ 7)	cpufeature.h	Enhanced SpeedStep
22494	X86_FEATURE_TM2	(4*32+ 8)	cpufeature.h	Thermal Monitor 2
22495	X86_FEATURE_SSE3	(4*32+ 9)	cpufeature.h	Supplemental SSE-3
22496	X86_FEATURE_CID	(4*32+10)	cpufeature.h	Context ID
22497	X86_FEATURE_FMA	(4*32+12)	cpufeature.h	Fused multiply-add
22498	X86_FEATURE_CX16	(4*32+13)	cpufeature.h	CMPXCHG16B
22499	X86_FEATURE_XTPR	(4*32+14)	cpufeature.h	Send Task Priority Messages
22500	X86_FEATURE_PDCM	(4*32+15)	cpufeature.h	Performance Capabilities
22501	X86_FEATURE_DCA	(4*32+18)	cpufeature.h	Direct Cache Access
22502	X86_FEATURE_XMM4_1	(4*32+19)	cpufeature.h	"sse4_1" SSE-4.1
22503	X86_FEATURE_XMM4_2	(4*32+20)	cpufeature.h	"sse4_2" SSE-4.2
22504	X86_FEATURE_X2APIC	(4*32+21)	cpufeature.h	x2APIC
22505	X86_FEATURE_MOVBE	(4*32+22)	cpufeature.h	MOVBE instruction
22506	X86_FEATURE_POPCNT	(4*32+23)	cpufeature.h	POPCNT instruction
22507	X86_FEATURE_AES	(4*32+25)	cpufeature.h	AES instructions
22508	X86_FEATURE_XSAVE	(4*32+26)	cpufeature.h	XSAVE/XRSTOR/XSETBV/XGETBV
22509	X86_FEATURE_OSXSAVE	(4*32+27)	cpufeature.h	"" XSAVE enabled in the OS
22510	X86_FEATURE_AVX	(4*32+28)	cpufeature.h	Advanced Vector Extensions
22511	X86_FEATURE_HYPERVISOR	(4*32+31)	cpufeature.h	Running on a hypervisor
22512	X86_FEATURE_XSTORE	(5*32+ 2)	cpufeature.h	on-CPU RNG present (xstore insn)
22513	X86_FEATURE_XSTORE_EN	(5*32+ 3)	cpufeature.h	on-CPU RNG enabled
22514	X86_FEATURE_XCRYPT	(5*32+ 6)	cpufeature.h	on-CPU crypto (xcrypt insn)
22515	X86_FEATURE_XCRYPT_EN	(5*32+ 7)	cpufeature.h	on-CPU crypto enabled
22516	X86_FEATURE_ACE2	(5*32+ 8)	cpufeature.h	Advanced Cryptography Engine v2
22517	X86_FEATURE_ACE2_EN	(5*32+ 9)	cpufeature.h	ACE v2 enabled
22518	X86_FEATURE_PHE	(5*32+10)	cpufeature.h	PadLock Hash Engine
22519	X86_FEATURE_PHE_EN	(5*32+11)	cpufeature.h	PHE enabled
22520	X86_FEATURE_PMM	(5*32+12)	cpufeature.h	PadLock Montgomery Multiplier
22521	X86_FEATURE_PMM_EN	(5*32+13)	cpufeature.h	PMM enabled
22522	X86_FEATURE_LAHF_LM	(6*32+ 0)	cpufeature.h	LAHF/SAHF in long mode
22523	X86_FEATURE_CMP_LEGACY	(6*32+ 1)	cpufeature.h	If yes HyperThreading not valid
22524	X86_FEATURE_SVM	(6*32+ 2)	cpufeature.h	Secure virtual machine
22525	X86_FEATURE_EXTAPIC	(6*32+ 3)	cpufeature.h	Extended APIC space
22526	X86_FEATURE_CR8_LEGACY	(6*32+ 4)	cpufeature.h	CR8 in 32-bit mode
22527	X86_FEATURE_ABM	(6*32+ 5)	cpufeature.h	Advanced bit manipulation
22528	X86_FEATURE_SSE4A	(6*32+ 6)	cpufeature.h	SSE-4A
22529	X86_FEATURE_MISALIGNSSE	(6*32+ 7)	cpufeature.h	Misaligned SSE mode
22530	X86_FEATURE_3DNOWPREFETCH	(6*32+ 8)	cpufeature.h	3DNow prefetch instructions
22531	X86_FEATURE_OSVW	(6*32+ 9)	cpufeature.h	OS Visible Workaround
22532	X86_FEATURE_IBS	(6*32+10)	cpufeature.h	Instruction Based Sampling
22533	X86_FEATURE_SSE5	(6*32+11)	cpufeature.h	SSE-5
22534	X86_FEATURE_SKINIT	(6*32+12)	cpufeature.h	SKINIT/STGI instructions
22535	X86_FEATURE_WDT	(6*32+13)	cpufeature.h	Watchdog timer
22536	X86_FEATURE_IDA	(7*32+ 0)	cpufeature.h	Intel Dynamic Acceleration
22537	X86_FEATURE_ARAT	(7*32+ 1)	cpufeature.h	Always Running APIC Timer
22538	X86_FEATURE_TPR_SHADOW	(8*32+ 0)	cpufeature.h	Intel TPR Shadow
22539	X86_FEATURE_VNMI	(8*32+ 1)	cpufeature.h	Intel Virtual NMI
22540	X86_FEATURE_FLEXPRIORITY	(8*32+ 2)	cpufeature.h	Intel FlexPriority
22541	X86_FEATURE_EPT	(8*32+ 3)	cpufeature.h	Intel Extended Page Table
22542	X86_FEATURE_VPID	(8*32+ 4)	cpufeature.h	Intel Virtual Processor ID
22543	__ctype_inline	static __inline__	ctype.h
22544	NAME_MAX	255	dirent.h
22545	LITTLE_ENDIAN	__LITTLE_ENDIAN	endian.h
22546	BIG_ENDIAN	__BIG_ENDIAN	endian.h
22547	PDP_ENDIAN	__PDP_ENDIAN	endian.h
22548	BYTE_ORDER	__BYTE_ORDER	endian.h
22549	EPERM	1	errno.h	Operation not permitted
22550	ENOENT	2	errno.h	No such file or directory
22551	ESRCH	3	errno.h	No such process
22552	EINTR	4	errno.h	Interrupted system call
22553	EIO	5	errno.h	I/O error
22554	ENXIO	6	errno.h	No such device or address
22555	E2BIG	7	errno.h	Arg list too long
22556	ENOEXEC	8	errno.h	Exec format error
22557	EBADF	9	errno.h	Bad file number
22558	ECHILD	10	errno.h	No child processes
22559	EAGAIN	11	errno.h	Try again
22560	ENOMEM	12	errno.h	Out of memory
22561	EACCES	13	errno.h	Permission denied
22562	EFAULT	14	errno.h	Bad address
22563	ENOTBLK	15	errno.h	Block device required
22564	EBUSY	16	errno.h	Device or resource busy
22565	EEXIST	17	errno.h	File exists
22566	EXDEV	18	errno.h	Cross-device link
22567	ENODEV	19	errno.h	No such device
22568	ENOTDIR	20	errno.h	Not a directory
22569	EISDIR	21	errno.h	Is a directory
22570	EINVAL	22	errno.h	Invalid argument
22571	ENFILE	23	errno.h	File table overflow
22572	EMFILE	24	errno.h	Too many open files
22573	ENOTTY	25	errno.h	Not a typewriter
22574	ETXTBSY	26	errno.h	Text file busy
22575	EFBIG	27	errno.h	File too large
22576	ENOSPC	28	errno.h	No space left on device
22577	ESPIPE	29	errno.h	Illegal seek
22578	EROFS	30	errno.h	Read-only file system
22579	EMLINK	31	errno.h	Too many links
22580	EPIPE	32	errno.h	Broken pipe
22581	EDOM	33	errno.h	Math argument out of domain of func
22582	ERANGE	34	errno.h	Math result not representable
22583	EDEADLK	35	errno.h	Resource deadlock would occur
22584	ENAMETOOLONG	36	errno.h	File name too long
22585	ENOLCK	37	errno.h	No record locks available
22586	ENOSYS	38	errno.h	Function not implemented
22587	ENOTEMPTY	39	errno.h	Directory not empty
22588	ELOOP	40	errno.h	Too many symbolic links encountered
22589	EWOULDBLOCK	EAGAIN	errno.h	Operation would block
22590	ENOMSG	42	errno.h	No message of desired type
22591	EIDRM	43	errno.h	Identifier removed
22592	ECHRNG	44	errno.h	Channel number out of range
22593	EL2NSYNC	45	errno.h	Level 2 not synchronized
22594	EL3HLT	46	errno.h	Level 3 halted
22595	EL3RST	47	errno.h	Level 3 reset
22596	ELNRNG	48	errno.h	Link number out of range
22597	EUNATCH	49	errno.h	Protocol driver not attached
22598	ENOCSI	50	errno.h	No CSI structure available
22599	EL2HLT	51	errno.h	Level 2 halted
22600	EBADE	52	errno.h	Invalid exchange
22601	EBADR	53	errno.h	Invalid request descriptor
22602	EXFULL	54	errno.h	Exchange full
22603	ENOANO	55	errno.h	No anode
22604	EBADRQC	56	errno.h	Invalid request code
22605	EBADSLT	57	errno.h	Invalid slot
22606	EDEADLOCK	EDEADLK	errno.h
22607	EBFONT	59	errno.h	Bad font file format
22608	ENOSTR	60	errno.h	Device not a stream
22609	ENODATA	61	errno.h	No data available
22610	ETIME	62	errno.h	Timer expired
22611	ENOSR	63	errno.h	Out of streams resources
22612	ENONET	64	errno.h	Machine is not on the network
22613	ENOPKG	65	errno.h	Package not installed
22614	EREMOTE	66	errno.h	Object is remote
22615	ENOLINK	67	errno.h	Link has been severed
22616	EADV	68	errno.h	Advertise error
22617	ESRMNT	69	errno.h	Srmount error
22618	ECOMM	70	errno.h	Communication error on send
22619	EPROTO	71	errno.h	Protocol error
22620	EMULTIHOP	72	errno.h	Multihop attempted
22621	EDOTDOT	73	errno.h	RFS specific error
22622	EBADMSG	74	errno.h	Not a data message
22623	EOVERFLOW	75	errno.h	Value too large for defined data type
22624	ENOTUNIQ	76	errno.h	Name not unique on network
22625	EBADFD	77	errno.h	File descriptor in bad state
22626	EREMCHG	78	errno.h	Remote address changed
22627	ELIBACC	79	errno.h	Can not access a needed shared library
22628	ELIBBAD	80	errno.h	Accessing a corrupted shared library
22629	ELIBSCN	81	errno.h	.lib section in a.out corrupted
22630	ELIBMAX	82	errno.h	Attempting to link in too many shared libraries
22631	ELIBEXEC	83	errno.h	Cannot exec a shared library directly
22632	EILSEQ	84	errno.h	Illegal byte sequence
22633	ERESTART	85	errno.h	Interrupted system call should be restarted
22634	ESTRPIPE	86	errno.h	Streams pipe error
22635	EUSERS	87	errno.h	Too many users
22636	ENOTSOCK	88	errno.h	Socket operation on non-socket
22637	EDESTADDRREQ	89	errno.h	Destination address required
22638	EMSGSIZE	90	errno.h	Message too long
22639	EPROTOTYPE	91	errno.h	Protocol wrong type for socket
22640	ENOPROTOOPT	92	errno.h	Protocol not available
22641	EPROTONOSUPPORT	93	errno.h	Protocol not supported
22642	ESOCKTNOSUPPORT	94	errno.h	Socket type not supported
22643	EOPNOTSUPP	95	errno.h	Operation not supported on transport endpoint
22644	EPFNOSUPPORT	96	errno.h	Protocol family not supported
22645	EAFNOSUPPORT	97	errno.h	Address family not supported by protocol
22646	EADDRINUSE	98	errno.h	Address already in use
22647	EADDRNOTAVAIL	99	errno.h	Cannot assign requested address
22648	ENETDOWN	100	errno.h	Network is down
22649	ENETUNREACH	101	errno.h	Network is unreachable
22650	ENETRESET	102	errno.h	Network dropped connection because of reset
22651	ECONNABORTED	103	errno.h	Software caused connection abort
22652	ECONNRESET	104	errno.h	Connection reset by peer
22653	ENOBUFS	105	errno.h	No buffer space available
22654	EISCONN	106	errno.h	Transport endpoint is already connected
22655	ENOTCONN	107	errno.h	Transport endpoint is not connected
22656	ESHUTDOWN	108	errno.h	Cannot send after transport endpoint shutdown
22657	ETOOMANYREFS	109	errno.h	Too many references: cannot splice
22658	ETIMEDOUT	110	errno.h	Connection timed out
22659	ECONNREFUSED	111	errno.h	Connection refused
22660	EHOSTDOWN	112	errno.h	Host is down
22661	EHOSTUNREACH	113	errno.h	No route to host
22662	EALREADY	114	errno.h	Operation already in progress
22663	EINPROGRESS	115	errno.h	Operation now in progress
22664	ESTALE	116	errno.h	Stale NFS file handle
22665	EUCLEAN	117	errno.h	Structure needs cleaning
22666	ENOTNAM	118	errno.h	Not a XENIX named type file
22667	ENAVAIL	119	errno.h	No XENIX semaphores available
22668	EISNAM	120	errno.h	Is a named type file
22669	EREMOTEIO	121	errno.h	Remote I/O error
22670	EDQUOT	122	errno.h	Quota exceeded
22671	ENOMEDIUM	123	errno.h	No medium found
22672	EMEDIUMTYPE	124	errno.h	Wrong medium type
22673	O_RDONLY	1	fcntl.h
22674	O_WRONLY	2	fcntl.h
22675	O_RDWR	3	fcntl.h
22676	O_CREAT	0100	fcntl.h
22677	O_EXCL	0200	fcntl.h
22678	O_TRUNC	01000	fcntl.h
22679	O_APPEND	02000	fcntl.h
22680	PRId8	"d"	inttypes.h
22681	PRId16	"d"	inttypes.h
22682	PRId32	"d"	inttypes.h
22683	PRId64	__PRI64_RANK "d"	inttypes.h
22684	PRIdLEAST8	"d"	inttypes.h
22685	PRIdLEAST16	"d"	inttypes.h
22686	PRIdLEAST32	"d"	inttypes.h
22687	PRIdLEAST64	__PRI64_RANK "d"	inttypes.h
22688	PRIdFAST8	"d"	inttypes.h
22689	PRIdFAST16	__PRIFAST_RANK "d"	inttypes.h
22690	PRIdFAST32	__PRIFAST_RANK "d"	inttypes.h
22691	PRIdFAST64	__PRI64_RANK "d"	inttypes.h
22692	PRIdMAX	__PRI64_RANK "d"	inttypes.h
22693	PRIdPTR	__PRIPTR_RANK "d"	inttypes.h
22694	PRIi8	"i"	inttypes.h
22695	PRIi16	"i"	inttypes.h
22696	PRIi32	"i"	inttypes.h
22697	PRIi64	__PRI64_RANK "i"	inttypes.h
22698	PRIiLEAST8	"i"	inttypes.h
22699	PRIiLEAST16	"i"	inttypes.h
22700	PRIiLEAST32	"i"	inttypes.h
22701	PRIiLEAST64	__PRI64_RANK "i"	inttypes.h
22702	PRIiFAST8	"i"	inttypes.h
22703	PRIiFAST16	__PRIFAST_RANK "i"	inttypes.h
22704	PRIiFAST32	__PRIFAST_RANK "i"	inttypes.h
22705	PRIiFAST64	__PRI64_RANK "i"	inttypes.h
22706	PRIiMAX	__PRI64_RANK "i"	inttypes.h
22707	PRIiPTR	__PRIPTR_RANK "i"	inttypes.h
22708	PRIo8	"o"	inttypes.h
22709	PRIo16	"o"	inttypes.h
22710	PRIo32	"o"	inttypes.h
22711	PRIo64	__PRI64_RANK "o"	inttypes.h
22712	PRIoLEAST8	"o"	inttypes.h
22713	PRIoLEAST16	"o"	inttypes.h
22714	PRIoLEAST32	"o"	inttypes.h
22715	PRIoLEAST64	__PRI64_RANK "o"	inttypes.h
22716	PRIoFAST8	"o"	inttypes.h
22717	PRIoFAST16	__PRIFAST_RANK "o"	inttypes.h
22718	PRIoFAST32	__PRIFAST_RANK "o"	inttypes.h
22719	PRIoFAST64	__PRI64_RANK "o"	inttypes.h
22720	PRIoMAX	__PRI64_RANK "o"	inttypes.h
22721	PRIoPTR	__PRIPTR_RANK "o"	inttypes.h
22722	PRIu8	"u"	inttypes.h
22723	PRIu16	"u"	inttypes.h
22724	PRIu32	"u"	inttypes.h
22725	PRIu64	__PRI64_RANK "u"	inttypes.h
22726	PRIuLEAST8	"u"	inttypes.h
22727	PRIuLEAST16	"u"	inttypes.h
22728	PRIuLEAST32	"u"	inttypes.h
22729	PRIuLEAST64	__PRI64_RANK "u"	inttypes.h
22730	PRIuFAST8	"u"	inttypes.h
22731	PRIuFAST16	__PRIFAST_RANK "u"	inttypes.h
22732	PRIuFAST32	__PRIFAST_RANK "u"	inttypes.h
22733	PRIuFAST64	__PRI64_RANK "u"	inttypes.h
22734	PRIuMAX	__PRI64_RANK "u"	inttypes.h
22735	PRIuPTR	__PRIPTR_RANK "u"	inttypes.h
22736	PRIx8	"x"	inttypes.h
22737	PRIx16	"x"	inttypes.h
22738	PRIx32	"x"	inttypes.h
22739	PRIx64	__PRI64_RANK "x"	inttypes.h
22740	PRIxLEAST8	"x"	inttypes.h
22741	PRIxLEAST16	"x"	inttypes.h
22742	PRIxLEAST32	"x"	inttypes.h
22743	PRIxLEAST64	__PRI64_RANK "x"	inttypes.h
22744	PRIxFAST8	"x"	inttypes.h
22745	PRIxFAST16	__PRIFAST_RANK "x"	inttypes.h
22746	PRIxFAST32	__PRIFAST_RANK "x"	inttypes.h
22747	PRIxFAST64	__PRI64_RANK "x"	inttypes.h
22748	PRIxMAX	__PRI64_RANK "x"	inttypes.h
22749	PRIxPTR	__PRIPTR_RANK "x"	inttypes.h
22750	PRIX8	"X"	inttypes.h
22751	PRIX16	"X"	inttypes.h
22752	PRIX32	"X"	inttypes.h
22753	PRIX64	__PRI64_RANK "X"	inttypes.h
22754	PRIXLEAST8	"X"	inttypes.h
22755	PRIXLEAST16	"X"	inttypes.h
22756	PRIXLEAST32	"X"	inttypes.h
22757	PRIXLEAST64	__PRI64_RANK "X"	inttypes.h
22758	PRIXFAST8	"X"	inttypes.h
22759	PRIXFAST16	__PRIFAST_RANK "X"	inttypes.h
22760	PRIXFAST32	__PRIFAST_RANK "X"	inttypes.h
22761	PRIXFAST64	__PRI64_RANK "X"	inttypes.h
22762	PRIXMAX	__PRI64_RANK "X"	inttypes.h
22763	PRIXPTR	__PRIPTR_RANK "X"	inttypes.h
22764	SCNd8	"hhd"	inttypes.h
22765	SCNd16	"hd"	inttypes.h
22766	SCNd32	"d"	inttypes.h
22767	SCNd64	__PRI64_RANK "d"	inttypes.h
22768	SCNdLEAST8	"hhd"	inttypes.h
22769	SCNdLEAST16	"hd"	inttypes.h
22770	SCNdLEAST32	"d"	inttypes.h
22771	SCNdLEAST64	__PRI64_RANK "d"	inttypes.h
22772	SCNdFAST8	"hhd"	inttypes.h
22773	SCNdFAST16	__PRIFAST_RANK "d"	inttypes.h
22774	SCNdFAST32	__PRIFAST_RANK "d"	inttypes.h
22775	SCNdFAST64	__PRI64_RANK "d"	inttypes.h
22776	SCNdMAX	__PRI64_RANK "d"	inttypes.h
22777	SCNdPTR	__PRIPTR_RANK "d"	inttypes.h
22778	SCNi8	"hhi"	inttypes.h
22779	SCNi16	"hi"	inttypes.h
22780	SCNi32	"i"	inttypes.h
22781	SCNi64	__PRI64_RANK "i"	inttypes.h
22782	SCNiLEAST8	"hhi"	inttypes.h
22783	SCNiLEAST16	"hi"	inttypes.h
22784	SCNiLEAST32	"i"	inttypes.h
22785	SCNiLEAST64	__PRI64_RANK "i"	inttypes.h
22786	SCNiFAST8	"hhi"	inttypes.h
22787	SCNiFAST16	__PRIFAST_RANK "i"	inttypes.h
22788	SCNiFAST32	__PRIFAST_RANK "i"	inttypes.h
22789	SCNiFAST64	__PRI64_RANK "i"	inttypes.h
22790	SCNiMAX	__PRI64_RANK "i"	inttypes.h
22791	SCNiPTR	__PRIPTR_RANK "i"	inttypes.h
22792	SCNo8	"hho"	inttypes.h
22793	SCNo16	"ho"	inttypes.h
22794	SCNo32	"o"	inttypes.h
22795	SCNo64	__PRI64_RANK "o"	inttypes.h
22796	SCNoLEAST8	"hho"	inttypes.h
22797	SCNoLEAST16	"ho"	inttypes.h
22798	SCNoLEAST32	"o"	inttypes.h
22799	SCNoLEAST64	__PRI64_RANK "o"	inttypes.h
22800	SCNoFAST8	"hho"	inttypes.h
22801	SCNoFAST16	__PRIFAST_RANK "o"	inttypes.h
22802	SCNoFAST32	__PRIFAST_RANK "o"	inttypes.h
22803	SCNoFAST64	__PRI64_RANK "o"	inttypes.h
22804	SCNoMAX	__PRI64_RANK "o"	inttypes.h
22805	SCNoPTR	__PRIPTR_RANK "o"	inttypes.h
22806	SCNu8	"hhu"	inttypes.h
22807	SCNu16	"hu"	inttypes.h
22808	SCNu32	"u"	inttypes.h
22809	SCNu64	__PRI64_RANK "u"	inttypes.h
22810	SCNuLEAST8	"hhu"	inttypes.h
22811	SCNuLEAST16	"hu"	inttypes.h
22812	SCNuLEAST32	"u"	inttypes.h
22813	SCNuLEAST64	__PRI64_RANK "u"	inttypes.h
22814	SCNuFAST8	"hhu"	inttypes.h
22815	SCNuFAST16	__PRIFAST_RANK "u"	inttypes.h
22816	SCNuFAST32	__PRIFAST_RANK "u"	inttypes.h
22817	SCNuFAST64	__PRI64_RANK "u"	inttypes.h
22818	SCNuMAX	__PRI64_RANK "u"	inttypes.h
22819	SCNuPTR	__PRIPTR_RANK "u"	inttypes.h
22820	SCNx8	"hhx"	inttypes.h
22821	SCNx16	"hx"	inttypes.h
22822	SCNx32	"x"	inttypes.h
22823	SCNx64	__PRI64_RANK "x"	inttypes.h
22824	SCNxLEAST8	"hhx"	inttypes.h
22825	SCNxLEAST16	"hx"	inttypes.h
22826	SCNxLEAST32	"x"	inttypes.h
22827	SCNxLEAST64	__PRI64_RANK "x"	inttypes.h
22828	SCNxFAST8	"hhx"	inttypes.h
22829	SCNxFAST16	__PRIFAST_RANK "x"	inttypes.h
22830	SCNxFAST32	__PRIFAST_RANK "x"	inttypes.h
22831	SCNxFAST64	__PRI64_RANK "x"	inttypes.h
22832	SCNxMAX	__PRI64_RANK "x"	inttypes.h
22833	SCNxPTR	__PRIPTR_RANK "x"	inttypes.h
22834	CSI	"\e["	libansi.h
22835	CHAR_BIT	8	limits.h
22836	SHRT_BIT	16	limits.h
22837	INT_BIT	32	limits.h
22838	LONGLONG_BIT	64	limits.h
22839	SCHAR_MIN	(-128)	limits.h
22840	SCHAR_MAX	127	limits.h
22841	UCHAR_MAX	255	limits.h
22842	CHAR_MIN	0	limits.h
22843	CHAR_MAX	UCHAR_MAX	limits.h
22844	CHAR_MIN	SCHAR_MIN	limits.h
22845	CHAR_MAX	SCHAR_MAX	limits.h
22846	SHRT_MIN	(-32768)	limits.h
22847	SHRT_MAX	32767	limits.h
22848	USHRT_MAX	65535	limits.h
22849	INT_MIN	(-2147483647-1)	limits.h
22850	INT_MAX	2147483647	limits.h
22851	UINT_MAX	4294967295U	limits.h
22852	LONGLONG_MIN	(-9223372036854775807LL-1)	limits.h
22853	LONGLONG_MAX	9223372036854775807LL	limits.h
22854	ULONGLONG_MAX	18446744073709551615ULL	limits.h
22855	__DBL_MIN_EXP__	(-1021)	math.h
22856	__DBL_MAX_EXP__	1024	math.h
22857	PNG_LIBPNG_VER_STRING	"1.2.8"	png.h
22858	PNG_HEADER_VERSION_STRING	" libpng version 1.2.8 - December 3, 2004 (header)\n"	png.h
22859	PNG_LIBPNG_VER_SONUM	0	png.h
22860	PNG_LIBPNG_VER_DLLNUM	13	png.h
22861	PNG_LIBPNG_VER_MAJOR	1	png.h
22862	PNG_LIBPNG_VER_MINOR	2	png.h
22863	PNG_LIBPNG_VER_RELEASE	8	png.h
22864	PNG_LIBPNG_VER_BUILD	0	png.h
22865	PNG_LIBPNG_BUILD_ALPHA	1	png.h
22866	PNG_LIBPNG_BUILD_BETA	2	png.h
22867	PNG_LIBPNG_BUILD_RC	3	png.h
22868	PNG_LIBPNG_BUILD_STABLE	4	png.h
22869	PNG_LIBPNG_BUILD_RELEASE_STATUS	7	png.h
22870	PNG_LIBPNG_BUILD_PATCH	8	png.h	Can be OR'ed with
22871	PNG_LIBPNG_BUILD_PRIVATE	16	png.h	Cannot be OR'ed with
22872	PNG_LIBPNG_BUILD_SPECIAL	32	png.h	Cannot be OR'ed with
22873	PNG_LIBPNG_BUILD_BASE_TYPE	PNG_LIBPNG_BUILD_STABLE	png.h
22874	PNG_LIBPNG_VER	10208	png.h	1.2.8
22875	PNG_LIBPNG_BUILD_TYPE	PNG_LIBPNG_BUILD_BASE_TYPE \| \ PNG_LIBPNG_BUILD_PRIVATE	png.h
22876	PNG_LIBPNG_BUILD_TYPE	PNG_LIBPNG_BUILD_BASE_TYPE \| \ PNG_LIBPNG_BUILD_SPECIAL	png.h
22877	PNG_LIBPNG_BUILD_TYPE	PNG_LIBPNG_BUILD_BASE_TYPE	png.h
22878	PNG_USER_PRIVATEBUILD	PRIVATEBUILD	pngconf.h
22879	PNG_ZBUF_SIZE	8192	pngconf.h
22880	PNG_DITHER_RED_BITS	5	pngconf.h
22881	PNG_DITHER_GREEN_BITS	5	pngconf.h
22882	PNG_DITHER_BLUE_BITS	5	pngconf.h
22883	PNG_MAX_GAMMA_8	11	pngconf.h
22884	PNG_GAMMA_THRESHOLD	0.05	pngconf.h
22885	PNG_CONST	const	pngconf.h
22886	PNG_USER_WIDTH_MAX	1000000L	pngconf.h
22887	PNG_USER_HEIGHT_MAX	1000000L	pngconf.h
22888	LDATA	1	pngconf.h
22889	LDATA	0	pngconf.h
22890	FAR	__far	pngconf.h
22891	FARDATA	FAR	pngconf.h
22892	PNGAPI	__cdecl	pngconf.h
22893	PNGAPI	__cdecl	pngconf.h
22894	PNGAPI	_cdecl	pngconf.h
22895	PNG_EXPORT	PNG_EXPORT_TYPE1	pngconf.h
22896	PNG_EXPORT	PNG_EXPORT_TYPE2	pngconf.h
22897	PNG_IMPEXP	__export	pngconf.h
22898	PNG_IMPEXP	__declspec(dllexport)	pngconf.h
22899	PNG_IMPEXP	__declspec(dllimport)	pngconf.h
22900	PNGAPI	_System	pngconf.h
22901	CHECK	1	pngconf.h
22902	NOCHECK	0	pngconf.h
22903	png_strcpy	_fstrcpy	pngconf.h
22904	png_strncpy	_fstrncpy	pngconf.h	Added to v 1.2.6
22905	png_strlen	_fstrlen	pngconf.h
22906	png_memcmp	_fmemcmp	pngconf.h	SJT: added
22907	png_memcpy	_fmemcpy	pngconf.h
22908	png_memset	_fmemset	pngconf.h
22909	png_strcpy	strcpy	pngconf.h
22910	png_strncpy	strncpy	pngconf.h	Added to v 1.2.6
22911	png_strlen	strlen	pngconf.h
22912	png_memcmp	memcmp	pngconf.h	SJT: added
22913	png_memcpy	memcpy	pngconf.h
22914	png_memset	memset	pngconf.h
22915	PNG_ZBUF_SIZE	65536L	pngconf.h
22916	PNG_MMX_ROWBYTES_THRESHOLD_DEFA	128	pngconf.h	>=
22917	PNG_MMX_BITDEPTH_THRESHOLD_DEFA	9	pngconf.h	>=
22918	bool	_Bool	stdbool.h
22919	true	1	stdbool.h
22920	false	0	stdbool.h
22921	bool	bool	stdbool.h
22922	true	true	stdbool.h
22923	false	false	stdbool.h
22924	__bool_true_false_are_defined	1	stdbool.h
22925	__KLIBC__	1	stddef.h
22926	NULL	0	stddef.h
22927	NULL	((void *)0)	stddef.h
22928	INT8_MIN	(-128)	stdint.h
22929	INT16_MIN	(-32767-1)	stdint.h
22930	INT32_MIN	(-2147483647-1)	stdint.h
22931	INT64_MIN	(-9223372036854775807LL-1)	stdint.h
22932	INT8_MAX	(127)	stdint.h
22933	INT16_MAX	(32767)	stdint.h
22934	INT32_MAX	(2147483647)	stdint.h
22935	INT64_MAX	(9223372036854775807LL)	stdint.h
22936	UINT8_MAX	(255U)	stdint.h
22937	UINT16_MAX	(65535U)	stdint.h
22938	UINT32_MAX	(4294967295U)	stdint.h
22939	UINT64_MAX	(18446744073709551615ULL)	stdint.h
22940	INT_LEAST8_MIN	(-128)	stdint.h
22941	INT_LEAST16_MIN	(-32767-1)	stdint.h
22942	INT_LEAST32_MIN	(-2147483647-1)	stdint.h
22943	INT_LEAST64_MIN	(-9223372036854775807LL-1)	stdint.h
22944	INT_LEAST8_MAX	(127)	stdint.h
22945	INT_LEAST16_MAX	(32767)	stdint.h
22946	INT_LEAST32_MAX	(2147483647)	stdint.h
22947	INT_LEAST64_MAX	(9223372036854775807LL)	stdint.h
22948	UINT_LEAST8_MAX	(255U)	stdint.h
22949	UINT_LEAST16_MAX	(65535U)	stdint.h
22950	UINT_LEAST32_MAX	(4294967295U)	stdint.h
22951	UINT_LEAST64_MAX	(18446744073709551615ULL)	stdint.h
22952	INT_FAST8_MIN	(-128)	stdint.h
22953	INT_FAST16_MIN	(-32767-1)	stdint.h
22954	INT_FAST32_MIN	(-2147483647-1)	stdint.h
22955	INT_FAST64_MIN	(-9223372036854775807LL-1)	stdint.h
22956	INT_FAST8_MAX	(127)	stdint.h
22957	INT_FAST16_MAX	(32767)	stdint.h
22958	INT_FAST32_MAX	(2147483647)	stdint.h
22959	INT_FAST64_MAX	(9223372036854775807LL)	stdint.h
22960	UINT_FAST8_MAX	(255U)	stdint.h
22961	UINT_FAST16_MAX	(65535U)	stdint.h
22962	UINT_FAST32_MAX	(4294967295U)	stdint.h
22963	UINT_FAST64_MAX	(18446744073709551615ULL)	stdint.h
22964	INTPTR_MIN	(-2147483647-1)	stdint.h
22965	INTPTR_MAX	(2147483647)	stdint.h
22966	UINTPTR_MAX	(4294967295U)	stdint.h
22967	INTMAX_MIN	(-9223372036854775807LL-1)	stdint.h
22968	INTMAX_MAX	(9223372036854775807LL)	stdint.h
22969	UINTMAX_MAX	(18446744073709551615ULL)	stdint.h
22970	PTRDIFF_MIN	(-2147483647-1)	stdint.h
22971	PTRDIFF_MAX	(2147483647)	stdint.h
22972	SIG_ATOMIC_MIN	(-2147483647-1)	stdint.h
22973	SIG_ATOMIC_MAX	(2147483647)	stdint.h
22974	SIZE_MAX	(4294967295U)	stdint.h
22975	EOF	(-1)	stdio.h
22976	BUFSIZ	4096	stdio.h
22977	SEEK_SET	0	stdio.h
22978	SEEK_CUR	1	stdio.h
22979	SEEK_END	2	stdio.h
22980	stdin	__create_file(0)	stdio.h
22981	stdout	__create_file(1)	stdio.h
22982	stderr	__create_file(2)	stdio.h
22983	EXIT_FAILURE	1	stdlib.h
22984	EXIT_SUCCESS	0	stdlib.h
22985	RAND_MAX	0x7fffffff	stdlib.h
22986	STDIN_FILENO	0	unistd.h
22987	STDOUT_FILENO	1	unistd.h
22988	STDERR_FILENO	2	unistd.h
22989	deflateInit_	z_deflateInit_	zconf.h
22990	deflate	z_deflate	zconf.h
22991	deflateEnd	z_deflateEnd	zconf.h
22992	inflateInit_	z_inflateInit_	zconf.h
22993	inflate	z_inflate	zconf.h
22994	inflateEnd	z_inflateEnd	zconf.h
22995	deflateInit2_	z_deflateInit2_	zconf.h
22996	deflateSetDictionary	z_deflateSetDictionary	zconf.h
22997	deflateCopy	z_deflateCopy	zconf.h
22998	deflateReset	z_deflateReset	zconf.h
22999	deflatePrime	z_deflatePrime	zconf.h
23000	deflateParams	z_deflateParams	zconf.h
23001	deflateBound	z_deflateBound	zconf.h
23002	inflateInit2_	z_inflateInit2_	zconf.h
23003	inflateSetDictionary	z_inflateSetDictionary	zconf.h
23004	inflateSync	z_inflateSync	zconf.h
23005	inflateSyncPoint	z_inflateSyncPoint	zconf.h
23006	inflateCopy	z_inflateCopy	zconf.h
23007	inflateReset	z_inflateReset	zconf.h
23008	compress	z_compress	zconf.h
23009	compress2	z_compress2	zconf.h
23010	compressBound	z_compressBound	zconf.h
23011	uncompress	z_uncompress	zconf.h
23012	adler32	z_adler32	zconf.h
23013	crc32	z_crc32	zconf.h
23014	get_crc_table	z_get_crc_table	zconf.h
23015	Byte	z_Byte	zconf.h
23016	uInt	z_uInt	zconf.h
23017	uLong	z_uLong	zconf.h
23018	Bytef	z_Bytef	zconf.h
23019	charf	z_charf	zconf.h
23020	intf	z_intf	zconf.h
23021	uIntf	z_uIntf	zconf.h
23022	uLongf	z_uLongf	zconf.h
23023	voidpf	z_voidpf	zconf.h
23024	voidp	z_voidp	zconf.h
23025	MAX_MEM_LEVEL	8	zconf.h
23026	MAX_MEM_LEVEL	9	zconf.h
23027	MAX_WBITS	15	zconf.h	32K LZ77 window
23028	FAR	_far	zconf.h
23029	FAR	far	zconf.h
23030	FAR	_far	zconf.h
23031	FAR	far	zconf.h
23032	ZEXTERN	extern __declspec(dllexport)	zconf.h
23033	ZEXTERN	extern __declspec(dllimport)	zconf.h
23034	ZEXPORT	WINAPI	zconf.h
23035	ZEXPORTVA	WINAPIV	zconf.h
23036	ZEXPORTVA	FAR CDECL	zconf.h
23037	ZEXPORT	__declspec(dllexport)	zconf.h
23038	ZEXPORTVA	__declspec(dllexport)	zconf.h
23039	ZEXPORT	__declspec(dllimport)	zconf.h
23040	ZEXPORTVA	__declspec(dllimport)	zconf.h
23041	ZEXTERN	extern	zconf.h
23042	Bytef	Byte FAR	zconf.h
23043	z_off_t	off_t	zconf.h
23044	SEEK_SET	0	zconf.h	Seek from beginning of file.
23045	SEEK_CUR	1	zconf.h	Seek from current position.
23046	SEEK_END	2	zconf.h	Set file pointer to EOF plus "offset"
23047	z_off_t	long	zconf.h
23048	LONG_BIT	32	limits.h
23049	LONG_MIN	(-2147483647L-1)	limits.h
23050	LONG_MAX	2147483647L	limits.h
23051	ULONG_MAX	4294967295UL	limits.h
23052	__PRI64_RANK	"ll"	stdint.h
23053	__PRIFAST_RANK	""	stdint.h
23054	__PRIPTR_RANK	""	stdint.h
23055	INT_FAST16_MIN	INT32_MIN	stdintlimits.h
23056	INT_FAST32_MIN	INT32_MIN	stdintlimits.h
23057	INT_FAST16_MAX	INT32_MAX	stdintlimits.h
23058	INT_FAST32_MAX	INT32_MAX	stdintlimits.h
23059	UINT_FAST16_MAX	UINT32_MAX	stdintlimits.h
23060	UINT_FAST32_MAX	UINT32_MAX	stdintlimits.h
23061	INTPTR_MIN	INT32_MIN	stdintlimits.h
23062	INTPTR_MAX	INT32_MAX	stdintlimits.h
23063	UINTPTR_MAX	UINT32_MAX	stdintlimits.h
23064	PTRDIFF_MIN	INT32_MIN	stdintlimits.h
23065	PTRDIFF_MAX	INT32_MAX	stdintlimits.h
23066	__cdecl	__attribute__((cdecl,regparm(0)))	compiler.h
23067	__must_inline	static __inline__ __attribute__((always_inline))	compiler.h
23068	__must_inline	extern __inline__	compiler.h
23069	__must_inline	inline	compiler.h	Just hope this works...
23070	__noreturn	void __attribute__((noreturn))	compiler.h
23071	__noreturn	void	compiler.h
23072	__constfunc	__attribute__((const))	compiler.h
23073	__attribute_const__	__constfunc	compiler.h
23074	__purefunc	__attribute__((pure))	compiler.h
23075	__attribute_pure__	__purefunc	compiler.h
23076	__mallocfunc	__attribute__((malloc))	compiler.h
23077	__unusedfunc	__attribute__((unused))	compiler.h
23078	__constructor	__attribute__((constructor))	compiler.h
23079	__destructor	__attribute__((destructor))	compiler.h
23080	__packed	__attribute__((packed))	compiler.h
23081	__weak	__attribute__((weak))	compiler.h
23082	__common	__attribute__((common))	compiler.h
23083	__nocommon	__attribute__((nocommon))	compiler.h
23084	__LITTLE_ENDIAN	1234	endian.h
23085	__BIG_ENDIAN	4321	endian.h
23086	__PDP_ENDIAN	3412	endian.h
23087	__BYTE_ORDER	__LITTLE_ENDIAN	endian.h
23088	__LITTLE_ENDIAN	1234	endian.h
23089	__BIG_ENDIAN	4321	endian.h
23090	__PDP_ENDIAN	3412	endian.h
23091	__BYTE_ORDER	__BIG_ENDIAN	endian.h
23092	__LITTLE_ENDIAN	1234	endian.h
23093	__BIG_ENDIAN	4321	endian.h
23094	__PDP_ENDIAN	3412	endian.h
23095	__BYTE_ORDER	__PDP_ENDIAN	endian.h
23096	__extern	extern "C"	extern.h
23097	__extern	extern	extern.h
23098	MALLOC_CHUNK_SIZE	4096	sysconfig.h
23099	MALLOC_CHUNK_MASK	(MALLOC_CHUNK_SIZE-1)	sysconfig.h
23100	SBRK_ALIGNMENT	32	sysconfig.h
23101	PT_NULL	0	elfcommon.h
23102	PT_LOAD	1	elfcommon.h
23103	PT_DYNAMIC	2	elfcommon.h
23104	PT_INTERP	3	elfcommon.h
23105	PT_NOTE	4	elfcommon.h
23106	PT_SHLIB	5	elfcommon.h
23107	PT_PHDR	6	elfcommon.h
23108	PT_LOOS	0x60000000	elfcommon.h
23109	PT_HIOS	0x6fffffff	elfcommon.h
23110	PT_LOPROC	0x70000000	elfcommon.h
23111	PT_HIPROC	0x7fffffff	elfcommon.h
23112	PT_GNU_EH_FRAME	0x6474e550	elfcommon.h	Extension, eh?
23113	ET_NONE	0	elfcommon.h
23114	ET_REL	1	elfcommon.h
23115	ET_EXEC	2	elfcommon.h
23116	ET_DYN	3	elfcommon.h
23117	ET_CORE	4	elfcommon.h
23118	ET_LOPROC	0xff00	elfcommon.h
23119	ET_HIPROC	0xffff	elfcommon.h
23120	EM_NONE	0	elfcommon.h
23121	EM_M32	1	elfcommon.h
23122	EM_SPARC	2	elfcommon.h
23123	EM_386	3	elfcommon.h
23124	EM_68K	4	elfcommon.h
23125	EM_88K	5	elfcommon.h
23126	EM_486	6	elfcommon.h	Not used in Linux at least
23127	EM_860	7	elfcommon.h
23128	EM_MIPS	8	elfcommon.h	R3k, bigendian(?)
23129	EM_MIPS_RS4_BE	10	elfcommon.h	R4k BE
23130	EM_PARISC	15	elfcommon.h
23131	EM_SPARC32PLUS	18	elfcommon.h
23132	EM_PPC	20	elfcommon.h
23133	EM_PPC64	21	elfcommon.h
23134	EM_S390	22	elfcommon.h
23135	EM_SH	42	elfcommon.h
23136	EM_SPARCV9	43	elfcommon.h	v9 = SPARC64
23137	EM_H8_300H	47	elfcommon.h
23138	EM_H8S	48	elfcommon.h
23139	EM_IA_64	50	elfcommon.h	Itanic
23140	EM_X86_64	62	elfcommon.h
23141	EM_CRIS	76	elfcommon.h
23142	EM_V850	87	elfcommon.h
23143	EM_ALPHA	0x9026	elfcommon.h	Interrim Alpha that stuck around
23144	EM_CYGNUS_V850	0x9080	elfcommon.h	Old v850 ID used by Cygnus
23145	EM_S390_OLD	0xA390	elfcommon.h	Obsolete interrim value for S/390
23146	DT_NULL	0	elfcommon.h
23147	DT_NEEDED	1	elfcommon.h
23148	DT_PLTRELSZ	2	elfcommon.h
23149	DT_PLTGOT	3	elfcommon.h
23150	DT_HASH	4	elfcommon.h
23151	DT_STRTAB	5	elfcommon.h
23152	DT_SYMTAB	6	elfcommon.h
23153	DT_RELA	7	elfcommon.h
23154	DT_RELASZ	8	elfcommon.h
23155	DT_RELAENT	9	elfcommon.h
23156	DT_STRSZ	10	elfcommon.h
23157	DT_SYMENT	11	elfcommon.h
23158	DT_INIT	12	elfcommon.h
23159	DT_FINI	13	elfcommon.h
23160	DT_SONAME	14	elfcommon.h
23161	DT_RPATH	15	elfcommon.h
23162	DT_SYMBOLIC	16	elfcommon.h
23163	DT_REL	17	elfcommon.h
23164	DT_RELSZ	18	elfcommon.h
23165	DT_RELENT	19	elfcommon.h
23166	DT_PLTREL	20	elfcommon.h
23167	DT_DEBUG	21	elfcommon.h
23168	DT_TEXTREL	22	elfcommon.h
23169	DT_JMPREL	23	elfcommon.h
23170	DT_LOPROC	0x70000000	elfcommon.h
23171	DT_HIPROC	0x7fffffff	elfcommon.h
23172	AT_NULL	0	elfcommon.h	end of vector
23173	AT_IGNORE	1	elfcommon.h	entry should be ignored
23174	AT_EXECFD	2	elfcommon.h	file descriptor of program
23175	AT_PHDR	3	elfcommon.h	program headers for program
23176	AT_PHENT	4	elfcommon.h	size of program header entry
23177	AT_PHNUM	5	elfcommon.h	number of program headers
23178	AT_PAGESZ	6	elfcommon.h	system page size
23179	AT_BASE	7	elfcommon.h	base address of interpreter
23180	AT_FLAGS	8	elfcommon.h	flags
23181	AT_ENTRY	9	elfcommon.h	entry point of program
23182	AT_NOTELF	10	elfcommon.h	program is not ELF
23183	AT_UID	11	elfcommon.h	real uid
23184	AT_EUID	12	elfcommon.h	effective uid
23185	AT_GID	13	elfcommon.h	real gid
23186	AT_EGID	14	elfcommon.h	effective gid
23187	AT_PLATFORM	15	elfcommon.h	string identifying CPU for optimizations
23188	AT_HWCAP	16	elfcommon.h	arch dependent hints at CPU capabilities
23189	AT_CLKTCK	17	elfcommon.h	frequency at which times() increments
23190	AT_SECURE	23	elfcommon.h	secure mode boolean
23191	PF_X	0x1	elfcommon.h
23192	PF_W	0x2	elfcommon.h
23193	PF_R	0x4	elfcommon.h
23194	SHT_NULL	0	elfcommon.h
23195	SHT_PROGBITS	1	elfcommon.h
23196	SHT_SYMTAB	2	elfcommon.h
23197	SHT_STRTAB	3	elfcommon.h
23198	SHT_RELA	4	elfcommon.h
23199	SHT_HASH	5	elfcommon.h
23200	SHT_DYNAMIC	6	elfcommon.h
23201	SHT_NOTE	7	elfcommon.h
23202	SHT_NOBITS	8	elfcommon.h
23203	SHT_REL	9	elfcommon.h
23204	SHT_SHLIB	10	elfcommon.h
23205	SHT_DYNSYM	11	elfcommon.h
23206	SHT_NUM	12	elfcommon.h
23207	SHT_LOPROC	0x70000000	elfcommon.h
23208	SHT_HIPROC	0x7fffffff	elfcommon.h
23209	SHT_LOUSER	0x80000000	elfcommon.h
23210	SHT_HIUSER	0xffffffff	elfcommon.h
23211	SHF_WRITE	0x1	elfcommon.h
23212	SHF_ALLOC	0x2	elfcommon.h
23213	SHF_EXECINSTR	0x4	elfcommon.h
23214	SHF_MASKPROC	0xf0000000	elfcommon.h
23215	SHN_UNDEF	0	elfcommon.h
23216	SHN_LORESERVE	0xff00	elfcommon.h
23217	SHN_LOPROC	0xff00	elfcommon.h
23218	SHN_HIPROC	0xff1f	elfcommon.h
23219	SHN_ABS	0xfff1	elfcommon.h
23220	SHN_COMMON	0xfff2	elfcommon.h
23221	SHN_HIRESERVE	0xffff	elfcommon.h
23222	EI_NIDENT	16	elfcommon.h
23223	EI_MAG0	0	elfcommon.h	e_ident[] indexes
23224	EI_MAG1	1	elfcommon.h
23225	EI_MAG2	2	elfcommon.h
23226	EI_MAG3	3	elfcommon.h
23227	EI_CLASS	4	elfcommon.h
23228	EI_DATA	5	elfcommon.h
23229	EI_VERSION	6	elfcommon.h
23230	EI_OSABI	7	elfcommon.h
23231	EI_PAD	8	elfcommon.h
23232	ELFMAG0	0x7f	elfcommon.h	EI_MAG
23233	ELFMAG1	'E'	elfcommon.h
23234	ELFMAG2	'L'	elfcommon.h
23235	ELFMAG3	'F'	elfcommon.h
23236	ELFMAG	"\177ELF"	elfcommon.h
23237	SELFMAG	4	elfcommon.h
23238	ELFCLASSNONE	0	elfcommon.h	EI_CLASS
23239	ELFCLASS32	1	elfcommon.h
23240	ELFCLASS64	2	elfcommon.h
23241	ELFCLASSNUM	3	elfcommon.h
23242	ELFDATANONE	0	elfcommon.h	e_ident[EI_DATA]
23243	ELFDATA2LSB	1	elfcommon.h
23244	ELFDATA2MSB	2	elfcommon.h
23245	EV_NONE	0	elfcommon.h	e_version, EI_VERSION
23246	EV_CURRENT	1	elfcommon.h
23247	EV_NUM	2	elfcommon.h
23248	ELFOSABI_NONE	0	elfcommon.h
23249	ELFOSABI_LINUX	3	elfcommon.h
23250	MAX_PCI_FUNC	8	pci.h
23251	MAX_PCI_DEVICES	32	pci.h
23252	MAX_PCI_BUSES	256	pci.h
23253	LINUX_KERNEL_MODULE_SIZE	64	pci.h
23254	PCI_VENDOR_NAME_SIZE	256	pci.h
23255	PCI_PRODUCT_NAME_SIZE	256	pci.h
23256	PCI_CLASS_NAME_SIZE	256	pci.h
23257	MAX_KERNEL_MODULES_PER_PCI_DEVI	10	pci.h
23258	MAX_PCI_CLASSES	256	pci.h
23259	S_IFMT	00170000	stat.h
23260	S_IFSOCK	0140000	stat.h
23261	S_IFLNK	0120000	stat.h
23262	S_IFREG	0100000	stat.h
23263	S_IFBLK	0060000	stat.h
23264	S_IFDIR	0040000	stat.h
23265	S_IFCHR	0020000	stat.h
23266	S_IFIFO	0010000	stat.h
23267	S_ISUID	0004000	stat.h
23268	S_ISGID	0002000	stat.h
23269	S_ISVTX	0001000	stat.h
23270	S_IRWXU	00700	stat.h
23271	S_IRUSR	00400	stat.h
23272	S_IWUSR	00200	stat.h
23273	S_IXUSR	00100	stat.h
23274	S_IRWXG	00070	stat.h
23275	S_IRGRP	00040	stat.h
23276	S_IWGRP	00020	stat.h
23277	S_IXGRP	00010	stat.h
23278	S_IRWXO	00007	stat.h
23279	S_IROTH	00004	stat.h
23280	S_IWOTH	00002	stat.h
23281	S_IXOTH	00001	stat.h
23282	HZ	18	times.h	Piddly resolution...
23283	CLK_TCK	HZ	times.h
23284	ADV_END	0	advconst.h
23285	ADV_BOOTONCE	1	advconst.h
23286	ADV_MENUSAVE	2	advconst.h
23287	IMAGE_TYPE_KERNEL	0	boot.h
23288	IMAGE_TYPE_LINUX	1	boot.h
23289	IMAGE_TYPE_BOOT	2	boot.h
23290	IMAGE_TYPE_BSS	3	boot.h
23291	IMAGE_TYPE_PXE	4	boot.h
23292	IMAGE_TYPE_FDIMAGE	5	boot.h
23293	IMAGE_TYPE_COMBOOT	6	boot.h
23294	IMAGE_TYPE_COM32	7	boot.h
23295	IMAGE_TYPE_CONFIG	8	boot.h
23296	SYSLINUX_FEATURE_LOCAL_BOOT	(0*8+0)	features.h
23297	SYSLINUX_FEATURE_NOOP_IDLE	(0*8+1)	features.h
23298	INITRAMFS_MAX_ALIGN	4096	linux.h
23299	LOADFILE_ZERO_PAD	64	loadfile.h
23300	MAC_ADDR_LEN	16	pxe.h
23301	MAXNUM_MCADDR	8	pxe.h
23302	MAX_DATA_BLKS	8	pxe.h
23303	PXENV_UNDI_ISR_IN_START	1	pxe.h
23304	PXENV_UNDI_ISR_IN_PROCESS	2	pxe.h
23305	PXENV_UNDI_ISR_IN_GET_NEXT	3	pxe.h
23306	PXENV_UNDI_ISR_OUT_OURS	0	pxe.h
23307	PXENV_UNDI_USR_OUT_NOT_OURS	1	pxe.h
23308	PXENV_UNDI_ISR_OUT_DONE	0	pxe.h
23309	PXENV_UNDI_ISR_OUT_TRANSMIT	2	pxe.h
23310	PXENV_UNDI_ISR_OUT_RECEIVE	3	pxe.h
23311	PXENV_UNDI_ISR_OUT_BUSY	4	pxe.h
23312	PXENV_TFTP_OPEN	0x0020	pxe.h
23313	PXENV_TFTP_CLOSE	0x0021	pxe.h
23314	PXENV_TFTP_READ	0x0022	pxe.h
23315	PXENV_TFTP_READ_FILE	0x0023	pxe.h
23316	PXENV_TFTP_READ_FILE_PMODE	0x0024	pxe.h
23317	PXENV_TFTP_GET_FSIZE	0x0025	pxe.h
23318	PXENV_UDP_OPEN	0x0030	pxe.h
23319	PXENV_UDP_CLOSE	0x0031	pxe.h
23320	PXENV_UDP_READ	0x0032	pxe.h
23321	PXENV_UDP_WRITE	0x0033	pxe.h
23322	PXENV_START_UNDI	0x0000	pxe.h
23323	PXENV_UNDI_STARTUP	0x0001	pxe.h
23324	PXENV_UNDI_CLEANUP	0x0002	pxe.h
23325	PXENV_UNDI_INITIALIZE	0x0003	pxe.h
23326	PXENV_UNDI_RESET_NIC	0x0004	pxe.h
23327	PXENV_UNDI_SHUTDOWN	0x0005	pxe.h
23328	PXENV_UNDI_OPEN	0x0006	pxe.h
23329	PXENV_UNDI_CLOSE	0x0007	pxe.h
23330	PXENV_UNDI_TRANSMIT	0x0008	pxe.h
23331	PXENV_UNDI_SET_MCAST_ADDR	0x0009	pxe.h
23332	PXENV_UNDI_SET_STATION_ADDR	0x000A	pxe.h
23333	PXENV_UNDI_SET_PACKET_FILTER	0x000B	pxe.h
23334	PXENV_UNDI_GET_INFORMATION	0x000C	pxe.h
23335	PXENV_UNDI_GET_STATISTICS	0x000D	pxe.h
23336	PXENV_UNDI_CLEAR_STATISTICS	0x000E	pxe.h
23337	PXENV_UNDI_INITIATE_DIAGS	0x000F	pxe.h
23338	PXENV_UNDI_FORCE_INTERRUPT	0x0010	pxe.h
23339	PXENV_UNDI_GET_MCAST_ADDR	0x0011	pxe.h
23340	PXENV_UNDI_GET_NIC_TYPE	0x0012	pxe.h
23341	PXENV_UNDI_GET_IFACE_INFO	0x0013	pxe.h
23342	PXENV_UNDI_ISR	0x0014	pxe.h
23343	PXENV_STOP_UNDI	0x0015	pxe.h	Overlap...?
23344	PXENV_UNDI_GET_STATE	0x0015	pxe.h	Overlap...?
23345	PXENV_UNLOAD_STACK	0x0070	pxe.h
23346	PXENV_GET_CACHED_INFO	0x0071	pxe.h
23347	PXENV_RESTART_DHCP	0x0072	pxe.h
23348	PXENV_RESTART_TFTP	0x0073	pxe.h
23349	PXENV_MODE_SWITCH	0x0074	pxe.h
23350	PXENV_START_BASE	0x0075	pxe.h
23351	PXENV_STOP_BASE	0x0076	pxe.h
23352	PXENV_EXIT_SUCCESS	0x0000	pxe.h
23353	PXENV_EXIT_FAILURE	0x0001	pxe.h
23354	PXENV_STATUS_SUCCESS	0x00	pxe.h
23355	PXENV_STATUS_FAILURE	0x01	pxe.h
23356	PXENV_STATUS_BAD_FUNC	0x02	pxe.h
23357	PXENV_STATUS_UNSUPPORTED	0x03	pxe.h
23358	PXENV_STATUS_KEEP_UNDI	0x04	pxe.h
23359	PXENV_STATUS_KEEP_ALL	0x05	pxe.h
23360	PXENV_STATUS_OUT_OF_RESOURCES	0x06	pxe.h
23361	PXENV_STATUS_ARP_TIMEOUT	0x11	pxe.h
23362	PXENV_STATUS_UDP_CLOSED	0x18	pxe.h
23363	PXENV_STATUS_UDP_OPEN	0x19	pxe.h
23364	PXENV_STATUS_TFTP_CLOSED	0x1A	pxe.h
23365	PXENV_STATUS_TFTP_OPEN	0x1B	pxe.h
23366	PXENV_STATUS_MCOPY_PROBLEM	0x20	pxe.h
23367	PXENV_STATUS_BIS_INTEGRITY_FAIL	0x21	pxe.h
23368	PXENV_STATUS_BIS_VALIDATE_FAILU	0x22	pxe.h
23369	PXENV_STATUS_BIS_INIT_FAILURE	0x23	pxe.h
23370	PXENV_STATUS_BIS_SHUTDOWN_FAILU	0x24	pxe.h
23371	PXENV_STATUS_BIS_GBOA_FAILURE	0x25	pxe.h
23372	PXENV_STATUS_BIS_FREE_FAILURE	0x26	pxe.h
23373	PXENV_STATUS_BIS_GSI_FAILURE	0x27	pxe.h
23374	PXENV_STATUS_BIS_BAD_CKSUM	0x28	pxe.h
23375	PXENV_STATUS_TFTP_CANNOT_ARP_AD	0x30	pxe.h
23376	PXENV_STATUS_TFTP_OPEN_TIMEOUT	0x32	pxe.h
23377	PXENV_STATUS_TFTP_UNKNOWN_OPCOD	0x33	pxe.h
23378	PXENV_STATUS_TFTP_READ_TIMEOUT	0x35	pxe.h
23379	PXENV_STATUS_TFTP_ERROR_OPCODE	0x36	pxe.h
23380	PXENV_STATUS_TFTP_CANNOT_OPEN_C	0x38	pxe.h
23381	PXENV_STATUS_TFTP_CANNOT_READ_F	0x39	pxe.h
23382	PXENV_STATUS_TFTP_TOO_MANY_PACK	0x3A	pxe.h
23383	PXENV_STATUS_TFTP_FILE_NOT_FOUN	0x3B	pxe.h
23384	PXENV_STATUS_TFTP_ACCESS_VIOLAT	0x3C	pxe.h
23385	PXENV_STATUS_TFTP_NO_MCAST_ADDR	0x3D	pxe.h
23386	PXENV_STATUS_TFTP_NO_FILESIZE	0x3E	pxe.h
23387	PXENV_STATUS_TFTP_INVALID_PACKE	0x3F	pxe.h
23388	PXENV_STATUS_DHCP_TIMEOUT	0x51	pxe.h
23389	PXENV_STATUS_DHCP_NO_IP_ADDRESS	0x52	pxe.h
23390	PXENV_STATUS_DHCP_NO_BOOTFILE_N	0x53	pxe.h
23391	PXENV_STATUS_DHCP_BAD_IP_ADDRES	0x54	pxe.h
23392	PXENV_STATUS_UNDI_INVALID_FUNCT	0x60	pxe.h
23393	PXENV_STATUS_UNDI_MEDIATEST_FAI	0x61	pxe.h
23394	PXENV_STATUS_UNDI_CANNOT_INIT_N	0x62	pxe.h
23395	PXENV_STATUS_UNDI_CANNOT_INITIA	0x63	pxe.h
23396	PXENV_STATUS_UNDI_CANNOT_INITIA	0x64	pxe.h
23397	PXENV_STATUS_UNDI_CANNOT_READ_C	0x65	pxe.h
23398	PXENV_STATUS_UNDI_CANNOT_READ_I	0x66	pxe.h
23399	PXENV_STATUS_UNDI_BAD_MAC_ADDRE	0x67	pxe.h
23400	PXENV_STATUS_UNDI_BAD_EEPROM_CH	0x68	pxe.h
23401	PXENV_STATUS_UNDI_ERROR_SETTING	0x69	pxe.h
23402	PXENV_STATUS_UNDI_INVALID_STATE	0x6A	pxe.h
23403	PXENV_STATUS_UNDI_TRANSMIT_ERRO	0x6B	pxe.h
23404	PXENV_STATUS_UNDI_INVALID_PARAM	0x6C	pxe.h
23405	PXENV_STATUS_BSTRAP_PROMPT_MENU	0x74	pxe.h
23406	PXENV_STATUS_BSTRAP_MCAST_ADDR	0x76	pxe.h
23407	PXENV_STATUS_BSTRAP_MISSING_LIS	0x77	pxe.h
23408	PXENV_STATUS_BSTRAP_NO_RESPONSE	0x78	pxe.h
23409	PXENV_STATUS_BSTRAP_FILE_TOO_BI	0x79	pxe.h
23410	PXENV_STATUS_BINL_CANCELED_BY_K	0xA0	pxe.h
23411	PXENV_STATUS_BINL_NO_PXE_SERVER	0xA1	pxe.h
23412	PXENV_STATUS_NOT_AVAILABLE_IN_P	0xA2	pxe.h
23413	PXENV_STATUS_NOT_AVAILABLE_IN_R	0xA3	pxe.h
23414	PXENV_STATUS_BUSD_DEVICE_NOT_SU	0xB0	pxe.h
23415	PXENV_STATUS_LOADER_NO_FREE_BAS	0xC0	pxe.h
23416	PXENV_STATUS_LOADER_NO_BC_ROMID	0xC1	pxe.h
23417	PXENV_STATUS_LOADER_BAD_BC_ROMI	0xC2	pxe.h
23418	PXENV_STATUS_LOADER_BAD_BC_RUNT	0xC3	pxe.h
23419	PXENV_STATUS_LOADER_NO_UNDI_ROM	0xC4	pxe.h
23420	PXENV_STATUS_LOADER_BAD_UNDI_RO	0xC5	pxe.h
23421	PXENV_STATUS_LOADER_BAD_UNDI_DR	0xC6	pxe.h
23422	PXENV_STATUS_LOADER_NO_PXE_STRU	0xC8	pxe.h
23423	PXENV_STATUS_LOADER_NO_PXENV_ST	0xC9	pxe.h
23424	PXENV_STATUS_LOADER_UNDI_START	0xCA	pxe.h
23425	PXENV_STATUS_LOADER_BC_START	0xCB	pxe.h
23426	_INIT_H	1	init.h
23427	MALLOC_CHUNK_SIZE	65536	malloc.h
23428	MALLOC_CHUNK_MASK	(MALLOC_CHUNK_SIZE-1)	malloc.h
23429	ARENA_TYPE_USED	0x64e69c70	malloc.h
23430	ARENA_TYPE_FREE	0x012d610a	malloc.h
23431	ARENA_TYPE_HEAD	0x971676b5	malloc.h
23432	ARENA_TYPE_DEAD	0xeeeeeeee	malloc.h
23433	ARENA_TYPE_USED	0	malloc.h
23434	ARENA_TYPE_FREE	1	malloc.h
23435	ARENA_TYPE_HEAD	2	malloc.h
23436	ARENA_SIZE_MASK	(~(uintptr_t)(sizeof(struct arena_header)-1))	malloc.h
23437	SANITY_CHECK	1	tinyjpeg-internal.h
23438	HUFFMAN_BITS_SIZE	256	tinyjpeg-internal.h
23439	HUFFMAN_HASH_NBITS	9	tinyjpeg-internal.h
23440	HUFFMAN_HASH_SIZE	(1UL<<HUFFMAN_HASH_NBITS)	tinyjpeg-internal.h
23441	HUFFMAN_HASH_MASK	(HUFFMAN_HASH_SIZE-1)	tinyjpeg-internal.h
23442	HUFFMAN_TABLES	4	tinyjpeg-internal.h
23443	COMPONENTS	3	tinyjpeg-internal.h
23444	JPEG_MAX_WIDTH	4096	tinyjpeg-internal.h
23445	JPEG_MAX_HEIGHT	4096	tinyjpeg-internal.h
23446	IDCT	tinyjpeg_idct_float	tinyjpeg-internal.h
23447	cY	0	tinyjpeg-internal.h
23448	cCb	1	tinyjpeg-internal.h
23449	cCr	2	tinyjpeg-internal.h
23450	BLACK_Y	0	tinyjpeg-internal.h
23451	BLACK_U	127	tinyjpeg-internal.h
23452	BLACK_V	127	tinyjpeg-internal.h
23453	SANITY_CHECK	1	tinyjpeg-internal.h
23454	ANSI_MAX_PARMS	16	ansi.h
23455	__DEV_MAGIC	0xf4e7	file.h
23456	__DEV_TTY	0x0001	file.h	TTY - must be bit 0
23457	__DEV_FILE	0x0002	file.h	Ordinary file
23458	__DEV_OUTPUT	0x0004	file.h	This is an output device
23459	__DEV_INPUT	0	file.h	Dummy
23460	__DEV_ERROR	0x0008	file.h	This is the error device
23461	__DEV_NULL	0x0010	file.h	This is the null device
23462	NFILES	32	file.h	Number of files to support
23463	MAXBLOCK	16384	file.h	Defined by ABI
23464	VESA_MAGIC	('V' + ('E' << 8) + ('S' << 16) + ('A' << 24))	vesa.h
23465	VBE2_MAGIC	('V' + ('B' << 8) + ('E' << 16) + ('2' << 24))	vesa.h
23466	FONT_MAX_CHARS	256	video.h
23467	FONT_MAX_HEIGHT	32	video.h
23468	FONT_WIDTH	8	video.h
23469	DEFAULT_VESA_X_SIZE	640	video.h
23470	DEFAULT_VESA_Y_SIZE	480	video.h
23471	VIDEO_BORDER	8	video.h
23472	TEXT_PIXEL_ROWS	(__vesa_info.mi.v_res - 2*VIDEO_BORDER)	video.h
23473	TEXT_PIXEL_COLS	(__vesa_info.mi.h_res - 2*VIDEO_BORDER)	video.h
23474	LENGTH_CODES	29	deflate.h
23475	LITERALS	256	deflate.h
23476	L_CODES	(LITERALS+1+LENGTH_CODES)	deflate.h
23477	D_CODES	30	deflate.h
23478	BL_CODES	19	deflate.h
23479	HEAP_SIZE	(2*L_CODES+1)	deflate.h
23480	MAX_BITS	15	deflate.h
23481	INIT_STATE	42	deflate.h
23482	BUSY_STATE	113	deflate.h
23483	FINISH_STATE	666	deflate.h
23484	Freq	fc.freq	deflate.h
23485	Code	fc.code	deflate.h
23486	Dad	dl.dad	deflate.h
23487	Len	dl.len	deflate.h
23488	MIN_LOOKAHEAD	(MAX_MATCH+MIN_MATCH+1)	deflate.h
23489	ENOUGH	1440	inftrees.h
23490	MAXD	154	inftrees.h
23491	deflateInit_	z_deflateInit_	zconf.in.h
23492	deflate	z_deflate	zconf.in.h
23493	deflateEnd	z_deflateEnd	zconf.in.h
23494	inflateInit_	z_inflateInit_	zconf.in.h
23495	inflate	z_inflate	zconf.in.h
23496	inflateEnd	z_inflateEnd	zconf.in.h
23497	deflateInit2_	z_deflateInit2_	zconf.in.h
23498	deflateSetDictionary	z_deflateSetDictionary	zconf.in.h
23499	deflateCopy	z_deflateCopy	zconf.in.h
23500	deflateReset	z_deflateReset	zconf.in.h
23501	deflatePrime	z_deflatePrime	zconf.in.h
23502	deflateParams	z_deflateParams	zconf.in.h
23503	deflateBound	z_deflateBound	zconf.in.h
23504	inflateInit2_	z_inflateInit2_	zconf.in.h
23505	inflateSetDictionary	z_inflateSetDictionary	zconf.in.h
23506	inflateSync	z_inflateSync	zconf.in.h
23507	inflateSyncPoint	z_inflateSyncPoint	zconf.in.h
23508	inflateCopy	z_inflateCopy	zconf.in.h
23509	inflateReset	z_inflateReset	zconf.in.h
23510	compress	z_compress	zconf.in.h
23511	compress2	z_compress2	zconf.in.h
23512	compressBound	z_compressBound	zconf.in.h
23513	uncompress	z_uncompress	zconf.in.h
23514	adler32	z_adler32	zconf.in.h
23515	crc32	z_crc32	zconf.in.h
23516	get_crc_table	z_get_crc_table	zconf.in.h
23517	Byte	z_Byte	zconf.in.h
23518	uInt	z_uInt	zconf.in.h
23519	uLong	z_uLong	zconf.in.h
23520	Bytef	z_Bytef	zconf.in.h
23521	charf	z_charf	zconf.in.h
23522	intf	z_intf	zconf.in.h
23523	uIntf	z_uIntf	zconf.in.h
23524	uLongf	z_uLongf	zconf.in.h
23525	voidpf	z_voidpf	zconf.in.h
23526	voidp	z_voidp	zconf.in.h
23527	MAX_MEM_LEVEL	8	zconf.in.h
23528	MAX_MEM_LEVEL	9	zconf.in.h
23529	MAX_WBITS	15	zconf.in.h	32K LZ77 window
23530	FAR	_far	zconf.in.h
23531	FAR	far	zconf.in.h
23532	FAR	_far	zconf.in.h
23533	FAR	far	zconf.in.h
23534	ZEXTERN	extern __declspec(dllexport)	zconf.in.h
23535	ZEXTERN	extern __declspec(dllimport)	zconf.in.h
23536	ZEXPORT	WINAPI	zconf.in.h
23537	ZEXPORTVA	WINAPIV	zconf.in.h
23538	ZEXPORTVA	FAR CDECL	zconf.in.h
23539	ZEXPORT	__declspec(dllexport)	zconf.in.h
23540	ZEXPORTVA	__declspec(dllexport)	zconf.in.h
23541	ZEXPORT	__declspec(dllimport)	zconf.in.h
23542	ZEXPORTVA	__declspec(dllimport)	zconf.in.h
23543	ZEXTERN	extern	zconf.in.h
23544	Bytef	Byte FAR	zconf.in.h
23545	z_off_t	off_t	zconf.in.h
23546	SEEK_SET	0	zconf.in.h	Seek from beginning of file.
23547	SEEK_CUR	1	zconf.in.h	Seek from current position.
23548	SEEK_END	2	zconf.in.h	Set file pointer to EOF plus "offset"
23549	z_off_t	long	zconf.in.h
23550	local	static	zutil.h
23551	DEF_WBITS	MAX_WBITS	zutil.h
23552	DEF_MEM_LEVEL	8	zutil.h
23553	DEF_MEM_LEVEL	MAX_MEM_LEVEL	zutil.h
23554	STORED_BLOCK	0	zutil.h
23555	STATIC_TREES	1	zutil.h
23556	DYN_TREES	2	zutil.h
23557	MIN_MATCH	3	zutil.h
23558	MAX_MATCH	258	zutil.h
23559	PRESET_DICT	0x20	zutil.h	preset dictionary flag in zlib header
23560	OS_CODE	0x00	zutil.h
23561	OS_CODE	0x01	zutil.h
23562	OS_CODE	0x02	zutil.h
23563	OS_CODE	0x05	zutil.h
23564	OS_CODE	0x06	zutil.h
23565	OS_CODE	0x07	zutil.h
23566	OS_CODE	0x0a	zutil.h
23567	OS_CODE	0x0b	zutil.h
23568	OS_CODE	0x0f	zutil.h
23569	OS_CODE	0x03	zutil.h	assume Unix
23570	vsnprintf	_vsnprintf	zutil.h
23571	zmemcpy	_fmemcpy	zutil.h
23572	zmemcmp	_fmemcmp	zutil.h
23573	zmemcpy	memcpy	zutil.h
23574	zmemcmp	memcmp	zutil.h
23575	BASE64_PAD	0x10000	base64.h
23576	BASE64_MIME	('+' + ('/' << 8))	base64.h
23577	BASE64_SAFE	('-' + ('_' << 8))	base64.h
23578	BASE64_CRYPT	('.' + ('/' << 8))	base64.h
23579	BASE64_URL	('*' + ('-' << 8))	base64.h	Haven't seen myself
23580	BASE64_REGEX	('\|' + ('-' << 8))	base64.h	Ditto...
23581	CLK_TCK	sysconf(_SC_CLK_TCK)	getkey.h
23582	KEY_NONE	(-1)	getkey.h
23583	KEY_BACKSPACE	0x0008	getkey.h
23584	KEY_TAB	0x0009	getkey.h
23585	KEY_ENTER	0x000d	getkey.h
23586	KEY_ESC	0x001b	getkey.h
23587	KEY_DEL	0x007f	getkey.h
23588	KEY_F1	0x0100	getkey.h
23589	KEY_F2	0x0101	getkey.h
23590	KEY_F3	0x0102	getkey.h
23591	KEY_F4	0x0103	getkey.h
23592	KEY_F5	0x0104	getkey.h
23593	KEY_F6	0x0105	getkey.h
23594	KEY_F7	0x0106	getkey.h
23595	KEY_F8	0x0107	getkey.h
23596	KEY_F9	0x0108	getkey.h
23597	KEY_F10	0x0109	getkey.h
23598	KEY_F11	0x010A	getkey.h
23599	KEY_F12	0x010B	getkey.h
23600	KEY_UP	0x0120	getkey.h
23601	KEY_DOWN	0x0121	getkey.h
23602	KEY_LEFT	0x0122	getkey.h
23603	KEY_RIGHT	0x0123	getkey.h
23604	KEY_PGUP	0x0124	getkey.h
23605	KEY_PGDN	0x0125	getkey.h
23606	KEY_HOME	0x0126	getkey.h
23607	KEY_END	0x0127	getkey.h
23608	KEY_INSERT	0x0128	getkey.h
23609	KEY_DELETE	0x0129	getkey.h
23610	do_idle	syslinux_idle	libutil.h
23611	do_idle	sched_yield	libutil.h
23612	MD5_SIZE	16	md5.h	128 bits
23613	DEBUG	0	mboot.h
23614	dprintf	printf	mboot.h
23615	MAP_HIGH	1	mboot.h
23616	MAP_NOPAD	2	mboot.h
23617	MULTIBOOT_SEARCH	8192	mb_header.h
23618	MULTIBOOT_MAGIC	0x1BADB002	mb_header.h
23619	MULTIBOOT_MUSTKNOW	0x0000FFFF	mb_header.h
23620	MULTIBOOT_UNSUPPORTED	0x0000FFF8	mb_header.h
23621	MULTIBOOT_PAGE_ALIGN	0x00000001	mb_header.h
23622	MULTIBOOT_MEMORY_INFO	0x00000002	mb_header.h
23623	MULTIBOOT_VIDEO_MODE	0x00000004	mb_header.h
23624	MULTIBOOT_AOUT_KLUDGE	0x00010000	mb_header.h
23625	MB_ARD_MEMORY	1	mb_info.h
23626	MB_DI_CHS_MODE	0	mb_info.h
23627	MB_DI_LBA_MODE	1	mb_info.h
23628	MB_INFO_MEMORY	0x00000001	mb_info.h
23629	MB_INFO_BOOTDEV	0x00000002	mb_info.h
23630	MB_INFO_CMDLINE	0x00000004	mb_info.h
23631	MB_INFO_MODS	0x00000008	mb_info.h
23632	MB_INFO_AOUT_SYMS	0x00000010	mb_info.h
23633	MB_INFO_ELF_SHDR	0x00000020	mb_info.h
23634	MB_INFO_MEM_MAP	0x00000040	mb_info.h
23635	MB_INFO_DRIVE_INFO	0x00000080	mb_info.h
23636	MB_INFO_CONFIG_TABLE	0x00000100	mb_info.h
23637	MB_INFO_BOOT_LOADER_NAME	0x00000200	mb_info.h
23638	MB_INFO_APM_TABLE	0x00000400	mb_info.h
23639	MB_INFO_VIDEO_INFO	0x00000800	mb_info.h
23640	MULTIBOOT_VALID	0x2BADB002	mb_info.h
23641	VESA_MAGIC	('V' + ('E' << 8) + ('S' << 16) + ('A' << 24))	vesa.h
23642	VBE2_MAGIC	('V' + ('B' << 8) + ('E' << 16) + ('2' << 24))	vesa.h
23643	CLK_TCK	sysconf(_SC_CLK_TCK)	menu.h
23644	MAX_CMDLINE_LEN	2048	menu.h
23645	MSG_COLORS_DEF_FG	0x90ffffff	menu.h
23646	MSG_COLORS_DEF_BG	0x80ffffff	menu.h
23647	MSG_COLORS_DEF_SHADOW	SHADOW_NORMAL	menu.h
23648	ROSH_IS_COM32	1	rosh.h
23649	ROSH_IS_COM32	0	rosh.h
23650	SEP	'/'	rosh.h
23651	ROSH_BUF_SZ	16384	rosh.h
23652	ROSH_SBUF_SZ	1200	rosh.h
23653	ROSH_CMD_SZ	MAX_CMDLINE_LEN	rosh.h
23654	ROSH_CMD_SZ	COMMAND_LINE_SIZE	rosh.h
23655	ROSH_CMD_SZ	2048	rosh.h
23656	ROSH_PATH_SZ	PATH_MAX	rosh.h
23657	ROSH_PATH_SZ	NAME_MAX	rosh.h
23658	ROSH_PATH_SZ	255	rosh.h
23659	BE_NEEDLEN	0x01	backend.h
23660	cpio_init	init_data	backend.h
23661	MODE_FILE	0100644	backend.h
23662	MODE_DIR	0040755	backend.h
23663	MALLOC_CHUNK_SIZE	65536	malloc.h
23664	MALLOC_CHUNK_MASK	(MALLOC_CHUNK_SIZE-1)	malloc.h
23665	ARENA_TYPE_USED	0x64e69c70	malloc.h
23666	ARENA_TYPE_FREE	0x012d610a	malloc.h
23667	ARENA_TYPE_HEAD	0x971676b5	malloc.h
23668	ARENA_TYPE_DEAD	0xeeeeeeee	malloc.h
23669	ARENA_TYPE_USED	0	malloc.h
23670	ARENA_TYPE_FREE	1	malloc.h
23671	ARENA_TYPE_HEAD	2	malloc.h
23672	ARENA_SIZE_MASK	(sizeof(struct arena_header)-1)	malloc.h
23673	NULL	((void *)0)	mystuff.h
23674	INT8_MIN	(-128)	stdint.h
23675	INT16_MIN	(-32767-1)	stdint.h
23676	INT32_MIN	(-2147483647-1)	stdint.h
23677	INT64_MIN	(-9223372036854775807LL-1)	stdint.h
23678	INT8_MAX	(127)	stdint.h
23679	INT16_MAX	(32767)	stdint.h
23680	INT32_MAX	(2147483647)	stdint.h
23681	INT64_MAX	(9223372036854775807LL)	stdint.h
23682	UINT8_MAX	(255U)	stdint.h
23683	UINT16_MAX	(65535U)	stdint.h
23684	UINT32_MAX	(4294967295U)	stdint.h
23685	UINT64_MAX	(18446744073709551615ULL)	stdint.h
23686	INT_LEAST8_MIN	(-128)	stdint.h
23687	INT_LEAST16_MIN	(-32767-1)	stdint.h
23688	INT_LEAST32_MIN	(-2147483647-1)	stdint.h
23689	INT_LEAST64_MIN	(-9223372036854775807LL-1)	stdint.h
23690	INT_LEAST8_MAX	(127)	stdint.h
23691	INT_LEAST16_MAX	(32767)	stdint.h
23692	INT_LEAST32_MAX	(2147483647)	stdint.h
23693	INT_LEAST64_MAX	(9223372036854775807LL)	stdint.h
23694	UINT_LEAST8_MAX	(255U)	stdint.h
23695	UINT_LEAST16_MAX	(65535U)	stdint.h
23696	UINT_LEAST32_MAX	(4294967295U)	stdint.h
23697	UINT_LEAST64_MAX	(18446744073709551615ULL)	stdint.h
23698	INT_FAST8_MIN	(-128)	stdint.h
23699	INT_FAST16_MIN	(-32767-1)	stdint.h
23700	INT_FAST32_MIN	(-2147483647-1)	stdint.h
23701	INT_FAST64_MIN	(-9223372036854775807LL-1)	stdint.h
23702	INT_FAST8_MAX	(127)	stdint.h
23703	INT_FAST16_MAX	(32767)	stdint.h
23704	INT_FAST32_MAX	(2147483647)	stdint.h
23705	INT_FAST64_MAX	(9223372036854775807LL)	stdint.h
23706	UINT_FAST8_MAX	(255U)	stdint.h
23707	UINT_FAST16_MAX	(65535U)	stdint.h
23708	UINT_FAST32_MAX	(4294967295U)	stdint.h
23709	UINT_FAST64_MAX	(18446744073709551615ULL)	stdint.h
23710	INTPTR_MIN	(-2147483647-1)	stdint.h
23711	INTPTR_MAX	(2147483647)	stdint.h
23712	UINTPTR_MAX	(4294967295U)	stdint.h
23713	INTMAX_MIN	(-9223372036854775807LL-1)	stdint.h
23714	INTMAX_MAX	(9223372036854775807LL)	stdint.h
23715	UINTMAX_MAX	(18446744073709551615ULL)	stdint.h
23716	PTRDIFF_MIN	(-2147483647-1)	stdint.h
23717	PTRDIFF_MAX	(2147483647)	stdint.h
23718	SIG_ATOMIC_MIN	(-2147483647-1)	stdint.h
23719	SIG_ATOMIC_MAX	(2147483647)	stdint.h
23720	SIZE_MAX	(4294967295U)	stdint.h
23721	stdin	0	stdio.h
23722	stdout	1	stdio.h
23723	stderr	2	stdio.h
23724	EXT2_DEFAULT_PREALLOC_BLOCKS	8	ext2_fs.h
23725	EXT2FS_DATE	"95/08/09"	ext2_fs.h
23726	EXT2FS_VERSION	"0.5b"	ext2_fs.h
23727	EXT2_BAD_INO	1	ext2_fs.h	Bad blocks inode
23728	EXT2_ROOT_INO	2	ext2_fs.h	Root inode
23729	EXT2_ACL_IDX_INO	3	ext2_fs.h	ACL inode
23730	EXT2_ACL_DATA_INO	4	ext2_fs.h	ACL inode
23731	EXT2_BOOT_LOADER_INO	5	ext2_fs.h	Boot loader inode
23732	EXT2_UNDEL_DIR_INO	6	ext2_fs.h	Undelete directory inode
23733	EXT2_GOOD_OLD_FIRST_INO	11	ext2_fs.h
23734	EXT2_SUPER_MAGIC	0xEF53	ext2_fs.h
23735	EXT2_LINK_MAX	32000	ext2_fs.h
23736	EXT2_MIN_BLOCK_SIZE	1024	ext2_fs.h
23737	EXT2_MAX_BLOCK_SIZE	4096	ext2_fs.h
23738	EXT2_MIN_BLOCK_LOG_SIZE	10	ext2_fs.h
23739	EXT2_MIN_FRAG_SIZE	1024	ext2_fs.h
23740	EXT2_MAX_FRAG_SIZE	4096	ext2_fs.h
23741	EXT2_MIN_FRAG_LOG_SIZE	10	ext2_fs.h
23742	EXT2_NDIR_BLOCKS	12	ext2_fs.h
23743	EXT2_IND_BLOCK	EXT2_NDIR_BLOCKS	ext2_fs.h
23744	EXT2_DIND_BLOCK	(EXT2_IND_BLOCK + 1)	ext2_fs.h
23745	EXT2_TIND_BLOCK	(EXT2_DIND_BLOCK + 1)	ext2_fs.h
23746	EXT2_N_BLOCKS	(EXT2_TIND_BLOCK + 1)	ext2_fs.h
23747	EXT2_SECRM_FL	0x00000001	ext2_fs.h	Secure deletion
23748	EXT2_UNRM_FL	0x00000002	ext2_fs.h	Undelete
23749	EXT2_COMPR_FL	0x00000004	ext2_fs.h	Compress file
23750	EXT2_SYNC_FL	0x00000008	ext2_fs.h	Synchronous updates
23751	EXT2_IMMUTABLE_FL	0x00000010	ext2_fs.h	Immutable file
23752	EXT2_APPEND_FL	0x00000020	ext2_fs.h	writes to file may only append
23753	EXT2_NODUMP_FL	0x00000040	ext2_fs.h	do not dump file
23754	EXT2_NOATIME_FL	0x00000080	ext2_fs.h	do not update atime
23755	EXT2_DIRTY_FL	0x00000100	ext2_fs.h
23756	EXT2_COMPRBLK_FL	0x00000200	ext2_fs.h	One or more compressed clusters
23757	EXT2_NOCOMP_FL	0x00000400	ext2_fs.h	Don't compress
23758	EXT2_ECOMPR_FL	0x00000800	ext2_fs.h	Compression error
23759	EXT2_BTREE_FL	0x00001000	ext2_fs.h	btree format dir
23760	EXT2_RESERVED_FL	0x80000000	ext2_fs.h	reserved for ext2 lib
23761	EXT2_FL_USER_VISIBLE	0x00001FFF	ext2_fs.h	User visible flags
23762	EXT2_FL_USER_MODIFIABLE	0x000000FF	ext2_fs.h	User modifiable flags
23763	EXT2_IOC_GETFLAGS	_IOR('f', 1, long)	ext2_fs.h
23764	EXT2_IOC_SETFLAGS	_IOW('f', 2, long)	ext2_fs.h
23765	EXT2_IOC_GETVERSION	_IOR('v', 1, long)	ext2_fs.h
23766	EXT2_IOC_SETVERSION	_IOW('v', 2, long)	ext2_fs.h
23767	i_size_high	i_dir_acl	ext2_fs.h
23768	i_reserved1	osd1.linux1.l_i_reserved1	ext2_fs.h
23769	i_frag	osd2.linux2.l_i_frag	ext2_fs.h
23770	i_fsize	osd2.linux2.l_i_fsize	ext2_fs.h
23771	i_uid_low	i_uid	ext2_fs.h
23772	i_gid_low	i_gid	ext2_fs.h
23773	i_uid_high	osd2.linux2.l_i_uid_high	ext2_fs.h
23774	i_gid_high	osd2.linux2.l_i_gid_high	ext2_fs.h
23775	i_reserved2	osd2.linux2.l_i_reserved2	ext2_fs.h
23776	i_translator	osd1.hurd1.h_i_translator	ext2_fs.h
23777	i_frag	osd2.hurd2.h_i_frag;	ext2_fs.h
23778	i_fsize	osd2.hurd2.h_i_fsize;	ext2_fs.h
23779	i_uid_high	osd2.hurd2.h_i_uid_high	ext2_fs.h
23780	i_gid_high	osd2.hurd2.h_i_gid_high	ext2_fs.h
23781	i_author	osd2.hurd2.h_i_author	ext2_fs.h
23782	i_reserved1	osd1.masix1.m_i_reserved1	ext2_fs.h
23783	i_frag	osd2.masix2.m_i_frag	ext2_fs.h
23784	i_fsize	osd2.masix2.m_i_fsize	ext2_fs.h
23785	i_reserved2	osd2.masix2.m_i_reserved2	ext2_fs.h
23786	EXT2_VALID_FS	0x0001	ext2_fs.h	Unmounted cleanly
23787	EXT2_ERROR_FS	0x0002	ext2_fs.h	Errors detected
23788	EXT2_MOUNT_CHECK	0x0001	ext2_fs.h	Do mount-time checks
23789	EXT2_MOUNT_GRPID	0x0004	ext2_fs.h	Create files with directory's group
23790	EXT2_MOUNT_DEBUG	0x0008	ext2_fs.h	Some debugging messages
23791	EXT2_MOUNT_ERRORS_CONT	0x0010	ext2_fs.h	Continue on errors
23792	EXT2_MOUNT_ERRORS_RO	0x0020	ext2_fs.h	Remount fs ro on errors
23793	EXT2_MOUNT_ERRORS_PANIC	0x0040	ext2_fs.h	Panic on errors
23794	EXT2_MOUNT_MINIX_DF	0x0080	ext2_fs.h	Mimics the Minix statfs
23795	EXT2_MOUNT_NO_UID32	0x0200	ext2_fs.h	Disable 32-bit UIDs
23796	EXT2_DFL_MAX_MNT_COUNT	20	ext2_fs.h	Allow 20 mounts
23797	EXT2_DFL_CHECKINTERVAL	0	ext2_fs.h	Don't use interval check
23798	EXT2_ERRORS_CONTINUE	1	ext2_fs.h	Continue execution
23799	EXT2_ERRORS_RO	2	ext2_fs.h	Remount fs read-only
23800	EXT2_ERRORS_PANIC	3	ext2_fs.h	Panic
23801	EXT2_ERRORS_DEFAULT	EXT2_ERRORS_CONTINUE	ext2_fs.h
23802	EXT2_OS_LINUX	0	ext2_fs.h
23803	EXT2_OS_HURD	1	ext2_fs.h
23804	EXT2_OS_MASIX	2	ext2_fs.h
23805	EXT2_OS_FREEBSD	3	ext2_fs.h
23806	EXT2_OS_LITES	4	ext2_fs.h
23807	EXT2_GOOD_OLD_REV	0	ext2_fs.h	The good old (original) format
23808	EXT2_DYNAMIC_REV	1	ext2_fs.h	V2 format w/ dynamic inode sizes
23809	EXT2_CURRENT_REV	EXT2_GOOD_OLD_REV	ext2_fs.h
23810	EXT2_MAX_SUPP_REV	EXT2_DYNAMIC_REV	ext2_fs.h
23811	EXT2_GOOD_OLD_INODE_SIZE	128	ext2_fs.h
23812	EXT2_FEATURE_COMPAT_DIR_PREALLO	0x0001	ext2_fs.h
23813	EXT2_FEATURE_COMPAT_IMAGIC_INOD	0x0002	ext2_fs.h
23814	EXT3_FEATURE_COMPAT_HAS_JOURNAL	0x0004	ext2_fs.h
23815	EXT2_FEATURE_COMPAT_EXT_ATTR	0x0008	ext2_fs.h
23816	EXT2_FEATURE_COMPAT_RESIZE_INO	0x0010	ext2_fs.h
23817	EXT2_FEATURE_COMPAT_DIR_INDEX	0x0020	ext2_fs.h
23818	EXT2_FEATURE_COMPAT_ANY	0xffffffff	ext2_fs.h
23819	EXT2_FEATURE_RO_COMPAT_SPARSE_S	0x0001	ext2_fs.h
23820	EXT2_FEATURE_RO_COMPAT_LARGE_FI	0x0002	ext2_fs.h
23821	EXT2_FEATURE_RO_COMPAT_BTREE_DI	0x0004	ext2_fs.h
23822	EXT2_FEATURE_RO_COMPAT_ANY	0xffffffff	ext2_fs.h
23823	EXT2_FEATURE_INCOMPAT_COMPRESSI	0x0001	ext2_fs.h
23824	EXT2_FEATURE_INCOMPAT_FILETYPE	0x0002	ext2_fs.h
23825	EXT3_FEATURE_INCOMPAT_RECOVER	0x0004	ext2_fs.h
23826	EXT3_FEATURE_INCOMPAT_JOURNAL_D	0x0008	ext2_fs.h
23827	EXT2_FEATURE_INCOMPAT_ANY	0xffffffff	ext2_fs.h
23828	EXT2_FEATURE_COMPAT_SUPP	0	ext2_fs.h
23829	EXT2_FEATURE_INCOMPAT_SUPP	EXT2_FEATURE_INCOMPAT_FILETYPE	ext2_fs.h
23830	EXT2_FEATURE_RO_COMPAT_SUPP	(EXT2_FEATURE_RO_COMPAT_SPARSE_SUPER\| \ EXT2_FEATURE_RO_COMPAT_LARGE_FILE\| \ EXT2_FEATURE_RO_COMPAT_BTREE_DIR)	ext2_fs.h
23831	EXT2_FEATURE_RO_COMPAT_UNSUPPOR	~EXT2_FEATURE_RO_COMPAT_SUPP	ext2_fs.h
23832	EXT2_FEATURE_INCOMPAT_UNSUPPORT	~EXT2_FEATURE_INCOMPAT_SUPP	ext2_fs.h
23833	EXT2_DEF_RESUID	0	ext2_fs.h
23834	EXT2_DEF_RESGID	0	ext2_fs.h
23835	EXT2_NAME_LEN	255	ext2_fs.h
23836	EXT2_DIR_PAD	4	ext2_fs.h
23837	EXT2_DIR_ROUND	(EXT2_DIR_PAD - 1)	ext2_fs.h
23838	BASEMEM_PACKET_LEN	1514	basemem_packet.h
23839	basemem_packet	__use_data16 ( basemem_packet )	basemem_packet.h
23840	BDA_SEG	0x0040	bios.h
23841	BDA_FBMS	0x0013	bios.h
23842	BDA_NUM_DRIVES	0x0075	bios.h
23843	hooked_bios_interrupts	__use_text16 ( hooked_bios_interrupts )	biosint.h
23844	BIOS_DISK_MAX_NAME_LEN	6	bios_disks.h
23845	bochsbp	xchgw %bx, %bx	bochs.h
23846	BOCHSBP	bochsbp	bochs.h
23847	BZI_HDR_OFFSET	0x1f1	bzimage.h
23848	BZI_BOOT_FLAG	0xaa55	bzimage.h
23849	BZI_SIGNATURE	0x53726448	bzimage.h
23850	BZI_LOADER_TYPE_ETHERBOOT	0x40	bzimage.h
23851	BZI_LOADER_TYPE_GPXE	( BZI_LOADER_TYPE_ETHERBOOT \| 0x06 )	bzimage.h
23852	BZI_LOAD_HIGH	0x01	bzimage.h
23853	BZI_LOAD_HIGH_ADDR	0x100000	bzimage.h
23854	BZI_LOAD_LOW_ADDR	0x10000	bzimage.h
23855	BZI_CAN_USE_HEAP	0x80	bzimage.h
23856	BZI_VID_MODE_NORMAL	0xffff	bzimage.h
23857	BZI_VID_MODE_EXT	0xfffe	bzimage.h
23858	BZI_VID_MODE_ASK	0xfffd	bzimage.h
23859	BZI_INITRD_MAX	0x37ffffff	bzimage.h
23860	BZI_CMDLINE_OFFSET	0x20	bzimage.h
23861	BZI_CMDLINE_MAGIC	0xa33f	bzimage.h
23862	BZI_ASSUMED_RM_SIZE	0x8000	bzimage.h
23863	BZI_STACK_SIZE	0x1000	bzimage.h
23864	BZI_CMDLINE_SIZE	0x100	bzimage.h
23865	COMBOOT_PSP_SEG	0x07C0	comboot.h
23866	COM32_START_PHYS	0x101000	comboot.h
23867	COM32_BOUNCE_SEG	0x07C0	comboot.h
23868	COMBOOT_FILE_BLOCKSZ	512	comboot.h
23869	COMBOOT_FEATURE_LOCAL_BOOT	(1 << 0)	comboot.h
23870	COMBOOT_FEATURE_IDLE_LOOP	(1 << 1)	comboot.h
23871	COMBOOT_MAX_SHUFFLE_DESCRIPTORS	682	comboot.h
23872	COMBOOT_EXIT	1	comboot.h
23873	COMBOOT_EXIT_RUN_KERNEL	2	comboot.h
23874	COMBOOT_EXIT_COMMAND	3	comboot.h
23875	COMBOOT_VIDEO_GRAPHICS	0x01	comboot.h
23876	COMBOOT_VIDEO_NONSTANDARD	0x02	comboot.h
23877	COMBOOT_VIDEO_VESA	0x04	comboot.h
23878	COMBOOT_VIDEO_NOTEXT	0x08	comboot.h
23879	INT13_RESET	0x00	int13.h
23880	INT13_GET_LAST_STATUS	0x01	int13.h
23881	INT13_READ_SECTORS	0x02	int13.h
23882	INT13_WRITE_SECTORS	0x03	int13.h
23883	INT13_GET_PARAMETERS	0x08	int13.h
23884	INT13_GET_DISK_TYPE	0x15	int13.h
23885	INT13_EXTENSION_CHECK	0x41	int13.h
23886	INT13_EXTENDED_READ	0x42	int13.h
23887	INT13_EXTENDED_WRITE	0x43	int13.h
23888	INT13_GET_EXTENDED_PARAMETERS	0x48	int13.h
23889	INT13_CDROM_STATUS_TERMINATE	0x4b	int13.h
23890	INT13_STATUS_SUCCESS	0x00	int13.h
23891	INT13_STATUS_INVALID	0x01	int13.h
23892	INT13_STATUS_READ_ERROR	0x04	int13.h
23893	INT13_STATUS_WRITE_ERROR	0xcc	int13.h
23894	INT13_BLKSIZE	512	int13.h
23895	INT13_DISK_TYPE_NONE	0x00	int13.h
23896	INT13_DISK_TYPE_FDD	0x01	int13.h
23897	INT13_DISK_TYPE_FDD_CL	0x02	int13.h
23898	INT13_DISK_TYPE_HDD	0x03	int13.h
23899	INT13_FL_DMA_TRANSPARENT	0x01	int13.h
23900	INT13_FL_CHS_VALID	0x02	int13.h
23901	INT13_FL_REMOVABLE	0x04	int13.h
23902	INT13_FL_VERIFIABLE	0x08	int13.h
23903	INT13_FL_CHANGE_LINE	0x10	int13.h
23904	INT13_FL_LOCKABLE	0x20	int13.h
23905	INT13_FL_CHS_MAX	0x40	int13.h
23906	INT13_EXTENSION_LINEAR	0x01	int13.h
23907	INT13_EXTENSION_REMOVABLE	0x02	int13.h
23908	INT13_EXTENSION_EDD	0x04	int13.h
23909	INT13_EXTENSION_VER_1_X	0x01	int13.h
23910	INT13_EXTENSION_VER_2_0	0x20	int13.h
23911	INT13_EXTENSION_VER_2_1	0x21	int13.h
23912	INT13_EXTENSION_VER_3_0	0x30	int13.h
23913	code32	code16gcc	kir.h
23914	rm_cs	( _rm_cs() )	libkir.h
23915	rm_ds	( _rm_ds() )	libkir.h
23916	copy_to_real	copy_to_real_libkir	libkir.h
23917	copy_from_real	copy_from_real_libkir	libkir.h
23918	put_real	put_real_kir	libkir.h
23919	get_real	get_real_kir	libkir.h
23920	VIRTUAL_CS	0x08	librm.h
23921	VIRTUAL_DS	0x10	librm.h
23922	PHYSICAL_CS	0x18	librm.h
23923	PHYSICAL_DS	0x20	librm.h
23924	REAL_CS	0x28	librm.h
23925	REAL_DS	0x30	librm.h
23926	LONG_CS	0x38	librm.h
23927	LONG_DS	0x40	librm.h
23928	UACCESS_PREFIX_librm	__librm_	librm.h
23929	rm_cs	__use_data16 ( rm_cs )	librm.h
23930	rm_ds	__use_text16 ( rm_ds )	librm.h
23931	LIMITS_H	1	limits.h
23932	CHAR_BIT	8	limits.h
23933	SCHAR_MIN	(-128)	limits.h
23934	SCHAR_MAX	127	limits.h
23935	UCHAR_MAX	255	limits.h
23936	CHAR_MIN	SCHAR_MIN	limits.h
23937	CHAR_MAX	SCHAR_MAX	limits.h
23938	SHRT_MIN	(-32768)	limits.h
23939	SHRT_MAX	32767	limits.h
23940	USHRT_MAX	65535	limits.h
23941	INT_MIN	(-INT_MAX - 1)	limits.h
23942	INT_MAX	2147483647	limits.h
23943	UINT_MAX	4294967295U	limits.h
23944	INT_MAX	2147483647	limits.h
23945	INT_MIN	(-INT_MAX - 1)	limits.h
23946	UINT_MAX	4294967295U	limits.h
23947	LONG_MAX	2147483647	limits.h
23948	LONG_MIN	(-LONG_MAX - 1L)	limits.h
23949	ULONG_MAX	4294967295UL	limits.h
23950	LLONG_MAX	9223372036854775807LL	limits.h
23951	LLONG_MIN	(-LONG_MAX - 1LL)	limits.h
23952	ULLONG_MAX	18446744073709551615ULL	limits.h
23953	MULTIBOOT_HEADER_MAGIC	0x1BADB002	multiboot.h
23954	MB_FLAG_PGALIGN	0x00000001	multiboot.h
23955	MB_FLAG_MEMMAP	0x00000002	multiboot.h
23956	MB_FLAG_VIDMODE	0x00000004	multiboot.h
23957	MB_FLAG_RAW	0x00010000	multiboot.h
23958	MULTIBOOT_BOOTLOADER_MAGIC	0x2BADB002	multiboot.h
23959	MBI_FLAG_MEM	0x00000001	multiboot.h
23960	MBI_FLAG_BOOTDEV	0x00000002	multiboot.h
23961	MBI_FLAG_CMDLINE	0x00000004	multiboot.h
23962	MBI_FLAG_MODS	0x00000008	multiboot.h
23963	MBI_FLAG_AOUT	0x00000010	multiboot.h
23964	MBI_FLAG_ELF	0x00000020	multiboot.h
23965	MBI_FLAG_MMAP	0x00000040	multiboot.h
23966	MBI_FLAG_DRIVES	0x00000080	multiboot.h
23967	MBI_FLAG_CFGTBL	0x00000100	multiboot.h
23968	MBI_FLAG_LOADER	0x00000200	multiboot.h
23969	MBI_FLAG_APM	0x00000400	multiboot.h
23970	MBI_FLAG_VBE	0x00000800	multiboot.h
23971	MBMEM_RAM	1	multiboot.h
23972	IRQ_PIC_CUTOFF	8	pic8259.h
23973	PIC1_ICW1	0x20	pic8259.h
23974	PIC1_OCW2	0x20	pic8259.h
23975	PIC1_OCW3	0x20	pic8259.h
23976	PIC1_ICR	0x20	pic8259.h
23977	PIC1_IRR	0x20	pic8259.h
23978	PIC1_ISR	0x20	pic8259.h
23979	PIC1_ICW2	0x21	pic8259.h
23980	PIC1_ICW3	0x21	pic8259.h
23981	PIC1_ICW4	0x21	pic8259.h
23982	PIC1_IMR	0x21	pic8259.h
23983	PIC2_ICW1	0xa0	pic8259.h
23984	PIC2_OCW2	0xa0	pic8259.h
23985	PIC2_OCW3	0xa0	pic8259.h
23986	PIC2_ICR	0xa0	pic8259.h
23987	PIC2_IRR	0xa0	pic8259.h
23988	PIC2_ISR	0xa0	pic8259.h
23989	PIC2_ICW2	0xa1	pic8259.h
23990	PIC2_ICW3	0xa1	pic8259.h
23991	PIC2_ICW4	0xa1	pic8259.h
23992	PIC2_IMR	0xa1	pic8259.h
23993	OCW3_ID	0x08	pic8259.h
23994	OCW3_READ_IRR	0x03	pic8259.h
23995	OCW3_READ_ISR	0x02	pic8259.h
23996	ICR_EOI_NON_SPECIFIC	0x20	pic8259.h
23997	ICR_EOI_NOP	0x40	pic8259.h
23998	ICR_EOI_SPECIFIC	0x60	pic8259.h
23999	ICR_EOI_SET_PRIORITY	0xc0	pic8259.h
24000	CHAINED_IRQ	2	pic8259.h
24001	IRQ_MAX	15	pic8259.h
24002	IRQ_NONE	-1U	pic8259.h
24003	BIOS_SEG	0xf000	pnpbios.h
24004	ROM_SIGNATURE	0xaa55	pxe.h
24005	UNDI_ROM_ID_SIGNATURE	( ( 'U' << 0 ) + ( 'N' << 8 ) + ( 'D' << 16 ) + ( 'I' << 24 ) )	pxe.h
24006	PCIR_SIGNATURE	( ( 'P' << 0 ) + ( 'C' << 8 ) + ( 'I' << 16 ) + ( 'R' << 24 ) )	pxe.h
24007	PXENV_UNLOAD_STACK	0x0070	pxe_api.h
24008	PXENV_GET_CACHED_INFO	0x0071	pxe_api.h
24009	PXENV_PACKET_TYPE_DHCP_DISCOVER	1	pxe_api.h
24010	PXENV_PACKET_TYPE_DHCP_ACK	2	pxe_api.h
24011	PXENV_PACKET_TYPE_CACHED_REPLY	3	pxe_api.h
24012	BOOTP_REQ	1	pxe_api.h	*< A BOOTP request packet
24013	BOOTP_REP	2	pxe_api.h	*< A BOOTP reply packet
24014	BOOTP_BCAST	0x8000	pxe_api.h
24015	VM_RFC1048	0x63825363L	pxe_api.h	*< DHCP magic cookie
24016	BOOTP_DHCPVEND	1024	pxe_api.h
24017	PXENV_RESTART_TFTP	0x0073	pxe_api.h
24018	PXENV_START_UNDI	0x0000	pxe_api.h
24019	PXENV_STOP_UNDI	0x0015	pxe_api.h
24020	PXENV_START_BASE	0x0075	pxe_api.h
24021	PXENV_STOP_BASE	0x0076	pxe_api.h
24022	PXENV_TFTP_OPEN	0x0020	pxe_api.h
24023	PXENV_TFTP_CLOSE	0x0021	pxe_api.h
24024	PXENV_TFTP_READ	0x0022	pxe_api.h
24025	PXENV_TFTP_READ_FILE	0x0023	pxe_api.h
24026	PXENV_TFTP_GET_FSIZE	0x0025	pxe_api.h
24027	PXENV_UDP_OPEN	0x0030	pxe_api.h
24028	PXENV_UDP_CLOSE	0x0031	pxe_api.h
24029	PXENV_UDP_WRITE	0x0033	pxe_api.h
24030	PXENV_UDP_READ	0x0032	pxe_api.h
24031	PXENV_UNDI_STARTUP	0x0001	pxe_api.h
24032	PXENV_BUS_ISA	0	pxe_api.h	*< ISA bus type
24033	PXENV_BUS_EISA	1	pxe_api.h	*< EISA bus type
24034	PXENV_BUS_MCA	2	pxe_api.h	*< MCA bus type
24035	PXENV_BUS_PCI	3	pxe_api.h	*< PCI bus type
24036	PXENV_BUS_VESA	4	pxe_api.h	*< VESA bus type
24037	PXENV_BUS_PCMCIA	5	pxe_api.h	*< PCMCIA bus type
24038	PXENV_UNDI_CLEANUP	0x0002	pxe_api.h
24039	PXENV_UNDI_INITIALIZE	0x0003	pxe_api.h
24040	PXENV_UNDI_RESET_ADAPTER	0x0004	pxe_api.h
24041	MAXNUM_MCADDR	8	pxe_api.h
24042	PXENV_UNDI_SHUTDOWN	0x0005	pxe_api.h
24043	PXENV_UNDI_OPEN	0x0006	pxe_api.h
24044	FLTR_DIRECTED	0x0001	pxe_api.h
24045	FLTR_BRDCST	0x0002	pxe_api.h
24046	FLTR_PRMSCS	0x0004	pxe_api.h
24047	FLTR_SRC_RTG	0x0008	pxe_api.h
24048	PXENV_UNDI_CLOSE	0x0007	pxe_api.h
24049	PXENV_UNDI_TRANSMIT	0x0008	pxe_api.h
24050	P_UNKNOWN	0	pxe_api.h	*< Media header already filled in
24051	P_IP	1	pxe_api.h	*< IP protocol
24052	P_ARP	2	pxe_api.h	*< ARP protocol
24053	P_RARP	3	pxe_api.h	*< RARP protocol
24054	P_OTHER	4	pxe_api.h	*< Other protocol
24055	XMT_DESTADDR	0x0000	pxe_api.h	*< Unicast packet
24056	XMT_BROADCAST	0x0001	pxe_api.h	*< Broadcast packet
24057	MAX_DATA_BLKS	8	pxe_api.h
24058	PXENV_UNDI_SET_MCAST_ADDRESS	0x0009	pxe_api.h
24059	PXENV_UNDI_SET_STATION_ADDRESS	0x000a	pxe_api.h
24060	PXENV_UNDI_SET_PACKET_FILTER	0x000b	pxe_api.h
24061	PXENV_UNDI_GET_INFORMATION	0x000c	pxe_api.h
24062	ETHER_TYPE	1	pxe_api.h	*< Ethernet (10Mb)
24063	EXP_ETHER_TYPE	2	pxe_api.h	*< Experimental Ethernet (3Mb)
24064	AX25_TYPE	3	pxe_api.h	*< Amateur Radio AX.25
24065	TOKEN_RING_TYPE	4	pxe_api.h	*< Proteon ProNET Token Ring
24066	CHAOS_TYPE	5	pxe_api.h	*< Chaos
24067	IEEE_TYPE	6	pxe_api.h	*< IEEE 802 Networks
24068	ARCNET_TYPE	7	pxe_api.h	*< ARCNET
24069	PXENV_UNDI_GET_STATISTICS	0x000d	pxe_api.h
24070	PXENV_UNDI_CLEAR_STATISTICS	0x000e	pxe_api.h
24071	PXENV_UNDI_INITIATE_DIAGS	0x000f	pxe_api.h
24072	PXENV_UNDI_FORCE_INTERRUPT	0x0010	pxe_api.h
24073	PXENV_UNDI_GET_MCAST_ADDRESS	0x0011	pxe_api.h
24074	PXENV_UNDI_GET_NIC_TYPE	0x0012	pxe_api.h
24075	PCI_NIC	2	pxe_api.h	*< PCI network card
24076	PnP_NIC	3	pxe_api.h	*< ISAPnP network card
24077	CardBus_NIC	4	pxe_api.h	*< CardBus network card
24078	PXENV_UNDI_GET_IFACE_INFO	0x0013	pxe_api.h
24079	SUPPORTED_BROADCAST	0x0001	pxe_api.h
24080	SUPPORTED_MULTICAST	0x0002	pxe_api.h
24081	SUPPORTED_GROUP	0x0004	pxe_api.h
24082	SUPPORTED_PROMISCUOUS	0x0008	pxe_api.h
24083	SUPPORTED_SET_STATION_ADDRESS	0x0010	pxe_api.h
24084	SUPPORTED_DIAGNOSTICS	0x0040	pxe_api.h
24085	SUPPORTED_RESET	0x0400	pxe_api.h
24086	SUPPORTED_OPEN_CLOSE	0x0800	pxe_api.h
24087	SUPPORTED_IRQ	0x1000	pxe_api.h
24088	PXENV_UNDI_GET_STATE	0x0015	pxe_api.h
24089	PXE_UNDI_GET_STATE_STARTED	1	pxe_api.h
24090	PXE_UNDI_GET_STATE_INITIALIZED	2	pxe_api.h
24091	PXE_UNDI_GET_STATE_OPENED	3	pxe_api.h
24092	PXENV_UNDI_ISR	0x0014	pxe_api.h
24093	PXENV_UNDI_ISR_IN_START	1	pxe_api.h
24094	PXENV_UNDI_ISR_IN_PROCESS	2	pxe_api.h
24095	PXENV_UNDI_ISR_IN_GET_NEXT	3	pxe_api.h
24096	PXENV_UNDI_ISR_OUT_OURS	0	pxe_api.h
24097	PXENV_UNDI_ISR_OUT_NOT_OURS	1	pxe_api.h
24098	PXENV_UNDI_ISR_OUT_DONE	0	pxe_api.h
24099	PXENV_UNDI_ISR_OUT_TRANSMIT	2	pxe_api.h
24100	PXENV_UNDI_ISR_OUT_RECEIVE	3	pxe_api.h
24101	PXENV_UNDI_ISR_OUT_BUSY	4	pxe_api.h
24102	P_DIRECTED	0	pxe_api.h
24103	P_BROADCAST	1	pxe_api.h
24104	P_MULTICAST	2	pxe_api.h
24105	PXENV_FILE_OPEN	0x00e0	pxe_api.h
24106	PXENV_FILE_CLOSE	0x00e1	pxe_api.h
24107	PXENV_FILE_SELECT	0x00e2	pxe_api.h
24108	RDY_READ	0x0001	pxe_api.h
24109	PXENV_FILE_READ	0x00e3	pxe_api.h
24110	PXENV_GET_FILE_SIZE	0x00e4	pxe_api.h
24111	PXENV_FILE_EXEC	0x00e5	pxe_api.h
24112	PXENV_FILE_API_CHECK	0x00e6	pxe_api.h
24113	PXENV_FILE_EXIT_HOOK	0x00e7	pxe_api.h
24114	PXE_LOAD_SEGMENT	0	pxe_call.h
24115	PXE_LOAD_OFFSET	0x7c00	pxe_call.h
24116	PXE_LOAD_PHYS	( ( PXE_LOAD_SEGMENT << 4 ) + PXE_LOAD_OFFSET )	pxe_call.h
24117	ppxe	__use_text16 ( ppxe )	pxe_call.h
24118	pxenv	__use_text16 ( pxenv )	pxe_call.h
24119	PXENV_EXIT_SUCCESS	0x0000	pxe_types.h	*< No error occurred
24120	PXENV_EXIT_FAILURE	0x0001	pxe_types.h	*< An error occurred
24121	MAC_ADDR_LEN	16	pxe_types.h
24122	CF	( 1 << 0 )	registers.h
24123	PF	( 1 << 2 )	registers.h
24124	AF	( 1 << 4 )	registers.h
24125	ZF	( 1 << 6 )	registers.h
24126	SF	( 1 << 7 )	registers.h
24127	OF	( 1 << 11 )	registers.h
24128	UNDI_NO_PCI_BUSDEVFN	0xffff	undi.h
24129	UNDI_NO_ISAPNP_CSN	0xffff	undi.h
24130	UNDI_NO_ISAPNP_READ_PORT	0xffff	undi.h
24131	UNDI_FL_STARTED	0x0001	undi.h
24132	UNDI_FL_INITIALIZED	0x0002	undi.h
24133	UNDI_FL_KEEP_ALL	0x0004	undi.h
24134	preloaded_undi	__use_data16 ( preloaded_undi )	undipreload.h
24135	VGA_H_INCL	1	vga.h
24136	u8	unsigned char	vga.h
24137	u16	unsigned short	vga.h
24138	u32	unsigned int	vga.h
24139	__u32	u32	vga.h
24140	VERROR	-1	vga.h
24141	CHAR_HEIGHT	16	vga.h
24142	LINES	25	vga.h
24143	COLS	80	vga.h
24144	SYNC_HOR_HIGH_ACT	1	vga.h	horizontal sync high active
24145	SYNC_VERT_HIGH_ACT	2	vga.h	vertical sync high active
24146	SYNC_EXT	4	vga.h	external sync
24147	SYNC_COMP_HIGH_ACT	8	vga.h	composite sync high active
24148	SYNC_BROADCAST	16	vga.h	broadcast video timings
24149	SYNC_ON_GREEN	32	vga.h	sync on green
24150	VMODE_NONINTERLACED	0	vga.h	non interlaced
24151	VMODE_INTERLACED	1	vga.h	interlaced
24152	VMODE_DOUBLE	2	vga.h	double scan
24153	VMODE_MASK	255	vga.h
24154	VMODE_YWRAP	256	vga.h	ywrap instead of panning
24155	VMODE_SMOOTH_XPAN	512	vga.h	smooth xpan possible (internally used)
24156	VMODE_CONUPDATE	512	vga.h	don't update x/yoffset
24157	CRT_DC	0x3D5	vga.h	CRT Controller Data Register - color emulation
24158	CRT_DM	0x3B5	vga.h	CRT Controller Data Register - mono emulation
24159	ATT_R	0x3C1	vga.h	Attribute Controller Data Read Register
24160	GRA_D	0x3CF	vga.h	Graphics Controller Data Register
24161	SEQ_D	0x3C5	vga.h	Sequencer Data Register
24162	MIS_R	0x3CC	vga.h	Misc Output Read Register
24163	MIS_W	0x3C2	vga.h	Misc Output Write Register
24164	IS1_RC	0x3DA	vga.h	Input Status Register 1 - color emulation
24165	IS1_RM	0x3BA	vga.h	Input Status Register 1 - mono emulation
24166	PEL_D	0x3C9	vga.h	PEL Data Register
24167	PEL_MSK	0x3C6	vga.h	PEL mask register
24168	GRA_E0	0x3CC	vga.h	Graphics enable processor 0
24169	GRA_E1	0x3CA	vga.h	Graphics enable processor 1
24170	CRT_IC	0x3D4	vga.h	CRT Controller Index - color emulation
24171	CRT_IM	0x3B4	vga.h	CRT Controller Index - mono emulation
24172	ATT_IW	0x3C0	vga.h	Attribute Controller Index & Data Write Register
24173	GRA_I	0x3CE	vga.h	Graphics Controller Index
24174	SEQ_I	0x3C4	vga.h	Sequencer Index
24175	PEL_IW	0x3C8	vga.h	PEL Write Index
24176	PEL_IR	0x3C7	vga.h	PEL Read Index
24177	CRTC_C	25	vga.h	25 CRT Controller Registers sequentially set
24178	ATT_C	21	vga.h	21 Attribute Controller Registers
24179	GRA_C	9	vga.h	9 Graphics Controller Registers
24180	SEQ_C	5	vga.h	5 Sequencer Registers
24181	MIS_C	1	vga.h	1 Misc Output Register
24182	CRTC_H_TOTAL	0	vga.h
24183	CRTC_H_DISP	1	vga.h
24184	CRTC_H_BLANK_START	2	vga.h
24185	CRTC_H_BLANK_END	3	vga.h
24186	CRTC_H_SYNC_START	4	vga.h
24187	CRTC_H_SYNC_END	5	vga.h
24188	CRTC_V_TOTAL	6	vga.h
24189	CRTC_OVERFLOW	7	vga.h
24190	CRTC_PRESET_ROW	8	vga.h
24191	CRTC_MAX_SCAN	9	vga.h
24192	CRTC_CURSOR_START	0x0A	vga.h
24193	CRTC_CURSOR_END	0x0B	vga.h
24194	CRTC_START_HI	0x0C	vga.h
24195	CRTC_START_LO	0x0D	vga.h
24196	CRTC_CURSOR_HI	0x0E	vga.h
24197	CRTC_CURSOR_LO	0x0F	vga.h
24198	CRTC_V_SYNC_START	0x10	vga.h
24199	CRTC_V_SYNC_END	0x11	vga.h
24200	CRTC_V_DISP_END	0x12	vga.h
24201	CRTC_OFFSET	0x13	vga.h
24202	CRTC_UNDERLINE	0x14	vga.h
24203	CRTC_V_BLANK_START	0x15	vga.h
24204	CRTC_V_BLANK_END	0x16	vga.h
24205	CRTC_MODE	0x17	vga.h
24206	CRTC_LINE_COMPARE	0x18	vga.h
24207	ATC_MODE	0x10	vga.h
24208	ATC_OVERSCAN	0x11	vga.h
24209	ATC_PLANE_ENABLE	0x12	vga.h
24210	ATC_PEL	0x13	vga.h
24211	ATC_COLOR_PAGE	0x14	vga.h
24212	SEQ_CLOCK_MODE	0x01	vga.h
24213	SEQ_PLANE_WRITE	0x02	vga.h
24214	SEQ_CHARACTER_MAP	0x03	vga.h
24215	SEQ_MEMORY_MODE	0x04	vga.h
24216	GDC_SR_VALUE	0x00	vga.h
24217	GDC_SR_ENABLE	0x01	vga.h
24218	GDC_COMPARE_VALUE	0x02	vga.h
24219	GDC_DATA_ROTATE	0x03	vga.h
24220	GDC_PLANE_READ	0x04	vga.h
24221	GDC_MODE	0x05	vga.h
24222	GDC_MISC	0x06	vga.h
24223	GDC_COMPARE_MASK	0x07	vga.h
24224	GDC_BIT_MASK	0x08	vga.h
24225	VGA_ATTR_CLR_RED	0x4	vga.h
24226	VGA_ATTR_CLR_GRN	0x2	vga.h
24227	VGA_ATTR_CLR_BLU	0x1	vga.h
24228	VGA_ATTR_CLR_YEL	(VGA_ATTR_CLR_RED \| VGA_ATTR_CLR_GRN)	vga.h
24229	VGA_ATTR_CLR_CYN	(VGA_ATTR_CLR_GRN \| VGA_ATTR_CLR_BLU)	vga.h
24230	VGA_ATTR_CLR_MAG	(VGA_ATTR_CLR_BLU \| VGA_ATTR_CLR_RED)	vga.h
24231	VGA_ATTR_CLR_BLK	0	vga.h
24232	VGA_ATTR_CLR_WHT	(VGA_ATTR_CLR_RED \| VGA_ATTR_CLR_GRN \| VGA_ATTR_CLR_BLU)	vga.h
24233	VGA_ATTR_BNK	0x80	vga.h
24234	VGA_ATTR_ITN	0x08	vga.h
24235	__asmcall	__attribute__ (( cdecl, regparm(0) ))	compiler.h
24236	__libgcc	__attribute__ (( cdecl ))	compiler.h
24237	X86_FEATURE_FPU	0	cpu.h	Onboard FPU
24238	X86_FEATURE_VME	1	cpu.h	Virtual Mode Extensions
24239	X86_FEATURE_DE	2	cpu.h	Debugging Extensions
24240	X86_FEATURE_PSE	3	cpu.h	Page Size Extensions
24241	X86_FEATURE_TSC	4	cpu.h	Time Stamp Counter
24242	X86_FEATURE_MSR	5	cpu.h	Model-Specific Registers, RDMSR, WRMSR
24243	X86_FEATURE_PAE	6	cpu.h	Physical Address Extensions
24244	X86_FEATURE_MCE	7	cpu.h	Machine Check Architecture
24245	X86_FEATURE_CX8	8	cpu.h	CMPXCHG8 instruction
24246	X86_FEATURE_APIC	9	cpu.h	Onboard APIC
24247	X86_FEATURE_SEP	11	cpu.h	SYSENTER/SYSEXIT
24248	X86_FEATURE_MTRR	12	cpu.h	Memory Type Range Registers
24249	X86_FEATURE_PGE	13	cpu.h	Page Global Enable
24250	X86_FEATURE_MCA	14	cpu.h	Machine Check Architecture
24251	X86_FEATURE_CMOV	15	cpu.h	CMOV instruction (FCMOVCC and FCOMI too if FPU present)
24252	X86_FEATURE_PAT	16	cpu.h	Page Attribute Table
24253	X86_FEATURE_PSE36	17	cpu.h	36-bit PSEs
24254	X86_FEATURE_PN	18	cpu.h	Processor serial number
24255	X86_FEATURE_CLFLSH	19	cpu.h	Supports the CLFLUSH instruction
24256	X86_FEATURE_DTES	21	cpu.h	Debug Trace Store
24257	X86_FEATURE_ACPI	22	cpu.h	ACPI via MSR
24258	X86_FEATURE_MMX	23	cpu.h	Multimedia Extensions
24259	X86_FEATURE_FXSR	24	cpu.h	FXSAVE and FXRSTOR instructions (fast save and restore
24260	X86_FEATURE_XMM	25	cpu.h	Streaming SIMD Extensions
24261	X86_FEATURE_XMM2	26	cpu.h	Streaming SIMD Extensions-2
24262	X86_FEATURE_SELFSNOOP	27	cpu.h	CPU self snoop
24263	X86_FEATURE_HT	28	cpu.h	Hyper-Threading
24264	X86_FEATURE_ACC	29	cpu.h	Automatic clock control
24265	X86_FEATURE_IA64	30	cpu.h	IA-64 processor
24266	X86_FEATURE_SYSCALL	11	cpu.h	SYSCALL/SYSRET
24267	X86_FEATURE_MMXEXT	22	cpu.h	AMD MMX extensions
24268	X86_FEATURE_LM	29	cpu.h	Long Mode (x86-64)
24269	X86_FEATURE_3DNOWEXT	30	cpu.h	AMD 3DNow! extensions
24270	X86_FEATURE_3DNOW	31	cpu.h	3DNow!
24271	X86_EFLAGS_CF	0x00000001	cpu.h	Carry Flag
24272	X86_EFLAGS_PF	0x00000004	cpu.h	Parity Flag
24273	X86_EFLAGS_AF	0x00000010	cpu.h	Auxillary carry Flag
24274	X86_EFLAGS_ZF	0x00000040	cpu.h	Zero Flag
24275	X86_EFLAGS_SF	0x00000080	cpu.h	Sign Flag
24276	X86_EFLAGS_TF	0x00000100	cpu.h	Trap Flag
24277	X86_EFLAGS_IF	0x00000200	cpu.h	Interrupt Flag
24278	X86_EFLAGS_DF	0x00000400	cpu.h	Direction Flag
24279	X86_EFLAGS_OF	0x00000800	cpu.h	Overflow Flag
24280	X86_EFLAGS_IOPL	0x00003000	cpu.h	IOPL mask
24281	X86_EFLAGS_NT	0x00004000	cpu.h	Nested Task
24282	X86_EFLAGS_RF	0x00010000	cpu.h	Resume Flag
24283	X86_EFLAGS_VM	0x00020000	cpu.h	Virtual Mode
24284	X86_EFLAGS_AC	0x00040000	cpu.h	Alignment Check
24285	X86_EFLAGS_VIF	0x00080000	cpu.h	Virtual Interrupt Flag
24286	X86_EFLAGS_VIP	0x00100000	cpu.h	Virtual Interrupt Pending
24287	X86_EFLAGS_ID	0x00200000	cpu.h	CPUID detection flag
24288	ELTORITO_PLATFORM	ELTORITO_PLATFORM_X86	eltorito.h
24289	__BYTE_ORDER	__LITTLE_ENDIAN	endian.h
24290	ERRFILE_memtop_umalloc	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00000000 )	errfile.h
24291	ERRFILE_memmap	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00010000 )	errfile.h
24292	ERRFILE_pnpbios	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00020000 )	errfile.h
24293	ERRFILE_bios_smbios	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00030000 )	errfile.h
24294	ERRFILE_biosint	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00040000 )	errfile.h
24295	ERRFILE_int13	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00050000 )	errfile.h
24296	ERRFILE_pxeparent	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00060000 )	errfile.h
24297	ERRFILE_bootsector	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00000000 )	errfile.h
24298	ERRFILE_bzimage	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00010000 )	errfile.h
24299	ERRFILE_eltorito	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00020000 )	errfile.h
24300	ERRFILE_multiboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00030000 )	errfile.h
24301	ERRFILE_nbi	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00040000 )	errfile.h
24302	ERRFILE_pxe_image	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00050000 )	errfile.h
24303	ERRFILE_elfboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00060000 )	errfile.h
24304	ERRFILE_comboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00070000 )	errfile.h
24305	ERRFILE_com32	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00080000 )	errfile.h
24306	ERRFILE_comboot_resolv	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00090000 )	errfile.h
24307	ERRFILE_comboot_call	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x000a0000 )	errfile.h
24308	ERRFILE_undi	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00000000 )	errfile.h
24309	ERRFILE_undiload	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00010000 )	errfile.h
24310	ERRFILE_undinet	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00020000 )	errfile.h
24311	ERRFILE_undionly	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00030000 )	errfile.h
24312	ERRFILE_undirom	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00040000 )	errfile.h
24313	ERRFILE_timer_rdtsc	( ERRFILE_ARCH \| ERRFILE_DRIVER \| 0x00000000 )	errfile.h
24314	ERRFILE_timer_bios	( ERRFILE_ARCH \| ERRFILE_DRIVER \| 0x00010000 )	errfile.h
24315	ABFT_SIG	"aBFT"	abft.h
24316	NAP_PREFIX_pcbios	__pcbios_	bios_nap.h
24317	SMBIOS_PREFIX_pcbios	__pcbios_	bios_smbios.h
24318	TIMER_PREFIX_pcbios	__pcbios_	bios_timer.h
24319	IBFT_SIG	"iBFT"	ibft.h
24320	IBFT_STRUCTURE_ID_CONTROL	0x01	ibft.h
24321	IBFT_FL_CONTROL_SINGLE_LOGIN_ON	0x01	ibft.h
24322	IBFT_STRUCTURE_ID_INITIATOR	0x02	ibft.h
24323	IBFT_FL_INITIATOR_BLOCK_VALID	0x01	ibft.h
24324	IBFT_FL_INITIATOR_FIRMWARE_BOOT	0x02	ibft.h
24325	IBFT_STRUCTURE_ID_NIC	0x03	ibft.h
24326	IBFT_FL_NIC_BLOCK_VALID	0x01	ibft.h
24327	IBFT_FL_NIC_FIRMWARE_BOOT_SELEC	0x02	ibft.h
24328	IBFT_FL_NIC_GLOBAL	0x04	ibft.h
24329	IBFT_STRUCTURE_ID_TARGET	0x04	ibft.h
24330	IBFT_FL_TARGET_BLOCK_VALID	0x01	ibft.h
24331	IBFT_FL_TARGET_FIRMWARE_BOOT_SE	0x02	ibft.h
24332	IBFT_FL_TARGET_USE_CHAP	0x04	ibft.h
24333	IBFT_FL_TARGET_USE_RCHAP	0x08	ibft.h
24334	IBFT_CHAP_NONE	0	ibft.h	*< No CHAP authentication
24335	IBFT_CHAP_ONE_WAY	1	ibft.h	*< One-way CHAP
24336	IBFT_CHAP_MUTUAL	2	ibft.h	*< Mutual CHAP
24337	IBFT_STRINGS_SIZE	384	ibft.h
24338	UMALLOC_PREFIX_memtop	__memtop_	memtop_umalloc.h
24339	TIMER_PREFIX_rdtsc	__rdtsc_	rdtsc_timer.h
24340	TSC_SHIFT	8	rdtsc_timer.h
24341	SBFT_SIG	"sBFT"	sbft.h
24342	IOAPI_PREFIX_x86	__x86_	x86_io.h
24343	PCIAPI_PREFIX_pcbios	__pcbios_	pcibios.h
24344	PCIBIOS_INSTALLATION_CHECK	0xb1010000	pcibios.h
24345	PCIBIOS_READ_CONFIG_BYTE	0xb1080000	pcibios.h
24346	PCIBIOS_READ_CONFIG_WORD	0xb1090000	pcibios.h
24347	PCIBIOS_READ_CONFIG_DWORD	0xb10a0000	pcibios.h
24348	PCIBIOS_WRITE_CONFIG_BYTE	0xb10b0000	pcibios.h
24349	PCIBIOS_WRITE_CONFIG_WORD	0xb10c0000	pcibios.h
24350	PCIBIOS_WRITE_CONFIG_DWORD	0xb10d0000	pcibios.h
24351	PCIAPI_PREFIX_direct	__direct_	pcidirect.h
24352	PCIDIRECT_CONFIG_ADDRESS	0xcf8	pcidirect.h
24353	PCIDIRECT_CONFIG_DATA	0xcfc	pcidirect.h
24354	NAP_PREFIX_efix86	__efix86_	efix86_nap.h
24355	LIMITS_H	1	limits.h
24356	CHAR_BIT	8	limits.h
24357	SCHAR_MIN	(-128)	limits.h
24358	SCHAR_MAX	127	limits.h
24359	UCHAR_MAX	255	limits.h
24360	CHAR_MIN	SCHAR_MIN	limits.h
24361	CHAR_MAX	SCHAR_MAX	limits.h
24362	SHRT_MIN	(-32768)	limits.h
24363	SHRT_MAX	32767	limits.h
24364	USHRT_MAX	65535	limits.h
24365	INT_MIN	(-INT_MAX - 1)	limits.h
24366	INT_MAX	2147483647	limits.h
24367	UINT_MAX	4294967295U	limits.h
24368	INT_MAX	2147483647	limits.h
24369	INT_MIN	(-INT_MAX - 1)	limits.h
24370	UINT_MAX	4294967295U	limits.h
24371	LONG_MAX	9223372036854775807L	limits.h
24372	LONG_MIN	(-LONG_MAX - 1L)	limits.h
24373	ULONG_MAX	18446744073709551615UL	limits.h
24374	LLONG_MAX	9223372036854775807LL	limits.h
24375	LLONG_MIN	(-LONG_MAX - 1LL)	limits.h
24376	ULLONG_MAX	18446744073709551615ULL	limits.h
24377	__asmcall	__attribute__ (( regparm(0) ))	compiler.h
24378	__BYTE_ORDER	__LITTLE_ENDIAN	endian.h
24379	PRODUCT_NAME	""	general.h
24380	PRODUCT_SHORT_NAME	"gPXE"	general.h
24381	BANNER_TIMEOUT	0	general.h	Tenths of a second for which the shell
24382	COM1	0x3f8	serial.h
24383	COM2	0x2f8	serial.h
24384	COM3	0x3e8	serial.h
24385	COM4	0x2e8	serial.h
24386	COMCONSOLE	COM1	serial.h	I/O port address
24387	COMSPEED	115200	serial.h	Baud rate
24388	COMDATA	8	serial.h	Data bits
24389	COMPARITY	0	serial.h	Parity: 0=None, 1=Odd, 2=Even
24390	COMSTOP	1	serial.h	Stop bits
24391	BIGINT_M_OFFSET	0	bigint_impl.h	*< Normal modulo offset.
24392	BIGINT_P_OFFSET	1	bigint_impl.h	*< p modulo offset.
24393	BIGINT_Q_OFFSET	2	bigint_impl.h	*< q module offset.
24394	BIGINT_NUM_MODS	3	bigint_impl.h	*< The number of modulus constants used.
24395	BIGINT_NUM_MODS	1	bigint_impl.h
24396	COMP_RADIX	4294967296i64	bigint_impl.h
24397	COMP_BIG_MSB	0x8000000000000000i64	bigint_impl.h
24398	COMP_RADIX	4294967296ULL	bigint_impl.h	*< Max component + 1
24399	COMP_BIG_MSB	0x8000000000000000ULL	bigint_impl.h	*< (Max dbl comp + 1)/ 2
24400	COMP_BIT_SIZE	32	bigint_impl.h	*< Number of bits in a component.
24401	COMP_BYTE_SIZE	4	bigint_impl.h	*< Number of bytes in a component.
24402	COMP_NUM_NIBBLES	8	bigint_impl.h	*< Used For diagnostics only.
24403	PERMANENT	0x7FFF55AA	bigint_impl.h	*< A magic number for permanents.
24404	V1	v->comps[v->size-1]	bigint_impl.h	*< v1 for division
24405	V2	v->comps[v->size-2]	bigint_impl.h	*< v2 for division
24406	CONFIG_SSL_CERT_VERIFICATION	1	os_port.h
24407	CONFIG_SSL_MAX_CERTS	1	os_port.h
24408	CONFIG_X509_MAX_CA_CERTS	1	os_port.h
24409	CONFIG_SSL_EXPIRY_TIME	24	os_port.h
24410	CONFIG_SSL_ENABLE_CLIENT	1	os_port.h
24411	CONFIG_BIGINT_CLASSICAL	1	os_port.h
24412	ARBEL_NUM_PORTS	2	arbel.h
24413	ARBEL_PORT_BASE	1	arbel.h
24414	ARBEL_PCI_CONFIG_BAR	PCI_BASE_ADDRESS_0	arbel.h
24415	ARBEL_PCI_CONFIG_BAR_SIZE	0x100000	arbel.h
24416	ARBEL_PCI_UAR_BAR	PCI_BASE_ADDRESS_2	arbel.h
24417	ARBEL_PCI_UAR_IDX	1	arbel.h
24418	ARBEL_PCI_UAR_SIZE	0x1000	arbel.h
24419	ARBEL_UAR_RES_NONE	0x00	arbel.h
24420	ARBEL_UAR_RES_CQ_CI	0x01	arbel.h
24421	ARBEL_UAR_RES_CQ_ARM	0x02	arbel.h
24422	ARBEL_UAR_RES_SQ	0x03	arbel.h
24423	ARBEL_UAR_RES_RQ	0x04	arbel.h
24424	ARBEL_UAR_RES_GROUP_SEP	0x07	arbel.h
24425	ARBEL_OPCODE_SEND	0x0a	arbel.h
24426	ARBEL_OPCODE_RECV_ERROR	0xfe	arbel.h
24427	ARBEL_OPCODE_SEND_ERROR	0xff	arbel.h
24428	ARBEL_HCR_QUERY_DEV_LIM	0x0003	arbel.h
24429	ARBEL_HCR_QUERY_FW	0x0004	arbel.h
24430	ARBEL_HCR_INIT_HCA	0x0007	arbel.h
24431	ARBEL_HCR_CLOSE_HCA	0x0008	arbel.h
24432	ARBEL_HCR_INIT_IB	0x0009	arbel.h
24433	ARBEL_HCR_CLOSE_IB	0x000a	arbel.h
24434	ARBEL_HCR_SW2HW_MPT	0x000d	arbel.h
24435	ARBEL_HCR_MAP_EQ	0x0012	arbel.h
24436	ARBEL_HCR_SW2HW_EQ	0x0013	arbel.h
24437	ARBEL_HCR_HW2SW_EQ	0x0014	arbel.h
24438	ARBEL_HCR_SW2HW_CQ	0x0016	arbel.h
24439	ARBEL_HCR_HW2SW_CQ	0x0017	arbel.h
24440	ARBEL_HCR_RST2INIT_QPEE	0x0019	arbel.h
24441	ARBEL_HCR_INIT2RTR_QPEE	0x001a	arbel.h
24442	ARBEL_HCR_RTR2RTS_QPEE	0x001b	arbel.h
24443	ARBEL_HCR_RTS2RTS_QPEE	0x001c	arbel.h
24444	ARBEL_HCR_2RST_QPEE	0x0021	arbel.h
24445	ARBEL_HCR_MAD_IFC	0x0024	arbel.h
24446	ARBEL_HCR_READ_MGM	0x0025	arbel.h
24447	ARBEL_HCR_WRITE_MGM	0x0026	arbel.h
24448	ARBEL_HCR_MGID_HASH	0x0027	arbel.h
24449	ARBEL_HCR_RUN_FW	0x0ff6	arbel.h
24450	ARBEL_HCR_DISABLE_LAM	0x0ff7	arbel.h
24451	ARBEL_HCR_ENABLE_LAM	0x0ff8	arbel.h
24452	ARBEL_HCR_UNMAP_ICM	0x0ff9	arbel.h
24453	ARBEL_HCR_MAP_ICM	0x0ffa	arbel.h
24454	ARBEL_HCR_UNMAP_ICM_AUX	0x0ffb	arbel.h
24455	ARBEL_HCR_MAP_ICM_AUX	0x0ffc	arbel.h
24456	ARBEL_HCR_SET_ICM_SIZE	0x0ffd	arbel.h
24457	ARBEL_HCR_UNMAP_FA	0x0ffe	arbel.h
24458	ARBEL_HCR_MAP_FA	0x0fff	arbel.h
24459	ARBEL_ST_UD	0x03	arbel.h
24460	ARBEL_MTU_2048	0x04	arbel.h
24461	ARBEL_NO_EQ	64	arbel.h
24462	ARBEL_INVALID_LKEY	0x00000100UL	arbel.h
24463	ARBEL_PAGE_SIZE	4096	arbel.h
24464	ARBEL_DB_POST_SND_OFFSET	0x10	arbel.h
24465	ARBEL_QPEE_OPT_PARAM_QKEY	0x00000020UL	arbel.h
24466	ARBEL_MAP_EQ	( 0UL << 31 )	arbel.h
24467	ARBEL_UNMAP_EQ	( 1UL << 31 )	arbel.h
24468	ARBEL_EV_PORT_STATE_CHANGE	0x09	arbel.h
24469	ARBEL_MAX_GATHER	1	arbel.h
24470	ARBEL_MAX_SCATTER	1	arbel.h
24471	ARBEL_SEND_WQE_ALIGN	128	arbel.h
24472	ARBEL_RECV_WQE_ALIGN	64	arbel.h
24473	ARBEL_MAX_QPS	8	arbel.h
24474	ARBEL_QPN_BASE	0x550000	arbel.h
24475	ARBEL_MAX_CQS	8	arbel.h
24476	ARBEL_MAX_EQS	64	arbel.h
24477	ARBEL_NUM_EQES	4	arbel.h
24478	ARBEL_GLOBAL_PD	0x123456	arbel.h
24479	ARBEL_MKEY_PREFIX	0x77000000UL	arbel.h
24480	ARBEL_HCR_BASE	0x80680	arbel.h
24481	ARBEL_HCR_MAX_WAIT_MS	2000	arbel.h
24482	ARBEL_MBOX_ALIGN	4096	arbel.h
24483	ARBEL_MBOX_SIZE	512	arbel.h
24484	ARBEL_HCR_IN_MBOX	0x00001000UL	arbel.h
24485	ARBEL_HCR_OUT_MBOX	0x00002000UL	arbel.h
24486	ARBEL_MAX_DOORBELL_RECORDS	512	arbel.h
24487	ARBEL_GROUP_SEPARATOR_DOORBELL	( ARBEL_MAX_CQS + ARBEL_MAX_QPS )	arbel.h
24488	HERMON_MAX_PORTS	2	hermon.h
24489	HERMON_PORT_BASE	1	hermon.h
24490	HERMON_PCI_CONFIG_BAR	PCI_BASE_ADDRESS_0	hermon.h
24491	HERMON_PCI_CONFIG_BAR_SIZE	0x100000	hermon.h
24492	HERMON_PCI_UAR_BAR	PCI_BASE_ADDRESS_2	hermon.h
24493	HERMON_RESET_OFFSET	0x0f0010	hermon.h
24494	HERMON_RESET_MAGIC	0x01000000UL	hermon.h
24495	HERMON_RESET_WAIT_TIME_MS	1000	hermon.h
24496	HERMON_OPCODE_NOP	0x00	hermon.h
24497	HERMON_OPCODE_SEND	0x0a	hermon.h
24498	HERMON_OPCODE_RECV_ERROR	0xfe	hermon.h
24499	HERMON_OPCODE_SEND_ERROR	0xff	hermon.h
24500	HERMON_HCR_QUERY_DEV_CAP	0x0003	hermon.h
24501	HERMON_HCR_QUERY_FW	0x0004	hermon.h
24502	HERMON_HCR_INIT_HCA	0x0007	hermon.h
24503	HERMON_HCR_CLOSE_HCA	0x0008	hermon.h
24504	HERMON_HCR_INIT_PORT	0x0009	hermon.h
24505	HERMON_HCR_CLOSE_PORT	0x000a	hermon.h
24506	HERMON_HCR_SW2HW_MPT	0x000d	hermon.h
24507	HERMON_HCR_WRITE_MTT	0x0011	hermon.h
24508	HERMON_HCR_MAP_EQ	0x0012	hermon.h
24509	HERMON_HCR_SW2HW_EQ	0x0013	hermon.h
24510	HERMON_HCR_HW2SW_EQ	0x0014	hermon.h
24511	HERMON_HCR_QUERY_EQ	0x0015	hermon.h
24512	HERMON_HCR_SW2HW_CQ	0x0016	hermon.h
24513	HERMON_HCR_HW2SW_CQ	0x0017	hermon.h
24514	HERMON_HCR_RST2INIT_QP	0x0019	hermon.h
24515	HERMON_HCR_INIT2RTR_QP	0x001a	hermon.h
24516	HERMON_HCR_RTR2RTS_QP	0x001b	hermon.h
24517	HERMON_HCR_RTS2RTS_QP	0x001c	hermon.h
24518	HERMON_HCR_2RST_QP	0x0021	hermon.h
24519	HERMON_HCR_QUERY_QP	0x0022	hermon.h
24520	HERMON_HCR_CONF_SPECIAL_QP	0x0023	hermon.h
24521	HERMON_HCR_MAD_IFC	0x0024	hermon.h
24522	HERMON_HCR_READ_MCG	0x0025	hermon.h
24523	HERMON_HCR_WRITE_MCG	0x0026	hermon.h
24524	HERMON_HCR_MGID_HASH	0x0027	hermon.h
24525	HERMON_HCR_SENSE_PORT	0x004d	hermon.h
24526	HERMON_HCR_RUN_FW	0x0ff6	hermon.h
24527	HERMON_HCR_DISABLE_LAM	0x0ff7	hermon.h
24528	HERMON_HCR_ENABLE_LAM	0x0ff8	hermon.h
24529	HERMON_HCR_UNMAP_ICM	0x0ff9	hermon.h
24530	HERMON_HCR_MAP_ICM	0x0ffa	hermon.h
24531	HERMON_HCR_UNMAP_ICM_AUX	0x0ffb	hermon.h
24532	HERMON_HCR_MAP_ICM_AUX	0x0ffc	hermon.h
24533	HERMON_HCR_SET_ICM_SIZE	0x0ffd	hermon.h
24534	HERMON_HCR_UNMAP_FA	0x0ffe	hermon.h
24535	HERMON_HCR_MAP_FA	0x0fff	hermon.h
24536	HERMON_ST_RC	0x00	hermon.h
24537	HERMON_ST_UD	0x03	hermon.h
24538	HERMON_ST_MLX	0x07	hermon.h
24539	HERMON_MTU_2048	0x04	hermon.h
24540	HERMON_INVALID_LKEY	0x00000100UL	hermon.h
24541	HERMON_PAGE_SIZE	4096	hermon.h
24542	HERMON_DB_POST_SND_OFFSET	0x14	hermon.h
24543	HERMON_QP_OPT_PARAM_PM_STATE	0x00000400UL	hermon.h
24544	HERMON_QP_OPT_PARAM_QKEY	0x00000020UL	hermon.h
24545	HERMON_QP_OPT_PARAM_ALT_PATH	0x00000001UL	hermon.h
24546	HERMON_MAP_EQ	( 0UL << 31 )	hermon.h
24547	HERMON_UNMAP_EQ	( 1UL << 31 )	hermon.h
24548	HERMON_EV_PORT_STATE_CHANGE	0x09	hermon.h
24549	HERMON_SCHED_QP0	0x3f	hermon.h
24550	HERMON_SCHED_DEFAULT	0x83	hermon.h
24551	HERMON_PM_STATE_ARMED	0x00	hermon.h
24552	HERMON_PM_STATE_REARM	0x01	hermon.h
24553	HERMON_PM_STATE_MIGRATED	0x03	hermon.h
24554	HERMON_RETRY_MAX	0x07	hermon.h
24555	HERMON_PORT_TYPE_IB	1	hermon.h
24556	HERMON_MAX_GATHER	2	hermon.h
24557	HERMON_MAX_SCATTER	1	hermon.h
24558	HERMON_CMPT_MAX_ENTRIES	( 1 << 24 )	hermon.h
24559	HERMON_UAR_NON_EQ_PAGE	128	hermon.h
24560	HERMON_MAX_MTTS	64	hermon.h
24561	HERMON_SEND_WQE_ALIGN	128	hermon.h
24562	HERMON_RECV_WQE_ALIGN	16	hermon.h
24563	HERMON_NUM_SPECIAL_QPS	8	hermon.h
24564	HERMON_RSVD_SPECIAL_QPS	( ( HERMON_NUM_SPECIAL_QPS << 1 ) - 1 )	hermon.h
24565	HERMON_MAX_QPS	8	hermon.h
24566	HERMON_QPN_RANDOM_MASK	0xfff000	hermon.h
24567	HERMON_MAX_CQS	8	hermon.h
24568	HERMON_MAX_EQS	8	hermon.h
24569	HERMON_NUM_EQES	4	hermon.h
24570	HERMON_GLOBAL_PD	0x123456	hermon.h
24571	HERMON_MKEY_PREFIX	0x77000000UL	hermon.h
24572	HERMON_HCR_BASE	0x80680	hermon.h
24573	HERMON_HCR_MAX_WAIT_MS	2000	hermon.h
24574	HERMON_MBOX_ALIGN	4096	hermon.h
24575	HERMON_MBOX_SIZE	512	hermon.h
24576	HERMON_HCR_IN_MBOX	0x00001000UL	hermon.h
24577	HERMON_HCR_OUT_MBOX	0x00002000UL	hermon.h
24578	LINDA_SENDBUFAVAIL_ALIGN	64	linda.h
24579	LINDA_BAR0_SIZE	0x400000	linda.h
24580	LINDA_GPIO_SCL	0	linda.h
24581	LINDA_GPIO_SDA	1	linda.h
24582	LINDA_EEPROM_GUID_OFFSET	3	linda.h
24583	LINDA_EEPROM_GUID_SIZE	8	linda.h
24584	LINDA_EEPROM_SERIAL_OFFSET	12	linda.h
24585	LINDA_EEPROM_SERIAL_SIZE	12	linda.h
24586	LINDA_MAX_SEND_BUFS	32	linda.h
24587	LINDA_SEND_BUF_SIZE	4096	linda.h
24588	LINDA_NUM_CONTEXTS	5	linda.h
24589	LINDA_EAGER_ARRAY_SIZE_5CTX_0	2048	linda.h
24590	LINDA_EAGER_ARRAY_SIZE_5CTX_OTH	4096	linda.h
24591	LINDA_EAGER_ARRAY_SIZE_9CTX_0	2048	linda.h
24592	LINDA_EAGER_ARRAY_SIZE_9CTX_OTH	2048	linda.h
24593	LINDA_EAGER_ARRAY_SIZE_17CTX_0	2048	linda.h
24594	LINDA_EAGER_ARRAY_SIZE_17CTX_OT	1024	linda.h
24595	LINDA_EAGER_BUFFER_ALIGN	2048	linda.h
24596	LINDA_RECV_HEADER_COUNT	8	linda.h
24597	LINDA_RECV_HEADER_SIZE	96	linda.h
24598	LINDA_RECV_HEADERS_SIZE	( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT )	linda.h
24599	LINDA_RECV_HEADERS_ALIGN	64	linda.h
24600	LINDA_RECV_PAYLOAD_SIZE	2048	linda.h
24601	LINDA_QP_IDETH	0xdead0	linda.h
24602	LINDA_EPB_REQUEST_MAX_WAIT_US	500	linda.h
24603	LINDA_EPB_XACT_MAX_WAIT_US	500	linda.h
24604	LINDA_EPB_CS_SERDES	1	linda.h
24605	LINDA_EPB_CS_UC	2	linda.h
24606	LINDA_EPB_WRITE	0	linda.h
24607	LINDA_EPB_READ	1	linda.h
24608	LINDA_EPB_UC_CHANNEL	6	linda.h
24609	LINDA_EPB_UC_CTL	LINDA_EPB_UC_LOC ( 0 )	linda.h
24610	LINDA_EPB_UC_CTL_WRITE	1	linda.h
24611	LINDA_EPB_UC_CTL_READ	2	linda.h
24612	LINDA_EPB_UC_ADDR_LO	LINDA_EPB_UC_LOC ( 2 )	linda.h
24613	LINDA_EPB_UC_ADDR_HI	LINDA_EPB_UC_LOC ( 3 )	linda.h
24614	LINDA_EPB_UC_DATA	LINDA_EPB_UC_LOC ( 4 )	linda.h
24615	LINDA_EPB_UC_CHUNK_SIZE	64	linda.h
24616	LINDA_TRIM_DONE_MAX_WAIT_MS	1000	linda.h
24617	LINDA_LINK_STATE_MAX_WAIT_US	20	linda.h
24618	QIB_7220_Revision_offset	0x00000000UL	qib_7220_regs.h
24619	QIB_7220_Control_offset	0x00000008UL	qib_7220_regs.h
24620	QIB_7220_PageAlign_offset	0x00000010UL	qib_7220_regs.h
24621	QIB_7220_PortCnt_offset	0x00000018UL	qib_7220_regs.h
24622	QIB_7220_DbgPortSel_offset	0x00000020UL	qib_7220_regs.h
24623	QIB_7220_DebugSigsIntSel_offset	0x00000028UL	qib_7220_regs.h
24624	QIB_7220_SendRegBase_offset	0x00000030UL	qib_7220_regs.h
24625	QIB_7220_UserRegBase_offset	0x00000038UL	qib_7220_regs.h
24626	QIB_7220_CntrRegBase_offset	0x00000040UL	qib_7220_regs.h
24627	QIB_7220_Scratch_offset	0x00000048UL	qib_7220_regs.h
24628	QIB_7220_REG_000050_offset	0x00000050UL	qib_7220_regs.h
24629	QIB_7220_IntBlocked_offset	0x00000060UL	qib_7220_regs.h
24630	QIB_7220_IntMask_offset	0x00000068UL	qib_7220_regs.h
24631	QIB_7220_IntStatus_offset	0x00000070UL	qib_7220_regs.h
24632	QIB_7220_IntClear_offset	0x00000078UL	qib_7220_regs.h
24633	QIB_7220_ErrMask_offset	0x00000080UL	qib_7220_regs.h
24634	QIB_7220_ErrStatus_offset	0x00000088UL	qib_7220_regs.h
24635	QIB_7220_ErrClear_offset	0x00000090UL	qib_7220_regs.h
24636	QIB_7220_HwErrMask_offset	0x00000098UL	qib_7220_regs.h
24637	QIB_7220_HwErrStatus_offset	0x000000a0UL	qib_7220_regs.h
24638	QIB_7220_HwErrClear_offset	0x000000a8UL	qib_7220_regs.h
24639	QIB_7220_HwDiagCtrl_offset	0x000000b0UL	qib_7220_regs.h
24640	QIB_7220_REG_0000B8_offset	0x000000b8UL	qib_7220_regs.h
24641	QIB_7220_IBCStatus_offset	0x000000c0UL	qib_7220_regs.h
24642	QIB_7220_IBCCtrl_offset	0x000000c8UL	qib_7220_regs.h
24643	QIB_7220_EXTStatus_offset	0x000000d0UL	qib_7220_regs.h
24644	QIB_7220_EXTCtrl_offset	0x000000d8UL	qib_7220_regs.h
24645	QIB_7220_GPIOOut_offset	0x000000e0UL	qib_7220_regs.h
24646	QIB_7220_GPIOMask_offset	0x000000e8UL	qib_7220_regs.h
24647	QIB_7220_GPIOStatus_offset	0x000000f0UL	qib_7220_regs.h
24648	QIB_7220_GPIOClear_offset	0x000000f8UL	qib_7220_regs.h
24649	QIB_7220_RcvCtrl_offset	0x00000100UL	qib_7220_regs.h
24650	QIB_7220_RcvBTHQP_offset	0x00000108UL	qib_7220_regs.h
24651	QIB_7220_RcvHdrSize_offset	0x00000110UL	qib_7220_regs.h
24652	QIB_7220_RcvHdrCnt_offset	0x00000118UL	qib_7220_regs.h
24653	QIB_7220_RcvHdrEntSize_offset	0x00000120UL	qib_7220_regs.h
24654	QIB_7220_RcvTIDBase_offset	0x00000128UL	qib_7220_regs.h
24655	QIB_7220_RcvTIDCnt_offset	0x00000130UL	qib_7220_regs.h
24656	QIB_7220_RcvEgrBase_offset	0x00000138UL	qib_7220_regs.h
24657	QIB_7220_RcvEgrCnt_offset	0x00000140UL	qib_7220_regs.h
24658	QIB_7220_RcvBufBase_offset	0x00000148UL	qib_7220_regs.h
24659	QIB_7220_RcvBufSize_offset	0x00000150UL	qib_7220_regs.h
24660	QIB_7220_RxIntMemBase_offset	0x00000158UL	qib_7220_regs.h
24661	QIB_7220_RxIntMemSize_offset	0x00000160UL	qib_7220_regs.h
24662	QIB_7220_RcvPartitionKey_offset	0x00000168UL	qib_7220_regs.h
24663	QIB_7220_RcvQPMulticastPort_off	0x00000170UL	qib_7220_regs.h
24664	QIB_7220_RcvPktLEDCnt_offset	0x00000178UL	qib_7220_regs.h
24665	QIB_7220_IBCDDRCtrl_offset	0x00000180UL	qib_7220_regs.h
24666	QIB_7220_HRTBT_GUID_offset	0x00000188UL	qib_7220_regs.h
24667	QIB_7220_IB_SDTEST_IF_TX_offset	0x00000190UL	qib_7220_regs.h
24668	QIB_7220_IB_SDTEST_IF_RX_offset	0x00000198UL	qib_7220_regs.h
24669	QIB_7220_IBCDDRCtrl2_offset	0x000001a0UL	qib_7220_regs.h
24670	QIB_7220_IBCDDRStatus_offset	0x000001a8UL	qib_7220_regs.h
24671	QIB_7220_JIntReload_offset	0x000001b0UL	qib_7220_regs.h
24672	QIB_7220_IBNCModeCtrl_offset	0x000001b8UL	qib_7220_regs.h
24673	QIB_7220_SendCtrl_offset	0x000001c0UL	qib_7220_regs.h
24674	QIB_7220_SendBufBase_offset	0x000001c8UL	qib_7220_regs.h
24675	QIB_7220_SendBufSize_offset	0x000001d0UL	qib_7220_regs.h
24676	QIB_7220_SendBufCnt_offset	0x000001d8UL	qib_7220_regs.h
24677	QIB_7220_SendBufAvailAddr_offse	0x000001e0UL	qib_7220_regs.h
24678	QIB_7220_TxIntMemBase_offset	0x000001e8UL	qib_7220_regs.h
24679	QIB_7220_TxIntMemSize_offset	0x000001f0UL	qib_7220_regs.h
24680	QIB_7220_SendDmaBase_offset	0x000001f8UL	qib_7220_regs.h
24681	QIB_7220_SendDmaLenGen_offset	0x00000200UL	qib_7220_regs.h
24682	QIB_7220_SendDmaTail_offset	0x00000208UL	qib_7220_regs.h
24683	QIB_7220_SendDmaHead_offset	0x00000210UL	qib_7220_regs.h
24684	QIB_7220_SendDmaHeadAddr_offset	0x00000218UL	qib_7220_regs.h
24685	QIB_7220_SendDmaBufMask0_offset	0x00000220UL	qib_7220_regs.h
24686	QIB_7220_SendDmaStatus_offset	0x00000238UL	qib_7220_regs.h
24687	QIB_7220_SendBufErr0_offset	0x00000240UL	qib_7220_regs.h
24688	QIB_7220_REG_000258_offset	0x00000258UL	qib_7220_regs.h
24689	QIB_7220_AvailUpdCount_offset	0x00000268UL	qib_7220_regs.h
24690	QIB_7220_RcvHdrAddr0_offset	0x00000270UL	qib_7220_regs.h
24691	QIB_7220_REG_0002F8_offset	0x000002f8UL	qib_7220_regs.h
24692	QIB_7220_RcvHdrTailAddr0_offset	0x00000300UL	qib_7220_regs.h
24693	QIB_7220_REG_000388_offset	0x00000388UL	qib_7220_regs.h
24694	QIB_7220_ibsd_epb_access_ctrl_o	0x000003c0UL	qib_7220_regs.h
24695	QIB_7220_ibsd_epb_transaction_r	0x000003c8UL	qib_7220_regs.h
24696	QIB_7220_REG_0003D0_offset	0x000003d0UL	qib_7220_regs.h
24697	QIB_7220_XGXSCfg_offset	0x000003d8UL	qib_7220_regs.h
24698	QIB_7220_IBSerDesCtrl_offset	0x000003e0UL	qib_7220_regs.h
24699	QIB_7220_EEPCtlStat_offset	0x000003e8UL	qib_7220_regs.h
24700	QIB_7220_EEPAddrCmd_offset	0x000003f0UL	qib_7220_regs.h
24701	QIB_7220_EEPData_offset	0x000003f8UL	qib_7220_regs.h
24702	QIB_7220_pciesd_epb_access_ctrl	0x00000400UL	qib_7220_regs.h
24703	QIB_7220_pciesd_epb_transaction	0x00000408UL	qib_7220_regs.h
24704	QIB_7220_efuse_control_reg_offs	0x00000410UL	qib_7220_regs.h
24705	QIB_7220_efuse_rddata0_reg_offs	0x00000418UL	qib_7220_regs.h
24706	QIB_7220_procmon_register_offse	0x00000438UL	qib_7220_regs.h
24707	QIB_7220_PcieRbufTestReg0_offse	0x00000440UL	qib_7220_regs.h
24708	QIB_7220_PcieRBufTestReg1_offse	0x00000448UL	qib_7220_regs.h
24709	QIB_7220_SPC_JTAG_ACCESS_REG_of	0x00000460UL	qib_7220_regs.h
24710	QIB_7220_LAControlReg_offset	0x00000468UL	qib_7220_regs.h
24711	QIB_7220_GPIODebugSelReg_offset	0x00000470UL	qib_7220_regs.h
24712	QIB_7220_DebugPortValueReg_offs	0x00000478UL	qib_7220_regs.h
24713	QIB_7220_SendDmaBufUsed0_offset	0x00000480UL	qib_7220_regs.h
24714	QIB_7220_SendDmaReqTagUsed_offs	0x00000498UL	qib_7220_regs.h
24715	QIB_7220_efuse_pgm_data0_offset	0x000004a0UL	qib_7220_regs.h
24716	QIB_7220_MEM_0004B0_offset	0x000004b0UL	qib_7220_regs.h
24717	QIB_7220_SerDes_DDSRXEQ0_offset	0x00000500UL	qib_7220_regs.h
24718	QIB_7220_MEM_0005F0_offset	0x000005f0UL	qib_7220_regs.h
24719	QIB_7220_LAMemory_offset	0x00000600UL	qib_7220_regs.h
24720	QIB_7220_MEM_0007F0_offset	0x000007f0UL	qib_7220_regs.h
24721	QIB_7220_SendBufAvail0_offset	0x00001000UL	qib_7220_regs.h
24722	QIB_7220_MEM_001028_offset	0x00001028UL	qib_7220_regs.h
24723	QIB_7220_LBIntCnt_offset	0x00013000UL	qib_7220_regs.h
24724	QIB_7220_LBFlowStallCnt_offset	0x00013008UL	qib_7220_regs.h
24725	QIB_7220_TxSDmaDescCnt_offset	0x00013010UL	qib_7220_regs.h
24726	QIB_7220_TxUnsupVLErrCnt_offset	0x00013018UL	qib_7220_regs.h
24727	QIB_7220_TxDataPktCnt_offset	0x00013020UL	qib_7220_regs.h
24728	QIB_7220_TxFlowPktCnt_offset	0x00013028UL	qib_7220_regs.h
24729	QIB_7220_TxDwordCnt_offset	0x00013030UL	qib_7220_regs.h
24730	QIB_7220_TxLenErrCnt_offset	0x00013038UL	qib_7220_regs.h
24731	QIB_7220_TxMaxMinLenErrCnt_offs	0x00013040UL	qib_7220_regs.h
24732	QIB_7220_TxUnderrunCnt_offset	0x00013048UL	qib_7220_regs.h
24733	QIB_7220_TxFlowStallCnt_offset	0x00013050UL	qib_7220_regs.h
24734	QIB_7220_TxDroppedPktCnt_offset	0x00013058UL	qib_7220_regs.h
24735	QIB_7220_RxDroppedPktCnt_offset	0x00013060UL	qib_7220_regs.h
24736	QIB_7220_RxDataPktCnt_offset	0x00013068UL	qib_7220_regs.h
24737	QIB_7220_RxFlowPktCnt_offset	0x00013070UL	qib_7220_regs.h
24738	QIB_7220_RxDwordCnt_offset	0x00013078UL	qib_7220_regs.h
24739	QIB_7220_RxLenErrCnt_offset	0x00013080UL	qib_7220_regs.h
24740	QIB_7220_RxMaxMinLenErrCnt_offs	0x00013088UL	qib_7220_regs.h
24741	QIB_7220_RxICRCErrCnt_offset	0x00013090UL	qib_7220_regs.h
24742	QIB_7220_RxVCRCErrCnt_offset	0x00013098UL	qib_7220_regs.h
24743	QIB_7220_RxFlowCtrlViolCnt_offs	0x000130a0UL	qib_7220_regs.h
24744	QIB_7220_RxVersionErrCnt_offset	0x000130a8UL	qib_7220_regs.h
24745	QIB_7220_RxLinkMalformCnt_offse	0x000130b0UL	qib_7220_regs.h
24746	QIB_7220_RxEBPCnt_offset	0x000130b8UL	qib_7220_regs.h
24747	QIB_7220_RxLPCRCErrCnt_offset	0x000130c0UL	qib_7220_regs.h
24748	QIB_7220_RxBufOvflCnt_offset	0x000130c8UL	qib_7220_regs.h
24749	QIB_7220_RxTIDFullErrCnt_offset	0x000130d0UL	qib_7220_regs.h
24750	QIB_7220_RxTIDValidErrCnt_offse	0x000130d8UL	qib_7220_regs.h
24751	QIB_7220_RxPKeyMismatchCnt_offs	0x000130e0UL	qib_7220_regs.h
24752	QIB_7220_RxP0HdrEgrOvflCnt_offs	0x000130e8UL	qib_7220_regs.h
24753	QIB_7220_IBStatusChangeCnt_offs	0x00013170UL	qib_7220_regs.h
24754	QIB_7220_IBLinkErrRecoveryCnt_o	0x00013178UL	qib_7220_regs.h
24755	QIB_7220_IBLinkDownedCnt_offset	0x00013180UL	qib_7220_regs.h
24756	QIB_7220_IBSymbolErrCnt_offset	0x00013188UL	qib_7220_regs.h
24757	QIB_7220_RxVL15DroppedPktCnt_of	0x00013190UL	qib_7220_regs.h
24758	QIB_7220_RxOtherLocalPhyErrCnt_	0x00013198UL	qib_7220_regs.h
24759	QIB_7220_PcieRetryBufDiagQwordC	0x000131a0UL	qib_7220_regs.h
24760	QIB_7220_ExcessBufferOvflCnt_of	0x000131a8UL	qib_7220_regs.h
24761	QIB_7220_LocalLinkIntegrityErrC	0x000131b0UL	qib_7220_regs.h
24762	QIB_7220_RxVlErrCnt_offset	0x000131b8UL	qib_7220_regs.h
24763	QIB_7220_RxDlidFltrCnt_offset	0x000131c0UL	qib_7220_regs.h
24764	QIB_7220_CNT_0131C8_offset	0x000131c8UL	qib_7220_regs.h
24765	QIB_7220_PSStat_offset	0x00013200UL	qib_7220_regs.h
24766	QIB_7220_PSStart_offset	0x00013208UL	qib_7220_regs.h
24767	QIB_7220_PSInterval_offset	0x00013210UL	qib_7220_regs.h
24768	QIB_7220_PSRcvDataCount_offset	0x00013218UL	qib_7220_regs.h
24769	QIB_7220_PSRcvPktsCount_offset	0x00013220UL	qib_7220_regs.h
24770	QIB_7220_PSXmitDataCount_offset	0x00013228UL	qib_7220_regs.h
24771	QIB_7220_PSXmitPktsCount_offset	0x00013230UL	qib_7220_regs.h
24772	QIB_7220_PSXmitWaitCount_offset	0x00013238UL	qib_7220_regs.h
24773	QIB_7220_CNT_013240_offset	0x00013240UL	qib_7220_regs.h
24774	QIB_7220_RcvEgrArray_offset	0x00014000UL	qib_7220_regs.h
24775	QIB_7220_MEM_038000_offset	0x00038000UL	qib_7220_regs.h
24776	QIB_7220_RcvTIDArray0_offset	0x00053000UL	qib_7220_regs.h
24777	QIB_7220_PIOLaunchFIFO_offset	0x00064000UL	qib_7220_regs.h
24778	QIB_7220_MEM_064480_offset	0x00064480UL	qib_7220_regs.h
24779	QIB_7220_SendPIOpbcCache_offset	0x00064800UL	qib_7220_regs.h
24780	QIB_7220_MEM_064C80_offset	0x00064c80UL	qib_7220_regs.h
24781	QIB_7220_PreLaunchFIFO_offset	0x00065000UL	qib_7220_regs.h
24782	QIB_7220_MEM_065080_offset	0x00065080UL	qib_7220_regs.h
24783	QIB_7220_ScoreBoard_offset	0x00065400UL	qib_7220_regs.h
24784	QIB_7220_MEM_065440_offset	0x00065440UL	qib_7220_regs.h
24785	QIB_7220_DescriptorFIFO_offset	0x00065800UL	qib_7220_regs.h
24786	QIB_7220_MEM_065880_offset	0x00065880UL	qib_7220_regs.h
24787	QIB_7220_RcvBuf1_offset	0x00072000UL	qib_7220_regs.h
24788	QIB_7220_MEM_074800_offset	0x00074800UL	qib_7220_regs.h
24789	QIB_7220_RcvBuf2_offset	0x00075000UL	qib_7220_regs.h
24790	QIB_7220_MEM_076400_offset	0x00076400UL	qib_7220_regs.h
24791	QIB_7220_RcvFlags_offset	0x00077000UL	qib_7220_regs.h
24792	QIB_7220_MEM_078400_offset	0x00078400UL	qib_7220_regs.h
24793	QIB_7220_RcvLookupBuf1_offset	0x00079000UL	qib_7220_regs.h
24794	QIB_7220_MEM_07A400_offset	0x0007a400UL	qib_7220_regs.h
24795	QIB_7220_RcvDMADatBuf_offset	0x0007b000UL	qib_7220_regs.h
24796	QIB_7220_RcvDMAHdrBuf_offset	0x0007b800UL	qib_7220_regs.h
24797	QIB_7220_MiscRXEIntMem_offset	0x0007c000UL	qib_7220_regs.h
24798	QIB_7220_MEM_07D400_offset	0x0007d400UL	qib_7220_regs.h
24799	QIB_7220_PCIERcvBuf_offset	0x00080000UL	qib_7220_regs.h
24800	QIB_7220_PCIERetryBuf_offset	0x00084000UL	qib_7220_regs.h
24801	QIB_7220_PCIERcvBufRdToWrAddr_o	0x00088000UL	qib_7220_regs.h
24802	QIB_7220_PCIECplBuf_offset	0x00090000UL	qib_7220_regs.h
24803	QIB_7220_IBSerDesMappTable_offs	0x00094000UL	qib_7220_regs.h
24804	QIB_7220_MEM_095000_offset	0x00095000UL	qib_7220_regs.h
24805	QIB_7220_SendBuf0_MA_offset	0x00100000UL	qib_7220_regs.h
24806	QIB_7220_MEM_1A0000_offset	0x001a0000UL	qib_7220_regs.h
24807	QIB_7220_RcvHdrTail0_offset	0x00200000UL	qib_7220_regs.h
24808	QIB_7220_RcvHdrHead0_offset	0x00200008UL	qib_7220_regs.h
24809	QIB_7220_RcvEgrIndexTail0_offse	0x00200010UL	qib_7220_regs.h
24810	QIB_7220_RcvEgrIndexHead0_offse	0x00200018UL	qib_7220_regs.h
24811	QIB_7220_MEM_200020_offset	0x00200020UL	qib_7220_regs.h
24812	QIB_7220_RcvHdrTail1_offset	0x00210000UL	qib_7220_regs.h
24813	QIB_7220_RcvHdrHead1_offset	0x00210008UL	qib_7220_regs.h
24814	QIB_7220_RcvEgrIndexTail1_offse	0x00210010UL	qib_7220_regs.h
24815	QIB_7220_RcvEgrIndexHead1_offse	0x00210018UL	qib_7220_regs.h
24816	QIB_7220_MEM_210020_offset	0x00210020UL	qib_7220_regs.h
24817	QIB_7220_RcvHdrTail2_offset	0x00220000UL	qib_7220_regs.h
24818	QIB_7220_RcvHdrHead2_offset	0x00220008UL	qib_7220_regs.h
24819	QIB_7220_RcvEgrIndexTail2_offse	0x00220010UL	qib_7220_regs.h
24820	QIB_7220_RcvEgrIndexHead2_offse	0x00220018UL	qib_7220_regs.h
24821	QIB_7220_MEM_220020_offset	0x00220020UL	qib_7220_regs.h
24822	QIB_7220_RcvHdrTail3_offset	0x00230000UL	qib_7220_regs.h
24823	QIB_7220_RcvHdrHead3_offset	0x00230008UL	qib_7220_regs.h
24824	QIB_7220_RcvEgrIndexTail3_offse	0x00230010UL	qib_7220_regs.h
24825	QIB_7220_RcvEgrIndexHead3_offse	0x00230018UL	qib_7220_regs.h
24826	QIB_7220_MEM_230020_offset	0x00230020UL	qib_7220_regs.h
24827	QIB_7220_RcvHdrTail4_offset	0x00240000UL	qib_7220_regs.h
24828	QIB_7220_RcvHdrHead4_offset	0x00240008UL	qib_7220_regs.h
24829	QIB_7220_RcvEgrIndexTail4_offse	0x00240010UL	qib_7220_regs.h
24830	QIB_7220_RcvEgrIndexHead4_offse	0x00240018UL	qib_7220_regs.h
24831	QIB_7220_MEM_240020_offset	0x00240020UL	qib_7220_regs.h
24832	QIB_7220_RcvHdrTail5_offset	0x00250000UL	qib_7220_regs.h
24833	QIB_7220_RcvHdrHead5_offset	0x00250008UL	qib_7220_regs.h
24834	QIB_7220_RcvEgrIndexTail5_offse	0x00250010UL	qib_7220_regs.h
24835	QIB_7220_RcvEgrIndexHead5_offse	0x00250018UL	qib_7220_regs.h
24836	QIB_7220_MEM_250020_offset	0x00250020UL	qib_7220_regs.h
24837	QIB_7220_RcvHdrTail6_offset	0x00260000UL	qib_7220_regs.h
24838	QIB_7220_RcvHdrHead6_offset	0x00260008UL	qib_7220_regs.h
24839	QIB_7220_RcvEgrIndexTail6_offse	0x00260010UL	qib_7220_regs.h
24840	QIB_7220_RcvEgrIndexHead6_offse	0x00260018UL	qib_7220_regs.h
24841	QIB_7220_MEM_260020_offset	0x00260020UL	qib_7220_regs.h
24842	QIB_7220_RcvHdrTail7_offset	0x00270000UL	qib_7220_regs.h
24843	QIB_7220_RcvHdrHead7_offset	0x00270008UL	qib_7220_regs.h
24844	QIB_7220_RcvEgrIndexTail7_offse	0x00270010UL	qib_7220_regs.h
24845	QIB_7220_RcvEgrIndexHead7_offse	0x00270018UL	qib_7220_regs.h
24846	QIB_7220_MEM_270020_offset	0x00270020UL	qib_7220_regs.h
24847	QIB_7220_RcvHdrTail8_offset	0x00280000UL	qib_7220_regs.h
24848	QIB_7220_RcvHdrHead8_offset	0x00280008UL	qib_7220_regs.h
24849	QIB_7220_RcvEgrIndexTail8_offse	0x00280010UL	qib_7220_regs.h
24850	QIB_7220_RcvEgrIndexHead8_offse	0x00280018UL	qib_7220_regs.h
24851	QIB_7220_MEM_280020_offset	0x00280020UL	qib_7220_regs.h
24852	QIB_7220_RcvHdrTail9_offset	0x00290000UL	qib_7220_regs.h
24853	QIB_7220_RcvHdrHead9_offset	0x00290008UL	qib_7220_regs.h
24854	QIB_7220_RcvEgrIndexTail9_offse	0x00290010UL	qib_7220_regs.h
24855	QIB_7220_RcvEgrIndexHead9_offse	0x00290018UL	qib_7220_regs.h
24856	QIB_7220_MEM_290020_offset	0x00290020UL	qib_7220_regs.h
24857	QIB_7220_RcvHdrTail10_offset	0x002a0000UL	qib_7220_regs.h
24858	QIB_7220_RcvHdrHead10_offset	0x002a0008UL	qib_7220_regs.h
24859	QIB_7220_RcvEgrIndexTail10_offs	0x002a0010UL	qib_7220_regs.h
24860	QIB_7220_RcvEgrIndexHead10_offs	0x002a0018UL	qib_7220_regs.h
24861	QIB_7220_MEM_2A0020_offset	0x002a0020UL	qib_7220_regs.h
24862	QIB_7220_RcvHdrTail11_offset	0x002b0000UL	qib_7220_regs.h
24863	QIB_7220_RcvHdrHead11_offset	0x002b0008UL	qib_7220_regs.h
24864	QIB_7220_RcvEgrIndexTail11_offs	0x002b0010UL	qib_7220_regs.h
24865	QIB_7220_RcvEgrIndexHead11_offs	0x002b0018UL	qib_7220_regs.h
24866	QIB_7220_MEM_2B0020_offset	0x002b0020UL	qib_7220_regs.h
24867	QIB_7220_RcvHdrTail12_offset	0x002c0000UL	qib_7220_regs.h
24868	QIB_7220_RcvHdrHead12_offset	0x002c0008UL	qib_7220_regs.h
24869	QIB_7220_RcvEgrIndexTail12_offs	0x002c0010UL	qib_7220_regs.h
24870	QIB_7220_RcvEgrIndexHead12_offs	0x002c0018UL	qib_7220_regs.h
24871	QIB_7220_MEM_2C0020_offset	0x002c0020UL	qib_7220_regs.h
24872	QIB_7220_RcvHdrTail13_offset	0x002d0000UL	qib_7220_regs.h
24873	QIB_7220_RcvHdrHead13_offset	0x002d0008UL	qib_7220_regs.h
24874	QIB_7220_RcvEgrIndexTail13_offs	0x002d0010UL	qib_7220_regs.h
24875	QIB_7220_RcvEgrIndexHead13_offs	0x002d0018UL	qib_7220_regs.h
24876	QIB_7220_MEM_2D0020_offset	0x002d0020UL	qib_7220_regs.h
24877	QIB_7220_RcvHdrTail14_offset	0x002e0000UL	qib_7220_regs.h
24878	QIB_7220_RcvHdrHead14_offset	0x002e0008UL	qib_7220_regs.h
24879	QIB_7220_RcvEgrIndexTail14_offs	0x002e0010UL	qib_7220_regs.h
24880	QIB_7220_RcvEgrIndexHead14_offs	0x002e0018UL	qib_7220_regs.h
24881	QIB_7220_MEM_2E0020_offset	0x002e0020UL	qib_7220_regs.h
24882	QIB_7220_RcvHdrTail15_offset	0x002f0000UL	qib_7220_regs.h
24883	QIB_7220_RcvHdrHead15_offset	0x002f0008UL	qib_7220_regs.h
24884	QIB_7220_RcvEgrIndexTail15_offs	0x002f0010UL	qib_7220_regs.h
24885	QIB_7220_RcvEgrIndexHead15_offs	0x002f0018UL	qib_7220_regs.h
24886	QIB_7220_MEM_2F0020_offset	0x002f0020UL	qib_7220_regs.h
24887	QIB_7220_RcvHdrTail16_offset	0x00300000UL	qib_7220_regs.h
24888	QIB_7220_RcvHdrHead16_offset	0x00300008UL	qib_7220_regs.h
24889	QIB_7220_RcvEgrIndexTail16_offs	0x00300010UL	qib_7220_regs.h
24890	QIB_7220_RcvEgrIndexHead16_offs	0x00300018UL	qib_7220_regs.h
24891	QIB_7220_MEM_300020_offset	0x00300020UL	qib_7220_regs.h
24892	TX_INIT_RATE	16	3c509.h
24893	TX_INIT_MAX_RATE	64	3c509.h
24894	RX_INIT_LATENCY	64	3c509.h
24895	RX_INIT_EARLY_THRESH	64	3c509.h
24896	MIN_RX_EARLY_THRESHF	16	3c509.h	not less than ether_header
24897	MIN_RX_EARLY_THRESHL	4	3c509.h
24898	EEPROMSIZE	0x40	3c509.h
24899	MAX_EEPROMBUSY	1000	3c509.h
24900	EP_ID_PORT_START	0x110	3c509.h	avoid 0x100 to avoid conflict with SB16
24901	EP_ID_PORT_INC	0x10	3c509.h
24902	EP_ID_PORT_END	0x200	3c509.h
24903	EP_TAG_MAX	0x7	3c509.h	must be 2^n - 1
24904	EEPROM_CMD_RD	0x0080	3c509.h	Read: Address required (5 bits)
24905	EEPROM_CMD_WR	0x0040	3c509.h	Write: Address required (5 bits)
24906	EEPROM_CMD_ERASE	0x00c0	3c509.h	Erase: Address required (5 bits)
24907	EEPROM_CMD_EWEN	0x0030	3c509.h	Erase/Write Enable: No data required
24908	EEPROM_BUSY	(1<<15)	3c509.h
24909	EEPROM_TST_MODE	(1<<14)	3c509.h
24910	EEPROM_NODE_ADDR_0	0x0	3c509.h	Word
24911	EEPROM_NODE_ADDR_1	0x1	3c509.h	Word
24912	EEPROM_NODE_ADDR_2	0x2	3c509.h	Word
24913	EEPROM_PROD_ID	0x3	3c509.h	0x9[0-f]50
24914	EEPROM_MFG_ID	0x7	3c509.h	0x6d50
24915	EEPROM_ADDR_CFG	0x8	3c509.h	Base addr
24916	EEPROM_RESOURCE_CFG	0x9	3c509.h	IRQ. Bits 12-15
24917	EP_COMMAND	0x0e	3c509.h	Write. BASE+0x0e is always a
24918	EP_STATUS	0x0e	3c509.h	Read. BASE+0x0e is always status
24919	EP_WINDOW	0x0f	3c509.h	Read. BASE+0x0f is always window
24920	EP_W0_EEPROM_DATA	0x0c	3c509.h
24921	EP_W0_EEPROM_COMMAND	0x0a	3c509.h
24922	EP_W0_RESOURCE_CFG	0x08	3c509.h
24923	EP_W0_ADDRESS_CFG	0x06	3c509.h
24924	EP_W0_CONFIG_CTRL	0x04	3c509.h
24925	EP_W0_PRODUCT_ID	0x02	3c509.h
24926	EP_W0_MFG_ID	0x00	3c509.h
24927	EP_W1_TX_PIO_WR_2	0x02	3c509.h
24928	EP_W1_TX_PIO_WR_1	0x00	3c509.h
24929	EP_W1_FREE_TX	0x0c	3c509.h
24930	EP_W1_TX_STATUS	0x0b	3c509.h	byte
24931	EP_W1_TIMER	0x0a	3c509.h	byte
24932	EP_W1_RX_STATUS	0x08	3c509.h
24933	EP_W1_RX_PIO_RD_2	0x02	3c509.h
24934	EP_W1_RX_PIO_RD_1	0x00	3c509.h
24935	EP_W2_ADDR_5	0x05	3c509.h
24936	EP_W2_ADDR_4	0x04	3c509.h
24937	EP_W2_ADDR_3	0x03	3c509.h
24938	EP_W2_ADDR_2	0x02	3c509.h
24939	EP_W2_ADDR_1	0x01	3c509.h
24940	EP_W2_ADDR_0	0x00	3c509.h
24941	EP_W3_FREE_TX	0x0c	3c509.h
24942	EP_W3_FREE_RX	0x0a	3c509.h
24943	EP_W4_MEDIA_TYPE	0x0a	3c509.h
24944	EP_W4_CTRLR_STATUS	0x08	3c509.h
24945	EP_W4_NET_DIAG	0x06	3c509.h
24946	EP_W4_FIFO_DIAG	0x04	3c509.h
24947	EP_W4_HOST_DIAG	0x02	3c509.h
24948	EP_W4_TX_DIAG	0x00	3c509.h
24949	EP_W5_READ_0_MASK	0x0c	3c509.h
24950	EP_W5_INTR_MASK	0x0a	3c509.h
24951	EP_W5_RX_FILTER	0x08	3c509.h
24952	EP_W5_RX_EARLY_THRESH	0x06	3c509.h
24953	EP_W5_TX_AVAIL_THRESH	0x02	3c509.h
24954	EP_W5_TX_START_THRESH	0x00	3c509.h
24955	TX_TOTAL_OK	0x0c	3c509.h
24956	RX_TOTAL_OK	0x0a	3c509.h
24957	TX_DEFERRALS	0x08	3c509.h
24958	RX_FRAMES_OK	0x07	3c509.h
24959	TX_FRAMES_OK	0x06	3c509.h
24960	RX_OVERRUNS	0x05	3c509.h
24961	TX_COLLISIONS	0x04	3c509.h
24962	TX_AFTER_1_COLLISION	0x03	3c509.h
24963	TX_AFTER_X_COLLISIONS	0x02	3c509.h
24964	TX_NO_SQE	0x01	3c509.h
24965	TX_CD_LOST	0x00	3c509.h
24966	GLOBAL_RESET	(unsigned short) 0x0000	3c509.h	Wait at least 1ms
24967	WINDOW_SELECT	(unsigned short) (0x1<<11)	3c509.h
24968	START_TRANSCEIVER	(unsigned short) (0x2<<11)	3c509.h	Read ADDR_CFG reg to
24969	RX_DISABLE	(unsigned short) (0x3<<11)	3c509.h	state disabled on
24970	RX_ENABLE	(unsigned short) (0x4<<11)	3c509.h
24971	RX_RESET	(unsigned short) (0x5<<11)	3c509.h
24972	RX_DISCARD_TOP_PACK	(unsigned short) (0x8<<11)	3c509.h
24973	TX_ENABLE	(unsigned short) (0x9<<11)	3c509.h
24974	TX_DISABLE	(unsigned short) (0xa<<11)	3c509.h
24975	TX_RESET	(unsigned short) (0xb<<11)	3c509.h
24976	REQ_INTR	(unsigned short) (0xc<<11)	3c509.h
24977	SET_INTR_MASK	(unsigned short) (0xe<<11)	3c509.h
24978	SET_RD_0_MASK	(unsigned short) (0xf<<11)	3c509.h
24979	SET_RX_FILTER	(unsigned short) (0x10<<11)	3c509.h
24980	FIL_INDIVIDUAL	(unsigned short) (0x1)	3c509.h
24981	FIL_GROUP	(unsigned short) (0x2)	3c509.h
24982	FIL_BRDCST	(unsigned short) (0x4)	3c509.h
24983	FIL_ALL	(unsigned short) (0x8)	3c509.h
24984	SET_RX_EARLY_THRESH	(unsigned short) (0x11<<11)	3c509.h
24985	SET_TX_AVAIL_THRESH	(unsigned short) (0x12<<11)	3c509.h
24986	SET_TX_START_THRESH	(unsigned short) (0x13<<11)	3c509.h
24987	STATS_ENABLE	(unsigned short) (0x15<<11)	3c509.h
24988	STATS_DISABLE	(unsigned short) (0x16<<11)	3c509.h
24989	STOP_TRANSCEIVER	(unsigned short) (0x17<<11)	3c509.h
24990	ACK_INTR	(unsigned short) (0x6800)	3c509.h
24991	C_INTR_LATCH	(unsigned short) (ACK_INTR\|0x1)	3c509.h
24992	C_CARD_FAILURE	(unsigned short) (ACK_INTR\|0x2)	3c509.h
24993	C_TX_COMPLETE	(unsigned short) (ACK_INTR\|0x4)	3c509.h
24994	C_TX_AVAIL	(unsigned short) (ACK_INTR\|0x8)	3c509.h
24995	C_RX_COMPLETE	(unsigned short) (ACK_INTR\|0x10)	3c509.h
24996	C_RX_EARLY	(unsigned short) (ACK_INTR\|0x20)	3c509.h
24997	C_INT_RQD	(unsigned short) (ACK_INTR\|0x40)	3c509.h
24998	C_UPD_STATS	(unsigned short) (ACK_INTR\|0x80)	3c509.h
24999	S_INTR_LATCH	(unsigned short) (0x1)	3c509.h
25000	S_CARD_FAILURE	(unsigned short) (0x2)	3c509.h
25001	S_TX_COMPLETE	(unsigned short) (0x4)	3c509.h
25002	S_TX_AVAIL	(unsigned short) (0x8)	3c509.h
25003	S_RX_COMPLETE	(unsigned short) (0x10)	3c509.h
25004	S_RX_EARLY	(unsigned short) (0x20)	3c509.h
25005	S_INT_RQD	(unsigned short) (0x40)	3c509.h
25006	S_UPD_STATS	(unsigned short) (0x80)	3c509.h
25007	S_5_INTS	(S_CARD_FAILURE\|S_TX_COMPLETE\|\ S_TX_AVAIL\|S_RX_COMPLETE\|S_RX_EARLY)	3c509.h
25008	S_COMMAND_IN_PROGRESS	(unsigned short) (0x1000)	3c509.h
25009	ERR_RX_INCOMPLETE	(unsigned short) (0x1<<15)	3c509.h
25010	ERR_RX	(unsigned short) (0x1<<14)	3c509.h
25011	ERR_RX_OVERRUN	(unsigned short) (0x8<<11)	3c509.h
25012	ERR_RX_RUN_PKT	(unsigned short) (0xb<<11)	3c509.h
25013	ERR_RX_ALIGN	(unsigned short) (0xc<<11)	3c509.h
25014	ERR_RX_CRC	(unsigned short) (0xd<<11)	3c509.h
25015	ERR_RX_OVERSIZE	(unsigned short) (0x9<<11)	3c509.h
25016	ERR_RX_DRIBBLE	(unsigned short) (0x2<<11)	3c509.h
25017	TXS_COMPLETE	0x80	3c509.h
25018	TXS_SUCCES_INTR_REQ	0x40	3c509.h
25019	TXS_JABBER	0x20	3c509.h
25020	TXS_UNDERRUN	0x10	3c509.h
25021	TXS_MAX_COLLISION	0x8	3c509.h
25022	TXS_STATUS_OVERFLOW	0x4	3c509.h
25023	IS_AUI	(1<<13)	3c509.h
25024	IS_BNC	(1<<12)	3c509.h
25025	IS_UTP	(1<<9)	3c509.h
25026	ENABLE_DRQ_IRQ	0x0001	3c509.h
25027	W0_P4_CMD_RESET_ADAPTER	0x4	3c509.h
25028	W0_P4_CMD_ENABLE_ADAPTER	0x1	3c509.h
25029	ENABLE_UTP	0xc0	3c509.h
25030	DISABLE_UTP	0x0	3c509.h
25031	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c509.h
25032	RX_ERROR	0x4000	3c509.h
25033	RX_INCOMPLETE	0x8000	3c509.h
25034	MFG_ID	0x6d50	3c509.h	in EEPROM and W0 ADDR_CONFIG
25035	PROD_ID	0x9150	3c509.h
25036	AUI	0x1	3c509.h
25037	BNC	0x2	3c509.h
25038	UTP	0x4	3c509.h
25039	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c509.h
25040	TX_INIT_RATE	16	3c595.h
25041	TX_INIT_MAX_RATE	64	3c595.h
25042	RX_INIT_LATENCY	64	3c595.h
25043	RX_INIT_EARLY_THRESH	64	3c595.h
25044	MIN_RX_EARLY_THRESHF	16	3c595.h	not less than ether_header
25045	MIN_RX_EARLY_THRESHL	4	3c595.h
25046	EEPROMSIZE	0x40	3c595.h
25047	MAX_EEPROMBUSY	1000	3c595.h
25048	VX_LAST_TAG	0xd7	3c595.h
25049	VX_MAX_BOARDS	16	3c595.h
25050	VX_ID_PORT	0x100	3c595.h
25051	BASE	(eth_nic_base)	3c595.h
25052	EEPROM_CMD_RD	0x0080	3c595.h	Read: Address required (5 bits)
25053	EEPROM_CMD_WR	0x0040	3c595.h	Write: Address required (5 bits)
25054	EEPROM_CMD_ERASE	0x00c0	3c595.h	Erase: Address required (5 bits)
25055	EEPROM_CMD_EWEN	0x0030	3c595.h	Erase/Write Enable: No data required
25056	EEPROM_BUSY	(1<<15)	3c595.h
25057	EEPROM_NODE_ADDR_0	0x0	3c595.h	Word
25058	EEPROM_NODE_ADDR_1	0x1	3c595.h	Word
25059	EEPROM_NODE_ADDR_2	0x2	3c595.h	Word
25060	EEPROM_PROD_ID	0x3	3c595.h	0x9[0-f]50
25061	EEPROM_MFG_ID	0x7	3c595.h	0x6d50
25062	EEPROM_ADDR_CFG	0x8	3c595.h	Base addr
25063	EEPROM_RESOURCE_CFG	0x9	3c595.h	IRQ. Bits 12-15
25064	EEPROM_OEM_ADDR_0	0xa	3c595.h	Word
25065	EEPROM_OEM_ADDR_1	0xb	3c595.h	Word
25066	EEPROM_OEM_ADDR_2	0xc	3c595.h	Word
25067	EEPROM_SOFT_INFO_2	0xf	3c595.h	Software information 2
25068	NO_RX_OVN_ANOMALY	(1<<5)	3c595.h
25069	VX_COMMAND	0x0e	3c595.h	Write. BASE+0x0e is always a
25070	VX_STATUS	0x0e	3c595.h	Read. BASE+0x0e is always status
25071	VX_WINDOW	0x0f	3c595.h	Read. BASE+0x0f is always window
25072	VX_W0_EEPROM_DATA	0x0c	3c595.h
25073	VX_W0_EEPROM_COMMAND	0x0a	3c595.h
25074	VX_W0_RESOURCE_CFG	0x08	3c595.h
25075	VX_W0_ADDRESS_CFG	0x06	3c595.h
25076	VX_W0_CONFIG_CTRL	0x04	3c595.h
25077	VX_W0_PRODUCT_ID	0x02	3c595.h
25078	VX_W0_MFG_ID	0x00	3c595.h
25079	VX_W1_TX_PIO_WR_2	0x02	3c595.h
25080	VX_W1_TX_PIO_WR_1	0x00	3c595.h
25081	VX_W1_FREE_TX	0x0c	3c595.h
25082	VX_W1_TX_STATUS	0x0b	3c595.h	byte
25083	VX_W1_TIMER	0x0a	3c595.h	byte
25084	VX_W1_RX_STATUS	0x08	3c595.h
25085	VX_W1_RX_PIO_RD_2	0x02	3c595.h
25086	VX_W1_RX_PIO_RD_1	0x00	3c595.h
25087	VX_W2_ADDR_5	0x05	3c595.h
25088	VX_W2_ADDR_4	0x04	3c595.h
25089	VX_W2_ADDR_3	0x03	3c595.h
25090	VX_W2_ADDR_2	0x02	3c595.h
25091	VX_W2_ADDR_1	0x01	3c595.h
25092	VX_W2_ADDR_0	0x00	3c595.h
25093	VX_W3_INTERNAL_CFG	0x00	3c595.h
25094	VX_W3_RESET_OPT	0x08	3c595.h
25095	VX_W3_FREE_TX	0x0c	3c595.h
25096	VX_W3_FREE_RX	0x0a	3c595.h
25097	VX_W4_MEDIA_TYPE	0x0a	3c595.h
25098	VX_W4_CTRLR_STATUS	0x08	3c595.h
25099	VX_W4_NET_DIAG	0x06	3c595.h
25100	VX_W4_FIFO_DIAG	0x04	3c595.h
25101	VX_W4_HOST_DIAG	0x02	3c595.h
25102	VX_W4_TX_DIAG	0x00	3c595.h
25103	VX_W5_READ_0_MASK	0x0c	3c595.h
25104	VX_W5_INTR_MASK	0x0a	3c595.h
25105	VX_W5_RX_FILTER	0x08	3c595.h
25106	VX_W5_RX_EARLY_THRESH	0x06	3c595.h
25107	VX_W5_TX_AVAIL_THRESH	0x02	3c595.h
25108	VX_W5_TX_START_THRESH	0x00	3c595.h
25109	TX_TOTAL_OK	0x0c	3c595.h
25110	RX_TOTAL_OK	0x0a	3c595.h
25111	TX_DEFERRALS	0x08	3c595.h
25112	RX_FRAMES_OK	0x07	3c595.h
25113	TX_FRAMES_OK	0x06	3c595.h
25114	RX_OVERRUNS	0x05	3c595.h
25115	TX_COLLISIONS	0x04	3c595.h
25116	TX_AFTER_1_COLLISION	0x03	3c595.h
25117	TX_AFTER_X_COLLISIONS	0x02	3c595.h
25118	TX_NO_SQE	0x01	3c595.h
25119	TX_CD_LOST	0x00	3c595.h
25120	GLOBAL_RESET	(unsigned short) 0x0000	3c595.h	Wait at least 1ms
25121	WINDOW_SELECT	(unsigned short) (0x1<<11)	3c595.h
25122	START_TRANSCEIVER	(unsigned short) (0x2<<11)	3c595.h	Read ADDR_CFG reg to
25123	RX_DISABLE	(unsigned short) (0x3<<11)	3c595.h	state disabled on
25124	RX_ENABLE	(unsigned short) (0x4<<11)	3c595.h
25125	RX_RESET	(unsigned short) (0x5<<11)	3c595.h
25126	RX_DISCARD_TOP_PACK	(unsigned short) (0x8<<11)	3c595.h
25127	TX_ENABLE	(unsigned short) (0x9<<11)	3c595.h
25128	TX_DISABLE	(unsigned short) (0xa<<11)	3c595.h
25129	TX_RESET	(unsigned short) (0xb<<11)	3c595.h
25130	REQ_INTR	(unsigned short) (0xc<<11)	3c595.h
25131	ACK_INTR	(unsigned short) (0x6800)	3c595.h
25132	C_INTR_LATCH	(unsigned short) (ACK_INTR\|0x1)	3c595.h
25133	C_CARD_FAILURE	(unsigned short) (ACK_INTR\|0x2)	3c595.h
25134	C_TX_COMPLETE	(unsigned short) (ACK_INTR\|0x4)	3c595.h
25135	C_TX_AVAIL	(unsigned short) (ACK_INTR\|0x8)	3c595.h
25136	C_RX_COMPLETE	(unsigned short) (ACK_INTR\|0x10)	3c595.h
25137	C_RX_EARLY	(unsigned short) (ACK_INTR\|0x20)	3c595.h
25138	C_INT_RQD	(unsigned short) (ACK_INTR\|0x40)	3c595.h
25139	C_UPD_STATS	(unsigned short) (ACK_INTR\|0x80)	3c595.h
25140	SET_INTR_MASK	(unsigned short) (0xe<<11)	3c595.h
25141	SET_RD_0_MASK	(unsigned short) (0xf<<11)	3c595.h
25142	SET_RX_FILTER	(unsigned short) (0x10<<11)	3c595.h
25143	FIL_INDIVIDUAL	(unsigned short) (0x1)	3c595.h
25144	FIL_MULTICAST	(unsigned short) (0x02)	3c595.h
25145	FIL_BRDCST	(unsigned short) (0x04)	3c595.h
25146	FIL_PROMISC	(unsigned short) (0x08)	3c595.h
25147	SET_RX_EARLY_THRESH	(unsigned short) (0x11<<11)	3c595.h
25148	SET_TX_AVAIL_THRESH	(unsigned short) (0x12<<11)	3c595.h
25149	SET_TX_START_THRESH	(unsigned short) (0x13<<11)	3c595.h
25150	STATS_ENABLE	(unsigned short) (0x15<<11)	3c595.h
25151	STATS_DISABLE	(unsigned short) (0x16<<11)	3c595.h
25152	STOP_TRANSCEIVER	(unsigned short) (0x17<<11)	3c595.h
25153	S_INTR_LATCH	(unsigned short) (0x1)	3c595.h
25154	S_CARD_FAILURE	(unsigned short) (0x2)	3c595.h
25155	S_TX_COMPLETE	(unsigned short) (0x4)	3c595.h
25156	S_TX_AVAIL	(unsigned short) (0x8)	3c595.h
25157	S_RX_COMPLETE	(unsigned short) (0x10)	3c595.h
25158	S_RX_EARLY	(unsigned short) (0x20)	3c595.h
25159	S_INT_RQD	(unsigned short) (0x40)	3c595.h
25160	S_UPD_STATS	(unsigned short) (0x80)	3c595.h
25161	S_COMMAND_IN_PROGRESS	(unsigned short) (0x1000)	3c595.h
25162	VX_BUSY_WAIT	while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS)	3c595.h
25163	ACF_CONNECTOR_BITS	14	3c595.h
25164	ACF_CONNECTOR_UTP	0	3c595.h
25165	ACF_CONNECTOR_AUI	1	3c595.h
25166	ACF_CONNECTOR_BNC	3	3c595.h
25167	INTERNAL_CONNECTOR_BITS	20	3c595.h
25168	INTERNAL_CONNECTOR_MASK	0x01700000	3c595.h
25169	ERR_INCOMPLETE	(unsigned short) (0x8000)	3c595.h
25170	ERR_RX	(unsigned short) (0x4000)	3c595.h
25171	ERR_MASK	(unsigned short) (0x7800)	3c595.h
25172	ERR_OVERRUN	(unsigned short) (0x4000)	3c595.h
25173	ERR_RUNT	(unsigned short) (0x5800)	3c595.h
25174	ERR_ALIGNMENT	(unsigned short) (0x6000)	3c595.h
25175	ERR_CRC	(unsigned short) (0x6800)	3c595.h
25176	ERR_OVERSIZE	(unsigned short) (0x4800)	3c595.h
25177	ERR_DRIBBLE	(unsigned short) (0x1000)	3c595.h
25178	TXS_COMPLETE	0x80	3c595.h
25179	TXS_INTR_REQ	0x40	3c595.h
25180	TXS_JABBER	0x20	3c595.h
25181	TXS_UNDERRUN	0x10	3c595.h
25182	TXS_MAX_COLLISION	0x8	3c595.h
25183	TXS_STATUS_OVERFLOW	0x4	3c595.h
25184	RS_AUI	(1<<5)	3c595.h
25185	RS_BNC	(1<<4)	3c595.h
25186	RS_UTP	(1<<3)	3c595.h
25187	RS_T4	(1<<0)	3c595.h
25188	RS_TX	(1<<1)	3c595.h
25189	RS_FX	(1<<2)	3c595.h
25190	RS_MII	(1<<6)	3c595.h
25191	FIFOS_RX_RECEIVING	(unsigned short) 0x8000	3c595.h
25192	FIFOS_RX_UNDERRUN	(unsigned short) 0x2000	3c595.h
25193	FIFOS_RX_STATUS_OVERRUN	(unsigned short) 0x1000	3c595.h
25194	FIFOS_RX_OVERRUN	(unsigned short) 0x0800	3c595.h
25195	FIFOS_TX_OVERRUN	(unsigned short) 0x0400	3c595.h
25196	TAG_ADAPTER	0xd0	3c595.h
25197	ACTIVATE_ADAPTER_TO_CONFIG	0xff	3c595.h
25198	ENABLE_DRQ_IRQ	0x0001	3c595.h
25199	MFG_ID	0x506d	3c595.h	`TCM'
25200	PROD_ID	0x5090	3c595.h
25201	JABBER_GUARD_ENABLE	0x40	3c595.h
25202	LINKBEAT_ENABLE	0x80	3c595.h
25203	ENABLE_UTP	(JABBER_GUARD_ENABLE \| LINKBEAT_ENABLE)	3c595.h
25204	DISABLE_UTP	0x0	3c595.h
25205	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c595.h
25206	RX_ERROR	0x4000	3c595.h
25207	RX_INCOMPLETE	0x8000	3c595.h
25208	TX_INDICATE	1<<15	3c595.h
25209	VX_IOSIZE	0x20	3c595.h
25210	VX_CONNECTORS	8	3c595.h
25211	XCVR_MAGIC	(0x5A00)	3c90x.h
25212	INT_INTERRUPTLATCH	(1<<0)	3c90x.h
25213	INT_HOSTERROR	(1<<1)	3c90x.h
25214	INT_TXCOMPLETE	(1<<2)	3c90x.h
25215	INT_RXCOMPLETE	(1<<4)	3c90x.h
25216	INT_RXEARLY	(1<<5)	3c90x.h
25217	INT_INTREQUESTED	(1<<6)	3c90x.h
25218	INT_UPDATESTATS	(1<<7)	3c90x.h
25219	INT_LINKEVENT	(1<<8)	3c90x.h
25220	INT_DNCOMPLETE	(1<<9)	3c90x.h
25221	INT_UPCOMPLETE	(1<<10)	3c90x.h
25222	INT_CMDINPROGRESS	(1<<12)	3c90x.h
25223	INT_WINDOWNUMBER	(7<<13)	3c90x.h
25224	TX_RING_SIZE	8	3c90x.h
25225	RX_RING_SIZE	8	3c90x.h
25226	TX_RING_ALIGN	16	3c90x.h
25227	RX_RING_ALIGN	16	3c90x.h
25228	RX_BUF_SIZE	1536	3c90x.h
25229	EEPROM_TIMEOUT	1 * 1000 * 1000	3c90x.h
25230	ASF_STAT	0x00	amd8111e.h	ASF status register
25231	CHIPID	0x04	amd8111e.h	Chip ID regsiter
25232	MIB_DATA	0x10	amd8111e.h	MIB data register
25233	MIB_ADDR	0x14	amd8111e.h	MIB address register
25234	STAT0	0x30	amd8111e.h	Status0 register
25235	INT0	0x38	amd8111e.h	Interrupt0 register
25236	INTEN0	0x40	amd8111e.h	Interrupt0 enable register
25237	CMD0	0x48	amd8111e.h	Command0 register
25238	CMD2	0x50	amd8111e.h	Command2 register
25239	CMD3	0x54	amd8111e.h	Command3 resiter
25240	CMD7	0x64	amd8111e.h	Command7 register
25241	CTRL1	0x6C	amd8111e.h	Control1 register
25242	CTRL2	0x70	amd8111e.h	Control2 register
25243	XMT_RING_LIMIT	0x7C	amd8111e.h	Transmit ring limit register
25244	AUTOPOLL0	0x88	amd8111e.h	Auto-poll0 register
25245	AUTOPOLL1	0x8A	amd8111e.h	Auto-poll1 register
25246	AUTOPOLL2	0x8C	amd8111e.h	Auto-poll2 register
25247	AUTOPOLL3	0x8E	amd8111e.h	Auto-poll3 register
25248	AUTOPOLL4	0x90	amd8111e.h	Auto-poll4 register
25249	AUTOPOLL5	0x92	amd8111e.h	Auto-poll5 register
25250	AP_VALUE	0x98	amd8111e.h	Auto-poll value register
25251	DLY_INT_A	0xA8	amd8111e.h	Group A delayed interrupt register
25252	DLY_INT_B	0xAC	amd8111e.h	Group B delayed interrupt register
25253	FLOW_CONTROL	0xC8	amd8111e.h	Flow control register
25254	PHY_ACCESS	0xD0	amd8111e.h	PHY access register
25255	STVAL	0xD8	amd8111e.h	Software timer value register
25256	XMT_RING_BASE_ADDR0	0x100	amd8111e.h	Transmit ring0 base addr register
25257	XMT_RING_BASE_ADDR1	0x108	amd8111e.h	Transmit ring1 base addr register
25258	XMT_RING_BASE_ADDR2	0x110	amd8111e.h	Transmit ring2 base addr register
25259	XMT_RING_BASE_ADDR3	0x118	amd8111e.h	Transmit ring2 base addr register
25260	RCV_RING_BASE_ADDR0	0x120	amd8111e.h	Transmit ring0 base addr register
25261	PMAT0	0x190	amd8111e.h	OnNow pattern register0
25262	PMAT1	0x194	amd8111e.h	OnNow pattern register1
25263	XMT_RING_LEN0	0x140	amd8111e.h	Transmit Ring0 length register
25264	XMT_RING_LEN1	0x144	amd8111e.h	Transmit Ring1 length register
25265	XMT_RING_LEN2	0x148	amd8111e.h	Transmit Ring2 length register
25266	XMT_RING_LEN3	0x14C	amd8111e.h	Transmit Ring3 length register
25267	RCV_RING_LEN0	0x150	amd8111e.h	Receive Ring0 length register
25268	SRAM_SIZE	0x178	amd8111e.h	SRAM size register
25269	SRAM_BOUNDARY	0x17A	amd8111e.h	SRAM boundary register
25270	PADR	0x160	amd8111e.h	Physical address register
25271	IFS1	0x18C	amd8111e.h	Inter-frame spacing Part1 register
25272	IFS	0x18D	amd8111e.h	Inter-frame spacing register
25273	IPG	0x18E	amd8111e.h	Inter-frame gap register
25274	LADRF	0x168	amd8111e.h	Logical address filter register
25275	PHY_SPEED_10	0x2	amd8111e.h
25276	PHY_SPEED_100	0x3	amd8111e.h
25277	rcv_miss_pkts	0x00	amd8111e.h
25278	rcv_octets	0x01	amd8111e.h
25279	rcv_broadcast_pkts	0x02	amd8111e.h
25280	rcv_multicast_pkts	0x03	amd8111e.h
25281	rcv_undersize_pkts	0x04	amd8111e.h
25282	rcv_oversize_pkts	0x05	amd8111e.h
25283	rcv_fragments	0x06	amd8111e.h
25284	rcv_jabbers	0x07	amd8111e.h
25285	rcv_unicast_pkts	0x08	amd8111e.h
25286	rcv_alignment_errors	0x09	amd8111e.h
25287	rcv_fcs_errors	0x0A	amd8111e.h
25288	rcv_good_octets	0x0B	amd8111e.h
25289	rcv_mac_ctrl	0x0C	amd8111e.h
25290	rcv_flow_ctrl	0x0D	amd8111e.h
25291	rcv_pkts_64_octets	0x0E	amd8111e.h
25292	rcv_pkts_65to127_octets	0x0F	amd8111e.h
25293	rcv_pkts_128to255_octets	0x10	amd8111e.h
25294	rcv_pkts_256to511_octets	0x11	amd8111e.h
25295	rcv_pkts_512to1023_octets	0x12	amd8111e.h
25296	rcv_pkts_1024to1518_octets	0x13	amd8111e.h
25297	rcv_unsupported_opcode	0x14	amd8111e.h
25298	rcv_symbol_errors	0x15	amd8111e.h
25299	rcv_drop_pkts_ring1	0x16	amd8111e.h
25300	rcv_drop_pkts_ring2	0x17	amd8111e.h
25301	rcv_drop_pkts_ring3	0x18	amd8111e.h
25302	rcv_drop_pkts_ring4	0x19	amd8111e.h
25303	rcv_jumbo_pkts	0x1A	amd8111e.h
25304	xmt_underrun_pkts	0x20	amd8111e.h
25305	xmt_octets	0x21	amd8111e.h
25306	xmt_packets	0x22	amd8111e.h
25307	xmt_broadcast_pkts	0x23	amd8111e.h
25308	xmt_multicast_pkts	0x24	amd8111e.h
25309	xmt_collisions	0x25	amd8111e.h
25310	xmt_unicast_pkts	0x26	amd8111e.h
25311	xmt_one_collision	0x27	amd8111e.h
25312	xmt_multiple_collision	0x28	amd8111e.h
25313	xmt_deferred_transmit	0x29	amd8111e.h
25314	xmt_late_collision	0x2A	amd8111e.h
25315	xmt_excessive_defer	0x2B	amd8111e.h
25316	xmt_loss_carrier	0x2C	amd8111e.h
25317	xmt_excessive_collision	0x2D	amd8111e.h
25318	xmt_back_pressure	0x2E	amd8111e.h
25319	xmt_flow_ctrl	0x2F	amd8111e.h
25320	xmt_pkts_64_octets	0x30	amd8111e.h
25321	xmt_pkts_65to127_octets	0x31	amd8111e.h
25322	xmt_pkts_128to255_octets	0x32	amd8111e.h
25323	xmt_pkts_256to511_octets	0x33	amd8111e.h
25324	xmt_pkts_512to1023_octets	0x34	amd8111e.h
25325	xmt_pkts_1024to1518_octet	0x35	amd8111e.h
25326	xmt_oversize_pkts	0x36	amd8111e.h
25327	xmt_jumbo_pkts	0x37	amd8111e.h
25328	DEFAULT_IPG	0x60	amd8111e.h
25329	IFS1_DELTA	36	amd8111e.h
25330	IPG_CONVERGE_JIFFIES	(HZ/2)	amd8111e.h
25331	IPG_STABLE_TIME	5	amd8111e.h
25332	MIN_IPG	96	amd8111e.h
25333	MAX_IPG	255	amd8111e.h
25334	IPG_STEP	16	amd8111e.h
25335	CSTATE	1	amd8111e.h
25336	SSTATE	2	amd8111e.h
25337	RESET_RX_FLAGS	0x0000	amd8111e.h
25338	TT_MASK	0x000c	amd8111e.h
25339	TCC_MASK	0x0003	amd8111e.h
25340	AMD8111E_REG_DUMP_LEN	13*sizeof(u32)	amd8111e.h
25341	CRC32	0xedb88320	amd8111e.h
25342	INITCRC	0xFFFFFFFF	amd8111e.h
25343	ETH_FCS_LEN	4	atl1e.h
25344	VLAN_HLEN	4	atl1e.h
25345	NET_IP_ALIGN	2	atl1e.h
25346	SPEED_0	0xffff	atl1e.h
25347	SPEED_10	10	atl1e.h
25348	SPEED_100	100	atl1e.h
25349	SPEED_1000	1000	atl1e.h
25350	HALF_DUPLEX	1	atl1e.h
25351	FULL_DUPLEX	2	atl1e.h
25352	AT_ERR_EEPROM	1	atl1e.h
25353	AT_ERR_PHY	2	atl1e.h
25354	AT_ERR_CONFIG	3	atl1e.h
25355	AT_ERR_PARAM	4	atl1e.h
25356	AT_ERR_MAC_TYPE	5	atl1e.h
25357	AT_ERR_PHY_TYPE	6	atl1e.h
25358	AT_ERR_PHY_SPEED	7	atl1e.h
25359	AT_ERR_PHY_RES	8	atl1e.h
25360	AT_ERR_TIMEOUT	9	atl1e.h
25361	AT_MAX_RECEIVE_QUEUE	4	atl1e.h
25362	AT_PAGE_NUM_PER_QUEUE	2	atl1e.h
25363	AT_TWSI_EEPROM_TIMEOUT	100	atl1e.h
25364	AT_HW_MAX_IDLE_DELAY	10	atl1e.h
25365	AT_REGS_LEN	75	atl1e.h
25366	AT_EEPROM_LEN	512	atl1e.h
25367	TPD_BUFLEN_MASK	0x3FFF	atl1e.h
25368	TPD_BUFLEN_SHIFT	0	atl1e.h
25369	TPD_EOP_MASK	0x0001	atl1e.h
25370	TPD_EOP_SHIFT	0	atl1e.h
25371	MAX_TX_BUF_LEN	0x2000	atl1e.h
25372	MAX_TX_BUF_SHIFT	13	atl1e.h
25373	RRS_RX_CSUM_MASK	0xFFFF	atl1e.h
25374	RRS_RX_CSUM_SHIFT	0	atl1e.h
25375	RRS_PKT_SIZE_MASK	0x3FFF	atl1e.h
25376	RRS_PKT_SIZE_SHIFT	16	atl1e.h
25377	RRS_CPU_NUM_MASK	0x0003	atl1e.h
25378	RRS_CPU_NUM_SHIFT	30	atl1e.h
25379	RRS_IS_RSS_IPV4	0x0001	atl1e.h
25380	RRS_IS_RSS_IPV4_TCP	0x0002	atl1e.h
25381	RRS_IS_RSS_IPV6	0x0004	atl1e.h
25382	RRS_IS_RSS_IPV6_TCP	0x0008	atl1e.h
25383	RRS_IS_IPV6	0x0010	atl1e.h
25384	RRS_IS_IP_FRAG	0x0020	atl1e.h
25385	RRS_IS_IP_DF	0x0040	atl1e.h
25386	RRS_IS_802_3	0x0080	atl1e.h
25387	RRS_IS_VLAN_TAG	0x0100	atl1e.h
25388	RRS_IS_ERR_FRAME	0x0200	atl1e.h
25389	RRS_IS_IPV4	0x0400	atl1e.h
25390	RRS_IS_UDP	0x0800	atl1e.h
25391	RRS_IS_TCP	0x1000	atl1e.h
25392	RRS_IS_BCAST	0x2000	atl1e.h
25393	RRS_IS_MCAST	0x4000	atl1e.h
25394	RRS_IS_PAUSE	0x8000	atl1e.h
25395	RRS_ERR_BAD_CRC	0x0001	atl1e.h
25396	RRS_ERR_CODE	0x0002	atl1e.h
25397	RRS_ERR_DRIBBLE	0x0004	atl1e.h
25398	RRS_ERR_RUNT	0x0008	atl1e.h
25399	RRS_ERR_RX_OVERFLOW	0x0010	atl1e.h
25400	RRS_ERR_TRUNC	0x0020	atl1e.h
25401	RRS_ERR_IP_CSUM	0x0040	atl1e.h
25402	RRS_ERR_L4_CSUM	0x0080	atl1e.h
25403	RRS_ERR_LENGTH	0x0100	atl1e.h
25404	RRS_ERR_DES_ADDR	0x0200	atl1e.h
25405	REG_PM_CTRLSTAT	0x44	atl1e.h
25406	REG_PCIE_CAP_LIST	0x58	atl1e.h
25407	REG_DEVICE_CAP	0x5C	atl1e.h
25408	DEVICE_CAP_MAX_PAYLOAD_MASK	0x7	atl1e.h
25409	DEVICE_CAP_MAX_PAYLOAD_SHIFT	0	atl1e.h
25410	REG_DEVICE_CTRL	0x60	atl1e.h
25411	DEVICE_CTRL_MAX_PAYLOAD_MASK	0x7	atl1e.h
25412	DEVICE_CTRL_MAX_PAYLOAD_SHIFT	5	atl1e.h
25413	DEVICE_CTRL_MAX_RREQ_SZ_MASK	0x7	atl1e.h
25414	DEVICE_CTRL_MAX_RREQ_SZ_SHIFT	12	atl1e.h
25415	REG_VPD_CAP	0x6C	atl1e.h
25416	VPD_CAP_ID_MASK	0xff	atl1e.h
25417	VPD_CAP_ID_SHIFT	0	atl1e.h
25418	VPD_CAP_NEXT_PTR_MASK	0xFF	atl1e.h
25419	VPD_CAP_NEXT_PTR_SHIFT	8	atl1e.h
25420	VPD_CAP_VPD_ADDR_MASK	0x7FFF	atl1e.h
25421	VPD_CAP_VPD_ADDR_SHIFT	16	atl1e.h
25422	VPD_CAP_VPD_FLAG	0x80000000	atl1e.h
25423	REG_VPD_DATA	0x70	atl1e.h
25424	REG_SPI_FLASH_CTRL	0x200	atl1e.h
25425	SPI_FLASH_CTRL_STS_NON_RDY	0x1	atl1e.h
25426	SPI_FLASH_CTRL_STS_WEN	0x2	atl1e.h
25427	SPI_FLASH_CTRL_STS_WPEN	0x80	atl1e.h
25428	SPI_FLASH_CTRL_DEV_STS_MASK	0xFF	atl1e.h
25429	SPI_FLASH_CTRL_DEV_STS_SHIFT	0	atl1e.h
25430	SPI_FLASH_CTRL_INS_MASK	0x7	atl1e.h
25431	SPI_FLASH_CTRL_INS_SHIFT	8	atl1e.h
25432	SPI_FLASH_CTRL_START	0x800	atl1e.h
25433	SPI_FLASH_CTRL_EN_VPD	0x2000	atl1e.h
25434	SPI_FLASH_CTRL_LDSTART	0x8000	atl1e.h
25435	SPI_FLASH_CTRL_CS_HI_MASK	0x3	atl1e.h
25436	SPI_FLASH_CTRL_CS_HI_SHIFT	16	atl1e.h
25437	SPI_FLASH_CTRL_CS_HOLD_MASK	0x3	atl1e.h
25438	SPI_FLASH_CTRL_CS_HOLD_SHIFT	18	atl1e.h
25439	SPI_FLASH_CTRL_CLK_LO_MASK	0x3	atl1e.h
25440	SPI_FLASH_CTRL_CLK_LO_SHIFT	20	atl1e.h
25441	SPI_FLASH_CTRL_CLK_HI_MASK	0x3	atl1e.h
25442	SPI_FLASH_CTRL_CLK_HI_SHIFT	22	atl1e.h
25443	SPI_FLASH_CTRL_CS_SETUP_MASK	0x3	atl1e.h
25444	SPI_FLASH_CTRL_CS_SETUP_SHIFT	24	atl1e.h
25445	SPI_FLASH_CTRL_EROM_PGSZ_MASK	0x3	atl1e.h
25446	SPI_FLASH_CTRL_EROM_PGSZ_SHIFT	26	atl1e.h
25447	SPI_FLASH_CTRL_WAIT_READY	0x10000000	atl1e.h
25448	REG_SPI_ADDR	0x204	atl1e.h
25449	REG_SPI_DATA	0x208	atl1e.h
25450	REG_SPI_FLASH_CONFIG	0x20C	atl1e.h
25451	SPI_FLASH_CONFIG_LD_ADDR_MASK	0xFFFFFF	atl1e.h
25452	SPI_FLASH_CONFIG_LD_ADDR_SHIFT	0	atl1e.h
25453	SPI_FLASH_CONFIG_VPD_ADDR_MASK	0x3	atl1e.h
25454	SPI_FLASH_CONFIG_VPD_ADDR_SHIFT	24	atl1e.h
25455	SPI_FLASH_CONFIG_LD_EXIST	0x4000000	atl1e.h
25456	REG_SPI_FLASH_OP_PROGRAM	0x210	atl1e.h
25457	REG_SPI_FLASH_OP_SC_ERASE	0x211	atl1e.h
25458	REG_SPI_FLASH_OP_CHIP_ERASE	0x212	atl1e.h
25459	REG_SPI_FLASH_OP_RDID	0x213	atl1e.h
25460	REG_SPI_FLASH_OP_WREN	0x214	atl1e.h
25461	REG_SPI_FLASH_OP_RDSR	0x215	atl1e.h
25462	REG_SPI_FLASH_OP_WRSR	0x216	atl1e.h
25463	REG_SPI_FLASH_OP_READ	0x217	atl1e.h
25464	REG_TWSI_CTRL	0x218	atl1e.h
25465	TWSI_CTRL_LD_OFFSET_MASK	0xFF	atl1e.h
25466	TWSI_CTRL_LD_OFFSET_SHIFT	0	atl1e.h
25467	TWSI_CTRL_LD_SLV_ADDR_MASK	0x7	atl1e.h
25468	TWSI_CTRL_LD_SLV_ADDR_SHIFT	8	atl1e.h
25469	TWSI_CTRL_SW_LDSTART	0x800	atl1e.h
25470	TWSI_CTRL_HW_LDSTART	0x1000	atl1e.h
25471	TWSI_CTRL_SMB_SLV_ADDR_MASK	0x0x7F	atl1e.h
25472	TWSI_CTRL_SMB_SLV_ADDR_SHIFT	15	atl1e.h
25473	TWSI_CTRL_LD_EXIST	0x400000	atl1e.h
25474	TWSI_CTRL_READ_FREQ_SEL_MASK	0x3	atl1e.h
25475	TWSI_CTRL_READ_FREQ_SEL_SHIFT	23	atl1e.h
25476	TWSI_CTRL_FREQ_SEL_100K	0	atl1e.h
25477	TWSI_CTRL_FREQ_SEL_200K	1	atl1e.h
25478	TWSI_CTRL_FREQ_SEL_300K	2	atl1e.h
25479	TWSI_CTRL_FREQ_SEL_400K	3	atl1e.h
25480	TWSI_CTRL_WRITE_FREQ_SEL_MASK	0x3	atl1e.h
25481	TWSI_CTRL_WRITE_FREQ_SEL_SHIFT	24	atl1e.h
25482	REG_PCIE_DEV_MISC_CTRL	0x21C	atl1e.h
25483	PCIE_DEV_MISC_CTRL_EXT_PIPE	0x2	atl1e.h
25484	PCIE_DEV_MISC_CTRL_RETRY_BUFDIS	0x1	atl1e.h
25485	PCIE_DEV_MISC_CTRL_SPIROM_EXIST	0x4	atl1e.h
25486	PCIE_DEV_MISC_CTRL_SERDES_ENDIA	0x8	atl1e.h
25487	PCIE_DEV_MISC_CTRL_SERDES_SEL_D	0x10	atl1e.h
25488	REG_PCIE_PHYMISC	0x1000	atl1e.h
25489	PCIE_PHYMISC_FORCE_RCV_DET	0x4	atl1e.h
25490	REG_LTSSM_TEST_MODE	0x12FC	atl1e.h
25491	LTSSM_TEST_MODE_DEF	0xE000	atl1e.h
25492	REG_MASTER_CTRL	0x1400	atl1e.h
25493	MASTER_CTRL_SOFT_RST	0x1	atl1e.h
25494	MASTER_CTRL_MTIMER_EN	0x2	atl1e.h
25495	MASTER_CTRL_ITIMER_EN	0x4	atl1e.h
25496	MASTER_CTRL_MANUAL_INT	0x8	atl1e.h
25497	MASTER_CTRL_ITIMER2_EN	0x20	atl1e.h
25498	MASTER_CTRL_INT_RDCLR	0x40	atl1e.h
25499	MASTER_CTRL_LED_MODE	0x200	atl1e.h
25500	MASTER_CTRL_REV_NUM_SHIFT	16	atl1e.h
25501	MASTER_CTRL_REV_NUM_MASK	0xff	atl1e.h
25502	MASTER_CTRL_DEV_ID_SHIFT	24	atl1e.h
25503	MASTER_CTRL_DEV_ID_MASK	0xff	atl1e.h
25504	REG_MANUAL_TIMER_INIT	0x1404	atl1e.h
25505	REG_IRQ_MODU_TIMER_INIT	0x1408	atl1e.h	w
25506	REG_IRQ_MODU_TIMER2_INIT	0x140A	atl1e.h	w
25507	REG_GPHY_CTRL	0x140C	atl1e.h
25508	GPHY_CTRL_EXT_RESET	1	atl1e.h
25509	GPHY_CTRL_PIPE_MOD	2	atl1e.h
25510	GPHY_CTRL_TEST_MODE_MASK	3	atl1e.h
25511	GPHY_CTRL_TEST_MODE_SHIFT	2	atl1e.h
25512	GPHY_CTRL_BERT_START	0x10	atl1e.h
25513	GPHY_CTRL_GATE_25M_EN	0x20	atl1e.h
25514	GPHY_CTRL_LPW_EXIT	0x40	atl1e.h
25515	GPHY_CTRL_PHY_IDDQ	0x80	atl1e.h
25516	GPHY_CTRL_PHY_IDDQ_DIS	0x100	atl1e.h
25517	GPHY_CTRL_PCLK_SEL_DIS	0x200	atl1e.h
25518	GPHY_CTRL_HIB_EN	0x400	atl1e.h
25519	GPHY_CTRL_HIB_PULSE	0x800	atl1e.h
25520	GPHY_CTRL_SEL_ANA_RST	0x1000	atl1e.h
25521	GPHY_CTRL_PHY_PLL_ON	0x2000	atl1e.h
25522	GPHY_CTRL_PWDOWN_HW	0x4000	atl1e.h
25523	GPHY_CTRL_DEFAULT	(\ GPHY_CTRL_PHY_PLL_ON \|\ GPHY_CTRL_SEL_ANA_RST \|\ GPHY_CTRL_HIB_PULSE \|\ GPHY_CTRL_HIB_EN)	atl1e.h
25524	GPHY_CTRL_PW_WOL_DIS	(\ GPHY_CTRL_PHY_PLL_ON \|\ GPHY_CTRL_SEL_ANA_RST \|\ GPHY_CTRL_HIB_PULSE \|\ GPHY_CTRL_HIB_EN \|\ GPHY_CTRL_PWDOWN_HW \|\ GPHY_CTRL	atl1e.h
25525	REG_CMBDISDMA_TIMER	0x140E	atl1e.h
25526	REG_IDLE_STATUS	0x1410	atl1e.h
25527	IDLE_STATUS_RXMAC	1	atl1e.h	1: RXMAC state machine is in non-IDLE state. 0: RXMAC is idling
25528	IDLE_STATUS_TXMAC	2	atl1e.h	1: TXMAC state machine is in non-IDLE state. 0: TXMAC is idling
25529	IDLE_STATUS_RXQ	4	atl1e.h	1: RXQ state machine is in non-IDLE state. 0: RXQ is idling
25530	IDLE_STATUS_TXQ	8	atl1e.h	1: TXQ state machine is in non-IDLE state. 0: TXQ is idling
25531	IDLE_STATUS_DMAR	0x10	atl1e.h	1: DMAR state machine is in non-IDLE state. 0: DMAR is idling
25532	IDLE_STATUS_DMAW	0x20	atl1e.h	1: DMAW state machine is in non-IDLE state. 0: DMAW is idling
25533	IDLE_STATUS_SMB	0x40	atl1e.h	1: SMB state machine is in non-IDLE state. 0: SMB is idling
25534	IDLE_STATUS_CMB	0x80	atl1e.h	1: CMB state machine is in non-IDLE state. 0: CMB is idling
25535	REG_MDIO_CTRL	0x1414	atl1e.h
25536	MDIO_DATA_MASK	0xffff	atl1e.h	On MDIO write, the 16-bit control data to write to PHY MII management register
25537	MDIO_DATA_SHIFT	0	atl1e.h	On MDIO read, the 16-bit status data that was read from the PHY MII management register
25538	MDIO_REG_ADDR_MASK	0x1f	atl1e.h	MDIO register address
25539	MDIO_REG_ADDR_SHIFT	16	atl1e.h
25540	MDIO_RW	0x200000	atl1e.h	1: read, 0: write
25541	MDIO_SUP_PREAMBLE	0x400000	atl1e.h	Suppress preamble
25542	MDIO_START	0x800000	atl1e.h	Write 1 to initiate the MDIO master. And this bit is self cleared after one cycle
25543	MDIO_CLK_SEL_SHIFT	24	atl1e.h
25544	MDIO_CLK_25_4	0	atl1e.h
25545	MDIO_CLK_25_6	2	atl1e.h
25546	MDIO_CLK_25_8	3	atl1e.h
25547	MDIO_CLK_25_10	4	atl1e.h
25548	MDIO_CLK_25_14	5	atl1e.h
25549	MDIO_CLK_25_20	6	atl1e.h
25550	MDIO_CLK_25_28	7	atl1e.h
25551	MDIO_BUSY	0x8000000	atl1e.h
25552	MDIO_AP_EN	0x10000000	atl1e.h
25553	MDIO_WAIT_TIMES	10	atl1e.h
25554	REG_PHY_STATUS	0x1418	atl1e.h
25555	PHY_STATUS_100M	0x20000	atl1e.h
25556	PHY_STATUS_EMI_CA	0x40000	atl1e.h
25557	REG_BIST0_CTRL	0x141c	atl1e.h
25558	BIST0_NOW	0x1	atl1e.h	1: To trigger BIST0 logic. This bit stays high during the
25559	BIST0_SRAM_FAIL	0x2	atl1e.h	1: The SRAM failure is un-repairable because it has address
25560	BIST0_FUSE_FLAG	0x4	atl1e.h	1: Indicating one cell has been fixed
25561	REG_BIST1_CTRL	0x1420	atl1e.h
25562	BIST1_NOW	0x1	atl1e.h	1: To trigger BIST0 logic. This bit stays high during the
25563	BIST1_SRAM_FAIL	0x2	atl1e.h	1: The SRAM failure is un-repairable because it has address
25564	BIST1_FUSE_FLAG	0x4	atl1e.h
25565	REG_SERDES_LOCK	0x1424	atl1e.h
25566	SERDES_LOCK_DETECT	1	atl1e.h	1: SerDes lock detected . This signal comes from Analog SerDes
25567	SERDES_LOCK_DETECT_EN	2	atl1e.h	1: Enable SerDes Lock detect function
25568	REG_MAC_CTRL	0x1480	atl1e.h
25569	MAC_CTRL_TX_EN	1	atl1e.h	1: Transmit Enable
25570	MAC_CTRL_RX_EN	2	atl1e.h	1: Receive Enable
25571	MAC_CTRL_TX_FLOW	4	atl1e.h	1: Transmit Flow Control Enable
25572	MAC_CTRL_RX_FLOW	8	atl1e.h	1: Receive Flow Control Enable
25573	MAC_CTRL_LOOPBACK	0x10	atl1e.h	1: Loop back at G/MII Interface
25574	MAC_CTRL_DUPLX	0x20	atl1e.h	1: Full-duplex mode 0: Half-duplex mode
25575	MAC_CTRL_ADD_CRC	0x40	atl1e.h	1: Instruct MAC to attach CRC on all egress Ethernet frames
25576	MAC_CTRL_PAD	0x80	atl1e.h	1: Instruct MAC to pad short frames to 60-bytes, and then attach CRC. This bit has higher priority over CRC_EN
25577	MAC_CTRL_LENCHK	0x100	atl1e.h	1: Instruct MAC to check if length field matches the real packet length
25578	MAC_CTRL_HUGE_EN	0x200	atl1e.h	1: receive Jumbo frame enable
25579	MAC_CTRL_PRMLEN_SHIFT	10	atl1e.h	Preamble length
25580	MAC_CTRL_PRMLEN_MASK	0xf	atl1e.h
25581	MAC_CTRL_RMV_VLAN	0x4000	atl1e.h	1: to remove VLAN Tag automatically from all receive packets
25582	MAC_CTRL_PROMIS_EN	0x8000	atl1e.h	1: Promiscuous Mode Enable
25583	MAC_CTRL_TX_PAUSE	0x10000	atl1e.h	1: transmit test pause
25584	MAC_CTRL_SCNT	0x20000	atl1e.h	1: shortcut slot time counter
25585	MAC_CTRL_SRST_TX	0x40000	atl1e.h	1: synchronized reset Transmit MAC module
25586	MAC_CTRL_TX_SIMURST	0x80000	atl1e.h	1: transmit simulation reset
25587	MAC_CTRL_SPEED_SHIFT	20	atl1e.h	10: gigabit 01:10M/100M
25588	MAC_CTRL_SPEED_MASK	0x300000	atl1e.h
25589	MAC_CTRL_SPEED_1000	2	atl1e.h
25590	MAC_CTRL_SPEED_10_100	1	atl1e.h
25591	MAC_CTRL_DBG_TX_BKPRESURE	0x400000	atl1e.h	1: transmit maximum backoff (half-duplex test bit)
25592	MAC_CTRL_TX_HUGE	0x800000	atl1e.h	1: transmit huge enable
25593	MAC_CTRL_RX_CHKSUM_EN	0x1000000	atl1e.h	1: RX checksum enable
25594	MAC_CTRL_MC_ALL_EN	0x2000000	atl1e.h	1: upload all multicast frame without error to system
25595	MAC_CTRL_BC_EN	0x4000000	atl1e.h	1: upload all broadcast frame without error to system
25596	MAC_CTRL_DBG	0x8000000	atl1e.h	1: upload all received frame to system (Debug Mode)
25597	REG_MAC_IPG_IFG	0x1484	atl1e.h
25598	MAC_IPG_IFG_IPGT_SHIFT	0	atl1e.h	Desired back to back inter-packet gap. The default is 96-bit time
25599	MAC_IPG_IFG_IPGT_MASK	0x7f	atl1e.h
25600	MAC_IPG_IFG_MIFG_SHIFT	8	atl1e.h	Minimum number of IFG to enforce in between RX frames
25601	MAC_IPG_IFG_MIFG_MASK	0xff	atl1e.h	Frame gap below such IFP is dropped
25602	MAC_IPG_IFG_IPGR1_SHIFT	16	atl1e.h	64bit Carrier-Sense window
25603	MAC_IPG_IFG_IPGR1_MASK	0x7f	atl1e.h
25604	MAC_IPG_IFG_IPGR2_SHIFT	24	atl1e.h	96-bit IPG window
25605	MAC_IPG_IFG_IPGR2_MASK	0x7f	atl1e.h
25606	REG_MAC_STA_ADDR	0x1488	atl1e.h
25607	REG_RX_HASH_TABLE	0x1490	atl1e.h
25608	REG_MAC_HALF_DUPLX_CTRL	0x1498	atl1e.h
25609	MAC_HALF_DUPLX_CTRL_LCOL_SHIFT	0	atl1e.h	Collision Window
25610	MAC_HALF_DUPLX_CTRL_LCOL_MASK	0x3ff	atl1e.h
25611	MAC_HALF_DUPLX_CTRL_RETRY_SHIFT	12	atl1e.h	Retransmission maximum, afterwards the packet will be discarded
25612	MAC_HALF_DUPLX_CTRL_RETRY_MASK	0xf	atl1e.h
25613	MAC_HALF_DUPLX_CTRL_EXC_DEF_EN	0x10000	atl1e.h	1: Allow the transmission of a packet which has been excessively deferred
25614	MAC_HALF_DUPLX_CTRL_NO_BACK_C	0x20000	atl1e.h	1: No back-off on collision, immediately start the retransmission
25615	MAC_HALF_DUPLX_CTRL_NO_BACK_P	0x40000	atl1e.h	1: No back-off on backpressure, immediately start the transmission after back pressure
25616	MAC_HALF_DUPLX_CTRL_ABEBE	0x80000	atl1e.h	1: Alternative Binary Exponential Back-off Enabled
25617	MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT	20	atl1e.h	Maximum binary exponential number
25618	MAC_HALF_DUPLX_CTRL_ABEBT_MASK	0xf	atl1e.h
25619	MAC_HALF_DUPLX_CTRL_JAMIPG_SHIF	24	atl1e.h	IPG to start JAM for collision based flow control in half-duplex
25620	MAC_HALF_DUPLX_CTRL_JAMIPG_MASK	0xf	atl1e.h	mode. In unit of 8-bit time
25621	REG_MTU	0x149c	atl1e.h
25622	REG_WOL_CTRL	0x14a0	atl1e.h
25623	WOL_PATTERN_EN	0x00000001	atl1e.h
25624	WOL_PATTERN_PME_EN	0x00000002	atl1e.h
25625	WOL_MAGIC_EN	0x00000004	atl1e.h
25626	WOL_MAGIC_PME_EN	0x00000008	atl1e.h
25627	WOL_LINK_CHG_EN	0x00000010	atl1e.h
25628	WOL_LINK_CHG_PME_EN	0x00000020	atl1e.h
25629	WOL_PATTERN_ST	0x00000100	atl1e.h
25630	WOL_MAGIC_ST	0x00000200	atl1e.h
25631	WOL_LINKCHG_ST	0x00000400	atl1e.h
25632	WOL_CLK_SWITCH_EN	0x00008000	atl1e.h
25633	WOL_PT0_EN	0x00010000	atl1e.h
25634	WOL_PT1_EN	0x00020000	atl1e.h
25635	WOL_PT2_EN	0x00040000	atl1e.h
25636	WOL_PT3_EN	0x00080000	atl1e.h
25637	WOL_PT4_EN	0x00100000	atl1e.h
25638	WOL_PT5_EN	0x00200000	atl1e.h
25639	WOL_PT6_EN	0x00400000	atl1e.h
25640	REG_WOL_PATTERN_LEN	0x14a4	atl1e.h
25641	WOL_PT_LEN_MASK	0x7f	atl1e.h
25642	WOL_PT0_LEN_SHIFT	0	atl1e.h
25643	WOL_PT1_LEN_SHIFT	8	atl1e.h
25644	WOL_PT2_LEN_SHIFT	16	atl1e.h
25645	WOL_PT3_LEN_SHIFT	24	atl1e.h
25646	WOL_PT4_LEN_SHIFT	0	atl1e.h
25647	WOL_PT5_LEN_SHIFT	8	atl1e.h
25648	WOL_PT6_LEN_SHIFT	16	atl1e.h
25649	REG_SRAM_TRD_ADDR	0x1518	atl1e.h
25650	REG_SRAM_TRD_LEN	0x151C	atl1e.h
25651	REG_SRAM_RXF_ADDR	0x1520	atl1e.h
25652	REG_SRAM_RXF_LEN	0x1524	atl1e.h
25653	REG_SRAM_TXF_ADDR	0x1528	atl1e.h
25654	REG_SRAM_TXF_LEN	0x152C	atl1e.h
25655	REG_SRAM_TCPH_ADDR	0x1530	atl1e.h
25656	REG_SRAM_PKTH_ADDR	0x1532	atl1e.h
25657	REG_LOAD_PTR	0x1534	atl1e.h	Software sets this bit after the initialization of the head and tail
25658	REG_RXF3_BASE_ADDR_HI	0x153C	atl1e.h
25659	REG_DESC_BASE_ADDR_HI	0x1540	atl1e.h
25660	REG_RXF0_BASE_ADDR_HI	0x1540	atl1e.h	share with DESC BASE ADDR HI
25661	REG_HOST_RXF0_PAGE0_LO	0x1544	atl1e.h
25662	REG_HOST_RXF0_PAGE1_LO	0x1548	atl1e.h
25663	REG_TPD_BASE_ADDR_LO	0x154C	atl1e.h
25664	REG_RXF1_BASE_ADDR_HI	0x1550	atl1e.h
25665	REG_RXF2_BASE_ADDR_HI	0x1554	atl1e.h
25666	REG_HOST_RXFPAGE_SIZE	0x1558	atl1e.h
25667	REG_TPD_RING_SIZE	0x155C	atl1e.h
25668	REG_RSS_KEY0	0x14B0	atl1e.h
25669	REG_RSS_KEY1	0x14B4	atl1e.h
25670	REG_RSS_KEY2	0x14B8	atl1e.h
25671	REG_RSS_KEY3	0x14BC	atl1e.h
25672	REG_RSS_KEY4	0x14C0	atl1e.h
25673	REG_RSS_KEY5	0x14C4	atl1e.h
25674	REG_RSS_KEY6	0x14C8	atl1e.h
25675	REG_RSS_KEY7	0x14CC	atl1e.h
25676	REG_RSS_KEY8	0x14D0	atl1e.h
25677	REG_RSS_KEY9	0x14D4	atl1e.h
25678	REG_IDT_TABLE4	0x14E0	atl1e.h
25679	REG_IDT_TABLE5	0x14E4	atl1e.h
25680	REG_IDT_TABLE6	0x14E8	atl1e.h
25681	REG_IDT_TABLE7	0x14EC	atl1e.h
25682	REG_IDT_TABLE0	0x1560	atl1e.h
25683	REG_IDT_TABLE1	0x1564	atl1e.h
25684	REG_IDT_TABLE2	0x1568	atl1e.h
25685	REG_IDT_TABLE3	0x156C	atl1e.h
25686	REG_IDT_TABLE	REG_IDT_TABLE0	atl1e.h
25687	REG_RSS_HASH_VALUE	0x1570	atl1e.h
25688	REG_RSS_HASH_FLAG	0x1574	atl1e.h
25689	REG_BASE_CPU_NUMBER	0x157C	atl1e.h
25690	REG_TXQ_CTRL	0x1580	atl1e.h
25691	TXQ_CTRL_NUM_TPD_BURST_MASK	0xF	atl1e.h
25692	TXQ_CTRL_NUM_TPD_BURST_SHIFT	0	atl1e.h
25693	TXQ_CTRL_EN	0x20	atl1e.h	1: Enable TXQ
25694	TXQ_CTRL_ENH_MODE	0x40	atl1e.h	Performance enhancement mode, in which up to two back-to-back DMA read commands might be dispatched.
25695	TXQ_CTRL_TXF_BURST_NUM_SHIFT	16	atl1e.h	Number of data byte to read in a cache-aligned burst. Each SRAM entry is 8-byte in length.
25696	TXQ_CTRL_TXF_BURST_NUM_MASK	0xffff	atl1e.h
25697	REG_TX_EARLY_TH	0x1584	atl1e.h	Jumbo frame threshold in QWORD unit. Packet greater than
25698	TX_TX_EARLY_TH_MASK	0x7ff	atl1e.h
25699	TX_TX_EARLY_TH_SHIFT	0	atl1e.h
25700	REG_RXQ_CTRL	0x15A0	atl1e.h
25701	RXQ_CTRL_PBA_ALIGN_32	0	atl1e.h	rx-packet alignment
25702	RXQ_CTRL_PBA_ALIGN_64	1	atl1e.h
25703	RXQ_CTRL_PBA_ALIGN_128	2	atl1e.h
25704	RXQ_CTRL_PBA_ALIGN_256	3	atl1e.h
25705	RXQ_CTRL_Q1_EN	0x10	atl1e.h
25706	RXQ_CTRL_Q2_EN	0x20	atl1e.h
25707	RXQ_CTRL_Q3_EN	0x40	atl1e.h
25708	RXQ_CTRL_IPV6_XSUM_VERIFY_EN	0x80	atl1e.h
25709	RXQ_CTRL_HASH_TLEN_SHIFT	8	atl1e.h
25710	RXQ_CTRL_HASH_TLEN_MASK	0xFF	atl1e.h
25711	RXQ_CTRL_HASH_TYPE_IPV4	0x10000	atl1e.h
25712	RXQ_CTRL_HASH_TYPE_IPV4_TCP	0x20000	atl1e.h
25713	RXQ_CTRL_HASH_TYPE_IPV6	0x40000	atl1e.h
25714	RXQ_CTRL_HASH_TYPE_IPV6_TCP	0x80000	atl1e.h
25715	RXQ_CTRL_RSS_MODE_DISABLE	0	atl1e.h
25716	RXQ_CTRL_RSS_MODE_SQSINT	0x4000000	atl1e.h
25717	RXQ_CTRL_RSS_MODE_MQUESINT	0x8000000	atl1e.h
25718	RXQ_CTRL_RSS_MODE_MQUEMINT	0xC000000	atl1e.h
25719	RXQ_CTRL_NIP_QUEUE_SEL_TBL	0x10000000	atl1e.h
25720	RXQ_CTRL_HASH_ENABLE	0x20000000	atl1e.h
25721	RXQ_CTRL_CUT_THRU_EN	0x40000000	atl1e.h
25722	RXQ_CTRL_EN	0x80000000	atl1e.h
25723	REG_RXQ_JMBOSZ_RRDTIM	0x15A4	atl1e.h
25724	RXQ_JMBOSZ_TH_MASK	0x7ff	atl1e.h
25725	RXQ_JMBOSZ_TH_SHIFT	0	atl1e.h	RRD retirement timer. Decrement by 1 after every 512ns passes
25726	RXQ_JMBO_LKAH_MASK	0xf	atl1e.h
25727	RXQ_JMBO_LKAH_SHIFT	11	atl1e.h
25728	REG_RXQ_RXF_PAUSE_THRESH	0x15A8	atl1e.h
25729	RXQ_RXF_PAUSE_TH_HI_SHIFT	0	atl1e.h
25730	RXQ_RXF_PAUSE_TH_HI_MASK	0xfff	atl1e.h
25731	RXQ_RXF_PAUSE_TH_LO_SHIFT	16	atl1e.h
25732	RXQ_RXF_PAUSE_TH_LO_MASK	0xfff	atl1e.h
25733	REG_DMA_CTRL	0x15C0	atl1e.h
25734	DMA_CTRL_DMAR_IN_ORDER	0x1	atl1e.h
25735	DMA_CTRL_DMAR_ENH_ORDER	0x2	atl1e.h
25736	DMA_CTRL_DMAR_OUT_ORDER	0x4	atl1e.h
25737	DMA_CTRL_RCB_VALUE	0x8	atl1e.h
25738	DMA_CTRL_DMAR_BURST_LEN_SHIFT	4	atl1e.h
25739	DMA_CTRL_DMAR_BURST_LEN_MASK	7	atl1e.h
25740	DMA_CTRL_DMAW_BURST_LEN_SHIFT	7	atl1e.h
25741	DMA_CTRL_DMAW_BURST_LEN_MASK	7	atl1e.h
25742	DMA_CTRL_DMAR_REQ_PRI	0x400	atl1e.h
25743	DMA_CTRL_DMAR_DLY_CNT_MASK	0x1F	atl1e.h
25744	DMA_CTRL_DMAR_DLY_CNT_SHIFT	11	atl1e.h
25745	DMA_CTRL_DMAW_DLY_CNT_MASK	0xF	atl1e.h
25746	DMA_CTRL_DMAW_DLY_CNT_SHIFT	16	atl1e.h
25747	DMA_CTRL_TXCMB_EN	0x100000	atl1e.h
25748	DMA_CTRL_RXCMB_EN	0x200000	atl1e.h
25749	REG_SMB_STAT_TIMER	0x15C4	atl1e.h
25750	REG_TRIG_RRD_THRESH	0x15CA	atl1e.h
25751	REG_TRIG_TPD_THRESH	0x15C8	atl1e.h
25752	REG_TRIG_TXTIMER	0x15CC	atl1e.h
25753	REG_TRIG_RXTIMER	0x15CE	atl1e.h
25754	REG_HOST_RXF1_PAGE0_LO	0x15D0	atl1e.h
25755	REG_HOST_RXF1_PAGE1_LO	0x15D4	atl1e.h
25756	REG_HOST_RXF2_PAGE0_LO	0x15D8	atl1e.h
25757	REG_HOST_RXF2_PAGE1_LO	0x15DC	atl1e.h
25758	REG_HOST_RXF3_PAGE0_LO	0x15E0	atl1e.h
25759	REG_HOST_RXF3_PAGE1_LO	0x15E4	atl1e.h
25760	REG_MB_RXF1_RADDR	0x15B4	atl1e.h
25761	REG_MB_RXF2_RADDR	0x15B8	atl1e.h
25762	REG_MB_RXF3_RADDR	0x15BC	atl1e.h
25763	REG_MB_TPD_PROD_IDX	0x15F0	atl1e.h
25764	REG_HOST_RXF0_PAGE0_VLD	0x15F4	atl1e.h
25765	HOST_RXF_VALID	1	atl1e.h
25766	HOST_RXF_PAGENO_SHIFT	1	atl1e.h
25767	HOST_RXF_PAGENO_MASK	0x7F	atl1e.h
25768	REG_HOST_RXF0_PAGE1_VLD	0x15F5	atl1e.h
25769	REG_HOST_RXF1_PAGE0_VLD	0x15F6	atl1e.h
25770	REG_HOST_RXF1_PAGE1_VLD	0x15F7	atl1e.h
25771	REG_HOST_RXF2_PAGE0_VLD	0x15F8	atl1e.h
25772	REG_HOST_RXF2_PAGE1_VLD	0x15F9	atl1e.h
25773	REG_HOST_RXF3_PAGE0_VLD	0x15FA	atl1e.h
25774	REG_HOST_RXF3_PAGE1_VLD	0x15FB	atl1e.h
25775	REG_ISR	0x1600	atl1e.h
25776	ISR_SMB	1	atl1e.h
25777	ISR_TIMER	2	atl1e.h	Interrupt when Timer is counted down to zero
25778	ISR_MANUAL	4	atl1e.h
25779	ISR_HW_RXF_OV	8	atl1e.h	RXF overflow interrupt
25780	ISR_HOST_RXF0_OV	0x10	atl1e.h
25781	ISR_HOST_RXF1_OV	0x20	atl1e.h
25782	ISR_HOST_RXF2_OV	0x40	atl1e.h
25783	ISR_HOST_RXF3_OV	0x80	atl1e.h
25784	ISR_TXF_UN	0x100	atl1e.h
25785	ISR_RX0_PAGE_FULL	0x200	atl1e.h
25786	ISR_DMAR_TO_RST	0x400	atl1e.h
25787	ISR_DMAW_TO_RST	0x800	atl1e.h
25788	ISR_GPHY	0x1000	atl1e.h
25789	ISR_TX_CREDIT	0x2000	atl1e.h
25790	ISR_GPHY_LPW	0x4000	atl1e.h	GPHY low power state interrupt
25791	ISR_RX_PKT	0x10000	atl1e.h	One packet received, triggered by RFD
25792	ISR_TX_PKT	0x20000	atl1e.h	One packet transmitted, triggered by TPD
25793	ISR_TX_DMA	0x40000	atl1e.h
25794	ISR_RX_PKT_1	0x80000	atl1e.h
25795	ISR_RX_PKT_2	0x100000	atl1e.h
25796	ISR_RX_PKT_3	0x200000	atl1e.h
25797	ISR_MAC_RX	0x400000	atl1e.h
25798	ISR_MAC_TX	0x800000	atl1e.h
25799	ISR_UR_DETECTED	0x1000000	atl1e.h
25800	ISR_FERR_DETECTED	0x2000000	atl1e.h
25801	ISR_NFERR_DETECTED	0x4000000	atl1e.h
25802	ISR_CERR_DETECTED	0x8000000	atl1e.h
25803	ISR_PHY_LINKDOWN	0x10000000	atl1e.h
25804	ISR_DIS_INT	0x80000000	atl1e.h
25805	REG_IMR	0x1604	atl1e.h
25806	IMR_NORMAL_MASK	(\ ISR_SMB \|\ ISR_TXF_UN \|\ ISR_HW_RXF_OV \|\ ISR_HOST_RXF0_OV\|\ ISR_MANUAL \|\ ISR_GPHY \|\ ISR_GPHY_L	atl1e.h
25807	ISR_TX_EVENT	(ISR_TXF_UN \| ISR_TX_PKT)	atl1e.h
25808	ISR_RX_EVENT	(ISR_HOST_RXF0_OV \| ISR_HW_RXF_OV \| ISR_RX_PKT)	atl1e.h
25809	REG_MAC_RX_STATUS_BIN	0x1700	atl1e.h
25810	REG_MAC_RX_STATUS_END	0x175c	atl1e.h
25811	REG_MAC_TX_STATUS_BIN	0x1760	atl1e.h
25812	REG_MAC_TX_STATUS_END	0x17c0	atl1e.h
25813	REG_HOST_RXF0_PAGEOFF	0x1800	atl1e.h
25814	REG_TPD_CONS_IDX	0x1804	atl1e.h
25815	REG_HOST_RXF1_PAGEOFF	0x1808	atl1e.h
25816	REG_HOST_RXF2_PAGEOFF	0x180C	atl1e.h
25817	REG_HOST_RXF3_PAGEOFF	0x1810	atl1e.h
25818	REG_HOST_RXF0_MB0_LO	0x1820	atl1e.h
25819	REG_HOST_RXF0_MB1_LO	0x1824	atl1e.h
25820	REG_HOST_RXF1_MB0_LO	0x1828	atl1e.h
25821	REG_HOST_RXF1_MB1_LO	0x182C	atl1e.h
25822	REG_HOST_RXF2_MB0_LO	0x1830	atl1e.h
25823	REG_HOST_RXF2_MB1_LO	0x1834	atl1e.h
25824	REG_HOST_RXF3_MB0_LO	0x1838	atl1e.h
25825	REG_HOST_RXF3_MB1_LO	0x183C	atl1e.h
25826	REG_HOST_TX_CMB_LO	0x1840	atl1e.h
25827	REG_HOST_SMB_ADDR_LO	0x1844	atl1e.h
25828	REG_DEBUG_DATA0	0x1900	atl1e.h
25829	REG_DEBUG_DATA1	0x1904	atl1e.h
25830	MII_BMCR	0x00	atl1e.h
25831	MII_BMSR	0x01	atl1e.h
25832	MII_PHYSID1	0x02	atl1e.h
25833	MII_PHYSID2	0x03	atl1e.h
25834	MII_ADVERTISE	0x04	atl1e.h
25835	MII_LPA	0x05	atl1e.h
25836	MII_EXPANSION	0x06	atl1e.h
25837	MII_AT001_CR	0x09	atl1e.h
25838	MII_AT001_SR	0x0A	atl1e.h
25839	MII_AT001_ESR	0x0F	atl1e.h
25840	MII_AT001_PSCR	0x10	atl1e.h
25841	MII_AT001_PSSR	0x11	atl1e.h
25842	MII_INT_CTRL	0x12	atl1e.h
25843	MII_INT_STATUS	0x13	atl1e.h
25844	MII_SMARTSPEED	0x14	atl1e.h
25845	MII_RERRCOUNTER	0x15	atl1e.h
25846	MII_SREVISION	0x16	atl1e.h
25847	MII_RESV1	0x17	atl1e.h
25848	MII_LBRERROR	0x18	atl1e.h
25849	MII_PHYADDR	0x19	atl1e.h
25850	MII_RESV2	0x1a	atl1e.h
25851	MII_TPISTATUS	0x1b	atl1e.h
25852	MII_NCONFIG	0x1c	atl1e.h
25853	MII_DBG_ADDR	0x1D	atl1e.h
25854	MII_DBG_DATA	0x1E	atl1e.h
25855	MII_CR_SPEED_SELECT_MSB	0x0040	atl1e.h	bits 6,13: 10=1000, 01=100, 00=10
25856	MII_CR_COLL_TEST_ENABLE	0x0080	atl1e.h	Collision test enable
25857	MII_CR_FULL_DUPLEX	0x0100	atl1e.h	FDX =1, half duplex =0
25858	MII_CR_RESTART_AUTO_NEG	0x0200	atl1e.h	Restart auto negotiation
25859	MII_CR_ISOLATE	0x0400	atl1e.h	Isolate PHY from MII
25860	MII_CR_POWER_DOWN	0x0800	atl1e.h	Power down
25861	MII_CR_AUTO_NEG_EN	0x1000	atl1e.h	Auto Neg Enable
25862	MII_CR_SPEED_SELECT_LSB	0x2000	atl1e.h	bits 6,13: 10=1000, 01=100, 00=10
25863	MII_CR_LOOPBACK	0x4000	atl1e.h	0 = normal, 1 = loopback
25864	MII_CR_RESET	0x8000	atl1e.h	0 = normal, 1 = PHY reset
25865	MII_CR_SPEED_MASK	0x2040	atl1e.h
25866	MII_CR_SPEED_1000	0x0040	atl1e.h
25867	MII_CR_SPEED_100	0x2000	atl1e.h
25868	MII_CR_SPEED_10	0x0000	atl1e.h
25869	MII_SR_EXTENDED_CAPS	0x0001	atl1e.h	Extended register capabilities
25870	MII_SR_JABBER_DETECT	0x0002	atl1e.h	Jabber Detected
25871	MII_SR_LINK_STATUS	0x0004	atl1e.h	Link Status 1 = link
25872	MII_SR_AUTONEG_CAPS	0x0008	atl1e.h	Auto Neg Capable
25873	MII_SR_REMOTE_FAULT	0x0010	atl1e.h	Remote Fault Detect
25874	MII_SR_AUTONEG_COMPLETE	0x0020	atl1e.h	Auto Neg Complete
25875	MII_SR_PREAMBLE_SUPPRESS	0x0040	atl1e.h	Preamble may be suppressed
25876	MII_SR_EXTENDED_STATUS	0x0100	atl1e.h	Ext. status info in Reg 0x0F
25877	MII_SR_100T2_HD_CAPS	0x0200	atl1e.h	100T2 Half Duplex Capable
25878	MII_SR_100T2_FD_CAPS	0x0400	atl1e.h	100T2 Full Duplex Capable
25879	MII_SR_10T_HD_CAPS	0x0800	atl1e.h	10T Half Duplex Capable
25880	MII_SR_10T_FD_CAPS	0x1000	atl1e.h	10T Full Duplex Capable
25881	MII_SR_100X_HD_CAPS	0x2000	atl1e.h	100X Half Duplex Capable
25882	MII_SR_100X_FD_CAPS	0x4000	atl1e.h	100X Full Duplex Capable
25883	MII_SR_100T4_CAPS	0x8000	atl1e.h	100T4 Capable
25884	MII_LPA_SLCT	0x001f	atl1e.h	Same as advertise selector
25885	MII_LPA_10HALF	0x0020	atl1e.h	Can do 10mbps half-duplex
25886	MII_LPA_10FULL	0x0040	atl1e.h	Can do 10mbps full-duplex
25887	MII_LPA_100HALF	0x0080	atl1e.h	Can do 100mbps half-duplex
25888	MII_LPA_100FULL	0x0100	atl1e.h	Can do 100mbps full-duplex
25889	MII_LPA_100BASE4	0x0200	atl1e.h	100BASE-T4
25890	MII_LPA_PAUSE	0x0400	atl1e.h	PAUSE
25891	MII_LPA_ASYPAUSE	0x0800	atl1e.h	Asymmetrical PAUSE
25892	MII_LPA_RFAULT	0x2000	atl1e.h	Link partner faulted
25893	MII_LPA_LPACK	0x4000	atl1e.h	Link partner acked us
25894	MII_LPA_NPAGE	0x8000	atl1e.h	Next page bit
25895	MII_AR_SELECTOR_FIELD	0x0001	atl1e.h	indicates IEEE 802.3 CSMA/CD
25896	MII_AR_10T_HD_CAPS	0x0020	atl1e.h	10T Half Duplex Capable
25897	MII_AR_10T_FD_CAPS	0x0040	atl1e.h	10T Full Duplex Capable
25898	MII_AR_100TX_HD_CAPS	0x0080	atl1e.h	100TX Half Duplex Capable
25899	MII_AR_100TX_FD_CAPS	0x0100	atl1e.h	100TX Full Duplex Capable
25900	MII_AR_100T4_CAPS	0x0200	atl1e.h	100T4 Capable
25901	MII_AR_PAUSE	0x0400	atl1e.h	Pause operation desired
25902	MII_AR_ASM_DIR	0x0800	atl1e.h	Asymmetric Pause Direction bit
25903	MII_AR_REMOTE_FAULT	0x2000	atl1e.h	Remote Fault detected
25904	MII_AR_NEXT_PAGE	0x8000	atl1e.h	Next Page ability supported
25905	MII_AR_SPEED_MASK	0x01E0	atl1e.h
25906	MII_AR_DEFAULT_CAP_MASK	0x0DE0	atl1e.h
25907	MII_AT001_CR_1000T_HD_CAPS	0x0100	atl1e.h	Advertise 1000T HD capability
25908	MII_AT001_CR_1000T_FD_CAPS	0x0200	atl1e.h	Advertise 1000T FD capability
25909	MII_AT001_CR_1000T_REPEATER_DTE	0x0400	atl1e.h	1=Repeater/switch device port
25910	MII_AT001_CR_1000T_MS_VALUE	0x0800	atl1e.h	1=Configure PHY as Master
25911	MII_AT001_CR_1000T_MS_ENABLE	0x1000	atl1e.h	1=Master/Slave manual config value
25912	MII_AT001_CR_1000T_TEST_MODE_NO	0x0000	atl1e.h	Normal Operation
25913	MII_AT001_CR_1000T_TEST_MODE_1	0x2000	atl1e.h	Transmit Waveform test
25914	MII_AT001_CR_1000T_TEST_MODE_2	0x4000	atl1e.h	Master Transmit Jitter test
25915	MII_AT001_CR_1000T_TEST_MODE_3	0x6000	atl1e.h	Slave Transmit Jitter test
25916	MII_AT001_CR_1000T_TEST_MODE_4	0x8000	atl1e.h	Transmitter Distortion test
25917	MII_AT001_CR_1000T_SPEED_MASK	0x0300	atl1e.h
25918	MII_AT001_CR_1000T_DEFAULT_CAP_	0x0300	atl1e.h
25919	MII_AT001_SR_1000T_LP_HD_CAPS	0x0400	atl1e.h	LP is 1000T HD capable
25920	MII_AT001_SR_1000T_LP_FD_CAPS	0x0800	atl1e.h	LP is 1000T FD capable
25921	MII_AT001_SR_1000T_REMOTE_RX_ST	0x1000	atl1e.h	Remote receiver OK
25922	MII_AT001_SR_1000T_LOCAL_RX_STA	0x2000	atl1e.h	Local receiver OK
25923	MII_AT001_SR_1000T_MS_CONFIG_RE	0x4000	atl1e.h	1=Local TX is Master, 0=Slave
25924	MII_AT001_SR_1000T_MS_CONFIG_FA	0x8000	atl1e.h	Master/Slave config fault
25925	MII_AT001_SR_1000T_REMOTE_RX_ST	12	atl1e.h
25926	MII_AT001_SR_1000T_LOCAL_RX_STA	13	atl1e.h
25927	MII_AT001_ESR_1000T_HD_CAPS	0x1000	atl1e.h	1000T HD capable
25928	MII_AT001_ESR_1000T_FD_CAPS	0x2000	atl1e.h	1000T FD capable
25929	MII_AT001_ESR_1000X_HD_CAPS	0x4000	atl1e.h	1000X HD capable
25930	MII_AT001_ESR_1000X_FD_CAPS	0x8000	atl1e.h	1000X FD capable
25931	MII_AT001_PSCR_JABBER_DISABLE	0x0001	atl1e.h	1=Jabber Function disabled
25932	MII_AT001_PSCR_POLARITY_REVERSA	0x0002	atl1e.h	1=Polarity Reversal enabled
25933	MII_AT001_PSCR_SQE_TEST	0x0004	atl1e.h	1=SQE Test enabled
25934	MII_AT001_PSCR_MAC_POWERDOWN	0x0008	atl1e.h
25935	MII_AT001_PSCR_CLK125_DISABLE	0x0010	atl1e.h	1=CLK125 low,
25936	MII_AT001_PSCR_MDI_MANUAL_MODE	0x0000	atl1e.h	MDI Crossover Mode bits 6:5
25937	MII_AT001_PSCR_MDIX_MANUAL_MODE	0x0020	atl1e.h	Manual MDIX configuration
25938	MII_AT001_PSCR_AUTO_X_1000T	0x0040	atl1e.h	1000BASE-T: Auto crossover,
25939	MII_AT001_PSCR_AUTO_X_MODE	0x0060	atl1e.h	Auto crossover enabled
25940	MII_AT001_PSCR_10BT_EXT_DIST_EN	0x0080	atl1e.h
25941	MII_AT001_PSCR_MII_5BIT_ENABLE	0x0100	atl1e.h
25942	MII_AT001_PSCR_SCRAMBLER_DISABL	0x0200	atl1e.h	1=Scrambler disable
25943	MII_AT001_PSCR_FORCE_LINK_GOOD	0x0400	atl1e.h	1=Force link good
25944	MII_AT001_PSCR_ASSERT_CRS_ON_TX	0x0800	atl1e.h	1=Assert CRS on Transmit
25945	MII_AT001_PSCR_POLARITY_REVERSA	1	atl1e.h
25946	MII_AT001_PSCR_AUTO_X_MODE_SHIF	5	atl1e.h
25947	MII_AT001_PSCR_10BT_EXT_DIST_EN	7	atl1e.h
25948	MII_AT001_PSSR_SPD_DPLX_RESOLVE	0x0800	atl1e.h	1=Speed & Duplex resolved
25949	MII_AT001_PSSR_DPLX	0x2000	atl1e.h	1=Duplex 0=Half Duplex
25950	MII_AT001_PSSR_SPEED	0xC000	atl1e.h	Speed, bits 14:15
25951	MII_AT001_PSSR_10MBS	0x0000	atl1e.h	00=10Mbs
25952	MII_AT001_PSSR_100MBS	0x4000	atl1e.h	01=100Mbs
25953	MII_AT001_PSSR_1000MBS	0x8000	atl1e.h	10=1000Mbs
25954	B44_DEVCTRL	0x0000UL	b44.h	Device Control
25955	DEVCTRL_MPM	0x00000040	b44.h	MP PME Enable (B0 only)
25956	DEVCTRL_PFE	0x00000080	b44.h	Pattern Filtering Enable
25957	DEVCTRL_IPP	0x00000400	b44.h	Internal EPHY Present
25958	DEVCTRL_EPR	0x00008000	b44.h	EPHY Reset
25959	DEVCTRL_PME	0x00001000	b44.h	PHY Mode Enable
25960	DEVCTRL_PMCE	0x00002000	b44.h	PHY Mode Clocks Enable
25961	DEVCTRL_PADDR	0x0007c000	b44.h	PHY Address
25962	DEVCTRL_PADDR_SHIFT	18	b44.h
25963	B44_BIST_STAT	0x000CUL	b44.h	Built-In Self-Test Status
25964	B44_WKUP_LEN	0x0010UL	b44.h	Wakeup Length
25965	WKUP_LEN_P0_MASK	0x0000007f	b44.h	Pattern 0
25966	WKUP_LEN_D0	0x00000080	b44.h
25967	WKUP_LEN_P1_MASK	0x00007f00	b44.h	Pattern 1
25968	WKUP_LEN_P1_SHIFT	8	b44.h
25969	WKUP_LEN_D1	0x00008000	b44.h
25970	WKUP_LEN_P2_MASK	0x007f0000	b44.h	Pattern 2
25971	WKUP_LEN_P2_SHIFT	16	b44.h
25972	WKUP_LEN_D2	0x00000000	b44.h
25973	WKUP_LEN_P3_MASK	0x7f000000	b44.h	Pattern 3
25974	WKUP_LEN_P3_SHIFT	24	b44.h
25975	WKUP_LEN_D3	0x80000000	b44.h
25976	WKUP_LEN_DISABLE	0x80808080	b44.h
25977	WKUP_LEN_ENABLE_TWO	0x80800000	b44.h
25978	WKUP_LEN_ENABLE_THREE	0x80000000	b44.h
25979	B44_ISTAT	0x0020UL	b44.h	Interrupt Status
25980	ISTAT_LS	0x00000020	b44.h	Link Change (B0 only)
25981	ISTAT_PME	0x00000040	b44.h	Power Management Event
25982	ISTAT_TO	0x00000080	b44.h	General Purpose Timeout
25983	ISTAT_DSCE	0x00000400	b44.h	Descriptor Error
25984	ISTAT_DATAE	0x00000800	b44.h	Data Error
25985	ISTAT_DPE	0x00001000	b44.h	Descr. Protocol Error
25986	ISTAT_RDU	0x00002000	b44.h	Receive Descr. Underflow
25987	ISTAT_RFO	0x00004000	b44.h	Receive FIFO Overflow
25988	ISTAT_TFU	0x00008000	b44.h	Transmit FIFO Underflow
25989	ISTAT_RX	0x00010000	b44.h	RX Interrupt
25990	ISTAT_TX	0x01000000	b44.h	TX Interrupt
25991	ISTAT_EMAC	0x04000000	b44.h	EMAC Interrupt
25992	ISTAT_MII_WRITE	0x08000000	b44.h	MII Write Interrupt
25993	ISTAT_MII_READ	0x10000000	b44.h	MII Read Interrupt
25994	ISTAT_ERRORS	(ISTAT_DSCE\|ISTAT_DATAE\|ISTAT_DPE\|\ ISTAT_RDU\|ISTAT_RFO\|ISTAT_TFU)	b44.h
25995	B44_IMASK	0x0024UL	b44.h	Interrupt Mask
25996	IMASK_DEF	(ISTAT_ERRORS \| ISTAT_RX \| ISTAT_TX)	b44.h
25997	IMASK_DISABLE	0	b44.h
25998	B44_GPTIMER	0x0028UL	b44.h	General Purpose Timer
25999	B44_ADDR_LO	0x0088UL	b44.h	ENET Address Lo (B0 only)
26000	B44_ADDR_HI	0x008CUL	b44.h	ENET Address Hi (B0 only)
26001	B44_FILT_ADDR	0x0090UL	b44.h	ENET Filter Address
26002	B44_FILT_DATA	0x0094UL	b44.h	ENET Filter Data
26003	B44_TXBURST	0x00A0UL	b44.h	TX Max Burst Length
26004	B44_RXBURST	0x00A4UL	b44.h	RX Max Burst Length
26005	B44_MAC_CTRL	0x00A8UL	b44.h	MAC Control
26006	MAC_CTRL_CRC32_ENAB	0x00000001	b44.h	CRC32 Generation Enable
26007	MAC_CTRL_PHY_PDOWN	0x00000004	b44.h	Onchip EPHY Powerdown
26008	MAC_CTRL_PHY_EDET	0x00000008	b44.h	Onchip EPHY Energy Detected
26009	MAC_CTRL_PHY_LEDCTRL	0x000000e0	b44.h	Onchip EPHY LED Control
26010	MAC_CTRL_PHY_LEDCTRL_SHIFT	5	b44.h
26011	B44_MAC_FLOW	0x00ACUL	b44.h	MAC Flow Control
26012	MAC_FLOW_RX_HI_WATER	0x000000ff	b44.h	Receive FIFO HI Water Mark
26013	MAC_FLOW_PAUSE_ENAB	0x00008000	b44.h	Enbl Pause Frm Generation
26014	B44_RCV_LAZY	0x0100UL	b44.h	Lazy Interrupt Control
26015	RCV_LAZY_TO_MASK	0x00ffffff	b44.h	Timeout
26016	RCV_LAZY_FC_MASK	0xff000000	b44.h	Frame Count
26017	RCV_LAZY_FC_SHIFT	24	b44.h
26018	B44_DMATX_CTRL	0x0200UL	b44.h	DMA TX Control
26019	DMATX_CTRL_ENABLE	0x00000001	b44.h	Enable
26020	DMATX_CTRL_SUSPEND	0x00000002	b44.h	Suepend Request
26021	DMATX_CTRL_LPBACK	0x00000004	b44.h	Loopback Enable
26022	DMATX_CTRL_FAIRPRIOR	0x00000008	b44.h	Fair Priority
26023	DMATX_CTRL_FLUSH	0x00000010	b44.h	Flush Request
26024	B44_DMATX_ADDR	0x0204UL	b44.h	DMA TX Descriptor Ring Addr
26025	B44_DMATX_PTR	0x0208UL	b44.h	DMA TX Last Posted Desc.
26026	B44_DMATX_STAT	0x020CUL	b44.h	DMA TX Cur Actve Desc. + Sts
26027	DMATX_STAT_CDMASK	0x00000fff	b44.h	Current Descriptor Mask
26028	DMATX_STAT_SMASK	0x0000f000	b44.h	State Mask
26029	DMATX_STAT_SDISABLED	0x00000000	b44.h	State Disabled
26030	DMATX_STAT_SACTIVE	0x00001000	b44.h	State Active
26031	DMATX_STAT_SIDLE	0x00002000	b44.h	State Idle Wait
26032	DMATX_STAT_SSTOPPED	0x00003000	b44.h	State Stopped
26033	DMATX_STAT_SSUSP	0x00004000	b44.h	State Suspend Pending
26034	DMATX_STAT_EMASK	0x000f0000	b44.h	Error Mask
26035	DMATX_STAT_ENONE	0x00000000	b44.h	Error None
26036	DMATX_STAT_EDPE	0x00010000	b44.h	Error Desc. Protocol Error
26037	DMATX_STAT_EDFU	0x00020000	b44.h	Error Data FIFO Underrun
26038	DMATX_STAT_EBEBR	0x00030000	b44.h	Bus Error on Buffer Read
26039	DMATX_STAT_EBEDA	0x00040000	b44.h	Bus Error on Desc. Access
26040	DMATX_STAT_FLUSHED	0x00100000	b44.h	Flushed
26041	B44_DMARX_CTRL	0x0210UL	b44.h	DMA RX Control
26042	DMARX_CTRL_ENABLE	0x00000001	b44.h	Enable
26043	DMARX_CTRL_ROMASK	0x000000fe	b44.h	Receive Offset Mask
26044	DMARX_CTRL_ROSHIFT	1	b44.h	Receive Offset Shift
26045	B44_DMARX_ADDR	0x0214UL	b44.h	DMA RX Descriptor Ring Addr
26046	B44_DMARX_PTR	0x0218UL	b44.h	DMA RX Last Posted Desc
26047	B44_DMARX_STAT	0x021CUL	b44.h	Cur Active Desc. + Status
26048	DMARX_STAT_CDMASK	0x00000fff	b44.h	Current Descriptor Mask
26049	DMARX_STAT_SMASK	0x0000f000	b44.h	State Mask
26050	DMARX_STAT_SDISABLED	0x00000000	b44.h	State Disbaled
26051	DMARX_STAT_SACTIVE	0x00001000	b44.h	State Active
26052	DMARX_STAT_SIDLE	0x00002000	b44.h	State Idle Wait
26053	DMARX_STAT_SSTOPPED	0x00003000	b44.h	State Stopped
26054	DMARX_STAT_EMASK	0x000f0000	b44.h	Error Mask
26055	DMARX_STAT_ENONE	0x00000000	b44.h	Error None
26056	DMARX_STAT_EDPE	0x00010000	b44.h	Error Desc. Protocol Error
26057	DMARX_STAT_EDFO	0x00020000	b44.h	Error Data FIFO Overflow
26058	DMARX_STAT_EBEBW	0x00030000	b44.h	Error on Buffer Write
26059	DMARX_STAT_EBEDA	0x00040000	b44.h	Bus Error on Desc. Access
26060	B44_DMAFIFO_AD	0x0220UL	b44.h	DMA FIFO Diag Address
26061	DMAFIFO_AD_OMASK	0x0000ffff	b44.h	Offset Mask
26062	DMAFIFO_AD_SMASK	0x000f0000	b44.h	Select Mask
26063	DMAFIFO_AD_SXDD	0x00000000	b44.h	Select Transmit DMA Data
26064	DMAFIFO_AD_SXDP	0x00010000	b44.h	Sel Transmit DMA Pointers
26065	DMAFIFO_AD_SRDD	0x00040000	b44.h	Select Receive DMA Data
26066	DMAFIFO_AD_SRDP	0x00050000	b44.h	Sel Receive DMA Pointers
26067	DMAFIFO_AD_SXFD	0x00080000	b44.h	Select Transmit FIFO Data
26068	DMAFIFO_AD_SXFP	0x00090000	b44.h	Sel Transmit FIFO Pointers
26069	DMAFIFO_AD_SRFD	0x000c0000	b44.h	Select Receive FIFO Data
26070	DMAFIFO_AD_SRFP	0x000c0000	b44.h	Sel Receive FIFO Pointers
26071	B44_DMAFIFO_LO	0x0224UL	b44.h	DMA FIFO Diag Low Data
26072	B44_DMAFIFO_HI	0x0228UL	b44.h	DMA FIFO Diag High Data
26073	B44_RXCONFIG	0x0400UL	b44.h	EMAC RX Config
26074	RXCONFIG_DBCAST	0x00000001	b44.h	Disable Broadcast
26075	RXCONFIG_ALLMULTI	0x00000002	b44.h	Accept All Multicast
26076	RXCONFIG_NORX_WHILE_TX	0x00000004	b44.h	Rcv Disble While TX
26077	RXCONFIG_PROMISC	0x00000008	b44.h	Promiscuous Enable
26078	RXCONFIG_LPBACK	0x00000010	b44.h	Loopback Enable
26079	RXCONFIG_FLOW	0x00000020	b44.h	Flow Control Enable
26080	RXCONFIG_FLOW_ACCEPT	0x00000040	b44.h	Accept UFC Frame
26081	RXCONFIG_RFILT	0x00000080	b44.h	Reject Filter
26082	B44_RXMAXLEN	0x0404UL	b44.h	EMAC RX Max Packet Length
26083	B44_TXMAXLEN	0x0408UL	b44.h	EMAC TX Max Packet Length
26084	B44_MDIO_CTRL	0x0410UL	b44.h	EMAC MDIO Control
26085	MDIO_CTRL_MAXF_MASK	0x0000007f	b44.h	MDC Frequency
26086	MDIO_CTRL_PREAMBLE	0x00000080	b44.h	MII Preamble Enable
26087	B44_MDIO_DATA	0x0414UL	b44.h	EMAC MDIO Data
26088	MDIO_DATA_DATA	0x0000ffff	b44.h	R/W Data
26089	MDIO_DATA_TA_MASK	0x00030000	b44.h	Turnaround Value
26090	MDIO_DATA_TA_SHIFT	16	b44.h
26091	MDIO_TA_VALID	2	b44.h
26092	MDIO_DATA_RA_MASK	0x007c0000	b44.h	Register Address
26093	MDIO_DATA_RA_SHIFT	18	b44.h
26094	MDIO_DATA_PMD_MASK	0x0f800000	b44.h	Physical Media Device
26095	MDIO_DATA_PMD_SHIFT	23	b44.h
26096	MDIO_DATA_OP_MASK	0x30000000	b44.h	Opcode
26097	MDIO_DATA_OP_SHIFT	28	b44.h
26098	MDIO_OP_WRITE	1	b44.h
26099	MDIO_OP_READ	2	b44.h
26100	MDIO_DATA_SB_MASK	0xc0000000	b44.h	Start Bits
26101	MDIO_DATA_SB_SHIFT	30	b44.h
26102	MDIO_DATA_SB_START	0x40000000	b44.h	Start Of Frame
26103	B44_EMAC_IMASK	0x0418UL	b44.h	EMAC Interrupt Mask
26104	B44_EMAC_ISTAT	0x041CUL	b44.h	EMAC Interrupt Status
26105	EMAC_INT_MII	0x00000001	b44.h	MII MDIO Interrupt
26106	EMAC_INT_MIB	0x00000002	b44.h	MIB Interrupt
26107	EMAC_INT_FLOW	0x00000003	b44.h	Flow Control Interrupt
26108	B44_CAM_DATA_LO	0x0420UL	b44.h	EMAC CAM Data Low
26109	B44_CAM_DATA_HI	0x0424UL	b44.h	EMAC CAM Data High
26110	CAM_DATA_HI_VALID	0x00010000	b44.h	Valid Bit
26111	B44_CAM_CTRL	0x0428UL	b44.h	EMAC CAM Control
26112	CAM_CTRL_ENABLE	0x00000001	b44.h	CAM Enable
26113	CAM_CTRL_MSEL	0x00000002	b44.h	Mask Select
26114	CAM_CTRL_READ	0x00000004	b44.h	Read
26115	CAM_CTRL_WRITE	0x00000008	b44.h	Read
26116	CAM_CTRL_INDEX_MASK	0x003f0000	b44.h	Index Mask
26117	CAM_CTRL_INDEX_SHIFT	16	b44.h
26118	CAM_CTRL_BUSY	0x80000000	b44.h	CAM Busy
26119	B44_ENET_CTRL	0x042CUL	b44.h	EMAC ENET Control
26120	ENET_CTRL_ENABLE	0x00000001	b44.h	EMAC Enable
26121	ENET_CTRL_DISABLE	0x00000002	b44.h	EMAC Disable
26122	ENET_CTRL_SRST	0x00000004	b44.h	EMAC Soft Reset
26123	ENET_CTRL_EPSEL	0x00000008	b44.h	External PHY Select
26124	B44_TX_CTRL	0x0430UL	b44.h	EMAC TX Control
26125	TX_CTRL_DUPLEX	0x00000001	b44.h	Full Duplex
26126	TX_CTRL_FMODE	0x00000002	b44.h	Flow Mode
26127	TX_CTRL_SBENAB	0x00000004	b44.h	Single Backoff Enable
26128	TX_CTRL_SMALL_SLOT	0x00000008	b44.h	Small Slottime
26129	B44_TX_HIWMARK	0x0434UL	b44.h	EMAC TX High Watermark
26130	TX_HIWMARK_DEFLT	56	b44.h	Default used in all drivers
26131	B44_MIB_CTRL	0x0438UL	b44.h	EMAC MIB Control
26132	MIB_CTRL_CLR_ON_READ	0x00000001	b44.h	Autoclear on Read
26133	B44_TX_GOOD_O	0x0500UL	b44.h	MIB TX Good Octets
26134	B44_TX_GOOD_P	0x0504UL	b44.h	MIB TX Good Packets
26135	B44_TX_O	0x0508UL	b44.h	MIB TX Octets
26136	B44_TX_P	0x050CUL	b44.h	MIB TX Packets
26137	B44_TX_BCAST	0x0510UL	b44.h	MIB TX Broadcast Packets
26138	B44_TX_MCAST	0x0514UL	b44.h	MIB TX Multicast Packets
26139	B44_TX_64	0x0518UL	b44.h	MIB TX <= 64 byte Packets
26140	B44_TX_65_127	0x051CUL	b44.h	MIB TX 65 to 127 byte Pkts
26141	B44_TX_128_255	0x0520UL	b44.h	MIB TX 128 to 255 byte Pkts
26142	B44_TX_256_511	0x0524UL	b44.h	MIB TX 256 to 511 byte Pkts
26143	B44_TX_512_1023	0x0528UL	b44.h	MIB TX 512 to 1023 byte Pkts
26144	B44_TX_1024_MAX	0x052CUL	b44.h	MIB TX 1024 to max byte Pkts
26145	B44_TX_JABBER	0x0530UL	b44.h	MIB TX Jabber Packets
26146	B44_TX_OSIZE	0x0534UL	b44.h	MIB TX Oversize Packets
26147	B44_TX_FRAG	0x0538UL	b44.h	MIB TX Fragment Packets
26148	B44_TX_URUNS	0x053CUL	b44.h	MIB TX Underruns
26149	B44_TX_TCOLS	0x0540UL	b44.h	MIB TX Total Collisions
26150	B44_TX_SCOLS	0x0544UL	b44.h	MIB TX Single Collisions
26151	B44_TX_MCOLS	0x0548UL	b44.h	MIB TX Multiple Collisions
26152	B44_TX_ECOLS	0x054CUL	b44.h	MIB TX Excessive Collisions
26153	B44_TX_LCOLS	0x0550UL	b44.h	MIB TX Late Collisions
26154	B44_TX_DEFERED	0x0554UL	b44.h	MIB TX Defered Packets
26155	B44_TX_CLOST	0x0558UL	b44.h	MIB TX Carrier Lost
26156	B44_TX_PAUSE	0x055CUL	b44.h	MIB TX Pause Packets
26157	B44_RX_GOOD_O	0x0580UL	b44.h	MIB RX Good Octets
26158	B44_RX_GOOD_P	0x0584UL	b44.h	MIB RX Good Packets
26159	B44_RX_O	0x0588UL	b44.h	MIB RX Octets
26160	B44_RX_P	0x058CUL	b44.h	MIB RX Packets
26161	B44_RX_BCAST	0x0590UL	b44.h	MIB RX Broadcast Packets
26162	B44_RX_MCAST	0x0594UL	b44.h	MIB RX Multicast Packets
26163	B44_RX_64	0x0598UL	b44.h	MIB RX <= 64 byte Packets
26164	B44_RX_65_127	0x059CUL	b44.h	MIB RX 65 to 127 byte Pkts
26165	B44_RX_128_255	0x05A0UL	b44.h	MIB RX 128 to 255 byte Pkts
26166	B44_RX_256_511	0x05A4UL	b44.h	MIB RX 256 to 511 byte Pkts
26167	B44_RX_512_1023	0x05A8UL	b44.h	MIB RX 512 to 1023 byte Pkts
26168	B44_RX_1024_MAX	0x05ACUL	b44.h	MIB RX 1024 to max byte Pkts
26169	B44_RX_JABBER	0x05B0UL	b44.h	MIB RX Jabber Packets
26170	B44_RX_OSIZE	0x05B4UL	b44.h	MIB RX Oversize Packets
26171	B44_RX_FRAG	0x05B8UL	b44.h	MIB RX Fragment Packets
26172	B44_RX_MISS	0x05BCUL	b44.h	MIB RX Missed Packets
26173	B44_RX_CRCA	0x05C0UL	b44.h	MIB RX CRC Align Errors
26174	B44_RX_USIZE	0x05C4UL	b44.h	MIB RX Undersize Packets
26175	B44_RX_CRC	0x05C8UL	b44.h	MIB RX CRC Errors
26176	B44_RX_ALIGN	0x05CCUL	b44.h	MIB RX Align Errors
26177	B44_RX_SYM	0x05D0UL	b44.h	MIB RX Symbol Errors
26178	B44_RX_PAUSE	0x05D4UL	b44.h	MIB RX Pause Packets
26179	B44_RX_NPAUSE	0x05D8UL	b44.h	MIB RX Non-Pause Packets
26180	B44_SBIMSTATE	0x0F90UL	b44.h	SB Initiator Agent State
26181	SBIMSTATE_PC	0x0000000f	b44.h	Pipe Count
26182	SBIMSTATE_AP_MASK	0x00000030	b44.h	Arbitration Priority
26183	SBIMSTATE_AP_BOTH	0x00000000	b44.h	both timeslices and token
26184	SBIMSTATE_AP_TS	0x00000010	b44.h	Use timeslices only
26185	SBIMSTATE_AP_TK	0x00000020	b44.h	Use token only
26186	SBIMSTATE_AP_RSV	0x00000030	b44.h	Reserved
26187	SBIMSTATE_IBE	0x00020000	b44.h	In Band Error
26188	SBIMSTATE_TO	0x00040000	b44.h	Timeout
26189	SBIMSTATE_BAD	( SBIMSTATE_IBE \| SBIMSTATE_TO )	b44.h
26190	B44_SBINTVEC	0x0F94UL	b44.h	SB Interrupt Mask
26191	SBINTVEC_PCI	0x00000001	b44.h	Enable interrupts for PCI
26192	SBINTVEC_ENET0	0x00000002	b44.h	Enable ints for enet 0
26193	SBINTVEC_ILINE20	0x00000004	b44.h	Enable ints for iline20
26194	SBINTVEC_CODEC	0x00000008	b44.h	Enable ints for v90 codec
26195	SBINTVEC_USB	0x00000010	b44.h	Enable intts for usb
26196	SBINTVEC_EXTIF	0x00000020	b44.h	Enable ints for ext i/f
26197	SBINTVEC_ENET1	0x00000040	b44.h	Enable ints for enet 1
26198	B44_SBTMSLOW	0x0F98UL	b44.h	SB Target State Low
26199	SBTMSLOW_RESET	0x00000001	b44.h	Reset
26200	SBTMSLOW_REJECT	0x00000002	b44.h	Reject
26201	SBTMSLOW_CLOCK	0x00010000	b44.h	Clock Enable
26202	SBTMSLOW_FGC	0x00020000	b44.h	Force Gated Clocks On
26203	SBTMSLOW_PE	0x40000000	b44.h	Power Management Enable
26204	SBTMSLOW_BE	0x80000000	b44.h	BIST Enable
26205	B44_SBTMSHIGH	0x0F9CUL	b44.h	SB Target State High
26206	SBTMSHIGH_SERR	0x00000001	b44.h	S-error
26207	SBTMSHIGH_INT	0x00000002	b44.h	Interrupt
26208	SBTMSHIGH_BUSY	0x00000004	b44.h	Busy
26209	SBTMSHIGH_GCR	0x20000000	b44.h	Gated Clock Request
26210	SBTMSHIGH_BISTF	0x40000000	b44.h	BIST Failed
26211	SBTMSHIGH_BISTD	0x80000000	b44.h	BIST Done
26212	B44_SBIDHIGH	0x0FFCUL	b44.h	SB Identification High
26213	SBIDHIGH_RC_MASK	0x0000000f	b44.h	Revision Code
26214	SBIDHIGH_CC_MASK	0x0000fff0	b44.h	Core Code
26215	SBIDHIGH_CC_SHIFT	4	b44.h
26216	SBIDHIGH_VC_MASK	0xffff0000	b44.h	Vendor Code
26217	SBIDHIGH_VC_SHIFT	16	b44.h
26218	SSB_PMCSR	0x44	b44.h
26219	SSB_PE	0x100	b44.h
26220	SSB_BAR0_WIN	0x80	b44.h
26221	SSB_BAR1_WIN	0x84	b44.h
26222	SSB_SPROM_CONTROL	0x88	b44.h
26223	SSB_BAR1_CONTROL	0x8c	b44.h
26224	SSB_CONTROL	0x0000UL	b44.h
26225	SSB_ARBCONTROL	0x0010UL	b44.h
26226	SSB_ISTAT	0x0020UL	b44.h
26227	SSB_IMASK	0x0024UL	b44.h
26228	SSB_MBOX	0x0028UL	b44.h
26229	SSB_BCAST_ADDR	0x0050UL	b44.h
26230	SSB_BCAST_DATA	0x0054UL	b44.h
26231	SSB_PCI_TRANS_0	0x0100UL	b44.h
26232	SSB_PCI_TRANS_1	0x0104UL	b44.h
26233	SSB_PCI_TRANS_2	0x0108UL	b44.h
26234	SSB_SPROM	0x0800UL	b44.h
26235	SSB_PCI_MEM	0x00000000	b44.h
26236	SSB_PCI_IO	0x00000001	b44.h
26237	SSB_PCI_CFG0	0x00000002	b44.h
26238	SSB_PCI_CFG1	0x00000003	b44.h
26239	SSB_PCI_PREF	0x00000004	b44.h
26240	SSB_PCI_BURST	0x00000008	b44.h
26241	SSB_PCI_MASK0	0xfc000000	b44.h
26242	SSB_PCI_MASK1	0xfc000000	b44.h
26243	SSB_PCI_MASK2	0xc0000000	b44.h
26244	B44_MII_AUXCTRL	24	b44.h	Auxiliary Control
26245	MII_AUXCTRL_DUPLEX	0x0001	b44.h	Full Duplex
26246	MII_AUXCTRL_SPEED	0x0002	b44.h	1=100Mbps, 0=10Mbps
26247	MII_AUXCTRL_FORCED	0x0004	b44.h	Forced 10/100
26248	B44_MII_ALEDCTRL	26	b44.h	Activity LED
26249	MII_ALEDCTRL_ALLMSK	0x7fff	b44.h
26250	B44_MII_TLEDCTRL	27	b44.h	Traffic Meter LED
26251	MII_TLEDCTRL_ENABLE	0x0040	b44.h
26252	B44_DMA_ALIGNMENT	4096	b44.h
26253	B44_30BIT_DMA_MASK	0x3fffffff	b44.h
26254	DESC_CTRL_LEN	0x00001fff	b44.h
26255	DESC_CTRL_CMASK	0x0ff00000	b44.h	Core specific bits
26256	DESC_CTRL_EOT	0x10000000	b44.h	End of Table
26257	DESC_CTRL_IOC	0x20000000	b44.h	Interrupt On Completion
26258	DESC_CTRL_EOF	0x40000000	b44.h	End of Frame
26259	DESC_CTRL_SOF	0x80000000	b44.h	Start of Frame
26260	RX_HEADER_LEN	28	b44.h
26261	RX_FLAG_OFIFO	0x00000001	b44.h	FIFO Overflow
26262	RX_FLAG_CRCERR	0x00000002	b44.h	CRC Error
26263	RX_FLAG_SERR	0x00000004	b44.h	Receive Symbol Error
26264	RX_FLAG_ODD	0x00000008	b44.h	Frame has odd number of nibbles
26265	RX_FLAG_LARGE	0x00000010	b44.h	Frame is > RX MAX Length
26266	RX_FLAG_MCAST	0x00000020	b44.h	Dest is Multicast Address
26267	RX_FLAG_BCAST	0x00000040	b44.h	Dest is Broadcast Address
26268	RX_FLAG_MISS	0x00000080	b44.h	Received due to promisc mode
26269	RX_FLAG_LAST	0x00000800	b44.h	Last buffer in frame
26270	RX_FLAG_ERRORS	(RX_FLAG_ODD \| RX_FLAG_SERR \|\ RX_FLAG_CRCERR \| RX_FLAG_OFIFO)	b44.h
26271	SB_PCI_DMA	0x40000000	b44.h
26272	BCM4400_PCI_CORE_ADDR	0x18002000	b44.h
26273	B44_MIN_MTU	60	b44.h
26274	B44_MAX_MTU	1500	b44.h
26275	B44_RING_SIZE	8	b44.h
26276	B44_RING_LAST	( B44_RING_SIZE - 1 )	b44.h
26277	B44_RX_RING_LEN_BYTES	( sizeof bp->rx[0] * B44_RING_SIZE )	b44.h
26278	B44_TX_RING_LEN_BYTES	( sizeof bp->tx[0] * B44_RING_SIZE )	b44.h
26279	RX_PKT_OFFSET	30	b44.h
26280	RX_PKT_BUF_SZ	(1536 + RX_PKT_OFFSET + 64)	b44.h
26281	B44_FULL_RESET	1	b44.h
26282	B44_FULL_RESET_SKIP_PHY	2	b44.h
26283	B44_PARTIAL_RESET	3	b44.h
26284	B44_CHIP_RESET_FULL	4	b44.h
26285	B44_CHIP_RESET_PARTIAL	5	b44.h
26286	SSB_CORE_DOWN	( SBTMSLOW_RESET \| SBTMSLOW_REJECT )	b44.h
26287	B44_REGS_SIZE	8192	b44.h
26288	L1_CACHE_BYTES	128	bnx2.h	Rough approximaition of the cache line size
26289	PCI_D0	((pci_power_t) 0)	bnx2.h
26290	PCI_D1	((pci_power_t) 1)	bnx2.h
26291	PCI_D2	((pci_power_t) 2)	bnx2.h
26292	PCI_D3hot	((pci_power_t) 3)	bnx2.h
26293	PCI_D3cold	((pci_power_t) 4)	bnx2.h
26294	PCI_UNKNOWN	((pci_power_t) 5)	bnx2.h
26295	PCI_POWER_ERROR	((pci_power_t) -1)	bnx2.h
26296	PCI_CAP_ID_PCIX	0x07	bnx2.h	PCI-X
26297	PCI_X_CMD	2	bnx2.h	Modes & Features
26298	PCI_X_CMD_ERO	0x0002	bnx2.h	Enable Relaxed Ordering
26299	ADVERTISED_10baseT_Half	(1 << 0)	bnx2.h
26300	ADVERTISED_10baseT_Full	(1 << 1)	bnx2.h
26301	ADVERTISED_100baseT_Half	(1 << 2)	bnx2.h
26302	ADVERTISED_100baseT_Full	(1 << 3)	bnx2.h
26303	ADVERTISED_1000baseT_Half	(1 << 4)	bnx2.h
26304	ADVERTISED_1000baseT_Full	(1 << 5)	bnx2.h
26305	ADVERTISED_Autoneg	(1 << 6)	bnx2.h
26306	ADVERTISED_TP	(1 << 7)	bnx2.h
26307	ADVERTISED_AUI	(1 << 8)	bnx2.h
26308	ADVERTISED_MII	(1 << 9)	bnx2.h
26309	ADVERTISED_FIBRE	(1 << 10)	bnx2.h
26310	ADVERTISED_BNC	(1 << 11)	bnx2.h
26311	DUPLEX_HALF	0x00	bnx2.h
26312	DUPLEX_FULL	0x01	bnx2.h
26313	DUPLEX_INVALID	0x02	bnx2.h
26314	PORT_TP	0x00	bnx2.h
26315	PORT_AUI	0x01	bnx2.h
26316	PORT_MII	0x02	bnx2.h
26317	PORT_FIBRE	0x03	bnx2.h
26318	PORT_BNC	0x04	bnx2.h
26319	XCVR_INTERNAL	0x00	bnx2.h
26320	XCVR_EXTERNAL	0x01	bnx2.h
26321	XCVR_DUMMY1	0x02	bnx2.h
26322	XCVR_DUMMY2	0x03	bnx2.h
26323	XCVR_DUMMY3	0x04	bnx2.h
26324	AUTONEG_DISABLE	0x00	bnx2.h
26325	AUTONEG_ENABLE	0x01	bnx2.h
26326	WAKE_PHY	(1 << 0)	bnx2.h
26327	WAKE_UCAST	(1 << 1)	bnx2.h
26328	WAKE_MCAST	(1 << 2)	bnx2.h
26329	WAKE_BCAST	(1 << 3)	bnx2.h
26330	WAKE_ARP	(1 << 4)	bnx2.h
26331	WAKE_MAGIC	(1 << 5)	bnx2.h
26332	WAKE_MAGICSECURE	(1 << 6)	bnx2.h	only meaningful if WAKE_MAGIC
26333	SPEED_10	10	bnx2.h
26334	SPEED_100	100	bnx2.h
26335	SPEED_1000	1000	bnx2.h
26336	SPEED_2500	2500	bnx2.h
26337	SPEED_INVALID	0	bnx2.h	XXX was 3
26338	DUPLEX_HALF	0x00	bnx2.h
26339	DUPLEX_FULL	0x01	bnx2.h
26340	DUPLEX_INVALID	0x02	bnx2.h
26341	PORT_TP	0x00	bnx2.h
26342	PORT_AUI	0x01	bnx2.h
26343	PORT_MII	0x02	bnx2.h
26344	PORT_FIBRE	0x03	bnx2.h
26345	PORT_BNC	0x04	bnx2.h
26346	XCVR_INTERNAL	0x00	bnx2.h
26347	XCVR_EXTERNAL	0x01	bnx2.h
26348	XCVR_DUMMY1	0x02	bnx2.h
26349	XCVR_DUMMY2	0x03	bnx2.h
26350	XCVR_DUMMY3	0x04	bnx2.h
26351	AUTONEG_DISABLE	0x00	bnx2.h
26352	AUTONEG_ENABLE	0x01	bnx2.h
26353	WAKE_PHY	(1 << 0)	bnx2.h
26354	WAKE_UCAST	(1 << 1)	bnx2.h
26355	WAKE_MCAST	(1 << 2)	bnx2.h
26356	WAKE_BCAST	(1 << 3)	bnx2.h
26357	WAKE_ARP	(1 << 4)	bnx2.h
26358	WAKE_MAGIC	(1 << 5)	bnx2.h
26359	WAKE_MAGICSECURE	(1 << 6)	bnx2.h	only meaningful if WAKE_MAGIC
26360	BNX2_L2CTX_TYPE	0x00000000	bnx2.h
26361	BNX2_L2CTX_TYPE_SIZE_L2	((0xc0/0x20)<<16)	bnx2.h
26362	BNX2_L2CTX_TYPE_TYPE	(0xf<<28)	bnx2.h
26363	BNX2_L2CTX_TYPE_TYPE_EMPTY	(0<<28)	bnx2.h
26364	BNX2_L2CTX_TYPE_TYPE_L2	(1<<28)	bnx2.h
26365	BNX2_L2CTX_TX_HOST_BIDX	0x00000088	bnx2.h
26366	BNX2_L2CTX_EST_NBD	0x00000088	bnx2.h
26367	BNX2_L2CTX_CMD_TYPE	0x00000088	bnx2.h
26368	BNX2_L2CTX_CMD_TYPE_TYPE	(0xf<<24)	bnx2.h
26369	BNX2_L2CTX_CMD_TYPE_TYPE_L2	(0<<24)	bnx2.h
26370	BNX2_L2CTX_CMD_TYPE_TYPE_TCP	(1<<24)	bnx2.h
26371	BNX2_L2CTX_TX_HOST_BSEQ	0x00000090	bnx2.h
26372	BNX2_L2CTX_TSCH_BSEQ	0x00000094	bnx2.h
26373	BNX2_L2CTX_TBDR_BSEQ	0x00000098	bnx2.h
26374	BNX2_L2CTX_TBDR_BOFF	0x0000009c	bnx2.h
26375	BNX2_L2CTX_TBDR_BIDX	0x0000009c	bnx2.h
26376	BNX2_L2CTX_TBDR_BHADDR_HI	0x000000a0	bnx2.h
26377	BNX2_L2CTX_TBDR_BHADDR_LO	0x000000a4	bnx2.h
26378	BNX2_L2CTX_TXP_BOFF	0x000000a8	bnx2.h
26379	BNX2_L2CTX_TXP_BIDX	0x000000a8	bnx2.h
26380	BNX2_L2CTX_TXP_BSEQ	0x000000ac	bnx2.h
26381	BNX2_L2CTX_BD_PRE_READ	0x00000000	bnx2.h
26382	BNX2_L2CTX_CTX_SIZE	0x00000000	bnx2.h
26383	BNX2_L2CTX_CTX_TYPE	0x00000000	bnx2.h
26384	BNX2_L2CTX_CTX_TYPE_SIZE_L2	((0x20/20)<<16)	bnx2.h
26385	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(0xf<<28)	bnx2.h
26386	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(0<<28)	bnx2.h
26387	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(1<<28)	bnx2.h
26388	BNX2_L2CTX_HOST_BDIDX	0x00000004	bnx2.h
26389	BNX2_L2CTX_HOST_BSEQ	0x00000008	bnx2.h
26390	BNX2_L2CTX_NX_BSEQ	0x0000000c	bnx2.h
26391	BNX2_L2CTX_NX_BDHADDR_HI	0x00000010	bnx2.h
26392	BNX2_L2CTX_NX_BDHADDR_LO	0x00000014	bnx2.h
26393	BNX2_L2CTX_NX_BDIDX	0x00000018	bnx2.h
26394	BNX2_PCICFG_MISC_CONFIG	0x00000068	bnx2.h
26395	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<2)	bnx2.h
26396	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<3)	bnx2.h
26397	BNX2_PCICFG_MISC_CONFIG_CLOCK_C	(1L<<5)	bnx2.h
26398	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<6)	bnx2.h
26399	BNX2_PCICFG_MISC_CONFIG_REG_WIN	(1L<<7)	bnx2.h
26400	BNX2_PCICFG_MISC_CONFIG_CORE_RS	(1L<<8)	bnx2.h
26401	BNX2_PCICFG_MISC_CONFIG_CORE_RS	(1L<<9)	bnx2.h
26402	BNX2_PCICFG_MISC_CONFIG_ASIC_ME	(0xffL<<16)	bnx2.h
26403	BNX2_PCICFG_MISC_CONFIG_ASIC_BA	(0xfL<<24)	bnx2.h
26404	BNX2_PCICFG_MISC_CONFIG_ASIC_ID	(0xfL<<28)	bnx2.h
26405	BNX2_PCICFG_MISC_STATUS	0x0000006c	bnx2.h
26406	BNX2_PCICFG_MISC_STATUS_INTA_VA	(1L<<0)	bnx2.h
26407	BNX2_PCICFG_MISC_STATUS_32BIT_D	(1L<<1)	bnx2.h
26408	BNX2_PCICFG_MISC_STATUS_M66EN	(1L<<2)	bnx2.h
26409	BNX2_PCICFG_MISC_STATUS_PCIX_DE	(1L<<3)	bnx2.h
26410	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(0x3L<<4)	bnx2.h
26411	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(0L<<4)	bnx2.h
26412	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(1L<<4)	bnx2.h
26413	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(2L<<4)	bnx2.h
26414	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(3L<<4)	bnx2.h
26415	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	0x00000070	bnx2.h
26416	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<0)	bnx2.h
26417	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<0)	bnx2.h
26418	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<0)	bnx2.h
26419	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<0)	bnx2.h
26420	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(3L<<0)	bnx2.h
26421	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<0)	bnx2.h
26422	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(5L<<0)	bnx2.h
26423	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(6L<<0)	bnx2.h
26424	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(7L<<0)	bnx2.h
26425	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<0)	bnx2.h
26426	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<6)	bnx2.h
26427	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<7)	bnx2.h
26428	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0x7L<<8)	bnx2.h
26429	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<8)	bnx2.h
26430	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<8)	bnx2.h
26431	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<8)	bnx2.h
26432	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<8)	bnx2.h
26433	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<11)	bnx2.h
26434	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<12)	bnx2.h
26435	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<12)	bnx2.h
26436	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<12)	bnx2.h
26437	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<12)	bnx2.h
26438	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<12)	bnx2.h
26439	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(8L<<12)	bnx2.h
26440	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<16)	bnx2.h
26441	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<17)	bnx2.h
26442	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<18)	bnx2.h
26443	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<19)	bnx2.h
26444	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfffL<<20)	bnx2.h
26445	BNX2_PCICFG_REG_WINDOW_ADDRESS	0x00000078	bnx2.h
26446	BNX2_PCICFG_REG_WINDOW	0x00000080	bnx2.h
26447	BNX2_PCICFG_INT_ACK_CMD	0x00000084	bnx2.h
26448	BNX2_PCICFG_INT_ACK_CMD_INDEX	(0xffffL<<0)	bnx2.h
26449	BNX2_PCICFG_INT_ACK_CMD_INDEX_V	(1L<<16)	bnx2.h
26450	BNX2_PCICFG_INT_ACK_CMD_USE_INT	(1L<<17)	bnx2.h
26451	BNX2_PCICFG_INT_ACK_CMD_MASK_IN	(1L<<18)	bnx2.h
26452	BNX2_PCICFG_STATUS_BIT_SET_CMD	0x00000088	bnx2.h
26453	BNX2_PCICFG_STATUS_BIT_CLEAR_CM	0x0000008c	bnx2.h
26454	BNX2_PCICFG_MAILBOX_QUEUE_ADDR	0x00000090	bnx2.h
26455	BNX2_PCICFG_MAILBOX_QUEUE_DATA	0x00000094	bnx2.h
26456	BNX2_PCI_GRC_WINDOW_ADDR	0x00000400	bnx2.h
26457	BNX2_PCI_GRC_WINDOW_ADDR_PCI_GR	(0x3ffffL<<8)	bnx2.h
26458	BNX2_PCI_CONFIG_1	0x00000404	bnx2.h
26459	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(0x7L<<8)	bnx2.h
26460	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(0L<<8)	bnx2.h
26461	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(1L<<8)	bnx2.h
26462	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(2L<<8)	bnx2.h
26463	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(3L<<8)	bnx2.h
26464	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(4L<<8)	bnx2.h
26465	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(5L<<8)	bnx2.h
26466	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(6L<<8)	bnx2.h
26467	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(7L<<8)	bnx2.h
26468	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(0x7L<<11)	bnx2.h
26469	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(0L<<11)	bnx2.h
26470	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(1L<<11)	bnx2.h
26471	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(2L<<11)	bnx2.h
26472	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(3L<<11)	bnx2.h
26473	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(4L<<11)	bnx2.h
26474	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(5L<<11)	bnx2.h
26475	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(6L<<11)	bnx2.h
26476	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(7L<<11)	bnx2.h
26477	BNX2_PCI_CONFIG_2	0x00000408	bnx2.h
26478	BNX2_PCI_CONFIG_2_BAR1_SIZE	(0xfL<<0)	bnx2.h
26479	BNX2_PCI_CONFIG_2_BAR1_SIZE_DIS	(0L<<0)	bnx2.h
26480	BNX2_PCI_CONFIG_2_BAR1_SIZE_64K	(1L<<0)	bnx2.h
26481	BNX2_PCI_CONFIG_2_BAR1_SIZE_128	(2L<<0)	bnx2.h
26482	BNX2_PCI_CONFIG_2_BAR1_SIZE_256	(3L<<0)	bnx2.h
26483	BNX2_PCI_CONFIG_2_BAR1_SIZE_512	(4L<<0)	bnx2.h
26484	BNX2_PCI_CONFIG_2_BAR1_SIZE_1M	(5L<<0)	bnx2.h
26485	BNX2_PCI_CONFIG_2_BAR1_SIZE_2M	(6L<<0)	bnx2.h
26486	BNX2_PCI_CONFIG_2_BAR1_SIZE_4M	(7L<<0)	bnx2.h
26487	BNX2_PCI_CONFIG_2_BAR1_SIZE_8M	(8L<<0)	bnx2.h
26488	BNX2_PCI_CONFIG_2_BAR1_SIZE_16M	(9L<<0)	bnx2.h
26489	BNX2_PCI_CONFIG_2_BAR1_SIZE_32M	(10L<<0)	bnx2.h
26490	BNX2_PCI_CONFIG_2_BAR1_SIZE_64M	(11L<<0)	bnx2.h
26491	BNX2_PCI_CONFIG_2_BAR1_SIZE_128	(12L<<0)	bnx2.h
26492	BNX2_PCI_CONFIG_2_BAR1_SIZE_256	(13L<<0)	bnx2.h
26493	BNX2_PCI_CONFIG_2_BAR1_SIZE_512	(14L<<0)	bnx2.h
26494	BNX2_PCI_CONFIG_2_BAR1_SIZE_1G	(15L<<0)	bnx2.h
26495	BNX2_PCI_CONFIG_2_BAR1_64ENA	(1L<<4)	bnx2.h
26496	BNX2_PCI_CONFIG_2_EXP_ROM_RETRY	(1L<<5)	bnx2.h
26497	BNX2_PCI_CONFIG_2_CFG_CYCLE_RET	(1L<<6)	bnx2.h
26498	BNX2_PCI_CONFIG_2_FIRST_CFG_DON	(1L<<7)	bnx2.h
26499	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE	(0xffL<<8)	bnx2.h
26500	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(0L<<8)	bnx2.h
26501	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(1L<<8)	bnx2.h
26502	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(2L<<8)	bnx2.h
26503	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(3L<<8)	bnx2.h
26504	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(4L<<8)	bnx2.h
26505	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(5L<<8)	bnx2.h
26506	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(6L<<8)	bnx2.h
26507	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(7L<<8)	bnx2.h
26508	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(8L<<8)	bnx2.h
26509	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(9L<<8)	bnx2.h
26510	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(10L<<8)	bnx2.h
26511	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(11L<<8)	bnx2.h
26512	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(12L<<8)	bnx2.h
26513	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(13L<<8)	bnx2.h
26514	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(14L<<8)	bnx2.h
26515	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(15L<<8)	bnx2.h
26516	BNX2_PCI_CONFIG_2_MAX_SPLIT_LIM	(0x1fL<<16)	bnx2.h
26517	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(0x3L<<21)	bnx2.h
26518	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(0L<<21)	bnx2.h
26519	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(1L<<21)	bnx2.h
26520	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(2L<<21)	bnx2.h
26521	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(3L<<21)	bnx2.h
26522	BNX2_PCI_CONFIG_2_FORCE_32_BIT_	(1L<<23)	bnx2.h
26523	BNX2_PCI_CONFIG_2_FORCE_32_BIT_	(1L<<24)	bnx2.h
26524	BNX2_PCI_CONFIG_2_KEEP_REQ_ASSE	(1L<<25)	bnx2.h
26525	BNX2_PCI_CONFIG_3	0x0000040c	bnx2.h
26526	BNX2_PCI_CONFIG_3_STICKY_BYTE	(0xffL<<0)	bnx2.h
26527	BNX2_PCI_CONFIG_3_FORCE_PME	(1L<<24)	bnx2.h
26528	BNX2_PCI_CONFIG_3_PME_STATUS	(1L<<25)	bnx2.h
26529	BNX2_PCI_CONFIG_3_PME_ENABLE	(1L<<26)	bnx2.h
26530	BNX2_PCI_CONFIG_3_PM_STATE	(0x3L<<27)	bnx2.h
26531	BNX2_PCI_CONFIG_3_VAUX_PRESET	(1L<<30)	bnx2.h
26532	BNX2_PCI_CONFIG_3_PCI_POWER	(1L<<31)	bnx2.h
26533	BNX2_PCI_PM_DATA_A	0x00000410	bnx2.h
26534	BNX2_PCI_PM_DATA_A_PM_DATA_0_PR	(0xffL<<0)	bnx2.h
26535	BNX2_PCI_PM_DATA_A_PM_DATA_1_PR	(0xffL<<8)	bnx2.h
26536	BNX2_PCI_PM_DATA_A_PM_DATA_2_PR	(0xffL<<16)	bnx2.h
26537	BNX2_PCI_PM_DATA_A_PM_DATA_3_PR	(0xffL<<24)	bnx2.h
26538	BNX2_PCI_PM_DATA_B	0x00000414	bnx2.h
26539	BNX2_PCI_PM_DATA_B_PM_DATA_4_PR	(0xffL<<0)	bnx2.h
26540	BNX2_PCI_PM_DATA_B_PM_DATA_5_PR	(0xffL<<8)	bnx2.h
26541	BNX2_PCI_PM_DATA_B_PM_DATA_6_PR	(0xffL<<16)	bnx2.h
26542	BNX2_PCI_PM_DATA_B_PM_DATA_7_PR	(0xffL<<24)	bnx2.h
26543	BNX2_PCI_SWAP_DIAG0	0x00000418	bnx2.h
26544	BNX2_PCI_SWAP_DIAG1	0x0000041c	bnx2.h
26545	BNX2_PCI_EXP_ROM_ADDR	0x00000420	bnx2.h
26546	BNX2_PCI_EXP_ROM_ADDR_ADDRESS	(0x3fffffL<<2)	bnx2.h
26547	BNX2_PCI_EXP_ROM_ADDR_REQ	(1L<<31)	bnx2.h
26548	BNX2_PCI_EXP_ROM_DATA	0x00000424	bnx2.h
26549	BNX2_PCI_VPD_INTF	0x00000428	bnx2.h
26550	BNX2_PCI_VPD_INTF_INTF_REQ	(1L<<0)	bnx2.h
26551	BNX2_PCI_VPD_ADDR_FLAG	0x0000042c	bnx2.h
26552	BNX2_PCI_VPD_ADDR_FLAG_ADDRESS	(0x1fff<<2)	bnx2.h
26553	BNX2_PCI_VPD_ADDR_FLAG_WR	(1<<15)	bnx2.h
26554	BNX2_PCI_VPD_DATA	0x00000430	bnx2.h
26555	BNX2_PCI_ID_VAL1	0x00000434	bnx2.h
26556	BNX2_PCI_ID_VAL1_DEVICE_ID	(0xffffL<<0)	bnx2.h
26557	BNX2_PCI_ID_VAL1_VENDOR_ID	(0xffffL<<16)	bnx2.h
26558	BNX2_PCI_ID_VAL2	0x00000438	bnx2.h
26559	BNX2_PCI_ID_VAL2_SUBSYSTEM_VEND	(0xffffL<<0)	bnx2.h
26560	BNX2_PCI_ID_VAL2_SUBSYSTEM_ID	(0xffffL<<16)	bnx2.h
26561	BNX2_PCI_ID_VAL3	0x0000043c	bnx2.h
26562	BNX2_PCI_ID_VAL3_CLASS_CODE	(0xffffffL<<0)	bnx2.h
26563	BNX2_PCI_ID_VAL3_REVISION_ID	(0xffL<<24)	bnx2.h
26564	BNX2_PCI_ID_VAL4	0x00000440	bnx2.h
26565	BNX2_PCI_ID_VAL4_CAP_ENA	(0xfL<<0)	bnx2.h
26566	BNX2_PCI_ID_VAL4_CAP_ENA_0	(0L<<0)	bnx2.h
26567	BNX2_PCI_ID_VAL4_CAP_ENA_1	(1L<<0)	bnx2.h
26568	BNX2_PCI_ID_VAL4_CAP_ENA_2	(2L<<0)	bnx2.h
26569	BNX2_PCI_ID_VAL4_CAP_ENA_3	(3L<<0)	bnx2.h
26570	BNX2_PCI_ID_VAL4_CAP_ENA_4	(4L<<0)	bnx2.h
26571	BNX2_PCI_ID_VAL4_CAP_ENA_5	(5L<<0)	bnx2.h
26572	BNX2_PCI_ID_VAL4_CAP_ENA_6	(6L<<0)	bnx2.h
26573	BNX2_PCI_ID_VAL4_CAP_ENA_7	(7L<<0)	bnx2.h
26574	BNX2_PCI_ID_VAL4_CAP_ENA_8	(8L<<0)	bnx2.h
26575	BNX2_PCI_ID_VAL4_CAP_ENA_9	(9L<<0)	bnx2.h
26576	BNX2_PCI_ID_VAL4_CAP_ENA_10	(10L<<0)	bnx2.h
26577	BNX2_PCI_ID_VAL4_CAP_ENA_11	(11L<<0)	bnx2.h
26578	BNX2_PCI_ID_VAL4_CAP_ENA_12	(12L<<0)	bnx2.h
26579	BNX2_PCI_ID_VAL4_CAP_ENA_13	(13L<<0)	bnx2.h
26580	BNX2_PCI_ID_VAL4_CAP_ENA_14	(14L<<0)	bnx2.h
26581	BNX2_PCI_ID_VAL4_CAP_ENA_15	(15L<<0)	bnx2.h
26582	BNX2_PCI_ID_VAL4_PM_SCALE_PRG	(0x3L<<6)	bnx2.h
26583	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0	(0L<<6)	bnx2.h
26584	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1	(1L<<6)	bnx2.h
26585	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2	(2L<<6)	bnx2.h
26586	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3	(3L<<6)	bnx2.h
26587	BNX2_PCI_ID_VAL4_MSI_LIMIT	(0x7L<<9)	bnx2.h
26588	BNX2_PCI_ID_VAL4_MSI_ADVERTIZE	(0x7L<<12)	bnx2.h
26589	BNX2_PCI_ID_VAL4_MSI_ENABLE	(1L<<15)	bnx2.h
26590	BNX2_PCI_ID_VAL4_MAX_64_ADVERTI	(1L<<16)	bnx2.h
26591	BNX2_PCI_ID_VAL4_MAX_133_ADVERT	(1L<<17)	bnx2.h
26592	BNX2_PCI_ID_VAL4_MAX_MEM_READ_S	(0x3L<<21)	bnx2.h
26593	BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE	(0x7L<<23)	bnx2.h
26594	BNX2_PCI_ID_VAL4_MAX_CUMULATIVE	(0x7L<<26)	bnx2.h
26595	BNX2_PCI_ID_VAL5	0x00000444	bnx2.h
26596	BNX2_PCI_ID_VAL5_D1_SUPPORT	(1L<<0)	bnx2.h
26597	BNX2_PCI_ID_VAL5_D2_SUPPORT	(1L<<1)	bnx2.h
26598	BNX2_PCI_ID_VAL5_PME_IN_D0	(1L<<2)	bnx2.h
26599	BNX2_PCI_ID_VAL5_PME_IN_D1	(1L<<3)	bnx2.h
26600	BNX2_PCI_ID_VAL5_PME_IN_D2	(1L<<4)	bnx2.h
26601	BNX2_PCI_ID_VAL5_PME_IN_D3_HOT	(1L<<5)	bnx2.h
26602	BNX2_PCI_PCIX_EXTENDED_STATUS	0x00000448	bnx2.h
26603	BNX2_PCI_PCIX_EXTENDED_STATUS_N	(1L<<8)	bnx2.h
26604	BNX2_PCI_PCIX_EXTENDED_STATUS_L	(1L<<9)	bnx2.h
26605	BNX2_PCI_PCIX_EXTENDED_STATUS_S	(0xfL<<16)	bnx2.h
26606	BNX2_PCI_PCIX_EXTENDED_STATUS_S	(0xffL<<24)	bnx2.h
26607	BNX2_PCI_ID_VAL6	0x0000044c	bnx2.h
26608	BNX2_PCI_ID_VAL6_MAX_LAT	(0xffL<<0)	bnx2.h
26609	BNX2_PCI_ID_VAL6_MIN_GNT	(0xffL<<8)	bnx2.h
26610	BNX2_PCI_ID_VAL6_BIST	(0xffL<<16)	bnx2.h
26611	BNX2_PCI_MSI_DATA	0x00000450	bnx2.h
26612	BNX2_PCI_MSI_DATA_PCI_MSI_DATA	(0xffffL<<0)	bnx2.h
26613	BNX2_PCI_MSI_ADDR_H	0x00000454	bnx2.h
26614	BNX2_PCI_MSI_ADDR_L	0x00000458	bnx2.h
26615	BNX2_MISC_COMMAND	0x00000800	bnx2.h
26616	BNX2_MISC_COMMAND_ENABLE_ALL	(1L<<0)	bnx2.h
26617	BNX2_MISC_COMMAND_DISABLE_ALL	(1L<<1)	bnx2.h
26618	BNX2_MISC_COMMAND_CORE_RESET	(1L<<4)	bnx2.h
26619	BNX2_MISC_COMMAND_HARD_RESET	(1L<<5)	bnx2.h
26620	BNX2_MISC_COMMAND_PAR_ERROR	(1L<<8)	bnx2.h
26621	BNX2_MISC_COMMAND_PAR_ERR_RAM	(0x7fL<<16)	bnx2.h
26622	BNX2_MISC_CFG	0x00000804	bnx2.h
26623	BNX2_MISC_CFG_PCI_GRC_TMOUT	(1L<<0)	bnx2.h
26624	BNX2_MISC_CFG_NVM_WR_EN	(0x3L<<1)	bnx2.h
26625	BNX2_MISC_CFG_NVM_WR_EN_PROTECT	(0L<<1)	bnx2.h
26626	BNX2_MISC_CFG_NVM_WR_EN_PCI	(1L<<1)	bnx2.h
26627	BNX2_MISC_CFG_NVM_WR_EN_ALLOW	(2L<<1)	bnx2.h
26628	BNX2_MISC_CFG_NVM_WR_EN_ALLOW2	(3L<<1)	bnx2.h
26629	BNX2_MISC_CFG_BIST_EN	(1L<<3)	bnx2.h
26630	BNX2_MISC_CFG_CK25_OUT_ALT_SRC	(1L<<4)	bnx2.h
26631	BNX2_MISC_CFG_BYPASS_BSCAN	(1L<<5)	bnx2.h
26632	BNX2_MISC_CFG_BYPASS_EJTAG	(1L<<6)	bnx2.h
26633	BNX2_MISC_CFG_CLK_CTL_OVERRIDE	(1L<<7)	bnx2.h
26634	BNX2_MISC_CFG_LEDMODE	(0x3L<<8)	bnx2.h
26635	BNX2_MISC_CFG_LEDMODE_MAC	(0L<<8)	bnx2.h
26636	BNX2_MISC_CFG_LEDMODE_GPHY1	(1L<<8)	bnx2.h
26637	BNX2_MISC_CFG_LEDMODE_GPHY2	(2L<<8)	bnx2.h
26638	BNX2_MISC_ID	0x00000808	bnx2.h
26639	BNX2_MISC_ID_BOND_ID	(0xfL<<0)	bnx2.h
26640	BNX2_MISC_ID_CHIP_METAL	(0xffL<<4)	bnx2.h
26641	BNX2_MISC_ID_CHIP_REV	(0xfL<<12)	bnx2.h
26642	BNX2_MISC_ID_CHIP_NUM	(0xffffL<<16)	bnx2.h
26643	BNX2_MISC_ENABLE_STATUS_BITS	0x0000080c	bnx2.h
26644	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<0)	bnx2.h
26645	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<1)	bnx2.h
26646	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<2)	bnx2.h
26647	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<3)	bnx2.h
26648	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<4)	bnx2.h
26649	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<5)	bnx2.h
26650	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<6)	bnx2.h
26651	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<7)	bnx2.h
26652	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<8)	bnx2.h
26653	BNX2_MISC_ENABLE_STATUS_BITS_EM	(1L<<9)	bnx2.h
26654	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<10)	bnx2.h
26655	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<11)	bnx2.h
26656	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<12)	bnx2.h
26657	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<13)	bnx2.h
26658	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<14)	bnx2.h
26659	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<15)	bnx2.h
26660	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<16)	bnx2.h
26661	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<17)	bnx2.h
26662	BNX2_MISC_ENABLE_STATUS_BITS_CO	(1L<<18)	bnx2.h
26663	BNX2_MISC_ENABLE_STATUS_BITS_HO	(1L<<19)	bnx2.h
26664	BNX2_MISC_ENABLE_STATUS_BITS_MA	(1L<<20)	bnx2.h
26665	BNX2_MISC_ENABLE_STATUS_BITS_CO	(1L<<21)	bnx2.h
26666	BNX2_MISC_ENABLE_STATUS_BITS_CM	(1L<<22)	bnx2.h
26667	BNX2_MISC_ENABLE_STATUS_BITS_CM	(1L<<23)	bnx2.h
26668	BNX2_MISC_ENABLE_STATUS_BITS_MG	(1L<<24)	bnx2.h
26669	BNX2_MISC_ENABLE_STATUS_BITS_TI	(1L<<25)	bnx2.h
26670	BNX2_MISC_ENABLE_STATUS_BITS_DM	(1L<<26)	bnx2.h
26671	BNX2_MISC_ENABLE_STATUS_BITS_UM	(1L<<27)	bnx2.h
26672	BNX2_MISC_ENABLE_SET_BITS	0x00000810	bnx2.h
26673	BNX2_MISC_ENABLE_SET_BITS_TX_SC	(1L<<0)	bnx2.h
26674	BNX2_MISC_ENABLE_SET_BITS_TX_BD	(1L<<1)	bnx2.h
26675	BNX2_MISC_ENABLE_SET_BITS_TX_BD	(1L<<2)	bnx2.h
26676	BNX2_MISC_ENABLE_SET_BITS_TX_PR	(1L<<3)	bnx2.h
26677	BNX2_MISC_ENABLE_SET_BITS_TX_DM	(1L<<4)	bnx2.h
26678	BNX2_MISC_ENABLE_SET_BITS_TX_PA	(1L<<5)	bnx2.h
26679	BNX2_MISC_ENABLE_SET_BITS_TX_PA	(1L<<6)	bnx2.h
26680	BNX2_MISC_ENABLE_SET_BITS_TX_HE	(1L<<7)	bnx2.h
26681	BNX2_MISC_ENABLE_SET_BITS_TX_AS	(1L<<8)	bnx2.h
26682	BNX2_MISC_ENABLE_SET_BITS_EMAC_	(1L<<9)	bnx2.h
26683	BNX2_MISC_ENABLE_SET_BITS_RX_PA	(1L<<10)	bnx2.h
26684	BNX2_MISC_ENABLE_SET_BITS_RX_PA	(1L<<11)	bnx2.h
26685	BNX2_MISC_ENABLE_SET_BITS_RX_MB	(1L<<12)	bnx2.h
26686	BNX2_MISC_ENABLE_SET_BITS_RX_LO	(1L<<13)	bnx2.h
26687	BNX2_MISC_ENABLE_SET_BITS_RX_PR	(1L<<14)	bnx2.h
26688	BNX2_MISC_ENABLE_SET_BITS_RX_V2	(1L<<15)	bnx2.h
26689	BNX2_MISC_ENABLE_SET_BITS_RX_BD	(1L<<16)	bnx2.h
26690	BNX2_MISC_ENABLE_SET_BITS_RX_DM	(1L<<17)	bnx2.h
26691	BNX2_MISC_ENABLE_SET_BITS_COMPL	(1L<<18)	bnx2.h
26692	BNX2_MISC_ENABLE_SET_BITS_HOST_	(1L<<19)	bnx2.h
26693	BNX2_MISC_ENABLE_SET_BITS_MAILB	(1L<<20)	bnx2.h
26694	BNX2_MISC_ENABLE_SET_BITS_CONTE	(1L<<21)	bnx2.h
26695	BNX2_MISC_ENABLE_SET_BITS_CMD_S	(1L<<22)	bnx2.h
26696	BNX2_MISC_ENABLE_SET_BITS_CMD_P	(1L<<23)	bnx2.h
26697	BNX2_MISC_ENABLE_SET_BITS_MGMT_	(1L<<24)	bnx2.h
26698	BNX2_MISC_ENABLE_SET_BITS_TIMER	(1L<<25)	bnx2.h
26699	BNX2_MISC_ENABLE_SET_BITS_DMA_E	(1L<<26)	bnx2.h
26700	BNX2_MISC_ENABLE_SET_BITS_UMP_E	(1L<<27)	bnx2.h
26701	BNX2_MISC_ENABLE_CLR_BITS	0x00000814	bnx2.h
26702	BNX2_MISC_ENABLE_CLR_BITS_TX_SC	(1L<<0)	bnx2.h
26703	BNX2_MISC_ENABLE_CLR_BITS_TX_BD	(1L<<1)	bnx2.h
26704	BNX2_MISC_ENABLE_CLR_BITS_TX_BD	(1L<<2)	bnx2.h
26705	BNX2_MISC_ENABLE_CLR_BITS_TX_PR	(1L<<3)	bnx2.h
26706	BNX2_MISC_ENABLE_CLR_BITS_TX_DM	(1L<<4)	bnx2.h
26707	BNX2_MISC_ENABLE_CLR_BITS_TX_PA	(1L<<5)	bnx2.h
26708	BNX2_MISC_ENABLE_CLR_BITS_TX_PA	(1L<<6)	bnx2.h
26709	BNX2_MISC_ENABLE_CLR_BITS_TX_HE	(1L<<7)	bnx2.h
26710	BNX2_MISC_ENABLE_CLR_BITS_TX_AS	(1L<<8)	bnx2.h
26711	BNX2_MISC_ENABLE_CLR_BITS_EMAC_	(1L<<9)	bnx2.h
26712	BNX2_MISC_ENABLE_CLR_BITS_RX_PA	(1L<<10)	bnx2.h
26713	BNX2_MISC_ENABLE_CLR_BITS_RX_PA	(1L<<11)	bnx2.h
26714	BNX2_MISC_ENABLE_CLR_BITS_RX_MB	(1L<<12)	bnx2.h
26715	BNX2_MISC_ENABLE_CLR_BITS_RX_LO	(1L<<13)	bnx2.h
26716	BNX2_MISC_ENABLE_CLR_BITS_RX_PR	(1L<<14)	bnx2.h
26717	BNX2_MISC_ENABLE_CLR_BITS_RX_V2	(1L<<15)	bnx2.h
26718	BNX2_MISC_ENABLE_CLR_BITS_RX_BD	(1L<<16)	bnx2.h
26719	BNX2_MISC_ENABLE_CLR_BITS_RX_DM	(1L<<17)	bnx2.h
26720	BNX2_MISC_ENABLE_CLR_BITS_COMPL	(1L<<18)	bnx2.h
26721	BNX2_MISC_ENABLE_CLR_BITS_HOST_	(1L<<19)	bnx2.h
26722	BNX2_MISC_ENABLE_CLR_BITS_MAILB	(1L<<20)	bnx2.h
26723	BNX2_MISC_ENABLE_CLR_BITS_CONTE	(1L<<21)	bnx2.h
26724	BNX2_MISC_ENABLE_CLR_BITS_CMD_S	(1L<<22)	bnx2.h
26725	BNX2_MISC_ENABLE_CLR_BITS_CMD_P	(1L<<23)	bnx2.h
26726	BNX2_MISC_ENABLE_CLR_BITS_MGMT_	(1L<<24)	bnx2.h
26727	BNX2_MISC_ENABLE_CLR_BITS_TIMER	(1L<<25)	bnx2.h
26728	BNX2_MISC_ENABLE_CLR_BITS_DMA_E	(1L<<26)	bnx2.h
26729	BNX2_MISC_ENABLE_CLR_BITS_UMP_E	(1L<<27)	bnx2.h
26730	BNX2_MISC_CLOCK_CONTROL_BITS	0x00000818	bnx2.h
26731	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0xfL<<0)	bnx2.h
26732	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0L<<0)	bnx2.h
26733	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(1L<<0)	bnx2.h
26734	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(2L<<0)	bnx2.h
26735	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(3L<<0)	bnx2.h
26736	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(4L<<0)	bnx2.h
26737	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(5L<<0)	bnx2.h
26738	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(6L<<0)	bnx2.h
26739	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(7L<<0)	bnx2.h
26740	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0xfL<<0)	bnx2.h
26741	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<6)	bnx2.h
26742	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<7)	bnx2.h
26743	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0x7L<<8)	bnx2.h
26744	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0L<<8)	bnx2.h
26745	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<8)	bnx2.h
26746	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(2L<<8)	bnx2.h
26747	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(4L<<8)	bnx2.h
26748	BNX2_MISC_CLOCK_CONTROL_BITS_PL	(1L<<11)	bnx2.h
26749	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0xfL<<12)	bnx2.h
26750	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0L<<12)	bnx2.h
26751	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<12)	bnx2.h
26752	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(2L<<12)	bnx2.h
26753	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(4L<<12)	bnx2.h
26754	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(8L<<12)	bnx2.h
26755	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<16)	bnx2.h
26756	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(1L<<17)	bnx2.h
26757	BNX2_MISC_CLOCK_CONTROL_BITS_RE	(1L<<18)	bnx2.h
26758	BNX2_MISC_CLOCK_CONTROL_BITS_US	(1L<<19)	bnx2.h
26759	BNX2_MISC_CLOCK_CONTROL_BITS_RE	(0xfffL<<20)	bnx2.h
26760	BNX2_MISC_GPIO	0x0000081c	bnx2.h
26761	BNX2_MISC_GPIO_VALUE	(0xffL<<0)	bnx2.h
26762	BNX2_MISC_GPIO_SET	(0xffL<<8)	bnx2.h
26763	BNX2_MISC_GPIO_CLR	(0xffL<<16)	bnx2.h
26764	BNX2_MISC_GPIO_FLOAT	(0xffL<<24)	bnx2.h
26765	BNX2_MISC_GPIO_INT	0x00000820	bnx2.h
26766	BNX2_MISC_GPIO_INT_INT_STATE	(0xfL<<0)	bnx2.h
26767	BNX2_MISC_GPIO_INT_OLD_VALUE	(0xfL<<8)	bnx2.h
26768	BNX2_MISC_GPIO_INT_OLD_SET	(0xfL<<16)	bnx2.h
26769	BNX2_MISC_GPIO_INT_OLD_CLR	(0xfL<<24)	bnx2.h
26770	BNX2_MISC_CONFIG_LFSR	0x00000824	bnx2.h
26771	BNX2_MISC_CONFIG_LFSR_DIV	(0xffffL<<0)	bnx2.h
26772	BNX2_MISC_LFSR_MASK_BITS	0x00000828	bnx2.h
26773	BNX2_MISC_LFSR_MASK_BITS_TX_SCH	(1L<<0)	bnx2.h
26774	BNX2_MISC_LFSR_MASK_BITS_TX_BD_	(1L<<1)	bnx2.h
26775	BNX2_MISC_LFSR_MASK_BITS_TX_BD_	(1L<<2)	bnx2.h
26776	BNX2_MISC_LFSR_MASK_BITS_TX_PRO	(1L<<3)	bnx2.h
26777	BNX2_MISC_LFSR_MASK_BITS_TX_DMA	(1L<<4)	bnx2.h
26778	BNX2_MISC_LFSR_MASK_BITS_TX_PAT	(1L<<5)	bnx2.h
26779	BNX2_MISC_LFSR_MASK_BITS_TX_PAY	(1L<<6)	bnx2.h
26780	BNX2_MISC_LFSR_MASK_BITS_TX_HEA	(1L<<7)	bnx2.h
26781	BNX2_MISC_LFSR_MASK_BITS_TX_ASS	(1L<<8)	bnx2.h
26782	BNX2_MISC_LFSR_MASK_BITS_EMAC_E	(1L<<9)	bnx2.h
26783	BNX2_MISC_LFSR_MASK_BITS_RX_PAR	(1L<<10)	bnx2.h
26784	BNX2_MISC_LFSR_MASK_BITS_RX_PAR	(1L<<11)	bnx2.h
26785	BNX2_MISC_LFSR_MASK_BITS_RX_MBU	(1L<<12)	bnx2.h
26786	BNX2_MISC_LFSR_MASK_BITS_RX_LOO	(1L<<13)	bnx2.h
26787	BNX2_MISC_LFSR_MASK_BITS_RX_PRO	(1L<<14)	bnx2.h
26788	BNX2_MISC_LFSR_MASK_BITS_RX_V2P	(1L<<15)	bnx2.h
26789	BNX2_MISC_LFSR_MASK_BITS_RX_BD_	(1L<<16)	bnx2.h
26790	BNX2_MISC_LFSR_MASK_BITS_RX_DMA	(1L<<17)	bnx2.h
26791	BNX2_MISC_LFSR_MASK_BITS_COMPLE	(1L<<18)	bnx2.h
26792	BNX2_MISC_LFSR_MASK_BITS_HOST_C	(1L<<19)	bnx2.h
26793	BNX2_MISC_LFSR_MASK_BITS_MAILBO	(1L<<20)	bnx2.h
26794	BNX2_MISC_LFSR_MASK_BITS_CONTEX	(1L<<21)	bnx2.h
26795	BNX2_MISC_LFSR_MASK_BITS_CMD_SC	(1L<<22)	bnx2.h
26796	BNX2_MISC_LFSR_MASK_BITS_CMD_PR	(1L<<23)	bnx2.h
26797	BNX2_MISC_LFSR_MASK_BITS_MGMT_P	(1L<<24)	bnx2.h
26798	BNX2_MISC_LFSR_MASK_BITS_TIMER_	(1L<<25)	bnx2.h
26799	BNX2_MISC_LFSR_MASK_BITS_DMA_EN	(1L<<26)	bnx2.h
26800	BNX2_MISC_LFSR_MASK_BITS_UMP_EN	(1L<<27)	bnx2.h
26801	BNX2_MISC_ARB_REQ0	0x0000082c	bnx2.h
26802	BNX2_MISC_ARB_REQ1	0x00000830	bnx2.h
26803	BNX2_MISC_ARB_REQ2	0x00000834	bnx2.h
26804	BNX2_MISC_ARB_REQ3	0x00000838	bnx2.h
26805	BNX2_MISC_ARB_REQ4	0x0000083c	bnx2.h
26806	BNX2_MISC_ARB_FREE0	0x00000840	bnx2.h
26807	BNX2_MISC_ARB_FREE1	0x00000844	bnx2.h
26808	BNX2_MISC_ARB_FREE2	0x00000848	bnx2.h
26809	BNX2_MISC_ARB_FREE3	0x0000084c	bnx2.h
26810	BNX2_MISC_ARB_FREE4	0x00000850	bnx2.h
26811	BNX2_MISC_ARB_REQ_STATUS0	0x00000854	bnx2.h
26812	BNX2_MISC_ARB_REQ_STATUS1	0x00000858	bnx2.h
26813	BNX2_MISC_ARB_REQ_STATUS2	0x0000085c	bnx2.h
26814	BNX2_MISC_ARB_REQ_STATUS3	0x00000860	bnx2.h
26815	BNX2_MISC_ARB_REQ_STATUS4	0x00000864	bnx2.h
26816	BNX2_MISC_ARB_GNT0	0x00000868	bnx2.h
26817	BNX2_MISC_ARB_GNT0_0	(0x7L<<0)	bnx2.h
26818	BNX2_MISC_ARB_GNT0_1	(0x7L<<4)	bnx2.h
26819	BNX2_MISC_ARB_GNT0_2	(0x7L<<8)	bnx2.h
26820	BNX2_MISC_ARB_GNT0_3	(0x7L<<12)	bnx2.h
26821	BNX2_MISC_ARB_GNT0_4	(0x7L<<16)	bnx2.h
26822	BNX2_MISC_ARB_GNT0_5	(0x7L<<20)	bnx2.h
26823	BNX2_MISC_ARB_GNT0_6	(0x7L<<24)	bnx2.h
26824	BNX2_MISC_ARB_GNT0_7	(0x7L<<28)	bnx2.h
26825	BNX2_MISC_ARB_GNT1	0x0000086c	bnx2.h
26826	BNX2_MISC_ARB_GNT1_8	(0x7L<<0)	bnx2.h
26827	BNX2_MISC_ARB_GNT1_9	(0x7L<<4)	bnx2.h
26828	BNX2_MISC_ARB_GNT1_10	(0x7L<<8)	bnx2.h
26829	BNX2_MISC_ARB_GNT1_11	(0x7L<<12)	bnx2.h
26830	BNX2_MISC_ARB_GNT1_12	(0x7L<<16)	bnx2.h
26831	BNX2_MISC_ARB_GNT1_13	(0x7L<<20)	bnx2.h
26832	BNX2_MISC_ARB_GNT1_14	(0x7L<<24)	bnx2.h
26833	BNX2_MISC_ARB_GNT1_15	(0x7L<<28)	bnx2.h
26834	BNX2_MISC_ARB_GNT2	0x00000870	bnx2.h
26835	BNX2_MISC_ARB_GNT2_16	(0x7L<<0)	bnx2.h
26836	BNX2_MISC_ARB_GNT2_17	(0x7L<<4)	bnx2.h
26837	BNX2_MISC_ARB_GNT2_18	(0x7L<<8)	bnx2.h
26838	BNX2_MISC_ARB_GNT2_19	(0x7L<<12)	bnx2.h
26839	BNX2_MISC_ARB_GNT2_20	(0x7L<<16)	bnx2.h
26840	BNX2_MISC_ARB_GNT2_21	(0x7L<<20)	bnx2.h
26841	BNX2_MISC_ARB_GNT2_22	(0x7L<<24)	bnx2.h
26842	BNX2_MISC_ARB_GNT2_23	(0x7L<<28)	bnx2.h
26843	BNX2_MISC_ARB_GNT3	0x00000874	bnx2.h
26844	BNX2_MISC_ARB_GNT3_24	(0x7L<<0)	bnx2.h
26845	BNX2_MISC_ARB_GNT3_25	(0x7L<<4)	bnx2.h
26846	BNX2_MISC_ARB_GNT3_26	(0x7L<<8)	bnx2.h
26847	BNX2_MISC_ARB_GNT3_27	(0x7L<<12)	bnx2.h
26848	BNX2_MISC_ARB_GNT3_28	(0x7L<<16)	bnx2.h
26849	BNX2_MISC_ARB_GNT3_29	(0x7L<<20)	bnx2.h
26850	BNX2_MISC_ARB_GNT3_30	(0x7L<<24)	bnx2.h
26851	BNX2_MISC_ARB_GNT3_31	(0x7L<<28)	bnx2.h
26852	BNX2_MISC_PRBS_CONTROL	0x00000878	bnx2.h
26853	BNX2_MISC_PRBS_CONTROL_EN	(1L<<0)	bnx2.h
26854	BNX2_MISC_PRBS_CONTROL_RSTB	(1L<<1)	bnx2.h
26855	BNX2_MISC_PRBS_CONTROL_INV	(1L<<2)	bnx2.h
26856	BNX2_MISC_PRBS_CONTROL_ERR_CLR	(1L<<3)	bnx2.h
26857	BNX2_MISC_PRBS_CONTROL_ORDER	(0x3L<<4)	bnx2.h
26858	BNX2_MISC_PRBS_CONTROL_ORDER_7T	(0L<<4)	bnx2.h
26859	BNX2_MISC_PRBS_CONTROL_ORDER_15	(1L<<4)	bnx2.h
26860	BNX2_MISC_PRBS_CONTROL_ORDER_23	(2L<<4)	bnx2.h
26861	BNX2_MISC_PRBS_CONTROL_ORDER_31	(3L<<4)	bnx2.h
26862	BNX2_MISC_PRBS_STATUS	0x0000087c	bnx2.h
26863	BNX2_MISC_PRBS_STATUS_LOCK	(1L<<0)	bnx2.h
26864	BNX2_MISC_PRBS_STATUS_STKY	(1L<<1)	bnx2.h
26865	BNX2_MISC_PRBS_STATUS_ERRORS	(0x3fffL<<2)	bnx2.h
26866	BNX2_MISC_PRBS_STATUS_STATE	(0xfL<<16)	bnx2.h
26867	BNX2_MISC_SM_ASF_CONTROL	0x00000880	bnx2.h
26868	BNX2_MISC_SM_ASF_CONTROL_ASF_RS	(1L<<0)	bnx2.h
26869	BNX2_MISC_SM_ASF_CONTROL_TSC_EN	(1L<<1)	bnx2.h
26870	BNX2_MISC_SM_ASF_CONTROL_WG_TO	(1L<<2)	bnx2.h
26871	BNX2_MISC_SM_ASF_CONTROL_HB_TO	(1L<<3)	bnx2.h
26872	BNX2_MISC_SM_ASF_CONTROL_PA_TO	(1L<<4)	bnx2.h
26873	BNX2_MISC_SM_ASF_CONTROL_PL_TO	(1L<<5)	bnx2.h
26874	BNX2_MISC_SM_ASF_CONTROL_RT_TO	(1L<<6)	bnx2.h
26875	BNX2_MISC_SM_ASF_CONTROL_SMB_EV	(1L<<7)	bnx2.h
26876	BNX2_MISC_SM_ASF_CONTROL_RES	(0xfL<<8)	bnx2.h
26877	BNX2_MISC_SM_ASF_CONTROL_SMB_EN	(1L<<12)	bnx2.h
26878	BNX2_MISC_SM_ASF_CONTROL_SMB_BB	(1L<<13)	bnx2.h
26879	BNX2_MISC_SM_ASF_CONTROL_SMB_NO	(1L<<14)	bnx2.h
26880	BNX2_MISC_SM_ASF_CONTROL_SMB_AU	(1L<<15)	bnx2.h
26881	BNX2_MISC_SM_ASF_CONTROL_NIC_SM	(0x3fL<<16)	bnx2.h
26882	BNX2_MISC_SM_ASF_CONTROL_NIC_SM	(0x3fL<<24)	bnx2.h
26883	BNX2_MISC_SM_ASF_CONTROL_EN_NIC	(1L<<30)	bnx2.h
26884	BNX2_MISC_SM_ASF_CONTROL_SMB_EA	(1L<<31)	bnx2.h
26885	BNX2_MISC_SMB_IN	0x00000884	bnx2.h
26886	BNX2_MISC_SMB_IN_DAT_IN	(0xffL<<0)	bnx2.h
26887	BNX2_MISC_SMB_IN_RDY	(1L<<8)	bnx2.h
26888	BNX2_MISC_SMB_IN_DONE	(1L<<9)	bnx2.h
26889	BNX2_MISC_SMB_IN_FIRSTBYTE	(1L<<10)	bnx2.h
26890	BNX2_MISC_SMB_IN_STATUS	(0x7L<<11)	bnx2.h
26891	BNX2_MISC_SMB_IN_STATUS_OK	(0x0L<<11)	bnx2.h
26892	BNX2_MISC_SMB_IN_STATUS_PEC	(0x1L<<11)	bnx2.h
26893	BNX2_MISC_SMB_IN_STATUS_OFLOW	(0x2L<<11)	bnx2.h
26894	BNX2_MISC_SMB_IN_STATUS_STOP	(0x3L<<11)	bnx2.h
26895	BNX2_MISC_SMB_IN_STATUS_TIMEOUT	(0x4L<<11)	bnx2.h
26896	BNX2_MISC_SMB_OUT	0x00000888	bnx2.h
26897	BNX2_MISC_SMB_OUT_DAT_OUT	(0xffL<<0)	bnx2.h
26898	BNX2_MISC_SMB_OUT_RDY	(1L<<8)	bnx2.h
26899	BNX2_MISC_SMB_OUT_START	(1L<<9)	bnx2.h
26900	BNX2_MISC_SMB_OUT_LAST	(1L<<10)	bnx2.h
26901	BNX2_MISC_SMB_OUT_ACC_TYPE	(1L<<11)	bnx2.h
26902	BNX2_MISC_SMB_OUT_ENB_PEC	(1L<<12)	bnx2.h
26903	BNX2_MISC_SMB_OUT_GET_RX_LEN	(1L<<13)	bnx2.h
26904	BNX2_MISC_SMB_OUT_SMB_READ_LEN	(0x3fL<<14)	bnx2.h
26905	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0xfL<<20)	bnx2.h
26906	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0L<<20)	bnx2.h
26907	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(1L<<20)	bnx2.h
26908	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(9L<<20)	bnx2.h
26909	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(2L<<20)	bnx2.h
26910	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(3L<<20)	bnx2.h
26911	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(4L<<20)	bnx2.h
26912	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(5L<<20)	bnx2.h
26913	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0xdL<<20)	bnx2.h
26914	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0x6L<<20)	bnx2.h
26915	BNX2_MISC_SMB_OUT_SMB_OUT_SLAVE	(1L<<24)	bnx2.h
26916	BNX2_MISC_SMB_OUT_SMB_OUT_DAT_E	(1L<<25)	bnx2.h
26917	BNX2_MISC_SMB_OUT_SMB_OUT_DAT_I	(1L<<26)	bnx2.h
26918	BNX2_MISC_SMB_OUT_SMB_OUT_CLK_E	(1L<<27)	bnx2.h
26919	BNX2_MISC_SMB_OUT_SMB_OUT_CLK_I	(1L<<28)	bnx2.h
26920	BNX2_MISC_SMB_WATCHDOG	0x0000088c	bnx2.h
26921	BNX2_MISC_SMB_WATCHDOG_WATCHDOG	(0xffffL<<0)	bnx2.h
26922	BNX2_MISC_SMB_HEARTBEAT	0x00000890	bnx2.h
26923	BNX2_MISC_SMB_HEARTBEAT_HEARTBE	(0xffffL<<0)	bnx2.h
26924	BNX2_MISC_SMB_POLL_ASF	0x00000894	bnx2.h
26925	BNX2_MISC_SMB_POLL_ASF_POLL_ASF	(0xffffL<<0)	bnx2.h
26926	BNX2_MISC_SMB_POLL_LEGACY	0x00000898	bnx2.h
26927	BNX2_MISC_SMB_POLL_LEGACY_POLL_	(0xffffL<<0)	bnx2.h
26928	BNX2_MISC_SMB_RETRAN	0x0000089c	bnx2.h
26929	BNX2_MISC_SMB_RETRAN_RETRAN	(0xffL<<0)	bnx2.h
26930	BNX2_MISC_SMB_TIMESTAMP	0x000008a0	bnx2.h
26931	BNX2_MISC_SMB_TIMESTAMP_TIMESTA	(0xffffffffL<<0)	bnx2.h
26932	BNX2_MISC_PERR_ENA0	0x000008a4	bnx2.h
26933	BNX2_MISC_PERR_ENA0_COM_MISC_CT	(1L<<0)	bnx2.h
26934	BNX2_MISC_PERR_ENA0_COM_MISC_RE	(1L<<1)	bnx2.h
26935	BNX2_MISC_PERR_ENA0_COM_MISC_SC	(1L<<2)	bnx2.h
26936	BNX2_MISC_PERR_ENA0_CP_MISC_CTX	(1L<<3)	bnx2.h
26937	BNX2_MISC_PERR_ENA0_CP_MISC_REG	(1L<<4)	bnx2.h
26938	BNX2_MISC_PERR_ENA0_CP_MISC_SCP	(1L<<5)	bnx2.h
26939	BNX2_MISC_PERR_ENA0_CS_MISC_TME	(1L<<6)	bnx2.h
26940	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<7)	bnx2.h
26941	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<8)	bnx2.h
26942	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<9)	bnx2.h
26943	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<10)	bnx2.h
26944	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<11)	bnx2.h
26945	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<12)	bnx2.h
26946	BNX2_MISC_PERR_ENA0_CTX_MISC_PG	(1L<<13)	bnx2.h
26947	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<14)	bnx2.h
26948	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<15)	bnx2.h
26949	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<16)	bnx2.h
26950	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<17)	bnx2.h
26951	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<18)	bnx2.h
26952	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<19)	bnx2.h
26953	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<20)	bnx2.h
26954	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<21)	bnx2.h
26955	BNX2_MISC_PERR_ENA0_HC_MISC_DMA	(1L<<22)	bnx2.h
26956	BNX2_MISC_PERR_ENA0_MCP_MISC_RE	(1L<<23)	bnx2.h
26957	BNX2_MISC_PERR_ENA0_MCP_MISC_SC	(1L<<24)	bnx2.h
26958	BNX2_MISC_PERR_ENA0_MQ_MISC_CTX	(1L<<25)	bnx2.h
26959	BNX2_MISC_PERR_ENA0_RBDC_MISC	(1L<<26)	bnx2.h
26960	BNX2_MISC_PERR_ENA0_RBUF_MISC_M	(1L<<27)	bnx2.h
26961	BNX2_MISC_PERR_ENA0_RBUF_MISC_P	(1L<<28)	bnx2.h
26962	BNX2_MISC_PERR_ENA0_RDE_MISC_RP	(1L<<29)	bnx2.h
26963	BNX2_MISC_PERR_ENA0_RDE_MISC_RP	(1L<<30)	bnx2.h
26964	BNX2_MISC_PERR_ENA0_RV2P_MISC_C	(1L<<31)	bnx2.h
26965	BNX2_MISC_PERR_ENA1	0x000008a8	bnx2.h
26966	BNX2_MISC_PERR_ENA1_RV2P_MISC_C	(1L<<0)	bnx2.h
26967	BNX2_MISC_PERR_ENA1_RV2P_MISC_P	(1L<<1)	bnx2.h
26968	BNX2_MISC_PERR_ENA1_RV2P_MISC_P	(1L<<2)	bnx2.h
26969	BNX2_MISC_PERR_ENA1_RXP_MISC_CT	(1L<<3)	bnx2.h
26970	BNX2_MISC_PERR_ENA1_RXP_MISC_RE	(1L<<4)	bnx2.h
26971	BNX2_MISC_PERR_ENA1_RXP_MISC_SC	(1L<<5)	bnx2.h
26972	BNX2_MISC_PERR_ENA1_RXP_MISC_RB	(1L<<6)	bnx2.h
26973	BNX2_MISC_PERR_ENA1_TBDC_MISC	(1L<<7)	bnx2.h
26974	BNX2_MISC_PERR_ENA1_TDMA_MISC	(1L<<8)	bnx2.h
26975	BNX2_MISC_PERR_ENA1_THBUF_MISC_	(1L<<9)	bnx2.h
26976	BNX2_MISC_PERR_ENA1_THBUF_MISC_	(1L<<10)	bnx2.h
26977	BNX2_MISC_PERR_ENA1_TPAT_MISC_R	(1L<<11)	bnx2.h
26978	BNX2_MISC_PERR_ENA1_TPAT_MISC_S	(1L<<12)	bnx2.h
26979	BNX2_MISC_PERR_ENA1_TPBUF_MISC_	(1L<<13)	bnx2.h
26980	BNX2_MISC_PERR_ENA1_TSCH_MISC_L	(1L<<14)	bnx2.h
26981	BNX2_MISC_PERR_ENA1_TXP_MISC_CT	(1L<<15)	bnx2.h
26982	BNX2_MISC_PERR_ENA1_TXP_MISC_RE	(1L<<16)	bnx2.h
26983	BNX2_MISC_PERR_ENA1_TXP_MISC_SC	(1L<<17)	bnx2.h
26984	BNX2_MISC_PERR_ENA1_UMP_MISC_FI	(1L<<18)	bnx2.h
26985	BNX2_MISC_PERR_ENA1_UMP_MISC_FI	(1L<<19)	bnx2.h
26986	BNX2_MISC_PERR_ENA1_UMP_MISC_RX	(1L<<20)	bnx2.h
26987	BNX2_MISC_PERR_ENA1_UMP_MISC_TX	(1L<<21)	bnx2.h
26988	BNX2_MISC_PERR_ENA1_RDMAQ_MISC	(1L<<22)	bnx2.h
26989	BNX2_MISC_PERR_ENA1_CSQ_MISC	(1L<<23)	bnx2.h
26990	BNX2_MISC_PERR_ENA1_CPQ_MISC	(1L<<24)	bnx2.h
26991	BNX2_MISC_PERR_ENA1_MCPQ_MISC	(1L<<25)	bnx2.h
26992	BNX2_MISC_PERR_ENA1_RV2PMQ_MISC	(1L<<26)	bnx2.h
26993	BNX2_MISC_PERR_ENA1_RV2PPQ_MISC	(1L<<27)	bnx2.h
26994	BNX2_MISC_PERR_ENA1_RV2PTQ_MISC	(1L<<28)	bnx2.h
26995	BNX2_MISC_PERR_ENA1_RXPQ_MISC	(1L<<29)	bnx2.h
26996	BNX2_MISC_PERR_ENA1_RXPCQ_MISC	(1L<<30)	bnx2.h
26997	BNX2_MISC_PERR_ENA1_RLUPQ_MISC	(1L<<31)	bnx2.h
26998	BNX2_MISC_PERR_ENA2	0x000008ac	bnx2.h
26999	BNX2_MISC_PERR_ENA2_COMQ_MISC	(1L<<0)	bnx2.h
27000	BNX2_MISC_PERR_ENA2_COMXQ_MISC	(1L<<1)	bnx2.h
27001	BNX2_MISC_PERR_ENA2_COMTQ_MISC	(1L<<2)	bnx2.h
27002	BNX2_MISC_PERR_ENA2_TSCHQ_MISC	(1L<<3)	bnx2.h
27003	BNX2_MISC_PERR_ENA2_TBDRQ_MISC	(1L<<4)	bnx2.h
27004	BNX2_MISC_PERR_ENA2_TXPQ_MISC	(1L<<5)	bnx2.h
27005	BNX2_MISC_PERR_ENA2_TDMAQ_MISC	(1L<<6)	bnx2.h
27006	BNX2_MISC_PERR_ENA2_TPATQ_MISC	(1L<<7)	bnx2.h
27007	BNX2_MISC_PERR_ENA2_TASQ_MISC	(1L<<8)	bnx2.h
27008	BNX2_MISC_DEBUG_VECTOR_SEL	0x000008b0	bnx2.h
27009	BNX2_MISC_DEBUG_VECTOR_SEL_0	(0xfffL<<0)	bnx2.h
27010	BNX2_MISC_DEBUG_VECTOR_SEL_1	(0xfffL<<12)	bnx2.h
27011	BNX2_MISC_VREG_CONTROL	0x000008b4	bnx2.h
27012	BNX2_MISC_VREG_CONTROL_1_2	(0xfL<<0)	bnx2.h
27013	BNX2_MISC_VREG_CONTROL_2_5	(0xfL<<4)	bnx2.h
27014	BNX2_MISC_FINAL_CLK_CTL_VAL	0x000008b8	bnx2.h
27015	BNX2_MISC_FINAL_CLK_CTL_VAL_MIS	(0x3ffffffL<<6)	bnx2.h
27016	BNX2_MISC_UNUSED0	0x000008bc	bnx2.h
27017	BNX2_NVM_COMMAND	0x00006400	bnx2.h
27018	BNX2_NVM_COMMAND_RST	(1L<<0)	bnx2.h
27019	BNX2_NVM_COMMAND_DONE	(1L<<3)	bnx2.h
27020	BNX2_NVM_COMMAND_DOIT	(1L<<4)	bnx2.h
27021	BNX2_NVM_COMMAND_WR	(1L<<5)	bnx2.h
27022	BNX2_NVM_COMMAND_ERASE	(1L<<6)	bnx2.h
27023	BNX2_NVM_COMMAND_FIRST	(1L<<7)	bnx2.h
27024	BNX2_NVM_COMMAND_LAST	(1L<<8)	bnx2.h
27025	BNX2_NVM_COMMAND_WREN	(1L<<16)	bnx2.h
27026	BNX2_NVM_COMMAND_WRDI	(1L<<17)	bnx2.h
27027	BNX2_NVM_COMMAND_EWSR	(1L<<18)	bnx2.h
27028	BNX2_NVM_COMMAND_WRSR	(1L<<19)	bnx2.h
27029	BNX2_NVM_STATUS	0x00006404	bnx2.h
27030	BNX2_NVM_STATUS_PI_FSM_STATE	(0xfL<<0)	bnx2.h
27031	BNX2_NVM_STATUS_EE_FSM_STATE	(0xfL<<4)	bnx2.h
27032	BNX2_NVM_STATUS_EQ_FSM_STATE	(0xfL<<8)	bnx2.h
27033	BNX2_NVM_WRITE	0x00006408	bnx2.h
27034	BNX2_NVM_WRITE_NVM_WRITE_VALUE	(0xffffffffL<<0)	bnx2.h
27035	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(0L<<0)	bnx2.h
27036	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(1L<<0)	bnx2.h
27037	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(2L<<0)	bnx2.h
27038	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(4L<<0)	bnx2.h
27039	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(8L<<0)	bnx2.h
27040	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(16L<<0)	bnx2.h
27041	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(32L<<0)	bnx2.h
27042	BNX2_NVM_ADDR	0x0000640c	bnx2.h
27043	BNX2_NVM_ADDR_NVM_ADDR_VALUE	(0xffffffL<<0)	bnx2.h
27044	BNX2_NVM_ADDR_NVM_ADDR_VALUE_BI	(0L<<0)	bnx2.h
27045	BNX2_NVM_ADDR_NVM_ADDR_VALUE_EE	(1L<<0)	bnx2.h
27046	BNX2_NVM_ADDR_NVM_ADDR_VALUE_EE	(2L<<0)	bnx2.h
27047	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SC	(4L<<0)	bnx2.h
27048	BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS	(8L<<0)	bnx2.h
27049	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO	(16L<<0)	bnx2.h
27050	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI	(32L<<0)	bnx2.h
27051	BNX2_NVM_READ	0x00006410	bnx2.h
27052	BNX2_NVM_READ_NVM_READ_VALUE	(0xffffffffL<<0)	bnx2.h
27053	BNX2_NVM_READ_NVM_READ_VALUE_BI	(0L<<0)	bnx2.h
27054	BNX2_NVM_READ_NVM_READ_VALUE_EE	(1L<<0)	bnx2.h
27055	BNX2_NVM_READ_NVM_READ_VALUE_EE	(2L<<0)	bnx2.h
27056	BNX2_NVM_READ_NVM_READ_VALUE_SC	(4L<<0)	bnx2.h
27057	BNX2_NVM_READ_NVM_READ_VALUE_CS	(8L<<0)	bnx2.h
27058	BNX2_NVM_READ_NVM_READ_VALUE_SO	(16L<<0)	bnx2.h
27059	BNX2_NVM_READ_NVM_READ_VALUE_SI	(32L<<0)	bnx2.h
27060	BNX2_NVM_CFG1	0x00006414	bnx2.h
27061	BNX2_NVM_CFG1_FLASH_MODE	(1L<<0)	bnx2.h
27062	BNX2_NVM_CFG1_BUFFER_MODE	(1L<<1)	bnx2.h
27063	BNX2_NVM_CFG1_PASS_MODE	(1L<<2)	bnx2.h
27064	BNX2_NVM_CFG1_BITBANG_MODE	(1L<<3)	bnx2.h
27065	BNX2_NVM_CFG1_STATUS_BIT	(0x7L<<4)	bnx2.h
27066	BNX2_NVM_CFG1_STATUS_BIT_FLASH_	(0L<<4)	bnx2.h
27067	BNX2_NVM_CFG1_STATUS_BIT_BUFFER	(7L<<4)	bnx2.h
27068	BNX2_NVM_CFG1_SPI_CLK_DIV	(0xfL<<7)	bnx2.h
27069	BNX2_NVM_CFG1_SEE_CLK_DIV	(0x7ffL<<11)	bnx2.h
27070	BNX2_NVM_CFG1_PROTECT_MODE	(1L<<24)	bnx2.h
27071	BNX2_NVM_CFG1_FLASH_SIZE	(1L<<25)	bnx2.h
27072	BNX2_NVM_CFG1_COMPAT_BYPASSS	(1L<<31)	bnx2.h
27073	BNX2_NVM_CFG2	0x00006418	bnx2.h
27074	BNX2_NVM_CFG2_ERASE_CMD	(0xffL<<0)	bnx2.h
27075	BNX2_NVM_CFG2_DUMMY	(0xffL<<8)	bnx2.h
27076	BNX2_NVM_CFG2_STATUS_CMD	(0xffL<<16)	bnx2.h
27077	BNX2_NVM_CFG3	0x0000641c	bnx2.h
27078	BNX2_NVM_CFG3_BUFFER_RD_CMD	(0xffL<<0)	bnx2.h
27079	BNX2_NVM_CFG3_WRITE_CMD	(0xffL<<8)	bnx2.h
27080	BNX2_NVM_CFG3_BUFFER_WRITE_CMD	(0xffL<<16)	bnx2.h
27081	BNX2_NVM_CFG3_READ_CMD	(0xffL<<24)	bnx2.h
27082	BNX2_NVM_SW_ARB	0x00006420	bnx2.h
27083	BNX2_NVM_SW_ARB_ARB_REQ_SET0	(1L<<0)	bnx2.h
27084	BNX2_NVM_SW_ARB_ARB_REQ_SET1	(1L<<1)	bnx2.h
27085	BNX2_NVM_SW_ARB_ARB_REQ_SET2	(1L<<2)	bnx2.h
27086	BNX2_NVM_SW_ARB_ARB_REQ_SET3	(1L<<3)	bnx2.h
27087	BNX2_NVM_SW_ARB_ARB_REQ_CLR0	(1L<<4)	bnx2.h
27088	BNX2_NVM_SW_ARB_ARB_REQ_CLR1	(1L<<5)	bnx2.h
27089	BNX2_NVM_SW_ARB_ARB_REQ_CLR2	(1L<<6)	bnx2.h
27090	BNX2_NVM_SW_ARB_ARB_REQ_CLR3	(1L<<7)	bnx2.h
27091	BNX2_NVM_SW_ARB_ARB_ARB0	(1L<<8)	bnx2.h
27092	BNX2_NVM_SW_ARB_ARB_ARB1	(1L<<9)	bnx2.h
27093	BNX2_NVM_SW_ARB_ARB_ARB2	(1L<<10)	bnx2.h
27094	BNX2_NVM_SW_ARB_ARB_ARB3	(1L<<11)	bnx2.h
27095	BNX2_NVM_SW_ARB_REQ0	(1L<<12)	bnx2.h
27096	BNX2_NVM_SW_ARB_REQ1	(1L<<13)	bnx2.h
27097	BNX2_NVM_SW_ARB_REQ2	(1L<<14)	bnx2.h
27098	BNX2_NVM_SW_ARB_REQ3	(1L<<15)	bnx2.h
27099	BNX2_NVM_ACCESS_ENABLE	0x00006424	bnx2.h
27100	BNX2_NVM_ACCESS_ENABLE_EN	(1L<<0)	bnx2.h
27101	BNX2_NVM_ACCESS_ENABLE_WR_EN	(1L<<1)	bnx2.h
27102	BNX2_NVM_WRITE1	0x00006428	bnx2.h
27103	BNX2_NVM_WRITE1_WREN_CMD	(0xffL<<0)	bnx2.h
27104	BNX2_NVM_WRITE1_WRDI_CMD	(0xffL<<8)	bnx2.h
27105	BNX2_NVM_WRITE1_SR_DATA	(0xffL<<16)	bnx2.h
27106	BNX2_DMA_COMMAND	0x00000c00	bnx2.h
27107	BNX2_DMA_COMMAND_ENABLE	(1L<<0)	bnx2.h
27108	BNX2_DMA_STATUS	0x00000c04	bnx2.h
27109	BNX2_DMA_STATUS_PAR_ERROR_STATE	(1L<<0)	bnx2.h
27110	BNX2_DMA_STATUS_READ_TRANSFERS_	(1L<<16)	bnx2.h
27111	BNX2_DMA_STATUS_READ_DELAY_PCI_	(1L<<17)	bnx2.h
27112	BNX2_DMA_STATUS_BIG_READ_TRANSF	(1L<<18)	bnx2.h
27113	BNX2_DMA_STATUS_BIG_READ_DELAY_	(1L<<19)	bnx2.h
27114	BNX2_DMA_STATUS_BIG_READ_RETRY_	(1L<<20)	bnx2.h
27115	BNX2_DMA_STATUS_WRITE_TRANSFERS	(1L<<21)	bnx2.h
27116	BNX2_DMA_STATUS_WRITE_DELAY_PCI	(1L<<22)	bnx2.h
27117	BNX2_DMA_STATUS_BIG_WRITE_TRANS	(1L<<23)	bnx2.h
27118	BNX2_DMA_STATUS_BIG_WRITE_DELAY	(1L<<24)	bnx2.h
27119	BNX2_DMA_STATUS_BIG_WRITE_RETRY	(1L<<25)	bnx2.h
27120	BNX2_DMA_CONFIG	0x00000c08	bnx2.h
27121	BNX2_DMA_CONFIG_DATA_BYTE_SWAP	(1L<<0)	bnx2.h
27122	BNX2_DMA_CONFIG_DATA_WORD_SWAP	(1L<<1)	bnx2.h
27123	BNX2_DMA_CONFIG_CNTL_BYTE_SWAP	(1L<<4)	bnx2.h
27124	BNX2_DMA_CONFIG_CNTL_WORD_SWAP	(1L<<5)	bnx2.h
27125	BNX2_DMA_CONFIG_ONE_DMA	(1L<<6)	bnx2.h
27126	BNX2_DMA_CONFIG_CNTL_TWO_DMA	(1L<<7)	bnx2.h
27127	BNX2_DMA_CONFIG_CNTL_FPGA_MODE	(1L<<8)	bnx2.h
27128	BNX2_DMA_CONFIG_CNTL_PING_PONG_	(1L<<10)	bnx2.h
27129	BNX2_DMA_CONFIG_CNTL_PCI_COMP_D	(1L<<11)	bnx2.h
27130	BNX2_DMA_CONFIG_NO_RCHANS_IN_US	(0xfL<<12)	bnx2.h
27131	BNX2_DMA_CONFIG_NO_WCHANS_IN_US	(0xfL<<16)	bnx2.h
27132	BNX2_DMA_CONFIG_PCI_CLK_CMP_BIT	(0x7L<<20)	bnx2.h
27133	BNX2_DMA_CONFIG_PCI_FAST_CLK_CM	(1L<<23)	bnx2.h
27134	BNX2_DMA_CONFIG_BIG_SIZE	(0xfL<<24)	bnx2.h
27135	BNX2_DMA_CONFIG_BIG_SIZE_NONE	(0x0L<<24)	bnx2.h
27136	BNX2_DMA_CONFIG_BIG_SIZE_64	(0x1L<<24)	bnx2.h
27137	BNX2_DMA_CONFIG_BIG_SIZE_128	(0x2L<<24)	bnx2.h
27138	BNX2_DMA_CONFIG_BIG_SIZE_256	(0x4L<<24)	bnx2.h
27139	BNX2_DMA_CONFIG_BIG_SIZE_512	(0x8L<<24)	bnx2.h
27140	BNX2_DMA_BLACKOUT	0x00000c0c	bnx2.h
27141	BNX2_DMA_BLACKOUT_RD_RETRY_BLAC	(0xffL<<0)	bnx2.h
27142	BNX2_DMA_BLACKOUT_2ND_RD_RETRY_	(0xffL<<8)	bnx2.h
27143	BNX2_DMA_BLACKOUT_WR_RETRY_BLAC	(0xffL<<16)	bnx2.h
27144	BNX2_DMA_RCHAN_STAT	0x00000c30	bnx2.h
27145	BNX2_DMA_RCHAN_STAT_COMP_CODE_0	(0x7L<<0)	bnx2.h
27146	BNX2_DMA_RCHAN_STAT_PAR_ERR_0	(1L<<3)	bnx2.h
27147	BNX2_DMA_RCHAN_STAT_COMP_CODE_1	(0x7L<<4)	bnx2.h
27148	BNX2_DMA_RCHAN_STAT_PAR_ERR_1	(1L<<7)	bnx2.h
27149	BNX2_DMA_RCHAN_STAT_COMP_CODE_2	(0x7L<<8)	bnx2.h
27150	BNX2_DMA_RCHAN_STAT_PAR_ERR_2	(1L<<11)	bnx2.h
27151	BNX2_DMA_RCHAN_STAT_COMP_CODE_3	(0x7L<<12)	bnx2.h
27152	BNX2_DMA_RCHAN_STAT_PAR_ERR_3	(1L<<15)	bnx2.h
27153	BNX2_DMA_RCHAN_STAT_COMP_CODE_4	(0x7L<<16)	bnx2.h
27154	BNX2_DMA_RCHAN_STAT_PAR_ERR_4	(1L<<19)	bnx2.h
27155	BNX2_DMA_RCHAN_STAT_COMP_CODE_5	(0x7L<<20)	bnx2.h
27156	BNX2_DMA_RCHAN_STAT_PAR_ERR_5	(1L<<23)	bnx2.h
27157	BNX2_DMA_RCHAN_STAT_COMP_CODE_6	(0x7L<<24)	bnx2.h
27158	BNX2_DMA_RCHAN_STAT_PAR_ERR_6	(1L<<27)	bnx2.h
27159	BNX2_DMA_RCHAN_STAT_COMP_CODE_7	(0x7L<<28)	bnx2.h
27160	BNX2_DMA_RCHAN_STAT_PAR_ERR_7	(1L<<31)	bnx2.h
27161	BNX2_DMA_WCHAN_STAT	0x00000c34	bnx2.h
27162	BNX2_DMA_WCHAN_STAT_COMP_CODE_0	(0x7L<<0)	bnx2.h
27163	BNX2_DMA_WCHAN_STAT_PAR_ERR_0	(1L<<3)	bnx2.h
27164	BNX2_DMA_WCHAN_STAT_COMP_CODE_1	(0x7L<<4)	bnx2.h
27165	BNX2_DMA_WCHAN_STAT_PAR_ERR_1	(1L<<7)	bnx2.h
27166	BNX2_DMA_WCHAN_STAT_COMP_CODE_2	(0x7L<<8)	bnx2.h
27167	BNX2_DMA_WCHAN_STAT_PAR_ERR_2	(1L<<11)	bnx2.h
27168	BNX2_DMA_WCHAN_STAT_COMP_CODE_3	(0x7L<<12)	bnx2.h
27169	BNX2_DMA_WCHAN_STAT_PAR_ERR_3	(1L<<15)	bnx2.h
27170	BNX2_DMA_WCHAN_STAT_COMP_CODE_4	(0x7L<<16)	bnx2.h
27171	BNX2_DMA_WCHAN_STAT_PAR_ERR_4	(1L<<19)	bnx2.h
27172	BNX2_DMA_WCHAN_STAT_COMP_CODE_5	(0x7L<<20)	bnx2.h
27173	BNX2_DMA_WCHAN_STAT_PAR_ERR_5	(1L<<23)	bnx2.h
27174	BNX2_DMA_WCHAN_STAT_COMP_CODE_6	(0x7L<<24)	bnx2.h
27175	BNX2_DMA_WCHAN_STAT_PAR_ERR_6	(1L<<27)	bnx2.h
27176	BNX2_DMA_WCHAN_STAT_COMP_CODE_7	(0x7L<<28)	bnx2.h
27177	BNX2_DMA_WCHAN_STAT_PAR_ERR_7	(1L<<31)	bnx2.h
27178	BNX2_DMA_RCHAN_ASSIGNMENT	0x00000c38	bnx2.h
27179	BNX2_DMA_RCHAN_ASSIGNMENT_0	(0xfL<<0)	bnx2.h
27180	BNX2_DMA_RCHAN_ASSIGNMENT_1	(0xfL<<4)	bnx2.h
27181	BNX2_DMA_RCHAN_ASSIGNMENT_2	(0xfL<<8)	bnx2.h
27182	BNX2_DMA_RCHAN_ASSIGNMENT_3	(0xfL<<12)	bnx2.h
27183	BNX2_DMA_RCHAN_ASSIGNMENT_4	(0xfL<<16)	bnx2.h
27184	BNX2_DMA_RCHAN_ASSIGNMENT_5	(0xfL<<20)	bnx2.h
27185	BNX2_DMA_RCHAN_ASSIGNMENT_6	(0xfL<<24)	bnx2.h
27186	BNX2_DMA_RCHAN_ASSIGNMENT_7	(0xfL<<28)	bnx2.h
27187	BNX2_DMA_WCHAN_ASSIGNMENT	0x00000c3c	bnx2.h
27188	BNX2_DMA_WCHAN_ASSIGNMENT_0	(0xfL<<0)	bnx2.h
27189	BNX2_DMA_WCHAN_ASSIGNMENT_1	(0xfL<<4)	bnx2.h
27190	BNX2_DMA_WCHAN_ASSIGNMENT_2	(0xfL<<8)	bnx2.h
27191	BNX2_DMA_WCHAN_ASSIGNMENT_3	(0xfL<<12)	bnx2.h
27192	BNX2_DMA_WCHAN_ASSIGNMENT_4	(0xfL<<16)	bnx2.h
27193	BNX2_DMA_WCHAN_ASSIGNMENT_5	(0xfL<<20)	bnx2.h
27194	BNX2_DMA_WCHAN_ASSIGNMENT_6	(0xfL<<24)	bnx2.h
27195	BNX2_DMA_WCHAN_ASSIGNMENT_7	(0xfL<<28)	bnx2.h
27196	BNX2_DMA_RCHAN_STAT_00	0x00000c40	bnx2.h
27197	BNX2_DMA_RCHAN_STAT_00_RCHAN_ST	(0xffffffffL<<0)	bnx2.h
27198	BNX2_DMA_RCHAN_STAT_01	0x00000c44	bnx2.h
27199	BNX2_DMA_RCHAN_STAT_01_RCHAN_ST	(0xffffffffL<<0)	bnx2.h
27200	BNX2_DMA_RCHAN_STAT_02	0x00000c48	bnx2.h
27201	BNX2_DMA_RCHAN_STAT_02_LENGTH	(0xffffL<<0)	bnx2.h
27202	BNX2_DMA_RCHAN_STAT_02_WORD_SWA	(1L<<16)	bnx2.h
27203	BNX2_DMA_RCHAN_STAT_02_BYTE_SWA	(1L<<17)	bnx2.h
27204	BNX2_DMA_RCHAN_STAT_02_PRIORITY	(1L<<18)	bnx2.h
27205	BNX2_DMA_RCHAN_STAT_10	0x00000c4c	bnx2.h
27206	BNX2_DMA_RCHAN_STAT_11	0x00000c50	bnx2.h
27207	BNX2_DMA_RCHAN_STAT_12	0x00000c54	bnx2.h
27208	BNX2_DMA_RCHAN_STAT_20	0x00000c58	bnx2.h
27209	BNX2_DMA_RCHAN_STAT_21	0x00000c5c	bnx2.h
27210	BNX2_DMA_RCHAN_STAT_22	0x00000c60	bnx2.h
27211	BNX2_DMA_RCHAN_STAT_30	0x00000c64	bnx2.h
27212	BNX2_DMA_RCHAN_STAT_31	0x00000c68	bnx2.h
27213	BNX2_DMA_RCHAN_STAT_32	0x00000c6c	bnx2.h
27214	BNX2_DMA_RCHAN_STAT_40	0x00000c70	bnx2.h
27215	BNX2_DMA_RCHAN_STAT_41	0x00000c74	bnx2.h
27216	BNX2_DMA_RCHAN_STAT_42	0x00000c78	bnx2.h
27217	BNX2_DMA_RCHAN_STAT_50	0x00000c7c	bnx2.h
27218	BNX2_DMA_RCHAN_STAT_51	0x00000c80	bnx2.h
27219	BNX2_DMA_RCHAN_STAT_52	0x00000c84	bnx2.h
27220	BNX2_DMA_RCHAN_STAT_60	0x00000c88	bnx2.h
27221	BNX2_DMA_RCHAN_STAT_61	0x00000c8c	bnx2.h
27222	BNX2_DMA_RCHAN_STAT_62	0x00000c90	bnx2.h
27223	BNX2_DMA_RCHAN_STAT_70	0x00000c94	bnx2.h
27224	BNX2_DMA_RCHAN_STAT_71	0x00000c98	bnx2.h
27225	BNX2_DMA_RCHAN_STAT_72	0x00000c9c	bnx2.h
27226	BNX2_DMA_WCHAN_STAT_00	0x00000ca0	bnx2.h
27227	BNX2_DMA_WCHAN_STAT_00_WCHAN_ST	(0xffffffffL<<0)	bnx2.h
27228	BNX2_DMA_WCHAN_STAT_01	0x00000ca4	bnx2.h
27229	BNX2_DMA_WCHAN_STAT_01_WCHAN_ST	(0xffffffffL<<0)	bnx2.h
27230	BNX2_DMA_WCHAN_STAT_02	0x00000ca8	bnx2.h
27231	BNX2_DMA_WCHAN_STAT_02_LENGTH	(0xffffL<<0)	bnx2.h
27232	BNX2_DMA_WCHAN_STAT_02_WORD_SWA	(1L<<16)	bnx2.h
27233	BNX2_DMA_WCHAN_STAT_02_BYTE_SWA	(1L<<17)	bnx2.h
27234	BNX2_DMA_WCHAN_STAT_02_PRIORITY	(1L<<18)	bnx2.h
27235	BNX2_DMA_WCHAN_STAT_10	0x00000cac	bnx2.h
27236	BNX2_DMA_WCHAN_STAT_11	0x00000cb0	bnx2.h
27237	BNX2_DMA_WCHAN_STAT_12	0x00000cb4	bnx2.h
27238	BNX2_DMA_WCHAN_STAT_20	0x00000cb8	bnx2.h
27239	BNX2_DMA_WCHAN_STAT_21	0x00000cbc	bnx2.h
27240	BNX2_DMA_WCHAN_STAT_22	0x00000cc0	bnx2.h
27241	BNX2_DMA_WCHAN_STAT_30	0x00000cc4	bnx2.h
27242	BNX2_DMA_WCHAN_STAT_31	0x00000cc8	bnx2.h
27243	BNX2_DMA_WCHAN_STAT_32	0x00000ccc	bnx2.h
27244	BNX2_DMA_WCHAN_STAT_40	0x00000cd0	bnx2.h
27245	BNX2_DMA_WCHAN_STAT_41	0x00000cd4	bnx2.h
27246	BNX2_DMA_WCHAN_STAT_42	0x00000cd8	bnx2.h
27247	BNX2_DMA_WCHAN_STAT_50	0x00000cdc	bnx2.h
27248	BNX2_DMA_WCHAN_STAT_51	0x00000ce0	bnx2.h
27249	BNX2_DMA_WCHAN_STAT_52	0x00000ce4	bnx2.h
27250	BNX2_DMA_WCHAN_STAT_60	0x00000ce8	bnx2.h
27251	BNX2_DMA_WCHAN_STAT_61	0x00000cec	bnx2.h
27252	BNX2_DMA_WCHAN_STAT_62	0x00000cf0	bnx2.h
27253	BNX2_DMA_WCHAN_STAT_70	0x00000cf4	bnx2.h
27254	BNX2_DMA_WCHAN_STAT_71	0x00000cf8	bnx2.h
27255	BNX2_DMA_WCHAN_STAT_72	0x00000cfc	bnx2.h
27256	BNX2_DMA_ARB_STAT_00	0x00000d00	bnx2.h
27257	BNX2_DMA_ARB_STAT_00_MASTER	(0xffffL<<0)	bnx2.h
27258	BNX2_DMA_ARB_STAT_00_MASTER_ENC	(0xffL<<16)	bnx2.h
27259	BNX2_DMA_ARB_STAT_00_CUR_BINMST	(0xffL<<24)	bnx2.h
27260	BNX2_DMA_ARB_STAT_01	0x00000d04	bnx2.h
27261	BNX2_DMA_ARB_STAT_01_LPR_RPTR	(0xfL<<0)	bnx2.h
27262	BNX2_DMA_ARB_STAT_01_LPR_WPTR	(0xfL<<4)	bnx2.h
27263	BNX2_DMA_ARB_STAT_01_LPB_RPTR	(0xfL<<8)	bnx2.h
27264	BNX2_DMA_ARB_STAT_01_LPB_WPTR	(0xfL<<12)	bnx2.h
27265	BNX2_DMA_ARB_STAT_01_HPR_RPTR	(0xfL<<16)	bnx2.h
27266	BNX2_DMA_ARB_STAT_01_HPR_WPTR	(0xfL<<20)	bnx2.h
27267	BNX2_DMA_ARB_STAT_01_HPB_RPTR	(0xfL<<24)	bnx2.h
27268	BNX2_DMA_ARB_STAT_01_HPB_WPTR	(0xfL<<28)	bnx2.h
27269	BNX2_DMA_FUSE_CTRL0_CMD	0x00000f00	bnx2.h
27270	BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_D	(1L<<0)	bnx2.h
27271	BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_D	(1L<<1)	bnx2.h
27272	BNX2_DMA_FUSE_CTRL0_CMD_SHIFT	(1L<<2)	bnx2.h
27273	BNX2_DMA_FUSE_CTRL0_CMD_LOAD	(1L<<3)	bnx2.h
27274	BNX2_DMA_FUSE_CTRL0_CMD_SEL	(0xfL<<8)	bnx2.h
27275	BNX2_DMA_FUSE_CTRL0_DATA	0x00000f04	bnx2.h
27276	BNX2_DMA_FUSE_CTRL1_CMD	0x00000f08	bnx2.h
27277	BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_D	(1L<<0)	bnx2.h
27278	BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_D	(1L<<1)	bnx2.h
27279	BNX2_DMA_FUSE_CTRL1_CMD_SHIFT	(1L<<2)	bnx2.h
27280	BNX2_DMA_FUSE_CTRL1_CMD_LOAD	(1L<<3)	bnx2.h
27281	BNX2_DMA_FUSE_CTRL1_CMD_SEL	(0xfL<<8)	bnx2.h
27282	BNX2_DMA_FUSE_CTRL1_DATA	0x00000f0c	bnx2.h
27283	BNX2_DMA_FUSE_CTRL2_CMD	0x00000f10	bnx2.h
27284	BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_D	(1L<<0)	bnx2.h
27285	BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_D	(1L<<1)	bnx2.h
27286	BNX2_DMA_FUSE_CTRL2_CMD_SHIFT	(1L<<2)	bnx2.h
27287	BNX2_DMA_FUSE_CTRL2_CMD_LOAD	(1L<<3)	bnx2.h
27288	BNX2_DMA_FUSE_CTRL2_CMD_SEL	(0xfL<<8)	bnx2.h
27289	BNX2_DMA_FUSE_CTRL2_DATA	0x00000f14	bnx2.h
27290	BNX2_CTX_COMMAND	0x00001000	bnx2.h
27291	BNX2_CTX_COMMAND_ENABLED	(1L<<0)	bnx2.h
27292	BNX2_CTX_STATUS	0x00001004	bnx2.h
27293	BNX2_CTX_STATUS_LOCK_WAIT	(1L<<0)	bnx2.h
27294	BNX2_CTX_STATUS_READ_STAT	(1L<<16)	bnx2.h
27295	BNX2_CTX_STATUS_WRITE_STAT	(1L<<17)	bnx2.h
27296	BNX2_CTX_STATUS_ACC_STALL_STAT	(1L<<18)	bnx2.h
27297	BNX2_CTX_STATUS_LOCK_STALL_STAT	(1L<<19)	bnx2.h
27298	BNX2_CTX_VIRT_ADDR	0x00001008	bnx2.h
27299	BNX2_CTX_VIRT_ADDR_VIRT_ADDR	(0x7fffL<<6)	bnx2.h
27300	BNX2_CTX_PAGE_TBL	0x0000100c	bnx2.h
27301	BNX2_CTX_PAGE_TBL_PAGE_TBL	(0x3fffL<<6)	bnx2.h
27302	BNX2_CTX_DATA_ADR	0x00001010	bnx2.h
27303	BNX2_CTX_DATA_ADR_DATA_ADR	(0x7ffffL<<2)	bnx2.h
27304	BNX2_CTX_DATA	0x00001014	bnx2.h
27305	BNX2_CTX_LOCK	0x00001018	bnx2.h
27306	BNX2_CTX_LOCK_TYPE	(0x7L<<0)	bnx2.h
27307	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VO	(0x0L<<0)	bnx2.h
27308	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_CO	(0x7L<<0)	bnx2.h
27309	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PR	(0x1L<<0)	bnx2.h
27310	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX	(0x2L<<0)	bnx2.h
27311	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TI	(0x4L<<0)	bnx2.h
27312	BNX2_CTX_LOCK_CID_VALUE	(0x3fffL<<7)	bnx2.h
27313	BNX2_CTX_LOCK_GRANTED	(1L<<26)	bnx2.h
27314	BNX2_CTX_LOCK_MODE	(0x7L<<27)	bnx2.h
27315	BNX2_CTX_LOCK_MODE_UNLOCK	(0x0L<<27)	bnx2.h
27316	BNX2_CTX_LOCK_MODE_IMMEDIATE	(0x1L<<27)	bnx2.h
27317	BNX2_CTX_LOCK_MODE_SURE	(0x2L<<27)	bnx2.h
27318	BNX2_CTX_LOCK_STATUS	(1L<<30)	bnx2.h
27319	BNX2_CTX_LOCK_REQ	(1L<<31)	bnx2.h
27320	BNX2_CTX_ACCESS_STATUS	0x00001040	bnx2.h
27321	BNX2_CTX_ACCESS_STATUS_MASTEREN	(0xfL<<0)	bnx2.h
27322	BNX2_CTX_ACCESS_STATUS_ACCESSME	(0x3L<<10)	bnx2.h
27323	BNX2_CTX_ACCESS_STATUS_PAGETABL	(0x3L<<12)	bnx2.h
27324	BNX2_CTX_ACCESS_STATUS_ACCESSME	(0x3L<<14)	bnx2.h
27325	BNX2_CTX_ACCESS_STATUS_QUALIFIE	(0x7ffL<<17)	bnx2.h
27326	BNX2_CTX_DBG_LOCK_STATUS	0x00001044	bnx2.h
27327	BNX2_CTX_DBG_LOCK_STATUS_SM	(0x3ffL<<0)	bnx2.h
27328	BNX2_CTX_DBG_LOCK_STATUS_MATCH	(0x3ffL<<22)	bnx2.h
27329	BNX2_CTX_CHNL_LOCK_STATUS_0	0x00001080	bnx2.h
27330	BNX2_CTX_CHNL_LOCK_STATUS_0_CID	(0x3fffL<<0)	bnx2.h
27331	BNX2_CTX_CHNL_LOCK_STATUS_0_TYP	(0x3L<<14)	bnx2.h
27332	BNX2_CTX_CHNL_LOCK_STATUS_0_MOD	(1L<<16)	bnx2.h
27333	BNX2_CTX_CHNL_LOCK_STATUS_1	0x00001084	bnx2.h
27334	BNX2_CTX_CHNL_LOCK_STATUS_2	0x00001088	bnx2.h
27335	BNX2_CTX_CHNL_LOCK_STATUS_3	0x0000108c	bnx2.h
27336	BNX2_CTX_CHNL_LOCK_STATUS_4	0x00001090	bnx2.h
27337	BNX2_CTX_CHNL_LOCK_STATUS_5	0x00001094	bnx2.h
27338	BNX2_CTX_CHNL_LOCK_STATUS_6	0x00001098	bnx2.h
27339	BNX2_CTX_CHNL_LOCK_STATUS_7	0x0000109c	bnx2.h
27340	BNX2_CTX_CHNL_LOCK_STATUS_8	0x000010a0	bnx2.h
27341	BNX2_EMAC_MODE	0x00001400	bnx2.h
27342	BNX2_EMAC_MODE_RESET	(1L<<0)	bnx2.h
27343	BNX2_EMAC_MODE_HALF_DUPLEX	(1L<<1)	bnx2.h
27344	BNX2_EMAC_MODE_PORT	(0x3L<<2)	bnx2.h
27345	BNX2_EMAC_MODE_PORT_NONE	(0L<<2)	bnx2.h
27346	BNX2_EMAC_MODE_PORT_MII	(1L<<2)	bnx2.h
27347	BNX2_EMAC_MODE_PORT_GMII	(2L<<2)	bnx2.h
27348	BNX2_EMAC_MODE_PORT_MII_10	(3L<<2)	bnx2.h
27349	BNX2_EMAC_MODE_MAC_LOOP	(1L<<4)	bnx2.h
27350	BNX2_EMAC_MODE_25G	(1L<<5)	bnx2.h
27351	BNX2_EMAC_MODE_TAGGED_MAC_CTL	(1L<<7)	bnx2.h
27352	BNX2_EMAC_MODE_TX_BURST	(1L<<8)	bnx2.h
27353	BNX2_EMAC_MODE_MAX_DEFER_DROP_E	(1L<<9)	bnx2.h
27354	BNX2_EMAC_MODE_EXT_LINK_POL	(1L<<10)	bnx2.h
27355	BNX2_EMAC_MODE_FORCE_LINK	(1L<<11)	bnx2.h
27356	BNX2_EMAC_MODE_MPKT	(1L<<18)	bnx2.h
27357	BNX2_EMAC_MODE_MPKT_RCVD	(1L<<19)	bnx2.h
27358	BNX2_EMAC_MODE_ACPI_RCVD	(1L<<20)	bnx2.h
27359	BNX2_EMAC_STATUS	0x00001404	bnx2.h
27360	BNX2_EMAC_STATUS_LINK	(1L<<11)	bnx2.h
27361	BNX2_EMAC_STATUS_LINK_CHANGE	(1L<<12)	bnx2.h
27362	BNX2_EMAC_STATUS_MI_COMPLETE	(1L<<22)	bnx2.h
27363	BNX2_EMAC_STATUS_MI_INT	(1L<<23)	bnx2.h
27364	BNX2_EMAC_STATUS_AP_ERROR	(1L<<24)	bnx2.h
27365	BNX2_EMAC_STATUS_PARITY_ERROR_S	(1L<<31)	bnx2.h
27366	BNX2_EMAC_ATTENTION_ENA	0x00001408	bnx2.h
27367	BNX2_EMAC_ATTENTION_ENA_LINK	(1L<<11)	bnx2.h
27368	BNX2_EMAC_ATTENTION_ENA_MI_COMP	(1L<<22)	bnx2.h
27369	BNX2_EMAC_ATTENTION_ENA_MI_INT	(1L<<23)	bnx2.h
27370	BNX2_EMAC_ATTENTION_ENA_AP_ERRO	(1L<<24)	bnx2.h
27371	BNX2_EMAC_LED	0x0000140c	bnx2.h
27372	BNX2_EMAC_LED_OVERRIDE	(1L<<0)	bnx2.h
27373	BNX2_EMAC_LED_1000MB_OVERRIDE	(1L<<1)	bnx2.h
27374	BNX2_EMAC_LED_100MB_OVERRIDE	(1L<<2)	bnx2.h
27375	BNX2_EMAC_LED_10MB_OVERRIDE	(1L<<3)	bnx2.h
27376	BNX2_EMAC_LED_TRAFFIC_OVERRIDE	(1L<<4)	bnx2.h
27377	BNX2_EMAC_LED_BLNK_TRAFFIC	(1L<<5)	bnx2.h
27378	BNX2_EMAC_LED_TRAFFIC	(1L<<6)	bnx2.h
27379	BNX2_EMAC_LED_1000MB	(1L<<7)	bnx2.h
27380	BNX2_EMAC_LED_100MB	(1L<<8)	bnx2.h
27381	BNX2_EMAC_LED_10MB	(1L<<9)	bnx2.h
27382	BNX2_EMAC_LED_TRAFFIC_STAT	(1L<<10)	bnx2.h
27383	BNX2_EMAC_LED_BLNK_RATE	(0xfffL<<19)	bnx2.h
27384	BNX2_EMAC_LED_BLNK_RATE_ENA	(1L<<31)	bnx2.h
27385	BNX2_EMAC_MAC_MATCH0	0x00001410	bnx2.h
27386	BNX2_EMAC_MAC_MATCH1	0x00001414	bnx2.h
27387	BNX2_EMAC_MAC_MATCH2	0x00001418	bnx2.h
27388	BNX2_EMAC_MAC_MATCH3	0x0000141c	bnx2.h
27389	BNX2_EMAC_MAC_MATCH4	0x00001420	bnx2.h
27390	BNX2_EMAC_MAC_MATCH5	0x00001424	bnx2.h
27391	BNX2_EMAC_MAC_MATCH6	0x00001428	bnx2.h
27392	BNX2_EMAC_MAC_MATCH7	0x0000142c	bnx2.h
27393	BNX2_EMAC_MAC_MATCH8	0x00001430	bnx2.h
27394	BNX2_EMAC_MAC_MATCH9	0x00001434	bnx2.h
27395	BNX2_EMAC_MAC_MATCH10	0x00001438	bnx2.h
27396	BNX2_EMAC_MAC_MATCH11	0x0000143c	bnx2.h
27397	BNX2_EMAC_MAC_MATCH12	0x00001440	bnx2.h
27398	BNX2_EMAC_MAC_MATCH13	0x00001444	bnx2.h
27399	BNX2_EMAC_MAC_MATCH14	0x00001448	bnx2.h
27400	BNX2_EMAC_MAC_MATCH15	0x0000144c	bnx2.h
27401	BNX2_EMAC_MAC_MATCH16	0x00001450	bnx2.h
27402	BNX2_EMAC_MAC_MATCH17	0x00001454	bnx2.h
27403	BNX2_EMAC_MAC_MATCH18	0x00001458	bnx2.h
27404	BNX2_EMAC_MAC_MATCH19	0x0000145c	bnx2.h
27405	BNX2_EMAC_MAC_MATCH20	0x00001460	bnx2.h
27406	BNX2_EMAC_MAC_MATCH21	0x00001464	bnx2.h
27407	BNX2_EMAC_MAC_MATCH22	0x00001468	bnx2.h
27408	BNX2_EMAC_MAC_MATCH23	0x0000146c	bnx2.h
27409	BNX2_EMAC_MAC_MATCH24	0x00001470	bnx2.h
27410	BNX2_EMAC_MAC_MATCH25	0x00001474	bnx2.h
27411	BNX2_EMAC_MAC_MATCH26	0x00001478	bnx2.h
27412	BNX2_EMAC_MAC_MATCH27	0x0000147c	bnx2.h
27413	BNX2_EMAC_MAC_MATCH28	0x00001480	bnx2.h
27414	BNX2_EMAC_MAC_MATCH29	0x00001484	bnx2.h
27415	BNX2_EMAC_MAC_MATCH30	0x00001488	bnx2.h
27416	BNX2_EMAC_MAC_MATCH31	0x0000148c	bnx2.h
27417	BNX2_EMAC_BACKOFF_SEED	0x00001498	bnx2.h
27418	BNX2_EMAC_BACKOFF_SEED_EMAC_BAC	(0x3ffL<<0)	bnx2.h
27419	BNX2_EMAC_RX_MTU_SIZE	0x0000149c	bnx2.h
27420	BNX2_EMAC_RX_MTU_SIZE_MTU_SIZE	(0xffffL<<0)	bnx2.h
27421	BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA	(1L<<31)	bnx2.h
27422	BNX2_EMAC_SERDES_CNTL	0x000014a4	bnx2.h
27423	BNX2_EMAC_SERDES_CNTL_RXR	(0x7L<<0)	bnx2.h
27424	BNX2_EMAC_SERDES_CNTL_RXG	(0x3L<<3)	bnx2.h
27425	BNX2_EMAC_SERDES_CNTL_RXCKSEL	(1L<<6)	bnx2.h
27426	BNX2_EMAC_SERDES_CNTL_TXBIAS	(0x7L<<7)	bnx2.h
27427	BNX2_EMAC_SERDES_CNTL_BGMAX	(1L<<10)	bnx2.h
27428	BNX2_EMAC_SERDES_CNTL_BGMIN	(1L<<11)	bnx2.h
27429	BNX2_EMAC_SERDES_CNTL_TXMODE	(1L<<12)	bnx2.h
27430	BNX2_EMAC_SERDES_CNTL_TXEDGE	(1L<<13)	bnx2.h
27431	BNX2_EMAC_SERDES_CNTL_SERDES_MO	(1L<<14)	bnx2.h
27432	BNX2_EMAC_SERDES_CNTL_PLLTEST	(1L<<15)	bnx2.h
27433	BNX2_EMAC_SERDES_CNTL_CDET_EN	(1L<<16)	bnx2.h
27434	BNX2_EMAC_SERDES_CNTL_TBI_LBK	(1L<<17)	bnx2.h
27435	BNX2_EMAC_SERDES_CNTL_REMOTE_LB	(1L<<18)	bnx2.h
27436	BNX2_EMAC_SERDES_CNTL_REV_PHASE	(1L<<19)	bnx2.h
27437	BNX2_EMAC_SERDES_CNTL_REGCTL12	(0x3L<<20)	bnx2.h
27438	BNX2_EMAC_SERDES_CNTL_REGCTL25	(0x3L<<22)	bnx2.h
27439	BNX2_EMAC_SERDES_STATUS	0x000014a8	bnx2.h
27440	BNX2_EMAC_SERDES_STATUS_RX_STAT	(0xffL<<0)	bnx2.h
27441	BNX2_EMAC_SERDES_STATUS_COMMA_D	(1L<<8)	bnx2.h
27442	BNX2_EMAC_MDIO_COMM	0x000014ac	bnx2.h
27443	BNX2_EMAC_MDIO_COMM_DATA	(0xffffL<<0)	bnx2.h
27444	BNX2_EMAC_MDIO_COMM_REG_ADDR	(0x1fL<<16)	bnx2.h
27445	BNX2_EMAC_MDIO_COMM_PHY_ADDR	(0x1fL<<21)	bnx2.h
27446	BNX2_EMAC_MDIO_COMM_COMMAND	(0x3L<<26)	bnx2.h
27447	BNX2_EMAC_MDIO_COMM_COMMAND_UND	(0L<<26)	bnx2.h
27448	BNX2_EMAC_MDIO_COMM_COMMAND_WRI	(1L<<26)	bnx2.h
27449	BNX2_EMAC_MDIO_COMM_COMMAND_REA	(2L<<26)	bnx2.h
27450	BNX2_EMAC_MDIO_COMM_COMMAND_UND	(3L<<26)	bnx2.h
27451	BNX2_EMAC_MDIO_COMM_FAIL	(1L<<28)	bnx2.h
27452	BNX2_EMAC_MDIO_COMM_START_BUSY	(1L<<29)	bnx2.h
27453	BNX2_EMAC_MDIO_COMM_DISEXT	(1L<<30)	bnx2.h
27454	BNX2_EMAC_MDIO_STATUS	0x000014b0	bnx2.h
27455	BNX2_EMAC_MDIO_STATUS_LINK	(1L<<0)	bnx2.h
27456	BNX2_EMAC_MDIO_STATUS_10MB	(1L<<1)	bnx2.h
27457	BNX2_EMAC_MDIO_MODE	0x000014b4	bnx2.h
27458	BNX2_EMAC_MDIO_MODE_SHORT_PREAM	(1L<<1)	bnx2.h
27459	BNX2_EMAC_MDIO_MODE_AUTO_POLL	(1L<<4)	bnx2.h
27460	BNX2_EMAC_MDIO_MODE_BIT_BANG	(1L<<8)	bnx2.h
27461	BNX2_EMAC_MDIO_MODE_MDIO	(1L<<9)	bnx2.h
27462	BNX2_EMAC_MDIO_MODE_MDIO_OE	(1L<<10)	bnx2.h
27463	BNX2_EMAC_MDIO_MODE_MDC	(1L<<11)	bnx2.h
27464	BNX2_EMAC_MDIO_MODE_MDINT	(1L<<12)	bnx2.h
27465	BNX2_EMAC_MDIO_MODE_CLOCK_CNT	(0x1fL<<16)	bnx2.h
27466	BNX2_EMAC_MDIO_AUTO_STATUS	0x000014b8	bnx2.h
27467	BNX2_EMAC_MDIO_AUTO_STATUS_AUTO	(1L<<0)	bnx2.h
27468	BNX2_EMAC_TX_MODE	0x000014bc	bnx2.h
27469	BNX2_EMAC_TX_MODE_RESET	(1L<<0)	bnx2.h
27470	BNX2_EMAC_TX_MODE_EXT_PAUSE_EN	(1L<<3)	bnx2.h
27471	BNX2_EMAC_TX_MODE_FLOW_EN	(1L<<4)	bnx2.h
27472	BNX2_EMAC_TX_MODE_BIG_BACKOFF	(1L<<5)	bnx2.h
27473	BNX2_EMAC_TX_MODE_LONG_PAUSE	(1L<<6)	bnx2.h
27474	BNX2_EMAC_TX_MODE_LINK_AWARE	(1L<<7)	bnx2.h
27475	BNX2_EMAC_TX_STATUS	0x000014c0	bnx2.h
27476	BNX2_EMAC_TX_STATUS_XOFFED	(1L<<0)	bnx2.h
27477	BNX2_EMAC_TX_STATUS_XOFF_SENT	(1L<<1)	bnx2.h
27478	BNX2_EMAC_TX_STATUS_XON_SENT	(1L<<2)	bnx2.h
27479	BNX2_EMAC_TX_STATUS_LINK_UP	(1L<<3)	bnx2.h
27480	BNX2_EMAC_TX_STATUS_UNDERRUN	(1L<<4)	bnx2.h
27481	BNX2_EMAC_TX_LENGTHS	0x000014c4	bnx2.h
27482	BNX2_EMAC_TX_LENGTHS_SLOT	(0xffL<<0)	bnx2.h
27483	BNX2_EMAC_TX_LENGTHS_IPG	(0xfL<<8)	bnx2.h
27484	BNX2_EMAC_TX_LENGTHS_IPG_CRS	(0x3L<<12)	bnx2.h
27485	BNX2_EMAC_RX_MODE	0x000014c8	bnx2.h
27486	BNX2_EMAC_RX_MODE_RESET	(1L<<0)	bnx2.h
27487	BNX2_EMAC_RX_MODE_FLOW_EN	(1L<<2)	bnx2.h
27488	BNX2_EMAC_RX_MODE_KEEP_MAC_CONT	(1L<<3)	bnx2.h
27489	BNX2_EMAC_RX_MODE_KEEP_PAUSE	(1L<<4)	bnx2.h
27490	BNX2_EMAC_RX_MODE_ACCEPT_OVERSI	(1L<<5)	bnx2.h
27491	BNX2_EMAC_RX_MODE_ACCEPT_RUNTS	(1L<<6)	bnx2.h
27492	BNX2_EMAC_RX_MODE_LLC_CHK	(1L<<7)	bnx2.h
27493	BNX2_EMAC_RX_MODE_PROMISCUOUS	(1L<<8)	bnx2.h
27494	BNX2_EMAC_RX_MODE_NO_CRC_CHK	(1L<<9)	bnx2.h
27495	BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG	(1L<<10)	bnx2.h
27496	BNX2_EMAC_RX_MODE_FILT_BROADCAS	(1L<<11)	bnx2.h
27497	BNX2_EMAC_RX_MODE_SORT_MODE	(1L<<12)	bnx2.h
27498	BNX2_EMAC_RX_STATUS	0x000014cc	bnx2.h
27499	BNX2_EMAC_RX_STATUS_FFED	(1L<<0)	bnx2.h
27500	BNX2_EMAC_RX_STATUS_FF_RECEIVED	(1L<<1)	bnx2.h
27501	BNX2_EMAC_RX_STATUS_N_RECEIVED	(1L<<2)	bnx2.h
27502	BNX2_EMAC_MULTICAST_HASH0	0x000014d0	bnx2.h
27503	BNX2_EMAC_MULTICAST_HASH1	0x000014d4	bnx2.h
27504	BNX2_EMAC_MULTICAST_HASH2	0x000014d8	bnx2.h
27505	BNX2_EMAC_MULTICAST_HASH3	0x000014dc	bnx2.h
27506	BNX2_EMAC_MULTICAST_HASH4	0x000014e0	bnx2.h
27507	BNX2_EMAC_MULTICAST_HASH5	0x000014e4	bnx2.h
27508	BNX2_EMAC_MULTICAST_HASH6	0x000014e8	bnx2.h
27509	BNX2_EMAC_MULTICAST_HASH7	0x000014ec	bnx2.h
27510	BNX2_EMAC_RX_STAT_IFHCINOCTETS	0x00001500	bnx2.h
27511	BNX2_EMAC_RX_STAT_IFHCINBADOCTE	0x00001504	bnx2.h
27512	BNX2_EMAC_RX_STAT_ETHERSTATSFRA	0x00001508	bnx2.h
27513	BNX2_EMAC_RX_STAT_IFHCINUCASTPK	0x0000150c	bnx2.h
27514	BNX2_EMAC_RX_STAT_IFHCINMULTICA	0x00001510	bnx2.h
27515	BNX2_EMAC_RX_STAT_IFHCINBROADCA	0x00001514	bnx2.h
27516	BNX2_EMAC_RX_STAT_DOT3STATSFCSE	0x00001518	bnx2.h
27517	BNX2_EMAC_RX_STAT_DOT3STATSALIG	0x0000151c	bnx2.h
27518	BNX2_EMAC_RX_STAT_DOT3STATSCARR	0x00001520	bnx2.h
27519	BNX2_EMAC_RX_STAT_XONPAUSEFRAME	0x00001524	bnx2.h
27520	BNX2_EMAC_RX_STAT_XOFFPAUSEFRAM	0x00001528	bnx2.h
27521	BNX2_EMAC_RX_STAT_MACCONTROLFRA	0x0000152c	bnx2.h
27522	BNX2_EMAC_RX_STAT_XOFFSTATEENTE	0x00001530	bnx2.h
27523	BNX2_EMAC_RX_STAT_DOT3STATSFRAM	0x00001534	bnx2.h
27524	BNX2_EMAC_RX_STAT_ETHERSTATSJAB	0x00001538	bnx2.h
27525	BNX2_EMAC_RX_STAT_ETHERSTATSUND	0x0000153c	bnx2.h
27526	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001540	bnx2.h
27527	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001544	bnx2.h
27528	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001548	bnx2.h
27529	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x0000154c	bnx2.h
27530	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001550	bnx2.h
27531	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001554	bnx2.h
27532	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001558	bnx2.h
27533	BNX2_EMAC_RXMAC_DEBUG0	0x0000155c	bnx2.h
27534	BNX2_EMAC_RXMAC_DEBUG1	0x00001560	bnx2.h
27535	BNX2_EMAC_RXMAC_DEBUG1_LENGTH_N	(1L<<0)	bnx2.h
27536	BNX2_EMAC_RXMAC_DEBUG1_LENGTH_O	(1L<<1)	bnx2.h
27537	BNX2_EMAC_RXMAC_DEBUG1_BAD_CRC	(1L<<2)	bnx2.h
27538	BNX2_EMAC_RXMAC_DEBUG1_RX_ERROR	(1L<<3)	bnx2.h
27539	BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ER	(1L<<4)	bnx2.h
27540	BNX2_EMAC_RXMAC_DEBUG1_LAST_DAT	(1L<<5)	bnx2.h
27541	BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE	(1L<<6)	bnx2.h
27542	BNX2_EMAC_RXMAC_DEBUG1_BYTE_COU	(0xffffL<<7)	bnx2.h
27543	BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIM	(0xffL<<23)	bnx2.h
27544	BNX2_EMAC_RXMAC_DEBUG2	0x00001564	bnx2.h
27545	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x7L<<0)	bnx2.h
27546	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x0L<<0)	bnx2.h
27547	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x1L<<0)	bnx2.h
27548	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x2L<<0)	bnx2.h
27549	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x3L<<0)	bnx2.h
27550	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x4L<<0)	bnx2.h
27551	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x5L<<0)	bnx2.h
27552	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x6L<<0)	bnx2.h
27553	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x7L<<0)	bnx2.h
27554	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0xfL<<3)	bnx2.h
27555	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x0L<<3)	bnx2.h
27556	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x1L<<3)	bnx2.h
27557	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x2L<<3)	bnx2.h
27558	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x3L<<3)	bnx2.h
27559	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x4L<<3)	bnx2.h
27560	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x5L<<3)	bnx2.h
27561	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x6L<<3)	bnx2.h
27562	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x7L<<3)	bnx2.h
27563	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x8L<<3)	bnx2.h
27564	BNX2_EMAC_RXMAC_DEBUG2_BYTE_IN	(0xffL<<7)	bnx2.h
27565	BNX2_EMAC_RXMAC_DEBUG2_FALSEC	(1L<<15)	bnx2.h
27566	BNX2_EMAC_RXMAC_DEBUG2_TAGGED	(1L<<16)	bnx2.h
27567	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(1L<<18)	bnx2.h
27568	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(0L<<18)	bnx2.h
27569	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(1L<<18)	bnx2.h
27570	BNX2_EMAC_RXMAC_DEBUG2_SE_COUNT	(0xfL<<19)	bnx2.h
27571	BNX2_EMAC_RXMAC_DEBUG2_QUANTA	(0x1fL<<23)	bnx2.h
27572	BNX2_EMAC_RXMAC_DEBUG3	0x00001568	bnx2.h
27573	BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CT	(0xffffL<<0)	bnx2.h
27574	BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUS	(0xffffL<<16)	bnx2.h
27575	BNX2_EMAC_RXMAC_DEBUG4	0x0000156c	bnx2.h
27576	BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIE	(0xffffL<<0)	bnx2.h
27577	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x3fL<<16)	bnx2.h
27578	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x0L<<16)	bnx2.h
27579	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1L<<16)	bnx2.h
27580	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x2L<<16)	bnx2.h
27581	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x3L<<16)	bnx2.h
27582	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x7L<<16)	bnx2.h
27583	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x5L<<16)	bnx2.h
27584	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x6L<<16)	bnx2.h
27585	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x7L<<16)	bnx2.h
27586	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x8L<<16)	bnx2.h
27587	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x9L<<16)	bnx2.h
27588	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xaL<<16)	bnx2.h
27589	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xeL<<16)	bnx2.h
27590	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xfL<<16)	bnx2.h
27591	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x10L<<16)	bnx2.h
27592	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x11L<<16)	bnx2.h
27593	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x12L<<16)	bnx2.h
27594	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x13L<<16)	bnx2.h
27595	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x14L<<16)	bnx2.h
27596	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x15L<<16)	bnx2.h
27597	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x16L<<16)	bnx2.h
27598	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x17L<<16)	bnx2.h
27599	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x18L<<16)	bnx2.h
27600	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x19L<<16)	bnx2.h
27601	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1aL<<16)	bnx2.h
27602	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1bL<<16)	bnx2.h
27603	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1cL<<16)	bnx2.h
27604	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1dL<<16)	bnx2.h
27605	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1eL<<16)	bnx2.h
27606	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1fL<<16)	bnx2.h
27607	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x20L<<16)	bnx2.h
27608	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x21L<<16)	bnx2.h
27609	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x22L<<16)	bnx2.h
27610	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x23L<<16)	bnx2.h
27611	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x24L<<16)	bnx2.h
27612	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x25L<<16)	bnx2.h
27613	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x26L<<16)	bnx2.h
27614	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x27L<<16)	bnx2.h
27615	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x28L<<16)	bnx2.h
27616	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x29L<<16)	bnx2.h
27617	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x2aL<<16)	bnx2.h
27618	BNX2_EMAC_RXMAC_DEBUG4_DROP_PKT	(1L<<22)	bnx2.h
27619	BNX2_EMAC_RXMAC_DEBUG4_SLOT_FIL	(1L<<23)	bnx2.h
27620	BNX2_EMAC_RXMAC_DEBUG4_FALSE_CA	(1L<<24)	bnx2.h
27621	BNX2_EMAC_RXMAC_DEBUG4_LAST_DAT	(1L<<25)	bnx2.h
27622	BNX2_EMAC_RXMAC_DEBUG4_sfd_FOUN	(1L<<26)	bnx2.h
27623	BNX2_EMAC_RXMAC_DEBUG4_ADVANCE	(1L<<27)	bnx2.h
27624	BNX2_EMAC_RXMAC_DEBUG4_START	(1L<<28)	bnx2.h
27625	BNX2_EMAC_RXMAC_DEBUG5	0x00001570	bnx2.h
27626	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(0x7L<<0)	bnx2.h
27627	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(0L<<0)	bnx2.h
27628	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(1L<<0)	bnx2.h
27629	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(2L<<0)	bnx2.h
27630	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(3L<<0)	bnx2.h
27631	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(4L<<0)	bnx2.h
27632	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(5L<<0)	bnx2.h
27633	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(6L<<0)	bnx2.h
27634	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<4)	bnx2.h
27635	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x0L<<4)	bnx2.h
27636	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x1L<<4)	bnx2.h
27637	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x2L<<4)	bnx2.h
27638	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x3L<<4)	bnx2.h
27639	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x4L<<4)	bnx2.h
27640	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x6L<<4)	bnx2.h
27641	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<4)	bnx2.h
27642	BNX2_EMAC_RXMAC_DEBUG5_EOF_DETE	(1L<<7)	bnx2.h
27643	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<8)	bnx2.h
27644	BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_	(1L<<11)	bnx2.h
27645	BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCO	(1L<<12)	bnx2.h
27646	BNX2_EMAC_RXMAC_DEBUG5_LOAD_DAT	(1L<<13)	bnx2.h
27647	BNX2_EMAC_RXMAC_DEBUG5_LOAD_STA	(1L<<14)	bnx2.h
27648	BNX2_EMAC_RXMAC_DEBUG5_CLR_STAT	(1L<<15)	bnx2.h
27649	BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_	(0x3L<<16)	bnx2.h
27650	BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_	(1L<<19)	bnx2.h
27651	BNX2_EMAC_RXMAC_DEBUG5_FMLEN	(0xfffL<<20)	bnx2.h
27652	BNX2_EMAC_RX_STAT_AC0	0x00001580	bnx2.h
27653	BNX2_EMAC_RX_STAT_AC1	0x00001584	bnx2.h
27654	BNX2_EMAC_RX_STAT_AC2	0x00001588	bnx2.h
27655	BNX2_EMAC_RX_STAT_AC3	0x0000158c	bnx2.h
27656	BNX2_EMAC_RX_STAT_AC4	0x00001590	bnx2.h
27657	BNX2_EMAC_RX_STAT_AC5	0x00001594	bnx2.h
27658	BNX2_EMAC_RX_STAT_AC6	0x00001598	bnx2.h
27659	BNX2_EMAC_RX_STAT_AC7	0x0000159c	bnx2.h
27660	BNX2_EMAC_RX_STAT_AC8	0x000015a0	bnx2.h
27661	BNX2_EMAC_RX_STAT_AC9	0x000015a4	bnx2.h
27662	BNX2_EMAC_RX_STAT_AC10	0x000015a8	bnx2.h
27663	BNX2_EMAC_RX_STAT_AC11	0x000015ac	bnx2.h
27664	BNX2_EMAC_RX_STAT_AC12	0x000015b0	bnx2.h
27665	BNX2_EMAC_RX_STAT_AC13	0x000015b4	bnx2.h
27666	BNX2_EMAC_RX_STAT_AC14	0x000015b8	bnx2.h
27667	BNX2_EMAC_RX_STAT_AC15	0x000015bc	bnx2.h
27668	BNX2_EMAC_RX_STAT_AC16	0x000015c0	bnx2.h
27669	BNX2_EMAC_RX_STAT_AC17	0x000015c4	bnx2.h
27670	BNX2_EMAC_RX_STAT_AC18	0x000015c8	bnx2.h
27671	BNX2_EMAC_RX_STAT_AC19	0x000015cc	bnx2.h
27672	BNX2_EMAC_RX_STAT_AC20	0x000015d0	bnx2.h
27673	BNX2_EMAC_RX_STAT_AC21	0x000015d4	bnx2.h
27674	BNX2_EMAC_RX_STAT_AC22	0x000015d8	bnx2.h
27675	BNX2_EMAC_RXMAC_SUC_DBG_OVERRUN	0x000015dc	bnx2.h
27676	BNX2_EMAC_TX_STAT_IFHCOUTOCTETS	0x00001600	bnx2.h
27677	BNX2_EMAC_TX_STAT_IFHCOUTBADOCT	0x00001604	bnx2.h
27678	BNX2_EMAC_TX_STAT_ETHERSTATSCOL	0x00001608	bnx2.h
27679	BNX2_EMAC_TX_STAT_OUTXONSENT	0x0000160c	bnx2.h
27680	BNX2_EMAC_TX_STAT_OUTXOFFSENT	0x00001610	bnx2.h
27681	BNX2_EMAC_TX_STAT_FLOWCONTROLDO	0x00001614	bnx2.h
27682	BNX2_EMAC_TX_STAT_DOT3STATSSING	0x00001618	bnx2.h
27683	BNX2_EMAC_TX_STAT_DOT3STATSMULT	0x0000161c	bnx2.h
27684	BNX2_EMAC_TX_STAT_DOT3STATSDEFE	0x00001620	bnx2.h
27685	BNX2_EMAC_TX_STAT_DOT3STATSEXCE	0x00001624	bnx2.h
27686	BNX2_EMAC_TX_STAT_DOT3STATSLATE	0x00001628	bnx2.h
27687	BNX2_EMAC_TX_STAT_IFHCOUTUCASTP	0x0000162c	bnx2.h
27688	BNX2_EMAC_TX_STAT_IFHCOUTMULTIC	0x00001630	bnx2.h
27689	BNX2_EMAC_TX_STAT_IFHCOUTBROADC	0x00001634	bnx2.h
27690	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001638	bnx2.h
27691	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x0000163c	bnx2.h
27692	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001640	bnx2.h
27693	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001644	bnx2.h
27694	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001648	bnx2.h
27695	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x0000164c	bnx2.h
27696	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001650	bnx2.h
27697	BNX2_EMAC_TX_STAT_DOT3STATSINTE	0x00001654	bnx2.h
27698	BNX2_EMAC_TXMAC_DEBUG0	0x00001658	bnx2.h
27699	BNX2_EMAC_TXMAC_DEBUG1	0x0000165c	bnx2.h
27700	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0xfL<<0)	bnx2.h
27701	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x0L<<0)	bnx2.h
27702	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x1L<<0)	bnx2.h
27703	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x4L<<0)	bnx2.h
27704	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x5L<<0)	bnx2.h
27705	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x6L<<0)	bnx2.h
27706	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x7L<<0)	bnx2.h
27707	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x8L<<0)	bnx2.h
27708	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x9L<<0)	bnx2.h
27709	BNX2_EMAC_TXMAC_DEBUG1_CRS_ENAB	(1L<<4)	bnx2.h
27710	BNX2_EMAC_TXMAC_DEBUG1_BAD_CRC	(1L<<5)	bnx2.h
27711	BNX2_EMAC_TXMAC_DEBUG1_SE_COUNT	(0xfL<<6)	bnx2.h
27712	BNX2_EMAC_TXMAC_DEBUG1_SEND_PAU	(1L<<10)	bnx2.h
27713	BNX2_EMAC_TXMAC_DEBUG1_LATE_COL	(1L<<11)	bnx2.h
27714	BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFE	(1L<<12)	bnx2.h
27715	BNX2_EMAC_TXMAC_DEBUG1_DEFERRED	(1L<<13)	bnx2.h
27716	BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE	(1L<<14)	bnx2.h
27717	BNX2_EMAC_TXMAC_DEBUG1_IPG_TIME	(0xfL<<15)	bnx2.h
27718	BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIM	(0xffL<<19)	bnx2.h
27719	BNX2_EMAC_TXMAC_DEBUG2	0x00001660	bnx2.h
27720	BNX2_EMAC_TXMAC_DEBUG2_BACK_OFF	(0x3ffL<<0)	bnx2.h
27721	BNX2_EMAC_TXMAC_DEBUG2_BYTE_COU	(0xffffL<<10)	bnx2.h
27722	BNX2_EMAC_TXMAC_DEBUG2_COL_COUN	(0x1fL<<26)	bnx2.h
27723	BNX2_EMAC_TXMAC_DEBUG2_COL_BIT	(1L<<31)	bnx2.h
27724	BNX2_EMAC_TXMAC_DEBUG3	0x00001664	bnx2.h
27725	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xfL<<0)	bnx2.h
27726	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x0L<<0)	bnx2.h
27727	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x1L<<0)	bnx2.h
27728	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x2L<<0)	bnx2.h
27729	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x3L<<0)	bnx2.h
27730	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x4L<<0)	bnx2.h
27731	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x5L<<0)	bnx2.h
27732	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x6L<<0)	bnx2.h
27733	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x7L<<0)	bnx2.h
27734	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x8L<<0)	bnx2.h
27735	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x9L<<0)	bnx2.h
27736	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xaL<<0)	bnx2.h
27737	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xbL<<0)	bnx2.h
27738	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xcL<<0)	bnx2.h
27739	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xdL<<0)	bnx2.h
27740	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xeL<<0)	bnx2.h
27741	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x7L<<4)	bnx2.h
27742	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x0L<<4)	bnx2.h
27743	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x1L<<4)	bnx2.h
27744	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x2L<<4)	bnx2.h
27745	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x3L<<4)	bnx2.h
27746	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x4L<<4)	bnx2.h
27747	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x5L<<4)	bnx2.h
27748	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x6L<<4)	bnx2.h
27749	BNX2_EMAC_TXMAC_DEBUG3_CRS_DONE	(1L<<7)	bnx2.h
27750	BNX2_EMAC_TXMAC_DEBUG3_XOFF	(1L<<8)	bnx2.h
27751	BNX2_EMAC_TXMAC_DEBUG3_SE_COUNT	(0xfL<<9)	bnx2.h
27752	BNX2_EMAC_TXMAC_DEBUG3_QUANTA_C	(0x1fL<<13)	bnx2.h
27753	BNX2_EMAC_TXMAC_DEBUG4	0x00001668	bnx2.h
27754	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_CO	(0xffffL<<0)	bnx2.h
27755	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xfL<<16)	bnx2.h
27756	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x0L<<16)	bnx2.h
27757	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x2L<<16)	bnx2.h
27758	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x3L<<16)	bnx2.h
27759	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x6L<<16)	bnx2.h
27760	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x7L<<16)	bnx2.h
27761	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x5L<<16)	bnx2.h
27762	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x4L<<16)	bnx2.h
27763	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xcL<<16)	bnx2.h
27764	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xeL<<16)	bnx2.h
27765	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xaL<<16)	bnx2.h
27766	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x8L<<16)	bnx2.h
27767	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x9L<<16)	bnx2.h
27768	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xdL<<16)	bnx2.h
27769	BNX2_EMAC_TXMAC_DEBUG4_STATS0_V	(1L<<20)	bnx2.h
27770	BNX2_EMAC_TXMAC_DEBUG4_APPEND_C	(1L<<21)	bnx2.h
27771	BNX2_EMAC_TXMAC_DEBUG4_SLOT_FIL	(1L<<22)	bnx2.h
27772	BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFE	(1L<<23)	bnx2.h
27773	BNX2_EMAC_TXMAC_DEBUG4_SEND_EXT	(1L<<24)	bnx2.h
27774	BNX2_EMAC_TXMAC_DEBUG4_SEND_PAD	(1L<<25)	bnx2.h
27775	BNX2_EMAC_TXMAC_DEBUG4_EOF_LOC	(1L<<26)	bnx2.h
27776	BNX2_EMAC_TXMAC_DEBUG4_COLLIDIN	(1L<<27)	bnx2.h
27777	BNX2_EMAC_TXMAC_DEBUG4_COL_IN	(1L<<28)	bnx2.h
27778	BNX2_EMAC_TXMAC_DEBUG4_BURSTING	(1L<<29)	bnx2.h
27779	BNX2_EMAC_TXMAC_DEBUG4_ADVANCE	(1L<<30)	bnx2.h
27780	BNX2_EMAC_TXMAC_DEBUG4_GO	(1L<<31)	bnx2.h
27781	BNX2_EMAC_TX_STAT_AC0	0x00001680	bnx2.h
27782	BNX2_EMAC_TX_STAT_AC1	0x00001684	bnx2.h
27783	BNX2_EMAC_TX_STAT_AC2	0x00001688	bnx2.h
27784	BNX2_EMAC_TX_STAT_AC3	0x0000168c	bnx2.h
27785	BNX2_EMAC_TX_STAT_AC4	0x00001690	bnx2.h
27786	BNX2_EMAC_TX_STAT_AC5	0x00001694	bnx2.h
27787	BNX2_EMAC_TX_STAT_AC6	0x00001698	bnx2.h
27788	BNX2_EMAC_TX_STAT_AC7	0x0000169c	bnx2.h
27789	BNX2_EMAC_TX_STAT_AC8	0x000016a0	bnx2.h
27790	BNX2_EMAC_TX_STAT_AC9	0x000016a4	bnx2.h
27791	BNX2_EMAC_TX_STAT_AC10	0x000016a8	bnx2.h
27792	BNX2_EMAC_TX_STAT_AC11	0x000016ac	bnx2.h
27793	BNX2_EMAC_TX_STAT_AC12	0x000016b0	bnx2.h
27794	BNX2_EMAC_TX_STAT_AC13	0x000016b4	bnx2.h
27795	BNX2_EMAC_TX_STAT_AC14	0x000016b8	bnx2.h
27796	BNX2_EMAC_TX_STAT_AC15	0x000016bc	bnx2.h
27797	BNX2_EMAC_TX_STAT_AC16	0x000016c0	bnx2.h
27798	BNX2_EMAC_TX_STAT_AC17	0x000016c4	bnx2.h
27799	BNX2_EMAC_TX_STAT_AC18	0x000016c8	bnx2.h
27800	BNX2_EMAC_TX_STAT_AC19	0x000016cc	bnx2.h
27801	BNX2_EMAC_TX_STAT_AC20	0x000016d0	bnx2.h
27802	BNX2_EMAC_TX_STAT_AC21	0x000016d4	bnx2.h
27803	BNX2_EMAC_TXMAC_SUC_DBG_OVERRUN	0x000016d8	bnx2.h
27804	BNX2_RPM_COMMAND	0x00001800	bnx2.h
27805	BNX2_RPM_COMMAND_ENABLED	(1L<<0)	bnx2.h
27806	BNX2_RPM_COMMAND_OVERRUN_ABORT	(1L<<4)	bnx2.h
27807	BNX2_RPM_STATUS	0x00001804	bnx2.h
27808	BNX2_RPM_STATUS_MBUF_WAIT	(1L<<0)	bnx2.h
27809	BNX2_RPM_STATUS_FREE_WAIT	(1L<<1)	bnx2.h
27810	BNX2_RPM_CONFIG	0x00001808	bnx2.h
27811	BNX2_RPM_CONFIG_NO_PSD_HDR_CKSU	(1L<<0)	bnx2.h
27812	BNX2_RPM_CONFIG_ACPI_ENA	(1L<<1)	bnx2.h
27813	BNX2_RPM_CONFIG_ACPI_KEEP	(1L<<2)	bnx2.h
27814	BNX2_RPM_CONFIG_MP_KEEP	(1L<<3)	bnx2.h
27815	BNX2_RPM_CONFIG_SORT_VECT_VAL	(0xfL<<4)	bnx2.h
27816	BNX2_RPM_CONFIG_IGNORE_VLAN	(1L<<31)	bnx2.h
27817	BNX2_RPM_VLAN_MATCH0	0x00001810	bnx2.h
27818	BNX2_RPM_VLAN_MATCH0_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
27819	BNX2_RPM_VLAN_MATCH1	0x00001814	bnx2.h
27820	BNX2_RPM_VLAN_MATCH1_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
27821	BNX2_RPM_VLAN_MATCH2	0x00001818	bnx2.h
27822	BNX2_RPM_VLAN_MATCH2_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
27823	BNX2_RPM_VLAN_MATCH3	0x0000181c	bnx2.h
27824	BNX2_RPM_VLAN_MATCH3_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
27825	BNX2_RPM_SORT_USER0	0x00001820	bnx2.h
27826	BNX2_RPM_SORT_USER0_PM_EN	(0xffffL<<0)	bnx2.h
27827	BNX2_RPM_SORT_USER0_BC_EN	(1L<<16)	bnx2.h
27828	BNX2_RPM_SORT_USER0_MC_EN	(1L<<17)	bnx2.h
27829	BNX2_RPM_SORT_USER0_MC_HSH_EN	(1L<<18)	bnx2.h
27830	BNX2_RPM_SORT_USER0_PROM_EN	(1L<<19)	bnx2.h
27831	BNX2_RPM_SORT_USER0_VLAN_EN	(0xfL<<20)	bnx2.h
27832	BNX2_RPM_SORT_USER0_PROM_VLAN	(1L<<24)	bnx2.h
27833	BNX2_RPM_SORT_USER0_ENA	(1L<<31)	bnx2.h
27834	BNX2_RPM_SORT_USER1	0x00001824	bnx2.h
27835	BNX2_RPM_SORT_USER1_PM_EN	(0xffffL<<0)	bnx2.h
27836	BNX2_RPM_SORT_USER1_BC_EN	(1L<<16)	bnx2.h
27837	BNX2_RPM_SORT_USER1_MC_EN	(1L<<17)	bnx2.h
27838	BNX2_RPM_SORT_USER1_MC_HSH_EN	(1L<<18)	bnx2.h
27839	BNX2_RPM_SORT_USER1_PROM_EN	(1L<<19)	bnx2.h
27840	BNX2_RPM_SORT_USER1_VLAN_EN	(0xfL<<20)	bnx2.h
27841	BNX2_RPM_SORT_USER1_PROM_VLAN	(1L<<24)	bnx2.h
27842	BNX2_RPM_SORT_USER1_ENA	(1L<<31)	bnx2.h
27843	BNX2_RPM_SORT_USER2	0x00001828	bnx2.h
27844	BNX2_RPM_SORT_USER2_PM_EN	(0xffffL<<0)	bnx2.h
27845	BNX2_RPM_SORT_USER2_BC_EN	(1L<<16)	bnx2.h
27846	BNX2_RPM_SORT_USER2_MC_EN	(1L<<17)	bnx2.h
27847	BNX2_RPM_SORT_USER2_MC_HSH_EN	(1L<<18)	bnx2.h
27848	BNX2_RPM_SORT_USER2_PROM_EN	(1L<<19)	bnx2.h
27849	BNX2_RPM_SORT_USER2_VLAN_EN	(0xfL<<20)	bnx2.h
27850	BNX2_RPM_SORT_USER2_PROM_VLAN	(1L<<24)	bnx2.h
27851	BNX2_RPM_SORT_USER2_ENA	(1L<<31)	bnx2.h
27852	BNX2_RPM_SORT_USER3	0x0000182c	bnx2.h
27853	BNX2_RPM_SORT_USER3_PM_EN	(0xffffL<<0)	bnx2.h
27854	BNX2_RPM_SORT_USER3_BC_EN	(1L<<16)	bnx2.h
27855	BNX2_RPM_SORT_USER3_MC_EN	(1L<<17)	bnx2.h
27856	BNX2_RPM_SORT_USER3_MC_HSH_EN	(1L<<18)	bnx2.h
27857	BNX2_RPM_SORT_USER3_PROM_EN	(1L<<19)	bnx2.h
27858	BNX2_RPM_SORT_USER3_VLAN_EN	(0xfL<<20)	bnx2.h
27859	BNX2_RPM_SORT_USER3_PROM_VLAN	(1L<<24)	bnx2.h
27860	BNX2_RPM_SORT_USER3_ENA	(1L<<31)	bnx2.h
27861	BNX2_RPM_STAT_L2_FILTER_DISCARD	0x00001840	bnx2.h
27862	BNX2_RPM_STAT_RULE_CHECKER_DISC	0x00001844	bnx2.h
27863	BNX2_RPM_STAT_IFINFTQDISCARDS	0x00001848	bnx2.h
27864	BNX2_RPM_STAT_IFINMBUFDISCARD	0x0000184c	bnx2.h
27865	BNX2_RPM_STAT_RULE_CHECKER_P4_H	0x00001850	bnx2.h
27866	BNX2_RPM_STAT_AC0	0x00001880	bnx2.h
27867	BNX2_RPM_STAT_AC1	0x00001884	bnx2.h
27868	BNX2_RPM_STAT_AC2	0x00001888	bnx2.h
27869	BNX2_RPM_STAT_AC3	0x0000188c	bnx2.h
27870	BNX2_RPM_STAT_AC4	0x00001890	bnx2.h
27871	BNX2_RPM_RC_CNTL_0	0x00001900	bnx2.h
27872	BNX2_RPM_RC_CNTL_0_OFFSET	(0xffL<<0)	bnx2.h
27873	BNX2_RPM_RC_CNTL_0_CLASS	(0x7L<<8)	bnx2.h
27874	BNX2_RPM_RC_CNTL_0_PRIORITY	(1L<<11)	bnx2.h
27875	BNX2_RPM_RC_CNTL_0_P4	(1L<<12)	bnx2.h
27876	BNX2_RPM_RC_CNTL_0_HDR_TYPE	(0x7L<<13)	bnx2.h
27877	BNX2_RPM_RC_CNTL_0_HDR_TYPE_STA	(0L<<13)	bnx2.h
27878	BNX2_RPM_RC_CNTL_0_HDR_TYPE_IP	(1L<<13)	bnx2.h
27879	BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP	(2L<<13)	bnx2.h
27880	BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP	(3L<<13)	bnx2.h
27881	BNX2_RPM_RC_CNTL_0_HDR_TYPE_DAT	(4L<<13)	bnx2.h
27882	BNX2_RPM_RC_CNTL_0_COMP	(0x3L<<16)	bnx2.h
27883	BNX2_RPM_RC_CNTL_0_COMP_EQUAL	(0L<<16)	bnx2.h
27884	BNX2_RPM_RC_CNTL_0_COMP_NEQUAL	(1L<<16)	bnx2.h
27885	BNX2_RPM_RC_CNTL_0_COMP_GREATER	(2L<<16)	bnx2.h
27886	BNX2_RPM_RC_CNTL_0_COMP_LESS	(3L<<16)	bnx2.h
27887	BNX2_RPM_RC_CNTL_0_SBIT	(1L<<19)	bnx2.h
27888	BNX2_RPM_RC_CNTL_0_CMDSEL	(0xfL<<20)	bnx2.h
27889	BNX2_RPM_RC_CNTL_0_MAP	(1L<<24)	bnx2.h
27890	BNX2_RPM_RC_CNTL_0_DISCARD	(1L<<25)	bnx2.h
27891	BNX2_RPM_RC_CNTL_0_MASK	(1L<<26)	bnx2.h
27892	BNX2_RPM_RC_CNTL_0_P1	(1L<<27)	bnx2.h
27893	BNX2_RPM_RC_CNTL_0_P2	(1L<<28)	bnx2.h
27894	BNX2_RPM_RC_CNTL_0_P3	(1L<<29)	bnx2.h
27895	BNX2_RPM_RC_CNTL_0_NBIT	(1L<<30)	bnx2.h
27896	BNX2_RPM_RC_VALUE_MASK_0	0x00001904	bnx2.h
27897	BNX2_RPM_RC_VALUE_MASK_0_VALUE	(0xffffL<<0)	bnx2.h
27898	BNX2_RPM_RC_VALUE_MASK_0_MASK	(0xffffL<<16)	bnx2.h
27899	BNX2_RPM_RC_CNTL_1	0x00001908	bnx2.h
27900	BNX2_RPM_RC_CNTL_1_A	(0x3ffffL<<0)	bnx2.h
27901	BNX2_RPM_RC_CNTL_1_B	(0xfffL<<19)	bnx2.h
27902	BNX2_RPM_RC_VALUE_MASK_1	0x0000190c	bnx2.h
27903	BNX2_RPM_RC_CNTL_2	0x00001910	bnx2.h
27904	BNX2_RPM_RC_CNTL_2_A	(0x3ffffL<<0)	bnx2.h
27905	BNX2_RPM_RC_CNTL_2_B	(0xfffL<<19)	bnx2.h
27906	BNX2_RPM_RC_VALUE_MASK_2	0x00001914	bnx2.h
27907	BNX2_RPM_RC_CNTL_3	0x00001918	bnx2.h
27908	BNX2_RPM_RC_CNTL_3_A	(0x3ffffL<<0)	bnx2.h
27909	BNX2_RPM_RC_CNTL_3_B	(0xfffL<<19)	bnx2.h
27910	BNX2_RPM_RC_VALUE_MASK_3	0x0000191c	bnx2.h
27911	BNX2_RPM_RC_CNTL_4	0x00001920	bnx2.h
27912	BNX2_RPM_RC_CNTL_4_A	(0x3ffffL<<0)	bnx2.h
27913	BNX2_RPM_RC_CNTL_4_B	(0xfffL<<19)	bnx2.h
27914	BNX2_RPM_RC_VALUE_MASK_4	0x00001924	bnx2.h
27915	BNX2_RPM_RC_CNTL_5	0x00001928	bnx2.h
27916	BNX2_RPM_RC_CNTL_5_A	(0x3ffffL<<0)	bnx2.h
27917	BNX2_RPM_RC_CNTL_5_B	(0xfffL<<19)	bnx2.h
27918	BNX2_RPM_RC_VALUE_MASK_5	0x0000192c	bnx2.h
27919	BNX2_RPM_RC_CNTL_6	0x00001930	bnx2.h
27920	BNX2_RPM_RC_CNTL_6_A	(0x3ffffL<<0)	bnx2.h
27921	BNX2_RPM_RC_CNTL_6_B	(0xfffL<<19)	bnx2.h
27922	BNX2_RPM_RC_VALUE_MASK_6	0x00001934	bnx2.h
27923	BNX2_RPM_RC_CNTL_7	0x00001938	bnx2.h
27924	BNX2_RPM_RC_CNTL_7_A	(0x3ffffL<<0)	bnx2.h
27925	BNX2_RPM_RC_CNTL_7_B	(0xfffL<<19)	bnx2.h
27926	BNX2_RPM_RC_VALUE_MASK_7	0x0000193c	bnx2.h
27927	BNX2_RPM_RC_CNTL_8	0x00001940	bnx2.h
27928	BNX2_RPM_RC_CNTL_8_A	(0x3ffffL<<0)	bnx2.h
27929	BNX2_RPM_RC_CNTL_8_B	(0xfffL<<19)	bnx2.h
27930	BNX2_RPM_RC_VALUE_MASK_8	0x00001944	bnx2.h
27931	BNX2_RPM_RC_CNTL_9	0x00001948	bnx2.h
27932	BNX2_RPM_RC_CNTL_9_A	(0x3ffffL<<0)	bnx2.h
27933	BNX2_RPM_RC_CNTL_9_B	(0xfffL<<19)	bnx2.h
27934	BNX2_RPM_RC_VALUE_MASK_9	0x0000194c	bnx2.h
27935	BNX2_RPM_RC_CNTL_10	0x00001950	bnx2.h
27936	BNX2_RPM_RC_CNTL_10_A	(0x3ffffL<<0)	bnx2.h
27937	BNX2_RPM_RC_CNTL_10_B	(0xfffL<<19)	bnx2.h
27938	BNX2_RPM_RC_VALUE_MASK_10	0x00001954	bnx2.h
27939	BNX2_RPM_RC_CNTL_11	0x00001958	bnx2.h
27940	BNX2_RPM_RC_CNTL_11_A	(0x3ffffL<<0)	bnx2.h
27941	BNX2_RPM_RC_CNTL_11_B	(0xfffL<<19)	bnx2.h
27942	BNX2_RPM_RC_VALUE_MASK_11	0x0000195c	bnx2.h
27943	BNX2_RPM_RC_CNTL_12	0x00001960	bnx2.h
27944	BNX2_RPM_RC_CNTL_12_A	(0x3ffffL<<0)	bnx2.h
27945	BNX2_RPM_RC_CNTL_12_B	(0xfffL<<19)	bnx2.h
27946	BNX2_RPM_RC_VALUE_MASK_12	0x00001964	bnx2.h
27947	BNX2_RPM_RC_CNTL_13	0x00001968	bnx2.h
27948	BNX2_RPM_RC_CNTL_13_A	(0x3ffffL<<0)	bnx2.h
27949	BNX2_RPM_RC_CNTL_13_B	(0xfffL<<19)	bnx2.h
27950	BNX2_RPM_RC_VALUE_MASK_13	0x0000196c	bnx2.h
27951	BNX2_RPM_RC_CNTL_14	0x00001970	bnx2.h
27952	BNX2_RPM_RC_CNTL_14_A	(0x3ffffL<<0)	bnx2.h
27953	BNX2_RPM_RC_CNTL_14_B	(0xfffL<<19)	bnx2.h
27954	BNX2_RPM_RC_VALUE_MASK_14	0x00001974	bnx2.h
27955	BNX2_RPM_RC_CNTL_15	0x00001978	bnx2.h
27956	BNX2_RPM_RC_CNTL_15_A	(0x3ffffL<<0)	bnx2.h
27957	BNX2_RPM_RC_CNTL_15_B	(0xfffL<<19)	bnx2.h
27958	BNX2_RPM_RC_VALUE_MASK_15	0x0000197c	bnx2.h
27959	BNX2_RPM_RC_CONFIG	0x00001980	bnx2.h
27960	BNX2_RPM_RC_CONFIG_RULE_ENABLE	(0xffffL<<0)	bnx2.h
27961	BNX2_RPM_RC_CONFIG_DEF_CLASS	(0x7L<<24)	bnx2.h
27962	BNX2_RPM_DEBUG0	0x00001984	bnx2.h
27963	BNX2_RPM_DEBUG0_FM_BCNT	(0xffffL<<0)	bnx2.h
27964	BNX2_RPM_DEBUG0_T_DATA_OFST_VLD	(1L<<16)	bnx2.h
27965	BNX2_RPM_DEBUG0_T_UDP_OFST_VLD	(1L<<17)	bnx2.h
27966	BNX2_RPM_DEBUG0_T_TCP_OFST_VLD	(1L<<18)	bnx2.h
27967	BNX2_RPM_DEBUG0_T_IP_OFST_VLD	(1L<<19)	bnx2.h
27968	BNX2_RPM_DEBUG0_IP_MORE_FRGMT	(1L<<20)	bnx2.h
27969	BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP	(1L<<21)	bnx2.h
27970	BNX2_RPM_DEBUG0_LLC_SNAP	(1L<<22)	bnx2.h
27971	BNX2_RPM_DEBUG0_FM_STARTED	(1L<<23)	bnx2.h
27972	BNX2_RPM_DEBUG0_DONE	(1L<<24)	bnx2.h
27973	BNX2_RPM_DEBUG0_WAIT_4_DONE	(1L<<25)	bnx2.h
27974	BNX2_RPM_DEBUG0_USE_TPBUF_CKSUM	(1L<<26)	bnx2.h
27975	BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_C	(1L<<27)	bnx2.h
27976	BNX2_RPM_DEBUG0_IGNORE_VLAN	(1L<<28)	bnx2.h
27977	BNX2_RPM_DEBUG0_RP_ENA_ACTIVE	(1L<<31)	bnx2.h
27978	BNX2_RPM_DEBUG1	0x00001988	bnx2.h
27979	BNX2_RPM_DEBUG1_FSM_CUR_ST	(0xffffL<<0)	bnx2.h
27980	BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE	(0L<<0)	bnx2.h
27981	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(1L<<0)	bnx2.h
27982	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(2L<<0)	bnx2.h
27983	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(4L<<0)	bnx2.h
27984	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(8L<<0)	bnx2.h
27985	BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_S	(16L<<0)	bnx2.h
27986	BNX2_RPM_DEBUG1_FSM_CUR_ST_IP	(32L<<0)	bnx2.h
27987	BNX2_RPM_DEBUG1_FSM_CUR_ST_TCP	(64L<<0)	bnx2.h
27988	BNX2_RPM_DEBUG1_FSM_CUR_ST_UDP	(128L<<0)	bnx2.h
27989	BNX2_RPM_DEBUG1_FSM_CUR_ST_AH	(256L<<0)	bnx2.h
27990	BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP	(512L<<0)	bnx2.h
27991	BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_	(1024L<<0)	bnx2.h
27992	BNX2_RPM_DEBUG1_FSM_CUR_ST_DATA	(2048L<<0)	bnx2.h
27993	BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_	(0x2000L<<0)	bnx2.h
27994	BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_	(0x4000L<<0)	bnx2.h
27995	BNX2_RPM_DEBUG1_FSM_CUR_ST_LATC	(0x8000L<<0)	bnx2.h
27996	BNX2_RPM_DEBUG1_HDR_BCNT	(0x7ffL<<16)	bnx2.h
27997	BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D	(1L<<28)	bnx2.h
27998	BNX2_RPM_DEBUG1_VLAN_REMOVED_D2	(1L<<29)	bnx2.h
27999	BNX2_RPM_DEBUG1_VLAN_REMOVED_D1	(1L<<30)	bnx2.h
28000	BNX2_RPM_DEBUG1_EOF_0XTRA_WD	(1L<<31)	bnx2.h
28001	BNX2_RPM_DEBUG2	0x0000198c	bnx2.h
28002	BNX2_RPM_DEBUG2_CMD_HIT_VEC	(0xffffL<<0)	bnx2.h
28003	BNX2_RPM_DEBUG2_IP_BCNT	(0xffL<<16)	bnx2.h
28004	BNX2_RPM_DEBUG2_THIS_CMD_M4	(1L<<24)	bnx2.h
28005	BNX2_RPM_DEBUG2_THIS_CMD_M3	(1L<<25)	bnx2.h
28006	BNX2_RPM_DEBUG2_THIS_CMD_M2	(1L<<26)	bnx2.h
28007	BNX2_RPM_DEBUG2_THIS_CMD_M1	(1L<<27)	bnx2.h
28008	BNX2_RPM_DEBUG2_IPIPE_EMPTY	(1L<<28)	bnx2.h
28009	BNX2_RPM_DEBUG2_FM_DISCARD	(1L<<29)	bnx2.h
28010	BNX2_RPM_DEBUG2_LAST_RULE_IN_FM	(1L<<30)	bnx2.h
28011	BNX2_RPM_DEBUG2_LAST_RULE_IN_FM	(1L<<31)	bnx2.h
28012	BNX2_RPM_DEBUG3	0x00001990	bnx2.h
28013	BNX2_RPM_DEBUG3_AVAIL_MBUF_PTR	(0x1ffL<<0)	bnx2.h
28014	BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_RE	(1L<<9)	bnx2.h
28015	BNX2_RPM_DEBUG3_RDE_RBUF_WR_LAS	(1L<<10)	bnx2.h
28016	BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ	(1L<<11)	bnx2.h
28017	BNX2_RPM_DEBUG3_RDE_RBUF_FREE_R	(1L<<12)	bnx2.h
28018	BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_	(1L<<13)	bnx2.h
28019	BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAV	(1L<<14)	bnx2.h
28020	BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DR	(1L<<15)	bnx2.h
28021	BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY	(0xfL<<16)	bnx2.h
28022	BNX2_RPM_DEBUG3_RDE_SRC_FIFO_AL	(1L<<21)	bnx2.h
28023	BNX2_RPM_DEBUG3_DROP_NXT_VLD	(1L<<22)	bnx2.h
28024	BNX2_RPM_DEBUG3_DROP_NXT	(1L<<23)	bnx2.h
28025	BNX2_RPM_DEBUG3_FTQ_FSM	(0x3L<<24)	bnx2.h
28026	BNX2_RPM_DEBUG3_FTQ_FSM_IDLE	(0x0L<<24)	bnx2.h
28027	BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_AC	(0x1L<<24)	bnx2.h
28028	BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FR	(0x2L<<24)	bnx2.h
28029	BNX2_RPM_DEBUG3_MBWRITE_FSM	(0x3L<<26)	bnx2.h
28030	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x0L<<26)	bnx2.h
28031	BNX2_RPM_DEBUG3_MBWRITE_FSM_GET	(0x1L<<26)	bnx2.h
28032	BNX2_RPM_DEBUG3_MBWRITE_FSM_DMA	(0x2L<<26)	bnx2.h
28033	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x3L<<26)	bnx2.h
28034	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x4L<<26)	bnx2.h
28035	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x5L<<26)	bnx2.h
28036	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x6L<<26)	bnx2.h
28037	BNX2_RPM_DEBUG3_MBWRITE_FSM_DON	(0x7L<<26)	bnx2.h
28038	BNX2_RPM_DEBUG3_MBFREE_FSM	(1L<<29)	bnx2.h
28039	BNX2_RPM_DEBUG3_MBFREE_FSM_IDLE	(0L<<29)	bnx2.h
28040	BNX2_RPM_DEBUG3_MBFREE_FSM_WAIT	(1L<<29)	bnx2.h
28041	BNX2_RPM_DEBUG3_MBALLOC_FSM	(1L<<30)	bnx2.h
28042	BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_	(0x0L<<30)	bnx2.h
28043	BNX2_RPM_DEBUG3_MBALLOC_FSM_IVE	(0x1L<<30)	bnx2.h
28044	BNX2_RPM_DEBUG3_CCODE_EOF_ERROR	(1L<<31)	bnx2.h
28045	BNX2_RPM_DEBUG4	0x00001994	bnx2.h
28046	BNX2_RPM_DEBUG4_DFSM_MBUF_CLUST	(0x1ffffffL<<0)	bnx2.h
28047	BNX2_RPM_DEBUG4_DFIFO_CUR_CCODE	(0x7L<<25)	bnx2.h
28048	BNX2_RPM_DEBUG4_MBWRITE_FSM	(0x7L<<28)	bnx2.h
28049	BNX2_RPM_DEBUG4_DFIFO_EMPTY	(1L<<31)	bnx2.h
28050	BNX2_RPM_DEBUG5	0x00001998	bnx2.h
28051	BNX2_RPM_DEBUG5_RDROP_WPTR	(0x1fL<<0)	bnx2.h
28052	BNX2_RPM_DEBUG5_RDROP_ACPI_RPTR	(0x1fL<<5)	bnx2.h
28053	BNX2_RPM_DEBUG5_RDROP_MC_RPTR	(0x1fL<<10)	bnx2.h
28054	BNX2_RPM_DEBUG5_RDROP_RC_RPTR	(0x1fL<<15)	bnx2.h
28055	BNX2_RPM_DEBUG5_RDROP_ACPI_EMPT	(1L<<20)	bnx2.h
28056	BNX2_RPM_DEBUG5_RDROP_MC_EMPTY	(1L<<21)	bnx2.h
28057	BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_	(1L<<22)	bnx2.h
28058	BNX2_RPM_DEBUG5_HOLDREG_WOL_DRO	(1L<<23)	bnx2.h
28059	BNX2_RPM_DEBUG5_HOLDREG_DISCARD	(1L<<24)	bnx2.h
28060	BNX2_RPM_DEBUG5_HOLDREG_MBUF_NO	(1L<<25)	bnx2.h
28061	BNX2_RPM_DEBUG5_HOLDREG_MC_EMPT	(1L<<26)	bnx2.h
28062	BNX2_RPM_DEBUG5_HOLDREG_RC_EMPT	(1L<<27)	bnx2.h
28063	BNX2_RPM_DEBUG5_HOLDREG_FC_EMPT	(1L<<28)	bnx2.h
28064	BNX2_RPM_DEBUG5_HOLDREG_ACPI_EM	(1L<<29)	bnx2.h
28065	BNX2_RPM_DEBUG5_HOLDREG_FULL_T	(1L<<30)	bnx2.h
28066	BNX2_RPM_DEBUG5_HOLDREG_RD	(1L<<31)	bnx2.h
28067	BNX2_RPM_DEBUG6	0x0000199c	bnx2.h
28068	BNX2_RPM_DEBUG6_ACPI_VEC	(0xffffL<<0)	bnx2.h
28069	BNX2_RPM_DEBUG6_VEC	(0xffffL<<16)	bnx2.h
28070	BNX2_RPM_DEBUG7	0x000019a0	bnx2.h
28071	BNX2_RPM_DEBUG7_RPM_DBG7_LAST_C	(0xffffffffL<<0)	bnx2.h
28072	BNX2_RPM_DEBUG8	0x000019a4	bnx2.h
28073	BNX2_RPM_DEBUG8_PS_ACPI_FSM	(0xfL<<0)	bnx2.h
28074	BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDL	(0L<<0)	bnx2.h
28075	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(1L<<0)	bnx2.h
28076	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(2L<<0)	bnx2.h
28077	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(3L<<0)	bnx2.h
28078	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(4L<<0)	bnx2.h
28079	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_	(5L<<0)	bnx2.h
28080	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_	(6L<<0)	bnx2.h
28081	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_	(7L<<0)	bnx2.h
28082	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_	(8L<<0)	bnx2.h
28083	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_	(9L<<0)	bnx2.h
28084	BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAI	(10L<<0)	bnx2.h
28085	BNX2_RPM_DEBUG8_COMPARE_AT_W0	(1L<<4)	bnx2.h
28086	BNX2_RPM_DEBUG8_COMPARE_AT_W3_D	(1L<<5)	bnx2.h
28087	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<6)	bnx2.h
28088	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<7)	bnx2.h
28089	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<8)	bnx2.h
28090	BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLD	(1L<<9)	bnx2.h
28091	BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLD	(1L<<10)	bnx2.h
28092	BNX2_RPM_DEBUG8_NXT_EOF_W_12_VL	(1L<<11)	bnx2.h
28093	BNX2_RPM_DEBUG8_EOF_DET	(1L<<12)	bnx2.h
28094	BNX2_RPM_DEBUG8_SOF_DET	(1L<<13)	bnx2.h
28095	BNX2_RPM_DEBUG8_WAIT_4_SOF	(1L<<14)	bnx2.h
28096	BNX2_RPM_DEBUG8_ALL_DONE	(1L<<15)	bnx2.h
28097	BNX2_RPM_DEBUG8_THBUF_ADDR	(0x7fL<<16)	bnx2.h
28098	BNX2_RPM_DEBUG8_BYTE_CTR	(0xffL<<24)	bnx2.h
28099	BNX2_RPM_DEBUG9	0x000019a8	bnx2.h
28100	BNX2_RPM_DEBUG9_OUTFIFO_COUNT	(0x7L<<0)	bnx2.h
28101	BNX2_RPM_DEBUG9_RDE_ACPI_RDY	(1L<<3)	bnx2.h
28102	BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT	(0x7L<<4)	bnx2.h
28103	BNX2_RPM_DEBUG9_OUTFIFO_OVERRUN	(1L<<28)	bnx2.h
28104	BNX2_RPM_DEBUG9_INFIFO_OVERRUN_	(1L<<29)	bnx2.h
28105	BNX2_RPM_DEBUG9_ACPI_MATCH_INT	(1L<<30)	bnx2.h
28106	BNX2_RPM_DEBUG9_ACPI_ENABLE_SYN	(1L<<31)	bnx2.h
28107	BNX2_RPM_ACPI_DBG_BUF_W00	0x000019c0	bnx2.h
28108	BNX2_RPM_ACPI_DBG_BUF_W01	0x000019c4	bnx2.h
28109	BNX2_RPM_ACPI_DBG_BUF_W02	0x000019c8	bnx2.h
28110	BNX2_RPM_ACPI_DBG_BUF_W03	0x000019cc	bnx2.h
28111	BNX2_RPM_ACPI_DBG_BUF_W10	0x000019d0	bnx2.h
28112	BNX2_RPM_ACPI_DBG_BUF_W11	0x000019d4	bnx2.h
28113	BNX2_RPM_ACPI_DBG_BUF_W12	0x000019d8	bnx2.h
28114	BNX2_RPM_ACPI_DBG_BUF_W13	0x000019dc	bnx2.h
28115	BNX2_RPM_ACPI_DBG_BUF_W20	0x000019e0	bnx2.h
28116	BNX2_RPM_ACPI_DBG_BUF_W21	0x000019e4	bnx2.h
28117	BNX2_RPM_ACPI_DBG_BUF_W22	0x000019e8	bnx2.h
28118	BNX2_RPM_ACPI_DBG_BUF_W23	0x000019ec	bnx2.h
28119	BNX2_RPM_ACPI_DBG_BUF_W30	0x000019f0	bnx2.h
28120	BNX2_RPM_ACPI_DBG_BUF_W31	0x000019f4	bnx2.h
28121	BNX2_RPM_ACPI_DBG_BUF_W32	0x000019f8	bnx2.h
28122	BNX2_RPM_ACPI_DBG_BUF_W33	0x000019fc	bnx2.h
28123	BNX2_RBUF_COMMAND	0x00200000	bnx2.h
28124	BNX2_RBUF_COMMAND_ENABLED	(1L<<0)	bnx2.h
28125	BNX2_RBUF_COMMAND_FREE_INIT	(1L<<1)	bnx2.h
28126	BNX2_RBUF_COMMAND_RAM_INIT	(1L<<2)	bnx2.h
28127	BNX2_RBUF_COMMAND_OVER_FREE	(1L<<4)	bnx2.h
28128	BNX2_RBUF_COMMAND_ALLOC_REQ	(1L<<5)	bnx2.h
28129	BNX2_RBUF_STATUS1	0x00200004	bnx2.h
28130	BNX2_RBUF_STATUS1_FREE_COUNT	(0x3ffL<<0)	bnx2.h
28131	BNX2_RBUF_STATUS2	0x00200008	bnx2.h
28132	BNX2_RBUF_STATUS2_FREE_TAIL	(0x3ffL<<0)	bnx2.h
28133	BNX2_RBUF_STATUS2_FREE_HEAD	(0x3ffL<<16)	bnx2.h
28134	BNX2_RBUF_CONFIG	0x0020000c	bnx2.h
28135	BNX2_RBUF_CONFIG_XOFF_TRIP	(0x3ffL<<0)	bnx2.h
28136	BNX2_RBUF_CONFIG_XON_TRIP	(0x3ffL<<16)	bnx2.h
28137	BNX2_RBUF_FW_BUF_ALLOC	0x00200010	bnx2.h
28138	BNX2_RBUF_FW_BUF_ALLOC_VALUE	(0x1ffL<<7)	bnx2.h
28139	BNX2_RBUF_FW_BUF_FREE	0x00200014	bnx2.h
28140	BNX2_RBUF_FW_BUF_FREE_COUNT	(0x7fL<<0)	bnx2.h
28141	BNX2_RBUF_FW_BUF_FREE_TAIL	(0x1ffL<<7)	bnx2.h
28142	BNX2_RBUF_FW_BUF_FREE_HEAD	(0x1ffL<<16)	bnx2.h
28143	BNX2_RBUF_FW_BUF_SEL	0x00200018	bnx2.h
28144	BNX2_RBUF_FW_BUF_SEL_COUNT	(0x7fL<<0)	bnx2.h
28145	BNX2_RBUF_FW_BUF_SEL_TAIL	(0x1ffL<<7)	bnx2.h
28146	BNX2_RBUF_FW_BUF_SEL_HEAD	(0x1ffL<<16)	bnx2.h
28147	BNX2_RBUF_CONFIG2	0x0020001c	bnx2.h
28148	BNX2_RBUF_CONFIG2_MAC_DROP_TRIP	(0x3ffL<<0)	bnx2.h
28149	BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP	(0x3ffL<<16)	bnx2.h
28150	BNX2_RBUF_CONFIG3	0x00200020	bnx2.h
28151	BNX2_RBUF_CONFIG3_CU_DROP_TRIP	(0x3ffL<<0)	bnx2.h
28152	BNX2_RBUF_CONFIG3_CU_KEEP_TRIP	(0x3ffL<<16)	bnx2.h
28153	BNX2_RBUF_PKT_DATA	0x00208000	bnx2.h
28154	BNX2_RBUF_CLIST_DATA	0x00210000	bnx2.h
28155	BNX2_RBUF_BUF_DATA	0x00220000	bnx2.h
28156	BNX2_RV2P_COMMAND	0x00002800	bnx2.h
28157	BNX2_RV2P_COMMAND_ENABLED	(1L<<0)	bnx2.h
28158	BNX2_RV2P_COMMAND_PROC1_INTRPT	(1L<<1)	bnx2.h
28159	BNX2_RV2P_COMMAND_PROC2_INTRPT	(1L<<2)	bnx2.h
28160	BNX2_RV2P_COMMAND_ABORT0	(1L<<4)	bnx2.h
28161	BNX2_RV2P_COMMAND_ABORT1	(1L<<5)	bnx2.h
28162	BNX2_RV2P_COMMAND_ABORT2	(1L<<6)	bnx2.h
28163	BNX2_RV2P_COMMAND_ABORT3	(1L<<7)	bnx2.h
28164	BNX2_RV2P_COMMAND_ABORT4	(1L<<8)	bnx2.h
28165	BNX2_RV2P_COMMAND_ABORT5	(1L<<9)	bnx2.h
28166	BNX2_RV2P_COMMAND_PROC1_RESET	(1L<<16)	bnx2.h
28167	BNX2_RV2P_COMMAND_PROC2_RESET	(1L<<17)	bnx2.h
28168	BNX2_RV2P_COMMAND_CTXIF_RESET	(1L<<18)	bnx2.h
28169	BNX2_RV2P_STATUS	0x00002804	bnx2.h
28170	BNX2_RV2P_STATUS_ALWAYS_0	(1L<<0)	bnx2.h
28171	BNX2_RV2P_STATUS_RV2P_GEN_STAT0	(1L<<8)	bnx2.h
28172	BNX2_RV2P_STATUS_RV2P_GEN_STAT1	(1L<<9)	bnx2.h
28173	BNX2_RV2P_STATUS_RV2P_GEN_STAT2	(1L<<10)	bnx2.h
28174	BNX2_RV2P_STATUS_RV2P_GEN_STAT3	(1L<<11)	bnx2.h
28175	BNX2_RV2P_STATUS_RV2P_GEN_STAT4	(1L<<12)	bnx2.h
28176	BNX2_RV2P_STATUS_RV2P_GEN_STAT5	(1L<<13)	bnx2.h
28177	BNX2_RV2P_CONFIG	0x00002808	bnx2.h
28178	BNX2_RV2P_CONFIG_STALL_PROC1	(1L<<0)	bnx2.h
28179	BNX2_RV2P_CONFIG_STALL_PROC2	(1L<<1)	bnx2.h
28180	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<8)	bnx2.h
28181	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<9)	bnx2.h
28182	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<10)	bnx2.h
28183	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<11)	bnx2.h
28184	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<12)	bnx2.h
28185	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<13)	bnx2.h
28186	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<16)	bnx2.h
28187	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<17)	bnx2.h
28188	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<18)	bnx2.h
28189	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<19)	bnx2.h
28190	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<20)	bnx2.h
28191	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<21)	bnx2.h
28192	BNX2_RV2P_CONFIG_PAGE_SIZE	(0xfL<<24)	bnx2.h
28193	BNX2_RV2P_CONFIG_PAGE_SIZE_256	(0L<<24)	bnx2.h
28194	BNX2_RV2P_CONFIG_PAGE_SIZE_512	(1L<<24)	bnx2.h
28195	BNX2_RV2P_CONFIG_PAGE_SIZE_1K	(2L<<24)	bnx2.h
28196	BNX2_RV2P_CONFIG_PAGE_SIZE_2K	(3L<<24)	bnx2.h
28197	BNX2_RV2P_CONFIG_PAGE_SIZE_4K	(4L<<24)	bnx2.h
28198	BNX2_RV2P_CONFIG_PAGE_SIZE_8K	(5L<<24)	bnx2.h
28199	BNX2_RV2P_CONFIG_PAGE_SIZE_16K	(6L<<24)	bnx2.h
28200	BNX2_RV2P_CONFIG_PAGE_SIZE_32K	(7L<<24)	bnx2.h
28201	BNX2_RV2P_CONFIG_PAGE_SIZE_64K	(8L<<24)	bnx2.h
28202	BNX2_RV2P_CONFIG_PAGE_SIZE_128K	(9L<<24)	bnx2.h
28203	BNX2_RV2P_CONFIG_PAGE_SIZE_256K	(10L<<24)	bnx2.h
28204	BNX2_RV2P_CONFIG_PAGE_SIZE_512K	(11L<<24)	bnx2.h
28205	BNX2_RV2P_CONFIG_PAGE_SIZE_1M	(12L<<24)	bnx2.h
28206	BNX2_RV2P_GEN_BFR_ADDR_0	0x00002810	bnx2.h
28207	BNX2_RV2P_GEN_BFR_ADDR_0_VALUE	(0xffffL<<16)	bnx2.h
28208	BNX2_RV2P_GEN_BFR_ADDR_1	0x00002814	bnx2.h
28209	BNX2_RV2P_GEN_BFR_ADDR_1_VALUE	(0xffffL<<16)	bnx2.h
28210	BNX2_RV2P_GEN_BFR_ADDR_2	0x00002818	bnx2.h
28211	BNX2_RV2P_GEN_BFR_ADDR_2_VALUE	(0xffffL<<16)	bnx2.h
28212	BNX2_RV2P_GEN_BFR_ADDR_3	0x0000281c	bnx2.h
28213	BNX2_RV2P_GEN_BFR_ADDR_3_VALUE	(0xffffL<<16)	bnx2.h
28214	BNX2_RV2P_INSTR_HIGH	0x00002830	bnx2.h
28215	BNX2_RV2P_INSTR_HIGH_HIGH	(0x1fL<<0)	bnx2.h
28216	BNX2_RV2P_INSTR_LOW	0x00002834	bnx2.h
28217	BNX2_RV2P_PROC1_ADDR_CMD	0x00002838	bnx2.h
28218	BNX2_RV2P_PROC1_ADDR_CMD_ADD	(0x3ffL<<0)	bnx2.h
28219	BNX2_RV2P_PROC1_ADDR_CMD_RDWR	(1L<<31)	bnx2.h
28220	BNX2_RV2P_PROC2_ADDR_CMD	0x0000283c	bnx2.h
28221	BNX2_RV2P_PROC2_ADDR_CMD_ADD	(0x3ffL<<0)	bnx2.h
28222	BNX2_RV2P_PROC2_ADDR_CMD_RDWR	(1L<<31)	bnx2.h
28223	BNX2_RV2P_PROC1_GRC_DEBUG	0x00002840	bnx2.h
28224	BNX2_RV2P_PROC2_GRC_DEBUG	0x00002844	bnx2.h
28225	BNX2_RV2P_GRC_PROC_DEBUG	0x00002848	bnx2.h
28226	BNX2_RV2P_DEBUG_VECT_PEEK	0x0000284c	bnx2.h
28227	BNX2_RV2P_DEBUG_VECT_PEEK_1_VAL	(0x7ffL<<0)	bnx2.h
28228	BNX2_RV2P_DEBUG_VECT_PEEK_1_PEE	(1L<<11)	bnx2.h
28229	BNX2_RV2P_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
28230	BNX2_RV2P_DEBUG_VECT_PEEK_2_VAL	(0x7ffL<<16)	bnx2.h
28231	BNX2_RV2P_DEBUG_VECT_PEEK_2_PEE	(1L<<27)	bnx2.h
28232	BNX2_RV2P_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
28233	BNX2_RV2P_PFTQ_DATA	0x00002b40	bnx2.h
28234	BNX2_RV2P_PFTQ_CMD	0x00002b78	bnx2.h
28235	BNX2_RV2P_PFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
28236	BNX2_RV2P_PFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
28237	BNX2_RV2P_PFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
28238	BNX2_RV2P_PFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
28239	BNX2_RV2P_PFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
28240	BNX2_RV2P_PFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
28241	BNX2_RV2P_PFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
28242	BNX2_RV2P_PFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
28243	BNX2_RV2P_PFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
28244	BNX2_RV2P_PFTQ_CMD_POP	(1L<<30)	bnx2.h
28245	BNX2_RV2P_PFTQ_CMD_BUSY	(1L<<31)	bnx2.h
28246	BNX2_RV2P_PFTQ_CTL	0x00002b7c	bnx2.h
28247	BNX2_RV2P_PFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
28248	BNX2_RV2P_PFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
28249	BNX2_RV2P_PFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
28250	BNX2_RV2P_PFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
28251	BNX2_RV2P_PFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
28252	BNX2_RV2P_TFTQ_DATA	0x00002b80	bnx2.h
28253	BNX2_RV2P_TFTQ_CMD	0x00002bb8	bnx2.h
28254	BNX2_RV2P_TFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
28255	BNX2_RV2P_TFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
28256	BNX2_RV2P_TFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
28257	BNX2_RV2P_TFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
28258	BNX2_RV2P_TFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
28259	BNX2_RV2P_TFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
28260	BNX2_RV2P_TFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
28261	BNX2_RV2P_TFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
28262	BNX2_RV2P_TFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
28263	BNX2_RV2P_TFTQ_CMD_POP	(1L<<30)	bnx2.h
28264	BNX2_RV2P_TFTQ_CMD_BUSY	(1L<<31)	bnx2.h
28265	BNX2_RV2P_TFTQ_CTL	0x00002bbc	bnx2.h
28266	BNX2_RV2P_TFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
28267	BNX2_RV2P_TFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
28268	BNX2_RV2P_TFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
28269	BNX2_RV2P_TFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
28270	BNX2_RV2P_TFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
28271	BNX2_RV2P_MFTQ_DATA	0x00002bc0	bnx2.h
28272	BNX2_RV2P_MFTQ_CMD	0x00002bf8	bnx2.h
28273	BNX2_RV2P_MFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
28274	BNX2_RV2P_MFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
28275	BNX2_RV2P_MFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
28276	BNX2_RV2P_MFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
28277	BNX2_RV2P_MFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
28278	BNX2_RV2P_MFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
28279	BNX2_RV2P_MFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
28280	BNX2_RV2P_MFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
28281	BNX2_RV2P_MFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
28282	BNX2_RV2P_MFTQ_CMD_POP	(1L<<30)	bnx2.h
28283	BNX2_RV2P_MFTQ_CMD_BUSY	(1L<<31)	bnx2.h
28284	BNX2_RV2P_MFTQ_CTL	0x00002bfc	bnx2.h
28285	BNX2_RV2P_MFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
28286	BNX2_RV2P_MFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
28287	BNX2_RV2P_MFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
28288	BNX2_RV2P_MFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
28289	BNX2_RV2P_MFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
28290	BNX2_MQ_COMMAND	0x00003c00	bnx2.h
28291	BNX2_MQ_COMMAND_ENABLED	(1L<<0)	bnx2.h
28292	BNX2_MQ_COMMAND_OVERFLOW	(1L<<4)	bnx2.h
28293	BNX2_MQ_COMMAND_WR_ERROR	(1L<<5)	bnx2.h
28294	BNX2_MQ_COMMAND_RD_ERROR	(1L<<6)	bnx2.h
28295	BNX2_MQ_STATUS	0x00003c04	bnx2.h
28296	BNX2_MQ_STATUS_CTX_ACCESS_STAT	(1L<<16)	bnx2.h
28297	BNX2_MQ_STATUS_CTX_ACCESS64_STA	(1L<<17)	bnx2.h
28298	BNX2_MQ_STATUS_PCI_STALL_STAT	(1L<<18)	bnx2.h
28299	BNX2_MQ_CONFIG	0x00003c08	bnx2.h
28300	BNX2_MQ_CONFIG_TX_HIGH_PRI	(1L<<0)	bnx2.h
28301	BNX2_MQ_CONFIG_HALT_DIS	(1L<<1)	bnx2.h
28302	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(0x7L<<4)	bnx2.h
28303	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(0L<<4)	bnx2.h
28304	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(1L<<4)	bnx2.h
28305	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(2L<<4)	bnx2.h
28306	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(3L<<4)	bnx2.h
28307	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(4L<<4)	bnx2.h
28308	BNX2_MQ_CONFIG_MAX_DEPTH	(0x7fL<<8)	bnx2.h
28309	BNX2_MQ_CONFIG_CUR_DEPTH	(0x7fL<<20)	bnx2.h
28310	BNX2_MQ_ENQUEUE1	0x00003c0c	bnx2.h
28311	BNX2_MQ_ENQUEUE1_OFFSET	(0x3fL<<2)	bnx2.h
28312	BNX2_MQ_ENQUEUE1_CID	(0x3fffL<<8)	bnx2.h
28313	BNX2_MQ_ENQUEUE1_BYTE_MASK	(0xfL<<24)	bnx2.h
28314	BNX2_MQ_ENQUEUE1_KNL_MODE	(1L<<28)	bnx2.h
28315	BNX2_MQ_ENQUEUE2	0x00003c10	bnx2.h
28316	BNX2_MQ_BAD_WR_ADDR	0x00003c14	bnx2.h
28317	BNX2_MQ_BAD_RD_ADDR	0x00003c18	bnx2.h
28318	BNX2_MQ_KNL_BYP_WIND_START	0x00003c1c	bnx2.h
28319	BNX2_MQ_KNL_BYP_WIND_START_VALU	(0xfffffL<<12)	bnx2.h
28320	BNX2_MQ_KNL_WIND_END	0x00003c20	bnx2.h
28321	BNX2_MQ_KNL_WIND_END_VALUE	(0xffffffL<<8)	bnx2.h
28322	BNX2_MQ_KNL_WRITE_MASK1	0x00003c24	bnx2.h
28323	BNX2_MQ_KNL_TX_MASK1	0x00003c28	bnx2.h
28324	BNX2_MQ_KNL_CMD_MASK1	0x00003c2c	bnx2.h
28325	BNX2_MQ_KNL_COND_ENQUEUE_MASK1	0x00003c30	bnx2.h
28326	BNX2_MQ_KNL_RX_V2P_MASK1	0x00003c34	bnx2.h
28327	BNX2_MQ_KNL_WRITE_MASK2	0x00003c38	bnx2.h
28328	BNX2_MQ_KNL_TX_MASK2	0x00003c3c	bnx2.h
28329	BNX2_MQ_KNL_CMD_MASK2	0x00003c40	bnx2.h
28330	BNX2_MQ_KNL_COND_ENQUEUE_MASK2	0x00003c44	bnx2.h
28331	BNX2_MQ_KNL_RX_V2P_MASK2	0x00003c48	bnx2.h
28332	BNX2_MQ_KNL_BYP_WRITE_MASK1	0x00003c4c	bnx2.h
28333	BNX2_MQ_KNL_BYP_TX_MASK1	0x00003c50	bnx2.h
28334	BNX2_MQ_KNL_BYP_CMD_MASK1	0x00003c54	bnx2.h
28335	BNX2_MQ_KNL_BYP_COND_ENQUEUE_MA	0x00003c58	bnx2.h
28336	BNX2_MQ_KNL_BYP_RX_V2P_MASK1	0x00003c5c	bnx2.h
28337	BNX2_MQ_KNL_BYP_WRITE_MASK2	0x00003c60	bnx2.h
28338	BNX2_MQ_KNL_BYP_TX_MASK2	0x00003c64	bnx2.h
28339	BNX2_MQ_KNL_BYP_CMD_MASK2	0x00003c68	bnx2.h
28340	BNX2_MQ_KNL_BYP_COND_ENQUEUE_MA	0x00003c6c	bnx2.h
28341	BNX2_MQ_KNL_BYP_RX_V2P_MASK2	0x00003c70	bnx2.h
28342	BNX2_MQ_MEM_WR_ADDR	0x00003c74	bnx2.h
28343	BNX2_MQ_MEM_WR_ADDR_VALUE	(0x3fL<<0)	bnx2.h
28344	BNX2_MQ_MEM_WR_DATA0	0x00003c78	bnx2.h
28345	BNX2_MQ_MEM_WR_DATA0_VALUE	(0xffffffffL<<0)	bnx2.h
28346	BNX2_MQ_MEM_WR_DATA1	0x00003c7c	bnx2.h
28347	BNX2_MQ_MEM_WR_DATA1_VALUE	(0xffffffffL<<0)	bnx2.h
28348	BNX2_MQ_MEM_WR_DATA2	0x00003c80	bnx2.h
28349	BNX2_MQ_MEM_WR_DATA2_VALUE	(0x3fffffffL<<0)	bnx2.h
28350	BNX2_MQ_MEM_RD_ADDR	0x00003c84	bnx2.h
28351	BNX2_MQ_MEM_RD_ADDR_VALUE	(0x3fL<<0)	bnx2.h
28352	BNX2_MQ_MEM_RD_DATA0	0x00003c88	bnx2.h
28353	BNX2_MQ_MEM_RD_DATA0_VALUE	(0xffffffffL<<0)	bnx2.h
28354	BNX2_MQ_MEM_RD_DATA1	0x00003c8c	bnx2.h
28355	BNX2_MQ_MEM_RD_DATA1_VALUE	(0xffffffffL<<0)	bnx2.h
28356	BNX2_MQ_MEM_RD_DATA2	0x00003c90	bnx2.h
28357	BNX2_MQ_MEM_RD_DATA2_VALUE	(0x3fffffffL<<0)	bnx2.h
28358	BNX2_TBDR_COMMAND	0x00005000	bnx2.h
28359	BNX2_TBDR_COMMAND_ENABLE	(1L<<0)	bnx2.h
28360	BNX2_TBDR_COMMAND_SOFT_RST	(1L<<1)	bnx2.h
28361	BNX2_TBDR_COMMAND_MSTR_ABORT	(1L<<4)	bnx2.h
28362	BNX2_TBDR_STATUS	0x00005004	bnx2.h
28363	BNX2_TBDR_STATUS_DMA_WAIT	(1L<<0)	bnx2.h
28364	BNX2_TBDR_STATUS_FTQ_WAIT	(1L<<1)	bnx2.h
28365	BNX2_TBDR_STATUS_FIFO_OVERFLOW	(1L<<2)	bnx2.h
28366	BNX2_TBDR_STATUS_FIFO_UNDERFLOW	(1L<<3)	bnx2.h
28367	BNX2_TBDR_STATUS_SEARCHMISS_ERR	(1L<<4)	bnx2.h
28368	BNX2_TBDR_STATUS_FTQ_ENTRY_CNT	(1L<<5)	bnx2.h
28369	BNX2_TBDR_STATUS_BURST_CNT	(1L<<6)	bnx2.h
28370	BNX2_TBDR_CONFIG	0x00005008	bnx2.h
28371	BNX2_TBDR_CONFIG_MAX_BDS	(0xffL<<0)	bnx2.h
28372	BNX2_TBDR_CONFIG_SWAP_MODE	(1L<<8)	bnx2.h
28373	BNX2_TBDR_CONFIG_PRIORITY	(1L<<9)	bnx2.h
28374	BNX2_TBDR_CONFIG_CACHE_NEXT_PAG	(1L<<10)	bnx2.h
28375	BNX2_TBDR_CONFIG_PAGE_SIZE	(0xfL<<24)	bnx2.h
28376	BNX2_TBDR_CONFIG_PAGE_SIZE_256	(0L<<24)	bnx2.h
28377	BNX2_TBDR_CONFIG_PAGE_SIZE_512	(1L<<24)	bnx2.h
28378	BNX2_TBDR_CONFIG_PAGE_SIZE_1K	(2L<<24)	bnx2.h
28379	BNX2_TBDR_CONFIG_PAGE_SIZE_2K	(3L<<24)	bnx2.h
28380	BNX2_TBDR_CONFIG_PAGE_SIZE_4K	(4L<<24)	bnx2.h
28381	BNX2_TBDR_CONFIG_PAGE_SIZE_8K	(5L<<24)	bnx2.h
28382	BNX2_TBDR_CONFIG_PAGE_SIZE_16K	(6L<<24)	bnx2.h
28383	BNX2_TBDR_CONFIG_PAGE_SIZE_32K	(7L<<24)	bnx2.h
28384	BNX2_TBDR_CONFIG_PAGE_SIZE_64K	(8L<<24)	bnx2.h
28385	BNX2_TBDR_CONFIG_PAGE_SIZE_128K	(9L<<24)	bnx2.h
28386	BNX2_TBDR_CONFIG_PAGE_SIZE_256K	(10L<<24)	bnx2.h
28387	BNX2_TBDR_CONFIG_PAGE_SIZE_512K	(11L<<24)	bnx2.h
28388	BNX2_TBDR_CONFIG_PAGE_SIZE_1M	(12L<<24)	bnx2.h
28389	BNX2_TBDR_DEBUG_VECT_PEEK	0x0000500c	bnx2.h
28390	BNX2_TBDR_DEBUG_VECT_PEEK_1_VAL	(0x7ffL<<0)	bnx2.h
28391	BNX2_TBDR_DEBUG_VECT_PEEK_1_PEE	(1L<<11)	bnx2.h
28392	BNX2_TBDR_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
28393	BNX2_TBDR_DEBUG_VECT_PEEK_2_VAL	(0x7ffL<<16)	bnx2.h
28394	BNX2_TBDR_DEBUG_VECT_PEEK_2_PEE	(1L<<27)	bnx2.h
28395	BNX2_TBDR_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
28396	BNX2_TBDR_FTQ_DATA	0x000053c0	bnx2.h
28397	BNX2_TBDR_FTQ_CMD	0x000053f8	bnx2.h
28398	BNX2_TBDR_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
28399	BNX2_TBDR_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
28400	BNX2_TBDR_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
28401	BNX2_TBDR_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
28402	BNX2_TBDR_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
28403	BNX2_TBDR_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
28404	BNX2_TBDR_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
28405	BNX2_TBDR_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
28406	BNX2_TBDR_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
28407	BNX2_TBDR_FTQ_CMD_POP	(1L<<30)	bnx2.h
28408	BNX2_TBDR_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
28409	BNX2_TBDR_FTQ_CTL	0x000053fc	bnx2.h
28410	BNX2_TBDR_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
28411	BNX2_TBDR_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
28412	BNX2_TBDR_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
28413	BNX2_TBDR_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
28414	BNX2_TBDR_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
28415	BNX2_TDMA_COMMAND	0x00005c00	bnx2.h
28416	BNX2_TDMA_COMMAND_ENABLED	(1L<<0)	bnx2.h
28417	BNX2_TDMA_COMMAND_MASTER_ABORT	(1L<<4)	bnx2.h
28418	BNX2_TDMA_COMMAND_BAD_L2_LENGTH	(1L<<7)	bnx2.h
28419	BNX2_TDMA_STATUS	0x00005c04	bnx2.h
28420	BNX2_TDMA_STATUS_DMA_WAIT	(1L<<0)	bnx2.h
28421	BNX2_TDMA_STATUS_PAYLOAD_WAIT	(1L<<1)	bnx2.h
28422	BNX2_TDMA_STATUS_PATCH_FTQ_WAIT	(1L<<2)	bnx2.h
28423	BNX2_TDMA_STATUS_LOCK_WAIT	(1L<<3)	bnx2.h
28424	BNX2_TDMA_STATUS_FTQ_ENTRY_CNT	(1L<<16)	bnx2.h
28425	BNX2_TDMA_STATUS_BURST_CNT	(1L<<17)	bnx2.h
28426	BNX2_TDMA_CONFIG	0x00005c08	bnx2.h
28427	BNX2_TDMA_CONFIG_ONE_DMA	(1L<<0)	bnx2.h
28428	BNX2_TDMA_CONFIG_ONE_RECORD	(1L<<1)	bnx2.h
28429	BNX2_TDMA_CONFIG_LIMIT_SZ	(0xfL<<4)	bnx2.h
28430	BNX2_TDMA_CONFIG_LIMIT_SZ_64	(0L<<4)	bnx2.h
28431	BNX2_TDMA_CONFIG_LIMIT_SZ_128	(0x4L<<4)	bnx2.h
28432	BNX2_TDMA_CONFIG_LIMIT_SZ_256	(0x6L<<4)	bnx2.h
28433	BNX2_TDMA_CONFIG_LIMIT_SZ_512	(0x8L<<4)	bnx2.h
28434	BNX2_TDMA_CONFIG_LINE_SZ	(0xfL<<8)	bnx2.h
28435	BNX2_TDMA_CONFIG_LINE_SZ_64	(0L<<8)	bnx2.h
28436	BNX2_TDMA_CONFIG_LINE_SZ_128	(4L<<8)	bnx2.h
28437	BNX2_TDMA_CONFIG_LINE_SZ_256	(6L<<8)	bnx2.h
28438	BNX2_TDMA_CONFIG_LINE_SZ_512	(8L<<8)	bnx2.h
28439	BNX2_TDMA_CONFIG_ALIGN_ENA	(1L<<15)	bnx2.h
28440	BNX2_TDMA_CONFIG_CHK_L2_BD	(1L<<16)	bnx2.h
28441	BNX2_TDMA_CONFIG_FIFO_CMP	(0xfL<<20)	bnx2.h
28442	BNX2_TDMA_PAYLOAD_PROD	0x00005c0c	bnx2.h
28443	BNX2_TDMA_PAYLOAD_PROD_VALUE	(0x1fffL<<3)	bnx2.h
28444	BNX2_TDMA_DBG_WATCHDOG	0x00005c10	bnx2.h
28445	BNX2_TDMA_DBG_TRIGGER	0x00005c14	bnx2.h
28446	BNX2_TDMA_DMAD_FSM	0x00005c80	bnx2.h
28447	BNX2_TDMA_DMAD_FSM_BD_INVLD	(1L<<0)	bnx2.h
28448	BNX2_TDMA_DMAD_FSM_PUSH	(0xfL<<4)	bnx2.h
28449	BNX2_TDMA_DMAD_FSM_ARB_TBDC	(0x3L<<8)	bnx2.h
28450	BNX2_TDMA_DMAD_FSM_ARB_CTX	(1L<<12)	bnx2.h
28451	BNX2_TDMA_DMAD_FSM_DR_INTF	(1L<<16)	bnx2.h
28452	BNX2_TDMA_DMAD_FSM_DMAD	(0x7L<<20)	bnx2.h
28453	BNX2_TDMA_DMAD_FSM_BD	(0xfL<<24)	bnx2.h
28454	BNX2_TDMA_DMAD_STATUS	0x00005c84	bnx2.h
28455	BNX2_TDMA_DMAD_STATUS_RHOLD_PUS	(0x3L<<0)	bnx2.h
28456	BNX2_TDMA_DMAD_STATUS_RHOLD_DMA	(0x3L<<4)	bnx2.h
28457	BNX2_TDMA_DMAD_STATUS_RHOLD_BD_	(0x3L<<8)	bnx2.h
28458	BNX2_TDMA_DMAD_STATUS_IFTQ_ENUM	(0xfL<<12)	bnx2.h
28459	BNX2_TDMA_DR_INTF_FSM	0x00005c88	bnx2.h
28460	BNX2_TDMA_DR_INTF_FSM_L2_COMP	(0x3L<<0)	bnx2.h
28461	BNX2_TDMA_DR_INTF_FSM_TPATQ	(0x7L<<4)	bnx2.h
28462	BNX2_TDMA_DR_INTF_FSM_TPBUF	(0x3L<<8)	bnx2.h
28463	BNX2_TDMA_DR_INTF_FSM_DR_BUF	(0x7L<<12)	bnx2.h
28464	BNX2_TDMA_DR_INTF_FSM_DMAD	(0x7L<<16)	bnx2.h
28465	BNX2_TDMA_DR_INTF_STATUS	0x00005c8c	bnx2.h
28466	BNX2_TDMA_DR_INTF_STATUS_HOLE_P	(0x7L<<0)	bnx2.h
28467	BNX2_TDMA_DR_INTF_STATUS_DATA_A	(0x3L<<4)	bnx2.h
28468	BNX2_TDMA_DR_INTF_STATUS_SHIFT_	(0x7L<<8)	bnx2.h
28469	BNX2_TDMA_DR_INTF_STATUS_NXT_PN	(0xfL<<12)	bnx2.h
28470	BNX2_TDMA_DR_INTF_STATUS_BYTE_C	(0x7L<<16)	bnx2.h
28471	BNX2_TDMA_FTQ_DATA	0x00005fc0	bnx2.h
28472	BNX2_TDMA_FTQ_CMD	0x00005ff8	bnx2.h
28473	BNX2_TDMA_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
28474	BNX2_TDMA_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
28475	BNX2_TDMA_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
28476	BNX2_TDMA_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
28477	BNX2_TDMA_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
28478	BNX2_TDMA_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
28479	BNX2_TDMA_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
28480	BNX2_TDMA_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
28481	BNX2_TDMA_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
28482	BNX2_TDMA_FTQ_CMD_POP	(1L<<30)	bnx2.h
28483	BNX2_TDMA_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
28484	BNX2_TDMA_FTQ_CTL	0x00005ffc	bnx2.h
28485	BNX2_TDMA_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
28486	BNX2_TDMA_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
28487	BNX2_TDMA_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
28488	BNX2_TDMA_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
28489	BNX2_TDMA_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
28490	BNX2_HC_COMMAND	0x00006800	bnx2.h
28491	BNX2_HC_COMMAND_ENABLE	(1L<<0)	bnx2.h
28492	BNX2_HC_COMMAND_SKIP_ABORT	(1L<<4)	bnx2.h
28493	BNX2_HC_COMMAND_COAL_NOW	(1L<<16)	bnx2.h
28494	BNX2_HC_COMMAND_COAL_NOW_WO_INT	(1L<<17)	bnx2.h
28495	BNX2_HC_COMMAND_STATS_NOW	(1L<<18)	bnx2.h
28496	BNX2_HC_COMMAND_FORCE_INT	(0x3L<<19)	bnx2.h
28497	BNX2_HC_COMMAND_FORCE_INT_NULL	(0L<<19)	bnx2.h
28498	BNX2_HC_COMMAND_FORCE_INT_HIGH	(1L<<19)	bnx2.h
28499	BNX2_HC_COMMAND_FORCE_INT_LOW	(2L<<19)	bnx2.h
28500	BNX2_HC_COMMAND_FORCE_INT_FREE	(3L<<19)	bnx2.h
28501	BNX2_HC_COMMAND_CLR_STAT_NOW	(1L<<21)	bnx2.h
28502	BNX2_HC_STATUS	0x00006804	bnx2.h
28503	BNX2_HC_STATUS_MASTER_ABORT	(1L<<0)	bnx2.h
28504	BNX2_HC_STATUS_PARITY_ERROR_STA	(1L<<1)	bnx2.h
28505	BNX2_HC_STATUS_PCI_CLK_CNT_STAT	(1L<<16)	bnx2.h
28506	BNX2_HC_STATUS_CORE_CLK_CNT_STA	(1L<<17)	bnx2.h
28507	BNX2_HC_STATUS_NUM_STATUS_BLOCK	(1L<<18)	bnx2.h
28508	BNX2_HC_STATUS_NUM_INT_GEN_STAT	(1L<<19)	bnx2.h
28509	BNX2_HC_STATUS_NUM_INT_MBOX_WR_	(1L<<20)	bnx2.h
28510	BNX2_HC_STATUS_CORE_CLKS_TO_HW_	(1L<<23)	bnx2.h
28511	BNX2_HC_STATUS_CORE_CLKS_TO_SW_	(1L<<24)	bnx2.h
28512	BNX2_HC_STATUS_CORE_CLKS_DURING	(1L<<25)	bnx2.h
28513	BNX2_HC_CONFIG	0x00006808	bnx2.h
28514	BNX2_HC_CONFIG_COLLECT_STATS	(1L<<0)	bnx2.h
28515	BNX2_HC_CONFIG_RX_TMR_MODE	(1L<<1)	bnx2.h
28516	BNX2_HC_CONFIG_TX_TMR_MODE	(1L<<2)	bnx2.h
28517	BNX2_HC_CONFIG_COM_TMR_MODE	(1L<<3)	bnx2.h
28518	BNX2_HC_CONFIG_CMD_TMR_MODE	(1L<<4)	bnx2.h
28519	BNX2_HC_CONFIG_STATISTIC_PRIORI	(1L<<5)	bnx2.h
28520	BNX2_HC_CONFIG_STATUS_PRIORITY	(1L<<6)	bnx2.h
28521	BNX2_HC_CONFIG_STAT_MEM_ADDR	(0xffL<<8)	bnx2.h
28522	BNX2_HC_ATTN_BITS_ENABLE	0x0000680c	bnx2.h
28523	BNX2_HC_STATUS_ADDR_L	0x00006810	bnx2.h
28524	BNX2_HC_STATUS_ADDR_H	0x00006814	bnx2.h
28525	BNX2_HC_STATISTICS_ADDR_L	0x00006818	bnx2.h
28526	BNX2_HC_STATISTICS_ADDR_H	0x0000681c	bnx2.h
28527	BNX2_HC_TX_QUICK_CONS_TRIP	0x00006820	bnx2.h
28528	BNX2_HC_TX_QUICK_CONS_TRIP_VALU	(0xffL<<0)	bnx2.h
28529	BNX2_HC_TX_QUICK_CONS_TRIP_INT	(0xffL<<16)	bnx2.h
28530	BNX2_HC_COMP_PROD_TRIP	0x00006824	bnx2.h
28531	BNX2_HC_COMP_PROD_TRIP_VALUE	(0xffL<<0)	bnx2.h
28532	BNX2_HC_COMP_PROD_TRIP_INT	(0xffL<<16)	bnx2.h
28533	BNX2_HC_RX_QUICK_CONS_TRIP	0x00006828	bnx2.h
28534	BNX2_HC_RX_QUICK_CONS_TRIP_VALU	(0xffL<<0)	bnx2.h
28535	BNX2_HC_RX_QUICK_CONS_TRIP_INT	(0xffL<<16)	bnx2.h
28536	BNX2_HC_RX_TICKS	0x0000682c	bnx2.h
28537	BNX2_HC_RX_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
28538	BNX2_HC_RX_TICKS_INT	(0x3ffL<<16)	bnx2.h
28539	BNX2_HC_TX_TICKS	0x00006830	bnx2.h
28540	BNX2_HC_TX_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
28541	BNX2_HC_TX_TICKS_INT	(0x3ffL<<16)	bnx2.h
28542	BNX2_HC_COM_TICKS	0x00006834	bnx2.h
28543	BNX2_HC_COM_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
28544	BNX2_HC_COM_TICKS_INT	(0x3ffL<<16)	bnx2.h
28545	BNX2_HC_CMD_TICKS	0x00006838	bnx2.h
28546	BNX2_HC_CMD_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
28547	BNX2_HC_CMD_TICKS_INT	(0x3ffL<<16)	bnx2.h
28548	BNX2_HC_PERIODIC_TICKS	0x0000683c	bnx2.h
28549	BNX2_HC_PERIODIC_TICKS_HC_PERIO	(0xffffL<<0)	bnx2.h
28550	BNX2_HC_STAT_COLLECT_TICKS	0x00006840	bnx2.h
28551	BNX2_HC_STAT_COLLECT_TICKS_HC_S	(0xffL<<4)	bnx2.h
28552	BNX2_HC_STATS_TICKS	0x00006844	bnx2.h
28553	BNX2_HC_STATS_TICKS_HC_STAT_TIC	(0xffffL<<8)	bnx2.h
28554	BNX2_HC_STAT_MEM_DATA	0x0000684c	bnx2.h
28555	BNX2_HC_STAT_GEN_SEL_0	0x00006850	bnx2.h
28556	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<0)	bnx2.h
28557	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0L<<0)	bnx2.h
28558	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(1L<<0)	bnx2.h
28559	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(2L<<0)	bnx2.h
28560	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(3L<<0)	bnx2.h
28561	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(4L<<0)	bnx2.h
28562	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(5L<<0)	bnx2.h
28563	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(6L<<0)	bnx2.h
28564	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(7L<<0)	bnx2.h
28565	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(8L<<0)	bnx2.h
28566	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(9L<<0)	bnx2.h
28567	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(10L<<0)	bnx2.h
28568	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(11L<<0)	bnx2.h
28569	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(12L<<0)	bnx2.h
28570	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(13L<<0)	bnx2.h
28571	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(14L<<0)	bnx2.h
28572	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(15L<<0)	bnx2.h
28573	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(16L<<0)	bnx2.h
28574	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(17L<<0)	bnx2.h
28575	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(18L<<0)	bnx2.h
28576	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(19L<<0)	bnx2.h
28577	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(20L<<0)	bnx2.h
28578	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(21L<<0)	bnx2.h
28579	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(22L<<0)	bnx2.h
28580	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(23L<<0)	bnx2.h
28581	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(24L<<0)	bnx2.h
28582	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(25L<<0)	bnx2.h
28583	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(26L<<0)	bnx2.h
28584	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(27L<<0)	bnx2.h
28585	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(28L<<0)	bnx2.h
28586	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(29L<<0)	bnx2.h
28587	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(30L<<0)	bnx2.h
28588	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(31L<<0)	bnx2.h
28589	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(32L<<0)	bnx2.h
28590	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(33L<<0)	bnx2.h
28591	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(34L<<0)	bnx2.h
28592	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(35L<<0)	bnx2.h
28593	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(36L<<0)	bnx2.h
28594	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(37L<<0)	bnx2.h
28595	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(38L<<0)	bnx2.h
28596	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(39L<<0)	bnx2.h
28597	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(40L<<0)	bnx2.h
28598	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(41L<<0)	bnx2.h
28599	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(42L<<0)	bnx2.h
28600	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(43L<<0)	bnx2.h
28601	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(44L<<0)	bnx2.h
28602	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(45L<<0)	bnx2.h
28603	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(46L<<0)	bnx2.h
28604	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(47L<<0)	bnx2.h
28605	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(48L<<0)	bnx2.h
28606	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(49L<<0)	bnx2.h
28607	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(50L<<0)	bnx2.h
28608	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(51L<<0)	bnx2.h
28609	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(52L<<0)	bnx2.h
28610	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(53L<<0)	bnx2.h
28611	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(54L<<0)	bnx2.h
28612	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(55L<<0)	bnx2.h
28613	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(56L<<0)	bnx2.h
28614	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(59L<<0)	bnx2.h
28615	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(60L<<0)	bnx2.h
28616	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(61L<<0)	bnx2.h
28617	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(62L<<0)	bnx2.h
28618	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(63L<<0)	bnx2.h
28619	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(64L<<0)	bnx2.h
28620	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(65L<<0)	bnx2.h
28621	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(66L<<0)	bnx2.h
28622	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(67L<<0)	bnx2.h
28623	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(68L<<0)	bnx2.h
28624	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(69L<<0)	bnx2.h
28625	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(70L<<0)	bnx2.h
28626	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(71L<<0)	bnx2.h
28627	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(72L<<0)	bnx2.h
28628	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(73L<<0)	bnx2.h
28629	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(74L<<0)	bnx2.h
28630	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(75L<<0)	bnx2.h
28631	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(76L<<0)	bnx2.h
28632	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(77L<<0)	bnx2.h
28633	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(78L<<0)	bnx2.h
28634	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(79L<<0)	bnx2.h
28635	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(80L<<0)	bnx2.h
28636	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(81L<<0)	bnx2.h
28637	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(82L<<0)	bnx2.h
28638	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(83L<<0)	bnx2.h
28639	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(84L<<0)	bnx2.h
28640	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(85L<<0)	bnx2.h
28641	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(86L<<0)	bnx2.h
28642	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(87L<<0)	bnx2.h
28643	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(88L<<0)	bnx2.h
28644	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(89L<<0)	bnx2.h
28645	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(90L<<0)	bnx2.h
28646	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(91L<<0)	bnx2.h
28647	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(92L<<0)	bnx2.h
28648	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(93L<<0)	bnx2.h
28649	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(94L<<0)	bnx2.h
28650	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(95L<<0)	bnx2.h
28651	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(96L<<0)	bnx2.h
28652	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(97L<<0)	bnx2.h
28653	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(98L<<0)	bnx2.h
28654	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(99L<<0)	bnx2.h
28655	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(100L<<0)	bnx2.h
28656	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(101L<<0)	bnx2.h
28657	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(102L<<0)	bnx2.h
28658	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(103L<<0)	bnx2.h
28659	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(104L<<0)	bnx2.h
28660	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(105L<<0)	bnx2.h
28661	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(106L<<0)	bnx2.h
28662	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(107L<<0)	bnx2.h
28663	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(108L<<0)	bnx2.h
28664	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(109L<<0)	bnx2.h
28665	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(110L<<0)	bnx2.h
28666	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(111L<<0)	bnx2.h
28667	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(112L<<0)	bnx2.h
28668	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(113L<<0)	bnx2.h
28669	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(114L<<0)	bnx2.h
28670	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(115L<<0)	bnx2.h
28671	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(116L<<0)	bnx2.h
28672	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(117L<<0)	bnx2.h
28673	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(118L<<0)	bnx2.h
28674	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(119L<<0)	bnx2.h
28675	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(120L<<0)	bnx2.h
28676	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(121L<<0)	bnx2.h
28677	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(122L<<0)	bnx2.h
28678	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(127L<<0)	bnx2.h
28679	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<8)	bnx2.h
28680	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<16)	bnx2.h
28681	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<24)	bnx2.h
28682	BNX2_HC_STAT_GEN_SEL_1	0x00006854	bnx2.h
28683	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<0)	bnx2.h
28684	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<8)	bnx2.h
28685	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<16)	bnx2.h
28686	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<24)	bnx2.h
28687	BNX2_HC_STAT_GEN_SEL_2	0x00006858	bnx2.h
28688	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<0)	bnx2.h
28689	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<8)	bnx2.h
28690	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<16)	bnx2.h
28691	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<24)	bnx2.h
28692	BNX2_HC_STAT_GEN_SEL_3	0x0000685c	bnx2.h
28693	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<0)	bnx2.h
28694	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<8)	bnx2.h
28695	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<16)	bnx2.h
28696	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<24)	bnx2.h
28697	BNX2_HC_STAT_GEN_STAT0	0x00006888	bnx2.h
28698	BNX2_HC_STAT_GEN_STAT1	0x0000688c	bnx2.h
28699	BNX2_HC_STAT_GEN_STAT2	0x00006890	bnx2.h
28700	BNX2_HC_STAT_GEN_STAT3	0x00006894	bnx2.h
28701	BNX2_HC_STAT_GEN_STAT4	0x00006898	bnx2.h
28702	BNX2_HC_STAT_GEN_STAT5	0x0000689c	bnx2.h
28703	BNX2_HC_STAT_GEN_STAT6	0x000068a0	bnx2.h
28704	BNX2_HC_STAT_GEN_STAT7	0x000068a4	bnx2.h
28705	BNX2_HC_STAT_GEN_STAT8	0x000068a8	bnx2.h
28706	BNX2_HC_STAT_GEN_STAT9	0x000068ac	bnx2.h
28707	BNX2_HC_STAT_GEN_STAT10	0x000068b0	bnx2.h
28708	BNX2_HC_STAT_GEN_STAT11	0x000068b4	bnx2.h
28709	BNX2_HC_STAT_GEN_STAT12	0x000068b8	bnx2.h
28710	BNX2_HC_STAT_GEN_STAT13	0x000068bc	bnx2.h
28711	BNX2_HC_STAT_GEN_STAT14	0x000068c0	bnx2.h
28712	BNX2_HC_STAT_GEN_STAT15	0x000068c4	bnx2.h
28713	BNX2_HC_STAT_GEN_STAT_AC0	0x000068c8	bnx2.h
28714	BNX2_HC_STAT_GEN_STAT_AC1	0x000068cc	bnx2.h
28715	BNX2_HC_STAT_GEN_STAT_AC2	0x000068d0	bnx2.h
28716	BNX2_HC_STAT_GEN_STAT_AC3	0x000068d4	bnx2.h
28717	BNX2_HC_STAT_GEN_STAT_AC4	0x000068d8	bnx2.h
28718	BNX2_HC_STAT_GEN_STAT_AC5	0x000068dc	bnx2.h
28719	BNX2_HC_STAT_GEN_STAT_AC6	0x000068e0	bnx2.h
28720	BNX2_HC_STAT_GEN_STAT_AC7	0x000068e4	bnx2.h
28721	BNX2_HC_STAT_GEN_STAT_AC8	0x000068e8	bnx2.h
28722	BNX2_HC_STAT_GEN_STAT_AC9	0x000068ec	bnx2.h
28723	BNX2_HC_STAT_GEN_STAT_AC10	0x000068f0	bnx2.h
28724	BNX2_HC_STAT_GEN_STAT_AC11	0x000068f4	bnx2.h
28725	BNX2_HC_STAT_GEN_STAT_AC12	0x000068f8	bnx2.h
28726	BNX2_HC_STAT_GEN_STAT_AC13	0x000068fc	bnx2.h
28727	BNX2_HC_STAT_GEN_STAT_AC14	0x00006900	bnx2.h
28728	BNX2_HC_STAT_GEN_STAT_AC15	0x00006904	bnx2.h
28729	BNX2_HC_VIS	0x00006908	bnx2.h
28730	BNX2_HC_VIS_STAT_BUILD_STATE	(0xfL<<0)	bnx2.h
28731	BNX2_HC_VIS_STAT_BUILD_STATE_ID	(0L<<0)	bnx2.h
28732	BNX2_HC_VIS_STAT_BUILD_STATE_ST	(1L<<0)	bnx2.h
28733	BNX2_HC_VIS_STAT_BUILD_STATE_RE	(2L<<0)	bnx2.h
28734	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(3L<<0)	bnx2.h
28735	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(4L<<0)	bnx2.h
28736	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(5L<<0)	bnx2.h
28737	BNX2_HC_VIS_STAT_BUILD_STATE_DM	(6L<<0)	bnx2.h
28738	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(7L<<0)	bnx2.h
28739	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(8L<<0)	bnx2.h
28740	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(9L<<0)	bnx2.h
28741	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(10L<<0)	bnx2.h
28742	BNX2_HC_VIS_DMA_STAT_STATE	(0xfL<<8)	bnx2.h
28743	BNX2_HC_VIS_DMA_STAT_STATE_IDLE	(0L<<8)	bnx2.h
28744	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(1L<<8)	bnx2.h
28745	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(2L<<8)	bnx2.h
28746	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(3L<<8)	bnx2.h
28747	BNX2_HC_VIS_DMA_STAT_STATE_COMP	(4L<<8)	bnx2.h
28748	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(5L<<8)	bnx2.h
28749	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(6L<<8)	bnx2.h
28750	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(7L<<8)	bnx2.h
28751	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(8L<<8)	bnx2.h
28752	BNX2_HC_VIS_DMA_STAT_STATE_WAIT	(9L<<8)	bnx2.h
28753	BNX2_HC_VIS_DMA_STAT_STATE_ABOR	(15L<<8)	bnx2.h
28754	BNX2_HC_VIS_DMA_MSI_STATE	(0x7L<<12)	bnx2.h
28755	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(0x3L<<15)	bnx2.h
28756	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(0L<<15)	bnx2.h
28757	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(1L<<15)	bnx2.h
28758	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(2L<<15)	bnx2.h
28759	BNX2_HC_VIS_1	0x0000690c	bnx2.h
28760	BNX2_HC_VIS_1_HW_INTACK_STATE	(1L<<4)	bnx2.h
28761	BNX2_HC_VIS_1_HW_INTACK_STATE_I	(0L<<4)	bnx2.h
28762	BNX2_HC_VIS_1_HW_INTACK_STATE_C	(1L<<4)	bnx2.h
28763	BNX2_HC_VIS_1_SW_INTACK_STATE	(1L<<5)	bnx2.h
28764	BNX2_HC_VIS_1_SW_INTACK_STATE_I	(0L<<5)	bnx2.h
28765	BNX2_HC_VIS_1_SW_INTACK_STATE_C	(1L<<5)	bnx2.h
28766	BNX2_HC_VIS_1_DURING_SW_INTACK_	(1L<<6)	bnx2.h
28767	BNX2_HC_VIS_1_DURING_SW_INTACK_	(0L<<6)	bnx2.h
28768	BNX2_HC_VIS_1_DURING_SW_INTACK_	(1L<<6)	bnx2.h
28769	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(1L<<7)	bnx2.h
28770	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(0L<<7)	bnx2.h
28771	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(1L<<7)	bnx2.h
28772	BNX2_HC_VIS_1_RAM_RD_ARB_STATE	(0xfL<<17)	bnx2.h
28773	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(0L<<17)	bnx2.h
28774	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(1L<<17)	bnx2.h
28775	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(2L<<17)	bnx2.h
28776	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(3L<<17)	bnx2.h
28777	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(4L<<17)	bnx2.h
28778	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(5L<<17)	bnx2.h
28779	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(6L<<17)	bnx2.h
28780	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(7L<<17)	bnx2.h
28781	BNX2_HC_VIS_1_RAM_WR_ARB_STATE	(0x3L<<21)	bnx2.h
28782	BNX2_HC_VIS_1_RAM_WR_ARB_STATE_	(0L<<21)	bnx2.h
28783	BNX2_HC_VIS_1_RAM_WR_ARB_STATE_	(1L<<21)	bnx2.h
28784	BNX2_HC_VIS_1_INT_GEN_STATE	(1L<<23)	bnx2.h
28785	BNX2_HC_VIS_1_INT_GEN_STATE_DLE	(0L<<23)	bnx2.h
28786	BNX2_HC_VIS_1_INT_GEN_STATE_NTE	(1L<<23)	bnx2.h
28787	BNX2_HC_VIS_1_STAT_CHAN_ID	(0x7L<<24)	bnx2.h
28788	BNX2_HC_VIS_1_INT_B	(1L<<27)	bnx2.h
28789	BNX2_HC_DEBUG_VECT_PEEK	0x00006910	bnx2.h
28790	BNX2_HC_DEBUG_VECT_PEEK_1_VALUE	(0x7ffL<<0)	bnx2.h
28791	BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_	(1L<<11)	bnx2.h
28792	BNX2_HC_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
28793	BNX2_HC_DEBUG_VECT_PEEK_2_VALUE	(0x7ffL<<16)	bnx2.h
28794	BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_	(1L<<27)	bnx2.h
28795	BNX2_HC_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
28796	BNX2_TXP_CPU_MODE	0x00045000	bnx2.h
28797	BNX2_TXP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
28798	BNX2_TXP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
28799	BNX2_TXP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
28800	BNX2_TXP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
28801	BNX2_TXP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
28802	BNX2_TXP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
28803	BNX2_TXP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
28804	BNX2_TXP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
28805	BNX2_TXP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
28806	BNX2_TXP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
28807	BNX2_TXP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
28808	BNX2_TXP_CPU_STATE	0x00045004	bnx2.h
28809	BNX2_TXP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
28810	BNX2_TXP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
28811	BNX2_TXP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
28812	BNX2_TXP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
28813	BNX2_TXP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
28814	BNX2_TXP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
28815	BNX2_TXP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
28816	BNX2_TXP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
28817	BNX2_TXP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
28818	BNX2_TXP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
28819	BNX2_TXP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
28820	BNX2_TXP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
28821	BNX2_TXP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
28822	BNX2_TXP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
28823	BNX2_TXP_CPU_EVENT_MASK	0x00045008	bnx2.h
28824	BNX2_TXP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
28825	BNX2_TXP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
28826	BNX2_TXP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
28827	BNX2_TXP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
28828	BNX2_TXP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
28829	BNX2_TXP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
28830	BNX2_TXP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
28831	BNX2_TXP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
28832	BNX2_TXP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
28833	BNX2_TXP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
28834	BNX2_TXP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
28835	BNX2_TXP_CPU_PROGRAM_COUNTER	0x0004501c	bnx2.h
28836	BNX2_TXP_CPU_INSTRUCTION	0x00045020	bnx2.h
28837	BNX2_TXP_CPU_DATA_ACCESS	0x00045024	bnx2.h
28838	BNX2_TXP_CPU_INTERRUPT_ENABLE	0x00045028	bnx2.h
28839	BNX2_TXP_CPU_INTERRUPT_VECTOR	0x0004502c	bnx2.h
28840	BNX2_TXP_CPU_INTERRUPT_SAVED_PC	0x00045030	bnx2.h
28841	BNX2_TXP_CPU_HW_BREAKPOINT	0x00045034	bnx2.h
28842	BNX2_TXP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
28843	BNX2_TXP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
28844	BNX2_TXP_CPU_DEBUG_VECT_PEEK	0x00045038	bnx2.h
28845	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
28846	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
28847	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
28848	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
28849	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
28850	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
28851	BNX2_TXP_CPU_LAST_BRANCH_ADDR	0x00045048	bnx2.h
28852	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
28853	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
28854	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
28855	BNX2_TXP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
28856	BNX2_TXP_CPU_REG_FILE	0x00045200	bnx2.h
28857	BNX2_TXP_FTQ_DATA	0x000453c0	bnx2.h
28858	BNX2_TXP_FTQ_CMD	0x000453f8	bnx2.h
28859	BNX2_TXP_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
28860	BNX2_TXP_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
28861	BNX2_TXP_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
28862	BNX2_TXP_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
28863	BNX2_TXP_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
28864	BNX2_TXP_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
28865	BNX2_TXP_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
28866	BNX2_TXP_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
28867	BNX2_TXP_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
28868	BNX2_TXP_FTQ_CMD_POP	(1L<<30)	bnx2.h
28869	BNX2_TXP_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
28870	BNX2_TXP_FTQ_CTL	0x000453fc	bnx2.h
28871	BNX2_TXP_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
28872	BNX2_TXP_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
28873	BNX2_TXP_FTQ_CTL_FORCE_INTERVEN	(1L<<2)	bnx2.h
28874	BNX2_TXP_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
28875	BNX2_TXP_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
28876	BNX2_TXP_SCRATCH	0x00060000	bnx2.h
28877	BNX2_TPAT_CPU_MODE	0x00085000	bnx2.h
28878	BNX2_TPAT_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
28879	BNX2_TPAT_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
28880	BNX2_TPAT_CPU_MODE_PAGE_0_DATA_	(1L<<2)	bnx2.h
28881	BNX2_TPAT_CPU_MODE_PAGE_0_INST_	(1L<<3)	bnx2.h
28882	BNX2_TPAT_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
28883	BNX2_TPAT_CPU_MODE_INTERRUPT_EN	(1L<<7)	bnx2.h
28884	BNX2_TPAT_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
28885	BNX2_TPAT_CPU_MODE_BAD_DATA_HAL	(1L<<11)	bnx2.h
28886	BNX2_TPAT_CPU_MODE_BAD_INST_HAL	(1L<<12)	bnx2.h
28887	BNX2_TPAT_CPU_MODE_FIO_ABORT_HA	(1L<<13)	bnx2.h
28888	BNX2_TPAT_CPU_MODE_SPAD_UNDERFL	(1L<<15)	bnx2.h
28889	BNX2_TPAT_CPU_STATE	0x00085004	bnx2.h
28890	BNX2_TPAT_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
28891	BNX2_TPAT_CPU_STATE_BAD_INST_HA	(1L<<2)	bnx2.h
28892	BNX2_TPAT_CPU_STATE_PAGE_0_DATA	(1L<<3)	bnx2.h
28893	BNX2_TPAT_CPU_STATE_PAGE_0_INST	(1L<<4)	bnx2.h
28894	BNX2_TPAT_CPU_STATE_BAD_DATA_AD	(1L<<5)	bnx2.h
28895	BNX2_TPAT_CPU_STATE_BAD_pc_HALT	(1L<<6)	bnx2.h
28896	BNX2_TPAT_CPU_STATE_ALIGN_HALTE	(1L<<7)	bnx2.h
28897	BNX2_TPAT_CPU_STATE_FIO_ABORT_H	(1L<<8)	bnx2.h
28898	BNX2_TPAT_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
28899	BNX2_TPAT_CPU_STATE_SPAD_UNDERF	(1L<<11)	bnx2.h
28900	BNX2_TPAT_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
28901	BNX2_TPAT_CPU_STATE_DATA_ACCESS	(1L<<14)	bnx2.h
28902	BNX2_TPAT_CPU_STATE_INST_FETCH_	(1L<<15)	bnx2.h
28903	BNX2_TPAT_CPU_STATE_BLOCKED_REA	(1L<<31)	bnx2.h
28904	BNX2_TPAT_CPU_EVENT_MASK	0x00085008	bnx2.h
28905	BNX2_TPAT_CPU_EVENT_MASK_BREAKP	(1L<<0)	bnx2.h
28906	BNX2_TPAT_CPU_EVENT_MASK_BAD_IN	(1L<<2)	bnx2.h
28907	BNX2_TPAT_CPU_EVENT_MASK_PAGE_0	(1L<<3)	bnx2.h
28908	BNX2_TPAT_CPU_EVENT_MASK_PAGE_0	(1L<<4)	bnx2.h
28909	BNX2_TPAT_CPU_EVENT_MASK_BAD_DA	(1L<<5)	bnx2.h
28910	BNX2_TPAT_CPU_EVENT_MASK_BAD_PC	(1L<<6)	bnx2.h
28911	BNX2_TPAT_CPU_EVENT_MASK_ALIGN_	(1L<<7)	bnx2.h
28912	BNX2_TPAT_CPU_EVENT_MASK_FIO_AB	(1L<<8)	bnx2.h
28913	BNX2_TPAT_CPU_EVENT_MASK_SOFT_H	(1L<<10)	bnx2.h
28914	BNX2_TPAT_CPU_EVENT_MASK_SPAD_U	(1L<<11)	bnx2.h
28915	BNX2_TPAT_CPU_EVENT_MASK_INTERR	(1L<<12)	bnx2.h
28916	BNX2_TPAT_CPU_PROGRAM_COUNTER	0x0008501c	bnx2.h
28917	BNX2_TPAT_CPU_INSTRUCTION	0x00085020	bnx2.h
28918	BNX2_TPAT_CPU_DATA_ACCESS	0x00085024	bnx2.h
28919	BNX2_TPAT_CPU_INTERRUPT_ENABLE	0x00085028	bnx2.h
28920	BNX2_TPAT_CPU_INTERRUPT_VECTOR	0x0008502c	bnx2.h
28921	BNX2_TPAT_CPU_INTERRUPT_SAVED_P	0x00085030	bnx2.h
28922	BNX2_TPAT_CPU_HW_BREAKPOINT	0x00085034	bnx2.h
28923	BNX2_TPAT_CPU_HW_BREAKPOINT_DIS	(1L<<0)	bnx2.h
28924	BNX2_TPAT_CPU_HW_BREAKPOINT_ADD	(0x3fffffffL<<2)	bnx2.h
28925	BNX2_TPAT_CPU_DEBUG_VECT_PEEK	0x00085038	bnx2.h
28926	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(0x7ffL<<0)	bnx2.h
28927	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(1L<<11)	bnx2.h
28928	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(0xfL<<12)	bnx2.h
28929	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(0x7ffL<<16)	bnx2.h
28930	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(1L<<27)	bnx2.h
28931	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(0xfL<<28)	bnx2.h
28932	BNX2_TPAT_CPU_LAST_BRANCH_ADDR	0x00085048	bnx2.h
28933	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(1L<<1)	bnx2.h
28934	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(0L<<1)	bnx2.h
28935	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(1L<<1)	bnx2.h
28936	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(0x3fffffffL<<2)	bnx2.h
28937	BNX2_TPAT_CPU_REG_FILE	0x00085200	bnx2.h
28938	BNX2_TPAT_FTQ_DATA	0x000853c0	bnx2.h
28939	BNX2_TPAT_FTQ_CMD	0x000853f8	bnx2.h
28940	BNX2_TPAT_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
28941	BNX2_TPAT_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
28942	BNX2_TPAT_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
28943	BNX2_TPAT_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
28944	BNX2_TPAT_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
28945	BNX2_TPAT_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
28946	BNX2_TPAT_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
28947	BNX2_TPAT_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
28948	BNX2_TPAT_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
28949	BNX2_TPAT_FTQ_CMD_POP	(1L<<30)	bnx2.h
28950	BNX2_TPAT_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
28951	BNX2_TPAT_FTQ_CTL	0x000853fc	bnx2.h
28952	BNX2_TPAT_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
28953	BNX2_TPAT_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
28954	BNX2_TPAT_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
28955	BNX2_TPAT_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
28956	BNX2_TPAT_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
28957	BNX2_TPAT_SCRATCH	0x000a0000	bnx2.h
28958	BNX2_RXP_CPU_MODE	0x000c5000	bnx2.h
28959	BNX2_RXP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
28960	BNX2_RXP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
28961	BNX2_RXP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
28962	BNX2_RXP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
28963	BNX2_RXP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
28964	BNX2_RXP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
28965	BNX2_RXP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
28966	BNX2_RXP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
28967	BNX2_RXP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
28968	BNX2_RXP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
28969	BNX2_RXP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
28970	BNX2_RXP_CPU_STATE	0x000c5004	bnx2.h
28971	BNX2_RXP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
28972	BNX2_RXP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
28973	BNX2_RXP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
28974	BNX2_RXP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
28975	BNX2_RXP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
28976	BNX2_RXP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
28977	BNX2_RXP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
28978	BNX2_RXP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
28979	BNX2_RXP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
28980	BNX2_RXP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
28981	BNX2_RXP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
28982	BNX2_RXP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
28983	BNX2_RXP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
28984	BNX2_RXP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
28985	BNX2_RXP_CPU_EVENT_MASK	0x000c5008	bnx2.h
28986	BNX2_RXP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
28987	BNX2_RXP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
28988	BNX2_RXP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
28989	BNX2_RXP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
28990	BNX2_RXP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
28991	BNX2_RXP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
28992	BNX2_RXP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
28993	BNX2_RXP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
28994	BNX2_RXP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
28995	BNX2_RXP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
28996	BNX2_RXP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
28997	BNX2_RXP_CPU_PROGRAM_COUNTER	0x000c501c	bnx2.h
28998	BNX2_RXP_CPU_INSTRUCTION	0x000c5020	bnx2.h
28999	BNX2_RXP_CPU_DATA_ACCESS	0x000c5024	bnx2.h
29000	BNX2_RXP_CPU_INTERRUPT_ENABLE	0x000c5028	bnx2.h
29001	BNX2_RXP_CPU_INTERRUPT_VECTOR	0x000c502c	bnx2.h
29002	BNX2_RXP_CPU_INTERRUPT_SAVED_PC	0x000c5030	bnx2.h
29003	BNX2_RXP_CPU_HW_BREAKPOINT	0x000c5034	bnx2.h
29004	BNX2_RXP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
29005	BNX2_RXP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
29006	BNX2_RXP_CPU_DEBUG_VECT_PEEK	0x000c5038	bnx2.h
29007	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
29008	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
29009	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
29010	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
29011	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
29012	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
29013	BNX2_RXP_CPU_LAST_BRANCH_ADDR	0x000c5048	bnx2.h
29014	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
29015	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
29016	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
29017	BNX2_RXP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
29018	BNX2_RXP_CPU_REG_FILE	0x000c5200	bnx2.h
29019	BNX2_RXP_CFTQ_DATA	0x000c5380	bnx2.h
29020	BNX2_RXP_CFTQ_CMD	0x000c53b8	bnx2.h
29021	BNX2_RXP_CFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
29022	BNX2_RXP_CFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
29023	BNX2_RXP_CFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
29024	BNX2_RXP_CFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
29025	BNX2_RXP_CFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
29026	BNX2_RXP_CFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
29027	BNX2_RXP_CFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
29028	BNX2_RXP_CFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
29029	BNX2_RXP_CFTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
29030	BNX2_RXP_CFTQ_CMD_POP	(1L<<30)	bnx2.h
29031	BNX2_RXP_CFTQ_CMD_BUSY	(1L<<31)	bnx2.h
29032	BNX2_RXP_CFTQ_CTL	0x000c53bc	bnx2.h
29033	BNX2_RXP_CFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
29034	BNX2_RXP_CFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
29035	BNX2_RXP_CFTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
29036	BNX2_RXP_CFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
29037	BNX2_RXP_CFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
29038	BNX2_RXP_FTQ_DATA	0x000c53c0	bnx2.h
29039	BNX2_RXP_FTQ_CMD	0x000c53f8	bnx2.h
29040	BNX2_RXP_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
29041	BNX2_RXP_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
29042	BNX2_RXP_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
29043	BNX2_RXP_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
29044	BNX2_RXP_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
29045	BNX2_RXP_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
29046	BNX2_RXP_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
29047	BNX2_RXP_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
29048	BNX2_RXP_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
29049	BNX2_RXP_FTQ_CMD_POP	(1L<<30)	bnx2.h
29050	BNX2_RXP_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
29051	BNX2_RXP_FTQ_CTL	0x000c53fc	bnx2.h
29052	BNX2_RXP_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
29053	BNX2_RXP_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
29054	BNX2_RXP_FTQ_CTL_FORCE_INTERVEN	(1L<<2)	bnx2.h
29055	BNX2_RXP_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
29056	BNX2_RXP_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
29057	BNX2_RXP_SCRATCH	0x000e0000	bnx2.h
29058	BNX2_COM_CPU_MODE	0x00105000	bnx2.h
29059	BNX2_COM_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
29060	BNX2_COM_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
29061	BNX2_COM_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
29062	BNX2_COM_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
29063	BNX2_COM_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
29064	BNX2_COM_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
29065	BNX2_COM_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
29066	BNX2_COM_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
29067	BNX2_COM_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
29068	BNX2_COM_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
29069	BNX2_COM_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
29070	BNX2_COM_CPU_STATE	0x00105004	bnx2.h
29071	BNX2_COM_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
29072	BNX2_COM_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
29073	BNX2_COM_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
29074	BNX2_COM_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
29075	BNX2_COM_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
29076	BNX2_COM_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
29077	BNX2_COM_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
29078	BNX2_COM_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
29079	BNX2_COM_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
29080	BNX2_COM_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
29081	BNX2_COM_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
29082	BNX2_COM_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
29083	BNX2_COM_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
29084	BNX2_COM_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
29085	BNX2_COM_CPU_EVENT_MASK	0x00105008	bnx2.h
29086	BNX2_COM_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
29087	BNX2_COM_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
29088	BNX2_COM_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
29089	BNX2_COM_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
29090	BNX2_COM_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
29091	BNX2_COM_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
29092	BNX2_COM_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
29093	BNX2_COM_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
29094	BNX2_COM_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
29095	BNX2_COM_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
29096	BNX2_COM_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
29097	BNX2_COM_CPU_PROGRAM_COUNTER	0x0010501c	bnx2.h
29098	BNX2_COM_CPU_INSTRUCTION	0x00105020	bnx2.h
29099	BNX2_COM_CPU_DATA_ACCESS	0x00105024	bnx2.h
29100	BNX2_COM_CPU_INTERRUPT_ENABLE	0x00105028	bnx2.h
29101	BNX2_COM_CPU_INTERRUPT_VECTOR	0x0010502c	bnx2.h
29102	BNX2_COM_CPU_INTERRUPT_SAVED_PC	0x00105030	bnx2.h
29103	BNX2_COM_CPU_HW_BREAKPOINT	0x00105034	bnx2.h
29104	BNX2_COM_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
29105	BNX2_COM_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
29106	BNX2_COM_CPU_DEBUG_VECT_PEEK	0x00105038	bnx2.h
29107	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
29108	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
29109	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
29110	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
29111	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
29112	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
29113	BNX2_COM_CPU_LAST_BRANCH_ADDR	0x00105048	bnx2.h
29114	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
29115	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
29116	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
29117	BNX2_COM_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
29118	BNX2_COM_CPU_REG_FILE	0x00105200	bnx2.h
29119	BNX2_COM_COMXQ_FTQ_DATA	0x00105340	bnx2.h
29120	BNX2_COM_COMXQ_FTQ_CMD	0x00105378	bnx2.h
29121	BNX2_COM_COMXQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
29122	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
29123	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
29124	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
29125	BNX2_COM_COMXQ_FTQ_CMD_SFT_RESE	(1L<<25)	bnx2.h
29126	BNX2_COM_COMXQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
29127	BNX2_COM_COMXQ_FTQ_CMD_ADD_INTE	(1L<<27)	bnx2.h
29128	BNX2_COM_COMXQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
29129	BNX2_COM_COMXQ_FTQ_CMD_INTERVEN	(1L<<29)	bnx2.h
29130	BNX2_COM_COMXQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
29131	BNX2_COM_COMXQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
29132	BNX2_COM_COMXQ_FTQ_CTL	0x0010537c	bnx2.h
29133	BNX2_COM_COMXQ_FTQ_CTL_INTERVEN	(1L<<0)	bnx2.h
29134	BNX2_COM_COMXQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
29135	BNX2_COM_COMXQ_FTQ_CTL_FORCE_IN	(1L<<2)	bnx2.h
29136	BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPT	(0x3ffL<<12)	bnx2.h
29137	BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPT	(0x3ffL<<22)	bnx2.h
29138	BNX2_COM_COMTQ_FTQ_DATA	0x00105380	bnx2.h
29139	BNX2_COM_COMTQ_FTQ_CMD	0x001053b8	bnx2.h
29140	BNX2_COM_COMTQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
29141	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
29142	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
29143	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
29144	BNX2_COM_COMTQ_FTQ_CMD_SFT_RESE	(1L<<25)	bnx2.h
29145	BNX2_COM_COMTQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
29146	BNX2_COM_COMTQ_FTQ_CMD_ADD_INTE	(1L<<27)	bnx2.h
29147	BNX2_COM_COMTQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
29148	BNX2_COM_COMTQ_FTQ_CMD_INTERVEN	(1L<<29)	bnx2.h
29149	BNX2_COM_COMTQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
29150	BNX2_COM_COMTQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
29151	BNX2_COM_COMTQ_FTQ_CTL	0x001053bc	bnx2.h
29152	BNX2_COM_COMTQ_FTQ_CTL_INTERVEN	(1L<<0)	bnx2.h
29153	BNX2_COM_COMTQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
29154	BNX2_COM_COMTQ_FTQ_CTL_FORCE_IN	(1L<<2)	bnx2.h
29155	BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPT	(0x3ffL<<12)	bnx2.h
29156	BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPT	(0x3ffL<<22)	bnx2.h
29157	BNX2_COM_COMQ_FTQ_DATA	0x001053c0	bnx2.h
29158	BNX2_COM_COMQ_FTQ_CMD	0x001053f8	bnx2.h
29159	BNX2_COM_COMQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
29160	BNX2_COM_COMQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
29161	BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
29162	BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
29163	BNX2_COM_COMQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
29164	BNX2_COM_COMQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
29165	BNX2_COM_COMQ_FTQ_CMD_ADD_INTER	(1L<<27)	bnx2.h
29166	BNX2_COM_COMQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
29167	BNX2_COM_COMQ_FTQ_CMD_INTERVENE	(1L<<29)	bnx2.h
29168	BNX2_COM_COMQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
29169	BNX2_COM_COMQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
29170	BNX2_COM_COMQ_FTQ_CTL	0x001053fc	bnx2.h
29171	BNX2_COM_COMQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
29172	BNX2_COM_COMQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
29173	BNX2_COM_COMQ_FTQ_CTL_FORCE_INT	(1L<<2)	bnx2.h
29174	BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
29175	BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
29176	BNX2_COM_SCRATCH	0x00120000	bnx2.h
29177	BNX2_CP_CPU_MODE	0x00185000	bnx2.h
29178	BNX2_CP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
29179	BNX2_CP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
29180	BNX2_CP_CPU_MODE_PAGE_0_DATA_EN	(1L<<2)	bnx2.h
29181	BNX2_CP_CPU_MODE_PAGE_0_INST_EN	(1L<<3)	bnx2.h
29182	BNX2_CP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
29183	BNX2_CP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
29184	BNX2_CP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
29185	BNX2_CP_CPU_MODE_BAD_DATA_HALT_	(1L<<11)	bnx2.h
29186	BNX2_CP_CPU_MODE_BAD_INST_HALT_	(1L<<12)	bnx2.h
29187	BNX2_CP_CPU_MODE_FIO_ABORT_HALT	(1L<<13)	bnx2.h
29188	BNX2_CP_CPU_MODE_SPAD_UNDERFLOW	(1L<<15)	bnx2.h
29189	BNX2_CP_CPU_STATE	0x00185004	bnx2.h
29190	BNX2_CP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
29191	BNX2_CP_CPU_STATE_BAD_INST_HALT	(1L<<2)	bnx2.h
29192	BNX2_CP_CPU_STATE_PAGE_0_DATA_H	(1L<<3)	bnx2.h
29193	BNX2_CP_CPU_STATE_PAGE_0_INST_H	(1L<<4)	bnx2.h
29194	BNX2_CP_CPU_STATE_BAD_DATA_ADDR	(1L<<5)	bnx2.h
29195	BNX2_CP_CPU_STATE_BAD_pc_HALTED	(1L<<6)	bnx2.h
29196	BNX2_CP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
29197	BNX2_CP_CPU_STATE_FIO_ABORT_HAL	(1L<<8)	bnx2.h
29198	BNX2_CP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
29199	BNX2_CP_CPU_STATE_SPAD_UNDERFLO	(1L<<11)	bnx2.h
29200	BNX2_CP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
29201	BNX2_CP_CPU_STATE_DATA_ACCESS_S	(1L<<14)	bnx2.h
29202	BNX2_CP_CPU_STATE_INST_FETCH_ST	(1L<<15)	bnx2.h
29203	BNX2_CP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
29204	BNX2_CP_CPU_EVENT_MASK	0x00185008	bnx2.h
29205	BNX2_CP_CPU_EVENT_MASK_BREAKPOI	(1L<<0)	bnx2.h
29206	BNX2_CP_CPU_EVENT_MASK_BAD_INST	(1L<<2)	bnx2.h
29207	BNX2_CP_CPU_EVENT_MASK_PAGE_0_D	(1L<<3)	bnx2.h
29208	BNX2_CP_CPU_EVENT_MASK_PAGE_0_I	(1L<<4)	bnx2.h
29209	BNX2_CP_CPU_EVENT_MASK_BAD_DATA	(1L<<5)	bnx2.h
29210	BNX2_CP_CPU_EVENT_MASK_BAD_PC_H	(1L<<6)	bnx2.h
29211	BNX2_CP_CPU_EVENT_MASK_ALIGN_HA	(1L<<7)	bnx2.h
29212	BNX2_CP_CPU_EVENT_MASK_FIO_ABOR	(1L<<8)	bnx2.h
29213	BNX2_CP_CPU_EVENT_MASK_SOFT_HAL	(1L<<10)	bnx2.h
29214	BNX2_CP_CPU_EVENT_MASK_SPAD_UND	(1L<<11)	bnx2.h
29215	BNX2_CP_CPU_EVENT_MASK_INTERRUP	(1L<<12)	bnx2.h
29216	BNX2_CP_CPU_PROGRAM_COUNTER	0x0018501c	bnx2.h
29217	BNX2_CP_CPU_INSTRUCTION	0x00185020	bnx2.h
29218	BNX2_CP_CPU_DATA_ACCESS	0x00185024	bnx2.h
29219	BNX2_CP_CPU_INTERRUPT_ENABLE	0x00185028	bnx2.h
29220	BNX2_CP_CPU_INTERRUPT_VECTOR	0x0018502c	bnx2.h
29221	BNX2_CP_CPU_INTERRUPT_SAVED_PC	0x00185030	bnx2.h
29222	BNX2_CP_CPU_HW_BREAKPOINT	0x00185034	bnx2.h
29223	BNX2_CP_CPU_HW_BREAKPOINT_DISAB	(1L<<0)	bnx2.h
29224	BNX2_CP_CPU_HW_BREAKPOINT_ADDRE	(0x3fffffffL<<2)	bnx2.h
29225	BNX2_CP_CPU_DEBUG_VECT_PEEK	0x00185038	bnx2.h
29226	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_V	(0x7ffL<<0)	bnx2.h
29227	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_P	(1L<<11)	bnx2.h
29228	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_S	(0xfL<<12)	bnx2.h
29229	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_V	(0x7ffL<<16)	bnx2.h
29230	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_P	(1L<<27)	bnx2.h
29231	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_S	(0xfL<<28)	bnx2.h
29232	BNX2_CP_CPU_LAST_BRANCH_ADDR	0x00185048	bnx2.h
29233	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(1L<<1)	bnx2.h
29234	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(0L<<1)	bnx2.h
29235	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(1L<<1)	bnx2.h
29236	BNX2_CP_CPU_LAST_BRANCH_ADDR_LB	(0x3fffffffL<<2)	bnx2.h
29237	BNX2_CP_CPU_REG_FILE	0x00185200	bnx2.h
29238	BNX2_CP_CPQ_FTQ_DATA	0x001853c0	bnx2.h
29239	BNX2_CP_CPQ_FTQ_CMD	0x001853f8	bnx2.h
29240	BNX2_CP_CPQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
29241	BNX2_CP_CPQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
29242	BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
29243	BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
29244	BNX2_CP_CPQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
29245	BNX2_CP_CPQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
29246	BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVE	(1L<<27)	bnx2.h
29247	BNX2_CP_CPQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
29248	BNX2_CP_CPQ_FTQ_CMD_INTERVENE_C	(1L<<29)	bnx2.h
29249	BNX2_CP_CPQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
29250	BNX2_CP_CPQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
29251	BNX2_CP_CPQ_FTQ_CTL	0x001853fc	bnx2.h
29252	BNX2_CP_CPQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
29253	BNX2_CP_CPQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
29254	BNX2_CP_CPQ_FTQ_CTL_FORCE_INTER	(1L<<2)	bnx2.h
29255	BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
29256	BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
29257	BNX2_CP_SCRATCH	0x001a0000	bnx2.h
29258	BNX2_MCP_CPU_MODE	0x00145000	bnx2.h
29259	BNX2_MCP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
29260	BNX2_MCP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
29261	BNX2_MCP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
29262	BNX2_MCP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
29263	BNX2_MCP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
29264	BNX2_MCP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
29265	BNX2_MCP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
29266	BNX2_MCP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
29267	BNX2_MCP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
29268	BNX2_MCP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
29269	BNX2_MCP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
29270	BNX2_MCP_CPU_STATE	0x00145004	bnx2.h
29271	BNX2_MCP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
29272	BNX2_MCP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
29273	BNX2_MCP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
29274	BNX2_MCP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
29275	BNX2_MCP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
29276	BNX2_MCP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
29277	BNX2_MCP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
29278	BNX2_MCP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
29279	BNX2_MCP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
29280	BNX2_MCP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
29281	BNX2_MCP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
29282	BNX2_MCP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
29283	BNX2_MCP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
29284	BNX2_MCP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
29285	BNX2_MCP_CPU_EVENT_MASK	0x00145008	bnx2.h
29286	BNX2_MCP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
29287	BNX2_MCP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
29288	BNX2_MCP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
29289	BNX2_MCP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
29290	BNX2_MCP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
29291	BNX2_MCP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
29292	BNX2_MCP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
29293	BNX2_MCP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
29294	BNX2_MCP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
29295	BNX2_MCP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
29296	BNX2_MCP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
29297	BNX2_MCP_CPU_PROGRAM_COUNTER	0x0014501c	bnx2.h
29298	BNX2_MCP_CPU_INSTRUCTION	0x00145020	bnx2.h
29299	BNX2_MCP_CPU_DATA_ACCESS	0x00145024	bnx2.h
29300	BNX2_MCP_CPU_INTERRUPT_ENABLE	0x00145028	bnx2.h
29301	BNX2_MCP_CPU_INTERRUPT_VECTOR	0x0014502c	bnx2.h
29302	BNX2_MCP_CPU_INTERRUPT_SAVED_PC	0x00145030	bnx2.h
29303	BNX2_MCP_CPU_HW_BREAKPOINT	0x00145034	bnx2.h
29304	BNX2_MCP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
29305	BNX2_MCP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
29306	BNX2_MCP_CPU_DEBUG_VECT_PEEK	0x00145038	bnx2.h
29307	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
29308	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
29309	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
29310	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
29311	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
29312	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
29313	BNX2_MCP_CPU_LAST_BRANCH_ADDR	0x00145048	bnx2.h
29314	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
29315	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
29316	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
29317	BNX2_MCP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
29318	BNX2_MCP_CPU_REG_FILE	0x00145200	bnx2.h
29319	BNX2_MCP_MCPQ_FTQ_DATA	0x001453c0	bnx2.h
29320	BNX2_MCP_MCPQ_FTQ_CMD	0x001453f8	bnx2.h
29321	BNX2_MCP_MCPQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
29322	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
29323	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
29324	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
29325	BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
29326	BNX2_MCP_MCPQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
29327	BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTER	(1L<<27)	bnx2.h
29328	BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
29329	BNX2_MCP_MCPQ_FTQ_CMD_INTERVENE	(1L<<29)	bnx2.h
29330	BNX2_MCP_MCPQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
29331	BNX2_MCP_MCPQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
29332	BNX2_MCP_MCPQ_FTQ_CTL	0x001453fc	bnx2.h
29333	BNX2_MCP_MCPQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
29334	BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
29335	BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INT	(1L<<2)	bnx2.h
29336	BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
29337	BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
29338	BNX2_MCP_ROM	0x00150000	bnx2.h
29339	BNX2_MCP_SCRATCH	0x00160000	bnx2.h
29340	BNX2_SHM_HDR_SIGNATURE	BNX2_MCP_SCRATCH	bnx2.h
29341	BNX2_SHM_HDR_SIGNATURE_SIG_MASK	0xffff0000	bnx2.h
29342	BNX2_SHM_HDR_SIGNATURE_SIG	0x53530000	bnx2.h
29343	BNX2_SHM_HDR_SIGNATURE_VER_MASK	0x000000ff	bnx2.h
29344	BNX2_SHM_HDR_SIGNATURE_VER_ONE	0x00000001	bnx2.h
29345	BNX2_SHM_HDR_ADDR_0	BNX2_MCP_SCRATCH + 4	bnx2.h
29346	BNX2_SHM_HDR_ADDR_1	BNX2_MCP_SCRATCH + 8	bnx2.h
29347	NUM_MC_HASH_REGISTERS	8	bnx2.h
29348	PHY_BCM5706_PHY_ID	0x00206160	bnx2.h
29349	BCM5708S_UP1	0xb	bnx2.h
29350	BCM5708S_UP1_2G5	0x1	bnx2.h
29351	BCM5708S_BLK_ADDR	0x1f	bnx2.h
29352	BCM5708S_BLK_ADDR_DIG	0x0000	bnx2.h
29353	BCM5708S_BLK_ADDR_DIG3	0x0002	bnx2.h
29354	BCM5708S_BLK_ADDR_TX_MISC	0x0005	bnx2.h
29355	BCM5708S_1000X_CTL1	0x10	bnx2.h
29356	BCM5708S_1000X_CTL1_FIBER_MODE	0x0001	bnx2.h
29357	BCM5708S_1000X_CTL1_AUTODET_EN	0x0010	bnx2.h
29358	BCM5708S_1000X_CTL2	0x11	bnx2.h
29359	BCM5708S_1000X_CTL2_PLLEL_DET_E	0x0001	bnx2.h
29360	BCM5708S_1000X_STAT1	0x14	bnx2.h
29361	BCM5708S_1000X_STAT1_SGMII	0x0001	bnx2.h
29362	BCM5708S_1000X_STAT1_LINK	0x0002	bnx2.h
29363	BCM5708S_1000X_STAT1_FD	0x0004	bnx2.h
29364	BCM5708S_1000X_STAT1_SPEED_MASK	0x0018	bnx2.h
29365	BCM5708S_1000X_STAT1_SPEED_10	0x0000	bnx2.h
29366	BCM5708S_1000X_STAT1_SPEED_100	0x0008	bnx2.h
29367	BCM5708S_1000X_STAT1_SPEED_1G	0x0010	bnx2.h
29368	BCM5708S_1000X_STAT1_SPEED_2G5	0x0018	bnx2.h
29369	BCM5708S_1000X_STAT1_TX_PAUSE	0x0020	bnx2.h
29370	BCM5708S_1000X_STAT1_RX_PAUSE	0x0040	bnx2.h
29371	BCM5708S_DIG_3_0	0x10	bnx2.h
29372	BCM5708S_DIG_3_0_USE_IEEE	0x0001	bnx2.h
29373	BCM5708S_TX_ACTL1	0x15	bnx2.h
29374	BCM5708S_TX_ACTL1_DRIVER_VCM	0x30	bnx2.h
29375	BCM5708S_TX_ACTL3	0x17	bnx2.h
29376	MIN_ETHERNET_PACKET_SIZE	60	bnx2.h
29377	MAX_ETHERNET_PACKET_SIZE	1514	bnx2.h
29378	MAX_ETHERNET_JUMBO_PACKET_SIZE	9014	bnx2.h
29379	RX_COPY_THRESH	92	bnx2.h
29380	DMA_READ_CHANS	5	bnx2.h
29381	DMA_WRITE_CHANS	3	bnx2.h
29382	BCM_PAGE_BITS	12	bnx2.h
29383	BCM_PAGE_SIZE	(1 << BCM_PAGE_BITS)	bnx2.h
29384	TX_DESC_CNT	(BCM_PAGE_SIZE / sizeof(struct tx_bd))	bnx2.h
29385	MAX_TX_DESC_CNT	(TX_DESC_CNT - 1)	bnx2.h
29386	MAX_RX_RINGS	4	bnx2.h
29387	RX_DESC_CNT	(BCM_PAGE_SIZE / sizeof(struct rx_bd))	bnx2.h
29388	MAX_RX_DESC_CNT	(RX_DESC_CNT - 1)	bnx2.h
29389	MAX_TOTAL_RX_DESC_CNT	(MAX_RX_DESC_CNT * MAX_RX_RINGS)	bnx2.h
29390	CTX_SHIFT	7	bnx2.h
29391	CTX_SIZE	(1 << CTX_SHIFT)	bnx2.h
29392	CTX_MASK	(CTX_SIZE - 1)	bnx2.h
29393	PHY_CTX_SHIFT	6	bnx2.h
29394	PHY_CTX_SIZE	(1 << PHY_CTX_SHIFT)	bnx2.h
29395	PHY_CTX_MASK	(PHY_CTX_SIZE - 1)	bnx2.h
29396	MB_KERNEL_CTX_SHIFT	8	bnx2.h
29397	MB_KERNEL_CTX_SIZE	(1 << MB_KERNEL_CTX_SHIFT)	bnx2.h
29398	MB_KERNEL_CTX_MASK	(MB_KERNEL_CTX_SIZE - 1)	bnx2.h
29399	MAX_CID_CNT	0x4000	bnx2.h
29400	MAX_CID_ADDR	(GET_CID_ADDR(MAX_CID_CNT))	bnx2.h
29401	INVALID_CID_ADDR	0xffffffff	bnx2.h
29402	TX_CID	16	bnx2.h
29403	RX_CID	0	bnx2.h
29404	MB_TX_CID_ADDR	MB_GET_CID_ADDR(TX_CID)	bnx2.h
29405	MB_RX_CID_ADDR	MB_GET_CID_ADDR(RX_CID)	bnx2.h
29406	SEEPROM_PAGE_BITS	2	bnx2.h
29407	SEEPROM_PHY_PAGE_SIZE	(1 << SEEPROM_PAGE_BITS)	bnx2.h
29408	SEEPROM_BYTE_ADDR_MASK	(SEEPROM_PHY_PAGE_SIZE-1)	bnx2.h
29409	SEEPROM_PAGE_SIZE	4	bnx2.h
29410	SEEPROM_TOTAL_SIZE	65536	bnx2.h
29411	BUFFERED_FLASH_PAGE_BITS	9	bnx2.h
29412	BUFFERED_FLASH_PHY_PAGE_SIZE	(1 << BUFFERED_FLASH_PAGE_BITS)	bnx2.h
29413	BUFFERED_FLASH_BYTE_ADDR_MASK	(BUFFERED_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
29414	BUFFERED_FLASH_PAGE_SIZE	264	bnx2.h
29415	BUFFERED_FLASH_TOTAL_SIZE	0x21000	bnx2.h
29416	SAIFUN_FLASH_PAGE_BITS	8	bnx2.h
29417	SAIFUN_FLASH_PHY_PAGE_SIZE	(1 << SAIFUN_FLASH_PAGE_BITS)	bnx2.h
29418	SAIFUN_FLASH_BYTE_ADDR_MASK	(SAIFUN_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
29419	SAIFUN_FLASH_PAGE_SIZE	256	bnx2.h
29420	SAIFUN_FLASH_BASE_TOTAL_SIZE	65536	bnx2.h
29421	ST_MICRO_FLASH_PAGE_BITS	8	bnx2.h
29422	ST_MICRO_FLASH_PHY_PAGE_SIZE	(1 << ST_MICRO_FLASH_PAGE_BITS)	bnx2.h
29423	ST_MICRO_FLASH_BYTE_ADDR_MASK	(ST_MICRO_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
29424	ST_MICRO_FLASH_PAGE_SIZE	256	bnx2.h
29425	ST_MICRO_FLASH_BASE_TOTAL_SIZE	65536	bnx2.h
29426	NVRAM_TIMEOUT_COUNT	30000	bnx2.h
29427	FLASH_STRAP_MASK	(BNX2_NVM_CFG1_FLASH_MODE \| \ BNX2_NVM_CFG1_BUFFER_MODE \| \ BNX2_NVM_CFG1_PROTECT_MODE \| \ BNX2_NVM_CFG1_FLASH_SIZE)	bnx2.h
29428	FLASH_BACKUP_STRAP_MASK	(0xf << 26)	bnx2.h
29429	RV2P_PROC1	0	bnx2.h
29430	RV2P_PROC2	1	bnx2.h
29431	DRV_PULSE_PERIOD_MS	250	bnx2.h
29432	FW_ACK_TIME_OUT_MS	100	bnx2.h
29433	BNX2_DRV_RESET_SIGNATURE	0x00000000	bnx2.h
29434	BNX2_DRV_RESET_SIGNATURE_MAGIC	0x4841564b	bnx2.h	HAVK
29435	BNX2_DRV_MB	0x00000004	bnx2.h
29436	BNX2_DRV_MSG_CODE	0xff000000	bnx2.h
29437	BNX2_DRV_MSG_CODE_RESET	0x01000000	bnx2.h
29438	BNX2_DRV_MSG_CODE_UNLOAD	0x02000000	bnx2.h
29439	BNX2_DRV_MSG_CODE_SHUTDOWN	0x03000000	bnx2.h
29440	BNX2_DRV_MSG_CODE_SUSPEND_WOL	0x04000000	bnx2.h
29441	BNX2_DRV_MSG_CODE_FW_TIMEOUT	0x05000000	bnx2.h
29442	BNX2_DRV_MSG_CODE_PULSE	0x06000000	bnx2.h
29443	BNX2_DRV_MSG_CODE_DIAG	0x07000000	bnx2.h
29444	BNX2_DRV_MSG_CODE_SUSPEND_NO_WO	0x09000000	bnx2.h
29445	BNX2_DRV_MSG_DATA	0x00ff0000	bnx2.h
29446	BNX2_DRV_MSG_DATA_WAIT0	0x00010000	bnx2.h
29447	BNX2_DRV_MSG_DATA_WAIT1	0x00020000	bnx2.h
29448	BNX2_DRV_MSG_DATA_WAIT2	0x00030000	bnx2.h
29449	BNX2_DRV_MSG_DATA_WAIT3	0x00040000	bnx2.h
29450	BNX2_DRV_MSG_SEQ	0x0000ffff	bnx2.h
29451	BNX2_FW_MB	0x00000008	bnx2.h
29452	BNX2_FW_MSG_ACK	0x0000ffff	bnx2.h
29453	BNX2_FW_MSG_STATUS_MASK	0x00ff0000	bnx2.h
29454	BNX2_FW_MSG_STATUS_OK	0x00000000	bnx2.h
29455	BNX2_FW_MSG_STATUS_FAILURE	0x00ff0000	bnx2.h
29456	BNX2_LINK_STATUS	0x0000000c	bnx2.h
29457	BNX2_LINK_STATUS_INIT_VALUE	0xffffffff	bnx2.h
29458	BNX2_LINK_STATUS_LINK_UP	0x1	bnx2.h
29459	BNX2_LINK_STATUS_LINK_DOWN	0x0	bnx2.h
29460	BNX2_LINK_STATUS_SPEED_MASK	0x1e	bnx2.h
29461	BNX2_LINK_STATUS_AN_INCOMPLETE	(0<<1)	bnx2.h
29462	BNX2_LINK_STATUS_10HALF	(1<<1)	bnx2.h
29463	BNX2_LINK_STATUS_10FULL	(2<<1)	bnx2.h
29464	BNX2_LINK_STATUS_100HALF	(3<<1)	bnx2.h
29465	BNX2_LINK_STATUS_100BASE_T4	(4<<1)	bnx2.h
29466	BNX2_LINK_STATUS_100FULL	(5<<1)	bnx2.h
29467	BNX2_LINK_STATUS_1000HALF	(6<<1)	bnx2.h
29468	BNX2_LINK_STATUS_1000FULL	(7<<1)	bnx2.h
29469	BNX2_LINK_STATUS_2500HALF	(8<<1)	bnx2.h
29470	BNX2_LINK_STATUS_2500FULL	(9<<1)	bnx2.h
29471	BNX2_LINK_STATUS_AN_ENABLED	(1<<5)	bnx2.h
29472	BNX2_LINK_STATUS_AN_COMPLETE	(1<<6)	bnx2.h
29473	BNX2_LINK_STATUS_PARALLEL_DET	(1<<7)	bnx2.h
29474	BNX2_LINK_STATUS_RESERVED	(1<<8)	bnx2.h
29475	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<9)	bnx2.h
29476	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<10)	bnx2.h
29477	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<11)	bnx2.h
29478	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<12)	bnx2.h
29479	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<13)	bnx2.h
29480	BNX2_LINK_STATUS_PARTNER_AD_10F	(1<<14)	bnx2.h
29481	BNX2_LINK_STATUS_PARTNER_AD_10H	(1<<15)	bnx2.h
29482	BNX2_LINK_STATUS_TX_FC_ENABLED	(1<<16)	bnx2.h
29483	BNX2_LINK_STATUS_RX_FC_ENABLED	(1<<17)	bnx2.h
29484	BNX2_LINK_STATUS_PARTNER_SYM_PA	(1<<18)	bnx2.h
29485	BNX2_LINK_STATUS_PARTNER_ASYM_P	(1<<19)	bnx2.h
29486	BNX2_LINK_STATUS_SERDES_LINK	(1<<20)	bnx2.h
29487	BNX2_LINK_STATUS_PARTNER_AD_250	(1<<21)	bnx2.h
29488	BNX2_LINK_STATUS_PARTNER_AD_250	(1<<22)	bnx2.h
29489	BNX2_DRV_PULSE_MB	0x00000010	bnx2.h
29490	BNX2_DRV_PULSE_SEQ_MASK	0x00007fff	bnx2.h
29491	BNX2_DRV_MSG_DATA_PULSE_CODE_AL	0x00080000	bnx2.h
29492	BNX2_DEV_INFO_SIGNATURE	0x00000020	bnx2.h
29493	BNX2_DEV_INFO_SIGNATURE_MAGIC	0x44564900	bnx2.h
29494	BNX2_DEV_INFO_SIGNATURE_MAGIC_M	0xffffff00	bnx2.h
29495	BNX2_DEV_INFO_FEATURE_CFG_VALID	0x01	bnx2.h
29496	BNX2_DEV_INFO_SECONDARY_PORT	0x80	bnx2.h
29497	BNX2_DEV_INFO_DRV_ALWAYS_ALIVE	0x40	bnx2.h
29498	BNX2_SHARED_HW_CFG_PART_NUM	0x00000024	bnx2.h
29499	BNX2_SHARED_HW_CFG_POWER_DISSIP	0x00000034	bnx2.h
29500	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff000000	bnx2.h
29501	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff0000	bnx2.h
29502	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff00	bnx2.h
29503	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff	bnx2.h
29504	BNX2_SHARED_HW_CFG	POWER_CONSUMED 0x00000038	bnx2.h
29505	BNX2_SHARED_HW_CFG_CONFIG	0x0000003c	bnx2.h
29506	BNX2_SHARED_HW_CFG_DESIGN_NIC	0	bnx2.h
29507	BNX2_SHARED_HW_CFG_DESIGN_LOM	0x1	bnx2.h
29508	BNX2_SHARED_HW_CFG_PHY_COPPER	0	bnx2.h
29509	BNX2_SHARED_HW_CFG_PHY_FIBER	0x2	bnx2.h
29510	BNX2_SHARED_HW_CFG_PHY_2_5G	0x20	bnx2.h
29511	BNX2_SHARED_HW_CFG_PHY_BACKPLAN	0x40	bnx2.h
29512	BNX2_SHARED_HW_CFG_LED_MODE_SHI	8	bnx2.h
29513	BNX2_SHARED_HW_CFG_LED_MODE_MAS	0x300	bnx2.h
29514	BNX2_SHARED_HW_CFG_LED_MODE_MAC	0	bnx2.h
29515	BNX2_SHARED_HW_CFG_LED_MODE_GPH	0x100	bnx2.h
29516	BNX2_SHARED_HW_CFG_LED_MODE_GPH	0x200	bnx2.h
29517	BNX2_SHARED_HW_CFG_CONFIG2	0x00000040	bnx2.h
29518	BNX2_SHARED_HW_CFG2_NVM_SIZE_MA	0x00fff000	bnx2.h
29519	BNX2_DEV_INFO_BC_REV	0x0000004c	bnx2.h
29520	BNX2_PORT_HW_CFG_MAC_UPPER	0x00000050	bnx2.h
29521	BNX2_PORT_HW_CFG_UPPERMAC_MASK	0xffff	bnx2.h
29522	BNX2_PORT_HW_CFG_MAC_LOWER	0x00000054	bnx2.h
29523	BNX2_PORT_HW_CFG_CONFIG	0x00000058	bnx2.h
29524	BNX2_PORT_HW_CFG_CFG_TXCTL3_MAS	0x0000ffff	bnx2.h
29525	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x001f0000	bnx2.h
29526	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00000000	bnx2.h
29527	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00030000	bnx2.h
29528	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00040000	bnx2.h
29529	BNX2_PORT_HW_CFG_IMD_MAC_A_UPPE	0x00000068	bnx2.h
29530	BNX2_PORT_HW_CFG_IMD_MAC_A_LOWE	0x0000006c	bnx2.h
29531	BNX2_PORT_HW_CFG_IMD_MAC_B_UPPE	0x00000070	bnx2.h
29532	BNX2_PORT_HW_CFG_IMD_MAC_B_LOWE	0x00000074	bnx2.h
29533	BNX2_PORT_HW_CFG_ISCSI_MAC_UPPE	0x00000078	bnx2.h
29534	BNX2_PORT_HW_CFG_ISCSI_MAC_LOWE	0x0000007c	bnx2.h
29535	BNX2_DEV_INFO_PER_PORT_HW_CONFI	0x000000b4	bnx2.h
29536	BNX2_DEV_INFO_FORMAT_REV	0x000000c4	bnx2.h
29537	BNX2_DEV_INFO_FORMAT_REV_MASK	0xff000000	bnx2.h
29538	BNX2_DEV_INFO_FORMAT_REV_ID	('A' << 24)	bnx2.h
29539	BNX2_SHARED_FEATURE	0x000000c8	bnx2.h
29540	BNX2_SHARED_FEATURE_MASK	0xffffffff	bnx2.h
29541	BNX2_PORT_FEATURE	0x000000d8	bnx2.h
29542	BNX2_PORT2_FEATURE	0x00000014c	bnx2.h
29543	BNX2_PORT_FEATURE_WOL_ENABLED	0x01000000	bnx2.h
29544	BNX2_PORT_FEATURE_MBA_ENABLED	0x02000000	bnx2.h
29545	BNX2_PORT_FEATURE_ASF_ENABLED	0x04000000	bnx2.h
29546	BNX2_PORT_FEATURE_IMD_ENABLED	0x08000000	bnx2.h
29547	BNX2_PORT_FEATURE_BAR1_SIZE_MAS	0xf	bnx2.h
29548	BNX2_PORT_FEATURE_BAR1_SIZE_DIS	0x0	bnx2.h
29549	BNX2_PORT_FEATURE_BAR1_SIZE_64K	0x1	bnx2.h
29550	BNX2_PORT_FEATURE_BAR1_SIZE_128	0x2	bnx2.h
29551	BNX2_PORT_FEATURE_BAR1_SIZE_256	0x3	bnx2.h
29552	BNX2_PORT_FEATURE_BAR1_SIZE_512	0x4	bnx2.h
29553	BNX2_PORT_FEATURE_BAR1_SIZE_1M	0x5	bnx2.h
29554	BNX2_PORT_FEATURE_BAR1_SIZE_2M	0x6	bnx2.h
29555	BNX2_PORT_FEATURE_BAR1_SIZE_4M	0x7	bnx2.h
29556	BNX2_PORT_FEATURE_BAR1_SIZE_8M	0x8	bnx2.h
29557	BNX2_PORT_FEATURE_BAR1_SIZE_16M	0x9	bnx2.h
29558	BNX2_PORT_FEATURE_BAR1_SIZE_32M	0xa	bnx2.h
29559	BNX2_PORT_FEATURE_BAR1_SIZE_64M	0xb	bnx2.h
29560	BNX2_PORT_FEATURE_BAR1_SIZE_128	0xc	bnx2.h
29561	BNX2_PORT_FEATURE_BAR1_SIZE_256	0xd	bnx2.h
29562	BNX2_PORT_FEATURE_BAR1_SIZE_512	0xe	bnx2.h
29563	BNX2_PORT_FEATURE_BAR1_SIZE_1G	0xf	bnx2.h
29564	BNX2_PORT_FEATURE_WOL	0xdc	bnx2.h
29565	BNX2_PORT2_FEATURE_WOL	0x150	bnx2.h
29566	BNX2_PORT_FEATURE_WOL_DEFAULT_S	4	bnx2.h
29567	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x30	bnx2.h
29568	BNX2_PORT_FEATURE_WOL_DEFAULT_D	0	bnx2.h
29569	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x10	bnx2.h
29570	BNX2_PORT_FEATURE_WOL_DEFAULT_A	0x20	bnx2.h
29571	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x30	bnx2.h
29572	BNX2_PORT_FEATURE_WOL_LINK_SPEE	0xf	bnx2.h
29573	BNX2_PORT_FEATURE_WOL_LINK_SPEE	0	bnx2.h
29574	BNX2_PORT_FEATURE_WOL_LINK_SPEE	1	bnx2.h
29575	BNX2_PORT_FEATURE_WOL_LINK_SPEE	2	bnx2.h
29576	BNX2_PORT_FEATURE_WOL_LINK_SPEE	3	bnx2.h
29577	BNX2_PORT_FEATURE_WOL_LINK_SPEE	4	bnx2.h
29578	BNX2_PORT_FEATURE_WOL_LINK_SPEE	5	bnx2.h
29579	BNX2_PORT_FEATURE_WOL_LINK_SPEE	6	bnx2.h
29580	BNX2_PORT_FEATURE_WOL_AUTONEG_A	0x40	bnx2.h
29581	BNX2_PORT_FEATURE_WOL_RESERVED_	0x400	bnx2.h
29582	BNX2_PORT_FEATURE_WOL_RESERVED_	0x800	bnx2.h
29583	BNX2_PORT_FEATURE_MBA	0xe0	bnx2.h
29584	BNX2_PORT2_FEATURE_MBA	0x154	bnx2.h
29585	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0	bnx2.h
29586	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0x3	bnx2.h
29587	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0	bnx2.h
29588	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	1	bnx2.h
29589	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	2	bnx2.h
29590	BNX2_PORT_FEATURE_MBA_LINK_SPEE	2	bnx2.h
29591	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x3c	bnx2.h
29592	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0	bnx2.h
29593	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x4	bnx2.h
29594	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x8	bnx2.h
29595	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0xc	bnx2.h
29596	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x10	bnx2.h
29597	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x14	bnx2.h
29598	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x18	bnx2.h
29599	BNX2_PORT_FEATURE_MBA_SETUP_PRO	0x40	bnx2.h
29600	BNX2_PORT_FEATURE_MBA_HOTKEY_CT	0	bnx2.h
29601	BNX2_PORT_FEATURE_MBA_HOTKEY_CT	0x80	bnx2.h
29602	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	8	bnx2.h
29603	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xff00	bnx2.h
29604	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0	bnx2.h
29605	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x100	bnx2.h
29606	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x200	bnx2.h
29607	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x300	bnx2.h
29608	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x400	bnx2.h
29609	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x500	bnx2.h
29610	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x600	bnx2.h
29611	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x700	bnx2.h
29612	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x800	bnx2.h
29613	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x900	bnx2.h
29614	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xa00	bnx2.h
29615	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xb00	bnx2.h
29616	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xc00	bnx2.h
29617	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xd00	bnx2.h
29618	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xe00	bnx2.h
29619	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xf00	bnx2.h
29620	BNX2_PORT_FEATURE_MBA_MSG_TIMEO	16	bnx2.h
29621	BNX2_PORT_FEATURE_MBA_MSG_TIMEO	0xf0000	bnx2.h
29622	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	20	bnx2.h
29623	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x300000	bnx2.h
29624	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0	bnx2.h
29625	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x100000	bnx2.h
29626	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x200000	bnx2.h
29627	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x300000	bnx2.h
29628	BNX2_PORT_FEATURE_IMD	0xe4	bnx2.h
29629	BNX2_PORT2_FEATURE_IMD	0x158	bnx2.h
29630	BNX2_PORT_FEATURE_IMD_LINK_OVER	0	bnx2.h
29631	BNX2_PORT_FEATURE_IMD_LINK_OVER	1	bnx2.h
29632	BNX2_PORT_FEATURE_VLAN	0xe8	bnx2.h
29633	BNX2_PORT2_FEATURE_VLAN	0x15c	bnx2.h
29634	BNX2_PORT_FEATURE_MBA_VLAN_TAG_	0xffff	bnx2.h
29635	BNX2_PORT_FEATURE_MBA_VLAN_ENAB	0x10000	bnx2.h
29636	BNX2_BC_STATE_RESET_TYPE	0x000001c0	bnx2.h
29637	BNX2_BC_STATE_RESET_TYPE_SIG	0x00005254	bnx2.h
29638	BNX2_BC_STATE_RESET_TYPE_SIG_MA	0x0000ffff	bnx2.h
29639	BNX2_BC_STATE_RESET_TYPE_NONE	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00010000)	bnx2.h
29640	BNX2_BC_STATE_RESET_TYPE_PCI	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00020000)	bnx2.h
29641	BNX2_BC_STATE_RESET_TYPE_VAUX	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00030000)	bnx2.h
29642	BNX2_BC_STATE_RESET_TYPE_DRV_MA	DRV_MSG_CODE	bnx2.h
29643	BNX2_BC_STATE_RESET_TYPE_DRV_RE	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_RESET)	bnx2.h
29644	BNX2_BC_STATE_RESET_TYPE_DRV_UN	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_UNLOAD)	bnx2.h
29645	BNX2_BC_STATE_RESET_TYPE_DRV_SH	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_SHUTDOWN)	bnx2.h
29646	BNX2_BC_STATE_RESET_TYPE_DRV_WO	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_WOL)	bnx2.h
29647	BNX2_BC_STATE_RESET_TYPE_DRV_DI	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_DIAG)	bnx2.h
29648	BNX2_BC_STATE	0x000001c4	bnx2.h
29649	BNX2_BC_STATE_ERR_MASK	0x0000ff00	bnx2.h
29650	BNX2_BC_STATE_SIGN	0x42530000	bnx2.h
29651	BNX2_BC_STATE_SIGN_MASK	0xffff0000	bnx2.h
29652	BNX2_BC_STATE_BC1_START	(BNX2_BC_STATE_SIGN \| 0x1)	bnx2.h
29653	BNX2_BC_STATE_GET_NVM_CFG1	(BNX2_BC_STATE_SIGN \| 0x2)	bnx2.h
29654	BNX2_BC_STATE_PROG_BAR	(BNX2_BC_STATE_SIGN \| 0x3)	bnx2.h
29655	BNX2_BC_STATE_INIT_VID	(BNX2_BC_STATE_SIGN \| 0x4)	bnx2.h
29656	BNX2_BC_STATE_GET_NVM_CFG2	(BNX2_BC_STATE_SIGN \| 0x5)	bnx2.h
29657	BNX2_BC_STATE_APPLY_WKARND	(BNX2_BC_STATE_SIGN \| 0x6)	bnx2.h
29658	BNX2_BC_STATE_LOAD_BC2	(BNX2_BC_STATE_SIGN \| 0x7)	bnx2.h
29659	BNX2_BC_STATE_GOING_BC2	(BNX2_BC_STATE_SIGN \| 0x8)	bnx2.h
29660	BNX2_BC_STATE_GOING_DIAG	(BNX2_BC_STATE_SIGN \| 0x9)	bnx2.h
29661	BNX2_BC_STATE_RT_FINAL_INIT	(BNX2_BC_STATE_SIGN \| 0x81)	bnx2.h
29662	BNX2_BC_STATE_RT_WKARND	(BNX2_BC_STATE_SIGN \| 0x82)	bnx2.h
29663	BNX2_BC_STATE_RT_DRV_PULSE	(BNX2_BC_STATE_SIGN \| 0x83)	bnx2.h
29664	BNX2_BC_STATE_RT_FIOEVTS	(BNX2_BC_STATE_SIGN \| 0x84)	bnx2.h
29665	BNX2_BC_STATE_RT_DRV_CMD	(BNX2_BC_STATE_SIGN \| 0x85)	bnx2.h
29666	BNX2_BC_STATE_RT_LOW_POWER	(BNX2_BC_STATE_SIGN \| 0x86)	bnx2.h
29667	BNX2_BC_STATE_RT_SET_WOL	(BNX2_BC_STATE_SIGN \| 0x87)	bnx2.h
29668	BNX2_BC_STATE_RT_OTHER_FW	(BNX2_BC_STATE_SIGN \| 0x88)	bnx2.h
29669	BNX2_BC_STATE_RT_GOING_D3	(BNX2_BC_STATE_SIGN \| 0x89)	bnx2.h
29670	BNX2_BC_STATE_ERR_BAD_VERSION	(BNX2_BC_STATE_SIGN \| 0x0100)	bnx2.h
29671	BNX2_BC_STATE_ERR_BAD_BC2_CRC	(BNX2_BC_STATE_SIGN \| 0x0200)	bnx2.h
29672	BNX2_BC_STATE_ERR_BC1_LOOP	(BNX2_BC_STATE_SIGN \| 0x0300)	bnx2.h
29673	BNX2_BC_STATE_ERR_UNKNOWN_CMD	(BNX2_BC_STATE_SIGN \| 0x0400)	bnx2.h
29674	BNX2_BC_STATE_ERR_DRV_DEAD	(BNX2_BC_STATE_SIGN \| 0x0500)	bnx2.h
29675	BNX2_BC_STATE_ERR_NO_RXP	(BNX2_BC_STATE_SIGN \| 0x0600)	bnx2.h
29676	BNX2_BC_STATE_ERR_TOO_MANY_RBUF	(BNX2_BC_STATE_SIGN \| 0x0700)	bnx2.h
29677	BNX2_BC_STATE_DEBUG_CMD	0x1dc	bnx2.h
29678	BNX2_BC_STATE_BC_DBG_CMD_SIGNAT	0x42440000	bnx2.h
29679	BNX2_BC_STATE_BC_DBG_CMD_SIGNAT	0xffff0000	bnx2.h
29680	BNX2_BC_STATE_BC_DBG_CMD_LOOP_C	0xffff	bnx2.h
29681	BNX2_BC_STATE_BC_DBG_CMD_LOOP_I	0xffff	bnx2.h
29682	HOST_VIEW_SHMEM_BASE	0x167c00	bnx2.h
29683	AUTONEG_DISABLE	0x00	bnx2.h
29684	AUTONEG_ENABLE	0x01	bnx2.h
29685	RX_OFFSET	(sizeof(struct l2_fhdr) + 2)	bnx2.h
29686	RX_BUF_CNT	20	bnx2.h
29687	RX_BUF_USE_SIZE	(ETH_MAX_MTU + ETH_HLEN + RX_OFFSET + 8)	bnx2.h
29688	RX_BUF_SIZE	(L1_CACHE_ALIGN(RX_BUF_USE_SIZE + 8))	bnx2.h
29689	PP_ChipID	0x0000	cs89x0.h	offset 0h -> Corp -ID
29690	PP_ISAIOB	0x0020	cs89x0.h	IO base address
29691	PP_CS8900_ISAINT	0x0022	cs89x0.h	ISA interrupt select
29692	PP_CS8920_ISAINT	0x0370	cs89x0.h	ISA interrupt select
29693	PP_CS8900_ISADMA	0x0024	cs89x0.h	ISA Rec DMA channel
29694	PP_CS8920_ISADMA	0x0374	cs89x0.h	ISA Rec DMA channel
29695	PP_ISASOF	0x0026	cs89x0.h	ISA DMA offset
29696	PP_DmaFrameCnt	0x0028	cs89x0.h	ISA DMA Frame count
29697	PP_DmaByteCnt	0x002A	cs89x0.h	ISA DMA Byte count
29698	PP_CS8900_ISAMemB	0x002C	cs89x0.h	Memory base
29699	PP_CS8920_ISAMemB	0x0348	cs89x0.h
29700	PP_ISABootBase	0x0030	cs89x0.h	Boot Prom base
29701	PP_ISABootMask	0x0034	cs89x0.h	Boot Prom Mask
29702	PP_EECMD	0x0040	cs89x0.h	NVR Interface Command register
29703	PP_EEData	0x0042	cs89x0.h	NVR Interface Data Register
29704	PP_DebugReg	0x0044	cs89x0.h	Debug Register
29705	PP_RxCFG	0x0102	cs89x0.h	Rx Bus config
29706	PP_RxCTL	0x0104	cs89x0.h	Receive Control Register
29707	PP_TxCFG	0x0106	cs89x0.h	Transmit Config Register
29708	PP_TxCMD	0x0108	cs89x0.h	Transmit Command Register
29709	PP_BufCFG	0x010A	cs89x0.h	Bus configuration Register
29710	PP_LineCTL	0x0112	cs89x0.h	Line Config Register
29711	PP_SelfCTL	0x0114	cs89x0.h	Self Command Register
29712	PP_BusCTL	0x0116	cs89x0.h	ISA bus control Register
29713	PP_TestCTL	0x0118	cs89x0.h	Test Register
29714	PP_AutoNegCTL	0x011C	cs89x0.h	Auto Negotiation Ctrl
29715	PP_ISQ	0x0120	cs89x0.h	Interrupt Status
29716	PP_RxEvent	0x0124	cs89x0.h	Rx Event Register
29717	PP_TxEvent	0x0128	cs89x0.h	Tx Event Register
29718	PP_BufEvent	0x012C	cs89x0.h	Bus Event Register
29719	PP_RxMiss	0x0130	cs89x0.h	Receive Miss Count
29720	PP_TxCol	0x0132	cs89x0.h	Transmit Collision Count
29721	PP_LineST	0x0134	cs89x0.h	Line State Register
29722	PP_SelfST	0x0136	cs89x0.h	Self State register
29723	PP_BusST	0x0138	cs89x0.h	Bus Status
29724	PP_TDR	0x013C	cs89x0.h	Time Domain Reflectometry
29725	PP_AutoNegST	0x013E	cs89x0.h	Auto Neg Status
29726	PP_TxCommand	0x0144	cs89x0.h	Tx Command
29727	PP_TxLength	0x0146	cs89x0.h	Tx Length
29728	PP_LAF	0x0150	cs89x0.h	Hash Table
29729	PP_IA	0x0158	cs89x0.h	Physical Address Register
29730	PP_RxStatus	0x0400	cs89x0.h	Receive start of frame
29731	PP_RxLength	0x0402	cs89x0.h	Receive Length of frame
29732	PP_RxFrame	0x0404	cs89x0.h	Receive frame pointer
29733	PP_TxFrame	0x0A00	cs89x0.h	Transmit frame pointer
29734	DEFAULTIOBASE	0x0300	cs89x0.h
29735	FIRST_IO	0x020C	cs89x0.h	First I/O port to check
29736	LAST_IO	0x037C	cs89x0.h	Last I/O port to check (+10h)
29737	ADD_MASK	0x3000	cs89x0.h	Mask it use of the ADD_PORT register
29738	ADD_SIG	0x3000	cs89x0.h	Expected ID signature
29739	CHIP_EISA_ID_SIG	0x630E	cs89x0.h	Product ID Code for Crystal Chip (CS8900 spec 4.3)
29740	EISA_ID_SIG	0x4D24	cs89x0.h	IBM
29741	PART_NO_SIG	0x1010	cs89x0.h	IBM
29742	MONGOOSE_BIT	0x0000	cs89x0.h	IBM
29743	EISA_ID_SIG	0x630E	cs89x0.h	PnP Vendor ID (same as chip id for Crystal board)
29744	PART_NO_SIG	0x4000	cs89x0.h	ID code CS8920 board (PnP Vendor Product code)
29745	MONGOOSE_BIT	0x2000	cs89x0.h	PART_NO_SIG + MONGOOSE_BUT => ID of mongoose
29746	PRODUCT_ID_ADD	0x0002	cs89x0.h	Address of product ID
29747	REG_TYPE_MASK	0x001F	cs89x0.h
29748	ERSE_WR_ENBL	0x00F0	cs89x0.h
29749	ERSE_WR_DISABLE	0x0000	cs89x0.h
29750	RX_BUF_CFG	0x0003	cs89x0.h
29751	RX_CONTROL	0x0005	cs89x0.h
29752	TX_CFG	0x0007	cs89x0.h
29753	TX_COMMAND	0x0009	cs89x0.h
29754	BUF_CFG	0x000B	cs89x0.h
29755	LINE_CONTROL	0x0013	cs89x0.h
29756	SELF_CONTROL	0x0015	cs89x0.h
29757	BUS_CONTROL	0x0017	cs89x0.h
29758	TEST_CONTROL	0x0019	cs89x0.h
29759	RX_EVENT	0x0004	cs89x0.h
29760	TX_EVENT	0x0008	cs89x0.h
29761	BUF_EVENT	0x000C	cs89x0.h
29762	RX_MISS_COUNT	0x0010	cs89x0.h
29763	TX_COL_COUNT	0x0012	cs89x0.h
29764	LINE_STATUS	0x0014	cs89x0.h
29765	SELF_STATUS	0x0016	cs89x0.h
29766	BUS_STATUS	0x0018	cs89x0.h
29767	TDR	0x001C	cs89x0.h
29768	SKIP_1	0x0040	cs89x0.h
29769	RX_STREAM_ENBL	0x0080	cs89x0.h
29770	RX_OK_ENBL	0x0100	cs89x0.h
29771	RX_DMA_ONLY	0x0200	cs89x0.h
29772	AUTO_RX_DMA	0x0400	cs89x0.h
29773	BUFFER_CRC	0x0800	cs89x0.h
29774	RX_CRC_ERROR_ENBL	0x1000	cs89x0.h
29775	RX_RUNT_ENBL	0x2000	cs89x0.h
29776	RX_EXTRA_DATA_ENBL	0x4000	cs89x0.h
29777	RX_IA_HASH_ACCEPT	0x0040	cs89x0.h
29778	RX_PROM_ACCEPT	0x0080	cs89x0.h
29779	RX_OK_ACCEPT	0x0100	cs89x0.h
29780	RX_MULTCAST_ACCEPT	0x0200	cs89x0.h
29781	RX_IA_ACCEPT	0x0400	cs89x0.h
29782	RX_BROADCAST_ACCEPT	0x0800	cs89x0.h
29783	RX_BAD_CRC_ACCEPT	0x1000	cs89x0.h
29784	RX_RUNT_ACCEPT	0x2000	cs89x0.h
29785	RX_EXTRA_DATA_ACCEPT	0x4000	cs89x0.h
29786	RX_ALL_ACCEPT	(RX_PROM_ACCEPT\|RX_BAD_CRC_ACCEPT\|RX_RUNT_ACCEPT\|RX_EXTRA_DATA_ACCEPT)	cs89x0.h
29787	DEF_RX_ACCEPT	(RX_IA_ACCEPT \| RX_BROADCAST_ACCEPT \| RX_OK_ACCEPT)	cs89x0.h
29788	TX_LOST_CRS_ENBL	0x0040	cs89x0.h
29789	TX_SQE_ERROR_ENBL	0x0080	cs89x0.h
29790	TX_OK_ENBL	0x0100	cs89x0.h
29791	TX_LATE_COL_ENBL	0x0200	cs89x0.h
29792	TX_JBR_ENBL	0x0400	cs89x0.h
29793	TX_ANY_COL_ENBL	0x0800	cs89x0.h
29794	TX_16_COL_ENBL	0x8000	cs89x0.h
29795	TX_START_4_BYTES	0x0000	cs89x0.h
29796	TX_START_64_BYTES	0x0040	cs89x0.h
29797	TX_START_128_BYTES	0x0080	cs89x0.h
29798	TX_START_ALL_BYTES	0x00C0	cs89x0.h
29799	TX_FORCE	0x0100	cs89x0.h
29800	TX_ONE_COL	0x0200	cs89x0.h
29801	TX_TWO_PART_DEFF_DISABLE	0x0400	cs89x0.h
29802	TX_NO_CRC	0x1000	cs89x0.h
29803	TX_RUNT	0x2000	cs89x0.h
29804	GENERATE_SW_INTERRUPT	0x0040	cs89x0.h
29805	RX_DMA_ENBL	0x0080	cs89x0.h
29806	READY_FOR_TX_ENBL	0x0100	cs89x0.h
29807	TX_UNDERRUN_ENBL	0x0200	cs89x0.h
29808	RX_MISS_ENBL	0x0400	cs89x0.h
29809	RX_128_BYTE_ENBL	0x0800	cs89x0.h
29810	TX_COL_COUNT_OVRFLOW_ENBL	0x1000	cs89x0.h
29811	RX_MISS_COUNT_OVRFLOW_ENBL	0x2000	cs89x0.h
29812	RX_DEST_MATCH_ENBL	0x8000	cs89x0.h
29813	SERIAL_RX_ON	0x0040	cs89x0.h
29814	SERIAL_TX_ON	0x0080	cs89x0.h
29815	AUI_ONLY	0x0100	cs89x0.h
29816	AUTO_AUI_10BASET	0x0200	cs89x0.h
29817	MODIFIED_BACKOFF	0x0800	cs89x0.h
29818	NO_AUTO_POLARITY	0x1000	cs89x0.h
29819	TWO_PART_DEFDIS	0x2000	cs89x0.h
29820	LOW_RX_SQUELCH	0x4000	cs89x0.h
29821	POWER_ON_RESET	0x0040	cs89x0.h
29822	SW_STOP	0x0100	cs89x0.h
29823	SLEEP_ON	0x0200	cs89x0.h
29824	AUTO_WAKEUP	0x0400	cs89x0.h
29825	HCB0_ENBL	0x1000	cs89x0.h
29826	HCB1_ENBL	0x2000	cs89x0.h
29827	HCB0	0x4000	cs89x0.h
29828	HCB1	0x8000	cs89x0.h
29829	RESET_RX_DMA	0x0040	cs89x0.h
29830	MEMORY_ON	0x0400	cs89x0.h
29831	DMA_BURST_MODE	0x0800	cs89x0.h
29832	IO_CHANNEL_READY_ON	0x1000	cs89x0.h
29833	RX_DMA_SIZE_64K	0x2000	cs89x0.h
29834	ENABLE_IRQ	0x8000	cs89x0.h
29835	LINK_OFF	0x0080	cs89x0.h
29836	ENDEC_LOOPBACK	0x0200	cs89x0.h
29837	AUI_LOOPBACK	0x0400	cs89x0.h
29838	BACKOFF_OFF	0x0800	cs89x0.h
29839	FAST_TEST	0x8000	cs89x0.h
29840	RX_IA_HASHED	0x0040	cs89x0.h
29841	RX_DRIBBLE	0x0080	cs89x0.h
29842	RX_OK	0x0100	cs89x0.h
29843	RX_HASHED	0x0200	cs89x0.h
29844	RX_IA	0x0400	cs89x0.h
29845	RX_BROADCAST	0x0800	cs89x0.h
29846	RX_CRC_ERROR	0x1000	cs89x0.h
29847	RX_RUNT	0x2000	cs89x0.h
29848	RX_EXTRA_DATA	0x4000	cs89x0.h
29849	HASH_INDEX_MASK	0x0FC00	cs89x0.h
29850	TX_LOST_CRS	0x0040	cs89x0.h
29851	TX_SQE_ERROR	0x0080	cs89x0.h
29852	TX_OK	0x0100	cs89x0.h
29853	TX_LATE_COL	0x0200	cs89x0.h
29854	TX_JBR	0x0400	cs89x0.h
29855	TX_16_COL	0x8000	cs89x0.h
29856	TX_SEND_OK_BITS	(TX_OK\|TX_LOST_CRS)	cs89x0.h
29857	TX_COL_COUNT_MASK	0x7800	cs89x0.h
29858	SW_INTERRUPT	0x0040	cs89x0.h
29859	RX_DMA	0x0080	cs89x0.h
29860	READY_FOR_TX	0x0100	cs89x0.h
29861	TX_UNDERRUN	0x0200	cs89x0.h
29862	RX_MISS	0x0400	cs89x0.h
29863	RX_128_BYTE	0x0800	cs89x0.h
29864	TX_COL_OVRFLW	0x1000	cs89x0.h
29865	RX_MISS_OVRFLW	0x2000	cs89x0.h
29866	RX_DEST_MATCH	0x8000	cs89x0.h
29867	LINK_OK	0x0080	cs89x0.h
29868	AUI_ON	0x0100	cs89x0.h
29869	TENBASET_ON	0x0200	cs89x0.h
29870	POLARITY_OK	0x1000	cs89x0.h
29871	CRS_OK	0x4000	cs89x0.h
29872	ACTIVE_33V	0x0040	cs89x0.h
29873	INIT_DONE	0x0080	cs89x0.h
29874	SI_BUSY	0x0100	cs89x0.h
29875	EEPROM_PRESENT	0x0200	cs89x0.h
29876	EEPROM_OK	0x0400	cs89x0.h
29877	EL_PRESENT	0x0800	cs89x0.h
29878	EE_SIZE_64	0x1000	cs89x0.h
29879	TX_BID_ERROR	0x0080	cs89x0.h
29880	READY_FOR_TX_NOW	0x0100	cs89x0.h
29881	RE_NEG_NOW	0x0040	cs89x0.h
29882	ALLOW_FDX	0x0080	cs89x0.h
29883	AUTO_NEG_ENABLE	0x0100	cs89x0.h
29884	NLP_ENABLE	0x0200	cs89x0.h
29885	FORCE_FDX	0x8000	cs89x0.h
29886	AUTO_NEG_BITS	(FORCE_FDX\|NLP_ENABLE\|AUTO_NEG_ENABLE)	cs89x0.h
29887	AUTO_NEG_MASK	(FORCE_FDX\|NLP_ENABLE\|AUTO_NEG_ENABLE\|ALLOW_FDX\|RE_NEG_NOW)	cs89x0.h
29888	AUTO_NEG_BUSY	0x0080	cs89x0.h
29889	FLP_LINK	0x0100	cs89x0.h
29890	FLP_LINK_GOOD	0x0800	cs89x0.h
29891	LINK_FAULT	0x1000	cs89x0.h
29892	HDX_ACTIVE	0x4000	cs89x0.h
29893	FDX_ACTIVE	0x8000	cs89x0.h
29894	ISQ_RECEIVER_EVENT	0x04	cs89x0.h
29895	ISQ_TRANSMITTER_EVENT	0x08	cs89x0.h
29896	ISQ_BUFFER_EVENT	0x0c	cs89x0.h
29897	ISQ_RX_MISS_EVENT	0x10	cs89x0.h
29898	ISQ_TX_COL_EVENT	0x12	cs89x0.h
29899	ISQ_EVENT_MASK	0x003F	cs89x0.h	ISQ mask to find out type of event
29900	ISQ_HIST	16	cs89x0.h	small history buffer
29901	AUTOINCREMENT	0x8000	cs89x0.h	Bit mask to set bit-15 for autoincrement
29902	TXRXBUFSIZE	0x0600	cs89x0.h
29903	RXDMABUFSIZE	0x8000	cs89x0.h
29904	RXDMASIZE	0x4000	cs89x0.h
29905	TXRX_LENGTH_MASK	0x07FF	cs89x0.h
29906	RCV_WITH_RXON	1	cs89x0.h	Set SerRx ON
29907	RCV_COUNTS	2	cs89x0.h	Use Framecnt1
29908	RCV_PONG	4	cs89x0.h	Pong respondent
29909	RCV_DONG	8	cs89x0.h	Dong operation
29910	RCV_POLLING	0x10	cs89x0.h	Poll RxEvent
29911	RCV_ISQ	0x20	cs89x0.h	Use ISQ, int
29912	RCV_AUTO_DMA	0x100	cs89x0.h	Set AutoRxDMAE
29913	RCV_DMA	0x200	cs89x0.h	Set RxDMA only
29914	RCV_DMA_ALL	0x400	cs89x0.h	Copy all DMA'ed
29915	RCV_FIXED_DATA	0x800	cs89x0.h	Every frame same
29916	RCV_IO	0x1000	cs89x0.h	Use ISA IO only
29917	RCV_MEMORY	0x2000	cs89x0.h	Use ISA Memory
29918	RAM_SIZE	0x1000	cs89x0.h	The card has 4k bytes or RAM
29919	PKT_START	PP_TxFrame	cs89x0.h	Start of packet RAM
29920	RX_FRAME_PORT	0x0000	cs89x0.h
29921	TX_FRAME_PORT	RX_FRAME_PORT	cs89x0.h
29922	TX_CMD_PORT	0x0004	cs89x0.h
29923	TX_NOW	0x0000	cs89x0.h	Tx packet after 5 bytes copied
29924	TX_AFTER_381	0x0020	cs89x0.h	Tx packet after 381 bytes copied
29925	TX_AFTER_ALL	0x00C0	cs89x0.h	Tx packet after all bytes copied
29926	TX_LEN_PORT	0x0006	cs89x0.h
29927	ISQ_PORT	0x0008	cs89x0.h
29928	ADD_PORT	0x000A	cs89x0.h
29929	DATA_PORT	0x000C	cs89x0.h
29930	EEPROM_WRITE_EN	0x00F0	cs89x0.h
29931	EEPROM_WRITE_DIS	0x0000	cs89x0.h
29932	EEPROM_WRITE_CMD	0x0100	cs89x0.h
29933	EEPROM_READ_CMD	0x0200	cs89x0.h
29934	RBUF_EVENT_LOW	0	cs89x0.h	Low byte of RxEvent - status of received frame
29935	RBUF_EVENT_HIGH	1	cs89x0.h	High byte of RxEvent - status of received frame
29936	RBUF_LEN_LOW	2	cs89x0.h	Length of received data - low byte
29937	RBUF_LEN_HI	3	cs89x0.h	Length of received data - high byte
29938	RBUF_HEAD_LEN	4	cs89x0.h	Length of this header
29939	CHIP_READ	0x1	cs89x0.h	Used to mark state of the repins code (chip or dma)
29940	DMA_READ	0x2	cs89x0.h	Used to mark state of the repins code (chip or dma)
29941	BIOS_START_SEG	0x00000	cs89x0.h
29942	BIOS_OFFSET_INC	0x0010	cs89x0.h
29943	BIOS_START_SEG	0x0c000	cs89x0.h
29944	BIOS_OFFSET_INC	0x0200	cs89x0.h
29945	BIOS_LAST_OFFSET	0x0fc00	cs89x0.h
29946	ISA_CNF_OFFSET	0x6	cs89x0.h
29947	TX_CTL_OFFSET	(ISA_CNF_OFFSET + 8)	cs89x0.h	8900 eeprom
29948	AUTO_NEG_CNF_OFFSET	(ISA_CNF_OFFSET + 8)	cs89x0.h	8920 eeprom
29949	EE_FORCE_FDX	0x8000	cs89x0.h
29950	EE_NLP_ENABLE	0x0200	cs89x0.h
29951	EE_AUTO_NEG_ENABLE	0x0100	cs89x0.h
29952	EE_ALLOW_FDX	0x0080	cs89x0.h
29953	EE_AUTO_NEG_CNF_MASK	(EE_FORCE_FDX\|EE_NLP_ENABLE\|EE_AUTO_NEG_ENABLE\|EE_ALLOW_FDX)	cs89x0.h
29954	IMM_BIT	0x0040	cs89x0.h	ignore missing media
29955	ADAPTER_CNF_OFFSET	(AUTO_NEG_CNF_OFFSET + 2)	cs89x0.h
29956	A_CNF_10B_T	0x0001	cs89x0.h
29957	A_CNF_AUI	0x0002	cs89x0.h
29958	A_CNF_10B_2	0x0004	cs89x0.h
29959	A_CNF_MEDIA_TYPE	0x0060	cs89x0.h
29960	A_CNF_MEDIA_AUTO	0x0000	cs89x0.h
29961	A_CNF_MEDIA_10B_T	0x0020	cs89x0.h
29962	A_CNF_MEDIA_AUI	0x0040	cs89x0.h
29963	A_CNF_MEDIA_10B_2	0x0060	cs89x0.h
29964	A_CNF_DC_DC_POLARITY	0x0080	cs89x0.h
29965	A_CNF_NO_AUTO_POLARITY	0x2000	cs89x0.h
29966	A_CNF_LOW_RX_SQUELCH	0x4000	cs89x0.h
29967	A_CNF_EXTND_10B_2	0x8000	cs89x0.h
29968	PACKET_PAGE_OFFSET	0x8	cs89x0.h
29969	INT_NO_MASK	0x000F	cs89x0.h
29970	DMA_NO_MASK	0x0070	cs89x0.h
29971	ISA_DMA_SIZE	0x0200	cs89x0.h
29972	ISA_AUTO_RxDMA	0x0400	cs89x0.h
29973	ISA_RxDMA	0x0800	cs89x0.h
29974	DMA_BURST	0x1000	cs89x0.h
29975	STREAM_TRANSFER	0x2000	cs89x0.h
29976	ANY_ISA_DMA	(ISA_AUTO_RxDMA \| ISA_RxDMA)	cs89x0.h
29977	DMA_BASE	0x00	cs89x0.h	DMA controller base
29978	DMA_BASE_2	0x0C0	cs89x0.h	DMA controller base
29979	DMA_STAT	0x0D0	cs89x0.h	DMA controller status register
29980	DMA_MASK	0x0D4	cs89x0.h	DMA controller mask register
29981	DMA_MODE	0x0D6	cs89x0.h	DMA controller mode register
29982	DMA_RESETFF	0x0D8	cs89x0.h	DMA controller first/last flip flop
29983	DMA_DISABLE	0x04	cs89x0.h	Disable channel n
29984	DMA_ENABLE	0x00	cs89x0.h	Enable channel n
29985	DMA_RX_MODE	0x14	cs89x0.h
29986	DMA_TX_MODE	0x18	cs89x0.h
29987	DMA_SIZE	(16*1024)	cs89x0.h	Size of dma buffer - 16k
29988	CS8900	0x0000	cs89x0.h
29989	CS8920	0x4000	cs89x0.h
29990	CS8920M	0x6000	cs89x0.h
29991	REVISON_BITS	0x1F00	cs89x0.h
29992	EEVER_NUMBER	0x12	cs89x0.h
29993	CHKSUM_LEN	0x14	cs89x0.h
29994	CHKSUM_VAL	0x0000	cs89x0.h
29995	START_EEPROM_DATA	0x001c	cs89x0.h	Offset into eeprom for start of data
29996	IRQ_MAP_EEPROM_DATA	0x0046	cs89x0.h	Offset into eeprom for the IRQ map
29997	IRQ_MAP_LEN	0x0004	cs89x0.h	No of bytes to read for the IRQ map
29998	PNP_IRQ_FRMT	0x0022	cs89x0.h	PNP small item IRQ format
29999	CS8900_IRQ_MAP	0x1c20	cs89x0.h	This IRQ map is fixed
30000	CS8920_NO_INTS	0x0F	cs89x0.h	Max CS8920 interrupt select #
30001	PNP_ADD_PORT	0x0279	cs89x0.h
30002	PNP_WRITE_PORT	0x0A79	cs89x0.h
30003	GET_PNP_ISA_STRUCT	0x40	cs89x0.h
30004	PNP_ISA_STRUCT_LEN	0x06	cs89x0.h
30005	PNP_CSN_CNT_OFF	0x01	cs89x0.h
30006	PNP_RD_PORT_OFF	0x02	cs89x0.h
30007	PNP_FUNCTION_OK	0x00	cs89x0.h
30008	PNP_WAKE	0x03	cs89x0.h
30009	PNP_RSRC_DATA	0x04	cs89x0.h
30010	PNP_RSRC_READY	0x01	cs89x0.h
30011	PNP_STATUS	0x05	cs89x0.h
30012	PNP_ACTIVATE	0x30	cs89x0.h
30013	PNP_CNF_IO_H	0x60	cs89x0.h
30014	PNP_CNF_IO_L	0x61	cs89x0.h
30015	PNP_CNF_INT	0x70	cs89x0.h
30016	PNP_CNF_DMA	0x74	cs89x0.h
30017	PNP_CNF_MEM	0x48	cs89x0.h
30018	BIT0	1	cs89x0.h
30019	BIT15	0x8000	cs89x0.h
30020	CONGENB	0	eepro100.h	Enable congestion control in the DP83840.
30021	TX_FIFO	8	eepro100.h	Tx FIFO threshold in 4 byte units, 0-15
30022	RX_FIFO	8	eepro100.h	Rx FIFO threshold, default 32 bytes.
30023	TX_DMA_COUNT	0	eepro100.h	Tx DMA burst length, 0-127, default 0.
30024	RX_DMA_COUNT	0	eepro100.h	Rx DMA length, 0 means no preemption.
30025	CU_CMD_TIMEOUT	1000	eepro100.h	CU command accept timeout in microseconds
30026	LINK_CHECK_PERIOD	1000	eepro100.h	# of poll() calls between link checks
30027	RFD_PACKET_LEN	1518	eepro100.h
30028	RFD_IOB_LEN	1536	eepro100.h
30029	RFD_HEADER_LEN	16	eepro100.h
30030	CB_ALIGN	2	eepro100.h	Alignment of command blocks
30031	RFD_COUNT	4	eepro100.h
30032	TCB_COUNT	4	eepro100.h
30033	RX_RING_BYTES	( RFD_COUNT * sizeof ( struct ifec_rfd ) )	eepro100.h
30034	TX_RING_BYTES	( TCB_COUNT * sizeof ( struct ifec_tcb ) )	eepro100.h
30035	EEPROM_ADDR_MAC_0	0	eepro100.h
30036	EEPROM_ADDR_MDIO_REGISTER	6	eepro100.h
30037	EE_SHIFT_CLK	0x01	eepro100.h	EEPROM shift clock.
30038	EE_CS	0x02	eepro100.h	EEPROM chip select.
30039	EE_DATA_WRITE	0x04	eepro100.h	EEPROM chip data in.
30040	EE_DATA_READ	0x08	eepro100.h	EEPROM chip data out.
30041	EE_ENB	( 0x4800 \| EE_CS )	eepro100.h
30042	PCI_VENDOR_SMC	0x10B8	epic100.h
30043	PCI_DEVICE_SMC_EPIC100	0x0005	epic100.h
30044	PCI_DEVICE_ID_NONE	0xFFFF	epic100.h
30045	CR_STOP_RX	(0x00000001)	epic100.h
30046	CR_START_RX	(0x00000002)	epic100.h
30047	CR_QUEUE_TX	(0x00000004)	epic100.h
30048	CR_QUEUE_RX	(0x00000008)	epic100.h
30049	CR_NEXTFRAME	(0x00000010)	epic100.h
30050	CR_STOP_TX_DMA	(0x00000020)	epic100.h
30051	CR_STOP_RX_DMA	(0x00000040)	epic100.h
30052	CR_TX_UGO	(0x00000080)	epic100.h
30053	INTR_RX_THR_STA	(0x00400000)	epic100.h	rx copy threshold status NI
30054	INTR_RX_BUFF_EMPTY	(0x00200000)	epic100.h	rx buffers empty. NI
30055	INTR_TX_IN_PROG	(0x00100000)	epic100.h	tx copy in progess. NI
30056	INTR_RX_IN_PROG	(0x00080000)	epic100.h	rx copy in progress. NI
30057	INTR_TXIDLE	(0x00040000)	epic100.h	tx idle. NI
30058	INTR_RXIDLE	(0x00020000)	epic100.h	rx idle. NI
30059	INTR_INTR_ACTIVE	(0x00010000)	epic100.h	Interrupt active. NI
30060	INTR_RX_STATUS_OK	(0x00008000)	epic100.h	rx status valid. NI
30061	INTR_PCI_TGT_ABT	(0x00004000)	epic100.h	PCI Target abort
30062	INTR_PCI_MASTER_ABT	(0x00002000)	epic100.h	PCI Master abort
30063	INTR_PCI_PARITY_ERR	(0x00001000)	epic100.h	PCI adress parity error
30064	INTR_PCI_DATA_ERR	(0x00000800)	epic100.h	PCI data parity error
30065	INTR_RX_THR_CROSSED	(0x00000400)	epic100.h	rx copy threshold crossed
30066	INTR_CNTFULL	(0x00000200)	epic100.h	Counter overflow
30067	INTR_TXUNDERRUN	(0x00000100)	epic100.h	tx underrun.
30068	INTR_TXEMPTY	(0x00000080)	epic100.h	tx queue empty
30069	INTR_TX_CH_COMPLETE	(0x00000040)	epic100.h	tx chain complete
30070	INTR_TXDONE	(0x00000020)	epic100.h	tx complete (w or w/o err)
30071	INTR_RXERROR	(0x00000010)	epic100.h	rx error (CRC)
30072	INTR_RXOVERFLOW	(0x00000008)	epic100.h	rx buffer overflow
30073	INTR_RX_QUEUE_EMPTY	(0x00000004)	epic100.h	rx queue empty.
30074	INTR_RXHEADER	(0x00000002)	epic100.h	header copy complete
30075	INTR_RXDONE	(0x00000001)	epic100.h	Receive copy complete
30076	INTR_CLEARINTR	(0x00007FFF)	epic100.h
30077	INTR_VALIDBITS	(0x007FFFFF)	epic100.h
30078	INTR_DISABLE	(0x00000000)	epic100.h
30079	INTR_CLEARERRS	(0x00007F18)	epic100.h
30080	INTR_ABNINTR	(INTR_CNTFULL \| INTR_TXUNDERRUN \| INTR_RXOVERFLOW)	epic100.h
30081	GC_SOFT_RESET	(0x00000001)	epic100.h
30082	GC_INTR_ENABLE	(0x00000002)	epic100.h
30083	GC_SOFT_INTR	(0x00000004)	epic100.h
30084	GC_POWER_DOWN	(0x00000008)	epic100.h
30085	GC_ONE_COPY	(0x00000010)	epic100.h
30086	GC_BIG_ENDIAN	(0x00000020)	epic100.h
30087	GC_RX_PREEMPT_TX	(0x00000040)	epic100.h
30088	GC_TX_PREEMPT_RX	(0x00000080)	epic100.h
30089	GC_RX_FIFO_THR_32	(0x00000000)	epic100.h
30090	GC_RX_FIFO_THR_64	(0x00000100)	epic100.h
30091	GC_RX_FIFO_THR_96	(0x00000200)	epic100.h
30092	GC_RX_FIFO_THR_128	(0x00000300)	epic100.h
30093	GC_MRC_MEM_READ	(0x00000000)	epic100.h
30094	GC_MRC_READ_MULT	(0x00000400)	epic100.h
30095	GC_MRC_READ_LINE	(0x00000800)	epic100.h
30096	GC_SOFTBIT0	(0x00001000)	epic100.h
30097	GC_SOFTBIT1	(0x00002000)	epic100.h
30098	GC_RESET_PHY	(0x00004000)	epic100.h
30099	RC_SAVE_ERRORED_PKT	(0x00000001)	epic100.h
30100	RC_SAVE_RUNT_FRAMES	(0x00000002)	epic100.h
30101	RC_RCV_BROADCAST	(0x00000004)	epic100.h
30102	RC_RCV_MULTICAST	(0x00000008)	epic100.h
30103	RC_RCV_INVERSE_PKT	(0x00000010)	epic100.h
30104	RC_PROMISCUOUS_MODE	(0x00000020)	epic100.h
30105	RC_MONITOR_MODE	(0x00000040)	epic100.h
30106	RC_EARLY_RCV_ENABLE	(0x00000080)	epic100.h
30107	RD_FRAGLIST	(0x0001)	epic100.h	Desc points to a fragment list
30108	RD_LLFORM	(0x0002)	epic100.h	Frag list format
30109	RD_HDR_CPY	(0x0004)	epic100.h	Desc used for header copy
30110	TC_EARLY_TX_ENABLE	(0x00000001)	epic100.h
30111	TC_LM_NORMAL	(0x00000000)	epic100.h
30112	TC_LM_INTERNAL	(0x00000002)	epic100.h
30113	TC_LM_EXTERNAL	(0x00000004)	epic100.h
30114	TC_LM_FULL_DPX	(0x00000006)	epic100.h
30115	TX_SLOT_TIME	(0x00000078)	epic100.h
30116	TX_FIFO_THRESH	128	epic100.h	Rounded down to 4 byte units.
30117	RRING_PKT_INTACT	(0x0001)	epic100.h
30118	RRING_ALIGN_ERR	(0x0002)	epic100.h
30119	RRING_CRC_ERR	(0x0004)	epic100.h
30120	RRING_MISSED_PKT	(0x0008)	epic100.h
30121	RRING_MULTICAST	(0x0010)	epic100.h
30122	RRING_BROADCAST	(0x0020)	epic100.h
30123	RRING_RECEIVER_DISABLE	(0x0040)	epic100.h
30124	RRING_STATUS_VALID	(0x1000)	epic100.h
30125	RRING_FRAGLIST_ERR	(0x2000)	epic100.h
30126	RRING_HDR_COPIED	(0x4000)	epic100.h
30127	RRING_OWN	(0x8000)	epic100.h
30128	RRING_ERROR	(RRING_ALIGN_ERR\|RRING_CRC_ERR)	epic100.h
30129	TRING_PKT_INTACT	(0x0001)	epic100.h	pkt transmitted.
30130	TRING_PKT_NONDEFER	(0x0002)	epic100.h	pkt xmitted w/o deferring
30131	TRING_COLL	(0x0004)	epic100.h	pkt xmitted w collisions
30132	TRING_CARR	(0x0008)	epic100.h	carrier sense lost
30133	TRING_UNDERRUN	(0x0010)	epic100.h	DMA underrun
30134	TRING_HB_COLL	(0x0020)	epic100.h	Collision detect Heartbeat
30135	TRING_WIN_COLL	(0x0040)	epic100.h	out of window collision
30136	TRING_DEFERRED	(0x0080)	epic100.h	Deferring
30137	TRING_COLL_COUNT	(0x0F00)	epic100.h	collision counter (mask)
30138	TRING_COLL_EXCESS	(0x1000)	epic100.h	tx aborted: excessive colls
30139	TRING_OWN	(0x8000)	epic100.h	desc ownership bit
30140	TRING_ABORT	(TRING_COLL_EXCESS\|TRING_WIN_COLL\|TRING_UNDERRUN)	epic100.h
30141	TRING_ERROR	(TRING_DEFERRED\|TRING_WIN_COLL\|TRING_UNDERRUN\|TRING_CARR )	epic100.h	\|TRING_COLL
30142	TD_FRAGLIST	(0x0001)	epic100.h	Desc points to a fragment list
30143	TD_LLFORM	(0x0002)	epic100.h	Frag list format
30144	TD_IAF	(0x0004)	epic100.h	Generate Interrupt after tx
30145	TD_NOCRC	(0x0008)	epic100.h	No CRC generated
30146	TD_LASTDESC	(0x0010)	epic100.h	Last desc for this frame
30147	EFAB_DUMMY_FIELD_LBN	0	etherfabric.h
30148	EFAB_DUMMY_FIELD_WIDTH	0	etherfabric.h
30149	EFAB_DWORD_0_LBN	0	etherfabric.h
30150	EFAB_DWORD_0_WIDTH	32	etherfabric.h
30151	EFAB_DWORD_1_LBN	32	etherfabric.h
30152	EFAB_DWORD_1_WIDTH	32	etherfabric.h
30153	EFAB_DWORD_2_LBN	64	etherfabric.h
30154	EFAB_DWORD_2_WIDTH	32	etherfabric.h
30155	EFAB_DWORD_3_LBN	96	etherfabric.h
30156	EFAB_DWORD_3_WIDTH	32	etherfabric.h
30157	EFAB_DWORD_FMT	"%08x"	etherfabric.h
30158	EFAB_QWORD_FMT	"%08x:%08x"	etherfabric.h
30159	EFAB_OWORD_FMT	"%08x:%08x:%08x:%08x"	etherfabric.h
30160	EFAB_OWORD_FIELD	EFAB_OWORD_FIELD64	etherfabric.h
30161	EFAB_QWORD_FIELD	EFAB_QWORD_FIELD64	etherfabric.h
30162	EFAB_OWORD_IS_ZERO	EFAB_OWORD_IS_ZERO64	etherfabric.h
30163	EFAB_QWORD_IS_ZERO	EFAB_QWORD_IS_ZERO64	etherfabric.h
30164	EFAB_OWORD_IS_ALL_ONES	EFAB_OWORD_IS_ALL_ONES64	etherfabric.h
30165	EFAB_QWORD_IS_ALL_ONES	EFAB_QWORD_IS_ALL_ONES64	etherfabric.h
30166	EFAB_OWORD_FIELD	EFAB_OWORD_FIELD32	etherfabric.h
30167	EFAB_QWORD_FIELD	EFAB_QWORD_FIELD32	etherfabric.h
30168	EFAB_OWORD_IS_ZERO	EFAB_OWORD_IS_ZERO32	etherfabric.h
30169	EFAB_QWORD_IS_ZERO	EFAB_QWORD_IS_ZERO32	etherfabric.h
30170	EFAB_OWORD_IS_ALL_ONES	EFAB_OWORD_IS_ALL_ONES32	etherfabric.h
30171	EFAB_QWORD_IS_ALL_ONES	EFAB_QWORD_IS_ALL_ONES32	etherfabric.h
30172	EFAB_POPULATE_OWORD	EFAB_POPULATE_OWORD64	etherfabric.h
30173	EFAB_POPULATE_QWORD	EFAB_POPULATE_QWORD64	etherfabric.h
30174	EFAB_POPULATE_OWORD	EFAB_POPULATE_OWORD32	etherfabric.h
30175	EFAB_POPULATE_QWORD	EFAB_POPULATE_QWORD32	etherfabric.h
30176	EFAB_POPULATE_OWORD_10	EFAB_POPULATE_OWORD	etherfabric.h
30177	EFAB_POPULATE_QWORD_10	EFAB_POPULATE_QWORD	etherfabric.h
30178	EFAB_POPULATE_DWORD_10	EFAB_POPULATE_DWORD	etherfabric.h
30179	EFAB_SET_OWORD_FIELD	EFAB_SET_OWORD_FIELD64	etherfabric.h
30180	EFAB_SET_QWORD_FIELD	EFAB_SET_QWORD_FIELD64	etherfabric.h
30181	EFAB_SET_OWORD_FIELD	EFAB_SET_OWORD_FIELD32	etherfabric.h
30182	EFAB_SET_QWORD_FIELD	EFAB_SET_QWORD_FIELD32	etherfabric.h
30183	DMA_ADDR_T_WIDTH	( 8 * sizeof ( dma_addr_t ) )	etherfabric.h
30184	EFAB_DMA_MAX_MASK	( ( DMA_ADDR_T_WIDTH == 64 ) ? \ ~( ( uint64_t ) 0 ) : ~( ( uint32_t ) 0 ) )	etherfabric.h
30185	dma_addr_t	unsigned long	etherfabric_nic.h
30186	EFAB_BUF_ALIGN	4096	etherfabric_nic.h
30187	EFAB_RXD_SIZE	512	etherfabric_nic.h
30188	EFAB_TXD_SIZE	512	etherfabric_nic.h
30189	EFAB_EVQ_SIZE	512	etherfabric_nic.h
30190	EFAB_NUM_RX_DESC	16	etherfabric_nic.h
30191	EFAB_RX_BUF_SIZE	1600	etherfabric_nic.h
30192	HFA384x_CMD_ALLOC_LEN_MIN	((UINT16)4)	hfa384x.h
30193	HFA384x_CMD_ALLOC_LEN_MAX	((UINT16)2400)	hfa384x.h
30194	HFA384x_BAP_DATALEN_MAX	((UINT16)4096)	hfa384x.h
30195	HFA384x_BAP_OFFSET_MAX	((UINT16)4096)	hfa384x.h
30196	HFA384x_PORTID_MAX	((UINT16)7)	hfa384x.h
30197	HFA384x_NUMPORTS_MAX	((UINT16)(HFA384x_PORTID_MAX+1))	hfa384x.h
30198	HFA384x_PDR_LEN_MAX	((UINT16)512)	hfa384x.h	in bytes, from EK
30199	HFA384x_PDA_RECS_MAX	((UINT16)200)	hfa384x.h	a guess
30200	HFA384x_PDA_LEN_MAX	((UINT16)1024)	hfa384x.h	in bytes, from EK
30201	HFA384x_SCANRESULT_MAX	((UINT16)31)	hfa384x.h
30202	HFA384x_HSCANRESULT_MAX	((UINT16)31)	hfa384x.h
30203	HFA384x_CHINFORESULT_MAX	((UINT16)16)	hfa384x.h
30204	HFA384x_DRVR_FIDSTACKLEN_MAX	(10)	hfa384x.h
30205	HFA384x_DRVR_TXBUF_MAX	(sizeof(hfa384x_tx_frame_t) + \ WLAN_DATA_MAXLEN - \ WLAN_WEP_IV_LEN - \ WLAN_WEP_ICV_LEN + 2)	hfa384x.h
30206	HFA384x_DRVR_MAGIC	(0x4a2d)	hfa384x.h
30207	HFA384x_INFODATA_MAXLEN	(sizeof(hfa384x_infodata_t))	hfa384x.h
30208	HFA384x_INFOFRM_MAXLEN	(sizeof(hfa384x_InfFrame_t))	hfa384x.h
30209	HFA384x_RID_GUESSING_MAXLEN	2048	hfa384x.h	I'm not really sure
30210	HFA384x_RIDDATA_MAXLEN	HFA384x_RID_GUESSING_MAXLEN	hfa384x.h
30211	HFA384x_USB_RWMEM_MAXLEN	2048	hfa384x.h
30212	HFA384x_BAP_PROC	((UINT16)0)	hfa384x.h
30213	HFA384x_BAP_INT	((UINT16)1)	hfa384x.h
30214	HFA384x_PORTTYPE_IBSS	((UINT16)0)	hfa384x.h
30215	HFA384x_PORTTYPE_BSS	((UINT16)1)	hfa384x.h
30216	HFA384x_PORTTYPE_WDS	((UINT16)2)	hfa384x.h
30217	HFA384x_PORTTYPE_PSUEDOIBSS	((UINT16)3)	hfa384x.h
30218	HFA384x_PORTTYPE_HOSTAP	((UINT16)6)	hfa384x.h
30219	HFA384x_WEPFLAGS_PRIVINVOKED	((UINT16)BIT0)	hfa384x.h
30220	HFA384x_WEPFLAGS_EXCLUDE	((UINT16)BIT1)	hfa384x.h
30221	HFA384x_WEPFLAGS_DISABLE_TXCRYP	((UINT16)BIT4)	hfa384x.h
30222	HFA384x_WEPFLAGS_DISABLE_RXCRYP	((UINT16)BIT7)	hfa384x.h
30223	HFA384x_WEPFLAGS_DISALLOW_MIXED	((UINT16)BIT11)	hfa384x.h
30224	HFA384x_WEPFLAGS_IV_INTERVAL1	((UINT16)0)	hfa384x.h
30225	HFA384x_WEPFLAGS_IV_INTERVAL10	((UINT16)BIT5)	hfa384x.h
30226	HFA384x_WEPFLAGS_IV_INTERVAL50	((UINT16)BIT6)	hfa384x.h
30227	HFA384x_WEPFLAGS_IV_INTERVAL100	((UINT16)(BIT5 \| BIT6))	hfa384x.h
30228	HFA384x_WEPFLAGS_FIRMWARE_WPA	((UINT16)BIT8)	hfa384x.h
30229	HFA384x_WEPFLAGS_HOST_MIC	((UINT16)BIT9)	hfa384x.h
30230	HFA384x_ROAMMODE_FWSCAN_FWROAM	((UINT16)1)	hfa384x.h
30231	HFA384x_ROAMMODE_FWSCAN_HOSTROA	((UINT16)2)	hfa384x.h
30232	HFA384x_ROAMMODE_HOSTSCAN_HOSTR	((UINT16)3)	hfa384x.h
30233	HFA384x_PORTSTATUS_DISABLED	((UINT16)1)	hfa384x.h
30234	HFA384x_PORTSTATUS_INITSRCH	((UINT16)2)	hfa384x.h
30235	HFA384x_PORTSTATUS_CONN_IBSS	((UINT16)3)	hfa384x.h
30236	HFA384x_PORTSTATUS_CONN_ESS	((UINT16)4)	hfa384x.h
30237	HFA384x_PORTSTATUS_OOR_ESS	((UINT16)5)	hfa384x.h
30238	HFA384x_PORTSTATUS_CONN_WDS	((UINT16)6)	hfa384x.h
30239	HFA384x_PORTSTATUS_HOSTAP	((UINT16)8)	hfa384x.h
30240	HFA384x_RATEBIT_1	((UINT16)1)	hfa384x.h
30241	HFA384x_RATEBIT_2	((UINT16)2)	hfa384x.h
30242	HFA384x_RATEBIT_5dot5	((UINT16)4)	hfa384x.h
30243	HFA384x_RATEBIT_11	((UINT16)8)	hfa384x.h
30244	HFA384x_TXCMD_NORECL	((UINT16)0)	hfa384x.h
30245	HFA384x_TXCMD_RECL	((UINT16)1)	hfa384x.h
30246	HFA384x_ADDR_AUX_OFF_MAX	((UINT16)0x007f)	hfa384x.h
30247	HFA384x_ADDR_FLAT_AUX_PAGE_MASK	(0x007fff80)	hfa384x.h
30248	HFA384x_ADDR_FLAT_AUX_OFF_MASK	(0x0000007f)	hfa384x.h
30249	HFA384x_ADDR_FLAT_CMD_PAGE_MASK	(0xffff0000)	hfa384x.h
30250	HFA384x_ADDR_FLAT_CMD_OFF_MASK	(0x0000ffff)	hfa384x.h
30251	HFA384x_ADDR_AUX_PAGE_MASK	(0xffff)	hfa384x.h
30252	HFA384x_ADDR_AUX_OFF_MASK	(0x007f)	hfa384x.h
30253	HFA384x_ADDR_CMD_PAGE_MASK	(0x007f)	hfa384x.h
30254	HFA384x_ADDR_CMD_OFF_MASK	(0xffff)	hfa384x.h
30255	HFA384x_AUX_CTL_EXTDS	(0x00)	hfa384x.h
30256	HFA384x_AUX_CTL_NV	(0x01)	hfa384x.h
30257	HFA384x_AUX_CTL_PHY	(0x02)	hfa384x.h
30258	HFA384x_AUX_CTL_ICSRAM	(0x03)	hfa384x.h
30259	HFA3842_PDA_BASE	(0x007f0000UL)	hfa384x.h
30260	HFA3841_PDA_BASE	(0x003f0000UL)	hfa384x.h
30261	HFA3841_PDA_BOGUS_BASE	(0x00390000UL)	hfa384x.h
30262	HFA384x_DLSTATE_DISABLED	0	hfa384x.h
30263	HFA384x_DLSTATE_RAMENABLED	1	hfa384x.h
30264	HFA384x_DLSTATE_FLASHENABLED	2	hfa384x.h
30265	HFA384x_DLSTATE_FLASHWRITTEN	3	hfa384x.h
30266	HFA384x_DLSTATE_FLASHWRITEPENDI	4	hfa384x.h
30267	HFA384x_DLSTATE_GENESIS	5	hfa384x.h
30268	HFA384x_CMD_OFF	(0x00)	hfa384x.h
30269	HFA384x_PARAM0_OFF	(0x02)	hfa384x.h
30270	HFA384x_PARAM1_OFF	(0x04)	hfa384x.h
30271	HFA384x_PARAM2_OFF	(0x06)	hfa384x.h
30272	HFA384x_STATUS_OFF	(0x08)	hfa384x.h
30273	HFA384x_RESP0_OFF	(0x0A)	hfa384x.h
30274	HFA384x_RESP1_OFF	(0x0C)	hfa384x.h
30275	HFA384x_RESP2_OFF	(0x0E)	hfa384x.h
30276	HFA384x_INFOFID_OFF	(0x10)	hfa384x.h
30277	HFA384x_RXFID_OFF	(0x20)	hfa384x.h
30278	HFA384x_ALLOCFID_OFF	(0x22)	hfa384x.h
30279	HFA384x_TXCOMPLFID_OFF	(0x24)	hfa384x.h
30280	HFA384x_SELECT0_OFF	(0x18)	hfa384x.h
30281	HFA384x_OFFSET0_OFF	(0x1C)	hfa384x.h
30282	HFA384x_DATA0_OFF	(0x36)	hfa384x.h
30283	HFA384x_SELECT1_OFF	(0x1A)	hfa384x.h
30284	HFA384x_OFFSET1_OFF	(0x1E)	hfa384x.h
30285	HFA384x_DATA1_OFF	(0x38)	hfa384x.h
30286	HFA384x_EVSTAT_OFF	(0x30)	hfa384x.h
30287	HFA384x_INTEN_OFF	(0x32)	hfa384x.h
30288	HFA384x_EVACK_OFF	(0x34)	hfa384x.h
30289	HFA384x_CONTROL_OFF	(0x14)	hfa384x.h
30290	HFA384x_SWSUPPORT0_OFF	(0x28)	hfa384x.h
30291	HFA384x_SWSUPPORT1_OFF	(0x2A)	hfa384x.h
30292	HFA384x_SWSUPPORT2_OFF	(0x2C)	hfa384x.h
30293	HFA384x_AUXPAGE_OFF	(0x3A)	hfa384x.h
30294	HFA384x_AUXOFFSET_OFF	(0x3C)	hfa384x.h
30295	HFA384x_AUXDATA_OFF	(0x3E)	hfa384x.h
30296	HFA384x_CMD_OFF	(0x00)	hfa384x.h
30297	HFA384x_PARAM0_OFF	(0x04)	hfa384x.h
30298	HFA384x_PARAM1_OFF	(0x08)	hfa384x.h
30299	HFA384x_PARAM2_OFF	(0x0c)	hfa384x.h
30300	HFA384x_STATUS_OFF	(0x10)	hfa384x.h
30301	HFA384x_RESP0_OFF	(0x14)	hfa384x.h
30302	HFA384x_RESP1_OFF	(0x18)	hfa384x.h
30303	HFA384x_RESP2_OFF	(0x1c)	hfa384x.h
30304	HFA384x_INFOFID_OFF	(0x20)	hfa384x.h
30305	HFA384x_RXFID_OFF	(0x40)	hfa384x.h
30306	HFA384x_ALLOCFID_OFF	(0x44)	hfa384x.h
30307	HFA384x_TXCOMPLFID_OFF	(0x48)	hfa384x.h
30308	HFA384x_SELECT0_OFF	(0x30)	hfa384x.h
30309	HFA384x_OFFSET0_OFF	(0x38)	hfa384x.h
30310	HFA384x_DATA0_OFF	(0x6c)	hfa384x.h
30311	HFA384x_SELECT1_OFF	(0x34)	hfa384x.h
30312	HFA384x_OFFSET1_OFF	(0x3c)	hfa384x.h
30313	HFA384x_DATA1_OFF	(0x70)	hfa384x.h
30314	HFA384x_EVSTAT_OFF	(0x60)	hfa384x.h
30315	HFA384x_INTEN_OFF	(0x64)	hfa384x.h
30316	HFA384x_EVACK_OFF	(0x68)	hfa384x.h
30317	HFA384x_CONTROL_OFF	(0x28)	hfa384x.h
30318	HFA384x_SWSUPPORT0_OFF	(0x50)	hfa384x.h
30319	HFA384x_SWSUPPORT1_OFF	(0x54)	hfa384x.h
30320	HFA384x_SWSUPPORT2_OFF	(0x58)	hfa384x.h
30321	HFA384x_AUXPAGE_OFF	(0x74)	hfa384x.h
30322	HFA384x_AUXOFFSET_OFF	(0x78)	hfa384x.h
30323	HFA384x_AUXDATA_OFF	(0x7c)	hfa384x.h
30324	HFA384x_PCICOR_OFF	(0x4c)	hfa384x.h
30325	HFA384x_PCIHCR_OFF	(0x5c)	hfa384x.h
30326	HFA384x_PCI_M0_ADDRH_OFF	(0x80)	hfa384x.h
30327	HFA384x_PCI_M0_ADDRL_OFF	(0x84)	hfa384x.h
30328	HFA384x_PCI_M0_LEN_OFF	(0x88)	hfa384x.h
30329	HFA384x_PCI_M0_CTL_OFF	(0x8c)	hfa384x.h
30330	HFA384x_PCI_STATUS_OFF	(0x98)	hfa384x.h
30331	HFA384x_PCI_M1_ADDRH_OFF	(0xa0)	hfa384x.h
30332	HFA384x_PCI_M1_ADDRL_OFF	(0xa4)	hfa384x.h
30333	HFA384x_PCI_M1_LEN_OFF	(0xa8)	hfa384x.h
30334	HFA384x_PCI_M1_CTL_OFF	(0xac)	hfa384x.h
30335	HFA384x_CMD_BUSY	((UINT16)BIT15)	hfa384x.h
30336	HFA384x_CMD_AINFO	((UINT16)(BIT14 \| BIT13 \| BIT12 \| BIT11 \| BIT10 \| BIT9 \| BIT8))	hfa384x.h
30337	HFA384x_CMD_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
30338	HFA384x_CMD_RECL	((UINT16)BIT8)	hfa384x.h
30339	HFA384x_CMD_WRITE	((UINT16)BIT8)	hfa384x.h
30340	HFA384x_CMD_PROGMODE	((UINT16)(BIT9 \| BIT8))	hfa384x.h
30341	HFA384x_CMD_CMDCODE	((UINT16)(BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1 \| BIT0))	hfa384x.h
30342	HFA384x_STATUS_RESULT	((UINT16)(BIT14 \| BIT13 \| BIT12 \| BIT11 \| BIT10 \| BIT9 \| BIT8))	hfa384x.h
30343	HFA384x_STATUS_CMDCODE	((UINT16)(BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1 \| BIT0))	hfa384x.h
30344	HFA384x_OFFSET_BUSY	((UINT16)BIT15)	hfa384x.h
30345	HFA384x_OFFSET_ERR	((UINT16)BIT14)	hfa384x.h
30346	HFA384x_OFFSET_DATAOFF	((UINT16)(BIT11 \| BIT10 \| BIT9 \| BIT8 \| BIT7 \| BIT6 \| BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1))	hfa384x.h
30347	HFA384x_EVSTAT_TICK	((UINT16)BIT15)	hfa384x.h
30348	HFA384x_EVSTAT_WTERR	((UINT16)BIT14)	hfa384x.h
30349	HFA384x_EVSTAT_INFDROP	((UINT16)BIT13)	hfa384x.h
30350	HFA384x_EVSTAT_INFO	((UINT16)BIT7)	hfa384x.h
30351	HFA384x_EVSTAT_DTIM	((UINT16)BIT5)	hfa384x.h
30352	HFA384x_EVSTAT_CMD	((UINT16)BIT4)	hfa384x.h
30353	HFA384x_EVSTAT_ALLOC	((UINT16)BIT3)	hfa384x.h
30354	HFA384x_EVSTAT_TXEXC	((UINT16)BIT2)	hfa384x.h
30355	HFA384x_EVSTAT_TX	((UINT16)BIT1)	hfa384x.h
30356	HFA384x_EVSTAT_RX	((UINT16)BIT0)	hfa384x.h
30357	HFA384x_INT_BAP_OP	(HFA384x_EVSTAT_INFO\|HFA384x_EVSTAT_RX\|HFA384x_EVSTAT_TX\|HFA384x_EVSTAT_TXEXC)	hfa384x.h
30358	HFA384x_INT_NORMAL	(HFA384x_EVSTAT_INFO\|HFA384x_EVSTAT_RX\|HFA384x_EVSTAT_TX\|HFA384x_EVSTAT_TXEXC\|HFA384x_EVSTAT_INFDROP\|HFA384x_EVSTAT_ALLOC\|HFA38	hfa384x.h
30359	HFA384x_INTEN_TICK	((UINT16)BIT15)	hfa384x.h
30360	HFA384x_INTEN_WTERR	((UINT16)BIT14)	hfa384x.h
30361	HFA384x_INTEN_INFDROP	((UINT16)BIT13)	hfa384x.h
30362	HFA384x_INTEN_INFO	((UINT16)BIT7)	hfa384x.h
30363	HFA384x_INTEN_DTIM	((UINT16)BIT5)	hfa384x.h
30364	HFA384x_INTEN_CMD	((UINT16)BIT4)	hfa384x.h
30365	HFA384x_INTEN_ALLOC	((UINT16)BIT3)	hfa384x.h
30366	HFA384x_INTEN_TXEXC	((UINT16)BIT2)	hfa384x.h
30367	HFA384x_INTEN_TX	((UINT16)BIT1)	hfa384x.h
30368	HFA384x_INTEN_RX	((UINT16)BIT0)	hfa384x.h
30369	HFA384x_EVACK_TICK	((UINT16)BIT15)	hfa384x.h
30370	HFA384x_EVACK_WTERR	((UINT16)BIT14)	hfa384x.h
30371	HFA384x_EVACK_INFDROP	((UINT16)BIT13)	hfa384x.h
30372	HFA384x_EVACK_INFO	((UINT16)BIT7)	hfa384x.h
30373	HFA384x_EVACK_DTIM	((UINT16)BIT5)	hfa384x.h
30374	HFA384x_EVACK_CMD	((UINT16)BIT4)	hfa384x.h
30375	HFA384x_EVACK_ALLOC	((UINT16)BIT3)	hfa384x.h
30376	HFA384x_EVACK_TXEXC	((UINT16)BIT2)	hfa384x.h
30377	HFA384x_EVACK_TX	((UINT16)BIT1)	hfa384x.h
30378	HFA384x_EVACK_RX	((UINT16)BIT0)	hfa384x.h
30379	HFA384x_CONTROL_AUXEN	((UINT16)(BIT15 \| BIT14))	hfa384x.h
30380	HFA384x_CMDCODE_INIT	((UINT16)0x00)	hfa384x.h
30381	HFA384x_CMDCODE_ENABLE	((UINT16)0x01)	hfa384x.h
30382	HFA384x_CMDCODE_DISABLE	((UINT16)0x02)	hfa384x.h
30383	HFA384x_CMDCODE_DIAG	((UINT16)0x03)	hfa384x.h
30384	HFA384x_CMDCODE_ALLOC	((UINT16)0x0A)	hfa384x.h
30385	HFA384x_CMDCODE_TX	((UINT16)0x0B)	hfa384x.h
30386	HFA384x_CMDCODE_CLRPRST	((UINT16)0x12)	hfa384x.h
30387	HFA384x_CMDCODE_NOTIFY	((UINT16)0x10)	hfa384x.h
30388	HFA384x_CMDCODE_INQ	((UINT16)0x11)	hfa384x.h
30389	HFA384x_CMDCODE_ACCESS	((UINT16)0x21)	hfa384x.h
30390	HFA384x_CMDCODE_DOWNLD	((UINT16)0x22)	hfa384x.h
30391	HFA384x_CMDCODE_MONITOR	((UINT16)(0x38))	hfa384x.h
30392	HFA384x_MONITOR_ENABLE	((UINT16)(0x0b))	hfa384x.h
30393	HFA384x_MONITOR_DISABLE	((UINT16)(0x0f))	hfa384x.h
30394	HFA384x_SUCCESS	((UINT16)(0x00))	hfa384x.h
30395	HFA384x_CARD_FAIL	((UINT16)(0x01))	hfa384x.h
30396	HFA384x_NO_BUFF	((UINT16)(0x05))	hfa384x.h
30397	HFA384x_CMD_ERR	((UINT16)(0x7F))	hfa384x.h
30398	HFA384x_PROGMODE_DISABLE	((UINT16)0x00)	hfa384x.h
30399	HFA384x_PROGMODE_RAM	((UINT16)0x01)	hfa384x.h
30400	HFA384x_PROGMODE_NV	((UINT16)0x02)	hfa384x.h
30401	HFA384x_PROGMODE_NVWRITE	((UINT16)0x03)	hfa384x.h
30402	HFA384x_AUXPW0	((UINT16)0xfe01)	hfa384x.h
30403	HFA384x_AUXPW1	((UINT16)0xdc23)	hfa384x.h
30404	HFA384x_AUXPW2	((UINT16)0xba45)	hfa384x.h
30405	HFA384x_CONTROL_AUX_ISDISABLED	((UINT16)0x0000)	hfa384x.h
30406	HFA384x_CONTROL_AUX_ISENABLED	((UINT16)0xc000)	hfa384x.h
30407	HFA384x_CONTROL_AUX_DOENABLE	((UINT16)0x8000)	hfa384x.h
30408	HFA384x_CONTROL_AUX_DODISABLE	((UINT16)0x4000)	hfa384x.h
30409	HFA384x_RID_CNFPORTTYPE	((UINT16)0xFC00)	hfa384x.h
30410	HFA384x_RID_CNFOWNMACADDR	((UINT16)0xFC01)	hfa384x.h
30411	HFA384x_RID_CNFDESIREDSSID	((UINT16)0xFC02)	hfa384x.h
30412	HFA384x_RID_CNFOWNCHANNEL	((UINT16)0xFC03)	hfa384x.h
30413	HFA384x_RID_CNFOWNSSID	((UINT16)0xFC04)	hfa384x.h
30414	HFA384x_RID_CNFOWNATIMWIN	((UINT16)0xFC05)	hfa384x.h
30415	HFA384x_RID_CNFSYSSCALE	((UINT16)0xFC06)	hfa384x.h
30416	HFA384x_RID_CNFMAXDATALEN	((UINT16)0xFC07)	hfa384x.h
30417	HFA384x_RID_CNFWDSADDR	((UINT16)0xFC08)	hfa384x.h
30418	HFA384x_RID_CNFPMENABLED	((UINT16)0xFC09)	hfa384x.h
30419	HFA384x_RID_CNFPMEPS	((UINT16)0xFC0A)	hfa384x.h
30420	HFA384x_RID_CNFMULTICASTRX	((UINT16)0xFC0B)	hfa384x.h
30421	HFA384x_RID_CNFMAXSLEEPDUR	((UINT16)0xFC0C)	hfa384x.h
30422	HFA384x_RID_CNFPMHOLDDUR	((UINT16)0xFC0D)	hfa384x.h
30423	HFA384x_RID_CNFOWNNAME	((UINT16)0xFC0E)	hfa384x.h
30424	HFA384x_RID_CNFOWNDTIMPER	((UINT16)0xFC10)	hfa384x.h
30425	HFA384x_RID_CNFWDSADDR1	((UINT16)0xFC11)	hfa384x.h
30426	HFA384x_RID_CNFWDSADDR2	((UINT16)0xFC12)	hfa384x.h
30427	HFA384x_RID_CNFWDSADDR3	((UINT16)0xFC13)	hfa384x.h
30428	HFA384x_RID_CNFWDSADDR4	((UINT16)0xFC14)	hfa384x.h
30429	HFA384x_RID_CNFWDSADDR5	((UINT16)0xFC15)	hfa384x.h
30430	HFA384x_RID_CNFWDSADDR6	((UINT16)0xFC16)	hfa384x.h
30431	HFA384x_RID_CNFMCASTPMBUFF	((UINT16)0xFC17)	hfa384x.h
30432	HFA384x_RID_CNFPORTTYPE_LEN	((UINT16)2)	hfa384x.h
30433	HFA384x_RID_CNFOWNMACADDR_LEN	((UINT16)6)	hfa384x.h
30434	HFA384x_RID_CNFDESIREDSSID_LEN	((UINT16)34)	hfa384x.h
30435	HFA384x_RID_CNFOWNCHANNEL_LEN	((UINT16)2)	hfa384x.h
30436	HFA384x_RID_CNFOWNSSID_LEN	((UINT16)34)	hfa384x.h
30437	HFA384x_RID_CNFOWNATIMWIN_LEN	((UINT16)2)	hfa384x.h
30438	HFA384x_RID_CNFSYSSCALE_LEN	((UINT16)0)	hfa384x.h
30439	HFA384x_RID_CNFMAXDATALEN_LEN	((UINT16)0)	hfa384x.h
30440	HFA384x_RID_CNFWDSADDR_LEN	((UINT16)6)	hfa384x.h
30441	HFA384x_RID_CNFPMENABLED_LEN	((UINT16)0)	hfa384x.h
30442	HFA384x_RID_CNFPMEPS_LEN	((UINT16)0)	hfa384x.h
30443	HFA384x_RID_CNFMULTICASTRX_LEN	((UINT16)0)	hfa384x.h
30444	HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)	hfa384x.h
30445	HFA384x_RID_CNFPMHOLDDUR_LEN	((UINT16)0)	hfa384x.h
30446	HFA384x_RID_CNFOWNNAME_LEN	((UINT16)34)	hfa384x.h
30447	HFA384x_RID_CNFOWNDTIMPER_LEN	((UINT16)0)	hfa384x.h
30448	HFA384x_RID_CNFWDSADDR1_LEN	((UINT16)6)	hfa384x.h
30449	HFA384x_RID_CNFWDSADDR2_LEN	((UINT16)6)	hfa384x.h
30450	HFA384x_RID_CNFWDSADDR3_LEN	((UINT16)6)	hfa384x.h
30451	HFA384x_RID_CNFWDSADDR4_LEN	((UINT16)6)	hfa384x.h
30452	HFA384x_RID_CNFWDSADDR5_LEN	((UINT16)6)	hfa384x.h
30453	HFA384x_RID_CNFWDSADDR6_LEN	((UINT16)6)	hfa384x.h
30454	HFA384x_RID_CNFMCASTPMBUFF_LEN	((UINT16)0)	hfa384x.h
30455	HFA384x_RID_CNFAUTHENTICATION_L	((UINT16)sizeof(UINT16))	hfa384x.h
30456	HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)	hfa384x.h
30457	HFA384x_RID_GROUPADDR	((UINT16)0xFC80)	hfa384x.h
30458	HFA384x_RID_CREATEIBSS	((UINT16)0xFC81)	hfa384x.h
30459	HFA384x_RID_FRAGTHRESH	((UINT16)0xFC82)	hfa384x.h
30460	HFA384x_RID_RTSTHRESH	((UINT16)0xFC83)	hfa384x.h
30461	HFA384x_RID_TXRATECNTL	((UINT16)0xFC84)	hfa384x.h
30462	HFA384x_RID_PROMISCMODE	((UINT16)0xFC85)	hfa384x.h
30463	HFA384x_RID_FRAGTHRESH0	((UINT16)0xFC90)	hfa384x.h
30464	HFA384x_RID_FRAGTHRESH1	((UINT16)0xFC91)	hfa384x.h
30465	HFA384x_RID_FRAGTHRESH2	((UINT16)0xFC92)	hfa384x.h
30466	HFA384x_RID_FRAGTHRESH3	((UINT16)0xFC93)	hfa384x.h
30467	HFA384x_RID_FRAGTHRESH4	((UINT16)0xFC94)	hfa384x.h
30468	HFA384x_RID_FRAGTHRESH5	((UINT16)0xFC95)	hfa384x.h
30469	HFA384x_RID_FRAGTHRESH6	((UINT16)0xFC96)	hfa384x.h
30470	HFA384x_RID_RTSTHRESH0	((UINT16)0xFC97)	hfa384x.h
30471	HFA384x_RID_RTSTHRESH1	((UINT16)0xFC98)	hfa384x.h
30472	HFA384x_RID_RTSTHRESH2	((UINT16)0xFC99)	hfa384x.h
30473	HFA384x_RID_RTSTHRESH3	((UINT16)0xFC9A)	hfa384x.h
30474	HFA384x_RID_RTSTHRESH4	((UINT16)0xFC9B)	hfa384x.h
30475	HFA384x_RID_RTSTHRESH5	((UINT16)0xFC9C)	hfa384x.h
30476	HFA384x_RID_RTSTHRESH6	((UINT16)0xFC9D)	hfa384x.h
30477	HFA384x_RID_TXRATECNTL0	((UINT16)0xFC9E)	hfa384x.h
30478	HFA384x_RID_TXRATECNTL1	((UINT16)0xFC9F)	hfa384x.h
30479	HFA384x_RID_TXRATECNTL2	((UINT16)0xFCA0)	hfa384x.h
30480	HFA384x_RID_TXRATECNTL3	((UINT16)0xFCA1)	hfa384x.h
30481	HFA384x_RID_TXRATECNTL4	((UINT16)0xFCA2)	hfa384x.h
30482	HFA384x_RID_TXRATECNTL5	((UINT16)0xFCA3)	hfa384x.h
30483	HFA384x_RID_TXRATECNTL6	((UINT16)0xFCA4)	hfa384x.h
30484	HFA384x_RID_GROUPADDR_LEN	((UINT16)16 * WLAN_ADDR_LEN)	hfa384x.h
30485	HFA384x_RID_CREATEIBSS_LEN	((UINT16)0)	hfa384x.h
30486	HFA384x_RID_FRAGTHRESH_LEN	((UINT16)0)	hfa384x.h
30487	HFA384x_RID_RTSTHRESH_LEN	((UINT16)0)	hfa384x.h
30488	HFA384x_RID_TXRATECNTL_LEN	((UINT16)4)	hfa384x.h
30489	HFA384x_RID_PROMISCMODE_LEN	((UINT16)2)	hfa384x.h
30490	HFA384x_RID_FRAGTHRESH0_LEN	((UINT16)0)	hfa384x.h
30491	HFA384x_RID_FRAGTHRESH1_LEN	((UINT16)0)	hfa384x.h
30492	HFA384x_RID_FRAGTHRESH2_LEN	((UINT16)0)	hfa384x.h
30493	HFA384x_RID_FRAGTHRESH3_LEN	((UINT16)0)	hfa384x.h
30494	HFA384x_RID_FRAGTHRESH4_LEN	((UINT16)0)	hfa384x.h
30495	HFA384x_RID_FRAGTHRESH5_LEN	((UINT16)0)	hfa384x.h
30496	HFA384x_RID_FRAGTHRESH6_LEN	((UINT16)0)	hfa384x.h
30497	HFA384x_RID_RTSTHRESH0_LEN	((UINT16)0)	hfa384x.h
30498	HFA384x_RID_RTSTHRESH1_LEN	((UINT16)0)	hfa384x.h
30499	HFA384x_RID_RTSTHRESH2_LEN	((UINT16)0)	hfa384x.h
30500	HFA384x_RID_RTSTHRESH3_LEN	((UINT16)0)	hfa384x.h
30501	HFA384x_RID_RTSTHRESH4_LEN	((UINT16)0)	hfa384x.h
30502	HFA384x_RID_RTSTHRESH5_LEN	((UINT16)0)	hfa384x.h
30503	HFA384x_RID_RTSTHRESH6_LEN	((UINT16)0)	hfa384x.h
30504	HFA384x_RID_TXRATECNTL0_LEN	((UINT16)0)	hfa384x.h
30505	HFA384x_RID_TXRATECNTL1_LEN	((UINT16)0)	hfa384x.h
30506	HFA384x_RID_TXRATECNTL2_LEN	((UINT16)0)	hfa384x.h
30507	HFA384x_RID_TXRATECNTL3_LEN	((UINT16)0)	hfa384x.h
30508	HFA384x_RID_TXRATECNTL4_LEN	((UINT16)0)	hfa384x.h
30509	HFA384x_RID_TXRATECNTL5_LEN	((UINT16)0)	hfa384x.h
30510	HFA384x_RID_TXRATECNTL6_LEN	((UINT16)0)	hfa384x.h
30511	HFA384x_RID_ITICKTIME	((UINT16)0xFCE0)	hfa384x.h
30512	HFA384x_RID_ITICKTIME_LEN	((UINT16)2)	hfa384x.h
30513	HFA384x_RID_MAXLOADTIME	((UINT16)0xFD00)	hfa384x.h
30514	HFA384x_RID_DOWNLOADBUFFER	((UINT16)0xFD01)	hfa384x.h
30515	HFA384x_RID_PRIIDENTITY	((UINT16)0xFD02)	hfa384x.h
30516	HFA384x_RID_PRISUPRANGE	((UINT16)0xFD03)	hfa384x.h
30517	HFA384x_RID_PRI_CFIACTRANGES	((UINT16)0xFD04)	hfa384x.h
30518	HFA384x_RID_NICSERIALNUMBER	((UINT16)0xFD0A)	hfa384x.h
30519	HFA384x_RID_NICIDENTITY	((UINT16)0xFD0B)	hfa384x.h
30520	HFA384x_RID_MFISUPRANGE	((UINT16)0xFD0C)	hfa384x.h
30521	HFA384x_RID_CFISUPRANGE	((UINT16)0xFD0D)	hfa384x.h
30522	HFA384x_RID_CHANNELLIST	((UINT16)0xFD10)	hfa384x.h
30523	HFA384x_RID_REGULATORYDOMAINS	((UINT16)0xFD11)	hfa384x.h
30524	HFA384x_RID_TEMPTYPE	((UINT16)0xFD12)	hfa384x.h
30525	HFA384x_RID_CIS	((UINT16)0xFD13)	hfa384x.h
30526	HFA384x_RID_STAIDENTITY	((UINT16)0xFD20)	hfa384x.h
30527	HFA384x_RID_STASUPRANGE	((UINT16)0xFD21)	hfa384x.h
30528	HFA384x_RID_STA_MFIACTRANGES	((UINT16)0xFD22)	hfa384x.h
30529	HFA384x_RID_STA_CFIACTRANGES	((UINT16)0xFD23)	hfa384x.h
30530	HFA384x_RID_BUILDSEQ	((UINT16)0xFFFE)	hfa384x.h
30531	HFA384x_RID_FWID	((UINT16)0xFFFF)	hfa384x.h
30532	HFA384x_RID_MAXLOADTIME_LEN	((UINT16)0)	hfa384x.h
30533	HFA384x_RID_DOWNLOADBUFFER_LEN	((UINT16)sizeof(hfa384x_downloadbuffer_t))	hfa384x.h
30534	HFA384x_RID_PRIIDENTITY_LEN	((UINT16)8)	hfa384x.h
30535	HFA384x_RID_PRISUPRANGE_LEN	((UINT16)10)	hfa384x.h
30536	HFA384x_RID_CFIACTRANGES_LEN	((UINT16)10)	hfa384x.h
30537	HFA384x_RID_NICSERIALNUMBER_LEN	((UINT16)12)	hfa384x.h
30538	HFA384x_RID_NICIDENTITY_LEN	((UINT16)8)	hfa384x.h
30539	HFA384x_RID_MFISUPRANGE_LEN	((UINT16)10)	hfa384x.h
30540	HFA384x_RID_CFISUPRANGE_LEN	((UINT16)10)	hfa384x.h
30541	HFA384x_RID_CHANNELLIST_LEN	((UINT16)0)	hfa384x.h
30542	HFA384x_RID_REGULATORYDOMAINS_L	((UINT16)12)	hfa384x.h
30543	HFA384x_RID_TEMPTYPE_LEN	((UINT16)0)	hfa384x.h
30544	HFA384x_RID_CIS_LEN	((UINT16)480)	hfa384x.h
30545	HFA384x_RID_STAIDENTITY_LEN	((UINT16)8)	hfa384x.h
30546	HFA384x_RID_STASUPRANGE_LEN	((UINT16)10)	hfa384x.h
30547	HFA384x_RID_MFIACTRANGES_LEN	((UINT16)10)	hfa384x.h
30548	HFA384x_RID_CFIACTRANGES2_LEN	((UINT16)10)	hfa384x.h
30549	HFA384x_RID_BUILDSEQ_LEN	((UINT16)sizeof(hfa384x_BuildSeq_t))	hfa384x.h
30550	HFA384x_RID_FWID_LEN	((UINT16)sizeof(hfa384x_FWID_t))	hfa384x.h
30551	HFA384x_RID_PORTSTATUS	((UINT16)0xFD40)	hfa384x.h
30552	HFA384x_RID_CURRENTSSID	((UINT16)0xFD41)	hfa384x.h
30553	HFA384x_RID_CURRENTBSSID	((UINT16)0xFD42)	hfa384x.h
30554	HFA384x_RID_COMMSQUALITY	((UINT16)0xFD43)	hfa384x.h
30555	HFA384x_RID_CURRENTTXRATE	((UINT16)0xFD44)	hfa384x.h
30556	HFA384x_RID_CURRENTBCNINT	((UINT16)0xFD45)	hfa384x.h
30557	HFA384x_RID_CURRENTSCALETHRESH	((UINT16)0xFD46)	hfa384x.h
30558	HFA384x_RID_PROTOCOLRSPTIME	((UINT16)0xFD47)	hfa384x.h
30559	HFA384x_RID_SHORTRETRYLIMIT	((UINT16)0xFD48)	hfa384x.h
30560	HFA384x_RID_LONGRETRYLIMIT	((UINT16)0xFD49)	hfa384x.h
30561	HFA384x_RID_MAXTXLIFETIME	((UINT16)0xFD4A)	hfa384x.h
30562	HFA384x_RID_MAXRXLIFETIME	((UINT16)0xFD4B)	hfa384x.h
30563	HFA384x_RID_CFPOLLABLE	((UINT16)0xFD4C)	hfa384x.h
30564	HFA384x_RID_AUTHALGORITHMS	((UINT16)0xFD4D)	hfa384x.h
30565	HFA384x_RID_PRIVACYOPTIMP	((UINT16)0xFD4F)	hfa384x.h
30566	HFA384x_RID_DBMCOMMSQUALITY	((UINT16)0xFD51)	hfa384x.h
30567	HFA384x_RID_CURRENTTXRATE1	((UINT16)0xFD80)	hfa384x.h
30568	HFA384x_RID_CURRENTTXRATE2	((UINT16)0xFD81)	hfa384x.h
30569	HFA384x_RID_CURRENTTXRATE3	((UINT16)0xFD82)	hfa384x.h
30570	HFA384x_RID_CURRENTTXRATE4	((UINT16)0xFD83)	hfa384x.h
30571	HFA384x_RID_CURRENTTXRATE5	((UINT16)0xFD84)	hfa384x.h
30572	HFA384x_RID_CURRENTTXRATE6	((UINT16)0xFD85)	hfa384x.h
30573	HFA384x_RID_OWNMACADDRESS	((UINT16)0xFD86)	hfa384x.h
30574	HFA384x_RID_SCANRESULTS	((UINT16)0xFD88)	hfa384x.h	NEW
30575	HFA384x_RID_HOSTSCANRESULTS	((UINT16)0xFD89)	hfa384x.h	NEW
30576	HFA384x_RID_AUTHENTICATIONUSED	((UINT16)0xFD8A)	hfa384x.h	NEW
30577	HFA384x_RID_ASSOCIATEFAILURE	((UINT16)0xFD8D)	hfa384x.h	1.8.0
30578	HFA384x_RID_PORTSTATUS_LEN	((UINT16)0)	hfa384x.h
30579	HFA384x_RID_CURRENTSSID_LEN	((UINT16)34)	hfa384x.h
30580	HFA384x_RID_CURRENTBSSID_LEN	((UINT16)WLAN_BSSID_LEN)	hfa384x.h
30581	HFA384x_RID_COMMSQUALITY_LEN	((UINT16)sizeof(hfa384x_commsquality_t))	hfa384x.h
30582	HFA384x_RID_DBMCOMMSQUALITY_LEN	((UINT16)sizeof(hfa384x_dbmcommsquality_t))	hfa384x.h
30583	HFA384x_RID_CURRENTTXRATE_LEN	((UINT16)0)	hfa384x.h
30584	HFA384x_RID_CURRENTBCNINT_LEN	((UINT16)0)	hfa384x.h
30585	HFA384x_RID_STACURSCALETHRESH_L	((UINT16)12)	hfa384x.h
30586	HFA384x_RID_APCURSCALETHRESH_LE	((UINT16)6)	hfa384x.h
30587	HFA384x_RID_PROTOCOLRSPTIME_LEN	((UINT16)0)	hfa384x.h
30588	HFA384x_RID_SHORTRETRYLIMIT_LEN	((UINT16)0)	hfa384x.h
30589	HFA384x_RID_LONGRETRYLIMIT_LEN	((UINT16)0)	hfa384x.h
30590	HFA384x_RID_MAXTXLIFETIME_LEN	((UINT16)0)	hfa384x.h
30591	HFA384x_RID_MAXRXLIFETIME_LEN	((UINT16)0)	hfa384x.h
30592	HFA384x_RID_CFPOLLABLE_LEN	((UINT16)0)	hfa384x.h
30593	HFA384x_RID_AUTHALGORITHMS_LEN	((UINT16)4)	hfa384x.h
30594	HFA384x_RID_PRIVACYOPTIMP_LEN	((UINT16)0)	hfa384x.h
30595	HFA384x_RID_CURRENTTXRATE1_LEN	((UINT16)0)	hfa384x.h
30596	HFA384x_RID_CURRENTTXRATE2_LEN	((UINT16)0)	hfa384x.h
30597	HFA384x_RID_CURRENTTXRATE3_LEN	((UINT16)0)	hfa384x.h
30598	HFA384x_RID_CURRENTTXRATE4_LEN	((UINT16)0)	hfa384x.h
30599	HFA384x_RID_CURRENTTXRATE5_LEN	((UINT16)0)	hfa384x.h
30600	HFA384x_RID_CURRENTTXRATE6_LEN	((UINT16)0)	hfa384x.h
30601	HFA384x_RID_OWNMACADDRESS_LEN	((UINT16)6)	hfa384x.h
30602	HFA384x_RID_PCFINFO_LEN	((UINT16)6)	hfa384x.h
30603	HFA384x_RID_CNFAPPCFINFO_LEN	((UINT16)sizeof(hfa384x_PCFInfo_data_t))	hfa384x.h
30604	HFA384x_RID_SCANREQUEST_LEN	((UINT16)sizeof(hfa384x_ScanRequest_data_t))	hfa384x.h
30605	HFA384x_RID_JOINREQUEST_LEN	((UINT16)sizeof(hfa384x_JoinRequest_data_t))	hfa384x.h
30606	HFA384x_RID_AUTHENTICATESTA_LEN	((UINT16)sizeof(hfa384x_authenticateStation_data_t))	hfa384x.h
30607	HFA384x_RID_CHANNELINFOREQUEST_	((UINT16)sizeof(hfa384x_ChannelInfoRequest_data_t))	hfa384x.h
30608	HFA384x_RID_PHYTYPE	((UINT16)0xFDC0)	hfa384x.h
30609	HFA384x_RID_CURRENTCHANNEL	((UINT16)0xFDC1)	hfa384x.h
30610	HFA384x_RID_CURRENTPOWERSTATE	((UINT16)0xFDC2)	hfa384x.h
30611	HFA384x_RID_CCAMODE	((UINT16)0xFDC3)	hfa384x.h
30612	HFA384x_RID_SUPPORTEDDATARATES	((UINT16)0xFDC6)	hfa384x.h
30613	HFA384x_RID_LFOSTATUS	((UINT16)0xFDC7)	hfa384x.h	1.7.1
30614	HFA384x_RID_PHYTYPE_LEN	((UINT16)0)	hfa384x.h
30615	HFA384x_RID_CURRENTCHANNEL_LEN	((UINT16)0)	hfa384x.h
30616	HFA384x_RID_CURRENTPOWERSTATE_L	((UINT16)0)	hfa384x.h
30617	HFA384x_RID_CCAMODE_LEN	((UINT16)0)	hfa384x.h
30618	HFA384x_RID_SUPPORTEDDATARATES_	((UINT16)10)	hfa384x.h
30619	HFA384x_RID_CNFWEPDEFAULTKEYID	((UINT16)0xFC23)	hfa384x.h
30620	HFA384x_RID_CNFWEPDEFAULTKEY0	((UINT16)0xFC24)	hfa384x.h
30621	HFA384x_RID_CNFWEPDEFAULTKEY1	((UINT16)0xFC25)	hfa384x.h
30622	HFA384x_RID_CNFWEPDEFAULTKEY2	((UINT16)0xFC26)	hfa384x.h
30623	HFA384x_RID_CNFWEPDEFAULTKEY3	((UINT16)0xFC27)	hfa384x.h
30624	HFA384x_RID_CNFWEPFLAGS	((UINT16)0xFC28)	hfa384x.h
30625	HFA384x_RID_CNFWEPKEYMAPTABLE	((UINT16)0xFC29)	hfa384x.h
30626	HFA384x_RID_CNFAUTHENTICATION	((UINT16)0xFC2A)	hfa384x.h
30627	HFA384x_RID_CNFMAXASSOCSTATIONS	((UINT16)0xFC2B)	hfa384x.h
30628	HFA384x_RID_CNFTXCONTROL	((UINT16)0xFC2C)	hfa384x.h
30629	HFA384x_RID_CNFROAMINGMODE	((UINT16)0xFC2D)	hfa384x.h
30630	HFA384x_RID_CNFHOSTAUTHASSOC	((UINT16)0xFC2E)	hfa384x.h
30631	HFA384x_RID_CNFRCVCRCERROR	((UINT16)0xFC30)	hfa384x.h
30632	HFA384x_RID_CNFALTRETRYCNT	((UINT16)0xFC32)	hfa384x.h
30633	HFA384x_RID_CNFAPBCNINT	((UINT16)0xFC33)	hfa384x.h
30634	HFA384x_RID_CNFAPPCFINFO	((UINT16)0xFC34)	hfa384x.h
30635	HFA384x_RID_CNFSTAPCFINFO	((UINT16)0xFC35)	hfa384x.h
30636	HFA384x_RID_CNFPRIORITYQUSAGE	((UINT16)0xFC37)	hfa384x.h
30637	HFA384x_RID_CNFTIMCTRL	((UINT16)0xFC40)	hfa384x.h
30638	HFA384x_RID_CNFTHIRTY2TALLY	((UINT16)0xFC42)	hfa384x.h
30639	HFA384x_RID_CNFENHSECURITY	((UINT16)0xFC43)	hfa384x.h
30640	HFA384x_RID_CNFDBMADJUST	((UINT16)0xFC46)	hfa384x.h	NEW
30641	HFA384x_RID_CNFWPADATA	((UINT16)0xFC48)	hfa384x.h	1.7.0
30642	HFA384x_RID_CNFPROPOGATIONDELAY	((UINT16)0xFC49)	hfa384x.h	1.7.6
30643	HFA384x_RID_CNFSHORTPREAMBLE	((UINT16)0xFCB0)	hfa384x.h
30644	HFA384x_RID_CNFEXCLONGPREAMBLE	((UINT16)0xFCB1)	hfa384x.h
30645	HFA384x_RID_CNFAUTHRSPTIMEOUT	((UINT16)0xFCB2)	hfa384x.h
30646	HFA384x_RID_CNFBASICRATES	((UINT16)0xFCB3)	hfa384x.h
30647	HFA384x_RID_CNFSUPPRATES	((UINT16)0xFCB4)	hfa384x.h
30648	HFA384x_RID_CNFFALLBACKCTRL	((UINT16)0xFCB5)	hfa384x.h	NEW
30649	HFA384x_RID_WEPKEYSTATUS	((UINT16)0xFCB6)	hfa384x.h	NEW
30650	HFA384x_RID_WEPKEYMAPINDEX	((UINT16)0xFCB7)	hfa384x.h	NEW
30651	HFA384x_RID_BROADCASTKEYID	((UINT16)0xFCB8)	hfa384x.h	NEW
30652	HFA384x_RID_ENTSECFLAGEYID	((UINT16)0xFCB9)	hfa384x.h	NEW
30653	HFA384x_RID_CNFPASSIVESCANCTRL	((UINT16)0xFCBA)	hfa384x.h	NEW STA
30654	HFA384x_RID_CNFWPAHANDLING	((UINT16)0xFCBB)	hfa384x.h	1.7.0
30655	HFA384x_RID_MDCCONTROL	((UINT16)0xFCBC)	hfa384x.h	1.7.0/1.4.0
30656	HFA384x_RID_MDCCOUNTRY	((UINT16)0xFCBD)	hfa384x.h	1.7.0/1.4.0
30657	HFA384x_RID_TXPOWERMAX	((UINT16)0xFCBE)	hfa384x.h	1.7.0/1.4.0
30658	HFA384x_RID_CNFLFOENBLED	((UINT16)0xFCBF)	hfa384x.h	1.6.3
30659	HFA384x_RID_CAPINFO	((UINT16)0xFCC0)	hfa384x.h	1.7.0/1.3.7
30660	HFA384x_RID_LISTENINTERVAL	((UINT16)0xFCC1)	hfa384x.h	1.7.0/1.3.7
30661	HFA384x_RID_DIVERSITYENABLED	((UINT16)0xFCC2)	hfa384x.h	1.7.0/1.3.7
30662	HFA384x_RID_LED_CONTROL	((UINT16)0xFCC4)	hfa384x.h	1.7.6
30663	HFA384x_RID_HFO_DELAY	((UINT16)0xFCC5)	hfa384x.h	1.7.6
30664	HFA384x_RID_DISSALOWEDBSSID	((UINT16)0xFCC6)	hfa384x.h	1.8.0
30665	HFA384x_RID_SCANREQUEST	((UINT16)0xFCE1)	hfa384x.h
30666	HFA384x_RID_JOINREQUEST	((UINT16)0xFCE2)	hfa384x.h
30667	HFA384x_RID_AUTHENTICATESTA	((UINT16)0xFCE3)	hfa384x.h
30668	HFA384x_RID_CHANNELINFOREQUEST	((UINT16)0xFCE4)	hfa384x.h
30669	HFA384x_RID_HOSTSCAN	((UINT16)0xFCE5)	hfa384x.h	NEW STA
30670	HFA384x_RID_ASSOCIATESTA	((UINT16)0xFCE6)	hfa384x.h
30671	HFA384x_RID_CNFWEPDEFAULTKEY_LE	((UINT16)6)	hfa384x.h
30672	HFA384x_RID_CNFWEP128DEFAULTKEY	((UINT16)14)	hfa384x.h
30673	HFA384x_RID_CNFPRIOQUSAGE_LEN	((UINT16)4)	hfa384x.h
30674	HFA384x_PDR_PCB_PARTNUM	((UINT16)0x0001)	hfa384x.h
30675	HFA384x_PDR_PDAVER	((UINT16)0x0002)	hfa384x.h
30676	HFA384x_PDR_NIC_SERIAL	((UINT16)0x0003)	hfa384x.h
30677	HFA384x_PDR_MKK_MEASUREMENTS	((UINT16)0x0004)	hfa384x.h
30678	HFA384x_PDR_NIC_RAMSIZE	((UINT16)0x0005)	hfa384x.h
30679	HFA384x_PDR_MFISUPRANGE	((UINT16)0x0006)	hfa384x.h
30680	HFA384x_PDR_CFISUPRANGE	((UINT16)0x0007)	hfa384x.h
30681	HFA384x_PDR_NICID	((UINT16)0x0008)	hfa384x.h
30682	HFA384x_PDR_MAC_ADDRESS	((UINT16)0x0101)	hfa384x.h
30683	HFA384x_PDR_REGDOMAIN	((UINT16)0x0103)	hfa384x.h
30684	HFA384x_PDR_ALLOWED_CHANNEL	((UINT16)0x0104)	hfa384x.h
30685	HFA384x_PDR_DEFAULT_CHANNEL	((UINT16)0x0105)	hfa384x.h
30686	HFA384x_PDR_TEMPTYPE	((UINT16)0x0107)	hfa384x.h
30687	HFA384x_PDR_IFR_SETTING	((UINT16)0x0200)	hfa384x.h
30688	HFA384x_PDR_RFR_SETTING	((UINT16)0x0201)	hfa384x.h
30689	HFA384x_PDR_HFA3861_BASELINE	((UINT16)0x0202)	hfa384x.h
30690	HFA384x_PDR_HFA3861_SHADOW	((UINT16)0x0203)	hfa384x.h
30691	HFA384x_PDR_HFA3861_IFRF	((UINT16)0x0204)	hfa384x.h
30692	HFA384x_PDR_HFA3861_CHCALSP	((UINT16)0x0300)	hfa384x.h
30693	HFA384x_PDR_HFA3861_CHCALI	((UINT16)0x0301)	hfa384x.h
30694	HFA384x_PDR_MAX_TX_POWER	((UINT16)0x0302)	hfa384x.h
30695	HFA384x_PDR_MASTER_CHAN_LIST	((UINT16)0x0303)	hfa384x.h
30696	HFA384x_PDR_3842_NIC_CONFIG	((UINT16)0x0400)	hfa384x.h
30697	HFA384x_PDR_USB_ID	((UINT16)0x0401)	hfa384x.h
30698	HFA384x_PDR_PCI_ID	((UINT16)0x0402)	hfa384x.h
30699	HFA384x_PDR_PCI_IFCONF	((UINT16)0x0403)	hfa384x.h
30700	HFA384x_PDR_PCI_PMCONF	((UINT16)0x0404)	hfa384x.h
30701	HFA384x_PDR_RFENRGY	((UINT16)0x0406)	hfa384x.h
30702	HFA384x_PDR_USB_POWER_TYPE	((UINT16)0x0407)	hfa384x.h
30703	HFA384x_PDR_USB_MAX_POWER	((UINT16)0x0409)	hfa384x.h
30704	HFA384x_PDR_USB_MANUFACTURER	((UINT16)0x0410)	hfa384x.h
30705	HFA384x_PDR_USB_PRODUCT	((UINT16)0x0411)	hfa384x.h
30706	HFA384x_PDR_ANT_DIVERSITY	((UINT16)0x0412)	hfa384x.h
30707	HFA384x_PDR_HFO_DELAY	((UINT16)0x0413)	hfa384x.h
30708	HFA384x_PDR_SCALE_THRESH	((UINT16)0x0414)	hfa384x.h
30709	HFA384x_PDR_HFA3861_MANF_TESTSP	((UINT16)0x0900)	hfa384x.h
30710	HFA384x_PDR_HFA3861_MANF_TESTI	((UINT16)0x0901)	hfa384x.h
30711	HFA384x_PDR_END_OF_PDA	((UINT16)0x0000)	hfa384x.h
30712	HFA384x_CMD	HFA384x_CMD_OFF	hfa384x.h
30713	HFA384x_PARAM0	HFA384x_PARAM0_OFF	hfa384x.h
30714	HFA384x_PARAM1	HFA384x_PARAM1_OFF	hfa384x.h
30715	HFA384x_PARAM2	HFA384x_PARAM2_OFF	hfa384x.h
30716	HFA384x_STATUS	HFA384x_STATUS_OFF	hfa384x.h
30717	HFA384x_RESP0	HFA384x_RESP0_OFF	hfa384x.h
30718	HFA384x_RESP1	HFA384x_RESP1_OFF	hfa384x.h
30719	HFA384x_RESP2	HFA384x_RESP2_OFF	hfa384x.h
30720	HFA384x_INFOFID	HFA384x_INFOFID_OFF	hfa384x.h
30721	HFA384x_RXFID	HFA384x_RXFID_OFF	hfa384x.h
30722	HFA384x_ALLOCFID	HFA384x_ALLOCFID_OFF	hfa384x.h
30723	HFA384x_TXCOMPLFID	HFA384x_TXCOMPLFID_OFF	hfa384x.h
30724	HFA384x_SELECT0	HFA384x_SELECT0_OFF	hfa384x.h
30725	HFA384x_OFFSET0	HFA384x_OFFSET0_OFF	hfa384x.h
30726	HFA384x_DATA0	HFA384x_DATA0_OFF	hfa384x.h
30727	HFA384x_SELECT1	HFA384x_SELECT1_OFF	hfa384x.h
30728	HFA384x_OFFSET1	HFA384x_OFFSET1_OFF	hfa384x.h
30729	HFA384x_DATA1	HFA384x_DATA1_OFF	hfa384x.h
30730	HFA384x_EVSTAT	HFA384x_EVSTAT_OFF	hfa384x.h
30731	HFA384x_INTEN	HFA384x_INTEN_OFF	hfa384x.h
30732	HFA384x_EVACK	HFA384x_EVACK_OFF	hfa384x.h
30733	HFA384x_CONTROL	HFA384x_CONTROL_OFF	hfa384x.h
30734	HFA384x_SWSUPPORT0	HFA384x_SWSUPPORT0_OFF	hfa384x.h
30735	HFA384x_SWSUPPORT1	HFA384x_SWSUPPORT1_OFF	hfa384x.h
30736	HFA384x_SWSUPPORT2	HFA384x_SWSUPPORT2_OFF	hfa384x.h
30737	HFA384x_AUXPAGE	HFA384x_AUXPAGE_OFF	hfa384x.h
30738	HFA384x_AUXOFFSET	HFA384x_AUXOFFSET_OFF	hfa384x.h
30739	HFA384x_AUXDATA	HFA384x_AUXDATA_OFF	hfa384x.h
30740	HFA384x_PCICOR	HFA384x_PCICOR_OFF	hfa384x.h
30741	HFA384x_PCIHCR	HFA384x_PCIHCR_OFF	hfa384x.h
30742	HFA384x_STATE_PREINIT	0	hfa384x.h
30743	HFA384x_STATE_INIT	1	hfa384x.h
30744	HFA384x_STATE_RUNNING	2	hfa384x.h
30745	HFA384x_HOSTAUTHASSOC_HOSTAUTH	BIT0	hfa384x.h
30746	HFA384x_HOSTAUTHASSOC_HOSTASSOC	BIT1	hfa384x.h
30747	HFA384x_WHAHANDLING_DISABLED	0	hfa384x.h
30748	HFA384x_WHAHANDLING_PASSTHROUGH	BIT1	hfa384x.h
30749	HFA384x_CNFAUTHENTICATION_OPENS	0x0001	hfa384x.h
30750	HFA384x_CNFAUTHENTICATION_SHARE	0x0002	hfa384x.h
30751	HFA384x_CNFAUTHENTICATION_LEAP	0x0004	hfa384x.h
30752	HFA384x_CREATEIBSS_JOINCREATEIB	0	hfa384x.h
30753	HFA384x_CREATEIBSS_JOINESS_JOIN	1	hfa384x.h
30754	HFA384x_CREATEIBSS_JOINIBSS	2	hfa384x.h
30755	HFA384x_CREATEIBSS_JOINESS_JOIN	3	hfa384x.h
30756	HFA384x_FWID_LEN	14	hfa384x.h
30757	HFA384x_PSTATUS_DISABLED	((UINT16)1)	hfa384x.h
30758	HFA384x_PSTATUS_SEARCHING	((UINT16)2)	hfa384x.h
30759	HFA384x_PSTATUS_CONN_IBSS	((UINT16)3)	hfa384x.h
30760	HFA384x_PSTATUS_CONN_ESS	((UINT16)4)	hfa384x.h
30761	HFA384x_PSTATUS_OUTOFRANGE	((UINT16)5)	hfa384x.h
30762	HFA384x_PSTATUS_CONN_WDS	((UINT16)6)	hfa384x.h
30763	HFA384x_TESTRESULT_ALLPASSED	BIT0	hfa384x.h
30764	HFA384x_TESTRESULT_LFO_FAIL	BIT1	hfa384x.h
30765	HFA384x_TESTRESULT_VR_HF0_FAIL	BIT2	hfa384x.h
30766	HFA384x_HOST_FIRM_COORDINATE	BIT7	hfa384x.h
30767	HFA384x_TESTRESULT_COORDINATE	BIT15	hfa384x.h
30768	HFA384x_FD_STATUS_OFF	((UINT16)0x44)	hfa384x.h
30769	HFA384x_FD_TIME_OFF	((UINT16)0x46)	hfa384x.h
30770	HFA384x_FD_SWSUPPORT_OFF	((UINT16)0x4A)	hfa384x.h
30771	HFA384x_FD_SILENCE_OFF	((UINT16)0x4A)	hfa384x.h
30772	HFA384x_FD_SIGNAL_OFF	((UINT16)0x4B)	hfa384x.h
30773	HFA384x_FD_RATE_OFF	((UINT16)0x4C)	hfa384x.h
30774	HFA384x_FD_RXFLOW_OFF	((UINT16)0x4D)	hfa384x.h
30775	HFA384x_FD_RESERVED_OFF	((UINT16)0x4E)	hfa384x.h
30776	HFA384x_FD_TXCONTROL_OFF	((UINT16)0x50)	hfa384x.h
30777	HFA384x_FD_FRAMECONTROL_OFF	((UINT16)0x52)	hfa384x.h
30778	HFA384x_FD_DURATIONID_OFF	((UINT16)0x54)	hfa384x.h
30779	HFA384x_FD_ADDRESS1_OFF	((UINT16)0x56)	hfa384x.h
30780	HFA384x_FD_ADDRESS2_OFF	((UINT16)0x5C)	hfa384x.h
30781	HFA384x_FD_ADDRESS3_OFF	((UINT16)0x62)	hfa384x.h
30782	HFA384x_FD_SEQCONTROL_OFF	((UINT16)0x68)	hfa384x.h
30783	HFA384x_FD_ADDRESS4_OFF	((UINT16)0x6A)	hfa384x.h
30784	HFA384x_FD_DATALEN_OFF	((UINT16)0x70)	hfa384x.h
30785	HFA384x_FD_DESTADDRESS_OFF	((UINT16)0x72)	hfa384x.h
30786	HFA384x_FD_SRCADDRESS_OFF	((UINT16)0x78)	hfa384x.h
30787	HFA384x_FD_DATALENGTH_OFF	((UINT16)0x7E)	hfa384x.h
30788	HFA384x_TXSTATUS_ACKERR	((UINT16)BIT5)	hfa384x.h
30789	HFA384x_TXSTATUS_FORMERR	((UINT16)BIT3)	hfa384x.h
30790	HFA384x_TXSTATUS_DISCON	((UINT16)BIT2)	hfa384x.h
30791	HFA384x_TXSTATUS_AGEDERR	((UINT16)BIT1)	hfa384x.h
30792	HFA384x_TXSTATUS_RETRYERR	((UINT16)BIT0)	hfa384x.h
30793	HFA384x_TX_CFPOLL	((UINT16)BIT12)	hfa384x.h
30794	HFA384x_TX_PRST	((UINT16)BIT11)	hfa384x.h
30795	HFA384x_TX_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
30796	HFA384x_TX_NOENCRYPT	((UINT16)BIT7)	hfa384x.h
30797	HFA384x_TX_RETRYSTRAT	((UINT16)(BIT6 \| BIT5))	hfa384x.h
30798	HFA384x_TX_STRUCTYPE	((UINT16)(BIT4 \| BIT3))	hfa384x.h
30799	HFA384x_TX_TXEX	((UINT16)BIT2)	hfa384x.h
30800	HFA384x_TX_TXOK	((UINT16)BIT1)	hfa384x.h
30801	HFA384x_RX_DATA_LEN_OFF	((UINT16)44)	hfa384x.h
30802	HFA384x_RX_80211HDR_OFF	((UINT16)14)	hfa384x.h
30803	HFA384x_RX_DATA_OFF	((UINT16)60)	hfa384x.h
30804	HFA384x_RXSTATUS_MSGTYPE	((UINT16)(BIT15 \| BIT14 \| BIT13))	hfa384x.h
30805	HFA384x_RXSTATUS_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
30806	HFA384x_RXSTATUS_UNDECR	((UINT16)BIT1)	hfa384x.h
30807	HFA384x_RXSTATUS_FCSERR	((UINT16)BIT0)	hfa384x.h
30808	HFA384x_IT_HANDOVERADDR	((UINT16)0xF000UL)	hfa384x.h
30809	HFA384x_IT_HANDOVERDEAUTHADDRES	((UINT16)0xF001UL)	hfa384x.h	AP 1.3.7
30810	HFA384x_IT_COMMTALLIES	((UINT16)0xF100UL)	hfa384x.h
30811	HFA384x_IT_SCANRESULTS	((UINT16)0xF101UL)	hfa384x.h
30812	HFA384x_IT_CHINFORESULTS	((UINT16)0xF102UL)	hfa384x.h
30813	HFA384x_IT_HOSTSCANRESULTS	((UINT16)0xF103UL)	hfa384x.h
30814	HFA384x_IT_LINKSTATUS	((UINT16)0xF200UL)	hfa384x.h
30815	HFA384x_IT_ASSOCSTATUS	((UINT16)0xF201UL)	hfa384x.h
30816	HFA384x_IT_AUTHREQ	((UINT16)0xF202UL)	hfa384x.h
30817	HFA384x_IT_PSUSERCNT	((UINT16)0xF203UL)	hfa384x.h
30818	HFA384x_IT_KEYIDCHANGED	((UINT16)0xF204UL)	hfa384x.h
30819	HFA384x_IT_ASSOCREQ	((UINT16)0xF205UL)	hfa384x.h
30820	HFA384x_IT_MICFAILURE	((UINT16)0xF206UL)	hfa384x.h
30821	HFA384x_CHINFORESULT_BSSACTIVE	BIT0	hfa384x.h
30822	HFA384x_CHINFORESULT_PCFACTIVE	BIT1	hfa384x.h
30823	HFA384x_LINK_NOTCONNECTED	((UINT16)0)	hfa384x.h
30824	HFA384x_LINK_CONNECTED	((UINT16)1)	hfa384x.h
30825	HFA384x_LINK_DISCONNECTED	((UINT16)2)	hfa384x.h
30826	HFA384x_LINK_AP_CHANGE	((UINT16)3)	hfa384x.h
30827	HFA384x_LINK_AP_OUTOFRANGE	((UINT16)4)	hfa384x.h
30828	HFA384x_LINK_AP_INRANGE	((UINT16)5)	hfa384x.h
30829	HFA384x_LINK_ASSOCFAIL	((UINT16)6)	hfa384x.h
30830	HFA384x_ASSOCSTATUS_STAASSOC	((UINT16)1)	hfa384x.h
30831	HFA384x_ASSOCSTATUS_REASSOC	((UINT16)2)	hfa384x.h
30832	HFA384x_ASSOCSTATUS_DISASSOC	((UINT16)3)	hfa384x.h
30833	HFA384x_ASSOCSTATUS_ASSOCFAIL	((UINT16)4)	hfa384x.h
30834	HFA384x_ASSOCSTATUS_AUTHFAIL	((UINT16)5)	hfa384x.h
30835	HFA384x_ASSOCREQ_TYPE_ASSOC	0	hfa384x.h
30836	HFA384x_ASSOCREQ_TYPE_REASSOC	1	hfa384x.h
30837	HFA384x_USB_ENBULKIN	6	hfa384x.h
30838	HFA384x_USB_TXFRM	0	hfa384x.h
30839	HFA384x_USB_CMDREQ	1	hfa384x.h
30840	HFA384x_USB_WRIDREQ	2	hfa384x.h
30841	HFA384x_USB_RRIDREQ	3	hfa384x.h
30842	HFA384x_USB_WMEMREQ	4	hfa384x.h
30843	HFA384x_USB_RMEMREQ	5	hfa384x.h
30844	HFA384x_USB_INFOFRM	0x8000	hfa384x.h
30845	HFA384x_USB_CMDRESP	0x8001	hfa384x.h
30846	HFA384x_USB_WRIDRESP	0x8002	hfa384x.h
30847	HFA384x_USB_RRIDRESP	0x8003	hfa384x.h
30848	HFA384x_USB_WMEMRESP	0x8004	hfa384x.h
30849	HFA384x_USB_RMEMRESP	0x8005	hfa384x.h
30850	HFA384x_USB_BUFAVAIL	0x8006	hfa384x.h
30851	HFA384x_USB_ERROR	0x8007	hfa384x.h
30852	MAX_PRISM2_GRP_ADDR	16	hfa384x.h
30853	MAX_GRP_ADDR	32	hfa384x.h
30854	WLAN_COMMENT_MAX	80	hfa384x.h	Max. length of user comment string.
30855	MM_SAT_PCF	(BIT14)	hfa384x.h
30856	MM_GCSD_PCF	(BIT15)	hfa384x.h
30857	MM_GCSD_PCF_EB	(BIT14 \| BIT15)	hfa384x.h
30858	WLAN_STATE_STOPPED	0	hfa384x.h	Network is not active.
30859	WLAN_STATE_STARTED	1	hfa384x.h	Network has been started.
30860	WLAN_AUTH_MAX	60	hfa384x.h	Max. # of authenticated stations.
30861	WLAN_ACCESS_MAX	60	hfa384x.h	Max. # of stations in an access list.
30862	WLAN_ACCESS_NONE	0	hfa384x.h	No stations may be authenticated.
30863	WLAN_ACCESS_ALL	1	hfa384x.h	All stations may be authenticated.
30864	WLAN_ACCESS_ALLOW	2	hfa384x.h	Authenticate only "allowed" stations.
30865	WLAN_ACCESS_DENY	3	hfa384x.h	Do not authenticate "denied" stations.
30866	hfa384x_getreg	__hfa384x_getreg_noswap	hfa384x.h
30867	hfa384x_setreg	__hfa384x_setreg_noswap	hfa384x.h
30868	hfa384x_getreg_noswap	__hfa384x_getreg	hfa384x.h
30869	hfa384x_setreg_noswap	__hfa384x_setreg	hfa384x.h
30870	hfa384x_getreg	__hfa384x_getreg	hfa384x.h
30871	hfa384x_setreg	__hfa384x_setreg	hfa384x.h
30872	hfa384x_getreg_noswap	__hfa384x_getreg_noswap	hfa384x.h
30873	hfa384x_setreg_noswap	__hfa384x_setreg_noswap	hfa384x.h
30874	MTNIC_MAX_PORTS	2	mtnic.h
30875	MTNIC_PORT1	0	mtnic.h
30876	MTNIC_PORT2	1	mtnic.h
30877	NUM_TX_RINGS	1	mtnic.h
30878	NUM_RX_RINGS	1	mtnic.h
30879	NUM_CQS	(NUM_RX_RINGS + NUM_TX_RINGS)	mtnic.h
30880	GO_BIT_TIMEOUT	6000	mtnic.h
30881	TBIT_RETRIES	100	mtnic.h
30882	UNITS_BUFFER_SIZE	8	mtnic.h	can be configured to 4/8/16
30883	MAX_GAP_PROD_CONS	( UNITS_BUFFER_SIZE / 4 )	mtnic.h
30884	ETH_DEF_LEN	1540	mtnic.h	40 bytes used by the card
30885	ETH_FCS_LEN	14	mtnic.h
30886	DEF_MTU	ETH_DEF_LEN + ETH_FCS_LEN	mtnic.h
30887	DEF_IOBUF_SIZE	ETH_DEF_LEN	mtnic.h
30888	MAC_ADDRESS_SIZE	6	mtnic.h
30889	NUM_EQES	16	mtnic.h
30890	ROUND_TO_CHECK	0x400	mtnic.h
30891	DELAY_LINK_CHECK	300	mtnic.h
30892	CHECK_LINK_TIMES	7	mtnic.h
30893	dma_addr_t	unsigned long	mtnic.h
30894	PAGE_SIZE	4096	mtnic.h
30895	PAGE_MASK	(PAGE_SIZE - 1)	mtnic.h
30896	MTNIC_MAILBOX_SIZE	PAGE_SIZE	mtnic.h
30897	MTNIC_RESET_OFFSET	0xF0010	mtnic.h
30898	MXGEFW_VERSION_MAJOR	1	myri10ge_mcp.h
30899	MXGEFW_VERSION_MINOR	4	myri10ge_mcp.h
30900	MXGEFW_RSS_HASH_NULL	(0 << 14)	myri10ge_mcp.h	bit 15:14 = 00
30901	MXGEFW_RSS_HASH_IPV4	(1 << 14)	myri10ge_mcp.h	bit 15:14 = 01
30902	MXGEFW_RSS_HASH_TCP_IPV4	(2 << 14)	myri10ge_mcp.h	bit 15:14 = 10
30903	MXGEFW_RSS_HASH_MASK	(3 << 14)	myri10ge_mcp.h	bit 15:14 = 11
30904	MXGEFW_FLAGS_SMALL	0x1	myri10ge_mcp.h
30905	MXGEFW_FLAGS_TSO_HDR	0x1	myri10ge_mcp.h
30906	MXGEFW_FLAGS_FIRST	0x2	myri10ge_mcp.h
30907	MXGEFW_FLAGS_ALIGN_ODD	0x4	myri10ge_mcp.h
30908	MXGEFW_FLAGS_CKSUM	0x8	myri10ge_mcp.h
30909	MXGEFW_FLAGS_TSO_LAST	0x8	myri10ge_mcp.h
30910	MXGEFW_FLAGS_NO_TSO	0x10	myri10ge_mcp.h
30911	MXGEFW_FLAGS_TSO_CHOP	0x10	myri10ge_mcp.h
30912	MXGEFW_FLAGS_TSO_PLD	0x20	myri10ge_mcp.h
30913	MXGEFW_SEND_SMALL_SIZE	1520	myri10ge_mcp.h
30914	MXGEFW_MAX_MTU	9400	myri10ge_mcp.h
30915	MXGEFW_MAX_SEND_DESC	12	myri10ge_mcp.h
30916	MXGEFW_PAD	2	myri10ge_mcp.h
30917	MXGEFW_BOOT_HANDOFF	0xfc0000	myri10ge_mcp.h
30918	MXGEFW_BOOT_DUMMY_RDMA	0xfc01c0	myri10ge_mcp.h
30919	MXGEFW_ETH_CMD	0xf80000	myri10ge_mcp.h
30920	MXGEFW_ETH_SEND_4	0x200000	myri10ge_mcp.h
30921	MXGEFW_ETH_SEND_1	0x240000	myri10ge_mcp.h
30922	MXGEFW_ETH_SEND_2	0x280000	myri10ge_mcp.h
30923	MXGEFW_ETH_SEND_3	0x2c0000	myri10ge_mcp.h
30924	MXGEFW_ETH_RECV_SMALL	0x300000	myri10ge_mcp.h
30925	MXGEFW_ETH_RECV_BIG	0x340000	myri10ge_mcp.h
30926	MXGEFW_ETH_SEND_GO	0x380000	myri10ge_mcp.h
30927	MXGEFW_ETH_SEND_STOP	0x3C0000	myri10ge_mcp.h
30928	MXGEFW_OLD_IRQ_DATA_LEN	40	myri10ge_mcp.h
30929	MXGEFW_NETQ_FILTERTYPE_NONE	0	myri10ge_mcp.h
30930	MXGEFW_NETQ_FILTERTYPE_MACADDR	1	myri10ge_mcp.h
30931	MXGEFW_NETQ_FILTERTYPE_VLAN	2	myri10ge_mcp.h
30932	MXGEFW_NETQ_FILTERTYPE_VLANMACA	3	myri10ge_mcp.h
30933	NATSEMI_HW_TIMEOUT	400	natsemi.h
30934	TX_RING_SIZE	4	natsemi.h
30935	NUM_RX_DESC	4	natsemi.h
30936	RX_BUF_SIZE	1536	natsemi.h
30937	OWN	0x80000000	natsemi.h
30938	DSIZE	0x00000FFF	natsemi.h
30939	CRC_SIZE	4	natsemi.h
30940	PHYID_AM79C874	0x0022561b	natsemi.h
30941	SRR_DP83815_C	0x0302	natsemi.h
30942	SRR_DP83815_D	0x0403	natsemi.h
30943	SRR_DP83816_A4	0x0504	natsemi.h
30944	SRR_DP83816_A5	0x0505	natsemi.h
30945	PMDCSR_VAL	0x189c	natsemi.h	enable preferred adaptation circuitry
30946	TSTDAT_VAL	0x0	natsemi.h
30947	DSPCFG_VAL	0x5040	natsemi.h
30948	SDCFG_VAL	0x008c	natsemi.h	set voltage thresholds for Signal Detect
30949	DSPCFG_LOCK	0x20	natsemi.h	coefficient lock bit in DSPCFG
30950	DSPCFG_COEF	0x1000	natsemi.h	see coefficient (in TSTDAT) bit in DSPCFG
30951	TSTDAT_FIXED	0xe8	natsemi.h	magic number for bad coefficients
30952	CFG_RESET_SAVE	0xfde000	natsemi.h
30953	WCSR_RESET_SAVE	0x61f	natsemi.h
30954	RFCR_RESET_SAVE	0xf8500000;	natsemi.h
30955	EE_Write0	(EE_ChipSelect)	natsemi.h
30956	EE_Write1	(EE_ChipSelect \| EE_DataIn)	natsemi.h
30957	EE_CS	0x08	natsemi.h	EEPROM chip select
30958	EE_SK	0x04	natsemi.h	EEPROM shift clock
30959	EE_DI	0x01	natsemi.h	Data in
30960	EE_DO	0x02	natsemi.h	Data out
30961	EE_MAC	7	natsemi.h
30962	EE_REG	EECtrl	natsemi.h
30963	VENDOR_NONE	0	ns8390.h
30964	VENDOR_WD	1	ns8390.h
30965	VENDOR_NOVELL	2	ns8390.h
30966	VENDOR_3COM	3	ns8390.h
30967	FLAG_PIO	0x01	ns8390.h
30968	FLAG_16BIT	0x02	ns8390.h
30969	FLAG_790	0x04	ns8390.h
30970	MEM_8192	32	ns8390.h
30971	MEM_16384	64	ns8390.h
30972	MEM_32768	128	ns8390.h
30973	ISA_MAX_ADDR	0x400	ns8390.h
30974	WD_LOW_BASE	0x200	ns8390.h
30975	WD_HIGH_BASE	0x3e0	ns8390.h
30976	WD_DEFAULT_MEM	0xD0000	ns8390.h
30977	WD_NIC_ADDR	0x10	ns8390.h
30978	WD_MSR	0x00	ns8390.h
30979	WD_ICR	0x01	ns8390.h
30980	WD_IAR	0x02	ns8390.h
30981	WD_BIO	0x03	ns8390.h
30982	WD_IRR	0x04	ns8390.h
30983	WD_LAAR	0x05	ns8390.h
30984	WD_IJR	0x06	ns8390.h
30985	WD_GP2	0x07	ns8390.h
30986	WD_LAR	0x08	ns8390.h
30987	WD_BID	0x0E	ns8390.h
30988	WD_ICR_16BIT	0x01	ns8390.h
30989	WD_MSR_MENB	0x40	ns8390.h
30990	WD_LAAR_L16EN	0x40	ns8390.h
30991	WD_LAAR_M16EN	0x80	ns8390.h
30992	WD_SOFTCONFIG	0x20	ns8390.h
30993	TYPE_WD8003S	0x02	ns8390.h
30994	TYPE_WD8003E	0x03	ns8390.h
30995	TYPE_WD8013EBT	0x05	ns8390.h
30996	TYPE_WD8003W	0x24	ns8390.h
30997	TYPE_WD8003EB	0x25	ns8390.h
30998	TYPE_WD8013W	0x26	ns8390.h
30999	TYPE_WD8013EP	0x27	ns8390.h
31000	TYPE_WD8013WC	0x28	ns8390.h
31001	TYPE_WD8013EPC	0x29	ns8390.h
31002	TYPE_SMC8216T	0x2a	ns8390.h
31003	TYPE_SMC8216C	0x2b	ns8390.h
31004	TYPE_SMC8416T	0x00	ns8390.h	Bogus entries: the 8416 generates the
31005	TYPE_SMC8416C	0x00	ns8390.h	the same codes as the 8216.
31006	TYPE_SMC8013EBP	0x2c	ns8390.h
31007	_3COM_BASE	0x300	ns8390.h
31008	_3COM_TX_PAGE_OFFSET_8BIT	0x20	ns8390.h
31009	_3COM_TX_PAGE_OFFSET_16BIT	0x0	ns8390.h
31010	_3COM_RX_PAGE_OFFSET_16BIT	0x20	ns8390.h
31011	_3COM_ASIC_OFFSET	0x400	ns8390.h
31012	_3COM_NIC_OFFSET	0x0	ns8390.h
31013	_3COM_PSTR	0	ns8390.h
31014	_3COM_PSPR	1	ns8390.h
31015	_3COM_BCFR	3	ns8390.h
31016	_3COM_BCFR_2E0	0x01	ns8390.h
31017	_3COM_BCFR_2A0	0x02	ns8390.h
31018	_3COM_BCFR_280	0x04	ns8390.h
31019	_3COM_BCFR_250	0x08	ns8390.h
31020	_3COM_BCFR_350	0x10	ns8390.h
31021	_3COM_BCFR_330	0x20	ns8390.h
31022	_3COM_BCFR_310	0x40	ns8390.h
31023	_3COM_BCFR_300	0x80	ns8390.h
31024	_3COM_PCFR	4	ns8390.h
31025	_3COM_PCFR_PIO	0	ns8390.h
31026	_3COM_PCFR_C8000	0x10	ns8390.h
31027	_3COM_PCFR_CC000	0x20	ns8390.h
31028	_3COM_PCFR_D8000	0x40	ns8390.h
31029	_3COM_PCFR_DC000	0x80	ns8390.h
31030	_3COM_CR	6	ns8390.h
31031	_3COM_CR_RST	0x01	ns8390.h	Reset GA and NIC
31032	_3COM_CR_XSEL	0x02	ns8390.h	Transceiver select. BNC=1(def) AUI=0
31033	_3COM_CR_EALO	0x04	ns8390.h	window EA PROM 0-15 to I/O base
31034	_3COM_CR_EAHI	0x08	ns8390.h	window EA PROM 16-31 to I/O base
31035	_3COM_CR_SHARE	0x10	ns8390.h	select interrupt sharing option
31036	_3COM_CR_DBSEL	0x20	ns8390.h	Double buffer select
31037	_3COM_CR_DDIR	0x40	ns8390.h	DMA direction select
31038	_3COM_CR_START	0x80	ns8390.h	Start DMA controller
31039	_3COM_GACFR	5	ns8390.h
31040	_3COM_GACFR_MBS0	0x01	ns8390.h
31041	_3COM_GACFR_MBS1	0x02	ns8390.h
31042	_3COM_GACFR_MBS2	0x04	ns8390.h
31043	_3COM_GACFR_RSEL	0x08	ns8390.h	enable shared memory
31044	_3COM_GACFR_TEST	0x10	ns8390.h	for GA testing
31045	_3COM_GACFR_OWS	0x20	ns8390.h	select 0WS access to GA
31046	_3COM_GACFR_TCM	0x40	ns8390.h	Mask DMA interrupts
31047	_3COM_GACFR_NIM	0x80	ns8390.h	Mask NIC interrupts
31048	_3COM_STREG	7	ns8390.h
31049	_3COM_STREG_REV	0x07	ns8390.h	GA revision
31050	_3COM_STREG_DIP	0x08	ns8390.h	DMA in progress
31051	_3COM_STREG_DTC	0x10	ns8390.h	DMA terminal count
31052	_3COM_STREG_OFLW	0x20	ns8390.h	Overflow
31053	_3COM_STREG_UFLW	0x40	ns8390.h	Underflow
31054	_3COM_STREG_DPRDY	0x80	ns8390.h	Data port ready
31055	_3COM_IDCFR	8	ns8390.h
31056	_3COM_IDCFR_DRQ0	0x01	ns8390.h	DMA request 1 select
31057	_3COM_IDCFR_DRQ1	0x02	ns8390.h	DMA request 2 select
31058	_3COM_IDCFR_DRQ2	0x04	ns8390.h	DMA request 3 select
31059	_3COM_IDCFR_UNUSED	0x08	ns8390.h	not used
31060	_3COM_IDCFR_IRQ2	0x10	ns8390.h	Interrupt request 2 select
31061	_3COM_IDCFR_IRQ3	0x20	ns8390.h	Interrupt request 3 select
31062	_3COM_IDCFR_IRQ4	0x40	ns8390.h	Interrupt request 4 select
31063	_3COM_IDCFR_IRQ5	0x80	ns8390.h	Interrupt request 5 select
31064	_3COM_IRQ2	2	ns8390.h
31065	_3COM_IRQ3	3	ns8390.h
31066	_3COM_IRQ4	4	ns8390.h
31067	_3COM_IRQ5	5	ns8390.h
31068	_3COM_DAMSB	9	ns8390.h
31069	_3COM_DALSB	0x0a	ns8390.h
31070	_3COM_VPTR2	0x0b	ns8390.h
31071	_3COM_VPTR1	0x0c	ns8390.h
31072	_3COM_VPTR0	0x0d	ns8390.h
31073	_3COM_RFMSB	0x0e	ns8390.h
31074	_3COM_RFLSB	0x0f	ns8390.h
31075	NE_ASIC_OFFSET	0x10	ns8390.h
31076	NE_RESET	0x0F	ns8390.h	Used to reset card
31077	NE_DATA	0x00	ns8390.h	Used to read/write NIC mem
31078	COMPEX_RL2000_TRIES	200	ns8390.h
31079	D8390_P0_COMMAND	0x00	ns8390.h
31080	D8390_P0_PSTART	0x01	ns8390.h
31081	D8390_P0_PSTOP	0x02	ns8390.h
31082	D8390_P0_BOUND	0x03	ns8390.h
31083	D8390_P0_TSR	0x04	ns8390.h
31084	D8390_P0_TPSR	0x04	ns8390.h
31085	D8390_P0_TBCR0	0x05	ns8390.h
31086	D8390_P0_TBCR1	0x06	ns8390.h
31087	D8390_P0_ISR	0x07	ns8390.h
31088	D8390_P0_RSAR0	0x08	ns8390.h
31089	D8390_P0_RSAR1	0x09	ns8390.h
31090	D8390_P0_RBCR0	0x0A	ns8390.h
31091	D8390_P0_RBCR1	0x0B	ns8390.h
31092	D8390_P0_RSR	0x0C	ns8390.h
31093	D8390_P0_RCR	0x0C	ns8390.h
31094	D8390_P0_TCR	0x0D	ns8390.h
31095	D8390_P0_DCR	0x0E	ns8390.h
31096	D8390_P0_IMR	0x0F	ns8390.h
31097	D8390_P1_COMMAND	0x00	ns8390.h
31098	D8390_P1_PAR0	0x01	ns8390.h
31099	D8390_P1_PAR1	0x02	ns8390.h
31100	D8390_P1_PAR2	0x03	ns8390.h
31101	D8390_P1_PAR3	0x04	ns8390.h
31102	D8390_P1_PAR4	0x05	ns8390.h
31103	D8390_P1_PAR5	0x06	ns8390.h
31104	D8390_P1_CURR	0x07	ns8390.h
31105	D8390_P1_MAR0	0x08	ns8390.h
31106	D8390_COMMAND_PS0	0x0	ns8390.h	Page 0 select
31107	D8390_COMMAND_PS1	0x40	ns8390.h	Page 1 select
31108	D8390_COMMAND_PS2	0x80	ns8390.h	Page 2 select
31109	D8390_COMMAND_RD2	0x20	ns8390.h	Remote DMA control
31110	D8390_COMMAND_RD1	0x10	ns8390.h
31111	D8390_COMMAND_RD0	0x08	ns8390.h
31112	D8390_COMMAND_TXP	0x04	ns8390.h	transmit packet
31113	D8390_COMMAND_STA	0x02	ns8390.h	start
31114	D8390_COMMAND_STP	0x01	ns8390.h	stop
31115	D8390_RCR_MON	0x20	ns8390.h	monitor mode
31116	D8390_DCR_FT1	0x40	ns8390.h
31117	D8390_DCR_LS	0x08	ns8390.h	Loopback select
31118	D8390_DCR_WTS	0x01	ns8390.h	Word transfer select
31119	D8390_ISR_PRX	0x01	ns8390.h	successful recv
31120	D8390_ISR_PTX	0x02	ns8390.h	successful xmit
31121	D8390_ISR_RXE	0x04	ns8390.h	receive error
31122	D8390_ISR_TXE	0x08	ns8390.h	transmit error
31123	D8390_ISR_OVW	0x10	ns8390.h	Overflow
31124	D8390_ISR_CNT	0x20	ns8390.h	Counter overflow
31125	D8390_ISR_RDC	0x40	ns8390.h	Remote DMA complete
31126	D8390_ISR_RST	0x80	ns8390.h	reset
31127	D8390_RSTAT_PRX	0x01	ns8390.h	successful recv
31128	D8390_RSTAT_CRC	0x02	ns8390.h	CRC error
31129	D8390_RSTAT_FAE	0x04	ns8390.h	Frame alignment error
31130	D8390_RSTAT_OVER	0x08	ns8390.h	FIFO overrun
31131	D8390_TXBUF_SIZE	6	ns8390.h
31132	D8390_RXBUF_END	32	ns8390.h
31133	D8390_PAGE_SIZE	256	ns8390.h
31134	WLAN_ADDR_LEN	6	p80211hdr.h
31135	WLAN_CRC_LEN	4	p80211hdr.h
31136	WLAN_BSSID_LEN	6	p80211hdr.h
31137	WLAN_BSS_TS_LEN	8	p80211hdr.h
31138	WLAN_HDR_A3_LEN	24	p80211hdr.h
31139	WLAN_HDR_A4_LEN	30	p80211hdr.h
31140	WLAN_SSID_MAXLEN	32	p80211hdr.h
31141	WLAN_DATA_MAXLEN	2312	p80211hdr.h
31142	WLAN_A3FR_MAXLEN	(WLAN_HDR_A3_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)	p80211hdr.h
31143	WLAN_A4FR_MAXLEN	(WLAN_HDR_A4_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)	p80211hdr.h
31144	WLAN_BEACON_FR_MAXLEN	(WLAN_HDR_A3_LEN + 334)	p80211hdr.h
31145	WLAN_ATIM_FR_MAXLEN	(WLAN_HDR_A3_LEN + 0)	p80211hdr.h
31146	WLAN_DISASSOC_FR_MAXLEN	(WLAN_HDR_A3_LEN + 2)	p80211hdr.h
31147	WLAN_ASSOCREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 48)	p80211hdr.h
31148	WLAN_ASSOCRESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 16)	p80211hdr.h
31149	WLAN_REASSOCREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 54)	p80211hdr.h
31150	WLAN_REASSOCRESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 16)	p80211hdr.h
31151	WLAN_PROBEREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 44)	p80211hdr.h
31152	WLAN_PROBERESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 78)	p80211hdr.h
31153	WLAN_AUTHEN_FR_MAXLEN	(WLAN_HDR_A3_LEN + 261)	p80211hdr.h
31154	WLAN_DEAUTHEN_FR_MAXLEN	(WLAN_HDR_A3_LEN + 2)	p80211hdr.h
31155	WLAN_WEP_NKEYS	4	p80211hdr.h
31156	WLAN_WEP_MAXKEYLEN	13	p80211hdr.h
31157	WLAN_CHALLENGE_IE_LEN	130	p80211hdr.h
31158	WLAN_CHALLENGE_LEN	128	p80211hdr.h
31159	WLAN_WEP_IV_LEN	4	p80211hdr.h
31160	WLAN_WEP_ICV_LEN	4	p80211hdr.h
31161	WLAN_FTYPE_MGMT	0x00	p80211hdr.h
31162	WLAN_FTYPE_CTL	0x01	p80211hdr.h
31163	WLAN_FTYPE_DATA	0x02	p80211hdr.h
31164	WLAN_FSTYPE_ASSOCREQ	0x00	p80211hdr.h
31165	WLAN_FSTYPE_ASSOCRESP	0x01	p80211hdr.h
31166	WLAN_FSTYPE_REASSOCREQ	0x02	p80211hdr.h
31167	WLAN_FSTYPE_REASSOCRESP	0x03	p80211hdr.h
31168	WLAN_FSTYPE_PROBEREQ	0x04	p80211hdr.h
31169	WLAN_FSTYPE_PROBERESP	0x05	p80211hdr.h
31170	WLAN_FSTYPE_BEACON	0x08	p80211hdr.h
31171	WLAN_FSTYPE_ATIM	0x09	p80211hdr.h
31172	WLAN_FSTYPE_DISASSOC	0x0a	p80211hdr.h
31173	WLAN_FSTYPE_AUTHEN	0x0b	p80211hdr.h
31174	WLAN_FSTYPE_DEAUTHEN	0x0c	p80211hdr.h
31175	WLAN_FSTYPE_BLOCKACKREQ	0x8	p80211hdr.h
31176	WLAN_FSTYPE_BLOCKACK	0x9	p80211hdr.h
31177	WLAN_FSTYPE_PSPOLL	0x0a	p80211hdr.h
31178	WLAN_FSTYPE_RTS	0x0b	p80211hdr.h
31179	WLAN_FSTYPE_CTS	0x0c	p80211hdr.h
31180	WLAN_FSTYPE_ACK	0x0d	p80211hdr.h
31181	WLAN_FSTYPE_CFEND	0x0e	p80211hdr.h
31182	WLAN_FSTYPE_CFENDCFACK	0x0f	p80211hdr.h
31183	WLAN_FSTYPE_DATAONLY	0x00	p80211hdr.h
31184	WLAN_FSTYPE_DATA_CFACK	0x01	p80211hdr.h
31185	WLAN_FSTYPE_DATA_CFPOLL	0x02	p80211hdr.h
31186	WLAN_FSTYPE_DATA_CFACK_CFPOLL	0x03	p80211hdr.h
31187	WLAN_FSTYPE_NULL	0x04	p80211hdr.h
31188	WLAN_FSTYPE_CFACK	0x05	p80211hdr.h
31189	WLAN_FSTYPE_CFPOLL	0x06	p80211hdr.h
31190	WLAN_FSTYPE_CFACK_CFPOLL	0x07	p80211hdr.h
31191	WLAN_FCS_LEN	4	p80211hdr.h
31192	PNIC_PCI_VENDOR	0xfefe	pnic_api.h	Hopefully these won't clash with
31193	PNIC_PCI_DEVICE	0xefef	pnic_api.h	any real PCI device IDs.
31194	PNIC_REG_CMD	0x00	pnic_api.h	Command register, 2 bytes, write only
31195	PNIC_REG_STAT	0x00	pnic_api.h	Status register, 2 bytes, read only
31196	PNIC_REG_LEN	0x02	pnic_api.h	Length register, 2 bytes, read-write
31197	PNIC_REG_DATA	0x04	pnic_api.h	Data port, 1 byte, read-write
31198	PNIC_MAX_REG	0x04	pnic_api.h
31199	PNIC_CMD_NOOP	0x0000	pnic_api.h
31200	PNIC_CMD_API_VER	0x0001	pnic_api.h
31201	PNIC_CMD_READ_MAC	0x0002	pnic_api.h
31202	PNIC_CMD_RESET	0x0003	pnic_api.h
31203	PNIC_CMD_XMIT	0x0004	pnic_api.h
31204	PNIC_CMD_RECV	0x0005	pnic_api.h
31205	PNIC_CMD_RECV_QLEN	0x0006	pnic_api.h
31206	PNIC_CMD_MASK_IRQ	0x0007	pnic_api.h
31207	PNIC_CMD_FORCE_IRQ	0x0008	pnic_api.h
31208	PNIC_STATUS_OK	0x4f4b	pnic_api.h	'OK'
31209	PNIC_STATUS_UNKNOWN_CMD	0x3f3f	pnic_api.h	'??'
31210	PNIC_API_VERSION	0x0101	pnic_api.h	1.1
31211	PCI_EXP_DEVCTL	8	r8169.h	Device Control
31212	PCI_EXP_DEVCTL_READRQ	0x7000	r8169.h	Max_Read_Request_Size
31213	PCI_EXP_LNKCTL	16	r8169.h	Link Control
31214	PCI_EXP_LNKCTL_CLKREQ_EN	0x100	r8169.h	Enable clkreq
31215	PCI_EXP_DEVCTL_NOSNOOP_EN	0x0800	r8169.h	Enable No Snoop
31216	SPEED_10	10	r8169.h
31217	SPEED_100	100	r8169.h
31218	SPEED_1000	1000	r8169.h
31219	SPEED_2500	2500	r8169.h
31220	SPEED_10000	10000	r8169.h
31221	DUPLEX_HALF	0x00	r8169.h
31222	DUPLEX_FULL	0x01	r8169.h
31223	AUTONEG_DISABLE	0x00	r8169.h
31224	AUTONEG_ENABLE	0x01	r8169.h
31225	MAC_ADDR_LEN	6	r8169.h
31226	MAX_READ_REQUEST_SHIFT	12	r8169.h
31227	RX_FIFO_THRESH	7	r8169.h	7 means NO threshold, Rx buffer level before first PCI xfer.
31228	RX_DMA_BURST	6	r8169.h	Maximum PCI burst, '6' is 1024
31229	TX_DMA_BURST	6	r8169.h	Maximum PCI burst, '6' is 1024
31230	EarlyTxThld	0x3F	r8169.h	0x3F means NO early transmit
31231	RxPacketMaxSize	0x3FE8	r8169.h	16K - 1 - ETH_HLEN - VLAN - CRC...
31232	SafeMtu	0x1c20	r8169.h	... actually life sucks beyond ~7k
31233	InterFrameGap	0x03	r8169.h	3 means InterFrameGap = the shortest one
31234	R8169_REGS_SIZE	256	r8169.h
31235	R8169_NAPI_WEIGHT	64	r8169.h
31236	NUM_TX_DESC	8	r8169.h	Number of Tx descriptor registers
31237	NUM_RX_DESC	8	r8169.h	Number of Rx descriptor registers
31238	RX_BUF_SIZE	1536	r8169.h	Rx Buffer size
31239	R8169_TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))	r8169.h
31240	R8169_RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))	r8169.h
31241	TX_RING_ALIGN	256	r8169.h
31242	RX_RING_ALIGN	256	r8169.h
31243	RTL8169_TX_TIMEOUT	(6*HZ)	r8169.h
31244	RTL8169_PHY_TIMEOUT	(10*HZ)	r8169.h
31245	RTL_EEPROM_SIG	cpu_to_le32(0x8129)	r8169.h
31246	RTL_EEPROM_SIG_MASK	cpu_to_le32(0xffff)	r8169.h
31247	RTL_EEPROM_SIG_ADDR	0x0000	r8169.h
31248	RsvdMask	0x3fffc000	r8169.h
31249	PCI_VENDOR_ID_SI	0x1039	sis190.h
31250	PHY_MAX_ADDR	32	sis190.h
31251	PHY_ID_ANY	0x1f	sis190.h
31252	MII_REG_ANY	0x1f	sis190.h
31253	DRV_VERSION	"1.3"	sis190.h
31254	DRV_NAME	"sis190"	sis190.h
31255	SIS190_DRIVER_NAME	DRV_NAME " Gigabit Ethernet driver " DRV_VERSION	sis190.h
31256	PFX	DRV_NAME ": "	sis190.h
31257	NUM_TX_DESC	8	sis190.h	[8..1024]
31258	NUM_RX_DESC	8	sis190.h	[8..8192]
31259	TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))	sis190.h
31260	RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))	sis190.h
31261	RX_BUF_SIZE	1536	sis190.h
31262	RX_BUF_MASK	0xfff8	sis190.h
31263	RING_ALIGNMENT	256	sis190.h
31264	SIS190_REGS_SIZE	0x80	sis190.h
31265	EhnMIIread	0x0000	sis190.h
31266	EhnMIIwrite	0x0020	sis190.h
31267	EhnMIIdataShift	16	sis190.h
31268	EhnMIIpmdShift	6	sis190.h	7016 only
31269	EhnMIIregShift	11	sis190.h
31270	EhnMIIreq	0x0010	sis190.h
31271	EhnMIInotDone	0x0010	sis190.h
31272	SIS900_TOTAL_SIZE	0x100	sis900.h
31273	MAX_DMA_RANGE	7	sis900.h	actually 0 means MAXIMUM !!
31274	TxMXDMA_shift	20	sis900.h
31275	RxMXDMA_shift	20	sis900.h
31276	TX_DMA_BURST	0	sis900.h
31277	RX_DMA_BURST	0	sis900.h
31278	TX_FILL_THRESH	16	sis900.h	1/4 FIFO size
31279	TxFILLT_shift	8	sis900.h
31280	TxDRNT_shift	0	sis900.h
31281	TxDRNT_100	48	sis900.h	3/4 FIFO size
31282	TxDRNT_10	16	sis900.h	1/2 FIFO size
31283	RxDRNT_shift	1	sis900.h
31284	RxDRNT_100	16	sis900.h	1/2 FIFO size
31285	RxDRNT_10	24	sis900.h	3/4 FIFO size
31286	RFAA_shift	28	sis900.h
31287	RFADDR_shift	16	sis900.h
31288	MIIread	0x6000	sis900.h
31289	MIIwrite	0x5002	sis900.h
31290	MIIpmdShift	7	sis900.h
31291	MIIregShift	2	sis900.h
31292	MIIcmdLen	16	sis900.h
31293	MIIcmdShift	16	sis900.h
31294	MII_ID1_OUI_LO	0xFC00	sis900.h	low bits of OUI mask
31295	MII_ID1_MODEL	0x03F0	sis900.h	model number
31296	MII_ID1_REV	0x000F	sis900.h	model number
31297	FDX_CAPABLE_DUPLEX_UNKNOWN	0	sis900.h
31298	FDX_CAPABLE_HALF_SELECTED	1	sis900.h
31299	FDX_CAPABLE_FULL_SELECTED	2	sis900.h
31300	HW_SPEED_UNCONFIG	0	sis900.h
31301	HW_SPEED_HOME	1	sis900.h
31302	HW_SPEED_10_MBPS	10	sis900.h
31303	HW_SPEED_100_MBPS	100	sis900.h
31304	HW_SPEED_DEFAULT	(HW_SPEED_100_MBPS)	sis900.h
31305	CRC_SIZE	4	sis900.h
31306	MAC_HEADER_SIZE	14	sis900.h
31307	TX_BUF_SIZE	1536	sis900.h
31308	RX_BUF_SIZE	1536	sis900.h
31309	NUM_RX_DESC	4	sis900.h	Number of Rx descriptor registers.
31310	TX_TIMEOUT	(4*TICKS_PER_SEC)	sis900.h
31311	PCI_DEV_REG1	0x40	skge.h
31312	PCI_PHY_COMA	0x8000000	skge.h
31313	PCI_VIO	0x2000000	skge.h
31314	PCI_DEV_REG2	0x44	skge.h
31315	PCI_VPD_ROM_SZ	7L<<14	skge.h	VPD ROM size 0=256, 1=512, ...
31316	PCI_REV_DESC	1<<2	skge.h	Reverse Descriptor bytes
31317	DRV_NAME	"skge"	skge.h
31318	DRV_VERSION	"1.13"	skge.h
31319	PFX	DRV_NAME " "	skge.h
31320	NUM_TX_DESC	8	skge.h
31321	NUM_RX_DESC	8	skge.h
31322	SKGE_RING_ALIGN	8	skge.h
31323	RX_BUF_SIZE	1536	skge.h
31324	PHY_RETRIES	1000	skge.h
31325	TX_RING_SIZE	( NUM_TX_DESC * sizeof ( struct skge_rx_desc ) )	skge.h
31326	RX_RING_SIZE	( NUM_RX_DESC * sizeof ( struct skge_tx_desc ) )	skge.h
31327	RING_SIZE	( TX_RING_SIZE + RX_RING_SIZE )	skge.h
31328	SKGE_REG_SIZE	0x4000	skge.h
31329	SKGE_EEPROM_MAGIC	0x9933aabb	skge.h
31330	AUTONEG_DISABLE	0x00	skge.h
31331	AUTONEG_ENABLE	0x01	skge.h
31332	DUPLEX_HALF	0x00	skge.h
31333	DUPLEX_FULL	0x01	skge.h
31334	SPEED_10	10	skge.h
31335	SPEED_100	100	skge.h
31336	SPEED_1000	1000	skge.h
31337	ADVERTISED_10baseT_Half	(1 << 0)	skge.h
31338	ADVERTISED_10baseT_Full	(1 << 1)	skge.h
31339	ADVERTISED_100baseT_Half	(1 << 2)	skge.h
31340	ADVERTISED_100baseT_Full	(1 << 3)	skge.h
31341	ADVERTISED_1000baseT_Half	(1 << 4)	skge.h
31342	ADVERTISED_1000baseT_Full	(1 << 5)	skge.h
31343	SUPPORTED_10baseT_Half	(1 << 0)	skge.h
31344	SUPPORTED_10baseT_Full	(1 << 1)	skge.h
31345	SUPPORTED_100baseT_Half	(1 << 2)	skge.h
31346	SUPPORTED_100baseT_Full	(1 << 3)	skge.h
31347	SUPPORTED_1000baseT_Half	(1 << 4)	skge.h
31348	SUPPORTED_1000baseT_Full	(1 << 5)	skge.h
31349	SUPPORTED_Autoneg	(1 << 6)	skge.h
31350	SUPPORTED_TP	(1 << 7)	skge.h
31351	SUPPORTED_FIBRE	(1 << 10)	skge.h
31352	PCI_STATUS_ERROR_BITS	(PCI_STATUS_DETECTED_PARITY \| \ PCI_STATUS_SIG_SYSTEM_ERROR \| \ PCI_STATUS_REC_MASTER_ABORT \| \ PCI_STATUS_REC_TARGET_ABORT \| \	skge.h
31353	RAM_ADR_RAN	0x0007ffffL	skge.h	Bit 18.. 0: RAM Address Range
31354	SK_MAC_TO_53	72	skge.h	MAC arbiter timeout
31355	SK_PKT_TO_53	0x2000	skge.h	Packet arbiter timeout
31356	SK_PKT_TO_MAX	0xffff	skge.h	Maximum value
31357	SK_RI_TO_53	36	skge.h	RAM interface timeout
31358	PA_ENA_TO_ALL	(PA_ENA_TO_RX1 \| PA_ENA_TO_RX2 \|\ PA_ENA_TO_TX1 \| PA_ENA_TO_TX2)	skge.h
31359	TXA_MAX_VAL	0x00ffffffUL	skge.h	Bit 23.. 0: Max TXA Timer/Cnt Val
31360	CSR_SET_RESET	(CSR_DESC_SET \| CSR_FIFO_SET \| CSR_HPI_RST \|\ CSR_SV_RST \| CSR_DREAD_RST \| CSR_DWRITE_RST \|\ CSR_TRANS_RST)	skge.h
31361	CSR_CLR_RESET	(CSR_DESC_CLR \| CSR_FIFO_CLR \| CSR_HPI_RUN \|\ CSR_SV_RUN \| CSR_DREAD_RUN \| CSR_DWRITE_RUN \|\ CSR_TRANS_RUN)	skge.h
31362	RB_MSK	0x0007ffff	skge.h	Bit 18.. 0: RAM Buffer Pointer Bits
31363	SK_XMIT_DUR	0x002faf08UL	skge.h	50 ms
31364	SK_BLK_DUR	0x01dcd650UL	skge.h	500 ms
31365	SK_DPOLL_DEF	0x00ee6b28UL	skge.h	250 ms at 62.5 MHz
31366	SK_DPOLL_MAX	0x00ffffffUL	skge.h	268 ms at 62.5 MHz
31367	SK_FACT_62	100	skge.h	is given in percent
31368	SK_FACT_53	85	skge.h	on GENESIS: 53.12 MHz
31369	SK_FACT_78	125	skge.h	on YUKON: 78.12 MHz
31370	PHY_B_AS_PAUSE_MSK	(PHY_B_AS_PRR \| PHY_B_AS_PRT)	skge.h
31371	PHY_B_DEF_MSK	(~(PHY_B_IS_PSE \| PHY_B_IS_AN_PR \| PHY_B_IS_DUP_CHANGE \| \ PHY_B_IS_LSP_CHANGE \| PHY_B_IS_LST_CHANGE))	skge.h
31372	PHY_M_PS_PAUSE_MSK	(PHY_M_PS_TX_P_EN \| PHY_M_PS_RX_P_EN)	skge.h
31373	GM_MIB_CNT_BASE	0x0100	skge.h	Base Address of MIB Counters
31374	GM_MIB_CNT_SIZE	44	skge.h	Number of MIB Counters
31375	GM_GPCR_SPEED_1000	(GM_GPCR_GIGS_ENA \| GM_GPCR_SPEED_100)	skge.h
31376	GM_GPCR_AU_ALL_DIS	(GM_GPCR_AU_DUP_DIS \| GM_GPCR_AU_FCT_DIS\|GM_GPCR_AU_SPD_DIS)	skge.h
31377	TX_COL_DEF	0x04	skge.h	late collision after 64 byte
31378	DATA_BLIND_DEF	0x04	skge.h
31379	IPG_DATA_DEF	0x1e	skge.h
31380	GPC_HWCFG_GMII_COP	(GPC_HWCFG_M_3\|GPC_HWCFG_M_2 \| GPC_HWCFG_M_1 \| GPC_HWCFG_M_0)	skge.h
31381	GPC_HWCFG_GMII_FIB	(GPC_HWCFG_M_2 \| GPC_HWCFG_M_1 \| GPC_HWCFG_M_0)	skge.h
31382	GPC_ANEG_ADV_ALL_M	(GPC_ANEG_3 \| GPC_ANEG_2 \| GPC_ANEG_1 \| GPC_ANEG_0)	skge.h
31383	GPC_FRC10MBIT_HALF	0	skge.h
31384	GPC_FRC10MBIT_FULL	GPC_ANEG_0	skge.h
31385	GPC_FRC100MBIT_HALF	GPC_ANEG_1	skge.h
31386	GPC_FRC100MBIT_FULL	(GPC_ANEG_0 \| GPC_ANEG_1)	skge.h
31387	GPC_ADV_1000_HALF	GPC_ANEG_2	skge.h
31388	GPC_ADV_1000_FULL	GPC_ANEG_3	skge.h
31389	GPC_ADV_ALL	(GPC_ANEG_2 \| GPC_ANEG_3)	skge.h
31390	GPC_FORCE_MASTER	0	skge.h
31391	GPC_FORCE_SLAVE	GPC_ANEG_0	skge.h
31392	GPC_PREF_MASTER	GPC_ANEG_1	skge.h
31393	GPC_PREF_SLAVE	(GPC_ANEG_1 \| GPC_ANEG_0)	skge.h
31394	WOL_CTL_DEFAULT	(WOL_CTL_DIS_PME_ON_LINK_CHG \| \ WOL_CTL_DIS_PME_ON_PATTERN \| \ WOL_CTL_DIS_PME_ON_MAGIC_PKT \| \ WOL_CTL_DIS_LINK_CHG_UNIT \|	skge.h
31395	XM_RT_LIM_MSK	0x1f	skge.h	Bit 4..0: Tx Retry Limit
31396	XM_STIME_MSK	0x7f	skge.h	Bit 6..0: Tx Slottime bits
31397	XM_IPG_MSK	0xff	skge.h	Bit 7..0: IPG value bits
31398	XM_TX_WM_MSK	0x01ff	skge.h	Bit 9.. 0 Tx FIFO Watermark bits
31399	XM_THR_MSK	0x03ff	skge.h	Bit 10.. 0 Rx/Tx Request Threshold bits
31400	XM_RX_WM_MSK	0x03ff	skge.h	Bit 11.. 0: Rx FIFO Watermark bits
31401	XM_DEV_OUI	(0x00ffffffUL<<8)	skge.h	Bit 31..8: Device OUI
31402	XM_DEV_REV	(0x07L << 5)	skge.h	Bit 7..5: Chip Rev Num
31403	XM_PAUSE_MODE	(XM_MD_SPOE_E \| XM_MD_SPOL_I \| XM_MD_SPOH_I)	skge.h
31404	XM_DEF_MODE	(XM_MD_RX_RUNT \| XM_MD_RX_IRLE \| XM_MD_RX_LONG \|\ XM_MD_RX_CRCE \| XM_MD_RX_ERR \| XM_MD_CSA)	skge.h
31405	XMR_DEF_MSK	(XMR_OK_LO_OV \| XMR_OK_HI_OV)	skge.h
31406	XMT_DEF_MSK	(XMT_OK_LO_OV \| XMT_OK_HI_OV)	skge.h
31407	AUTONEG_DISABLE	0x00	sky2.h
31408	AUTONEG_ENABLE	0x01	sky2.h
31409	DUPLEX_HALF	0x00	sky2.h
31410	DUPLEX_FULL	0x01	sky2.h
31411	SPEED_10	10	sky2.h
31412	SPEED_100	100	sky2.h
31413	SPEED_1000	1000	sky2.h
31414	ADVERTISED_10baseT_Half	(1 << 0)	sky2.h
31415	ADVERTISED_10baseT_Full	(1 << 1)	sky2.h
31416	ADVERTISED_100baseT_Half	(1 << 2)	sky2.h
31417	ADVERTISED_100baseT_Full	(1 << 3)	sky2.h
31418	ADVERTISED_1000baseT_Half	(1 << 4)	sky2.h
31419	ADVERTISED_1000baseT_Full	(1 << 5)	sky2.h
31420	SUPPORTED_10baseT_Half	(1 << 0)	sky2.h
31421	SUPPORTED_10baseT_Full	(1 << 1)	sky2.h
31422	SUPPORTED_100baseT_Half	(1 << 2)	sky2.h
31423	SUPPORTED_100baseT_Full	(1 << 3)	sky2.h
31424	SUPPORTED_1000baseT_Half	(1 << 4)	sky2.h
31425	SUPPORTED_1000baseT_Full	(1 << 5)	sky2.h
31426	SUPPORTED_Autoneg	(1 << 6)	sky2.h
31427	SUPPORTED_TP	(1 << 7)	sky2.h
31428	SUPPORTED_FIBRE	(1 << 10)	sky2.h
31429	PCI_STATUS_ERROR_BITS	(PCI_STATUS_DETECTED_PARITY \| \ PCI_STATUS_SIG_SYSTEM_ERROR \| \ PCI_STATUS_REC_MASTER_ABORT \| \ PCI_STATUS_REC_TARGET_ABORT \| \	sky2.h
31430	CFG_DUAL_MAC_MSK	(CFG_LINK_2_AVAIL \| CFG_LINK_1_AVAIL)	sky2.h
31431	RAM_ADR_RAN	0x0007ffffL	sky2.h	Bit 18.. 0: RAM Address Range
31432	SK_RI_TO_53	36	sky2.h	RAM interface timeout
31433	TXA_MAX_VAL	0x00ffffffUL	sky2.h	Bit 23.. 0: Max TXA Timer/Cnt Val
31434	RB_MSK	0x0007ffff	sky2.h	Bit 18.. 0: RAM Buffer Pointer Bits
31435	PHY_M_PS_PAUSE_MSK	(PHY_M_PS_TX_P_EN \| PHY_M_PS_RX_P_EN)	sky2.h
31436	GM_GPCR_SPEED_1000	(GM_GPCR_GIGS_ENA \| GM_GPCR_SPEED_100)	sky2.h
31437	GM_GPCR_AU_ALL_DIS	(GM_GPCR_AU_DUP_DIS \| GM_GPCR_AU_FCT_DIS\|GM_GPCR_AU_SPD_DIS)	sky2.h
31438	TX_COL_DEF	0x04	sky2.h
31439	DATA_BLIND_DEF	0x04	sky2.h
31440	IPG_DATA_DEF	0x1e	sky2.h
31441	GM_PHY_RETRIES	100	sky2.h
31442	BANK_SELECT	14	smc9000.h
31443	TCR	0	smc9000.h	transmit control register
31444	TCR_ENABLE	0x0001	smc9000.h	if this is 1, we can transmit
31445	TCR_FDUPLX	0x0800	smc9000.h	receive packets sent out
31446	TCR_STP_SQET	0x1000	smc9000.h	stop transmitting if Signal quality error
31447	TCR_MON_CNS	0x0400	smc9000.h	monitors the carrier status
31448	TCR_PAD_ENABLE	0x0080	smc9000.h	pads short packets to 64 bytes
31449	TCR_CLEAR	0	smc9000.h	do NOTHING
31450	TCR_NORMAL	(TCR_ENABLE \| TCR_PAD_ENABLE)	smc9000.h
31451	EPH_STATUS	2	smc9000.h
31452	ES_LINK_OK	0x4000	smc9000.h	is the link integrity ok ?
31453	RCR	4	smc9000.h
31454	RCR_SOFTRESET	0x8000	smc9000.h	resets the chip
31455	RCR_STRIP_CRC	0x200	smc9000.h	strips CRC
31456	RCR_ENABLE	0x100	smc9000.h	IFF this is set, we can receive packets
31457	RCR_ALMUL	0x4	smc9000.h	receive all multicast packets
31458	RCR_PROMISC	0x2	smc9000.h	enable promiscuous mode
31459	RCR_NORMAL	(RCR_STRIP_CRC \| RCR_ENABLE)	smc9000.h
31460	RCR_CLEAR	0x0	smc9000.h	set it to a base state
31461	COUNTER	6	smc9000.h
31462	MIR	8	smc9000.h
31463	MCR	10	smc9000.h
31464	RPC_REG	0x000A	smc9000.h
31465	RPC_SPEED	0x2000	smc9000.h	When 1 PHY is in 100Mbps mode.
31466	RPC_DPLX	0x1000	smc9000.h	When 1 PHY is in Full-Duplex Mode
31467	RPC_ANEG	0x0800	smc9000.h	When 1 PHY is in Auto-Negotiate Mode
31468	RPC_LSXA_SHFT	5	smc9000.h	Bits to shift LS2A,LS1A,LS0A to lsb
31469	RPC_LSXB_SHFT	2	smc9000.h	Bits to get LS2B,LS1B,LS0B to lsb
31470	RPC_LED_100_10	(0x00)	smc9000.h	LED = 100Mbps OR's with 10Mbps link detect
31471	RPC_LED_RES	(0x01)	smc9000.h	LED = Reserved
31472	RPC_LED_10	(0x02)	smc9000.h	LED = 10Mbps link detect
31473	RPC_LED_FD	(0x03)	smc9000.h	LED = Full Duplex Mode
31474	RPC_LED_TX_RX	(0x04)	smc9000.h	LED = TX or RX packet occurred
31475	RPC_LED_100	(0x05)	smc9000.h	LED = 100Mbps link dectect
31476	RPC_LED_TX	(0x06)	smc9000.h	LED = TX packet occurred
31477	RPC_LED_RX	(0x07)	smc9000.h	LED = RX packet occurred
31478	RPC_DEFAULT	(RPC_ANEG \| (RPC_LED_100 << RPC_LSXA_SHFT) \| (RPC_LED_FD << RPC_LSXB_SHFT) \| RPC_SPEED \| RPC_DPLX)	smc9000.h
31479	RPC_REG	0x000A	smc9000.h
31480	RPC_SPEED	0x2000	smc9000.h	When 1 PHY is in 100Mbps mode.
31481	RPC_DPLX	0x1000	smc9000.h	When 1 PHY is in Full-Duplex Mode
31482	RPC_ANEG	0x0800	smc9000.h	When 1 PHY is in Auto-Negotiate Mode
31483	RPC_LSXA_SHFT	5	smc9000.h	Bits to shift LS2A,LS1A,LS0A to lsb
31484	RPC_LSXB_SHFT	2	smc9000.h	Bits to get LS2B,LS1B,LS0B to lsb
31485	RPC_LED_100_10	(0x00)	smc9000.h	LED = 100Mbps OR's with 10Mbps link detect
31486	RPC_LED_RES	(0x01)	smc9000.h	LED = Reserved
31487	RPC_LED_10	(0x02)	smc9000.h	LED = 10Mbps link detect
31488	RPC_LED_FD	(0x03)	smc9000.h	LED = Full Duplex Mode
31489	RPC_LED_TX_RX	(0x04)	smc9000.h	LED = TX or RX packet occurred
31490	RPC_LED_100	(0x05)	smc9000.h	LED = 100Mbps link dectect
31491	RPC_LED_TX	(0x06)	smc9000.h	LED = TX packet occurred
31492	RPC_LED_RX	(0x07)	smc9000.h	LED = RX packet occurred
31493	RPC_DEFAULT	(RPC_ANEG \| (RPC_LED_100 << RPC_LSXA_SHFT) \| (RPC_LED_FD << RPC_LSXB_SHFT) \| RPC_SPEED \| RPC_DPLX)	smc9000.h
31494	CONFIG	0	smc9000.h
31495	CFG_AUI_SELECT	0x100	smc9000.h
31496	BASE	2	smc9000.h
31497	ADDR0	4	smc9000.h
31498	ADDR1	6	smc9000.h
31499	ADDR2	8	smc9000.h
31500	GENERAL	10	smc9000.h
31501	CONTROL	12	smc9000.h
31502	CTL_POWERDOWN	0x2000	smc9000.h
31503	CTL_LE_ENABLE	0x80	smc9000.h
31504	CTL_CR_ENABLE	0x40	smc9000.h
31505	CTL_TE_ENABLE	0x0020	smc9000.h
31506	CTL_AUTO_RELEASE	0x0800	smc9000.h
31507	CTL_EPROM_ACCESS	0x0003	smc9000.h	high if Eprom is being read
31508	MMU_CMD	0	smc9000.h
31509	MC_BUSY	1	smc9000.h	only readable bit in the register
31510	MC_NOP	0	smc9000.h
31511	MC_ALLOC	0x20	smc9000.h	or with number of 256 byte packets
31512	MC_RESET	0x40	smc9000.h
31513	MC_REMOVE	0x60	smc9000.h	remove the current rx packet
31514	MC_RELEASE	0x80	smc9000.h	remove and release the current rx packet
31515	MC_FREEPKT	0xA0	smc9000.h	Release packet in PNR register
31516	MC_ENQUEUE	0xC0	smc9000.h	Enqueue the packet for transmit
31517	PNR_ARR	2	smc9000.h
31518	FIFO_PORTS	4	smc9000.h
31519	FP_RXEMPTY	0x8000	smc9000.h
31520	FP_TXEMPTY	0x80	smc9000.h
31521	POINTER	6	smc9000.h
31522	PTR_READ	0x2000	smc9000.h
31523	PTR_RCV	0x8000	smc9000.h
31524	PTR_AUTOINC	0x4000	smc9000.h
31525	PTR_AUTO_INC	0x0040	smc9000.h
31526	DATA_1	8	smc9000.h
31527	DATA_2	10	smc9000.h
31528	INTERRUPT	12	smc9000.h
31529	INT_MASK	13	smc9000.h
31530	IM_RCV_INT	0x1	smc9000.h
31531	IM_TX_INT	0x2	smc9000.h
31532	IM_TX_EMPTY_INT	0x4	smc9000.h
31533	IM_ALLOC_INT	0x8	smc9000.h
31534	IM_RX_OVRN_INT	0x10	smc9000.h
31535	IM_EPH_INT	0x20	smc9000.h
31536	IM_ERCV_INT	0x40	smc9000.h	not on SMC9192
31537	MULTICAST1	0	smc9000.h
31538	MULTICAST2	2	smc9000.h
31539	MULTICAST3	4	smc9000.h
31540	MULTICAST4	6	smc9000.h
31541	MGMT	8	smc9000.h
31542	REVISION	10	smc9000.h	( hi: chip id low: rev # )
31543	MII_REG	0x0008	smc9000.h
31544	MII_MSK_CRS100	0x4000	smc9000.h	Disables CRS100 detection during tx half dup
31545	MII_MDOE	0x0008	smc9000.h	MII Output Enable
31546	MII_MCLK	0x0004	smc9000.h	MII Clock, pin MDCLK
31547	MII_MDI	0x0002	smc9000.h	MII Input, pin MDI
31548	MII_MDO	0x0001	smc9000.h	MII Output, pin MDO
31549	ERCV	12	smc9000.h
31550	CHIP_9190	3	smc9000.h
31551	CHIP_9194	4	smc9000.h
31552	CHIP_9195	5	smc9000.h
31553	CHIP_9196	4	smc9000.h
31554	CHIP_91100	7	smc9000.h
31555	CHIP_91100FD	8	smc9000.h
31556	REV_9196	6	smc9000.h
31557	TS_SUCCESS	0x0001	smc9000.h
31558	TS_LOSTCAR	0x0400	smc9000.h
31559	TS_LATCOL	0x0200	smc9000.h
31560	TS_16COL	0x0010	smc9000.h
31561	RS_ALGNERR	0x8000	smc9000.h
31562	RS_BADCRC	0x2000	smc9000.h
31563	RS_ODDFRAME	0x1000	smc9000.h
31564	RS_TOOLONG	0x0800	smc9000.h
31565	RS_TOOSHORT	0x0400	smc9000.h
31566	RS_MULTICAST	0x0001	smc9000.h
31567	RS_ERRORS	(RS_ALGNERR \| RS_BADCRC \| RS_TOOLONG \| RS_TOOSHORT)	smc9000.h
31568	PHY_CNTL_REG	0x00	smc9000.h
31569	PHY_CNTL_RST	0x8000	smc9000.h	1=PHY Reset
31570	PHY_CNTL_LPBK	0x4000	smc9000.h	1=PHY Loopback
31571	PHY_CNTL_SPEED	0x2000	smc9000.h	1=100Mbps, 0=10Mpbs
31572	PHY_CNTL_ANEG_EN	0x1000	smc9000.h	1=Enable Auto negotiation
31573	PHY_CNTL_PDN	0x0800	smc9000.h	1=PHY Power Down mode
31574	PHY_CNTL_MII_DIS	0x0400	smc9000.h	1=MII 4 bit interface disabled
31575	PHY_CNTL_ANEG_RST	0x0200	smc9000.h	1=Reset Auto negotiate
31576	PHY_CNTL_DPLX	0x0100	smc9000.h	1=Full Duplex, 0=Half Duplex
31577	PHY_CNTL_COLTST	0x0080	smc9000.h	1= MII Colision Test
31578	PHY_STAT_REG	0x01	smc9000.h
31579	PHY_STAT_CAP_T4	0x8000	smc9000.h	1=100Base-T4 capable
31580	PHY_STAT_CAP_TXF	0x4000	smc9000.h	1=100Base-X full duplex capable
31581	PHY_STAT_CAP_TXH	0x2000	smc9000.h	1=100Base-X half duplex capable
31582	PHY_STAT_CAP_TF	0x1000	smc9000.h	1=10Mbps full duplex capable
31583	PHY_STAT_CAP_TH	0x0800	smc9000.h	1=10Mbps half duplex capable
31584	PHY_STAT_CAP_SUPR	0x0040	smc9000.h	1=recv mgmt frames with not preamble
31585	PHY_STAT_ANEG_ACK	0x0020	smc9000.h	1=ANEG has completed
31586	PHY_STAT_REM_FLT	0x0010	smc9000.h	1=Remote Fault detected
31587	PHY_STAT_CAP_ANEG	0x0008	smc9000.h	1=Auto negotiate capable
31588	PHY_STAT_LINK	0x0004	smc9000.h	1=valid link
31589	PHY_STAT_JAB	0x0002	smc9000.h	1=10Mbps jabber condition
31590	PHY_STAT_EXREG	0x0001	smc9000.h	1=extended registers implemented
31591	PHY_ID1_REG	0x02	smc9000.h	PHY Identifier 1
31592	PHY_ID2_REG	0x03	smc9000.h	PHY Identifier 2
31593	PHY_AD_REG	0x04	smc9000.h
31594	PHY_AD_NP	0x8000	smc9000.h	1=PHY requests exchange of Next Page
31595	PHY_AD_ACK	0x4000	smc9000.h	1=got link code word from remote
31596	PHY_AD_RF	0x2000	smc9000.h	1=advertise remote fault
31597	PHY_AD_T4	0x0200	smc9000.h	1=PHY is capable of 100Base-T4
31598	PHY_AD_TX_FDX	0x0100	smc9000.h	1=PHY is capable of 100Base-TX FDPLX
31599	PHY_AD_TX_HDX	0x0080	smc9000.h	1=PHY is capable of 100Base-TX HDPLX
31600	PHY_AD_10_FDX	0x0040	smc9000.h	1=PHY is capable of 10Base-T FDPLX
31601	PHY_AD_10_HDX	0x0020	smc9000.h	1=PHY is capable of 10Base-T HDPLX
31602	PHY_AD_CSMA	0x0001	smc9000.h	1=PHY is capable of 802.3 CMSA
31603	PHY_RMT_REG	0x05	smc9000.h
31604	PHY_CFG1_REG	0x10	smc9000.h
31605	PHY_CFG1_LNKDIS	0x8000	smc9000.h	1=Rx Link Detect Function disabled
31606	PHY_CFG1_XMTDIS	0x4000	smc9000.h	1=TP Transmitter Disabled
31607	PHY_CFG1_XMTPDN	0x2000	smc9000.h	1=TP Transmitter Powered Down
31608	PHY_CFG1_BYPSCR	0x0400	smc9000.h	1=Bypass scrambler/descrambler
31609	PHY_CFG1_UNSCDS	0x0200	smc9000.h	1=Unscramble Idle Reception Disable
31610	PHY_CFG1_EQLZR	0x0100	smc9000.h	1=Rx Equalizer Disabled
31611	PHY_CFG1_CABLE	0x0080	smc9000.h	1=STP(150ohm), 0=UTP(100ohm)
31612	PHY_CFG1_RLVL0	0x0040	smc9000.h	1=Rx Squelch level reduced by 4.5db
31613	PHY_CFG1_TLVL_SHIFT	2	smc9000.h	Transmit Output Level Adjust
31614	PHY_CFG1_TLVL_MASK	0x003C	smc9000.h
31615	PHY_CFG1_TRF_MASK	0x0003	smc9000.h	Transmitter Rise/Fall time
31616	PHY_CFG2_REG	0x11	smc9000.h
31617	PHY_CFG2_APOLDIS	0x0020	smc9000.h	1=Auto Polarity Correction disabled
31618	PHY_CFG2_JABDIS	0x0010	smc9000.h	1=Jabber disabled
31619	PHY_CFG2_MREG	0x0008	smc9000.h	1=Multiple register access (MII mgt)
31620	PHY_CFG2_INTMDIO	0x0004	smc9000.h	1=Interrupt signaled with MDIO pulseo
31621	PHY_INT_REG	0x12	smc9000.h	Status Output (Interrupt Status)
31622	PHY_INT_INT	0x8000	smc9000.h	1=bits have changed since last read
31623	PHY_INT_LNKFAIL	0x4000	smc9000.h	1=Link Not detected
31624	PHY_INT_LOSSSYNC	0x2000	smc9000.h	1=Descrambler has lost sync
31625	PHY_INT_CWRD	0x1000	smc9000.h	1=Invalid 4B5B code detected on rx
31626	PHY_INT_SSD	0x0800	smc9000.h	1=No Start Of Stream detected on rx
31627	PHY_INT_ESD	0x0400	smc9000.h	1=No End Of Stream detected on rx
31628	PHY_INT_RPOL	0x0200	smc9000.h	1=Reverse Polarity detected
31629	PHY_INT_JAB	0x0100	smc9000.h	1=Jabber detected
31630	PHY_INT_SPDDET	0x0080	smc9000.h	1=100Base-TX mode, 0=10Base-T mode
31631	PHY_INT_DPLXDET	0x0040	smc9000.h	1=Device in Full Duplex
31632	PHY_MASK_REG	0x13	smc9000.h	Interrupt Mask
31633	PHY_CNTL_REG	0x00	smc9000.h
31634	PHY_CNTL_RST	0x8000	smc9000.h	1=PHY Reset
31635	PHY_CNTL_LPBK	0x4000	smc9000.h	1=PHY Loopback
31636	PHY_CNTL_SPEED	0x2000	smc9000.h	1=100Mbps, 0=10Mpbs
31637	PHY_CNTL_ANEG_EN	0x1000	smc9000.h	1=Enable Auto negotiation
31638	PHY_CNTL_PDN	0x0800	smc9000.h	1=PHY Power Down mode
31639	PHY_CNTL_MII_DIS	0x0400	smc9000.h	1=MII 4 bit interface disabled
31640	PHY_CNTL_ANEG_RST	0x0200	smc9000.h	1=Reset Auto negotiate
31641	PHY_CNTL_DPLX	0x0100	smc9000.h	1=Full Duplex, 0=Half Duplex
31642	PHY_CNTL_COLTST	0x0080	smc9000.h	1= MII Colision Test
31643	PHY_STAT_REG	0x01	smc9000.h
31644	PHY_STAT_CAP_T4	0x8000	smc9000.h	1=100Base-T4 capable
31645	PHY_STAT_CAP_TXF	0x4000	smc9000.h	1=100Base-X full duplex capable
31646	PHY_STAT_CAP_TXH	0x2000	smc9000.h	1=100Base-X half duplex capable
31647	PHY_STAT_CAP_TF	0x1000	smc9000.h	1=10Mbps full duplex capable
31648	PHY_STAT_CAP_TH	0x0800	smc9000.h	1=10Mbps half duplex capable
31649	PHY_STAT_CAP_SUPR	0x0040	smc9000.h	1=recv mgmt frames with not preamble
31650	PHY_STAT_ANEG_ACK	0x0020	smc9000.h	1=ANEG has completed
31651	PHY_STAT_REM_FLT	0x0010	smc9000.h	1=Remote Fault detected
31652	PHY_STAT_CAP_ANEG	0x0008	smc9000.h	1=Auto negotiate capable
31653	PHY_STAT_LINK	0x0004	smc9000.h	1=valid link
31654	PHY_STAT_JAB	0x0002	smc9000.h	1=10Mbps jabber condition
31655	PHY_STAT_EXREG	0x0001	smc9000.h	1=extended registers implemented
31656	PHY_ID1_REG	0x02	smc9000.h	PHY Identifier 1
31657	PHY_ID2_REG	0x03	smc9000.h	PHY Identifier 2
31658	PHY_AD_REG	0x04	smc9000.h
31659	PHY_AD_NP	0x8000	smc9000.h	1=PHY requests exchange of Next Page
31660	PHY_AD_ACK	0x4000	smc9000.h	1=got link code word from remote
31661	PHY_AD_RF	0x2000	smc9000.h	1=advertise remote fault
31662	PHY_AD_T4	0x0200	smc9000.h	1=PHY is capable of 100Base-T4
31663	PHY_AD_TX_FDX	0x0100	smc9000.h	1=PHY is capable of 100Base-TX FDPLX
31664	PHY_AD_TX_HDX	0x0080	smc9000.h	1=PHY is capable of 100Base-TX HDPLX
31665	PHY_AD_10_FDX	0x0040	smc9000.h	1=PHY is capable of 10Base-T FDPLX
31666	PHY_AD_10_HDX	0x0020	smc9000.h	1=PHY is capable of 10Base-T HDPLX
31667	PHY_AD_CSMA	0x0001	smc9000.h	1=PHY is capable of 802.3 CMSA
31668	PHY_RMT_REG	0x05	smc9000.h
31669	PHY_CFG1_REG	0x10	smc9000.h
31670	PHY_CFG1_LNKDIS	0x8000	smc9000.h	1=Rx Link Detect Function disabled
31671	PHY_CFG1_XMTDIS	0x4000	smc9000.h	1=TP Transmitter Disabled
31672	PHY_CFG1_XMTPDN	0x2000	smc9000.h	1=TP Transmitter Powered Down
31673	PHY_CFG1_BYPSCR	0x0400	smc9000.h	1=Bypass scrambler/descrambler
31674	PHY_CFG1_UNSCDS	0x0200	smc9000.h	1=Unscramble Idle Reception Disable
31675	PHY_CFG1_EQLZR	0x0100	smc9000.h	1=Rx Equalizer Disabled
31676	PHY_CFG1_CABLE	0x0080	smc9000.h	1=STP(150ohm), 0=UTP(100ohm)
31677	PHY_CFG1_RLVL0	0x0040	smc9000.h	1=Rx Squelch level reduced by 4.5db
31678	PHY_CFG1_TLVL_SHIFT	2	smc9000.h	Transmit Output Level Adjust
31679	PHY_CFG1_TLVL_MASK	0x003C	smc9000.h
31680	PHY_CFG1_TRF_MASK	0x0003	smc9000.h	Transmitter Rise/Fall time
31681	PHY_CFG2_REG	0x11	smc9000.h
31682	PHY_CFG2_APOLDIS	0x0020	smc9000.h	1=Auto Polarity Correction disabled
31683	PHY_CFG2_JABDIS	0x0010	smc9000.h	1=Jabber disabled
31684	PHY_CFG2_MREG	0x0008	smc9000.h	1=Multiple register access (MII mgt)
31685	PHY_CFG2_INTMDIO	0x0004	smc9000.h	1=Interrupt signaled with MDIO pulseo
31686	PHY_INT_REG	0x12	smc9000.h	Status Output (Interrupt Status)
31687	PHY_INT_INT	0x8000	smc9000.h	1=bits have changed since last read
31688	PHY_INT_LNKFAIL	0x4000	smc9000.h	1=Link Not detected
31689	PHY_INT_LOSSSYNC	0x2000	smc9000.h	1=Descrambler has lost sync
31690	PHY_INT_CWRD	0x1000	smc9000.h	1=Invalid 4B5B code detected on rx
31691	PHY_INT_SSD	0x0800	smc9000.h	1=No Start Of Stream detected on rx
31692	PHY_INT_ESD	0x0400	smc9000.h	1=No End Of Stream detected on rx
31693	PHY_INT_RPOL	0x0200	smc9000.h	1=Reverse Polarity detected
31694	PHY_INT_JAB	0x0100	smc9000.h	1=Jabber detected
31695	PHY_INT_SPDDET	0x0080	smc9000.h	1=100Base-TX mode, 0=10Base-T mode
31696	PHY_INT_DPLXDET	0x0040	smc9000.h	1=Device in Full Duplex
31697	PHY_MASK_REG	0x13	smc9000.h	Interrupt Mask
31698	ADVERTISED_10baseT_Half	(1 << 0)	tg3.h
31699	ADVERTISED_10baseT_Full	(1 << 1)	tg3.h
31700	ADVERTISED_100baseT_Half	(1 << 2)	tg3.h
31701	ADVERTISED_100baseT_Full	(1 << 3)	tg3.h
31702	ADVERTISED_1000baseT_Half	(1 << 4)	tg3.h
31703	ADVERTISED_1000baseT_Full	(1 << 5)	tg3.h
31704	ADVERTISED_Autoneg	(1 << 6)	tg3.h
31705	ADVERTISED_TP	(1 << 7)	tg3.h
31706	ADVERTISED_AUI	(1 << 8)	tg3.h
31707	ADVERTISED_MII	(1 << 9)	tg3.h
31708	ADVERTISED_FIBRE	(1 << 10)	tg3.h
31709	ADVERTISED_BNC	(1 << 11)	tg3.h
31710	SPEED_10	0	tg3.h
31711	SPEED_100	1	tg3.h
31712	SPEED_1000	2	tg3.h
31713	SPEED_INVALID	3	tg3.h
31714	DUPLEX_HALF	0x00	tg3.h
31715	DUPLEX_FULL	0x01	tg3.h
31716	DUPLEX_INVALID	0x02	tg3.h
31717	PORT_TP	0x00	tg3.h
31718	PORT_AUI	0x01	tg3.h
31719	PORT_MII	0x02	tg3.h
31720	PORT_FIBRE	0x03	tg3.h
31721	PORT_BNC	0x04	tg3.h
31722	XCVR_INTERNAL	0x00	tg3.h
31723	XCVR_EXTERNAL	0x01	tg3.h
31724	XCVR_DUMMY1	0x02	tg3.h
31725	XCVR_DUMMY2	0x03	tg3.h
31726	XCVR_DUMMY3	0x04	tg3.h
31727	AUTONEG_DISABLE	0x00	tg3.h
31728	AUTONEG_ENABLE	0x01	tg3.h
31729	WAKE_PHY	(1 << 0)	tg3.h
31730	WAKE_UCAST	(1 << 1)	tg3.h
31731	WAKE_MCAST	(1 << 2)	tg3.h
31732	WAKE_BCAST	(1 << 3)	tg3.h
31733	WAKE_ARP	(1 << 4)	tg3.h
31734	WAKE_MAGIC	(1 << 5)	tg3.h
31735	WAKE_MAGICSECURE	(1 << 6)	tg3.h	only meaningful if WAKE_MAGIC
31736	TG3_64BIT_REG_HIGH	0x00UL	tg3.h
31737	TG3_64BIT_REG_LOW	0x04UL	tg3.h
31738	TG3_BDINFO_HOST_ADDR	0x0UL	tg3.h	64-bit
31739	TG3_BDINFO_MAXLEN_FLAGS	0x8UL	tg3.h	32-bit
31740	BDINFO_FLAGS_USE_EXT_RECV	0x00000001	tg3.h	ext rx_buffer_desc
31741	BDINFO_FLAGS_DISABLED	0x00000002	tg3.h
31742	BDINFO_FLAGS_MAXLEN_MASK	0xffff0000	tg3.h
31743	BDINFO_FLAGS_MAXLEN_SHIFT	16	tg3.h
31744	TG3_BDINFO_NIC_ADDR	0xcUL	tg3.h	32-bit
31745	TG3_BDINFO_SIZE	0x10UL	tg3.h
31746	RX_COPY_THRESHOLD	256	tg3.h
31747	RX_STD_MAX_SIZE	1536	tg3.h
31748	RX_STD_MAX_SIZE_5705	512	tg3.h
31749	RX_JUMBO_MAX_SIZE	0xdeadbeef	tg3.h	XXX
31750	TG3PCI_VENDOR	0x00000000	tg3.h
31751	TG3PCI_VENDOR_BROADCOM	0x14e4	tg3.h
31752	TG3PCI_DEVICE	0x00000002	tg3.h
31753	TG3PCI_DEVICE_TIGON3_1	0x1644	tg3.h	BCM5700
31754	TG3PCI_DEVICE_TIGON3_2	0x1645	tg3.h	BCM5701
31755	TG3PCI_DEVICE_TIGON3_3	0x1646	tg3.h	BCM5702
31756	TG3PCI_DEVICE_TIGON3_4	0x1647	tg3.h	BCM5703
31757	TG3PCI_COMMAND	0x00000004	tg3.h
31758	TG3PCI_STATUS	0x00000006	tg3.h
31759	TG3PCI_CCREVID	0x00000008	tg3.h
31760	TG3PCI_CACHELINESZ	0x0000000c	tg3.h
31761	TG3PCI_LATTIMER	0x0000000d	tg3.h
31762	TG3PCI_HEADERTYPE	0x0000000e	tg3.h
31763	TG3PCI_BIST	0x0000000f	tg3.h
31764	TG3PCI_BASE0_LOW	0x00000010	tg3.h
31765	TG3PCI_BASE0_HIGH	0x00000014	tg3.h
31766	TG3PCI_SUBSYSVENID	0x0000002c	tg3.h
31767	TG3PCI_SUBSYSID	0x0000002e	tg3.h
31768	TG3PCI_ROMADDR	0x00000030	tg3.h
31769	TG3PCI_CAPLIST	0x00000034	tg3.h
31770	TG3PCI_IRQ_LINE	0x0000003c	tg3.h
31771	TG3PCI_IRQ_PIN	0x0000003d	tg3.h
31772	TG3PCI_MIN_GNT	0x0000003e	tg3.h
31773	TG3PCI_MAX_LAT	0x0000003f	tg3.h
31774	TG3PCI_X_CAPS	0x00000040	tg3.h
31775	PCIX_CAPS_RELAXED_ORDERING	0x00020000	tg3.h
31776	PCIX_CAPS_SPLIT_MASK	0x00700000	tg3.h
31777	PCIX_CAPS_SPLIT_SHIFT	20	tg3.h
31778	PCIX_CAPS_BURST_MASK	0x000c0000	tg3.h
31779	PCIX_CAPS_BURST_SHIFT	18	tg3.h
31780	PCIX_CAPS_MAX_BURST_CPIOB	2	tg3.h
31781	TG3PCI_PM_CAP_PTR	0x00000041	tg3.h
31782	TG3PCI_X_COMMAND	0x00000042	tg3.h
31783	TG3PCI_X_STATUS	0x00000044	tg3.h
31784	TG3PCI_PM_CAP_ID	0x00000048	tg3.h
31785	TG3PCI_VPD_CAP_PTR	0x00000049	tg3.h
31786	TG3PCI_PM_CAPS	0x0000004a	tg3.h
31787	TG3PCI_PM_CTRL_STAT	0x0000004c	tg3.h
31788	TG3PCI_BR_SUPP_EXT	0x0000004e	tg3.h
31789	TG3PCI_PM_DATA	0x0000004f	tg3.h
31790	TG3PCI_VPD_CAP_ID	0x00000050	tg3.h
31791	TG3PCI_MSI_CAP_PTR	0x00000051	tg3.h
31792	TG3PCI_VPD_ADDR_FLAG	0x00000052	tg3.h
31793	VPD_ADDR_FLAG_WRITE	0x00008000	tg3.h
31794	TG3PCI_VPD_DATA	0x00000054	tg3.h
31795	TG3PCI_MSI_CAP_ID	0x00000058	tg3.h
31796	TG3PCI_NXT_CAP_PTR	0x00000059	tg3.h
31797	TG3PCI_MSI_CTRL	0x0000005a	tg3.h
31798	TG3PCI_MSI_ADDR_LOW	0x0000005c	tg3.h
31799	TG3PCI_MSI_ADDR_HIGH	0x00000060	tg3.h
31800	TG3PCI_MSI_DATA	0x00000064	tg3.h
31801	TG3PCI_MISC_HOST_CTRL	0x00000068	tg3.h
31802	MISC_HOST_CTRL_CLEAR_INT	0x00000001	tg3.h
31803	MISC_HOST_CTRL_MASK_PCI_INT	0x00000002	tg3.h
31804	MISC_HOST_CTRL_BYTE_SWAP	0x00000004	tg3.h
31805	MISC_HOST_CTRL_WORD_SWAP	0x00000008	tg3.h
31806	MISC_HOST_CTRL_PCISTATE_RW	0x00000010	tg3.h
31807	MISC_HOST_CTRL_CLKREG_RW	0x00000020	tg3.h
31808	MISC_HOST_CTRL_REGWORD_SWAP	0x00000040	tg3.h
31809	MISC_HOST_CTRL_INDIR_ACCESS	0x00000080	tg3.h
31810	MISC_HOST_CTRL_IRQ_MASK_MODE	0x00000100	tg3.h
31811	MISC_HOST_CTRL_TAGGED_STATUS	0x00000200	tg3.h
31812	MISC_HOST_CTRL_CHIPREV	0xffff0000	tg3.h
31813	MISC_HOST_CTRL_CHIPREV_SHIFT	16	tg3.h
31814	CHIPREV_ID_5700_A0	0x7000	tg3.h
31815	CHIPREV_ID_5700_A1	0x7001	tg3.h
31816	CHIPREV_ID_5700_B0	0x7100	tg3.h
31817	CHIPREV_ID_5700_B1	0x7101	tg3.h
31818	CHIPREV_ID_5700_B3	0x7102	tg3.h
31819	CHIPREV_ID_5700_ALTIMA	0x7104	tg3.h
31820	CHIPREV_ID_5700_C0	0x7200	tg3.h
31821	CHIPREV_ID_5701_A0	0x0000	tg3.h
31822	CHIPREV_ID_5701_B0	0x0100	tg3.h
31823	CHIPREV_ID_5701_B2	0x0102	tg3.h
31824	CHIPREV_ID_5701_B5	0x0105	tg3.h
31825	CHIPREV_ID_5703_A0	0x1000	tg3.h
31826	CHIPREV_ID_5703_A1	0x1001	tg3.h
31827	CHIPREV_ID_5703_A2	0x1002	tg3.h
31828	CHIPREV_ID_5703_A3	0x1003	tg3.h
31829	CHIPREV_ID_5704_A0	0x2000	tg3.h
31830	CHIPREV_ID_5704_A1	0x2001	tg3.h
31831	CHIPREV_ID_5704_A2	0x2002	tg3.h
31832	CHIPREV_ID_5705_A0	0x3000	tg3.h
31833	CHIPREV_ID_5705_A1	0x3001	tg3.h
31834	CHIPREV_ID_5705_A2	0x3002	tg3.h
31835	CHIPREV_ID_5705_A3	0x3003	tg3.h
31836	CHIPREV_ID_5721	0x4101	tg3.h
31837	CHIPREV_ID_5750_A0	0x4000	tg3.h
31838	CHIPREV_ID_5750_A1	0x4001	tg3.h
31839	CHIPREV_ID_5750_A3	0x4003	tg3.h
31840	ASIC_REV_5700	0x07	tg3.h
31841	ASIC_REV_5701	0x00	tg3.h
31842	ASIC_REV_5703	0x01	tg3.h
31843	ASIC_REV_5704	0x02	tg3.h
31844	ASIC_REV_5705	0x03	tg3.h
31845	ASIC_REV_5750	0x04	tg3.h
31846	ASIC_REV_5787	0x0b	tg3.h
31847	CHIPREV_5700_AX	0x70	tg3.h
31848	CHIPREV_5700_BX	0x71	tg3.h
31849	CHIPREV_5700_CX	0x72	tg3.h
31850	CHIPREV_5701_AX	0x00	tg3.h
31851	METAL_REV_A0	0x00	tg3.h
31852	METAL_REV_A1	0x01	tg3.h
31853	METAL_REV_B0	0x00	tg3.h
31854	METAL_REV_B1	0x01	tg3.h
31855	METAL_REV_B2	0x02	tg3.h
31856	TG3PCI_DMA_RW_CTRL	0x0000006c	tg3.h
31857	DMA_RWCTRL_MIN_DMA	0x000000ff	tg3.h
31858	DMA_RWCTRL_MIN_DMA_SHIFT	0	tg3.h
31859	DMA_RWCTRL_READ_BNDRY_MASK	0x00000700	tg3.h
31860	DMA_RWCTRL_READ_BNDRY_DISAB	0x00000000	tg3.h
31861	DMA_RWCTRL_READ_BNDRY_16	0x00000100	tg3.h
31862	DMA_RWCTRL_READ_BNDRY_32	0x00000200	tg3.h
31863	DMA_RWCTRL_READ_BNDRY_64	0x00000300	tg3.h
31864	DMA_RWCTRL_READ_BNDRY_128	0x00000400	tg3.h
31865	DMA_RWCTRL_READ_BNDRY_256	0x00000500	tg3.h
31866	DMA_RWCTRL_READ_BNDRY_512	0x00000600	tg3.h
31867	DMA_RWCTRL_READ_BNDRY_1024	0x00000700	tg3.h
31868	DMA_RWCTRL_WRITE_BNDRY_MASK	0x00003800	tg3.h
31869	DMA_RWCTRL_WRITE_BNDRY_DISAB	0x00000000	tg3.h
31870	DMA_RWCTRL_WRITE_BNDRY_16	0x00000800	tg3.h
31871	DMA_RWCTRL_WRITE_BNDRY_32	0x00001000	tg3.h
31872	DMA_RWCTRL_WRITE_BNDRY_64	0x00001800	tg3.h
31873	DMA_RWCTRL_WRITE_BNDRY_128	0x00002000	tg3.h
31874	DMA_RWCTRL_WRITE_BNDRY_256	0x00002800	tg3.h
31875	DMA_RWCTRL_WRITE_BNDRY_512	0x00003000	tg3.h
31876	DMA_RWCTRL_WRITE_BNDRY_1024	0x00003800	tg3.h
31877	DMA_RWCTRL_ONE_DMA	0x00004000	tg3.h
31878	DMA_RWCTRL_READ_WATER	0x00070000	tg3.h
31879	DMA_RWCTRL_READ_WATER_SHIFT	16	tg3.h
31880	DMA_RWCTRL_WRITE_WATER	0x00380000	tg3.h
31881	DMA_RWCTRL_WRITE_WATER_SHIFT	19	tg3.h
31882	DMA_RWCTRL_USE_MEM_READ_MULT	0x00400000	tg3.h
31883	DMA_RWCTRL_ASSERT_ALL_BE	0x00800000	tg3.h
31884	DMA_RWCTRL_PCI_READ_CMD	0x0f000000	tg3.h
31885	DMA_RWCTRL_PCI_READ_CMD_SHIFT	24	tg3.h
31886	DMA_RWCTRL_PCI_WRITE_CMD	0xf0000000	tg3.h
31887	DMA_RWCTRL_PCI_WRITE_CMD_SHIFT	28	tg3.h
31888	TG3PCI_PCISTATE	0x00000070	tg3.h
31889	PCISTATE_FORCE_RESET	0x00000001	tg3.h
31890	PCISTATE_INT_NOT_ACTIVE	0x00000002	tg3.h
31891	PCISTATE_CONV_PCI_MODE	0x00000004	tg3.h
31892	PCISTATE_BUS_SPEED_HIGH	0x00000008	tg3.h
31893	PCISTATE_BUS_32BIT	0x00000010	tg3.h
31894	PCISTATE_ROM_ENABLE	0x00000020	tg3.h
31895	PCISTATE_ROM_RETRY_ENABLE	0x00000040	tg3.h
31896	PCISTATE_FLAT_VIEW	0x00000100	tg3.h
31897	PCISTATE_RETRY_SAME_DMA	0x00002000	tg3.h
31898	TG3PCI_CLOCK_CTRL	0x00000074	tg3.h
31899	CLOCK_CTRL_CORECLK_DISABLE	0x00000200	tg3.h
31900	CLOCK_CTRL_RXCLK_DISABLE	0x00000400	tg3.h
31901	CLOCK_CTRL_TXCLK_DISABLE	0x00000800	tg3.h
31902	CLOCK_CTRL_ALTCLK	0x00001000	tg3.h
31903	CLOCK_CTRL_PWRDOWN_PLL133	0x00008000	tg3.h
31904	CLOCK_CTRL_44MHZ_CORE	0x00040000	tg3.h
31905	CLOCK_CTRL_625_CORE	0x00100000	tg3.h
31906	CLOCK_CTRL_FORCE_CLKRUN	0x00200000	tg3.h
31907	CLOCK_CTRL_CLKRUN_OENABLE	0x00400000	tg3.h
31908	CLOCK_CTRL_DELAY_PCI_GRANT	0x80000000	tg3.h
31909	TG3PCI_REG_BASE_ADDR	0x00000078	tg3.h
31910	TG3PCI_MEM_WIN_BASE_ADDR	0x0000007c	tg3.h
31911	TG3PCI_REG_DATA	0x00000080	tg3.h
31912	TG3PCI_MEM_WIN_DATA	0x00000084	tg3.h
31913	TG3PCI_MODE_CTRL	0x00000088	tg3.h
31914	TG3PCI_MISC_CFG	0x0000008c	tg3.h
31915	TG3PCI_MISC_LOCAL_CTRL	0x00000090	tg3.h
31916	TG3PCI_STD_RING_PROD_IDX	0x00000098	tg3.h	64-bit
31917	TG3PCI_RCV_RET_RING_CON_IDX	0x000000a0	tg3.h	64-bit
31918	TG3PCI_SND_PROD_IDX	0x000000a8	tg3.h	64-bit
31919	MAILBOX_INTERRUPT_0	0x00000200	tg3.h	64-bit
31920	MAILBOX_INTERRUPT_1	0x00000208	tg3.h	64-bit
31921	MAILBOX_INTERRUPT_2	0x00000210	tg3.h	64-bit
31922	MAILBOX_INTERRUPT_3	0x00000218	tg3.h	64-bit
31923	MAILBOX_GENERAL_0	0x00000220	tg3.h	64-bit
31924	MAILBOX_GENERAL_1	0x00000228	tg3.h	64-bit
31925	MAILBOX_GENERAL_2	0x00000230	tg3.h	64-bit
31926	MAILBOX_GENERAL_3	0x00000238	tg3.h	64-bit
31927	MAILBOX_GENERAL_4	0x00000240	tg3.h	64-bit
31928	MAILBOX_GENERAL_5	0x00000248	tg3.h	64-bit
31929	MAILBOX_GENERAL_6	0x00000250	tg3.h	64-bit
31930	MAILBOX_GENERAL_7	0x00000258	tg3.h	64-bit
31931	MAILBOX_RELOAD_STAT	0x00000260	tg3.h	64-bit
31932	MAILBOX_RCV_STD_PROD_IDX	0x00000268	tg3.h	64-bit
31933	MAILBOX_RCV_JUMBO_PROD_IDX	0x00000270	tg3.h	64-bit
31934	MAILBOX_RCV_MINI_PROD_IDX	0x00000278	tg3.h	64-bit
31935	MAILBOX_RCVRET_CON_IDX_0	0x00000280	tg3.h	64-bit
31936	MAILBOX_RCVRET_CON_IDX_1	0x00000288	tg3.h	64-bit
31937	MAILBOX_RCVRET_CON_IDX_2	0x00000290	tg3.h	64-bit
31938	MAILBOX_RCVRET_CON_IDX_3	0x00000298	tg3.h	64-bit
31939	MAILBOX_RCVRET_CON_IDX_4	0x000002a0	tg3.h	64-bit
31940	MAILBOX_RCVRET_CON_IDX_5	0x000002a8	tg3.h	64-bit
31941	MAILBOX_RCVRET_CON_IDX_6	0x000002b0	tg3.h	64-bit
31942	MAILBOX_RCVRET_CON_IDX_7	0x000002b8	tg3.h	64-bit
31943	MAILBOX_RCVRET_CON_IDX_8	0x000002c0	tg3.h	64-bit
31944	MAILBOX_RCVRET_CON_IDX_9	0x000002c8	tg3.h	64-bit
31945	MAILBOX_RCVRET_CON_IDX_10	0x000002d0	tg3.h	64-bit
31946	MAILBOX_RCVRET_CON_IDX_11	0x000002d8	tg3.h	64-bit
31947	MAILBOX_RCVRET_CON_IDX_12	0x000002e0	tg3.h	64-bit
31948	MAILBOX_RCVRET_CON_IDX_13	0x000002e8	tg3.h	64-bit
31949	MAILBOX_RCVRET_CON_IDX_14	0x000002f0	tg3.h	64-bit
31950	MAILBOX_RCVRET_CON_IDX_15	0x000002f8	tg3.h	64-bit
31951	MAILBOX_SNDHOST_PROD_IDX_0	0x00000300	tg3.h	64-bit
31952	MAILBOX_SNDHOST_PROD_IDX_1	0x00000308	tg3.h	64-bit
31953	MAILBOX_SNDHOST_PROD_IDX_2	0x00000310	tg3.h	64-bit
31954	MAILBOX_SNDHOST_PROD_IDX_3	0x00000318	tg3.h	64-bit
31955	MAILBOX_SNDHOST_PROD_IDX_4	0x00000320	tg3.h	64-bit
31956	MAILBOX_SNDHOST_PROD_IDX_5	0x00000328	tg3.h	64-bit
31957	MAILBOX_SNDHOST_PROD_IDX_6	0x00000330	tg3.h	64-bit
31958	MAILBOX_SNDHOST_PROD_IDX_7	0x00000338	tg3.h	64-bit
31959	MAILBOX_SNDHOST_PROD_IDX_8	0x00000340	tg3.h	64-bit
31960	MAILBOX_SNDHOST_PROD_IDX_9	0x00000348	tg3.h	64-bit
31961	MAILBOX_SNDHOST_PROD_IDX_10	0x00000350	tg3.h	64-bit
31962	MAILBOX_SNDHOST_PROD_IDX_11	0x00000358	tg3.h	64-bit
31963	MAILBOX_SNDHOST_PROD_IDX_12	0x00000360	tg3.h	64-bit
31964	MAILBOX_SNDHOST_PROD_IDX_13	0x00000368	tg3.h	64-bit
31965	MAILBOX_SNDHOST_PROD_IDX_14	0x00000370	tg3.h	64-bit
31966	MAILBOX_SNDHOST_PROD_IDX_15	0x00000378	tg3.h	64-bit
31967	MAILBOX_SNDNIC_PROD_IDX_0	0x00000380	tg3.h	64-bit
31968	MAILBOX_SNDNIC_PROD_IDX_1	0x00000388	tg3.h	64-bit
31969	MAILBOX_SNDNIC_PROD_IDX_2	0x00000390	tg3.h	64-bit
31970	MAILBOX_SNDNIC_PROD_IDX_3	0x00000398	tg3.h	64-bit
31971	MAILBOX_SNDNIC_PROD_IDX_4	0x000003a0	tg3.h	64-bit
31972	MAILBOX_SNDNIC_PROD_IDX_5	0x000003a8	tg3.h	64-bit
31973	MAILBOX_SNDNIC_PROD_IDX_6	0x000003b0	tg3.h	64-bit
31974	MAILBOX_SNDNIC_PROD_IDX_7	0x000003b8	tg3.h	64-bit
31975	MAILBOX_SNDNIC_PROD_IDX_8	0x000003c0	tg3.h	64-bit
31976	MAILBOX_SNDNIC_PROD_IDX_9	0x000003c8	tg3.h	64-bit
31977	MAILBOX_SNDNIC_PROD_IDX_10	0x000003d0	tg3.h	64-bit
31978	MAILBOX_SNDNIC_PROD_IDX_11	0x000003d8	tg3.h	64-bit
31979	MAILBOX_SNDNIC_PROD_IDX_12	0x000003e0	tg3.h	64-bit
31980	MAILBOX_SNDNIC_PROD_IDX_13	0x000003e8	tg3.h	64-bit
31981	MAILBOX_SNDNIC_PROD_IDX_14	0x000003f0	tg3.h	64-bit
31982	MAILBOX_SNDNIC_PROD_IDX_15	0x000003f8	tg3.h	64-bit
31983	MAC_MODE	0x00000400	tg3.h
31984	MAC_MODE_RESET	0x00000001	tg3.h
31985	MAC_MODE_HALF_DUPLEX	0x00000002	tg3.h
31986	MAC_MODE_PORT_MODE_MASK	0x0000000c	tg3.h
31987	MAC_MODE_PORT_MODE_TBI	0x0000000c	tg3.h
31988	MAC_MODE_PORT_MODE_GMII	0x00000008	tg3.h
31989	MAC_MODE_PORT_MODE_MII	0x00000004	tg3.h
31990	MAC_MODE_PORT_MODE_NONE	0x00000000	tg3.h
31991	MAC_MODE_PORT_INT_LPBACK	0x00000010	tg3.h
31992	MAC_MODE_TAGGED_MAC_CTRL	0x00000080	tg3.h
31993	MAC_MODE_TX_BURSTING	0x00000100	tg3.h
31994	MAC_MODE_MAX_DEFER	0x00000200	tg3.h
31995	MAC_MODE_LINK_POLARITY	0x00000400	tg3.h
31996	MAC_MODE_RXSTAT_ENABLE	0x00000800	tg3.h
31997	MAC_MODE_RXSTAT_CLEAR	0x00001000	tg3.h
31998	MAC_MODE_RXSTAT_FLUSH	0x00002000	tg3.h
31999	MAC_MODE_TXSTAT_ENABLE	0x00004000	tg3.h
32000	MAC_MODE_TXSTAT_CLEAR	0x00008000	tg3.h
32001	MAC_MODE_TXSTAT_FLUSH	0x00010000	tg3.h
32002	MAC_MODE_SEND_CONFIGS	0x00020000	tg3.h
32003	MAC_MODE_MAGIC_PKT_ENABLE	0x00040000	tg3.h
32004	MAC_MODE_ACPI_ENABLE	0x00080000	tg3.h
32005	MAC_MODE_MIP_ENABLE	0x00100000	tg3.h
32006	MAC_MODE_TDE_ENABLE	0x00200000	tg3.h
32007	MAC_MODE_RDE_ENABLE	0x00400000	tg3.h
32008	MAC_MODE_FHDE_ENABLE	0x00800000	tg3.h
32009	MAC_STATUS	0x00000404	tg3.h
32010	MAC_STATUS_PCS_SYNCED	0x00000001	tg3.h
32011	MAC_STATUS_SIGNAL_DET	0x00000002	tg3.h
32012	MAC_STATUS_RCVD_CFG	0x00000004	tg3.h
32013	MAC_STATUS_CFG_CHANGED	0x00000008	tg3.h
32014	MAC_STATUS_SYNC_CHANGED	0x00000010	tg3.h
32015	MAC_STATUS_PORT_DEC_ERR	0x00000400	tg3.h
32016	MAC_STATUS_LNKSTATE_CHANGED	0x00001000	tg3.h
32017	MAC_STATUS_MI_COMPLETION	0x00400000	tg3.h
32018	MAC_STATUS_MI_INTERRUPT	0x00800000	tg3.h
32019	MAC_STATUS_AP_ERROR	0x01000000	tg3.h
32020	MAC_STATUS_ODI_ERROR	0x02000000	tg3.h
32021	MAC_STATUS_RXSTAT_OVERRUN	0x04000000	tg3.h
32022	MAC_STATUS_TXSTAT_OVERRUN	0x08000000	tg3.h
32023	MAC_EVENT	0x00000408	tg3.h
32024	MAC_EVENT_PORT_DECODE_ERR	0x00000400	tg3.h
32025	MAC_EVENT_LNKSTATE_CHANGED	0x00001000	tg3.h
32026	MAC_EVENT_MI_COMPLETION	0x00400000	tg3.h
32027	MAC_EVENT_MI_INTERRUPT	0x00800000	tg3.h
32028	MAC_EVENT_AP_ERROR	0x01000000	tg3.h
32029	MAC_EVENT_ODI_ERROR	0x02000000	tg3.h
32030	MAC_EVENT_RXSTAT_OVERRUN	0x04000000	tg3.h
32031	MAC_EVENT_TXSTAT_OVERRUN	0x08000000	tg3.h
32032	MAC_LED_CTRL	0x0000040c	tg3.h
32033	LED_CTRL_LNKLED_OVERRIDE	0x00000001	tg3.h
32034	LED_CTRL_1000MBPS_ON	0x00000002	tg3.h
32035	LED_CTRL_100MBPS_ON	0x00000004	tg3.h
32036	LED_CTRL_10MBPS_ON	0x00000008	tg3.h
32037	LED_CTRL_TRAFFIC_OVERRIDE	0x00000010	tg3.h
32038	LED_CTRL_TRAFFIC_BLINK	0x00000020	tg3.h
32039	LED_CTRL_TRAFFIC_LED	0x00000040	tg3.h
32040	LED_CTRL_1000MBPS_STATUS	0x00000080	tg3.h
32041	LED_CTRL_100MBPS_STATUS	0x00000100	tg3.h
32042	LED_CTRL_10MBPS_STATUS	0x00000200	tg3.h
32043	LED_CTRL_TRAFFIC_STATUS	0x00000400	tg3.h
32044	LED_CTRL_MAC_MODE	0x00000000	tg3.h
32045	LED_CTRL_PHY_MODE_1	0x00000800	tg3.h
32046	LED_CTRL_PHY_MODE_2	0x00001000	tg3.h
32047	LED_CTRL_BLINK_RATE_MASK	0x7ff80000	tg3.h
32048	LED_CTRL_BLINK_RATE_SHIFT	19	tg3.h
32049	LED_CTRL_BLINK_PER_OVERRIDE	0x00080000	tg3.h
32050	LED_CTRL_BLINK_RATE_OVERRIDE	0x80000000	tg3.h
32051	MAC_ADDR_0_HIGH	0x00000410	tg3.h	upper 2 bytes
32052	MAC_ADDR_0_LOW	0x00000414	tg3.h	lower 4 bytes
32053	MAC_ADDR_1_HIGH	0x00000418	tg3.h	upper 2 bytes
32054	MAC_ADDR_1_LOW	0x0000041c	tg3.h	lower 4 bytes
32055	MAC_ADDR_2_HIGH	0x00000420	tg3.h	upper 2 bytes
32056	MAC_ADDR_2_LOW	0x00000424	tg3.h	lower 4 bytes
32057	MAC_ADDR_3_HIGH	0x00000428	tg3.h	upper 2 bytes
32058	MAC_ADDR_3_LOW	0x0000042c	tg3.h	lower 4 bytes
32059	MAC_ACPI_MBUF_PTR	0x00000430	tg3.h
32060	MAC_ACPI_LEN_OFFSET	0x00000434	tg3.h
32061	ACPI_LENOFF_LEN_MASK	0x0000ffff	tg3.h
32062	ACPI_LENOFF_LEN_SHIFT	0	tg3.h
32063	ACPI_LENOFF_OFF_MASK	0x0fff0000	tg3.h
32064	ACPI_LENOFF_OFF_SHIFT	16	tg3.h
32065	MAC_TX_BACKOFF_SEED	0x00000438	tg3.h
32066	TX_BACKOFF_SEED_MASK	0x000003ff	tg3.h
32067	MAC_RX_MTU_SIZE	0x0000043c	tg3.h
32068	RX_MTU_SIZE_MASK	0x0000ffff	tg3.h
32069	MAC_PCS_TEST	0x00000440	tg3.h
32070	PCS_TEST_PATTERN_MASK	0x000fffff	tg3.h
32071	PCS_TEST_PATTERN_SHIFT	0	tg3.h
32072	PCS_TEST_ENABLE	0x00100000	tg3.h
32073	MAC_TX_AUTO_NEG	0x00000444	tg3.h
32074	TX_AUTO_NEG_MASK	0x0000ffff	tg3.h
32075	TX_AUTO_NEG_SHIFT	0	tg3.h
32076	MAC_RX_AUTO_NEG	0x00000448	tg3.h
32077	RX_AUTO_NEG_MASK	0x0000ffff	tg3.h
32078	RX_AUTO_NEG_SHIFT	0	tg3.h
32079	MAC_MI_COM	0x0000044c	tg3.h
32080	MI_COM_CMD_MASK	0x0c000000	tg3.h
32081	MI_COM_CMD_WRITE	0x04000000	tg3.h
32082	MI_COM_CMD_READ	0x08000000	tg3.h
32083	MI_COM_READ_FAILED	0x10000000	tg3.h
32084	MI_COM_START	0x20000000	tg3.h
32085	MI_COM_BUSY	0x20000000	tg3.h
32086	MI_COM_PHY_ADDR_MASK	0x03e00000	tg3.h
32087	MI_COM_PHY_ADDR_SHIFT	21	tg3.h
32088	MI_COM_REG_ADDR_MASK	0x001f0000	tg3.h
32089	MI_COM_REG_ADDR_SHIFT	16	tg3.h
32090	MI_COM_DATA_MASK	0x0000ffff	tg3.h
32091	MAC_MI_STAT	0x00000450	tg3.h
32092	MAC_MI_STAT_LNKSTAT_ATTN_ENAB	0x00000001	tg3.h
32093	MAC_MI_MODE	0x00000454	tg3.h
32094	MAC_MI_MODE_CLK_10MHZ	0x00000001	tg3.h
32095	MAC_MI_MODE_SHORT_PREAMBLE	0x00000002	tg3.h
32096	MAC_MI_MODE_AUTO_POLL	0x00000010	tg3.h
32097	MAC_MI_MODE_CORE_CLK_62MHZ	0x00008000	tg3.h
32098	MAC_MI_MODE_BASE	0x000c0000	tg3.h	XXX magic values XXX
32099	MAC_AUTO_POLL_STATUS	0x00000458	tg3.h
32100	MAC_AUTO_POLL_ERROR	0x00000001	tg3.h
32101	MAC_TX_MODE	0x0000045c	tg3.h
32102	TX_MODE_RESET	0x00000001	tg3.h
32103	TX_MODE_ENABLE	0x00000002	tg3.h
32104	TX_MODE_FLOW_CTRL_ENABLE	0x00000010	tg3.h
32105	TX_MODE_BIG_BCKOFF_ENABLE	0x00000020	tg3.h
32106	TX_MODE_LONG_PAUSE_ENABLE	0x00000040	tg3.h
32107	MAC_TX_STATUS	0x00000460	tg3.h
32108	TX_STATUS_XOFFED	0x00000001	tg3.h
32109	TX_STATUS_SENT_XOFF	0x00000002	tg3.h
32110	TX_STATUS_SENT_XON	0x00000004	tg3.h
32111	TX_STATUS_LINK_UP	0x00000008	tg3.h
32112	TX_STATUS_ODI_UNDERRUN	0x00000010	tg3.h
32113	TX_STATUS_ODI_OVERRUN	0x00000020	tg3.h
32114	MAC_TX_LENGTHS	0x00000464	tg3.h
32115	TX_LENGTHS_SLOT_TIME_MASK	0x000000ff	tg3.h
32116	TX_LENGTHS_SLOT_TIME_SHIFT	0	tg3.h
32117	TX_LENGTHS_IPG_MASK	0x00000f00	tg3.h
32118	TX_LENGTHS_IPG_SHIFT	8	tg3.h
32119	TX_LENGTHS_IPG_CRS_MASK	0x00003000	tg3.h
32120	TX_LENGTHS_IPG_CRS_SHIFT	12	tg3.h
32121	MAC_RX_MODE	0x00000468	tg3.h
32122	RX_MODE_RESET	0x00000001	tg3.h
32123	RX_MODE_ENABLE	0x00000002	tg3.h
32124	RX_MODE_FLOW_CTRL_ENABLE	0x00000004	tg3.h
32125	RX_MODE_KEEP_MAC_CTRL	0x00000008	tg3.h
32126	RX_MODE_KEEP_PAUSE	0x00000010	tg3.h
32127	RX_MODE_ACCEPT_OVERSIZED	0x00000020	tg3.h
32128	RX_MODE_ACCEPT_RUNTS	0x00000040	tg3.h
32129	RX_MODE_LEN_CHECK	0x00000080	tg3.h
32130	RX_MODE_PROMISC	0x00000100	tg3.h
32131	RX_MODE_NO_CRC_CHECK	0x00000200	tg3.h
32132	RX_MODE_KEEP_VLAN_TAG	0x00000400	tg3.h
32133	MAC_RX_STATUS	0x0000046c	tg3.h
32134	RX_STATUS_REMOTE_TX_XOFFED	0x00000001	tg3.h
32135	RX_STATUS_XOFF_RCVD	0x00000002	tg3.h
32136	RX_STATUS_XON_RCVD	0x00000004	tg3.h
32137	MAC_HASH_REG_0	0x00000470	tg3.h
32138	MAC_HASH_REG_1	0x00000474	tg3.h
32139	MAC_HASH_REG_2	0x00000478	tg3.h
32140	MAC_HASH_REG_3	0x0000047c	tg3.h
32141	MAC_RCV_RULE_0	0x00000480	tg3.h
32142	MAC_RCV_VALUE_0	0x00000484	tg3.h
32143	MAC_RCV_RULE_1	0x00000488	tg3.h
32144	MAC_RCV_VALUE_1	0x0000048c	tg3.h
32145	MAC_RCV_RULE_2	0x00000490	tg3.h
32146	MAC_RCV_VALUE_2	0x00000494	tg3.h
32147	MAC_RCV_RULE_3	0x00000498	tg3.h
32148	MAC_RCV_VALUE_3	0x0000049c	tg3.h
32149	MAC_RCV_RULE_4	0x000004a0	tg3.h
32150	MAC_RCV_VALUE_4	0x000004a4	tg3.h
32151	MAC_RCV_RULE_5	0x000004a8	tg3.h
32152	MAC_RCV_VALUE_5	0x000004ac	tg3.h
32153	MAC_RCV_RULE_6	0x000004b0	tg3.h
32154	MAC_RCV_VALUE_6	0x000004b4	tg3.h
32155	MAC_RCV_RULE_7	0x000004b8	tg3.h
32156	MAC_RCV_VALUE_7	0x000004bc	tg3.h
32157	MAC_RCV_RULE_8	0x000004c0	tg3.h
32158	MAC_RCV_VALUE_8	0x000004c4	tg3.h
32159	MAC_RCV_RULE_9	0x000004c8	tg3.h
32160	MAC_RCV_VALUE_9	0x000004cc	tg3.h
32161	MAC_RCV_RULE_10	0x000004d0	tg3.h
32162	MAC_RCV_VALUE_10	0x000004d4	tg3.h
32163	MAC_RCV_RULE_11	0x000004d8	tg3.h
32164	MAC_RCV_VALUE_11	0x000004dc	tg3.h
32165	MAC_RCV_RULE_12	0x000004e0	tg3.h
32166	MAC_RCV_VALUE_12	0x000004e4	tg3.h
32167	MAC_RCV_RULE_13	0x000004e8	tg3.h
32168	MAC_RCV_VALUE_13	0x000004ec	tg3.h
32169	MAC_RCV_RULE_14	0x000004f0	tg3.h
32170	MAC_RCV_VALUE_14	0x000004f4	tg3.h
32171	MAC_RCV_RULE_15	0x000004f8	tg3.h
32172	MAC_RCV_VALUE_15	0x000004fc	tg3.h
32173	RCV_RULE_DISABLE_MASK	0x7fffffff	tg3.h
32174	MAC_RCV_RULE_CFG	0x00000500	tg3.h
32175	RCV_RULE_CFG_DEFAULT_CLASS	0x00000008	tg3.h
32176	MAC_LOW_WMARK_MAX_RX_FRAME	0x00000504	tg3.h
32177	MAC_HASHREGU_0	0x00000520	tg3.h
32178	MAC_HASHREGU_1	0x00000524	tg3.h
32179	MAC_HASHREGU_2	0x00000528	tg3.h
32180	MAC_HASHREGU_3	0x0000052c	tg3.h
32181	MAC_EXTADDR_0_HIGH	0x00000530	tg3.h
32182	MAC_EXTADDR_0_LOW	0x00000534	tg3.h
32183	MAC_EXTADDR_1_HIGH	0x00000538	tg3.h
32184	MAC_EXTADDR_1_LOW	0x0000053c	tg3.h
32185	MAC_EXTADDR_2_HIGH	0x00000540	tg3.h
32186	MAC_EXTADDR_2_LOW	0x00000544	tg3.h
32187	MAC_EXTADDR_3_HIGH	0x00000548	tg3.h
32188	MAC_EXTADDR_3_LOW	0x0000054c	tg3.h
32189	MAC_EXTADDR_4_HIGH	0x00000550	tg3.h
32190	MAC_EXTADDR_4_LOW	0x00000554	tg3.h
32191	MAC_EXTADDR_5_HIGH	0x00000558	tg3.h
32192	MAC_EXTADDR_5_LOW	0x0000055c	tg3.h
32193	MAC_EXTADDR_6_HIGH	0x00000560	tg3.h
32194	MAC_EXTADDR_6_LOW	0x00000564	tg3.h
32195	MAC_EXTADDR_7_HIGH	0x00000568	tg3.h
32196	MAC_EXTADDR_7_LOW	0x0000056c	tg3.h
32197	MAC_EXTADDR_8_HIGH	0x00000570	tg3.h
32198	MAC_EXTADDR_8_LOW	0x00000574	tg3.h
32199	MAC_EXTADDR_9_HIGH	0x00000578	tg3.h
32200	MAC_EXTADDR_9_LOW	0x0000057c	tg3.h
32201	MAC_EXTADDR_10_HIGH	0x00000580	tg3.h
32202	MAC_EXTADDR_10_LOW	0x00000584	tg3.h
32203	MAC_EXTADDR_11_HIGH	0x00000588	tg3.h
32204	MAC_EXTADDR_11_LOW	0x0000058c	tg3.h
32205	MAC_SERDES_CFG	0x00000590	tg3.h
32206	MAC_SERDES_STAT	0x00000594	tg3.h
32207	MAC_TX_MAC_STATE_BASE	0x00000600	tg3.h	16 bytes
32208	MAC_RX_MAC_STATE_BASE	0x00000610	tg3.h	20 bytes
32209	MAC_TX_STATS_OCTETS	0x00000800	tg3.h
32210	MAC_TX_STATS_RESV1	0x00000804	tg3.h
32211	MAC_TX_STATS_COLLISIONS	0x00000808	tg3.h
32212	MAC_TX_STATS_XON_SENT	0x0000080c	tg3.h
32213	MAC_TX_STATS_XOFF_SENT	0x00000810	tg3.h
32214	MAC_TX_STATS_RESV2	0x00000814	tg3.h
32215	MAC_TX_STATS_MAC_ERRORS	0x00000818	tg3.h
32216	MAC_TX_STATS_SINGLE_COLLISIONS	0x0000081c	tg3.h
32217	MAC_TX_STATS_MULT_COLLISIONS	0x00000820	tg3.h
32218	MAC_TX_STATS_DEFERRED	0x00000824	tg3.h
32219	MAC_TX_STATS_RESV3	0x00000828	tg3.h
32220	MAC_TX_STATS_EXCESSIVE_COL	0x0000082c	tg3.h
32221	MAC_TX_STATS_LATE_COL	0x00000830	tg3.h
32222	MAC_TX_STATS_RESV4_1	0x00000834	tg3.h
32223	MAC_TX_STATS_RESV4_2	0x00000838	tg3.h
32224	MAC_TX_STATS_RESV4_3	0x0000083c	tg3.h
32225	MAC_TX_STATS_RESV4_4	0x00000840	tg3.h
32226	MAC_TX_STATS_RESV4_5	0x00000844	tg3.h
32227	MAC_TX_STATS_RESV4_6	0x00000848	tg3.h
32228	MAC_TX_STATS_RESV4_7	0x0000084c	tg3.h
32229	MAC_TX_STATS_RESV4_8	0x00000850	tg3.h
32230	MAC_TX_STATS_RESV4_9	0x00000854	tg3.h
32231	MAC_TX_STATS_RESV4_10	0x00000858	tg3.h
32232	MAC_TX_STATS_RESV4_11	0x0000085c	tg3.h
32233	MAC_TX_STATS_RESV4_12	0x00000860	tg3.h
32234	MAC_TX_STATS_RESV4_13	0x00000864	tg3.h
32235	MAC_TX_STATS_RESV4_14	0x00000868	tg3.h
32236	MAC_TX_STATS_UCAST	0x0000086c	tg3.h
32237	MAC_TX_STATS_MCAST	0x00000870	tg3.h
32238	MAC_TX_STATS_BCAST	0x00000874	tg3.h
32239	MAC_TX_STATS_RESV5_1	0x00000878	tg3.h
32240	MAC_TX_STATS_RESV5_2	0x0000087c	tg3.h
32241	MAC_RX_STATS_OCTETS	0x00000880	tg3.h
32242	MAC_RX_STATS_RESV1	0x00000884	tg3.h
32243	MAC_RX_STATS_FRAGMENTS	0x00000888	tg3.h
32244	MAC_RX_STATS_UCAST	0x0000088c	tg3.h
32245	MAC_RX_STATS_MCAST	0x00000890	tg3.h
32246	MAC_RX_STATS_BCAST	0x00000894	tg3.h
32247	MAC_RX_STATS_FCS_ERRORS	0x00000898	tg3.h
32248	MAC_RX_STATS_ALIGN_ERRORS	0x0000089c	tg3.h
32249	MAC_RX_STATS_XON_PAUSE_RECVD	0x000008a0	tg3.h
32250	MAC_RX_STATS_XOFF_PAUSE_RECVD	0x000008a4	tg3.h
32251	MAC_RX_STATS_MAC_CTRL_RECVD	0x000008a8	tg3.h
32252	MAC_RX_STATS_XOFF_ENTERED	0x000008ac	tg3.h
32253	MAC_RX_STATS_FRAME_TOO_LONG	0x000008b0	tg3.h
32254	MAC_RX_STATS_JABBERS	0x000008b4	tg3.h
32255	MAC_RX_STATS_UNDERSIZE	0x000008b8	tg3.h
32256	SNDDATAI_MODE	0x00000c00	tg3.h
32257	SNDDATAI_MODE_RESET	0x00000001	tg3.h
32258	SNDDATAI_MODE_ENABLE	0x00000002	tg3.h
32259	SNDDATAI_MODE_STAT_OFLOW_ENAB	0x00000004	tg3.h
32260	SNDDATAI_STATUS	0x00000c04	tg3.h
32261	SNDDATAI_STATUS_STAT_OFLOW	0x00000004	tg3.h
32262	SNDDATAI_STATSCTRL	0x00000c08	tg3.h
32263	SNDDATAI_SCTRL_ENABLE	0x00000001	tg3.h
32264	SNDDATAI_SCTRL_FASTUPD	0x00000002	tg3.h
32265	SNDDATAI_SCTRL_CLEAR	0x00000004	tg3.h
32266	SNDDATAI_SCTRL_FLUSH	0x00000008	tg3.h
32267	SNDDATAI_SCTRL_FORCE_ZERO	0x00000010	tg3.h
32268	SNDDATAI_STATSENAB	0x00000c0c	tg3.h
32269	SNDDATAI_STATSINCMASK	0x00000c10	tg3.h
32270	SNDDATAI_COS_CNT_0	0x00000c80	tg3.h
32271	SNDDATAI_COS_CNT_1	0x00000c84	tg3.h
32272	SNDDATAI_COS_CNT_2	0x00000c88	tg3.h
32273	SNDDATAI_COS_CNT_3	0x00000c8c	tg3.h
32274	SNDDATAI_COS_CNT_4	0x00000c90	tg3.h
32275	SNDDATAI_COS_CNT_5	0x00000c94	tg3.h
32276	SNDDATAI_COS_CNT_6	0x00000c98	tg3.h
32277	SNDDATAI_COS_CNT_7	0x00000c9c	tg3.h
32278	SNDDATAI_COS_CNT_8	0x00000ca0	tg3.h
32279	SNDDATAI_COS_CNT_9	0x00000ca4	tg3.h
32280	SNDDATAI_COS_CNT_10	0x00000ca8	tg3.h
32281	SNDDATAI_COS_CNT_11	0x00000cac	tg3.h
32282	SNDDATAI_COS_CNT_12	0x00000cb0	tg3.h
32283	SNDDATAI_COS_CNT_13	0x00000cb4	tg3.h
32284	SNDDATAI_COS_CNT_14	0x00000cb8	tg3.h
32285	SNDDATAI_COS_CNT_15	0x00000cbc	tg3.h
32286	SNDDATAI_DMA_RDQ_FULL_CNT	0x00000cc0	tg3.h
32287	SNDDATAI_DMA_PRIO_RDQ_FULL_CNT	0x00000cc4	tg3.h
32288	SNDDATAI_SDCQ_FULL_CNT	0x00000cc8	tg3.h
32289	SNDDATAI_NICRNG_SSND_PIDX_CNT	0x00000ccc	tg3.h
32290	SNDDATAI_STATS_UPDATED_CNT	0x00000cd0	tg3.h
32291	SNDDATAI_INTERRUPTS_CNT	0x00000cd4	tg3.h
32292	SNDDATAI_AVOID_INTERRUPTS_CNT	0x00000cd8	tg3.h
32293	SNDDATAI_SND_THRESH_HIT_CNT	0x00000cdc	tg3.h
32294	SNDDATAC_MODE	0x00001000	tg3.h
32295	SNDDATAC_MODE_RESET	0x00000001	tg3.h
32296	SNDDATAC_MODE_ENABLE	0x00000002	tg3.h
32297	SNDBDS_MODE	0x00001400	tg3.h
32298	SNDBDS_MODE_RESET	0x00000001	tg3.h
32299	SNDBDS_MODE_ENABLE	0x00000002	tg3.h
32300	SNDBDS_MODE_ATTN_ENABLE	0x00000004	tg3.h
32301	SNDBDS_STATUS	0x00001404	tg3.h
32302	SNDBDS_STATUS_ERROR_ATTN	0x00000004	tg3.h
32303	SNDBDS_HWDIAG	0x00001408	tg3.h
32304	SNDBDS_SEL_CON_IDX_0	0x00001440	tg3.h
32305	SNDBDS_SEL_CON_IDX_1	0x00001444	tg3.h
32306	SNDBDS_SEL_CON_IDX_2	0x00001448	tg3.h
32307	SNDBDS_SEL_CON_IDX_3	0x0000144c	tg3.h
32308	SNDBDS_SEL_CON_IDX_4	0x00001450	tg3.h
32309	SNDBDS_SEL_CON_IDX_5	0x00001454	tg3.h
32310	SNDBDS_SEL_CON_IDX_6	0x00001458	tg3.h
32311	SNDBDS_SEL_CON_IDX_7	0x0000145c	tg3.h
32312	SNDBDS_SEL_CON_IDX_8	0x00001460	tg3.h
32313	SNDBDS_SEL_CON_IDX_9	0x00001464	tg3.h
32314	SNDBDS_SEL_CON_IDX_10	0x00001468	tg3.h
32315	SNDBDS_SEL_CON_IDX_11	0x0000146c	tg3.h
32316	SNDBDS_SEL_CON_IDX_12	0x00001470	tg3.h
32317	SNDBDS_SEL_CON_IDX_13	0x00001474	tg3.h
32318	SNDBDS_SEL_CON_IDX_14	0x00001478	tg3.h
32319	SNDBDS_SEL_CON_IDX_15	0x0000147c	tg3.h
32320	SNDBDI_MODE	0x00001800	tg3.h
32321	SNDBDI_MODE_RESET	0x00000001	tg3.h
32322	SNDBDI_MODE_ENABLE	0x00000002	tg3.h
32323	SNDBDI_MODE_ATTN_ENABLE	0x00000004	tg3.h
32324	SNDBDI_STATUS	0x00001804	tg3.h
32325	SNDBDI_STATUS_ERROR_ATTN	0x00000004	tg3.h
32326	SNDBDI_IN_PROD_IDX_0	0x00001808	tg3.h
32327	SNDBDI_IN_PROD_IDX_1	0x0000180c	tg3.h
32328	SNDBDI_IN_PROD_IDX_2	0x00001810	tg3.h
32329	SNDBDI_IN_PROD_IDX_3	0x00001814	tg3.h
32330	SNDBDI_IN_PROD_IDX_4	0x00001818	tg3.h
32331	SNDBDI_IN_PROD_IDX_5	0x0000181c	tg3.h
32332	SNDBDI_IN_PROD_IDX_6	0x00001820	tg3.h
32333	SNDBDI_IN_PROD_IDX_7	0x00001824	tg3.h
32334	SNDBDI_IN_PROD_IDX_8	0x00001828	tg3.h
32335	SNDBDI_IN_PROD_IDX_9	0x0000182c	tg3.h
32336	SNDBDI_IN_PROD_IDX_10	0x00001830	tg3.h
32337	SNDBDI_IN_PROD_IDX_11	0x00001834	tg3.h
32338	SNDBDI_IN_PROD_IDX_12	0x00001838	tg3.h
32339	SNDBDI_IN_PROD_IDX_13	0x0000183c	tg3.h
32340	SNDBDI_IN_PROD_IDX_14	0x00001840	tg3.h
32341	SNDBDI_IN_PROD_IDX_15	0x00001844	tg3.h
32342	SNDBDC_MODE	0x00001c00	tg3.h
32343	SNDBDC_MODE_RESET	0x00000001	tg3.h
32344	SNDBDC_MODE_ENABLE	0x00000002	tg3.h
32345	SNDBDC_MODE_ATTN_ENABLE	0x00000004	tg3.h
32346	RCVLPC_MODE	0x00002000	tg3.h
32347	RCVLPC_MODE_RESET	0x00000001	tg3.h
32348	RCVLPC_MODE_ENABLE	0x00000002	tg3.h
32349	RCVLPC_MODE_CLASS0_ATTN_ENAB	0x00000004	tg3.h
32350	RCVLPC_MODE_MAPOOR_AATTN_ENAB	0x00000008	tg3.h
32351	RCVLPC_MODE_STAT_OFLOW_ENAB	0x00000010	tg3.h
32352	RCVLPC_STATUS	0x00002004	tg3.h
32353	RCVLPC_STATUS_CLASS0	0x00000004	tg3.h
32354	RCVLPC_STATUS_MAPOOR	0x00000008	tg3.h
32355	RCVLPC_STATUS_STAT_OFLOW	0x00000010	tg3.h
32356	RCVLPC_LOCK	0x00002008	tg3.h
32357	RCVLPC_LOCK_REQ_MASK	0x0000ffff	tg3.h
32358	RCVLPC_LOCK_REQ_SHIFT	0	tg3.h
32359	RCVLPC_LOCK_GRANT_MASK	0xffff0000	tg3.h
32360	RCVLPC_LOCK_GRANT_SHIFT	16	tg3.h
32361	RCVLPC_NON_EMPTY_BITS	0x0000200c	tg3.h
32362	RCVLPC_NON_EMPTY_BITS_MASK	0x0000ffff	tg3.h
32363	RCVLPC_CONFIG	0x00002010	tg3.h
32364	RCVLPC_STATSCTRL	0x00002014	tg3.h
32365	RCVLPC_STATSCTRL_ENABLE	0x00000001	tg3.h
32366	RCVLPC_STATSCTRL_FASTUPD	0x00000002	tg3.h
32367	RCVLPC_STATS_ENABLE	0x00002018	tg3.h
32368	RCVLPC_STATSENAB_LNGBRST_RFIX	0x00400000	tg3.h
32369	RCVLPC_STATS_INCMASK	0x0000201c	tg3.h
32370	RCVLPC_SELLST_BASE	0x00002100	tg3.h	16 16-byte entries
32371	SELLST_TAIL	0x00000004	tg3.h
32372	SELLST_CONT	0x00000008	tg3.h
32373	SELLST_UNUSED	0x0000000c	tg3.h
32374	RCVLPC_COS_CNTL_BASE	0x00002200	tg3.h	16 4-byte entries
32375	RCVLPC_DROP_FILTER_CNT	0x00002240	tg3.h
32376	RCVLPC_DMA_WQ_FULL_CNT	0x00002244	tg3.h
32377	RCVLPC_DMA_HIPRIO_WQ_FULL_CNT	0x00002248	tg3.h
32378	RCVLPC_NO_RCV_BD_CNT	0x0000224c	tg3.h
32379	RCVLPC_IN_DISCARDS_CNT	0x00002250	tg3.h
32380	RCVLPC_IN_ERRORS_CNT	0x00002254	tg3.h
32381	RCVLPC_RCV_THRESH_HIT_CNT	0x00002258	tg3.h
32382	RCVDBDI_MODE	0x00002400	tg3.h
32383	RCVDBDI_MODE_RESET	0x00000001	tg3.h
32384	RCVDBDI_MODE_ENABLE	0x00000002	tg3.h
32385	RCVDBDI_MODE_JUMBOBD_NEEDED	0x00000004	tg3.h
32386	RCVDBDI_MODE_FRM_TOO_BIG	0x00000008	tg3.h
32387	RCVDBDI_MODE_INV_RING_SZ	0x00000010	tg3.h
32388	RCVDBDI_STATUS	0x00002404	tg3.h
32389	RCVDBDI_STATUS_JUMBOBD_NEEDED	0x00000004	tg3.h
32390	RCVDBDI_STATUS_FRM_TOO_BIG	0x00000008	tg3.h
32391	RCVDBDI_STATUS_INV_RING_SZ	0x00000010	tg3.h
32392	RCVDBDI_SPLIT_FRAME_MINSZ	0x00002408	tg3.h
32393	RCVDBDI_JUMBO_BD	0x00002440	tg3.h	TG3_BDINFO_...
32394	RCVDBDI_STD_BD	0x00002450	tg3.h	TG3_BDINFO_...
32395	RCVDBDI_MINI_BD	0x00002460	tg3.h	TG3_BDINFO_...
32396	RCVDBDI_JUMBO_CON_IDX	0x00002470	tg3.h
32397	RCVDBDI_STD_CON_IDX	0x00002474	tg3.h
32398	RCVDBDI_MINI_CON_IDX	0x00002478	tg3.h
32399	RCVDBDI_BD_PROD_IDX_0	0x00002480	tg3.h
32400	RCVDBDI_BD_PROD_IDX_1	0x00002484	tg3.h
32401	RCVDBDI_BD_PROD_IDX_2	0x00002488	tg3.h
32402	RCVDBDI_BD_PROD_IDX_3	0x0000248c	tg3.h
32403	RCVDBDI_BD_PROD_IDX_4	0x00002490	tg3.h
32404	RCVDBDI_BD_PROD_IDX_5	0x00002494	tg3.h
32405	RCVDBDI_BD_PROD_IDX_6	0x00002498	tg3.h
32406	RCVDBDI_BD_PROD_IDX_7	0x0000249c	tg3.h
32407	RCVDBDI_BD_PROD_IDX_8	0x000024a0	tg3.h
32408	RCVDBDI_BD_PROD_IDX_9	0x000024a4	tg3.h
32409	RCVDBDI_BD_PROD_IDX_10	0x000024a8	tg3.h
32410	RCVDBDI_BD_PROD_IDX_11	0x000024ac	tg3.h
32411	RCVDBDI_BD_PROD_IDX_12	0x000024b0	tg3.h
32412	RCVDBDI_BD_PROD_IDX_13	0x000024b4	tg3.h
32413	RCVDBDI_BD_PROD_IDX_14	0x000024b8	tg3.h
32414	RCVDBDI_BD_PROD_IDX_15	0x000024bc	tg3.h
32415	RCVDBDI_HWDIAG	0x000024c0	tg3.h
32416	RCVDCC_MODE	0x00002800	tg3.h
32417	RCVDCC_MODE_RESET	0x00000001	tg3.h
32418	RCVDCC_MODE_ENABLE	0x00000002	tg3.h
32419	RCVDCC_MODE_ATTN_ENABLE	0x00000004	tg3.h
32420	RCVBDI_MODE	0x00002c00	tg3.h
32421	RCVBDI_MODE_RESET	0x00000001	tg3.h
32422	RCVBDI_MODE_ENABLE	0x00000002	tg3.h
32423	RCVBDI_MODE_RCB_ATTN_ENAB	0x00000004	tg3.h
32424	RCVBDI_STATUS	0x00002c04	tg3.h
32425	RCVBDI_STATUS_RCB_ATTN	0x00000004	tg3.h
32426	RCVBDI_JUMBO_PROD_IDX	0x00002c08	tg3.h
32427	RCVBDI_STD_PROD_IDX	0x00002c0c	tg3.h
32428	RCVBDI_MINI_PROD_IDX	0x00002c10	tg3.h
32429	RCVBDI_MINI_THRESH	0x00002c14	tg3.h
32430	RCVBDI_STD_THRESH	0x00002c18	tg3.h
32431	RCVBDI_JUMBO_THRESH	0x00002c1c	tg3.h
32432	RCVCC_MODE	0x00003000	tg3.h
32433	RCVCC_MODE_RESET	0x00000001	tg3.h
32434	RCVCC_MODE_ENABLE	0x00000002	tg3.h
32435	RCVCC_MODE_ATTN_ENABLE	0x00000004	tg3.h
32436	RCVCC_STATUS	0x00003004	tg3.h
32437	RCVCC_STATUS_ERROR_ATTN	0x00000004	tg3.h
32438	RCVCC_JUMP_PROD_IDX	0x00003008	tg3.h
32439	RCVCC_STD_PROD_IDX	0x0000300c	tg3.h
32440	RCVCC_MINI_PROD_IDX	0x00003010	tg3.h
32441	RCVLSC_MODE	0x00003400	tg3.h
32442	RCVLSC_MODE_RESET	0x00000001	tg3.h
32443	RCVLSC_MODE_ENABLE	0x00000002	tg3.h
32444	RCVLSC_MODE_ATTN_ENABLE	0x00000004	tg3.h
32445	RCVLSC_STATUS	0x00003404	tg3.h
32446	RCVLSC_STATUS_ERROR_ATTN	0x00000004	tg3.h
32447	MBFREE_MODE	0x00003800	tg3.h
32448	MBFREE_MODE_RESET	0x00000001	tg3.h
32449	MBFREE_MODE_ENABLE	0x00000002	tg3.h
32450	MBFREE_STATUS	0x00003804	tg3.h
32451	HOSTCC_MODE	0x00003c00	tg3.h
32452	HOSTCC_MODE_RESET	0x00000001	tg3.h
32453	HOSTCC_MODE_ENABLE	0x00000002	tg3.h
32454	HOSTCC_MODE_ATTN	0x00000004	tg3.h
32455	HOSTCC_MODE_NOW	0x00000008	tg3.h
32456	HOSTCC_MODE_FULL_STATUS	0x00000000	tg3.h
32457	HOSTCC_MODE_64BYTE	0x00000080	tg3.h
32458	HOSTCC_MODE_32BYTE	0x00000100	tg3.h
32459	HOSTCC_MODE_CLRTICK_RXBD	0x00000200	tg3.h
32460	HOSTCC_MODE_CLRTICK_TXBD	0x00000400	tg3.h
32461	HOSTCC_MODE_NOINT_ON_NOW	0x00000800	tg3.h
32462	HOSTCC_MODE_NOINT_ON_FORCE	0x00001000	tg3.h
32463	HOSTCC_STATUS	0x00003c04	tg3.h
32464	HOSTCC_STATUS_ERROR_ATTN	0x00000004	tg3.h
32465	HOSTCC_RXCOL_TICKS	0x00003c08	tg3.h
32466	LOW_RXCOL_TICKS	0x00000032	tg3.h
32467	DEFAULT_RXCOL_TICKS	0x00000048	tg3.h
32468	HIGH_RXCOL_TICKS	0x00000096	tg3.h
32469	HOSTCC_TXCOL_TICKS	0x00003c0c	tg3.h
32470	LOW_TXCOL_TICKS	0x00000096	tg3.h
32471	DEFAULT_TXCOL_TICKS	0x0000012c	tg3.h
32472	HIGH_TXCOL_TICKS	0x00000145	tg3.h
32473	HOSTCC_RXMAX_FRAMES	0x00003c10	tg3.h
32474	LOW_RXMAX_FRAMES	0x00000005	tg3.h
32475	DEFAULT_RXMAX_FRAMES	0x00000008	tg3.h
32476	HIGH_RXMAX_FRAMES	0x00000012	tg3.h
32477	HOSTCC_TXMAX_FRAMES	0x00003c14	tg3.h
32478	LOW_TXMAX_FRAMES	0x00000035	tg3.h
32479	DEFAULT_TXMAX_FRAMES	0x0000004b	tg3.h
32480	HIGH_TXMAX_FRAMES	0x00000052	tg3.h
32481	HOSTCC_RXCOAL_TICK_INT	0x00003c18	tg3.h
32482	DEFAULT_RXCOAL_TICK_INT	0x00000019	tg3.h
32483	HOSTCC_TXCOAL_TICK_INT	0x00003c1c	tg3.h
32484	DEFAULT_TXCOAL_TICK_INT	0x00000019	tg3.h
32485	HOSTCC_RXCOAL_MAXF_INT	0x00003c20	tg3.h
32486	DEFAULT_RXCOAL_MAXF_INT	0x00000005	tg3.h
32487	HOSTCC_TXCOAL_MAXF_INT	0x00003c24	tg3.h
32488	DEFAULT_TXCOAL_MAXF_INT	0x00000005	tg3.h
32489	HOSTCC_STAT_COAL_TICKS	0x00003c28	tg3.h
32490	DEFAULT_STAT_COAL_TICKS	0x000f4240	tg3.h
32491	HOSTCC_STATS_BLK_HOST_ADDR	0x00003c30	tg3.h	64-bit
32492	HOSTCC_STATUS_BLK_HOST_ADDR	0x00003c38	tg3.h	64-bit
32493	HOSTCC_STATS_BLK_NIC_ADDR	0x00003c40	tg3.h
32494	HOSTCC_STATUS_BLK_NIC_ADDR	0x00003c44	tg3.h
32495	HOSTCC_FLOW_ATTN	0x00003c48	tg3.h
32496	HOSTCC_JUMBO_CON_IDX	0x00003c50	tg3.h
32497	HOSTCC_STD_CON_IDX	0x00003c54	tg3.h
32498	HOSTCC_MINI_CON_IDX	0x00003c58	tg3.h
32499	HOSTCC_RET_PROD_IDX_0	0x00003c80	tg3.h
32500	HOSTCC_RET_PROD_IDX_1	0x00003c84	tg3.h
32501	HOSTCC_RET_PROD_IDX_2	0x00003c88	tg3.h
32502	HOSTCC_RET_PROD_IDX_3	0x00003c8c	tg3.h
32503	HOSTCC_RET_PROD_IDX_4	0x00003c90	tg3.h
32504	HOSTCC_RET_PROD_IDX_5	0x00003c94	tg3.h
32505	HOSTCC_RET_PROD_IDX_6	0x00003c98	tg3.h
32506	HOSTCC_RET_PROD_IDX_7	0x00003c9c	tg3.h
32507	HOSTCC_RET_PROD_IDX_8	0x00003ca0	tg3.h
32508	HOSTCC_RET_PROD_IDX_9	0x00003ca4	tg3.h
32509	HOSTCC_RET_PROD_IDX_10	0x00003ca8	tg3.h
32510	HOSTCC_RET_PROD_IDX_11	0x00003cac	tg3.h
32511	HOSTCC_RET_PROD_IDX_12	0x00003cb0	tg3.h
32512	HOSTCC_RET_PROD_IDX_13	0x00003cb4	tg3.h
32513	HOSTCC_RET_PROD_IDX_14	0x00003cb8	tg3.h
32514	HOSTCC_RET_PROD_IDX_15	0x00003cbc	tg3.h
32515	HOSTCC_SND_CON_IDX_0	0x00003cc0	tg3.h
32516	HOSTCC_SND_CON_IDX_1	0x00003cc4	tg3.h
32517	HOSTCC_SND_CON_IDX_2	0x00003cc8	tg3.h
32518	HOSTCC_SND_CON_IDX_3	0x00003ccc	tg3.h
32519	HOSTCC_SND_CON_IDX_4	0x00003cd0	tg3.h
32520	HOSTCC_SND_CON_IDX_5	0x00003cd4	tg3.h
32521	HOSTCC_SND_CON_IDX_6	0x00003cd8	tg3.h
32522	HOSTCC_SND_CON_IDX_7	0x00003cdc	tg3.h
32523	HOSTCC_SND_CON_IDX_8	0x00003ce0	tg3.h
32524	HOSTCC_SND_CON_IDX_9	0x00003ce4	tg3.h
32525	HOSTCC_SND_CON_IDX_10	0x00003ce8	tg3.h
32526	HOSTCC_SND_CON_IDX_11	0x00003cec	tg3.h
32527	HOSTCC_SND_CON_IDX_12	0x00003cf0	tg3.h
32528	HOSTCC_SND_CON_IDX_13	0x00003cf4	tg3.h
32529	HOSTCC_SND_CON_IDX_14	0x00003cf8	tg3.h
32530	HOSTCC_SND_CON_IDX_15	0x00003cfc	tg3.h
32531	MEMARB_MODE	0x00004000	tg3.h
32532	MEMARB_MODE_RESET	0x00000001	tg3.h
32533	MEMARB_MODE_ENABLE	0x00000002	tg3.h
32534	MEMARB_STATUS	0x00004004	tg3.h
32535	MEMARB_TRAP_ADDR_LOW	0x00004008	tg3.h
32536	MEMARB_TRAP_ADDR_HIGH	0x0000400c	tg3.h
32537	BUFMGR_MODE	0x00004400	tg3.h
32538	BUFMGR_MODE_RESET	0x00000001	tg3.h
32539	BUFMGR_MODE_ENABLE	0x00000002	tg3.h
32540	BUFMGR_MODE_ATTN_ENABLE	0x00000004	tg3.h
32541	BUFMGR_MODE_BM_TEST	0x00000008	tg3.h
32542	BUFMGR_MODE_MBLOW_ATTN_ENAB	0x00000010	tg3.h
32543	BUFMGR_STATUS	0x00004404	tg3.h
32544	BUFMGR_STATUS_ERROR	0x00000004	tg3.h
32545	BUFMGR_STATUS_MBLOW	0x00000010	tg3.h
32546	BUFMGR_MB_POOL_ADDR	0x00004408	tg3.h
32547	BUFMGR_MB_POOL_SIZE	0x0000440c	tg3.h
32548	BUFMGR_MB_RDMA_LOW_WATER	0x00004410	tg3.h
32549	DEFAULT_MB_RDMA_LOW_WATER	0x00000050	tg3.h
32550	DEFAULT_MB_RDMA_LOW_WATER_5705	0x00000000	tg3.h
32551	DEFAULT_MB_RDMA_LOW_WATER_JUMBO	0x00000130	tg3.h
32552	BUFMGR_MB_MACRX_LOW_WATER	0x00004414	tg3.h
32553	DEFAULT_MB_MACRX_LOW_WATER	0x00000020	tg3.h
32554	DEFAULT_MB_MACRX_LOW_WATER_5705	0x00000010	tg3.h
32555	DEFAULT_MB_MACRX_LOW_WATER_JUMB	0x00000098	tg3.h
32556	BUFMGR_MB_HIGH_WATER	0x00004418	tg3.h
32557	DEFAULT_MB_HIGH_WATER	0x00000060	tg3.h
32558	DEFAULT_MB_HIGH_WATER_5705	0x00000060	tg3.h
32559	DEFAULT_MB_HIGH_WATER_JUMBO	0x0000017c	tg3.h
32560	BUFMGR_RX_MB_ALLOC_REQ	0x0000441c	tg3.h
32561	BUFMGR_MB_ALLOC_BIT	0x10000000	tg3.h
32562	BUFMGR_RX_MB_ALLOC_RESP	0x00004420	tg3.h
32563	BUFMGR_TX_MB_ALLOC_REQ	0x00004424	tg3.h
32564	BUFMGR_TX_MB_ALLOC_RESP	0x00004428	tg3.h
32565	BUFMGR_DMA_DESC_POOL_ADDR	0x0000442c	tg3.h
32566	BUFMGR_DMA_DESC_POOL_SIZE	0x00004430	tg3.h
32567	BUFMGR_DMA_LOW_WATER	0x00004434	tg3.h
32568	DEFAULT_DMA_LOW_WATER	0x00000005	tg3.h
32569	BUFMGR_DMA_HIGH_WATER	0x00004438	tg3.h
32570	DEFAULT_DMA_HIGH_WATER	0x0000000a	tg3.h
32571	BUFMGR_RX_DMA_ALLOC_REQ	0x0000443c	tg3.h
32572	BUFMGR_RX_DMA_ALLOC_RESP	0x00004440	tg3.h
32573	BUFMGR_TX_DMA_ALLOC_REQ	0x00004444	tg3.h
32574	BUFMGR_TX_DMA_ALLOC_RESP	0x00004448	tg3.h
32575	BUFMGR_HWDIAG_0	0x0000444c	tg3.h
32576	BUFMGR_HWDIAG_1	0x00004450	tg3.h
32577	BUFMGR_HWDIAG_2	0x00004454	tg3.h
32578	RDMAC_MODE	0x00004800	tg3.h
32579	RDMAC_MODE_RESET	0x00000001	tg3.h
32580	RDMAC_MODE_ENABLE	0x00000002	tg3.h
32581	RDMAC_MODE_TGTABORT_ENAB	0x00000004	tg3.h
32582	RDMAC_MODE_MSTABORT_ENAB	0x00000008	tg3.h
32583	RDMAC_MODE_PARITYERR_ENAB	0x00000010	tg3.h
32584	RDMAC_MODE_ADDROFLOW_ENAB	0x00000020	tg3.h
32585	RDMAC_MODE_FIFOOFLOW_ENAB	0x00000040	tg3.h
32586	RDMAC_MODE_FIFOURUN_ENAB	0x00000080	tg3.h
32587	RDMAC_MODE_FIFOOREAD_ENAB	0x00000100	tg3.h
32588	RDMAC_MODE_LNGREAD_ENAB	0x00000200	tg3.h
32589	RDMAC_MODE_SPLIT_ENABLE	0x00000800	tg3.h
32590	RDMAC_MODE_SPLIT_RESET	0x00001000	tg3.h
32591	RDMAC_MODE_FIFO_SIZE_128	0x00020000	tg3.h
32592	RDMAC_MODE_FIFO_LONG_BURST	0x00030000	tg3.h
32593	RDMAC_STATUS	0x00004804	tg3.h
32594	RDMAC_STATUS_TGTABORT	0x00000004	tg3.h
32595	RDMAC_STATUS_MSTABORT	0x00000008	tg3.h
32596	RDMAC_STATUS_PARITYERR	0x00000010	tg3.h
32597	RDMAC_STATUS_ADDROFLOW	0x00000020	tg3.h
32598	RDMAC_STATUS_FIFOOFLOW	0x00000040	tg3.h
32599	RDMAC_STATUS_FIFOURUN	0x00000080	tg3.h
32600	RDMAC_STATUS_FIFOOREAD	0x00000100	tg3.h
32601	RDMAC_STATUS_LNGREAD	0x00000200	tg3.h
32602	WDMAC_MODE	0x00004c00	tg3.h
32603	WDMAC_MODE_RESET	0x00000001	tg3.h
32604	WDMAC_MODE_ENABLE	0x00000002	tg3.h
32605	WDMAC_MODE_TGTABORT_ENAB	0x00000004	tg3.h
32606	WDMAC_MODE_MSTABORT_ENAB	0x00000008	tg3.h
32607	WDMAC_MODE_PARITYERR_ENAB	0x00000010	tg3.h
32608	WDMAC_MODE_ADDROFLOW_ENAB	0x00000020	tg3.h
32609	WDMAC_MODE_FIFOOFLOW_ENAB	0x00000040	tg3.h
32610	WDMAC_MODE_FIFOURUN_ENAB	0x00000080	tg3.h
32611	WDMAC_MODE_FIFOOREAD_ENAB	0x00000100	tg3.h
32612	WDMAC_MODE_LNGREAD_ENAB	0x00000200	tg3.h
32613	WDMAC_MODE_RX_ACCEL	0x00000400	tg3.h
32614	WDMAC_STATUS	0x00004c04	tg3.h
32615	WDMAC_STATUS_TGTABORT	0x00000004	tg3.h
32616	WDMAC_STATUS_MSTABORT	0x00000008	tg3.h
32617	WDMAC_STATUS_PARITYERR	0x00000010	tg3.h
32618	WDMAC_STATUS_ADDROFLOW	0x00000020	tg3.h
32619	WDMAC_STATUS_FIFOOFLOW	0x00000040	tg3.h
32620	WDMAC_STATUS_FIFOURUN	0x00000080	tg3.h
32621	WDMAC_STATUS_FIFOOREAD	0x00000100	tg3.h
32622	WDMAC_STATUS_LNGREAD	0x00000200	tg3.h
32623	CPU_MODE	0x00000000	tg3.h
32624	CPU_MODE_RESET	0x00000001	tg3.h
32625	CPU_MODE_HALT	0x00000400	tg3.h
32626	CPU_STATE	0x00000004	tg3.h
32627	CPU_EVTMASK	0x00000008	tg3.h
32628	CPU_PC	0x0000001c	tg3.h
32629	CPU_INSN	0x00000020	tg3.h
32630	CPU_SPAD_UFLOW	0x00000024	tg3.h
32631	CPU_WDOG_CLEAR	0x00000028	tg3.h
32632	CPU_WDOG_VECTOR	0x0000002c	tg3.h
32633	CPU_WDOG_PC	0x00000030	tg3.h
32634	CPU_HW_BP	0x00000034	tg3.h
32635	CPU_WDOG_SAVED_STATE	0x00000044	tg3.h
32636	CPU_LAST_BRANCH_ADDR	0x00000048	tg3.h
32637	CPU_SPAD_UFLOW_SET	0x0000004c	tg3.h
32638	CPU_R0	0x00000200	tg3.h
32639	CPU_R1	0x00000204	tg3.h
32640	CPU_R2	0x00000208	tg3.h
32641	CPU_R3	0x0000020c	tg3.h
32642	CPU_R4	0x00000210	tg3.h
32643	CPU_R5	0x00000214	tg3.h
32644	CPU_R6	0x00000218	tg3.h
32645	CPU_R7	0x0000021c	tg3.h
32646	CPU_R8	0x00000220	tg3.h
32647	CPU_R9	0x00000224	tg3.h
32648	CPU_R10	0x00000228	tg3.h
32649	CPU_R11	0x0000022c	tg3.h
32650	CPU_R12	0x00000230	tg3.h
32651	CPU_R13	0x00000234	tg3.h
32652	CPU_R14	0x00000238	tg3.h
32653	CPU_R15	0x0000023c	tg3.h
32654	CPU_R16	0x00000240	tg3.h
32655	CPU_R17	0x00000244	tg3.h
32656	CPU_R18	0x00000248	tg3.h
32657	CPU_R19	0x0000024c	tg3.h
32658	CPU_R20	0x00000250	tg3.h
32659	CPU_R21	0x00000254	tg3.h
32660	CPU_R22	0x00000258	tg3.h
32661	CPU_R23	0x0000025c	tg3.h
32662	CPU_R24	0x00000260	tg3.h
32663	CPU_R25	0x00000264	tg3.h
32664	CPU_R26	0x00000268	tg3.h
32665	CPU_R27	0x0000026c	tg3.h
32666	CPU_R28	0x00000270	tg3.h
32667	CPU_R29	0x00000274	tg3.h
32668	CPU_R30	0x00000278	tg3.h
32669	CPU_R31	0x0000027c	tg3.h
32670	RX_CPU_BASE	0x00005000	tg3.h
32671	TX_CPU_BASE	0x00005400	tg3.h
32672	GRCMBOX_INTERRUPT_0	0x00005800	tg3.h	64-bit
32673	GRCMBOX_INTERRUPT_1	0x00005808	tg3.h	64-bit
32674	GRCMBOX_INTERRUPT_2	0x00005810	tg3.h	64-bit
32675	GRCMBOX_INTERRUPT_3	0x00005818	tg3.h	64-bit
32676	GRCMBOX_GENERAL_0	0x00005820	tg3.h	64-bit
32677	GRCMBOX_GENERAL_1	0x00005828	tg3.h	64-bit
32678	GRCMBOX_GENERAL_2	0x00005830	tg3.h	64-bit
32679	GRCMBOX_GENERAL_3	0x00005838	tg3.h	64-bit
32680	GRCMBOX_GENERAL_4	0x00005840	tg3.h	64-bit
32681	GRCMBOX_GENERAL_5	0x00005848	tg3.h	64-bit
32682	GRCMBOX_GENERAL_6	0x00005850	tg3.h	64-bit
32683	GRCMBOX_GENERAL_7	0x00005858	tg3.h	64-bit
32684	GRCMBOX_RELOAD_STAT	0x00005860	tg3.h	64-bit
32685	GRCMBOX_RCVSTD_PROD_IDX	0x00005868	tg3.h	64-bit
32686	GRCMBOX_RCVJUMBO_PROD_IDX	0x00005870	tg3.h	64-bit
32687	GRCMBOX_RCVMINI_PROD_IDX	0x00005878	tg3.h	64-bit
32688	GRCMBOX_RCVRET_CON_IDX_0	0x00005880	tg3.h	64-bit
32689	GRCMBOX_RCVRET_CON_IDX_1	0x00005888	tg3.h	64-bit
32690	GRCMBOX_RCVRET_CON_IDX_2	0x00005890	tg3.h	64-bit
32691	GRCMBOX_RCVRET_CON_IDX_3	0x00005898	tg3.h	64-bit
32692	GRCMBOX_RCVRET_CON_IDX_4	0x000058a0	tg3.h	64-bit
32693	GRCMBOX_RCVRET_CON_IDX_5	0x000058a8	tg3.h	64-bit
32694	GRCMBOX_RCVRET_CON_IDX_6	0x000058b0	tg3.h	64-bit
32695	GRCMBOX_RCVRET_CON_IDX_7	0x000058b8	tg3.h	64-bit
32696	GRCMBOX_RCVRET_CON_IDX_8	0x000058c0	tg3.h	64-bit
32697	GRCMBOX_RCVRET_CON_IDX_9	0x000058c8	tg3.h	64-bit
32698	GRCMBOX_RCVRET_CON_IDX_10	0x000058d0	tg3.h	64-bit
32699	GRCMBOX_RCVRET_CON_IDX_11	0x000058d8	tg3.h	64-bit
32700	GRCMBOX_RCVRET_CON_IDX_12	0x000058e0	tg3.h	64-bit
32701	GRCMBOX_RCVRET_CON_IDX_13	0x000058e8	tg3.h	64-bit
32702	GRCMBOX_RCVRET_CON_IDX_14	0x000058f0	tg3.h	64-bit
32703	GRCMBOX_RCVRET_CON_IDX_15	0x000058f8	tg3.h	64-bit
32704	GRCMBOX_SNDHOST_PROD_IDX_0	0x00005900	tg3.h	64-bit
32705	GRCMBOX_SNDHOST_PROD_IDX_1	0x00005908	tg3.h	64-bit
32706	GRCMBOX_SNDHOST_PROD_IDX_2	0x00005910	tg3.h	64-bit
32707	GRCMBOX_SNDHOST_PROD_IDX_3	0x00005918	tg3.h	64-bit
32708	GRCMBOX_SNDHOST_PROD_IDX_4	0x00005920	tg3.h	64-bit
32709	GRCMBOX_SNDHOST_PROD_IDX_5	0x00005928	tg3.h	64-bit
32710	GRCMBOX_SNDHOST_PROD_IDX_6	0x00005930	tg3.h	64-bit
32711	GRCMBOX_SNDHOST_PROD_IDX_7	0x00005938	tg3.h	64-bit
32712	GRCMBOX_SNDHOST_PROD_IDX_8	0x00005940	tg3.h	64-bit
32713	GRCMBOX_SNDHOST_PROD_IDX_9	0x00005948	tg3.h	64-bit
32714	GRCMBOX_SNDHOST_PROD_IDX_10	0x00005950	tg3.h	64-bit
32715	GRCMBOX_SNDHOST_PROD_IDX_11	0x00005958	tg3.h	64-bit
32716	GRCMBOX_SNDHOST_PROD_IDX_12	0x00005960	tg3.h	64-bit
32717	GRCMBOX_SNDHOST_PROD_IDX_13	0x00005968	tg3.h	64-bit
32718	GRCMBOX_SNDHOST_PROD_IDX_14	0x00005970	tg3.h	64-bit
32719	GRCMBOX_SNDHOST_PROD_IDX_15	0x00005978	tg3.h	64-bit
32720	GRCMBOX_SNDNIC_PROD_IDX_0	0x00005980	tg3.h	64-bit
32721	GRCMBOX_SNDNIC_PROD_IDX_1	0x00005988	tg3.h	64-bit
32722	GRCMBOX_SNDNIC_PROD_IDX_2	0x00005990	tg3.h	64-bit
32723	GRCMBOX_SNDNIC_PROD_IDX_3	0x00005998	tg3.h	64-bit
32724	GRCMBOX_SNDNIC_PROD_IDX_4	0x000059a0	tg3.h	64-bit
32725	GRCMBOX_SNDNIC_PROD_IDX_5	0x000059a8	tg3.h	64-bit
32726	GRCMBOX_SNDNIC_PROD_IDX_6	0x000059b0	tg3.h	64-bit
32727	GRCMBOX_SNDNIC_PROD_IDX_7	0x000059b8	tg3.h	64-bit
32728	GRCMBOX_SNDNIC_PROD_IDX_8	0x000059c0	tg3.h	64-bit
32729	GRCMBOX_SNDNIC_PROD_IDX_9	0x000059c8	tg3.h	64-bit
32730	GRCMBOX_SNDNIC_PROD_IDX_10	0x000059d0	tg3.h	64-bit
32731	GRCMBOX_SNDNIC_PROD_IDX_11	0x000059d8	tg3.h	64-bit
32732	GRCMBOX_SNDNIC_PROD_IDX_12	0x000059e0	tg3.h	64-bit
32733	GRCMBOX_SNDNIC_PROD_IDX_13	0x000059e8	tg3.h	64-bit
32734	GRCMBOX_SNDNIC_PROD_IDX_14	0x000059f0	tg3.h	64-bit
32735	GRCMBOX_SNDNIC_PROD_IDX_15	0x000059f8	tg3.h	64-bit
32736	GRCMBOX_HIGH_PRIO_EV_VECTOR	0x00005a00	tg3.h
32737	GRCMBOX_HIGH_PRIO_EV_MASK	0x00005a04	tg3.h
32738	GRCMBOX_LOW_PRIO_EV_VEC	0x00005a08	tg3.h
32739	GRCMBOX_LOW_PRIO_EV_MASK	0x00005a0c	tg3.h
32740	FTQ_RESET	0x00005c00	tg3.h
32741	FTQ_RESET_DMA_READ_QUEUE	(1 << 1)	tg3.h
32742	FTQ_RESET_DMA_HIGH_PRI_READ	(1 << 2)	tg3.h
32743	FTQ_RESET_SEND_BD_COMPLETION	(1 << 4)	tg3.h
32744	FTQ_RESET_DMA_WRITE	(1 << 6)	tg3.h
32745	FTQ_RESET_DMA_HIGH_PRI_WRITE	(1 << 7)	tg3.h
32746	FTQ_RESET_SEND_DATA_COMPLETION	(1 << 9)	tg3.h
32747	FTQ_RESET_HOST_COALESCING	(1 << 10)	tg3.h
32748	FTQ_RESET_MAC_TX	(1 << 11)	tg3.h
32749	FTQ_RESET_RX_BD_COMPLETE	(1 << 13)	tg3.h
32750	FTQ_RESET_RX_LIST_PLCMT	(1 << 14)	tg3.h
32751	FTQ_RESET_RX_DATA_COMPLETION	(1 << 16)	tg3.h
32752	FTQ_DMA_NORM_READ_CTL	0x00005c10	tg3.h
32753	FTQ_DMA_NORM_READ_FULL_CNT	0x00005c14	tg3.h
32754	FTQ_DMA_NORM_READ_FIFO_ENQDEQ	0x00005c18	tg3.h
32755	FTQ_DMA_NORM_READ_WRITE_PEEK	0x00005c1c	tg3.h
32756	FTQ_DMA_HIGH_READ_CTL	0x00005c20	tg3.h
32757	FTQ_DMA_HIGH_READ_FULL_CNT	0x00005c24	tg3.h
32758	FTQ_DMA_HIGH_READ_FIFO_ENQDEQ	0x00005c28	tg3.h
32759	FTQ_DMA_HIGH_READ_WRITE_PEEK	0x00005c2c	tg3.h
32760	FTQ_DMA_COMP_DISC_CTL	0x00005c30	tg3.h
32761	FTQ_DMA_COMP_DISC_FULL_CNT	0x00005c34	tg3.h
32762	FTQ_DMA_COMP_DISC_FIFO_ENQDEQ	0x00005c38	tg3.h
32763	FTQ_DMA_COMP_DISC_WRITE_PEEK	0x00005c3c	tg3.h
32764	FTQ_SEND_BD_COMP_CTL	0x00005c40	tg3.h
32765	FTQ_SEND_BD_COMP_FULL_CNT	0x00005c44	tg3.h
32766	FTQ_SEND_BD_COMP_FIFO_ENQDEQ	0x00005c48	tg3.h
32767	FTQ_SEND_BD_COMP_WRITE_PEEK	0x00005c4c	tg3.h
32768	FTQ_SEND_DATA_INIT_CTL	0x00005c50	tg3.h
32769	FTQ_SEND_DATA_INIT_FULL_CNT	0x00005c54	tg3.h
32770	FTQ_SEND_DATA_INIT_FIFO_ENQDEQ	0x00005c58	tg3.h
32771	FTQ_SEND_DATA_INIT_WRITE_PEEK	0x00005c5c	tg3.h
32772	FTQ_DMA_NORM_WRITE_CTL	0x00005c60	tg3.h
32773	FTQ_DMA_NORM_WRITE_FULL_CNT	0x00005c64	tg3.h
32774	FTQ_DMA_NORM_WRITE_FIFO_ENQDEQ	0x00005c68	tg3.h
32775	FTQ_DMA_NORM_WRITE_WRITE_PEEK	0x00005c6c	tg3.h
32776	FTQ_DMA_HIGH_WRITE_CTL	0x00005c70	tg3.h
32777	FTQ_DMA_HIGH_WRITE_FULL_CNT	0x00005c74	tg3.h
32778	FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ	0x00005c78	tg3.h
32779	FTQ_DMA_HIGH_WRITE_WRITE_PEEK	0x00005c7c	tg3.h
32780	FTQ_SWTYPE1_CTL	0x00005c80	tg3.h
32781	FTQ_SWTYPE1_FULL_CNT	0x00005c84	tg3.h
32782	FTQ_SWTYPE1_FIFO_ENQDEQ	0x00005c88	tg3.h
32783	FTQ_SWTYPE1_WRITE_PEEK	0x00005c8c	tg3.h
32784	FTQ_SEND_DATA_COMP_CTL	0x00005c90	tg3.h
32785	FTQ_SEND_DATA_COMP_FULL_CNT	0x00005c94	tg3.h
32786	FTQ_SEND_DATA_COMP_FIFO_ENQDEQ	0x00005c98	tg3.h
32787	FTQ_SEND_DATA_COMP_WRITE_PEEK	0x00005c9c	tg3.h
32788	FTQ_HOST_COAL_CTL	0x00005ca0	tg3.h
32789	FTQ_HOST_COAL_FULL_CNT	0x00005ca4	tg3.h
32790	FTQ_HOST_COAL_FIFO_ENQDEQ	0x00005ca8	tg3.h
32791	FTQ_HOST_COAL_WRITE_PEEK	0x00005cac	tg3.h
32792	FTQ_MAC_TX_CTL	0x00005cb0	tg3.h
32793	FTQ_MAC_TX_FULL_CNT	0x00005cb4	tg3.h
32794	FTQ_MAC_TX_FIFO_ENQDEQ	0x00005cb8	tg3.h
32795	FTQ_MAC_TX_WRITE_PEEK	0x00005cbc	tg3.h
32796	FTQ_MB_FREE_CTL	0x00005cc0	tg3.h
32797	FTQ_MB_FREE_FULL_CNT	0x00005cc4	tg3.h
32798	FTQ_MB_FREE_FIFO_ENQDEQ	0x00005cc8	tg3.h
32799	FTQ_MB_FREE_WRITE_PEEK	0x00005ccc	tg3.h
32800	FTQ_RCVBD_COMP_CTL	0x00005cd0	tg3.h
32801	FTQ_RCVBD_COMP_FULL_CNT	0x00005cd4	tg3.h
32802	FTQ_RCVBD_COMP_FIFO_ENQDEQ	0x00005cd8	tg3.h
32803	FTQ_RCVBD_COMP_WRITE_PEEK	0x00005cdc	tg3.h
32804	FTQ_RCVLST_PLMT_CTL	0x00005ce0	tg3.h
32805	FTQ_RCVLST_PLMT_FULL_CNT	0x00005ce4	tg3.h
32806	FTQ_RCVLST_PLMT_FIFO_ENQDEQ	0x00005ce8	tg3.h
32807	FTQ_RCVLST_PLMT_WRITE_PEEK	0x00005cec	tg3.h
32808	FTQ_RCVDATA_INI_CTL	0x00005cf0	tg3.h
32809	FTQ_RCVDATA_INI_FULL_CNT	0x00005cf4	tg3.h
32810	FTQ_RCVDATA_INI_FIFO_ENQDEQ	0x00005cf8	tg3.h
32811	FTQ_RCVDATA_INI_WRITE_PEEK	0x00005cfc	tg3.h
32812	FTQ_RCVDATA_COMP_CTL	0x00005d00	tg3.h
32813	FTQ_RCVDATA_COMP_FULL_CNT	0x00005d04	tg3.h
32814	FTQ_RCVDATA_COMP_FIFO_ENQDEQ	0x00005d08	tg3.h
32815	FTQ_RCVDATA_COMP_WRITE_PEEK	0x00005d0c	tg3.h
32816	FTQ_SWTYPE2_CTL	0x00005d10	tg3.h
32817	FTQ_SWTYPE2_FULL_CNT	0x00005d14	tg3.h
32818	FTQ_SWTYPE2_FIFO_ENQDEQ	0x00005d18	tg3.h
32819	FTQ_SWTYPE2_WRITE_PEEK	0x00005d1c	tg3.h
32820	MSGINT_MODE	0x00006000	tg3.h
32821	MSGINT_MODE_RESET	0x00000001	tg3.h
32822	MSGINT_MODE_ENABLE	0x00000002	tg3.h
32823	MSGINT_STATUS	0x00006004	tg3.h
32824	MSGINT_FIFO	0x00006008	tg3.h
32825	DMAC_MODE	0x00006400	tg3.h
32826	DMAC_MODE_RESET	0x00000001	tg3.h
32827	DMAC_MODE_ENABLE	0x00000002	tg3.h
32828	GRC_MODE	0x00006800	tg3.h
32829	GRC_MODE_UPD_ON_COAL	0x00000001	tg3.h
32830	GRC_MODE_BSWAP_NONFRM_DATA	0x00000002	tg3.h
32831	GRC_MODE_WSWAP_NONFRM_DATA	0x00000004	tg3.h
32832	GRC_MODE_BSWAP_DATA	0x00000010	tg3.h
32833	GRC_MODE_WSWAP_DATA	0x00000020	tg3.h
32834	GRC_MODE_SPLITHDR	0x00000100	tg3.h
32835	GRC_MODE_NOFRM_CRACKING	0x00000200	tg3.h
32836	GRC_MODE_INCL_CRC	0x00000400	tg3.h
32837	GRC_MODE_ALLOW_BAD_FRMS	0x00000800	tg3.h
32838	GRC_MODE_NOIRQ_ON_SENDS	0x00002000	tg3.h
32839	GRC_MODE_NOIRQ_ON_RCV	0x00004000	tg3.h
32840	GRC_MODE_FORCE_PCI32BIT	0x00008000	tg3.h
32841	GRC_MODE_HOST_STACKUP	0x00010000	tg3.h
32842	GRC_MODE_HOST_SENDBDS	0x00020000	tg3.h
32843	GRC_MODE_NO_TX_PHDR_CSUM	0x00100000	tg3.h
32844	GRC_MODE_NO_RX_PHDR_CSUM	0x00800000	tg3.h
32845	GRC_MODE_IRQ_ON_TX_CPU_ATTN	0x01000000	tg3.h
32846	GRC_MODE_IRQ_ON_RX_CPU_ATTN	0x02000000	tg3.h
32847	GRC_MODE_IRQ_ON_MAC_ATTN	0x04000000	tg3.h
32848	GRC_MODE_IRQ_ON_DMA_ATTN	0x08000000	tg3.h
32849	GRC_MODE_IRQ_ON_FLOW_ATTN	0x10000000	tg3.h
32850	GRC_MODE_4X_NIC_SEND_RINGS	0x20000000	tg3.h
32851	GRC_MODE_MCAST_FRM_ENABLE	0x40000000	tg3.h
32852	GRC_MISC_CFG	0x00006804	tg3.h
32853	GRC_MISC_CFG_CORECLK_RESET	0x00000001	tg3.h
32854	GRC_MISC_CFG_PRESCALAR_MASK	0x000000fe	tg3.h
32855	GRC_MISC_CFG_PRESCALAR_SHIFT	1	tg3.h
32856	GRC_MISC_CFG_BOARD_ID_MASK	0x0001e000	tg3.h
32857	GRC_MISC_CFG_BOARD_ID_5700	0x0001e000	tg3.h
32858	GRC_MISC_CFG_BOARD_ID_5701	0x00000000	tg3.h
32859	GRC_MISC_CFG_BOARD_ID_5702FE	0x00004000	tg3.h
32860	GRC_MISC_CFG_BOARD_ID_5703	0x00000000	tg3.h
32861	GRC_MISC_CFG_BOARD_ID_5703S	0x00002000	tg3.h
32862	GRC_MISC_CFG_BOARD_ID_5704	0x00000000	tg3.h
32863	GRC_MISC_CFG_BOARD_ID_5704CIOBE	0x00004000	tg3.h
32864	GRC_MISC_CFG_BOARD_ID_5704_A2	0x00008000	tg3.h
32865	GRC_MISC_CFG_BOARD_ID_5788	0x00010000	tg3.h
32866	GRC_MISC_CFG_BOARD_ID_5788M	0x00018000	tg3.h
32867	GRC_MISC_CFG_BOARD_ID_AC91002A1	0x00018000	tg3.h
32868	GRC_MISC_CFG_KEEP_GPHY_POWER	0x04000000	tg3.h
32869	GRC_LOCAL_CTRL	0x00006808	tg3.h
32870	GRC_LCLCTRL_INT_ACTIVE	0x00000001	tg3.h
32871	GRC_LCLCTRL_CLEARINT	0x00000002	tg3.h
32872	GRC_LCLCTRL_SETINT	0x00000004	tg3.h
32873	GRC_LCLCTRL_INT_ON_ATTN	0x00000008	tg3.h
32874	GRC_LCLCTRL_GPIO_INPUT0	0x00000100	tg3.h
32875	GRC_LCLCTRL_GPIO_INPUT1	0x00000200	tg3.h
32876	GRC_LCLCTRL_GPIO_INPUT2	0x00000400	tg3.h
32877	GRC_LCLCTRL_GPIO_OE0	0x00000800	tg3.h
32878	GRC_LCLCTRL_GPIO_OE1	0x00001000	tg3.h
32879	GRC_LCLCTRL_GPIO_OE2	0x00002000	tg3.h
32880	GRC_LCLCTRL_GPIO_OUTPUT0	0x00004000	tg3.h
32881	GRC_LCLCTRL_GPIO_OUTPUT1	0x00008000	tg3.h
32882	GRC_LCLCTRL_GPIO_OUTPUT2	0x00010000	tg3.h
32883	GRC_LCLCTRL_EXTMEM_ENABLE	0x00020000	tg3.h
32884	GRC_LCLCTRL_MEMSZ_MASK	0x001c0000	tg3.h
32885	GRC_LCLCTRL_MEMSZ_256K	0x00000000	tg3.h
32886	GRC_LCLCTRL_MEMSZ_512K	0x00040000	tg3.h
32887	GRC_LCLCTRL_MEMSZ_1M	0x00080000	tg3.h
32888	GRC_LCLCTRL_MEMSZ_2M	0x000c0000	tg3.h
32889	GRC_LCLCTRL_MEMSZ_4M	0x00100000	tg3.h
32890	GRC_LCLCTRL_MEMSZ_8M	0x00140000	tg3.h
32891	GRC_LCLCTRL_MEMSZ_16M	0x00180000	tg3.h
32892	GRC_LCLCTRL_BANK_SELECT	0x00200000	tg3.h
32893	GRC_LCLCTRL_SSRAM_TYPE	0x00400000	tg3.h
32894	GRC_LCLCTRL_AUTO_SEEPROM	0x01000000	tg3.h
32895	GRC_TIMER	0x0000680c	tg3.h
32896	GRC_RX_CPU_EVENT	0x00006810	tg3.h
32897	GRC_RX_TIMER_REF	0x00006814	tg3.h
32898	GRC_RX_CPU_SEM	0x00006818	tg3.h
32899	GRC_REMOTE_RX_CPU_ATTN	0x0000681c	tg3.h
32900	GRC_TX_CPU_EVENT	0x00006820	tg3.h
32901	GRC_TX_TIMER_REF	0x00006824	tg3.h
32902	GRC_TX_CPU_SEM	0x00006828	tg3.h
32903	GRC_REMOTE_TX_CPU_ATTN	0x0000682c	tg3.h
32904	GRC_MEM_POWER_UP	0x00006830	tg3.h	64-bit
32905	GRC_EEPROM_ADDR	0x00006838	tg3.h
32906	EEPROM_ADDR_WRITE	0x00000000	tg3.h
32907	EEPROM_ADDR_READ	0x80000000	tg3.h
32908	EEPROM_ADDR_COMPLETE	0x40000000	tg3.h
32909	EEPROM_ADDR_FSM_RESET	0x20000000	tg3.h
32910	EEPROM_ADDR_DEVID_MASK	0x1c000000	tg3.h
32911	EEPROM_ADDR_DEVID_SHIFT	26	tg3.h
32912	EEPROM_ADDR_START	0x02000000	tg3.h
32913	EEPROM_ADDR_CLKPERD_SHIFT	16	tg3.h
32914	EEPROM_ADDR_ADDR_MASK	0x0000ffff	tg3.h
32915	EEPROM_ADDR_ADDR_SHIFT	0	tg3.h
32916	EEPROM_DEFAULT_CLOCK_PERIOD	0x60	tg3.h
32917	EEPROM_CHIP_SIZE	(64 * 1024)	tg3.h
32918	GRC_EEPROM_DATA	0x0000683c	tg3.h
32919	GRC_EEPROM_CTRL	0x00006840	tg3.h
32920	GRC_MDI_CTRL	0x00006844	tg3.h
32921	GRC_SEEPROM_DELAY	0x00006848	tg3.h
32922	NVRAM_CMD	0x00007000	tg3.h
32923	NVRAM_CMD_RESET	0x00000001	tg3.h
32924	NVRAM_CMD_DONE	0x00000008	tg3.h
32925	NVRAM_CMD_GO	0x00000010	tg3.h
32926	NVRAM_CMD_WR	0x00000020	tg3.h
32927	NVRAM_CMD_RD	0x00000000	tg3.h
32928	NVRAM_CMD_ERASE	0x00000040	tg3.h
32929	NVRAM_CMD_FIRST	0x00000080	tg3.h
32930	NVRAM_CMD_LAST	0x00000100	tg3.h
32931	NVRAM_STAT	0x00007004	tg3.h
32932	NVRAM_WRDATA	0x00007008	tg3.h
32933	NVRAM_ADDR	0x0000700c	tg3.h
32934	NVRAM_ADDR_MSK	0x00ffffff	tg3.h
32935	NVRAM_RDDATA	0x00007010	tg3.h
32936	NVRAM_CFG1	0x00007014	tg3.h
32937	NVRAM_CFG1_FLASHIF_ENAB	0x00000001	tg3.h
32938	NVRAM_CFG1_BUFFERED_MODE	0x00000002	tg3.h
32939	NVRAM_CFG1_PASS_THRU	0x00000004	tg3.h
32940	NVRAM_CFG1_BIT_BANG	0x00000008	tg3.h
32941	NVRAM_CFG1_COMPAT_BYPASS	0x80000000	tg3.h
32942	NVRAM_CFG2	0x00007018	tg3.h
32943	NVRAM_CFG3	0x0000701c	tg3.h
32944	NVRAM_SWARB	0x00007020	tg3.h
32945	SWARB_REQ_SET0	0x00000001	tg3.h
32946	SWARB_REQ_SET1	0x00000002	tg3.h
32947	SWARB_REQ_SET2	0x00000004	tg3.h
32948	SWARB_REQ_SET3	0x00000008	tg3.h
32949	SWARB_REQ_CLR0	0x00000010	tg3.h
32950	SWARB_REQ_CLR1	0x00000020	tg3.h
32951	SWARB_REQ_CLR2	0x00000040	tg3.h
32952	SWARB_REQ_CLR3	0x00000080	tg3.h
32953	SWARB_GNT0	0x00000100	tg3.h
32954	SWARB_GNT1	0x00000200	tg3.h
32955	SWARB_GNT2	0x00000400	tg3.h
32956	SWARB_GNT3	0x00000800	tg3.h
32957	SWARB_REQ0	0x00001000	tg3.h
32958	SWARB_REQ1	0x00002000	tg3.h
32959	SWARB_REQ2	0x00004000	tg3.h
32960	SWARB_REQ3	0x00008000	tg3.h
32961	NVRAM_BUFFERED_PAGE_SIZE	264	tg3.h
32962	NVRAM_BUFFERED_PAGE_POS	9	tg3.h
32963	NIC_SRAM_WIN_BASE	0x00008000	tg3.h
32964	NIC_SRAM_PAGE_ZERO	0x00000000	tg3.h
32965	NIC_SRAM_SEND_RCB	0x00000100	tg3.h	16 * TG3_BDINFO_...
32966	NIC_SRAM_RCV_RET_RCB	0x00000200	tg3.h	16 * TG3_BDINFO_...
32967	NIC_SRAM_STATS_BLK	0x00000300	tg3.h
32968	NIC_SRAM_STATUS_BLK	0x00000b00	tg3.h
32969	NIC_SRAM_FIRMWARE_MBOX	0x00000b50	tg3.h
32970	NIC_SRAM_FIRMWARE_MBOX_MAGIC1	0x4B657654	tg3.h
32971	NIC_SRAM_FIRMWARE_MBOX_MAGIC2	0x4861764b	tg3.h	!dma on linkchg
32972	NIC_SRAM_DATA_SIG	0x00000b54	tg3.h
32973	NIC_SRAM_DATA_SIG_MAGIC	0x4b657654	tg3.h	ascii for 'KevT'
32974	NIC_SRAM_DATA_CFG	0x00000b58	tg3.h
32975	NIC_SRAM_DATA_CFG_LED_MODE_MASK	0x0000000c	tg3.h
32976	NIC_SRAM_DATA_CFG_LED_MODE_UNKN	0x00000000	tg3.h
32977	NIC_SRAM_DATA_CFG_LED_TRIPLE_SP	0x00000004	tg3.h
32978	NIC_SRAM_DATA_CFG_LED_OPEN_DRAI	0x00000004	tg3.h
32979	NIC_SRAM_DATA_CFG_LED_LINK_SPD	0x00000008	tg3.h
32980	NIC_SRAM_DATA_CFG_LED_OUTPUT	0x00000008	tg3.h
32981	NIC_SRAM_DATA_CFG_PHY_TYPE_MASK	0x00000030	tg3.h
32982	NIC_SRAM_DATA_CFG_PHY_TYPE_UNKN	0x00000000	tg3.h
32983	NIC_SRAM_DATA_CFG_PHY_TYPE_COPP	0x00000010	tg3.h
32984	NIC_SRAM_DATA_CFG_PHY_TYPE_FIBE	0x00000020	tg3.h
32985	NIC_SRAM_DATA_CFG_WOL_ENABLE	0x00000040	tg3.h
32986	NIC_SRAM_DATA_CFG_ASF_ENABLE	0x00000080	tg3.h
32987	NIC_SRAM_DATA_CFG_EEPROM_WP	0x00000100	tg3.h
32988	NIC_SRAM_DATA_CFG_MINI_PCI	0x00001000	tg3.h
32989	NIC_SRAM_DATA_CFG_FIBER_WOL	0x00004000	tg3.h
32990	NIC_SRAM_DATA_PHY_ID	0x00000b74	tg3.h
32991	NIC_SRAM_DATA_PHY_ID1_MASK	0xffff0000	tg3.h
32992	NIC_SRAM_DATA_PHY_ID2_MASK	0x0000ffff	tg3.h
32993	NIC_SRAM_FW_CMD_MBOX	0x00000b78	tg3.h
32994	FWCMD_NICDRV_ALIVE	0x00000001	tg3.h
32995	FWCMD_NICDRV_PAUSE_FW	0x00000002	tg3.h
32996	FWCMD_NICDRV_IPV4ADDR_CHG	0x00000003	tg3.h
32997	FWCMD_NICDRV_IPV6ADDR_CHG	0x00000004	tg3.h
32998	FWCMD_NICDRV_FIX_DMAR	0x00000005	tg3.h
32999	FWCMD_NICDRV_FIX_DMAW	0x00000006	tg3.h
33000	NIC_SRAM_FW_CMD_LEN_MBOX	0x00000b7c	tg3.h
33001	NIC_SRAM_FW_CMD_DATA_MBOX	0x00000b80	tg3.h
33002	NIC_SRAM_FW_ASF_STATUS_MBOX	0x00000c00	tg3.h
33003	NIC_SRAM_FW_DRV_STATE_MBOX	0x00000c04	tg3.h
33004	DRV_STATE_START	0x00000001	tg3.h
33005	DRV_STATE_UNLOAD	0x00000002	tg3.h
33006	DRV_STATE_WOL	0x00000003	tg3.h
33007	DRV_STATE_SUSPEND	0x00000004	tg3.h
33008	NIC_SRAM_FW_RESET_TYPE_MBOX	0x00000c08	tg3.h
33009	NIC_SRAM_MAC_ADDR_HIGH_MBOX	0x00000c14	tg3.h
33010	NIC_SRAM_MAC_ADDR_LOW_MBOX	0x00000c18	tg3.h
33011	NIC_SRAM_RX_MINI_BUFFER_DESC	0x00001000	tg3.h
33012	NIC_SRAM_DMA_DESC_POOL_BASE	0x00002000	tg3.h
33013	NIC_SRAM_DMA_DESC_POOL_SIZE	0x00002000	tg3.h
33014	NIC_SRAM_TX_BUFFER_DESC	0x00004000	tg3.h	512 entries
33015	NIC_SRAM_RX_BUFFER_DESC	0x00006000	tg3.h	256 entries
33016	NIC_SRAM_RX_JUMBO_BUFFER_DESC	0x00007000	tg3.h	256 entries
33017	NIC_SRAM_MBUF_POOL_BASE	0x00008000	tg3.h
33018	NIC_SRAM_MBUF_POOL_SIZE96	0x00018000	tg3.h
33019	NIC_SRAM_MBUF_POOL_SIZE64	0x00010000	tg3.h
33020	NIC_SRAM_MBUF_POOL_BASE5705	0x00010000	tg3.h
33021	NIC_SRAM_MBUF_POOL_SIZE5705	0x0000e000	tg3.h
33022	PHY_ADDR	0x01	tg3.h
33023	TG3_BMCR_SPEED1000	0x0040	tg3.h
33024	MII_TG3_CTRL	0x09	tg3.h	1000-baseT control register
33025	MII_TG3_CTRL_ADV_1000_HALF	0x0100	tg3.h
33026	MII_TG3_CTRL_ADV_1000_FULL	0x0200	tg3.h
33027	MII_TG3_CTRL_AS_MASTER	0x0800	tg3.h
33028	MII_TG3_CTRL_ENABLE_AS_MASTER	0x1000	tg3.h
33029	MII_TG3_EXT_CTRL	0x10	tg3.h	Extended control register
33030	MII_TG3_EXT_CTRL_LNK3_LED_MODE	0x0002	tg3.h
33031	MII_TG3_EXT_CTRL_TBI	0x8000	tg3.h
33032	MII_TG3_EXT_STAT	0x11	tg3.h	Extended status register
33033	MII_TG3_EXT_STAT_LPASS	0x0100	tg3.h
33034	MII_TG3_DSP_RW_PORT	0x15	tg3.h	DSP coefficient read/write port
33035	MII_TG3_DSP_ADDRESS	0x17	tg3.h	DSP address register
33036	MII_TG3_AUX_CTRL	0x18	tg3.h	auxilliary control register
33037	MII_TG3_AUX_STAT	0x19	tg3.h	auxilliary status register
33038	MII_TG3_AUX_STAT_LPASS	0x0004	tg3.h
33039	MII_TG3_AUX_STAT_SPDMASK	0x0700	tg3.h
33040	MII_TG3_AUX_STAT_10HALF	0x0100	tg3.h
33041	MII_TG3_AUX_STAT_10FULL	0x0200	tg3.h
33042	MII_TG3_AUX_STAT_100HALF	0x0300	tg3.h
33043	MII_TG3_AUX_STAT_100_4	0x0400	tg3.h
33044	MII_TG3_AUX_STAT_100FULL	0x0500	tg3.h
33045	MII_TG3_AUX_STAT_1000HALF	0x0600	tg3.h
33046	MII_TG3_AUX_STAT_1000FULL	0x0700	tg3.h
33047	MII_TG3_ISTAT	0x1a	tg3.h	IRQ status register
33048	MII_TG3_IMASK	0x1b	tg3.h	IRQ mask register
33049	MII_TG3_INT_LINKCHG	0x0002	tg3.h
33050	MII_TG3_INT_SPEEDCHG	0x0004	tg3.h
33051	MII_TG3_INT_DUPLEXCHG	0x0008	tg3.h
33052	MII_TG3_INT_ANEG_PAGE_RX	0x0400	tg3.h
33053	TXD_ADDR	0x00UL	tg3.h	64-bit
33054	TXD_LEN_FLAGS	0x08UL	tg3.h	32-bit (upper 16-bits are len)
33055	TXD_VLAN_TAG	0x0cUL	tg3.h	32-bit (upper 16-bits are tag)
33056	TXD_SIZE	0x10UL	tg3.h
33057	TG3_HW_STATUS_SIZE	0x50	tg3.h
33058	FALSE	0	tlan.h
33059	TRUE	1	tlan.h
33060	TLAN_MIN_FRAME_SIZE	64	tlan.h
33061	TLAN_MAX_FRAME_SIZE	1600	tlan.h
33062	TLAN_NUM_RX_LISTS	4	tlan.h
33063	TLAN_NUM_TX_LISTS	2	tlan.h
33064	TLAN_IGNORE	0	tlan.h
33065	TLAN_RECORD	1	tlan.h
33066	TLAN_DEBUG_GNRL	0x0001	tlan.h
33067	TLAN_DEBUG_TX	0x0002	tlan.h
33068	TLAN_DEBUG_RX	0x0004	tlan.h
33069	TLAN_DEBUG_LIST	0x0008	tlan.h
33070	TLAN_DEBUG_PROBE	0x0010	tlan.h
33071	TX_TIMEOUT	(10*HZ)	tlan.h	We need time for auto-neg
33072	MAX_TLAN_BOARDS	8	tlan.h	Max number of boards installed at a time
33073	PCI_DEVICE_ID_NETELLIGENT_10_T2	0xB012	tlan.h
33074	PCI_DEVICE_ID_NETELLIGENT_10_10	0xB030	tlan.h
33075	PCI_DEVICE_ID_OLICOM_OC2183	0x0013	tlan.h
33076	PCI_DEVICE_ID_OLICOM_OC2325	0x0012	tlan.h
33077	PCI_DEVICE_ID_OLICOM_OC2326	0x0014	tlan.h
33078	TLAN_ADAPTER_NONE	0x00000000	tlan.h
33079	TLAN_ADAPTER_UNMANAGED_PHY	0x00000001	tlan.h
33080	TLAN_ADAPTER_BIT_RATE_PHY	0x00000002	tlan.h
33081	TLAN_ADAPTER_USE_INTERN_10	0x00000004	tlan.h
33082	TLAN_ADAPTER_ACTIVITY_LED	0x00000008	tlan.h
33083	TLAN_SPEED_DEFAULT	0	tlan.h
33084	TLAN_SPEED_10	10	tlan.h
33085	TLAN_SPEED_100	100	tlan.h
33086	TLAN_DUPLEX_DEFAULT	0	tlan.h
33087	TLAN_DUPLEX_HALF	1	tlan.h
33088	TLAN_DUPLEX_FULL	2	tlan.h
33089	EISA_ID	0xc80	tlan.h	EISA ID Registers
33090	EISA_ID0	0xc80	tlan.h	EISA ID Register 0
33091	EISA_ID1	0xc81	tlan.h	EISA ID Register 1
33092	EISA_ID2	0xc82	tlan.h	EISA ID Register 2
33093	EISA_ID3	0xc83	tlan.h	EISA ID Register 3
33094	EISA_CR	0xc84	tlan.h	EISA Control Register
33095	EISA_REG0	0xc88	tlan.h	EISA Configuration Register 0
33096	EISA_REG1	0xc89	tlan.h	EISA Configuration Register 1
33097	EISA_REG2	0xc8a	tlan.h	EISA Configuration Register 2
33098	EISA_REG3	0xc8f	tlan.h	EISA Configuration Register 3
33099	EISA_APROM	0xc90	tlan.h	Ethernet Address PROM
33100	TLAN_BUFFERS_PER_LIST	10	tlan.h
33101	TLAN_LAST_BUFFER	0x80000000	tlan.h
33102	TLAN_CSTAT_UNUSED	0x8000	tlan.h
33103	TLAN_CSTAT_FRM_CMP	0x4000	tlan.h
33104	TLAN_CSTAT_READY	0x3000	tlan.h
33105	TLAN_CSTAT_EOC	0x0800	tlan.h
33106	TLAN_CSTAT_RX_ERROR	0x0400	tlan.h
33107	TLAN_CSTAT_PASS_CRC	0x0200	tlan.h
33108	TLAN_CSTAT_DP_PR	0x0100	tlan.h
33109	TLAN_PHY_MAX_ADDR	0x1F	tlan.h
33110	TLAN_PHY_NONE	0x20	tlan.h
33111	TLAN_TIMER_LINK_BEAT	1	tlan.h
33112	TLAN_TIMER_ACTIVITY	2	tlan.h
33113	TLAN_TIMER_PHY_PDOWN	3	tlan.h
33114	TLAN_TIMER_PHY_PUP	4	tlan.h
33115	TLAN_TIMER_PHY_RESET	5	tlan.h
33116	TLAN_TIMER_PHY_START_LINK	6	tlan.h
33117	TLAN_TIMER_PHY_FINISH_AN	7	tlan.h
33118	TLAN_TIMER_FINISH_RESET	8	tlan.h
33119	TLAN_TIMER_ACT_DELAY	(HZ/10)	tlan.h
33120	TLAN_EEPROM_ACK	0	tlan.h
33121	TLAN_EEPROM_STOP	1	tlan.h
33122	TLAN_HOST_CMD	0x00	tlan.h
33123	TLAN_HC_GO	0x80000000	tlan.h
33124	TLAN_HC_STOP	0x40000000	tlan.h
33125	TLAN_HC_ACK	0x20000000	tlan.h
33126	TLAN_HC_CS_MASK	0x1FE00000	tlan.h
33127	TLAN_HC_EOC	0x00100000	tlan.h
33128	TLAN_HC_RT	0x00080000	tlan.h
33129	TLAN_HC_NES	0x00040000	tlan.h
33130	TLAN_HC_AD_RST	0x00008000	tlan.h
33131	TLAN_HC_LD_TMR	0x00004000	tlan.h
33132	TLAN_HC_LD_THR	0x00002000	tlan.h
33133	TLAN_HC_REQ_INT	0x00001000	tlan.h
33134	TLAN_HC_INT_OFF	0x00000800	tlan.h
33135	TLAN_HC_INT_ON	0x00000400	tlan.h
33136	TLAN_HC_AC_MASK	0x000000FF	tlan.h
33137	TLAN_CH_PARM	0x04	tlan.h
33138	TLAN_DIO_ADR	0x08	tlan.h
33139	TLAN_DA_ADR_INC	0x8000	tlan.h
33140	TLAN_DA_RAM_ADR	0x4000	tlan.h
33141	TLAN_HOST_INT	0x0A	tlan.h
33142	TLAN_HI_IV_MASK	0x1FE0	tlan.h
33143	TLAN_HI_IT_MASK	0x001C	tlan.h
33144	TLAN_DIO_DATA	0x0C	tlan.h
33145	TLAN_NET_CMD	0x00	tlan.h
33146	TLAN_NET_CMD_NRESET	0x80	tlan.h
33147	TLAN_NET_CMD_NWRAP	0x40	tlan.h
33148	TLAN_NET_CMD_CSF	0x20	tlan.h
33149	TLAN_NET_CMD_CAF	0x10	tlan.h
33150	TLAN_NET_CMD_NOBRX	0x08	tlan.h
33151	TLAN_NET_CMD_DUPLEX	0x04	tlan.h
33152	TLAN_NET_CMD_TRFRAM	0x02	tlan.h
33153	TLAN_NET_CMD_TXPACE	0x01	tlan.h
33154	TLAN_NET_SIO	0x01	tlan.h
33155	TLAN_NET_SIO_MINTEN	0x80	tlan.h
33156	TLAN_NET_SIO_ECLOK	0x40	tlan.h
33157	TLAN_NET_SIO_ETXEN	0x20	tlan.h
33158	TLAN_NET_SIO_EDATA	0x10	tlan.h
33159	TLAN_NET_SIO_NMRST	0x08	tlan.h
33160	TLAN_NET_SIO_MCLK	0x04	tlan.h
33161	TLAN_NET_SIO_MTXEN	0x02	tlan.h
33162	TLAN_NET_SIO_MDATA	0x01	tlan.h
33163	TLAN_NET_STS	0x02	tlan.h
33164	TLAN_NET_STS_MIRQ	0x80	tlan.h
33165	TLAN_NET_STS_HBEAT	0x40	tlan.h
33166	TLAN_NET_STS_TXSTOP	0x20	tlan.h
33167	TLAN_NET_STS_RXSTOP	0x10	tlan.h
33168	TLAN_NET_STS_RSRVD	0x0F	tlan.h
33169	TLAN_NET_MASK	0x03	tlan.h
33170	TLAN_NET_MASK_MASK7	0x80	tlan.h
33171	TLAN_NET_MASK_MASK6	0x40	tlan.h
33172	TLAN_NET_MASK_MASK5	0x20	tlan.h
33173	TLAN_NET_MASK_MASK4	0x10	tlan.h
33174	TLAN_NET_MASK_RSRVD	0x0F	tlan.h
33175	TLAN_NET_CONFIG	0x04	tlan.h
33176	TLAN_NET_CFG_RCLK	0x8000	tlan.h
33177	TLAN_NET_CFG_TCLK	0x4000	tlan.h
33178	TLAN_NET_CFG_BIT	0x2000	tlan.h
33179	TLAN_NET_CFG_RXCRC	0x1000	tlan.h
33180	TLAN_NET_CFG_PEF	0x0800	tlan.h
33181	TLAN_NET_CFG_1FRAG	0x0400	tlan.h
33182	TLAN_NET_CFG_1CHAN	0x0200	tlan.h
33183	TLAN_NET_CFG_MTEST	0x0100	tlan.h
33184	TLAN_NET_CFG_PHY_EN	0x0080	tlan.h
33185	TLAN_NET_CFG_MSMASK	0x007F	tlan.h
33186	TLAN_MAN_TEST	0x06	tlan.h
33187	TLAN_DEF_VENDOR_ID	0x08	tlan.h
33188	TLAN_DEF_DEVICE_ID	0x0A	tlan.h
33189	TLAN_DEF_REVISION	0x0C	tlan.h
33190	TLAN_DEF_SUBCLASS	0x0D	tlan.h
33191	TLAN_DEF_MIN_LAT	0x0E	tlan.h
33192	TLAN_DEF_MAX_LAT	0x0F	tlan.h
33193	TLAN_AREG_0	0x10	tlan.h
33194	TLAN_AREG_1	0x16	tlan.h
33195	TLAN_AREG_2	0x1C	tlan.h
33196	TLAN_AREG_3	0x22	tlan.h
33197	TLAN_HASH_1	0x28	tlan.h
33198	TLAN_HASH_2	0x2C	tlan.h
33199	TLAN_GOOD_TX_FRMS	0x30	tlan.h
33200	TLAN_TX_UNDERUNS	0x33	tlan.h
33201	TLAN_GOOD_RX_FRMS	0x34	tlan.h
33202	TLAN_RX_OVERRUNS	0x37	tlan.h
33203	TLAN_DEFERRED_TX	0x38	tlan.h
33204	TLAN_CRC_ERRORS	0x3A	tlan.h
33205	TLAN_CODE_ERRORS	0x3B	tlan.h
33206	TLAN_MULTICOL_FRMS	0x3C	tlan.h
33207	TLAN_SINGLECOL_FRMS	0x3E	tlan.h
33208	TLAN_EXCESSCOL_FRMS	0x40	tlan.h
33209	TLAN_LATE_COLS	0x41	tlan.h
33210	TLAN_CARRIER_LOSS	0x42	tlan.h
33211	TLAN_ACOMMIT	0x43	tlan.h
33212	TLAN_LED_REG	0x44	tlan.h
33213	TLAN_LED_ACT	0x10	tlan.h
33214	TLAN_LED_LINK	0x01	tlan.h
33215	TLAN_BSIZE_REG	0x45	tlan.h
33216	TLAN_MAX_RX	0x46	tlan.h
33217	TLAN_INT_DIS	0x48	tlan.h
33218	TLAN_ID_TX_EOC	0x04	tlan.h
33219	TLAN_ID_RX_EOF	0x02	tlan.h
33220	TLAN_ID_RX_EOC	0x01	tlan.h
33221	TLAN_INT_NUMBER_OF_INTS	8	tlan.h
33222	TLAN_INT_NONE	0x0000	tlan.h
33223	TLAN_INT_TX_EOF	0x0001	tlan.h
33224	TLAN_INT_STAT_OVERFLOW	0x0002	tlan.h
33225	TLAN_INT_RX_EOF	0x0003	tlan.h
33226	TLAN_INT_DUMMY	0x0004	tlan.h
33227	TLAN_INT_TX_EOC	0x0005	tlan.h
33228	TLAN_INT_STATUS_CHECK	0x0006	tlan.h
33229	TLAN_INT_RX_EOC	0x0007	tlan.h
33230	TLAN_TLPHY_ID	0x10	tlan.h
33231	TLAN_TLPHY_CTL	0x11	tlan.h
33232	TLAN_TC_IGLINK	0x8000	tlan.h
33233	TLAN_TC_SWAPOL	0x4000	tlan.h
33234	TLAN_TC_AUISEL	0x2000	tlan.h
33235	TLAN_TC_SQEEN	0x1000	tlan.h
33236	TLAN_TC_MTEST	0x0800	tlan.h
33237	TLAN_TC_RESERVED	0x07F8	tlan.h
33238	TLAN_TC_NFEW	0x0004	tlan.h
33239	TLAN_TC_INTEN	0x0002	tlan.h
33240	TLAN_TC_TINT	0x0001	tlan.h
33241	TLAN_TLPHY_STS	0x12	tlan.h
33242	TLAN_TS_MINT	0x8000	tlan.h
33243	TLAN_TS_PHOK	0x4000	tlan.h
33244	TLAN_TS_POLOK	0x2000	tlan.h
33245	TLAN_TS_TPENERGY	0x1000	tlan.h
33246	TLAN_TS_RESERVED	0x0FFF	tlan.h
33247	TLAN_TLPHY_PAR	0x19	tlan.h
33248	TLAN_PHY_CIM_STAT	0x0020	tlan.h
33249	TLAN_PHY_SPEED_100	0x0040	tlan.h
33250	TLAN_PHY_DUPLEX_FULL	0x0080	tlan.h
33251	TLAN_PHY_AN_EN_STAT	0x0400	tlan.h
33252	NAT_SEM_ID1	0x2000	tlan.h
33253	NAT_SEM_ID2	0x5C01	tlan.h
33254	LEVEL1_ID1	0x7810	tlan.h
33255	LEVEL1_ID2	0x0000	tlan.h
33256	VELOCITY_NAME	"via-velocity"	via-velocity.h
33257	VELOCITY_FULL_DRV_NAM	"VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"	via-velocity.h
33258	VELOCITY_VERSION	"1.13"	via-velocity.h
33259	PKT_BUF_SZ	1564	via-velocity.h
33260	MAX_UNITS	8	via-velocity.h
33261	OPTION_DEFAULT	{ [0 ... MAX_UNITS-1] = -1}	via-velocity.h
33262	REV_ID_VT6110	(0)	via-velocity.h
33263	B_OWNED_BY_CHIP	1	via-velocity.h
33264	B_OWNED_BY_HOST	0	via-velocity.h
33265	RSR_DETAG	0x0080	via-velocity.h
33266	RSR_SNTAG	0x0040	via-velocity.h
33267	RSR_RXER	0x0020	via-velocity.h
33268	RSR_RL	0x0010	via-velocity.h
33269	RSR_CE	0x0008	via-velocity.h
33270	RSR_FAE	0x0004	via-velocity.h
33271	RSR_CRC	0x0002	via-velocity.h
33272	RSR_VIDM	0x0001	via-velocity.h
33273	RSR_RXOK	0x8000	via-velocity.h	rx OK
33274	RSR_PFT	0x4000	via-velocity.h	Perfect filtering address match
33275	RSR_MAR	0x2000	via-velocity.h	MAC accept multicast address packet
33276	RSR_BAR	0x1000	via-velocity.h	MAC accept broadcast address packet
33277	RSR_PHY	0x0800	via-velocity.h	MAC accept physical address packet
33278	RSR_VTAG	0x0400	via-velocity.h	802.1p/1q tagging packet indicator
33279	RSR_STP	0x0200	via-velocity.h	start of packet
33280	RSR_EDP	0x0100	via-velocity.h	end of packet
33281	RSR1_RXOK	0x80	via-velocity.h	rx OK
33282	RSR1_PFT	0x40	via-velocity.h	Perfect filtering address match
33283	RSR1_MAR	0x20	via-velocity.h	MAC accept multicast address packet
33284	RSR1_BAR	0x10	via-velocity.h	MAC accept broadcast address packet
33285	RSR1_PHY	0x08	via-velocity.h	MAC accept physical address packet
33286	RSR1_VTAG	0x04	via-velocity.h	802.1p/1q tagging packet indicator
33287	RSR1_STP	0x02	via-velocity.h	start of packet
33288	RSR1_EDP	0x01	via-velocity.h	end of packet
33289	CSM_IPOK	0x40	via-velocity.h	IP Checkusm validatiaon ok
33290	CSM_TUPOK	0x20	via-velocity.h	TCP/UDP Checkusm validatiaon ok
33291	CSM_FRAG	0x10	via-velocity.h	Fragment IP datagram
33292	CSM_IPKT	0x04	via-velocity.h	Received an IP packet
33293	CSM_TCPKT	0x02	via-velocity.h	Received a TCP packet
33294	CSM_UDPKT	0x01	via-velocity.h	Received a UDP packet
33295	TSR0_ABT	0x0080	via-velocity.h	Tx abort because of excessive collision
33296	TSR0_OWT	0x0040	via-velocity.h	Jumbo frame Tx abort
33297	TSR0_OWC	0x0020	via-velocity.h	Out of window collision
33298	TSR0_COLS	0x0010	via-velocity.h	experience collision in this transmit event
33299	TSR0_NCR3	0x0008	via-velocity.h	collision retry counter[3]
33300	TSR0_NCR2	0x0004	via-velocity.h	collision retry counter[2]
33301	TSR0_NCR1	0x0002	via-velocity.h	collision retry counter[1]
33302	TSR0_NCR0	0x0001	via-velocity.h	collision retry counter[0]
33303	TSR0_TERR	0x8000	via-velocity.h
33304	TSR0_FDX	0x4000	via-velocity.h	current transaction is serviced by full duplex mode
33305	TSR0_GMII	0x2000	via-velocity.h	current transaction is serviced by GMII mode
33306	TSR0_LNKFL	0x1000	via-velocity.h	packet serviced during link down
33307	TSR0_SHDN	0x0400	via-velocity.h	shutdown case
33308	TSR0_CRS	0x0200	via-velocity.h	carrier sense lost
33309	TSR0_CDH	0x0100	via-velocity.h	AQE test fail (CD heartbeat)
33310	TSR1_TERR	0x80	via-velocity.h
33311	TSR1_FDX	0x40	via-velocity.h	current transaction is serviced by full duplex mode
33312	TSR1_GMII	0x20	via-velocity.h	current transaction is serviced by GMII mode
33313	TSR1_LNKFL	0x10	via-velocity.h	packet serviced during link down
33314	TSR1_SHDN	0x04	via-velocity.h	shutdown case
33315	TSR1_CRS	0x02	via-velocity.h	carrier sense lost
33316	TSR1_CDH	0x01	via-velocity.h	AQE test fail (CD heartbeat)
33317	TCR0_TIC	0x80	via-velocity.h	assert interrupt immediately while descriptor has been send complete
33318	TCR0_PIC	0x40	via-velocity.h	priority interrupt request, INA# is issued over adaptive interrupt scheme
33319	TCR0_VETAG	0x20	via-velocity.h	enable VLAN tag
33320	TCR0_IPCK	0x10	via-velocity.h	request IP checksum calculation.
33321	TCR0_UDPCK	0x08	via-velocity.h	request UDP checksum calculation.
33322	TCR0_TCPCK	0x04	via-velocity.h	request TCP checksum calculation.
33323	TCR0_JMBO	0x02	via-velocity.h	indicate a jumbo packet in GMAC side
33324	TCR0_CRC	0x01	via-velocity.h	disable CRC generation
33325	TCPLS_NORMAL	3	via-velocity.h
33326	TCPLS_START	2	via-velocity.h
33327	TCPLS_END	1	via-velocity.h
33328	TCPLS_MED	0	via-velocity.h
33329	CB_RX_BUF_SIZE	2048UL	via-velocity.h	max buffer size
33330	CB_MAX_RD_NUM	512	via-velocity.h	MAX # of RD
33331	CB_MAX_TD_NUM	256	via-velocity.h	MAX # of TD
33332	CB_INIT_RD_NUM_3119	128	via-velocity.h	init # of RD, for setup VT3119
33333	CB_INIT_TD_NUM_3119	64	via-velocity.h	init # of TD, for setup VT3119
33334	CB_INIT_RD_NUM	128	via-velocity.h	init # of RD, for setup default
33335	CB_INIT_TD_NUM	64	via-velocity.h	init # of TD, for setup default
33336	CB_TD_RING_NUM	4	via-velocity.h	# of TD rings.
33337	CB_MAX_SEG_PER_PKT	7	via-velocity.h	max data seg per packet (Tx)
33338	CB_MAX_TX_ABORT_RETRY	3	via-velocity.h
33339	MCAM_SIZE	64	via-velocity.h
33340	VCAM_SIZE	64	via-velocity.h
33341	TX_QUEUE_NO	4	via-velocity.h
33342	MAX_HW_MIB_COUNTER	32	via-velocity.h
33343	VELOCITY_MIN_MTU	(1514-14)	via-velocity.h
33344	VELOCITY_MAX_MTU	(9000)	via-velocity.h
33345	MAC_REG_PAR	0x00	via-velocity.h	physical address
33346	MAC_REG_RCR	0x06	via-velocity.h
33347	MAC_REG_TCR	0x07	via-velocity.h
33348	MAC_REG_CR0_SET	0x08	via-velocity.h
33349	MAC_REG_CR1_SET	0x09	via-velocity.h
33350	MAC_REG_CR2_SET	0x0A	via-velocity.h
33351	MAC_REG_CR3_SET	0x0B	via-velocity.h
33352	MAC_REG_CR0_CLR	0x0C	via-velocity.h
33353	MAC_REG_CR1_CLR	0x0D	via-velocity.h
33354	MAC_REG_CR2_CLR	0x0E	via-velocity.h
33355	MAC_REG_CR3_CLR	0x0F	via-velocity.h
33356	MAC_REG_MAR	0x10	via-velocity.h
33357	MAC_REG_CAM	0x10	via-velocity.h
33358	MAC_REG_DEC_BASE_HI	0x18	via-velocity.h
33359	MAC_REG_DBF_BASE_HI	0x1C	via-velocity.h
33360	MAC_REG_ISR_CTL	0x20	via-velocity.h
33361	MAC_REG_ISR_HOTMR	0x20	via-velocity.h
33362	MAC_REG_ISR_TSUPTHR	0x20	via-velocity.h
33363	MAC_REG_ISR_RSUPTHR	0x20	via-velocity.h
33364	MAC_REG_ISR_CTL1	0x21	via-velocity.h
33365	MAC_REG_TXE_SR	0x22	via-velocity.h
33366	MAC_REG_RXE_SR	0x23	via-velocity.h
33367	MAC_REG_ISR	0x24	via-velocity.h
33368	MAC_REG_ISR0	0x24	via-velocity.h
33369	MAC_REG_ISR1	0x25	via-velocity.h
33370	MAC_REG_ISR2	0x26	via-velocity.h
33371	MAC_REG_ISR3	0x27	via-velocity.h
33372	MAC_REG_IMR	0x28	via-velocity.h
33373	MAC_REG_IMR0	0x28	via-velocity.h
33374	MAC_REG_IMR1	0x29	via-velocity.h
33375	MAC_REG_IMR2	0x2A	via-velocity.h
33376	MAC_REG_IMR3	0x2B	via-velocity.h
33377	MAC_REG_TDCSR_SET	0x30	via-velocity.h
33378	MAC_REG_RDCSR_SET	0x32	via-velocity.h
33379	MAC_REG_TDCSR_CLR	0x34	via-velocity.h
33380	MAC_REG_RDCSR_CLR	0x36	via-velocity.h
33381	MAC_REG_RDBASE_LO	0x38	via-velocity.h
33382	MAC_REG_RDINDX	0x3C	via-velocity.h
33383	MAC_REG_TDBASE_LO	0x40	via-velocity.h
33384	MAC_REG_RDCSIZE	0x50	via-velocity.h
33385	MAC_REG_TDCSIZE	0x52	via-velocity.h
33386	MAC_REG_TDINDX	0x54	via-velocity.h
33387	MAC_REG_TDIDX0	0x54	via-velocity.h
33388	MAC_REG_TDIDX1	0x56	via-velocity.h
33389	MAC_REG_TDIDX2	0x58	via-velocity.h
33390	MAC_REG_TDIDX3	0x5A	via-velocity.h
33391	MAC_REG_PAUSE_TIMER	0x5C	via-velocity.h
33392	MAC_REG_RBRDU	0x5E	via-velocity.h
33393	MAC_REG_FIFO_TEST0	0x60	via-velocity.h
33394	MAC_REG_FIFO_TEST1	0x64	via-velocity.h
33395	MAC_REG_CAMADDR	0x68	via-velocity.h
33396	MAC_REG_CAMCR	0x69	via-velocity.h
33397	MAC_REG_GFTEST	0x6A	via-velocity.h
33398	MAC_REG_FTSTCMD	0x6B	via-velocity.h
33399	MAC_REG_MIICFG	0x6C	via-velocity.h
33400	MAC_REG_MIISR	0x6D	via-velocity.h
33401	MAC_REG_PHYSR0	0x6E	via-velocity.h
33402	MAC_REG_PHYSR1	0x6F	via-velocity.h
33403	MAC_REG_MIICR	0x70	via-velocity.h
33404	MAC_REG_MIIADR	0x71	via-velocity.h
33405	MAC_REG_MIIDATA	0x72	via-velocity.h
33406	MAC_REG_SOFT_TIMER0	0x74	via-velocity.h
33407	MAC_REG_SOFT_TIMER1	0x76	via-velocity.h
33408	MAC_REG_CFGA	0x78	via-velocity.h
33409	MAC_REG_CFGB	0x79	via-velocity.h
33410	MAC_REG_CFGC	0x7A	via-velocity.h
33411	MAC_REG_CFGD	0x7B	via-velocity.h
33412	MAC_REG_DCFG0	0x7C	via-velocity.h
33413	MAC_REG_DCFG1	0x7D	via-velocity.h
33414	MAC_REG_MCFG0	0x7E	via-velocity.h
33415	MAC_REG_MCFG1	0x7F	via-velocity.h
33416	MAC_REG_TBIST	0x80	via-velocity.h
33417	MAC_REG_RBIST	0x81	via-velocity.h
33418	MAC_REG_PMCC	0x82	via-velocity.h
33419	MAC_REG_STICKHW	0x83	via-velocity.h
33420	MAC_REG_MIBCR	0x84	via-velocity.h
33421	MAC_REG_EERSV	0x85	via-velocity.h
33422	MAC_REG_REVID	0x86	via-velocity.h
33423	MAC_REG_MIBREAD	0x88	via-velocity.h
33424	MAC_REG_BPMA	0x8C	via-velocity.h
33425	MAC_REG_EEWR_DATA	0x8C	via-velocity.h
33426	MAC_REG_BPMD_WR	0x8F	via-velocity.h
33427	MAC_REG_BPCMD	0x90	via-velocity.h
33428	MAC_REG_BPMD_RD	0x91	via-velocity.h
33429	MAC_REG_EECHKSUM	0x92	via-velocity.h
33430	MAC_REG_EECSR	0x93	via-velocity.h
33431	MAC_REG_EERD_DATA	0x94	via-velocity.h
33432	MAC_REG_EADDR	0x96	via-velocity.h
33433	MAC_REG_EMBCMD	0x97	via-velocity.h
33434	MAC_REG_JMPSR0	0x98	via-velocity.h
33435	MAC_REG_JMPSR1	0x99	via-velocity.h
33436	MAC_REG_JMPSR2	0x9A	via-velocity.h
33437	MAC_REG_JMPSR3	0x9B	via-velocity.h
33438	MAC_REG_CHIPGSR	0x9C	via-velocity.h
33439	MAC_REG_TESTCFG	0x9D	via-velocity.h
33440	MAC_REG_DEBUG	0x9E	via-velocity.h
33441	MAC_REG_CHIPGCR	0x9F	via-velocity.h
33442	MAC_REG_WOLCR0_SET	0xA0	via-velocity.h
33443	MAC_REG_WOLCR1_SET	0xA1	via-velocity.h
33444	MAC_REG_PWCFG_SET	0xA2	via-velocity.h
33445	MAC_REG_WOLCFG_SET	0xA3	via-velocity.h
33446	MAC_REG_WOLCR0_CLR	0xA4	via-velocity.h
33447	MAC_REG_WOLCR1_CLR	0xA5	via-velocity.h
33448	MAC_REG_PWCFG_CLR	0xA6	via-velocity.h
33449	MAC_REG_WOLCFG_CLR	0xA7	via-velocity.h
33450	MAC_REG_WOLSR0_SET	0xA8	via-velocity.h
33451	MAC_REG_WOLSR1_SET	0xA9	via-velocity.h
33452	MAC_REG_WOLSR0_CLR	0xAC	via-velocity.h
33453	MAC_REG_WOLSR1_CLR	0xAD	via-velocity.h
33454	MAC_REG_PATRN_CRC0	0xB0	via-velocity.h
33455	MAC_REG_PATRN_CRC1	0xB2	via-velocity.h
33456	MAC_REG_PATRN_CRC2	0xB4	via-velocity.h
33457	MAC_REG_PATRN_CRC3	0xB6	via-velocity.h
33458	MAC_REG_PATRN_CRC4	0xB8	via-velocity.h
33459	MAC_REG_PATRN_CRC5	0xBA	via-velocity.h
33460	MAC_REG_PATRN_CRC6	0xBC	via-velocity.h
33461	MAC_REG_PATRN_CRC7	0xBE	via-velocity.h
33462	MAC_REG_BYTEMSK0_0	0xC0	via-velocity.h
33463	MAC_REG_BYTEMSK0_1	0xC4	via-velocity.h
33464	MAC_REG_BYTEMSK0_2	0xC8	via-velocity.h
33465	MAC_REG_BYTEMSK0_3	0xCC	via-velocity.h
33466	MAC_REG_BYTEMSK1_0	0xD0	via-velocity.h
33467	MAC_REG_BYTEMSK1_1	0xD4	via-velocity.h
33468	MAC_REG_BYTEMSK1_2	0xD8	via-velocity.h
33469	MAC_REG_BYTEMSK1_3	0xDC	via-velocity.h
33470	MAC_REG_BYTEMSK2_0	0xE0	via-velocity.h
33471	MAC_REG_BYTEMSK2_1	0xE4	via-velocity.h
33472	MAC_REG_BYTEMSK2_2	0xE8	via-velocity.h
33473	MAC_REG_BYTEMSK2_3	0xEC	via-velocity.h
33474	MAC_REG_BYTEMSK3_0	0xF0	via-velocity.h
33475	MAC_REG_BYTEMSK3_1	0xF4	via-velocity.h
33476	MAC_REG_BYTEMSK3_2	0xF8	via-velocity.h
33477	MAC_REG_BYTEMSK3_3	0xFC	via-velocity.h
33478	RCR_AS	0x80	via-velocity.h
33479	RCR_AP	0x40	via-velocity.h
33480	RCR_AL	0x20	via-velocity.h
33481	RCR_PROM	0x10	via-velocity.h
33482	RCR_AB	0x08	via-velocity.h
33483	RCR_AM	0x04	via-velocity.h
33484	RCR_AR	0x02	via-velocity.h
33485	RCR_SEP	0x01	via-velocity.h
33486	TCR_TB2BDIS	0x80	via-velocity.h
33487	TCR_COLTMC1	0x08	via-velocity.h
33488	TCR_COLTMC0	0x04	via-velocity.h
33489	TCR_LB1	0x02	via-velocity.h	loopback[1]
33490	TCR_LB0	0x01	via-velocity.h	loopback[0]
33491	CR0_TXON	0x00000008UL	via-velocity.h
33492	CR0_RXON	0x00000004UL	via-velocity.h
33493	CR0_STOP	0x00000002UL	via-velocity.h	stop MAC, default = 1
33494	CR0_STRT	0x00000001UL	via-velocity.h	start MAC
33495	CR0_SFRST	0x00008000UL	via-velocity.h	software reset
33496	CR0_TM1EN	0x00004000UL	via-velocity.h
33497	CR0_TM0EN	0x00002000UL	via-velocity.h
33498	CR0_DPOLL	0x00000800UL	via-velocity.h	disable rx/tx auto polling
33499	CR0_DISAU	0x00000100UL	via-velocity.h
33500	CR0_XONEN	0x00800000UL	via-velocity.h
33501	CR0_FDXTFCEN	0x00400000UL	via-velocity.h	full-duplex TX flow control enable
33502	CR0_FDXRFCEN	0x00200000UL	via-velocity.h	full-duplex RX flow control enable
33503	CR0_HDXFCEN	0x00100000UL	via-velocity.h	half-duplex flow control enable
33504	CR0_XHITH1	0x00080000UL	via-velocity.h	TX XON high threshold 1
33505	CR0_XHITH0	0x00040000UL	via-velocity.h	TX XON high threshold 0
33506	CR0_XLTH1	0x00020000UL	via-velocity.h	TX pause frame low threshold 1
33507	CR0_XLTH0	0x00010000UL	via-velocity.h	TX pause frame low threshold 0
33508	CR0_GSPRST	0x80000000UL	via-velocity.h
33509	CR0_FORSRST	0x40000000UL	via-velocity.h
33510	CR0_FPHYRST	0x20000000UL	via-velocity.h
33511	CR0_DIAG	0x10000000UL	via-velocity.h
33512	CR0_INTPCTL	0x04000000UL	via-velocity.h
33513	CR0_GINTMSK1	0x02000000UL	via-velocity.h
33514	CR0_GINTMSK0	0x01000000UL	via-velocity.h
33515	CR1_SFRST	0x80	via-velocity.h	software reset
33516	CR1_TM1EN	0x40	via-velocity.h
33517	CR1_TM0EN	0x20	via-velocity.h
33518	CR1_DPOLL	0x08	via-velocity.h	disable rx/tx auto polling
33519	CR1_DISAU	0x01	via-velocity.h
33520	CR2_XONEN	0x80	via-velocity.h
33521	CR2_FDXTFCEN	0x40	via-velocity.h	full-duplex TX flow control enable
33522	CR2_FDXRFCEN	0x20	via-velocity.h	full-duplex RX flow control enable
33523	CR2_HDXFCEN	0x10	via-velocity.h	half-duplex flow control enable
33524	CR2_XHITH1	0x08	via-velocity.h	TX XON high threshold 1
33525	CR2_XHITH0	0x04	via-velocity.h	TX XON high threshold 0
33526	CR2_XLTH1	0x02	via-velocity.h	TX pause frame low threshold 1
33527	CR2_XLTH0	0x01	via-velocity.h	TX pause frame low threshold 0
33528	CR3_GSPRST	0x80	via-velocity.h
33529	CR3_FORSRST	0x40	via-velocity.h
33530	CR3_FPHYRST	0x20	via-velocity.h
33531	CR3_DIAG	0x10	via-velocity.h
33532	CR3_INTPCTL	0x04	via-velocity.h
33533	CR3_GINTMSK1	0x02	via-velocity.h
33534	CR3_GINTMSK0	0x01	via-velocity.h
33535	ISRCTL_UDPINT	0x8000	via-velocity.h
33536	ISRCTL_TSUPDIS	0x4000	via-velocity.h
33537	ISRCTL_RSUPDIS	0x2000	via-velocity.h
33538	ISRCTL_PMSK1	0x1000	via-velocity.h
33539	ISRCTL_PMSK0	0x0800	via-velocity.h
33540	ISRCTL_INTPD	0x0400	via-velocity.h
33541	ISRCTL_HCRLD	0x0200	via-velocity.h
33542	ISRCTL_SCRLD	0x0100	via-velocity.h
33543	ISRCTL1_UDPINT	0x80	via-velocity.h
33544	ISRCTL1_TSUPDIS	0x40	via-velocity.h
33545	ISRCTL1_RSUPDIS	0x20	via-velocity.h
33546	ISRCTL1_PMSK1	0x10	via-velocity.h
33547	ISRCTL1_PMSK0	0x08	via-velocity.h
33548	ISRCTL1_INTPD	0x04	via-velocity.h
33549	ISRCTL1_HCRLD	0x02	via-velocity.h
33550	ISRCTL1_SCRLD	0x01	via-velocity.h
33551	TXESR_TFDBS	0x08	via-velocity.h
33552	TXESR_TDWBS	0x04	via-velocity.h
33553	TXESR_TDRBS	0x02	via-velocity.h
33554	TXESR_TDSTR	0x01	via-velocity.h
33555	RXESR_RFDBS	0x08	via-velocity.h
33556	RXESR_RDWBS	0x04	via-velocity.h
33557	RXESR_RDRBS	0x02	via-velocity.h
33558	RXESR_RDSTR	0x01	via-velocity.h
33559	ISR_ISR3	0x80000000UL	via-velocity.h
33560	ISR_ISR2	0x40000000UL	via-velocity.h
33561	ISR_ISR1	0x20000000UL	via-velocity.h
33562	ISR_ISR0	0x10000000UL	via-velocity.h
33563	ISR_TXSTLI	0x02000000UL	via-velocity.h
33564	ISR_RXSTLI	0x01000000UL	via-velocity.h
33565	ISR_HFLD	0x00800000UL	via-velocity.h
33566	ISR_UDPI	0x00400000UL	via-velocity.h
33567	ISR_MIBFI	0x00200000UL	via-velocity.h
33568	ISR_SHDNI	0x00100000UL	via-velocity.h
33569	ISR_PHYI	0x00080000UL	via-velocity.h
33570	ISR_PWEI	0x00040000UL	via-velocity.h
33571	ISR_TMR1I	0x00020000UL	via-velocity.h
33572	ISR_TMR0I	0x00010000UL	via-velocity.h
33573	ISR_SRCI	0x00008000UL	via-velocity.h
33574	ISR_LSTPEI	0x00004000UL	via-velocity.h
33575	ISR_LSTEI	0x00002000UL	via-velocity.h
33576	ISR_OVFI	0x00001000UL	via-velocity.h
33577	ISR_FLONI	0x00000800UL	via-velocity.h
33578	ISR_RACEI	0x00000400UL	via-velocity.h
33579	ISR_TXWB1I	0x00000200UL	via-velocity.h
33580	ISR_TXWB0I	0x00000100UL	via-velocity.h
33581	ISR_PTX3I	0x00000080UL	via-velocity.h
33582	ISR_PTX2I	0x00000040UL	via-velocity.h
33583	ISR_PTX1I	0x00000020UL	via-velocity.h
33584	ISR_PTX0I	0x00000010UL	via-velocity.h
33585	ISR_PTXI	0x00000008UL	via-velocity.h
33586	ISR_PRXI	0x00000004UL	via-velocity.h
33587	ISR_PPTXI	0x00000002UL	via-velocity.h
33588	ISR_PPRXI	0x00000001UL	via-velocity.h
33589	IMR_TXSTLM	0x02000000UL	via-velocity.h
33590	IMR_UDPIM	0x00400000UL	via-velocity.h
33591	IMR_MIBFIM	0x00200000UL	via-velocity.h
33592	IMR_SHDNIM	0x00100000UL	via-velocity.h
33593	IMR_PHYIM	0x00080000UL	via-velocity.h
33594	IMR_PWEIM	0x00040000UL	via-velocity.h
33595	IMR_TMR1IM	0x00020000UL	via-velocity.h
33596	IMR_TMR0IM	0x00010000UL	via-velocity.h
33597	IMR_SRCIM	0x00008000UL	via-velocity.h
33598	IMR_LSTPEIM	0x00004000UL	via-velocity.h
33599	IMR_LSTEIM	0x00002000UL	via-velocity.h
33600	IMR_OVFIM	0x00001000UL	via-velocity.h
33601	IMR_FLONIM	0x00000800UL	via-velocity.h
33602	IMR_RACEIM	0x00000400UL	via-velocity.h
33603	IMR_TXWB1IM	0x00000200UL	via-velocity.h
33604	IMR_TXWB0IM	0x00000100UL	via-velocity.h
33605	IMR_PTX3IM	0x00000080UL	via-velocity.h
33606	IMR_PTX2IM	0x00000040UL	via-velocity.h
33607	IMR_PTX1IM	0x00000020UL	via-velocity.h
33608	IMR_PTX0IM	0x00000010UL	via-velocity.h
33609	IMR_PTXIM	0x00000008UL	via-velocity.h
33610	IMR_PRXIM	0x00000004UL	via-velocity.h
33611	IMR_PPTXIM	0x00000002UL	via-velocity.h
33612	IMR_PPRXIM	0x00000001UL	via-velocity.h
33613	INT_MASK_DEF	( IMR_PPTXIM\|IMR_PPRXIM\| IMR_PTXIM\|IMR_PRXIM \| \ IMR_PWEIM\|IMR_TXWB0IM\|IMR_TXWB1IM\|IMR_FLONIM\| \ IMR_OVFIM\|IMR_LSTEIM\|IMR_LSTP	via-velocity.h
33614	TRDCSR_DEAD	0x0008	via-velocity.h
33615	TRDCSR_WAK	0x0004	via-velocity.h
33616	TRDCSR_ACT	0x0002	via-velocity.h
33617	TRDCSR_RUN	0x0001	via-velocity.h
33618	CAMADDR_CAMEN	0x80	via-velocity.h
33619	CAMADDR_VCAMSL	0x40	via-velocity.h
33620	CAMCR_PS1	0x80	via-velocity.h
33621	CAMCR_PS0	0x40	via-velocity.h
33622	CAMCR_AITRPKT	0x20	via-velocity.h
33623	CAMCR_AITR16	0x10	via-velocity.h
33624	CAMCR_CAMRD	0x08	via-velocity.h
33625	CAMCR_CAMWR	0x04	via-velocity.h
33626	CAMCR_PS_CAM_MASK	0x40	via-velocity.h
33627	CAMCR_PS_CAM_DATA	0x80	via-velocity.h
33628	CAMCR_PS_MAR	0x00	via-velocity.h
33629	MIICFG_MPO1	0x80	via-velocity.h
33630	MIICFG_MPO0	0x40	via-velocity.h
33631	MIICFG_MFDC	0x20	via-velocity.h
33632	MIISR_MIDLE	0x80	via-velocity.h
33633	PHYSR0_PHYRST	0x80	via-velocity.h
33634	PHYSR0_LINKGD	0x40	via-velocity.h
33635	PHYSR0_FDPX	0x10	via-velocity.h
33636	PHYSR0_SPDG	0x08	via-velocity.h
33637	PHYSR0_SPD10	0x04	via-velocity.h
33638	PHYSR0_RXFLC	0x02	via-velocity.h
33639	PHYSR0_TXFLC	0x01	via-velocity.h
33640	PHYSR1_PHYTBI	0x01	via-velocity.h
33641	MIICR_MAUTO	0x80	via-velocity.h
33642	MIICR_RCMD	0x40	via-velocity.h
33643	MIICR_WCMD	0x20	via-velocity.h
33644	MIICR_MDPM	0x10	via-velocity.h
33645	MIICR_MOUT	0x08	via-velocity.h
33646	MIICR_MDO	0x04	via-velocity.h
33647	MIICR_MDI	0x02	via-velocity.h
33648	MIICR_MDC	0x01	via-velocity.h
33649	MIIADR_SWMPL	0x80	via-velocity.h
33650	CFGA_PMHCTG	0x08	via-velocity.h
33651	CFGA_GPIO1PD	0x04	via-velocity.h
33652	CFGA_ABSHDN	0x02	via-velocity.h
33653	CFGA_PACPI	0x01	via-velocity.h
33654	CFGB_GTCKOPT	0x80	via-velocity.h
33655	CFGB_MIIOPT	0x40	via-velocity.h
33656	CFGB_CRSEOPT	0x20	via-velocity.h
33657	CFGB_OFSET	0x10	via-velocity.h
33658	CFGB_CRANDOM	0x08	via-velocity.h
33659	CFGB_CAP	0x04	via-velocity.h
33660	CFGB_MBA	0x02	via-velocity.h
33661	CFGB_BAKOPT	0x01	via-velocity.h
33662	CFGC_EELOAD	0x80	via-velocity.h
33663	CFGC_BROPT	0x40	via-velocity.h
33664	CFGC_DLYEN	0x20	via-velocity.h
33665	CFGC_DTSEL	0x10	via-velocity.h
33666	CFGC_BTSEL	0x08	via-velocity.h
33667	CFGC_BPS2	0x04	via-velocity.h	bootrom select[2]
33668	CFGC_BPS1	0x02	via-velocity.h	bootrom select[1]
33669	CFGC_BPS0	0x01	via-velocity.h	bootrom select[0]
33670	CFGD_IODIS	0x80	via-velocity.h
33671	CFGD_MSLVDACEN	0x40	via-velocity.h
33672	CFGD_CFGDACEN	0x20	via-velocity.h
33673	CFGD_PCI64EN	0x10	via-velocity.h
33674	CFGD_HTMRL4	0x08	via-velocity.h
33675	DCFG_XMWI	0x8000	via-velocity.h
33676	DCFG_XMRM	0x4000	via-velocity.h
33677	DCFG_XMRL	0x2000	via-velocity.h
33678	DCFG_PERDIS	0x1000	via-velocity.h
33679	DCFG_MRWAIT	0x0400	via-velocity.h
33680	DCFG_MWWAIT	0x0200	via-velocity.h
33681	DCFG_LATMEN	0x0100	via-velocity.h
33682	MCFG_RXARB	0x0080	via-velocity.h
33683	MCFG_RFT1	0x0020	via-velocity.h
33684	MCFG_RFT0	0x0010	via-velocity.h
33685	MCFG_LOWTHOPT	0x0008	via-velocity.h
33686	MCFG_PQEN	0x0004	via-velocity.h
33687	MCFG_RTGOPT	0x0002	via-velocity.h
33688	MCFG_VIDFR	0x0001	via-velocity.h
33689	MCFG_TXARB	0x8000	via-velocity.h
33690	MCFG_TXQBK1	0x0800	via-velocity.h
33691	MCFG_TXQBK0	0x0400	via-velocity.h
33692	MCFG_TXQNOBK	0x0200	via-velocity.h
33693	MCFG_SNAPOPT	0x0100	via-velocity.h
33694	PMCC_DSI	0x80	via-velocity.h
33695	PMCC_D2_DIS	0x40	via-velocity.h
33696	PMCC_D1_DIS	0x20	via-velocity.h
33697	PMCC_D3C_EN	0x10	via-velocity.h
33698	PMCC_D3H_EN	0x08	via-velocity.h
33699	PMCC_D2_EN	0x04	via-velocity.h
33700	PMCC_D1_EN	0x02	via-velocity.h
33701	PMCC_D0_EN	0x01	via-velocity.h
33702	STICKHW_SWPTAG	0x10	via-velocity.h
33703	STICKHW_WOLSR	0x08	via-velocity.h
33704	STICKHW_WOLEN	0x04	via-velocity.h
33705	STICKHW_DS1	0x02	via-velocity.h	R/W by software/cfg cycle
33706	STICKHW_DS0	0x01	via-velocity.h	suspend well DS write port
33707	MIBCR_MIBISTOK	0x80	via-velocity.h
33708	MIBCR_MIBISTGO	0x40	via-velocity.h
33709	MIBCR_MIBINC	0x20	via-velocity.h
33710	MIBCR_MIBHI	0x10	via-velocity.h
33711	MIBCR_MIBFRZ	0x08	via-velocity.h
33712	MIBCR_MIBFLSH	0x04	via-velocity.h
33713	MIBCR_MPTRINI	0x02	via-velocity.h
33714	MIBCR_MIBCLR	0x01	via-velocity.h
33715	EERSV_BOOT_RPL	((u8) 0x01)	via-velocity.h	Boot method selection for VT6110
33716	EERSV_BOOT_MASK	((u8) 0x06)	via-velocity.h
33717	EERSV_BOOT_INT19	((u8) 0x00)	via-velocity.h
33718	EERSV_BOOT_INT18	((u8) 0x02)	via-velocity.h
33719	EERSV_BOOT_LOCAL	((u8) 0x04)	via-velocity.h
33720	EERSV_BOOT_BEV	((u8) 0x06)	via-velocity.h
33721	BPCMD_BPDNE	0x80	via-velocity.h
33722	BPCMD_EBPWR	0x02	via-velocity.h
33723	BPCMD_EBPRD	0x01	via-velocity.h
33724	EECSR_EMBP	0x40	via-velocity.h	eeprom embeded programming
33725	EECSR_RELOAD	0x20	via-velocity.h	eeprom content reload
33726	EECSR_DPM	0x10	via-velocity.h	eeprom direct programming
33727	EECSR_ECS	0x08	via-velocity.h	eeprom CS pin
33728	EECSR_ECK	0x04	via-velocity.h	eeprom CK pin
33729	EECSR_EDI	0x02	via-velocity.h	eeprom DI pin
33730	EECSR_EDO	0x01	via-velocity.h	eeprom DO pin
33731	EMBCMD_EDONE	0x80	via-velocity.h
33732	EMBCMD_EWDIS	0x08	via-velocity.h
33733	EMBCMD_EWEN	0x04	via-velocity.h
33734	EMBCMD_EWR	0x02	via-velocity.h
33735	EMBCMD_ERD	0x01	via-velocity.h
33736	TESTCFG_HBDIS	0x80	via-velocity.h
33737	CHIPGCR_FCGMII	0x80	via-velocity.h
33738	CHIPGCR_FCFDX	0x40	via-velocity.h
33739	CHIPGCR_FCRESV	0x20	via-velocity.h
33740	CHIPGCR_FCMODE	0x10	via-velocity.h
33741	CHIPGCR_LPSOPT	0x08	via-velocity.h
33742	CHIPGCR_TM1US	0x04	via-velocity.h
33743	CHIPGCR_TM0US	0x02	via-velocity.h
33744	CHIPGCR_PHYINTEN	0x01	via-velocity.h
33745	WOLCR_MSWOLEN7	0x0080	via-velocity.h	enable pattern match filtering
33746	WOLCR_MSWOLEN6	0x0040	via-velocity.h
33747	WOLCR_MSWOLEN5	0x0020	via-velocity.h
33748	WOLCR_MSWOLEN4	0x0010	via-velocity.h
33749	WOLCR_MSWOLEN3	0x0008	via-velocity.h
33750	WOLCR_MSWOLEN2	0x0004	via-velocity.h
33751	WOLCR_MSWOLEN1	0x0002	via-velocity.h
33752	WOLCR_MSWOLEN0	0x0001	via-velocity.h
33753	WOLCR_ARP_EN	0x0001	via-velocity.h
33754	WOLCR_LINKOFF_EN	0x0800	via-velocity.h	link off detected enable
33755	WOLCR_LINKON_EN	0x0400	via-velocity.h	link on detected enable
33756	WOLCR_MAGIC_EN	0x0200	via-velocity.h	magic packet filter enable
33757	WOLCR_UNICAST_EN	0x0100	via-velocity.h	unicast filter enable
33758	PWCFG_PHYPWOPT	0x80	via-velocity.h	internal MII I/F timing
33759	PWCFG_PCISTICK	0x40	via-velocity.h	PCI sticky R/W enable
33760	PWCFG_WOLTYPE	0x20	via-velocity.h	pulse(1) or button (0)
33761	PWCFG_LEGCY_WOL	0x10	via-velocity.h
33762	PWCFG_PMCSR_PME_SR	0x08	via-velocity.h
33763	PWCFG_PMCSR_PME_EN	0x04	via-velocity.h	control by PCISTICK
33764	PWCFG_LEGACY_WOLSR	0x02	via-velocity.h	Legacy WOL_SR shadow
33765	PWCFG_LEGACY_WOLEN	0x01	via-velocity.h	Legacy WOL_EN shadow
33766	WOLCFG_PMEOVR	0x80	via-velocity.h	for legacy use, force PMEEN always
33767	WOLCFG_SAM	0x20	via-velocity.h	accept multicast case reset, default=0
33768	WOLCFG_SAB	0x10	via-velocity.h	accept broadcast case reset, default=0
33769	WOLCFG_SMIIACC	0x08	via-velocity.h	??
33770	WOLCFG_SGENWH	0x02	via-velocity.h
33771	WOLCFG_PHYINTEN	0x01	via-velocity.h	0:PHYINT trigger enable, 1:use internal MII
33772	WOLSR_LINKOFF_INT	0x0800	via-velocity.h
33773	WOLSR_LINKON_INT	0x0400	via-velocity.h
33774	WOLSR_MAGIC_INT	0x0200	via-velocity.h
33775	WOLSR_UNICAST_INT	0x0100	via-velocity.h
33776	PKT_TYPE_NONE	0x0000	via-velocity.h	Turn off receiver
33777	PKT_TYPE_DIRECTED	0x0001	via-velocity.h	obselete, directed address is always accepted
33778	PKT_TYPE_MULTICAST	0x0002	via-velocity.h
33779	PKT_TYPE_ALL_MULTICAST	0x0004	via-velocity.h
33780	PKT_TYPE_BROADCAST	0x0008	via-velocity.h
33781	PKT_TYPE_PROMISCUOUS	0x0020	via-velocity.h
33782	PKT_TYPE_LONG	0x2000	via-velocity.h	NOTE.... the definition of LONG is >2048 bytes in our chip
33783	PKT_TYPE_RUNT	0x4000	via-velocity.h
33784	PKT_TYPE_ERROR	0x8000	via-velocity.h	Accept error packets, e.g. CRC error
33785	MAC_LB_NONE	0x00	via-velocity.h
33786	MAC_LB_INTERNAL	0x01	via-velocity.h
33787	MAC_LB_EXTERNAL	0x02	via-velocity.h
33788	IMR_MASK_VALUE	0x0033FF0FUL	via-velocity.h	initial value of IMR
33789	IMR_MASK_VALUE	0x0013FB0FUL	via-velocity.h	initial value of IMR
33790	REV_ID_VT3119_A0	0x00	via-velocity.h
33791	REV_ID_VT3119_A1	0x01	via-velocity.h
33792	REV_ID_VT3216_A0	0x10	via-velocity.h
33793	W_MAX_TIMEOUT	0x0FFFU	via-velocity.h
33794	MII_REG_BMCR	0x00	via-velocity.h	physical address
33795	MII_REG_BMSR	0x01	via-velocity.h
33796	MII_REG_PHYID1	0x02	via-velocity.h	OUI
33797	MII_REG_PHYID2	0x03	via-velocity.h	OUI + Module ID + REV ID
33798	MII_REG_ANAR	0x04	via-velocity.h
33799	MII_REG_ANLPAR	0x05	via-velocity.h
33800	MII_REG_G1000CR	0x09	via-velocity.h
33801	MII_REG_G1000SR	0x0A	via-velocity.h
33802	MII_REG_MODCFG	0x10	via-velocity.h
33803	MII_REG_TCSR	0x16	via-velocity.h
33804	MII_REG_PLED	0x1B	via-velocity.h
33805	MII_REG_PCR	0x17	via-velocity.h
33806	MII_REG_PCSR	0x17	via-velocity.h
33807	MII_REG_AUXCR	0x1C	via-velocity.h
33808	MII_REG_PSCR	0x10	via-velocity.h	PHY specific control register
33809	BMCR_RESET	0x8000	via-velocity.h
33810	BMCR_LBK	0x4000	via-velocity.h
33811	BMCR_SPEED100	0x2000	via-velocity.h
33812	BMCR_AUTO	0x1000	via-velocity.h
33813	BMCR_PD	0x0800	via-velocity.h
33814	BMCR_ISO	0x0400	via-velocity.h
33815	BMCR_REAUTO	0x0200	via-velocity.h
33816	BMCR_FDX	0x0100	via-velocity.h
33817	BMCR_SPEED1G	0x0040	via-velocity.h
33818	BMSR_AUTOCM	0x0020	via-velocity.h
33819	BMSR_LNK	0x0004	via-velocity.h
33820	ANAR_ASMDIR	0x0800	via-velocity.h	Asymmetric PAUSE support
33821	ANAR_PAUSE	0x0400	via-velocity.h	Symmetric PAUSE Support
33822	ANAR_T4	0x0200	via-velocity.h
33823	ANAR_TXFD	0x0100	via-velocity.h
33824	ANAR_TX	0x0080	via-velocity.h
33825	ANAR_10FD	0x0040	via-velocity.h
33826	ANAR_10	0x0020	via-velocity.h
33827	ANLPAR_ASMDIR	0x0800	via-velocity.h	Asymmetric PAUSE support
33828	ANLPAR_PAUSE	0x0400	via-velocity.h	Symmetric PAUSE Support
33829	ANLPAR_T4	0x0200	via-velocity.h
33830	ANLPAR_TXFD	0x0100	via-velocity.h
33831	ANLPAR_TX	0x0080	via-velocity.h
33832	ANLPAR_10FD	0x0040	via-velocity.h
33833	ANLPAR_10	0x0020	via-velocity.h
33834	G1000CR_1000FD	0x0200	via-velocity.h	PHY is 1000-T Full-duplex capable
33835	G1000CR_1000	0x0100	via-velocity.h	PHY is 1000-T Half-duplex capable
33836	G1000SR_1000FD	0x0800	via-velocity.h	LP PHY is 1000-T Full-duplex capable
33837	G1000SR_1000	0x0400	via-velocity.h	LP PHY is 1000-T Half-duplex capable
33838	TCSR_ECHODIS	0x2000	via-velocity.h
33839	AUXCR_MDPPS	0x0004	via-velocity.h
33840	PLED_LALBE	0x0004	via-velocity.h
33841	PSCR_ACRSTX	0x0800	via-velocity.h	Assert CRS on Transmit
33842	PHYID_CICADA_CS8201	0x000FC410UL	via-velocity.h
33843	PHYID_VT3216_32BIT	0x000FC610UL	via-velocity.h
33844	PHYID_VT3216_64BIT	0x000FC600UL	via-velocity.h
33845	PHYID_MARVELL_1000	0x01410C50UL	via-velocity.h
33846	PHYID_MARVELL_1000S	0x01410C40UL	via-velocity.h
33847	PHYID_REV_ID_MASK	0x0000000FUL	via-velocity.h
33848	VELOCITY_WOL_MAGIC	0x00000000UL	via-velocity.h
33849	VELOCITY_WOL_PHY	0x00000001UL	via-velocity.h
33850	VELOCITY_WOL_ARP	0x00000002UL	via-velocity.h
33851	VELOCITY_WOL_UCAST	0x00000004UL	via-velocity.h
33852	VELOCITY_WOL_BCAST	0x00000010UL	via-velocity.h
33853	VELOCITY_WOL_MCAST	0x00000020UL	via-velocity.h
33854	VELOCITY_WOL_MAGIC_SEC	0x00000040UL	via-velocity.h
33855	VELOCITY_FLAGS_TAGGING	0x00000001UL	via-velocity.h
33856	VELOCITY_FLAGS_TX_CSUM	0x00000002UL	via-velocity.h
33857	VELOCITY_FLAGS_RX_CSUM	0x00000004UL	via-velocity.h
33858	VELOCITY_FLAGS_IP_ALIGN	0x00000008UL	via-velocity.h
33859	VELOCITY_FLAGS_VAL_PKT_LEN	0x00000010UL	via-velocity.h
33860	VELOCITY_FLAGS_FLOW_CTRL	0x01000000UL	via-velocity.h
33861	VELOCITY_FLAGS_OPENED	0x00010000UL	via-velocity.h
33862	VELOCITY_FLAGS_VMNS_CONNECTED	0x00020000UL	via-velocity.h
33863	VELOCITY_FLAGS_VMNS_COMMITTED	0x00040000UL	via-velocity.h
33864	VELOCITY_FLAGS_WOL_ENABLED	0x00080000UL	via-velocity.h
33865	VELOCITY_LINK_FAIL	0x00000001UL	via-velocity.h
33866	VELOCITY_SPEED_10	0x00000002UL	via-velocity.h
33867	VELOCITY_SPEED_100	0x00000004UL	via-velocity.h
33868	VELOCITY_SPEED_1000	0x00000008UL	via-velocity.h
33869	VELOCITY_DUPLEX_FULL	0x00000010UL	via-velocity.h
33870	VELOCITY_AUTONEG_ENABLE	0x00000020UL	via-velocity.h
33871	VELOCITY_FORCED_BY_EEPROM	0x00000040UL	via-velocity.h
33872	VELOCITY_LINK_CHANGE	0x00000001UL	via-velocity.h
33873	RX_DESC_MIN	4	via-velocity.h
33874	RX_DESC_MAX	255	via-velocity.h
33875	RX_DESC_DEF	RX_DESC_MIN	via-velocity.h
33876	TX_DESC_MIN	1	via-velocity.h
33877	TX_DESC_MAX	256	via-velocity.h
33878	TX_DESC_DEF	TX_DESC_MIN	via-velocity.h
33879	VIRTIO_NET_F_CSUM	0	virtio-net.h	Host handles pkts w/ partial csum
33880	VIRTIO_NET_F_GUEST_CSUM	1	virtio-net.h	Guest handles pkts w/ partial csum
33881	VIRTIO_NET_F_MAC	5	virtio-net.h	Host has given MAC address.
33882	VIRTIO_NET_F_GSO	6	virtio-net.h	Host handles pkts w/ any GSO type
33883	VIRTIO_NET_F_GUEST_TSO4	7	virtio-net.h	Guest can handle TSOv4 in.
33884	VIRTIO_NET_F_GUEST_TSO6	8	virtio-net.h	Guest can handle TSOv6 in.
33885	VIRTIO_NET_F_GUEST_ECN	9	virtio-net.h	Guest can handle TSO[6] w/ ECN in.
33886	VIRTIO_NET_F_GUEST_UFO	10	virtio-net.h	Guest can handle UFO in.
33887	VIRTIO_NET_F_HOST_TSO4	11	virtio-net.h	Host can handle TSOv4 in.
33888	VIRTIO_NET_F_HOST_TSO6	12	virtio-net.h	Host can handle TSOv6 in.
33889	VIRTIO_NET_F_HOST_ECN	13	virtio-net.h	Host can handle TSO[6] w/ ECN in.
33890	VIRTIO_NET_F_HOST_UFO	14	virtio-net.h	Host can handle UFO in.
33891	WLAN_Ix86	1	wlan_compat.h
33892	WLAN_PPC	2	wlan_compat.h
33893	WLAN_Ix96	3	wlan_compat.h
33894	WLAN_ARM	4	wlan_compat.h
33895	WLAN_ALPHA	5	wlan_compat.h
33896	WLAN_MIPS	6	wlan_compat.h
33897	WLAN_HPPA	7	wlan_compat.h
33898	WLAN_I386CORE	1	wlan_compat.h
33899	WLAN_PPCCORE	2	wlan_compat.h
33900	WLAN_I296	3	wlan_compat.h
33901	WLAN_ARMCORE	4	wlan_compat.h
33902	WLAN_ALPHACORE	5	wlan_compat.h
33903	WLAN_MIPSCORE	6	wlan_compat.h
33904	WLAN_HPPACORE	7	wlan_compat.h
33905	WLAN_I386PART	1	wlan_compat.h
33906	WLAN_MPC860	2	wlan_compat.h
33907	WLAN_MPC823	3	wlan_compat.h
33908	WLAN_I296SA	4	wlan_compat.h
33909	WLAN_PPCPART	5	wlan_compat.h
33910	WLAN_ARMPART	6	wlan_compat.h
33911	WLAN_ALPHAPART	7	wlan_compat.h
33912	WLAN_MIPSPART	8	wlan_compat.h
33913	WLAN_HPPAPART	9	wlan_compat.h
33914	WLAN_PCAT	1	wlan_compat.h
33915	WLAN_MBX	2	wlan_compat.h
33916	WLAN_RPX	3	wlan_compat.h
33917	WLAN_LWARCH	4	wlan_compat.h
33918	WLAN_PMAC	5	wlan_compat.h
33919	WLAN_SKIFF	6	wlan_compat.h
33920	WLAN_BITSY	7	wlan_compat.h
33921	WLAN_ALPHAARCH	7	wlan_compat.h
33922	WLAN_MIPSARCH	9	wlan_compat.h
33923	WLAN_HPPAARCH	10	wlan_compat.h
33924	WLAN_LINUX_KERNEL	1	wlan_compat.h
33925	WLAN_LINUX_USER	2	wlan_compat.h
33926	WLAN_PCMCIA	1	wlan_compat.h
33927	WLAN_ISA	2	wlan_compat.h
33928	WLAN_PCI	3	wlan_compat.h
33929	WLAN_USB	4	wlan_compat.h
33930	WLAN_PLX	5	wlan_compat.h
33931	WLAN_OS	WLAN_LINUX_KERNEL	wlan_compat.h
33932	WLAN_OS	WLAN_LINUX_USER	wlan_compat.h
33933	WLAN_CPU_FAMILY	WLAN_Ix86	wlan_compat.h
33934	WLAN_CPU_CORE	WLAN_I386CORE	wlan_compat.h
33935	WLAN_CPU_PART	WLAN_I386PART	wlan_compat.h
33936	WLAN_SYSARCH	WLAN_PCAT	wlan_compat.h
33937	WLAN_CPU_FAMILY	WLAN_PPC	wlan_compat.h
33938	WLAN_CPU_CORE	WLAN_PPCCORE	wlan_compat.h
33939	WLAN_CPU_PART	WLAN_MPC860	wlan_compat.h
33940	WLAN_SYSARCH	WLAN_MBX	wlan_compat.h
33941	WLAN_CPU_PART	WLAN_MPC823	wlan_compat.h
33942	WLAN_SYSARCH	WLAN_RPX	wlan_compat.h
33943	WLAN_CPU_PART	WLAN_MPC860	wlan_compat.h
33944	WLAN_SYSARCH	WLAN_RPX	wlan_compat.h
33945	WLAN_CPU_PART	WLAN_PPCPART	wlan_compat.h
33946	WLAN_SYSARCH	WLAN_PMAC	wlan_compat.h
33947	WLAN_CPU_FAMILY	WLAN_ARM	wlan_compat.h
33948	WLAN_CPU_CORE	WLAN_ARMCORE	wlan_compat.h
33949	WLAN_CPU_PART	WLAN_ARM_PART	wlan_compat.h
33950	WLAN_SYSARCH	WLAN_SKIFF	wlan_compat.h
33951	WLAN_CPU_FAMILY	WLAN_ALPHA	wlan_compat.h
33952	WLAN_CPU_CORE	WLAN_ALPHACORE	wlan_compat.h
33953	WLAN_CPU_PART	WLAN_ALPHAPART	wlan_compat.h
33954	WLAN_SYSARCH	WLAN_ALPHAARCH	wlan_compat.h
33955	WLAN_CPU_FAMILY	WLAN_MIPS	wlan_compat.h
33956	WLAN_CPU_CORE	WLAN_MIPSCORE	wlan_compat.h
33957	WLAN_CPU_PART	WLAN_MIPSPART	wlan_compat.h
33958	WLAN_SYSARCH	WLAN_MIPSARCH	wlan_compat.h
33959	WLAN_CPU_FAMILY	WLAN_HPPA	wlan_compat.h
33960	WLAN_CPU_CORE	WLAN_HPPACORE	wlan_compat.h
33961	WLAN_CPU_PART	WLAN_HPPAPART	wlan_compat.h
33962	WLAN_SYSARCH	WLAN_HPPAARCH	wlan_compat.h
33963	BIT0	0x00000001	wlan_compat.h
33964	BIT1	0x00000002	wlan_compat.h
33965	BIT2	0x00000004	wlan_compat.h
33966	BIT3	0x00000008	wlan_compat.h
33967	BIT4	0x00000010	wlan_compat.h
33968	BIT5	0x00000020	wlan_compat.h
33969	BIT6	0x00000040	wlan_compat.h
33970	BIT7	0x00000080	wlan_compat.h
33971	BIT8	0x00000100	wlan_compat.h
33972	BIT9	0x00000200	wlan_compat.h
33973	BIT10	0x00000400	wlan_compat.h
33974	BIT11	0x00000800	wlan_compat.h
33975	BIT12	0x00001000	wlan_compat.h
33976	BIT13	0x00002000	wlan_compat.h
33977	BIT14	0x00004000	wlan_compat.h
33978	BIT15	0x00008000	wlan_compat.h
33979	BIT16	0x00010000	wlan_compat.h
33980	BIT17	0x00020000	wlan_compat.h
33981	BIT18	0x00040000	wlan_compat.h
33982	BIT19	0x00080000	wlan_compat.h
33983	BIT20	0x00100000	wlan_compat.h
33984	BIT21	0x00200000	wlan_compat.h
33985	BIT22	0x00400000	wlan_compat.h
33986	BIT23	0x00800000	wlan_compat.h
33987	BIT24	0x01000000	wlan_compat.h
33988	BIT25	0x02000000	wlan_compat.h
33989	BIT26	0x04000000	wlan_compat.h
33990	BIT27	0x08000000	wlan_compat.h
33991	BIT28	0x10000000	wlan_compat.h
33992	BIT29	0x20000000	wlan_compat.h
33993	BIT30	0x40000000	wlan_compat.h
33994	BIT31	0x80000000	wlan_compat.h
33995	UINT8_MAX	(0xffUL)	wlan_compat.h
33996	UINT16_MAX	(0xffffUL)	wlan_compat.h
33997	UINT32_MAX	(0xffffffffUL)	wlan_compat.h
33998	INT8_MAX	(0x7fL)	wlan_compat.h
33999	INT16_MAX	(0x7fffL)	wlan_compat.h
34000	INT32_MAX	(0x7fffffffL)	wlan_compat.h
34001	__WLAN_ATTRIB_PACK__	__attribute__ ((packed))	wlan_compat.h
34002	__WLAN_INLINE__	inline	wlan_compat.h
34003	WLAN_MIN_ARRAY	0	wlan_compat.h
34004	WLAN_DBVAR	wlan_debug	wlan_compat.h
34005	DBFENTER	{ if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Enter\n"); } }	wlan_compat.h
34006	DBFEXIT	{ if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Exit\n"); } }	wlan_compat.h
34007	wlan_ms_per_tick	(1000UL / (wlan_ticks_per_sec))	wlan_compat.h
34008	MODVERSIONS	1	wlan_compat.h
34009	__SMP__	1	wlan_compat.h
34010	CONFIG_NETLINK	1	wlan_compat.h
34011	ERRFILE	ERRFILE_ath5k	ath5k.h
34012	PCI_DEVICE_ID_ATHEROS_AR5210	0x0007	ath5k.h	AR5210
34013	PCI_DEVICE_ID_ATHEROS_AR5311	0x0011	ath5k.h	AR5311
34014	PCI_DEVICE_ID_ATHEROS_AR5211	0x0012	ath5k.h	AR5211
34015	PCI_DEVICE_ID_ATHEROS_AR5212	0x0013	ath5k.h	AR5212
34016	PCI_DEVICE_ID_3COM_3CRDAG675	0x0013	ath5k.h	3CRDAG675 (Atheros AR5212)
34017	PCI_DEVICE_ID_3COM_2_3CRPAG175	0x0013	ath5k.h	3CRPAG175 (Atheros AR5212)
34018	PCI_DEVICE_ID_ATHEROS_AR5210_AP	0x0207	ath5k.h	AR5210 (Early)
34019	PCI_DEVICE_ID_ATHEROS_AR5212_IB	0x1014	ath5k.h	AR5212 (IBM MiniPCI)
34020	PCI_DEVICE_ID_ATHEROS_AR5210_DE	0x1107	ath5k.h	AR5210 (no eeprom)
34021	PCI_DEVICE_ID_ATHEROS_AR5212_DE	0x1113	ath5k.h	AR5212 (no eeprom)
34022	PCI_DEVICE_ID_ATHEROS_AR5211_DE	0x1112	ath5k.h	AR5211 (no eeprom)
34023	PCI_DEVICE_ID_ATHEROS_AR5212_FP	0xf013	ath5k.h	AR5212 (emulation board)
34024	PCI_DEVICE_ID_ATHEROS_AR5211_LE	0xff12	ath5k.h	AR5211 (emulation board)
34025	PCI_DEVICE_ID_ATHEROS_AR5211_FP	0xf11b	ath5k.h	AR5211 (emulation board)
34026	PCI_DEVICE_ID_ATHEROS_AR5312_RE	0x0052	ath5k.h	AR5312 WMAC (AP31)
34027	PCI_DEVICE_ID_ATHEROS_AR5312_RE	0x0057	ath5k.h	AR5312 WMAC (AP30-040)
34028	PCI_DEVICE_ID_ATHEROS_AR5312_RE	0x0058	ath5k.h	AR5312 WMAC (AP43-030)
34029	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0014	ath5k.h	AR5212 compatible
34030	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0015	ath5k.h	AR5212 compatible
34031	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0016	ath5k.h	AR5212 compatible
34032	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0017	ath5k.h	AR5212 compatible
34033	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0018	ath5k.h	AR5212 compatible
34034	PCI_DEVICE_ID_ATHEROS_AR5212_00	0x0019	ath5k.h	AR5212 compatible
34035	PCI_DEVICE_ID_ATHEROS_AR2413	0x001a	ath5k.h	AR2413 (Griffin-lite)
34036	PCI_DEVICE_ID_ATHEROS_AR5413	0x001b	ath5k.h	AR5413 (Eagle)
34037	PCI_DEVICE_ID_ATHEROS_AR5424	0x001c	ath5k.h	AR5424 (Condor PCI-E)
34038	PCI_DEVICE_ID_ATHEROS_AR5416	0x0023	ath5k.h	AR5416
34039	PCI_DEVICE_ID_ATHEROS_AR5418	0x0024	ath5k.h	AR5418
34040	AR5K_INI_RFGAIN_5GHZ	0	ath5k.h
34041	AR5K_INI_RFGAIN_2GHZ	1	ath5k.h
34042	AR5K_INI_VAL_11A	0	ath5k.h
34043	AR5K_INI_VAL_11A_TURBO	1	ath5k.h
34044	AR5K_INI_VAL_11B	2	ath5k.h
34045	AR5K_INI_VAL_11G	3	ath5k.h
34046	AR5K_INI_VAL_11G_TURBO	4	ath5k.h
34047	AR5K_INI_VAL_XR	0	ath5k.h
34048	AR5K_INI_VAL_MAX	5	ath5k.h
34049	IEEE80211_MAX_LEN	2352	ath5k.h
34050	AR5K_TUNE_DMA_BEACON_RESP	2	ath5k.h
34051	AR5K_TUNE_SW_BEACON_RESP	10	ath5k.h
34052	AR5K_TUNE_ADDITIONAL_SWBA_BACKO	0	ath5k.h
34053	AR5K_TUNE_RADAR_ALERT	0	ath5k.h
34054	AR5K_TUNE_MIN_TX_FIFO_THRES	1	ath5k.h
34055	AR5K_TUNE_MAX_TX_FIFO_THRES	((IEEE80211_MAX_LEN / 64) + 1)	ath5k.h
34056	AR5K_TUNE_REGISTER_TIMEOUT	20000	ath5k.h
34057	AR5K_TUNE_RSSI_THRES	129	ath5k.h
34058	AR5K_TUNE_BMISS_THRES	7	ath5k.h
34059	AR5K_TUNE_REGISTER_DWELL_TIME	20000	ath5k.h
34060	AR5K_TUNE_BEACON_INTERVAL	100	ath5k.h
34061	AR5K_TUNE_AIFS	2	ath5k.h
34062	AR5K_TUNE_AIFS_11B	2	ath5k.h
34063	AR5K_TUNE_AIFS_XR	0	ath5k.h
34064	AR5K_TUNE_CWMIN	15	ath5k.h
34065	AR5K_TUNE_CWMIN_11B	31	ath5k.h
34066	AR5K_TUNE_CWMIN_XR	3	ath5k.h
34067	AR5K_TUNE_CWMAX	1023	ath5k.h
34068	AR5K_TUNE_CWMAX_11B	1023	ath5k.h
34069	AR5K_TUNE_CWMAX_XR	7	ath5k.h
34070	AR5K_TUNE_NOISE_FLOOR	-72	ath5k.h
34071	AR5K_TUNE_MAX_TXPOWER	63	ath5k.h
34072	AR5K_TUNE_DEFAULT_TXPOWER	25	ath5k.h
34073	AR5K_TUNE_TPC_TXPOWER	0	ath5k.h
34074	AR5K_TUNE_ANT_DIVERSITY	1	ath5k.h
34075	AR5K_TUNE_HWTXTRIES	4	ath5k.h
34076	AR5K_INIT_CARR_SENSE_EN	1	ath5k.h
34077	AR5K_INIT_CFG	( \ AR5K_CFG_SWTD \| AR5K_CFG_SWRD \ )	ath5k.h
34078	AR5K_INIT_CFG	0x00000000	ath5k.h
34079	AR5K_INIT_CYCRSSI_THR1	2	ath5k.h
34080	AR5K_INIT_TX_LATENCY	502	ath5k.h
34081	AR5K_INIT_USEC	39	ath5k.h
34082	AR5K_INIT_USEC_TURBO	79	ath5k.h
34083	AR5K_INIT_USEC_32	31	ath5k.h
34084	AR5K_INIT_SLOT_TIME	396	ath5k.h
34085	AR5K_INIT_SLOT_TIME_TURBO	480	ath5k.h
34086	AR5K_INIT_ACK_CTS_TIMEOUT	1024	ath5k.h
34087	AR5K_INIT_ACK_CTS_TIMEOUT_TURBO	0x08000800	ath5k.h
34088	AR5K_INIT_PROG_IFS	920	ath5k.h
34089	AR5K_INIT_PROG_IFS_TURBO	960	ath5k.h
34090	AR5K_INIT_EIFS	3440	ath5k.h
34091	AR5K_INIT_EIFS_TURBO	6880	ath5k.h
34092	AR5K_INIT_SIFS	560	ath5k.h
34093	AR5K_INIT_SIFS_TURBO	480	ath5k.h
34094	AR5K_INIT_SH_RETRY	10	ath5k.h
34095	AR5K_INIT_LG_RETRY	AR5K_INIT_SH_RETRY	ath5k.h
34096	AR5K_INIT_SSH_RETRY	32	ath5k.h
34097	AR5K_INIT_SLG_RETRY	AR5K_INIT_SSH_RETRY	ath5k.h
34098	AR5K_INIT_TX_RETRY	10	ath5k.h
34099	AR5K_INIT_TRANSMIT_LATENCY	( \ (AR5K_INIT_TX_LATENCY << 14) \| (AR5K_INIT_USEC_32 << 7) \| \ (AR5K_INIT_USEC) \ )	ath5k.h
34100	AR5K_INIT_TRANSMIT_LATENCY_TURB	( \ (AR5K_INIT_TX_LATENCY << 14) \| (AR5K_INIT_USEC_32 << 7) \| \ (AR5K_INIT_USEC_TURBO) \ )	ath5k.h
34101	AR5K_INIT_PROTO_TIME_CNTRL	( \ (AR5K_INIT_CARR_SENSE_EN << 26) \| (AR5K_INIT_EIFS << 12) \| \ (AR5K_INIT_PROG_IFS) \ )	ath5k.h
34102	AR5K_INIT_PROTO_TIME_CNTRL_TURB	( \ (AR5K_INIT_CARR_SENSE_EN << 26) \| (AR5K_INIT_EIFS_TURBO << 12) \| \ (AR5K_INIT_PROG_IFS_TURBO) \ )	ath5k.h
34103	AR5K_TXQ_USEDEFAULT	((u32) -1)	ath5k.h
34104	AR5K_SREV_UNKNOWN	0xffff	ath5k.h
34105	AR5K_SREV_AR5210	0x00	ath5k.h	Crete
34106	AR5K_SREV_AR5311	0x10	ath5k.h	Maui 1
34107	AR5K_SREV_AR5311A	0x20	ath5k.h	Maui 2
34108	AR5K_SREV_AR5311B	0x30	ath5k.h	Spirit
34109	AR5K_SREV_AR5211	0x40	ath5k.h	Oahu
34110	AR5K_SREV_AR5212	0x50	ath5k.h	Venice
34111	AR5K_SREV_AR5213	0x55	ath5k.h	???
34112	AR5K_SREV_AR5213A	0x59	ath5k.h	Hainan
34113	AR5K_SREV_AR2413	0x78	ath5k.h	Griffin lite
34114	AR5K_SREV_AR2414	0x70	ath5k.h	Griffin
34115	AR5K_SREV_AR5424	0x90	ath5k.h	Condor
34116	AR5K_SREV_AR5413	0xa4	ath5k.h	Eagle lite
34117	AR5K_SREV_AR5414	0xa0	ath5k.h	Eagle
34118	AR5K_SREV_AR2415	0xb0	ath5k.h	Talon
34119	AR5K_SREV_AR5416	0xc0	ath5k.h	PCI-E
34120	AR5K_SREV_AR5418	0xca	ath5k.h	PCI-E
34121	AR5K_SREV_AR2425	0xe0	ath5k.h	Swan
34122	AR5K_SREV_AR2417	0xf0	ath5k.h	Nala
34123	AR5K_SREV_RAD_5110	0x00	ath5k.h
34124	AR5K_SREV_RAD_5111	0x10	ath5k.h
34125	AR5K_SREV_RAD_5111A	0x15	ath5k.h
34126	AR5K_SREV_RAD_2111	0x20	ath5k.h
34127	AR5K_SREV_RAD_5112	0x30	ath5k.h
34128	AR5K_SREV_RAD_5112A	0x35	ath5k.h
34129	AR5K_SREV_RAD_5112B	0x36	ath5k.h
34130	AR5K_SREV_RAD_2112	0x40	ath5k.h
34131	AR5K_SREV_RAD_2112A	0x45	ath5k.h
34132	AR5K_SREV_RAD_2112B	0x46	ath5k.h
34133	AR5K_SREV_RAD_2413	0x50	ath5k.h
34134	AR5K_SREV_RAD_5413	0x60	ath5k.h
34135	AR5K_SREV_RAD_2316	0x70	ath5k.h	Cobra SoC
34136	AR5K_SREV_RAD_2317	0x80	ath5k.h
34137	AR5K_SREV_RAD_5424	0xa0	ath5k.h	Mostly same as 5413
34138	AR5K_SREV_RAD_2425	0xa2	ath5k.h
34139	AR5K_SREV_RAD_5133	0xc0	ath5k.h
34140	AR5K_SREV_PHY_5211	0x30	ath5k.h
34141	AR5K_SREV_PHY_5212	0x41	ath5k.h
34142	AR5K_SREV_PHY_5212A	0x42	ath5k.h
34143	AR5K_SREV_PHY_5212B	0x43	ath5k.h
34144	AR5K_SREV_PHY_2413	0x45	ath5k.h
34145	AR5K_SREV_PHY_5413	0x61	ath5k.h
34146	AR5K_SREV_PHY_2425	0x70	ath5k.h
34147	MODULATION_XR	0x00000200	ath5k.h
34148	MODULATION_TURBO	0x00000080	ath5k.h
34149	AR5K_TXSTAT_ALTRATE	0x80	ath5k.h
34150	AR5K_TXERR_XRETRY	0x01	ath5k.h
34151	AR5K_TXERR_FILT	0x02	ath5k.h
34152	AR5K_TXERR_FIFO	0x04	ath5k.h
34153	AR5K_TXQ_FLAG_TXOKINT_ENABLE	0x0001	ath5k.h	Enable TXOK interrupt
34154	AR5K_TXQ_FLAG_TXERRINT_ENABLE	0x0002	ath5k.h	Enable TXERR interrupt
34155	AR5K_TXQ_FLAG_TXEOLINT_ENABLE	0x0004	ath5k.h	Enable TXEOL interrupt -not used-
34156	AR5K_TXQ_FLAG_TXDESCINT_ENABLE	0x0008	ath5k.h	Enable TXDESC interrupt -not used-
34157	AR5K_TXQ_FLAG_TXURNINT_ENABLE	0x0010	ath5k.h	Enable TXURN interrupt
34158	AR5K_TXQ_FLAG_CBRORNINT_ENABLE	0x0020	ath5k.h	Enable CBRORN interrupt
34159	AR5K_TXQ_FLAG_CBRURNINT_ENABLE	0x0040	ath5k.h	Enable CBRURN interrupt
34160	AR5K_TXQ_FLAG_QTRIGINT_ENABLE	0x0080	ath5k.h	Enable QTRIG interrupt
34161	AR5K_TXQ_FLAG_TXNOFRMINT_ENABLE	0x0100	ath5k.h	Enable TXNOFRM interrupt
34162	AR5K_TXQ_FLAG_BACKOFF_DISABLE	0x0200	ath5k.h	Disable random post-backoff
34163	AR5K_TXQ_FLAG_RDYTIME_EXP_POLIC	0x0300	ath5k.h	Enable ready time expiry policy (?)
34164	AR5K_TXQ_FLAG_FRAG_BURST_BACKOF	0x0800	ath5k.h	Enable backoff while bursting
34165	AR5K_TXQ_FLAG_POST_FR_BKOFF_DIS	0x1000	ath5k.h	Disable backoff while bursting
34166	AR5K_TXQ_FLAG_COMPRESSION_ENABL	0x2000	ath5k.h	Enable hw compression -not implemented-
34167	AR5K_RXERR_CRC	0x01	ath5k.h
34168	AR5K_RXERR_PHY	0x02	ath5k.h
34169	AR5K_RXERR_FIFO	0x04	ath5k.h
34170	AR5K_RXERR_DECRYPT	0x08	ath5k.h
34171	AR5K_RXERR_MIC	0x10	ath5k.h
34172	AR5K_RXKEYIX_INVALID	((u8) - 1)	ath5k.h
34173	AR5K_TXKEYIX_INVALID	((u32) - 1)	ath5k.h
34174	AR5K_SLOT_TIME_9	396	ath5k.h
34175	AR5K_SLOT_TIME_20	880	ath5k.h
34176	AR5K_SLOT_TIME_MAX	0xffff	ath5k.h
34177	CHANNEL_CW_INT	0x0008	ath5k.h	Contention Window interference detected
34178	CHANNEL_TURBO	0x0010	ath5k.h	Turbo Channel
34179	CHANNEL_CCK	0x0020	ath5k.h	CCK channel
34180	CHANNEL_OFDM	0x0040	ath5k.h	OFDM channel
34181	CHANNEL_2GHZ	0x0080	ath5k.h	2GHz channel.
34182	CHANNEL_5GHZ	0x0100	ath5k.h	5GHz channel
34183	CHANNEL_PASSIVE	0x0200	ath5k.h	Only passive scan allowed
34184	CHANNEL_DYN	0x0400	ath5k.h	Dynamic CCK-OFDM channel (for g operation)
34185	CHANNEL_XR	0x0800	ath5k.h	XR channel
34186	CHANNEL_A	(CHANNEL_5GHZ\|CHANNEL_OFDM)	ath5k.h
34187	CHANNEL_B	(CHANNEL_2GHZ\|CHANNEL_CCK)	ath5k.h
34188	CHANNEL_G	(CHANNEL_2GHZ\|CHANNEL_OFDM)	ath5k.h
34189	CHANNEL_T	(CHANNEL_5GHZ\|CHANNEL_OFDM\|CHANNEL_TURBO)	ath5k.h
34190	CHANNEL_TG	(CHANNEL_2GHZ\|CHANNEL_OFDM\|CHANNEL_TURBO)	ath5k.h
34191	CHANNEL_108A	CHANNEL_T	ath5k.h
34192	CHANNEL_108G	CHANNEL_TG	ath5k.h
34193	CHANNEL_X	(CHANNEL_5GHZ\|CHANNEL_OFDM\|CHANNEL_XR)	ath5k.h
34194	CHANNEL_ALL	(CHANNEL_OFDM\|CHANNEL_CCK\|CHANNEL_2GHZ\|CHANNEL_5GHZ\| \ CHANNEL_TURBO)	ath5k.h
34195	CHANNEL_ALL_NOTURBO	(CHANNEL_ALL & ~CHANNEL_TURBO)	ath5k.h
34196	CHANNEL_MODES	CHANNEL_ALL	ath5k.h
34197	AR5K_MAX_RATES	32	ath5k.h
34198	ATH5K_RATE_CODE_1M	0x1B	ath5k.h
34199	ATH5K_RATE_CODE_2M	0x1A	ath5k.h
34200	ATH5K_RATE_CODE_5_5M	0x19	ath5k.h
34201	ATH5K_RATE_CODE_11M	0x18	ath5k.h
34202	ATH5K_RATE_CODE_6M	0x0B	ath5k.h
34203	ATH5K_RATE_CODE_9M	0x0F	ath5k.h
34204	ATH5K_RATE_CODE_12M	0x0A	ath5k.h
34205	ATH5K_RATE_CODE_18M	0x0E	ath5k.h
34206	ATH5K_RATE_CODE_24M	0x09	ath5k.h
34207	ATH5K_RATE_CODE_36M	0x0D	ath5k.h
34208	ATH5K_RATE_CODE_48M	0x08	ath5k.h
34209	ATH5K_RATE_CODE_54M	0x0C	ath5k.h
34210	ATH5K_RATE_CODE_XR_500K	0x07	ath5k.h
34211	ATH5K_RATE_CODE_XR_1M	0x02	ath5k.h
34212	ATH5K_RATE_CODE_XR_2M	0x06	ath5k.h
34213	ATH5K_RATE_CODE_XR_3M	0x01	ath5k.h
34214	AR5K_SET_SHORT_PREAMBLE	0x04	ath5k.h
34215	AR5K_KEYCACHE_SIZE	8	ath5k.h
34216	AR5K_RSSI_EP_MULTIPLIER	(1<<7)	ath5k.h
34217	AR5K_SOFTLED_PIN	0	ath5k.h
34218	AR5K_SOFTLED_ON	0	ath5k.h
34219	AR5K_SOFTLED_OFF	1	ath5k.h
34220	AR5K_MAX_GPIO	10	ath5k.h
34221	AR5K_MAX_RF_BANKS	8	ath5k.h
34222	ATH_RXBUF	16	base.h	number of RX buffers
34223	ATH_TXBUF	16	base.h	number of TX buffers
34224	ATH_CHAN_MAX	(26+26+26+200+200)	base.h
34225	ATH_CHAN_MAX	(14+14+14+252+20)	base.h
34226	AR5K_DESC_RX_CTL0	0x00000000	desc.h
34227	AR5K_DESC_RX_CTL1_BUF_LEN	0x00000fff	desc.h
34228	AR5K_DESC_RX_CTL1_INTREQ	0x00002000	desc.h
34229	AR5K_5210_RX_DESC_STATUS0_DATA_	0x00000fff	desc.h
34230	AR5K_5210_RX_DESC_STATUS0_MORE	0x00001000	desc.h
34231	AR5K_5210_RX_DESC_STATUS0_RECEI	0x00078000	desc.h
34232	AR5K_5210_RX_DESC_STATUS0_RECEI	15	desc.h
34233	AR5K_5210_RX_DESC_STATUS0_RECEI	0x07f80000	desc.h
34234	AR5K_5210_RX_DESC_STATUS0_RECEI	19	desc.h
34235	AR5K_5210_RX_DESC_STATUS0_RECEI	0x38000000	desc.h
34236	AR5K_5210_RX_DESC_STATUS0_RECEI	27	desc.h
34237	AR5K_5210_RX_DESC_STATUS1_DONE	0x00000001	desc.h
34238	AR5K_5210_RX_DESC_STATUS1_FRAME	0x00000002	desc.h
34239	AR5K_5210_RX_DESC_STATUS1_CRC_E	0x00000004	desc.h
34240	AR5K_5210_RX_DESC_STATUS1_FIFO_	0x00000008	desc.h
34241	AR5K_5210_RX_DESC_STATUS1_DECRY	0x00000010	desc.h
34242	AR5K_5210_RX_DESC_STATUS1_PHY_E	0x000000e0	desc.h
34243	AR5K_5210_RX_DESC_STATUS1_PHY_E	5	desc.h
34244	AR5K_5210_RX_DESC_STATUS1_KEY_I	0x00000100	desc.h
34245	AR5K_5210_RX_DESC_STATUS1_KEY_I	0x00007e00	desc.h
34246	AR5K_5210_RX_DESC_STATUS1_KEY_I	9	desc.h
34247	AR5K_5210_RX_DESC_STATUS1_RECEI	0x0fff8000	desc.h
34248	AR5K_5210_RX_DESC_STATUS1_RECEI	15	desc.h
34249	AR5K_5210_RX_DESC_STATUS1_KEY_C	0x10000000	desc.h
34250	AR5K_5212_RX_DESC_STATUS0_DATA_	0x00000fff	desc.h
34251	AR5K_5212_RX_DESC_STATUS0_MORE	0x00001000	desc.h
34252	AR5K_5212_RX_DESC_STATUS0_DECOM	0x00002000	desc.h
34253	AR5K_5212_RX_DESC_STATUS0_RECEI	0x000f8000	desc.h
34254	AR5K_5212_RX_DESC_STATUS0_RECEI	15	desc.h
34255	AR5K_5212_RX_DESC_STATUS0_RECEI	0x0ff00000	desc.h
34256	AR5K_5212_RX_DESC_STATUS0_RECEI	20	desc.h
34257	AR5K_5212_RX_DESC_STATUS0_RECEI	0xf0000000	desc.h
34258	AR5K_5212_RX_DESC_STATUS0_RECEI	28	desc.h
34259	AR5K_5212_RX_DESC_STATUS1_DONE	0x00000001	desc.h
34260	AR5K_5212_RX_DESC_STATUS1_FRAME	0x00000002	desc.h
34261	AR5K_5212_RX_DESC_STATUS1_CRC_E	0x00000004	desc.h
34262	AR5K_5212_RX_DESC_STATUS1_DECRY	0x00000008	desc.h
34263	AR5K_5212_RX_DESC_STATUS1_PHY_E	0x00000010	desc.h
34264	AR5K_5212_RX_DESC_STATUS1_MIC_E	0x00000020	desc.h
34265	AR5K_5212_RX_DESC_STATUS1_KEY_I	0x00000100	desc.h
34266	AR5K_5212_RX_DESC_STATUS1_KEY_I	0x0000fe00	desc.h
34267	AR5K_5212_RX_DESC_STATUS1_KEY_I	9	desc.h
34268	AR5K_5212_RX_DESC_STATUS1_RECEI	0x7fff0000	desc.h
34269	AR5K_5212_RX_DESC_STATUS1_RECEI	16	desc.h
34270	AR5K_5212_RX_DESC_STATUS1_KEY_C	0x80000000	desc.h
34271	AR5K_RX_DESC_ERROR0	0x00000000	desc.h
34272	AR5K_RX_DESC_ERROR1_PHY_ERROR_C	0x0000ff00	desc.h
34273	AR5K_RX_DESC_ERROR1_PHY_ERROR_C	8	desc.h
34274	AR5K_DESC_RX_PHY_ERROR_NONE	0x00	desc.h
34275	AR5K_DESC_RX_PHY_ERROR_TIMING	0x20	desc.h
34276	AR5K_DESC_RX_PHY_ERROR_PARITY	0x40	desc.h
34277	AR5K_DESC_RX_PHY_ERROR_RATE	0x60	desc.h
34278	AR5K_DESC_RX_PHY_ERROR_LENGTH	0x80	desc.h
34279	AR5K_DESC_RX_PHY_ERROR_64QAM	0xa0	desc.h
34280	AR5K_DESC_RX_PHY_ERROR_SERVICE	0xc0	desc.h
34281	AR5K_DESC_RX_PHY_ERROR_TRANSMIT	0xe0	desc.h
34282	AR5K_2W_TX_DESC_CTL0_FRAME_LEN	0x00000fff	desc.h
34283	AR5K_2W_TX_DESC_CTL0_HEADER_LEN	0x0003f000	desc.h	[5210 ?]
34284	AR5K_2W_TX_DESC_CTL0_HEADER_LEN	12	desc.h
34285	AR5K_2W_TX_DESC_CTL0_XMIT_RATE	0x003c0000	desc.h
34286	AR5K_2W_TX_DESC_CTL0_XMIT_RATE_	18	desc.h
34287	AR5K_2W_TX_DESC_CTL0_RTSENA	0x00400000	desc.h
34288	AR5K_2W_TX_DESC_CTL0_CLRDMASK	0x01000000	desc.h
34289	AR5K_2W_TX_DESC_CTL0_LONG_PACKE	0x00800000	desc.h	[5210]
34290	AR5K_2W_TX_DESC_CTL0_VEOL	0x00800000	desc.h	[5211]
34291	AR5K_2W_TX_DESC_CTL0_FRAME_TYPE	0x1c000000	desc.h	[5210]
34292	AR5K_2W_TX_DESC_CTL0_FRAME_TYPE	26	desc.h
34293	AR5K_2W_TX_DESC_CTL0_ANT_MODE_X	0x02000000	desc.h
34294	AR5K_2W_TX_DESC_CTL0_ANT_MODE_X	0x1e000000	desc.h
34295	AR5K_2W_TX_DESC_CTL0_ANT_MODE_X	(ah->ah_version == AR5K_AR5210 ? \ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210 : \ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211)	desc.h
34296	AR5K_2W_TX_DESC_CTL0_ANT_MODE_X	25	desc.h
34297	AR5K_2W_TX_DESC_CTL0_INTREQ	0x20000000	desc.h
34298	AR5K_2W_TX_DESC_CTL0_ENCRYPT_KE	0x40000000	desc.h
34299	AR5K_2W_TX_DESC_CTL1_BUF_LEN	0x00000fff	desc.h
34300	AR5K_2W_TX_DESC_CTL1_MORE	0x00001000	desc.h
34301	AR5K_2W_TX_DESC_CTL1_ENCRYPT_KE	0x0007e000	desc.h
34302	AR5K_2W_TX_DESC_CTL1_ENCRYPT_KE	0x000fe000	desc.h
34303	AR5K_2W_TX_DESC_CTL1_ENCRYPT_KE	(ah->ah_version == AR5K_AR5210 ? \ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210 : \ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_52	desc.h
34304	AR5K_2W_TX_DESC_CTL1_ENCRYPT_KE	13	desc.h
34305	AR5K_2W_TX_DESC_CTL1_FRAME_TYPE	0x00700000	desc.h	[5211]
34306	AR5K_2W_TX_DESC_CTL1_FRAME_TYPE	20	desc.h
34307	AR5K_2W_TX_DESC_CTL1_NOACK	0x00800000	desc.h	[5211]
34308	AR5K_2W_TX_DESC_CTL1_RTS_DURATI	0xfff80000	desc.h	[5210 ?]
34309	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x00	desc.h
34310	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x04	desc.h
34311	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x08	desc.h
34312	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x0c	desc.h
34313	AR5K_AR5210_TX_DESC_FRAME_TYPE_	0x10	desc.h
34314	AR5K_DESC_TX_STATUS0_FRAME_XMIT	0x00000001	desc.h
34315	AR5K_DESC_TX_STATUS0_EXCESSIVE_	0x00000002	desc.h
34316	AR5K_DESC_TX_STATUS0_FIFO_UNDER	0x00000004	desc.h
34317	AR5K_DESC_TX_STATUS0_FILTERED	0x00000008	desc.h
34318	AR5K_DESC_TX_STATUS0_SHORT_RETR	0x000000f0	desc.h
34319	AR5K_DESC_TX_STATUS0_SHORT_RETR	4	desc.h
34320	AR5K_DESC_TX_STATUS0_LONG_RETRY	0x00000f00	desc.h
34321	AR5K_DESC_TX_STATUS0_LONG_RETRY	8	desc.h
34322	AR5K_DESC_TX_STATUS0_VIRT_COLL_	0x0000f000	desc.h
34323	AR5K_DESC_TX_STATUS0_VIRT_COLL_	12	desc.h
34324	AR5K_DESC_TX_STATUS0_SEND_TIMES	0xffff0000	desc.h
34325	AR5K_DESC_TX_STATUS0_SEND_TIMES	16	desc.h
34326	AR5K_DESC_TX_STATUS1_DONE	0x00000001	desc.h
34327	AR5K_DESC_TX_STATUS1_SEQ_NUM	0x00001ffe	desc.h
34328	AR5K_DESC_TX_STATUS1_SEQ_NUM_S	1	desc.h
34329	AR5K_DESC_TX_STATUS1_ACK_SIG_ST	0x001fe000	desc.h
34330	AR5K_DESC_TX_STATUS1_ACK_SIG_ST	13	desc.h
34331	AR5K_DESC_TX_STATUS1_FINAL_TS_I	0x00600000	desc.h
34332	AR5K_DESC_TX_STATUS1_FINAL_TS_I	21	desc.h
34333	AR5K_DESC_TX_STATUS1_COMP_SUCCE	0x00800000	desc.h
34334	AR5K_DESC_TX_STATUS1_XMIT_ANTEN	0x01000000	desc.h
34335	AR5K_RXDESC_INTREQ	0x0020	desc.h
34336	AR5K_TXDESC_CLRDMASK	0x0001	desc.h
34337	AR5K_TXDESC_NOACK	0x0002	desc.h	[5211+]
34338	AR5K_TXDESC_RTSENA	0x0004	desc.h
34339	AR5K_TXDESC_CTSENA	0x0008	desc.h
34340	AR5K_TXDESC_INTREQ	0x0010	desc.h
34341	AR5K_TXDESC_VEOL	0x0020	desc.h	[5211+]
34342	AR5K_EEPROM_MAGIC	0x003d	eeprom.h	EEPROM Magic number
34343	AR5K_EEPROM_MAGIC_VALUE	0x5aa5	eeprom.h	Default - found on EEPROM
34344	AR5K_EEPROM_MAGIC_5212	0x0000145c	eeprom.h	5212
34345	AR5K_EEPROM_MAGIC_5211	0x0000145b	eeprom.h	5211
34346	AR5K_EEPROM_MAGIC_5210	0x0000145a	eeprom.h	5210
34347	AR5K_EEPROM_IS_HB63	0x000b	eeprom.h	Talon detect
34348	AR5K_EEPROM_RFKILL	0x0f	eeprom.h
34349	AR5K_EEPROM_RFKILL_GPIO_SEL	0x0000001c	eeprom.h
34350	AR5K_EEPROM_RFKILL_GPIO_SEL_S	2	eeprom.h
34351	AR5K_EEPROM_RFKILL_POLARITY	0x00000002	eeprom.h
34352	AR5K_EEPROM_RFKILL_POLARITY_S	1	eeprom.h
34353	AR5K_EEPROM_REG_DOMAIN	0x00bf	eeprom.h	EEPROM regdom
34354	AR5K_EEPROM_CHECKSUM	0x00c0	eeprom.h	EEPROM checksum
34355	AR5K_EEPROM_INFO_BASE	0x00c0	eeprom.h	EEPROM header
34356	AR5K_EEPROM_INFO_MAX	(0x400 - AR5K_EEPROM_INFO_BASE)	eeprom.h
34357	AR5K_EEPROM_INFO_CKSUM	0xffff	eeprom.h
34358	AR5K_EEPROM_VERSION	AR5K_EEPROM_INFO(1)	eeprom.h	EEPROM Version
34359	AR5K_EEPROM_VERSION_3_0	0x3000	eeprom.h	No idea what's going on before this version
34360	AR5K_EEPROM_VERSION_3_1	0x3001	eeprom.h	ob/db values for 2Ghz (ar5211_rfregs)
34361	AR5K_EEPROM_VERSION_3_2	0x3002	eeprom.h	different frequency representation (eeprom_bin2freq)
34362	AR5K_EEPROM_VERSION_3_3	0x3003	eeprom.h	offsets changed, has 32 CTLs (see below) and ee_false_detect (eeprom_read_modes)
34363	AR5K_EEPROM_VERSION_3_4	0x3004	eeprom.h	has ee_i_gain, ee_cck_ofdm_power_delta (eeprom_read_modes)
34364	AR5K_EEPROM_VERSION_4_0	0x4000	eeprom.h	has ee_misc, ee_cal_pier, ee_turbo_max_power and ee_xr_power (eeprom_init)
34365	AR5K_EEPROM_VERSION_4_1	0x4001	eeprom.h	has ee_margin_tx_rx (eeprom_init)
34366	AR5K_EEPROM_VERSION_4_2	0x4002	eeprom.h	has ee_cck_ofdm_gain_delta (eeprom_init)
34367	AR5K_EEPROM_VERSION_4_3	0x4003	eeprom.h	power calibration changes
34368	AR5K_EEPROM_VERSION_4_4	0x4004	eeprom.h
34369	AR5K_EEPROM_VERSION_4_5	0x4005	eeprom.h
34370	AR5K_EEPROM_VERSION_4_6	0x4006	eeprom.h	has ee_scaled_cck_delta
34371	AR5K_EEPROM_VERSION_4_7	0x3007	eeprom.h	4007 ?
34372	AR5K_EEPROM_VERSION_4_9	0x4009	eeprom.h	EAR futureproofing
34373	AR5K_EEPROM_VERSION_5_0	0x5000	eeprom.h	Has 2413 PDADC calibration etc
34374	AR5K_EEPROM_VERSION_5_1	0x5001	eeprom.h	Has capability values
34375	AR5K_EEPROM_VERSION_5_3	0x5003	eeprom.h	Has spur mitigation tables
34376	AR5K_EEPROM_MODE_11A	0	eeprom.h
34377	AR5K_EEPROM_MODE_11B	1	eeprom.h
34378	AR5K_EEPROM_MODE_11G	2	eeprom.h
34379	AR5K_EEPROM_HDR	AR5K_EEPROM_INFO(2)	eeprom.h	Header that contains the device caps
34380	AR5K_EEPROM_RFKILL_GPIO_SEL	0x0000001c	eeprom.h
34381	AR5K_EEPROM_RFKILL_GPIO_SEL_S	2	eeprom.h
34382	AR5K_EEPROM_RFKILL_POLARITY	0x00000002	eeprom.h
34383	AR5K_EEPROM_RFKILL_POLARITY_S	1	eeprom.h
34384	AR5K_EEPROM_MISC0	AR5K_EEPROM_INFO(4)	eeprom.h
34385	AR5K_EEPROM_MISC1	AR5K_EEPROM_INFO(5)	eeprom.h
34386	AR5K_EEPROM_MISC2	AR5K_EEPROM_INFO(6)	eeprom.h
34387	AR5K_EEPROM_MISC3	AR5K_EEPROM_INFO(7)	eeprom.h
34388	AR5K_EEPROM_MISC4	AR5K_EEPROM_INFO(8)	eeprom.h
34389	AR5K_EEPROM_MISC5	AR5K_EEPROM_INFO(9)	eeprom.h
34390	AR5K_EEPROM_MISC6	AR5K_EEPROM_INFO(10)	eeprom.h
34391	AR5K_EEPROM_TX_CHAIN_DIS	((_v) & 0x8)	eeprom.h
34392	AR5K_EEPROM_RX_CHAIN_DIS	(((_v) >> 3) & 0x8)	eeprom.h
34393	AR5K_EEPROM_FCC_MID_EN	(((_v) >> 6) & 0x1)	eeprom.h
34394	AR5K_EEPROM_JAP_U1EVEN_EN	(((_v) >> 7) & 0x1)	eeprom.h
34395	AR5K_EEPROM_JAP_U2_EN	(((_v) >> 8) & 0x1)	eeprom.h
34396	AR5K_EEPROM_JAP_U1ODD_EN	(((_v) >> 9) & 0x1)	eeprom.h
34397	AR5K_EEPROM_JAP_11A_NEW_EN	(((_v) >> 10) & 0x1)	eeprom.h
34398	AR5K_EEPROM_GROUP1_OFFSET	0x0	eeprom.h
34399	AR5K_EEPROM_GROUP2_OFFSET	0x5	eeprom.h
34400	AR5K_EEPROM_GROUP3_OFFSET	0x37	eeprom.h
34401	AR5K_EEPROM_GROUP4_OFFSET	0x46	eeprom.h
34402	AR5K_EEPROM_GROUP5_OFFSET	0x55	eeprom.h
34403	AR5K_EEPROM_GROUP6_OFFSET	0x65	eeprom.h
34404	AR5K_EEPROM_GROUP7_OFFSET	0x69	eeprom.h
34405	AR5K_EEPROM_GROUP8_OFFSET	0x6f	eeprom.h
34406	AR5K_EEPROM_OBDB0_2GHZ	0x00ec	eeprom.h
34407	AR5K_EEPROM_OBDB1_2GHZ	0x00ed	eeprom.h
34408	AR5K_EEPROM_PROTECT	0x003f	eeprom.h	EEPROM protect status
34409	AR5K_EEPROM_PROTECT_RD_0_31	0x0001	eeprom.h	Read protection bit for offsets 0x0 - 0x1f
34410	AR5K_EEPROM_PROTECT_WR_0_31	0x0002	eeprom.h	Write protection bit for offsets 0x0 - 0x1f
34411	AR5K_EEPROM_PROTECT_RD_32_63	0x0004	eeprom.h	0x20 - 0x3f
34412	AR5K_EEPROM_PROTECT_WR_32_63	0x0008	eeprom.h
34413	AR5K_EEPROM_PROTECT_RD_64_127	0x0010	eeprom.h	0x40 - 0x7f
34414	AR5K_EEPROM_PROTECT_WR_64_127	0x0020	eeprom.h
34415	AR5K_EEPROM_PROTECT_RD_128_191	0x0040	eeprom.h	0x80 - 0xbf (regdom)
34416	AR5K_EEPROM_PROTECT_WR_128_191	0x0080	eeprom.h
34417	AR5K_EEPROM_PROTECT_RD_192_207	0x0100	eeprom.h	0xc0 - 0xcf
34418	AR5K_EEPROM_PROTECT_WR_192_207	0x0200	eeprom.h
34419	AR5K_EEPROM_PROTECT_RD_208_223	0x0400	eeprom.h	0xd0 - 0xdf
34420	AR5K_EEPROM_PROTECT_WR_208_223	0x0800	eeprom.h
34421	AR5K_EEPROM_PROTECT_RD_224_239	0x1000	eeprom.h	0xe0 - 0xef
34422	AR5K_EEPROM_PROTECT_WR_224_239	0x2000	eeprom.h
34423	AR5K_EEPROM_PROTECT_RD_240_255	0x4000	eeprom.h	0xf0 - 0xff
34424	AR5K_EEPROM_PROTECT_WR_240_255	0x8000	eeprom.h
34425	AR5K_EEPROM_EEP_SCALE	100	eeprom.h
34426	AR5K_EEPROM_EEP_DELTA	10	eeprom.h
34427	AR5K_EEPROM_N_MODES	3	eeprom.h
34428	AR5K_EEPROM_N_5GHZ_CHAN	10	eeprom.h
34429	AR5K_EEPROM_N_2GHZ_CHAN	3	eeprom.h
34430	AR5K_EEPROM_N_2GHZ_CHAN_2413	4	eeprom.h
34431	AR5K_EEPROM_N_2GHZ_CHAN_MAX	4	eeprom.h
34432	AR5K_EEPROM_MAX_CHAN	10	eeprom.h
34433	AR5K_EEPROM_N_PWR_POINTS_5111	11	eeprom.h
34434	AR5K_EEPROM_N_PCDAC	11	eeprom.h
34435	AR5K_EEPROM_N_PHASE_CAL	5	eeprom.h
34436	AR5K_EEPROM_N_TEST_FREQ	8	eeprom.h
34437	AR5K_EEPROM_N_EDGES	8	eeprom.h
34438	AR5K_EEPROM_N_INTERCEPTS	11	eeprom.h
34439	AR5K_EEPROM_PCDAC_M	0x3f	eeprom.h
34440	AR5K_EEPROM_PCDAC_START	1	eeprom.h
34441	AR5K_EEPROM_PCDAC_STOP	63	eeprom.h
34442	AR5K_EEPROM_PCDAC_STEP	1	eeprom.h
34443	AR5K_EEPROM_NON_EDGE_M	0x40	eeprom.h
34444	AR5K_EEPROM_CHANNEL_POWER	8	eeprom.h
34445	AR5K_EEPROM_N_OBDB	4	eeprom.h
34446	AR5K_EEPROM_OBDB_DIS	0xffff	eeprom.h
34447	AR5K_EEPROM_CHANNEL_DIS	0xff	eeprom.h
34448	AR5K_EEPROM_MAX_CTLS	32	eeprom.h
34449	AR5K_EEPROM_N_PD_CURVES	4	eeprom.h
34450	AR5K_EEPROM_N_XPD0_POINTS	4	eeprom.h
34451	AR5K_EEPROM_N_XPD3_POINTS	3	eeprom.h
34452	AR5K_EEPROM_N_PD_GAINS	4	eeprom.h
34453	AR5K_EEPROM_N_PD_POINTS	5	eeprom.h
34454	AR5K_EEPROM_N_INTERCEPT_10_2GHZ	35	eeprom.h
34455	AR5K_EEPROM_N_INTERCEPT_10_5GHZ	55	eeprom.h
34456	AR5K_EEPROM_POWER_M	0x3f	eeprom.h
34457	AR5K_EEPROM_POWER_MIN	0	eeprom.h
34458	AR5K_EEPROM_POWER_MAX	3150	eeprom.h
34459	AR5K_EEPROM_POWER_STEP	50	eeprom.h
34460	AR5K_EEPROM_POWER_TABLE_SIZE	64	eeprom.h
34461	AR5K_EEPROM_N_POWER_LOC_11B	4	eeprom.h
34462	AR5K_EEPROM_N_POWER_LOC_11G	6	eeprom.h
34463	AR5K_EEPROM_I_GAIN	10	eeprom.h
34464	AR5K_EEPROM_CCK_OFDM_DELTA	15	eeprom.h
34465	AR5K_EEPROM_N_IQ_CAL	2	eeprom.h
34466	AR5K_CTL_FCC	0x10	eeprom.h
34467	AR5K_CTL_CUSTOM	0x20	eeprom.h
34468	AR5K_CTL_ETSI	0x30	eeprom.h
34469	AR5K_CTL_MKK	0x40	eeprom.h
34470	AR5K_CTL_NO_REGDOMAIN	0xf0	eeprom.h
34471	AR5K_CTL_NO_CTL	0xff	eeprom.h
34472	AR5K_NOQCU_TXDP0	0x0000	reg.h	Queue 0 - data
34473	AR5K_NOQCU_TXDP1	0x0004	reg.h	Queue 1 - beacons
34474	AR5K_CR	0x0008	reg.h	Register Address
34475	AR5K_CR_TXE0	0x00000001	reg.h	TX Enable for queue 0 on 5210
34476	AR5K_CR_TXE1	0x00000002	reg.h	TX Enable for queue 1 on 5210
34477	AR5K_CR_RXE	0x00000004	reg.h	RX Enable
34478	AR5K_CR_TXD0	0x00000008	reg.h	TX Disable for queue 0 on 5210
34479	AR5K_CR_TXD1	0x00000010	reg.h	TX Disable for queue 1 on 5210
34480	AR5K_CR_RXD	0x00000020	reg.h	RX Disable
34481	AR5K_CR_SWI	0x00000040	reg.h	Software Interrupt
34482	AR5K_RXDP	0x000c	reg.h
34483	AR5K_CFG	0x0014	reg.h	Register Address
34484	AR5K_CFG_SWTD	0x00000001	reg.h	Byte-swap TX descriptor (for big endian archs)
34485	AR5K_CFG_SWTB	0x00000002	reg.h	Byte-swap TX buffer
34486	AR5K_CFG_SWRD	0x00000004	reg.h	Byte-swap RX descriptor
34487	AR5K_CFG_SWRB	0x00000008	reg.h	Byte-swap RX buffer
34488	AR5K_CFG_SWRG	0x00000010	reg.h	Byte-swap Register access
34489	AR5K_CFG_IBSS	0x00000020	reg.h	0-BSS, 1-IBSS [5211+]
34490	AR5K_CFG_PHY_OK	0x00000100	reg.h	[5211+]
34491	AR5K_CFG_EEBS	0x00000200	reg.h	EEPROM is busy
34492	AR5K_CFG_CLKGD	0x00000400	reg.h	Clock gated (Disable dynamic clock)
34493	AR5K_CFG_TXCNT	0x00007800	reg.h	Tx frame count (?) [5210]
34494	AR5K_CFG_TXCNT_S	11	reg.h
34495	AR5K_CFG_TXFSTAT	0x00008000	reg.h	Tx frame status (?) [5210]
34496	AR5K_CFG_TXFSTRT	0x00010000	reg.h	[5210]
34497	AR5K_CFG_PCI_THRES	0x00060000	reg.h	PCI Master req q threshold [5211+]
34498	AR5K_CFG_PCI_THRES_S	17	reg.h
34499	AR5K_IER	0x0024	reg.h	Register Address
34500	AR5K_IER_DISABLE	0x00000000	reg.h	Disable card interrupts
34501	AR5K_IER_ENABLE	0x00000001	reg.h	Enable card interrupts
34502	AR5K_BCR	0x0028	reg.h	Register Address
34503	AR5K_BCR_AP	0x00000000	reg.h	AP mode
34504	AR5K_BCR_ADHOC	0x00000001	reg.h	Ad-Hoc mode
34505	AR5K_BCR_BDMAE	0x00000002	reg.h	DMA enable
34506	AR5K_BCR_TQ1FV	0x00000004	reg.h	Use Queue1 for CAB traffic
34507	AR5K_BCR_TQ1V	0x00000008	reg.h	Use Queue1 for Beacon traffic
34508	AR5K_BCR_BCGET	0x00000010	reg.h
34509	AR5K_RTSD0	0x0028	reg.h	Register Address
34510	AR5K_RTSD0_6	0x000000ff	reg.h	6Mb RTS duration mask (?)
34511	AR5K_RTSD0_6_S	0	reg.h	6Mb RTS duration shift (?)
34512	AR5K_RTSD0_9	0x0000ff00	reg.h	9Mb
34513	AR5K_RTSD0_9_S	8	reg.h
34514	AR5K_RTSD0_12	0x00ff0000	reg.h	12Mb
34515	AR5K_RTSD0_12_S	16	reg.h
34516	AR5K_RTSD0_18	0xff000000	reg.h	16Mb
34517	AR5K_RTSD0_18_S	24	reg.h
34518	AR5K_BSR	0x002c	reg.h	Register Address
34519	AR5K_BSR_BDLYSW	0x00000001	reg.h	SW Beacon delay (?)
34520	AR5K_BSR_BDLYDMA	0x00000002	reg.h	DMA Beacon delay (?)
34521	AR5K_BSR_TXQ1F	0x00000004	reg.h	Beacon queue (1) finished
34522	AR5K_BSR_ATIMDLY	0x00000008	reg.h	ATIM delay (?)
34523	AR5K_BSR_SNPADHOC	0x00000100	reg.h	Ad-hoc mode set (?)
34524	AR5K_BSR_SNPBDMAE	0x00000200	reg.h	Beacon DMA enabled (?)
34525	AR5K_BSR_SNPTQ1FV	0x00000400	reg.h	Queue1 is used for CAB traffic (?)
34526	AR5K_BSR_SNPTQ1V	0x00000800	reg.h	Queue1 is used for Beacon traffic (?)
34527	AR5K_BSR_SNAPSHOTSVALID	0x00001000	reg.h	BCR snapshots are valid (?)
34528	AR5K_BSR_SWBA_CNT	0x00ff0000	reg.h
34529	AR5K_RTSD1	0x002c	reg.h	Register Address
34530	AR5K_RTSD1_24	0x000000ff	reg.h	24Mb
34531	AR5K_RTSD1_24_S	0	reg.h
34532	AR5K_RTSD1_36	0x0000ff00	reg.h	36Mb
34533	AR5K_RTSD1_36_S	8	reg.h
34534	AR5K_RTSD1_48	0x00ff0000	reg.h	48Mb
34535	AR5K_RTSD1_48_S	16	reg.h
34536	AR5K_RTSD1_54	0xff000000	reg.h	54Mb
34537	AR5K_RTSD1_54_S	24	reg.h
34538	AR5K_TXCFG	0x0030	reg.h	Register Address
34539	AR5K_TXCFG_SDMAMR	0x00000007	reg.h	DMA size (read)
34540	AR5K_TXCFG_SDMAMR_S	0	reg.h
34541	AR5K_TXCFG_B_MODE	0x00000008	reg.h	Set b mode for 5111 (enable 2111)
34542	AR5K_TXCFG_TXFSTP	0x00000008	reg.h	TX DMA full Stop [5210]
34543	AR5K_TXCFG_TXFULL	0x000003f0	reg.h	TX Triger level mask
34544	AR5K_TXCFG_TXFULL_S	4	reg.h
34545	AR5K_TXCFG_TXFULL_0B	0x00000000	reg.h
34546	AR5K_TXCFG_TXFULL_64B	0x00000010	reg.h
34547	AR5K_TXCFG_TXFULL_128B	0x00000020	reg.h
34548	AR5K_TXCFG_TXFULL_192B	0x00000030	reg.h
34549	AR5K_TXCFG_TXFULL_256B	0x00000040	reg.h
34550	AR5K_TXCFG_TXCONT_EN	0x00000080	reg.h
34551	AR5K_TXCFG_DMASIZE	0x00000100	reg.h	Flag for passing DMA size [5210]
34552	AR5K_TXCFG_JUMBO_DESC_EN	0x00000400	reg.h	Enable jumbo tx descriptors [5211+]
34553	AR5K_TXCFG_ADHOC_BCN_ATIM	0x00000800	reg.h	Adhoc Beacon ATIM Policy
34554	AR5K_TXCFG_ATIM_WINDOW_DEF_DIS	0x00001000	reg.h	Disable ATIM window defer [5211+]
34555	AR5K_TXCFG_RTSRND	0x00001000	reg.h	[5211+]
34556	AR5K_TXCFG_FRMPAD_DIS	0x00002000	reg.h	[5211+]
34557	AR5K_TXCFG_RDY_CBR_DIS	0x00004000	reg.h	Ready time CBR disable [5211+]
34558	AR5K_TXCFG_JUMBO_FRM_MODE	0x00008000	reg.h	Jumbo frame mode [5211+]
34559	AR5K_TXCFG_DCU_DBL_BUF_DIS	0x00008000	reg.h	Disable double buffering on DCU
34560	AR5K_TXCFG_DCU_CACHING_DIS	0x00010000	reg.h	Disable DCU caching
34561	AR5K_RXCFG	0x0034	reg.h	Register Address
34562	AR5K_RXCFG_SDMAMW	0x00000007	reg.h	DMA size (write)
34563	AR5K_RXCFG_SDMAMW_S	0	reg.h
34564	AR5K_RXCFG_ZLFDMA	0x00000008	reg.h	Enable Zero-length frame DMA
34565	AR5K_RXCFG_DEF_ANTENNA	0x00000010	reg.h	Default antenna (?)
34566	AR5K_RXCFG_JUMBO_RXE	0x00000020	reg.h	Enable jumbo rx descriptors [5211+]
34567	AR5K_RXCFG_JUMBO_WRAP	0x00000040	reg.h	Wrap jumbo frames [5211+]
34568	AR5K_RXCFG_SLE_ENTRY	0x00000080	reg.h	Sleep entry policy
34569	AR5K_RXJLA	0x0038	reg.h
34570	AR5K_MIBC	0x0040	reg.h	Register Address
34571	AR5K_MIBC_COW	0x00000001	reg.h	Warn test indicator
34572	AR5K_MIBC_FMC	0x00000002	reg.h	Freeze MIB Counters
34573	AR5K_MIBC_CMC	0x00000004	reg.h	Clean MIB Counters
34574	AR5K_MIBC_MCS	0x00000008	reg.h	MIB counter strobe
34575	AR5K_TOPS	0x0044	reg.h
34576	AR5K_TOPS_M	0x0000ffff	reg.h
34577	AR5K_RXNOFRM	0x0048	reg.h
34578	AR5K_RXNOFRM_M	0x000003ff	reg.h
34579	AR5K_TXNOFRM	0x004c	reg.h
34580	AR5K_TXNOFRM_M	0x000003ff	reg.h
34581	AR5K_TXNOFRM_QCU	0x000ffc00	reg.h
34582	AR5K_TXNOFRM_QCU_S	10	reg.h
34583	AR5K_RPGTO	0x0050	reg.h
34584	AR5K_RPGTO_M	0x000003ff	reg.h
34585	AR5K_RFCNT	0x0054	reg.h
34586	AR5K_RFCNT_M	0x0000001f	reg.h	[5211+] (?)
34587	AR5K_RFCNT_RFCL	0x0000000f	reg.h	[5210]
34588	AR5K_MISC	0x0058	reg.h	Register Address
34589	AR5K_MISC_DMA_OBS_M	0x000001e0	reg.h
34590	AR5K_MISC_DMA_OBS_S	5	reg.h
34591	AR5K_MISC_MISC_OBS_M	0x00000e00	reg.h
34592	AR5K_MISC_MISC_OBS_S	9	reg.h
34593	AR5K_MISC_MAC_OBS_LSB_M	0x00007000	reg.h
34594	AR5K_MISC_MAC_OBS_LSB_S	12	reg.h
34595	AR5K_MISC_MAC_OBS_MSB_M	0x00038000	reg.h
34596	AR5K_MISC_MAC_OBS_MSB_S	15	reg.h
34597	AR5K_MISC_LED_DECAY	0x001c0000	reg.h	[5210]
34598	AR5K_MISC_LED_BLINK	0x00e00000	reg.h	[5210]
34599	AR5K_QCUDCU_CLKGT	0x005c	reg.h	Register Address (?)
34600	AR5K_QCUDCU_CLKGT_QCU	0x0000ffff	reg.h	Mask for QCU clock
34601	AR5K_QCUDCU_CLKGT_DCU	0x07ff0000	reg.h	Mask for DCU clock
34602	AR5K_ISR	0x001c	reg.h	Register Address [5210]
34603	AR5K_PISR	0x0080	reg.h	Register Address [5211+]
34604	AR5K_ISR_RXOK	0x00000001	reg.h	Frame successfuly recieved
34605	AR5K_ISR_RXDESC	0x00000002	reg.h	RX descriptor request
34606	AR5K_ISR_RXERR	0x00000004	reg.h	Receive error
34607	AR5K_ISR_RXNOFRM	0x00000008	reg.h	No frame received (receive timeout)
34608	AR5K_ISR_RXEOL	0x00000010	reg.h	Empty RX descriptor
34609	AR5K_ISR_RXORN	0x00000020	reg.h	Receive FIFO overrun
34610	AR5K_ISR_TXOK	0x00000040	reg.h	Frame successfuly transmited
34611	AR5K_ISR_TXDESC	0x00000080	reg.h	TX descriptor request
34612	AR5K_ISR_TXERR	0x00000100	reg.h	Transmit error
34613	AR5K_ISR_TXNOFRM	0x00000200	reg.h	No frame transmited (transmit timeout)
34614	AR5K_ISR_TXEOL	0x00000400	reg.h	Empty TX descriptor
34615	AR5K_ISR_TXURN	0x00000800	reg.h	Transmit FIFO underrun
34616	AR5K_ISR_MIB	0x00001000	reg.h	Update MIB counters
34617	AR5K_ISR_SWI	0x00002000	reg.h	Software interrupt
34618	AR5K_ISR_RXPHY	0x00004000	reg.h	PHY error
34619	AR5K_ISR_RXKCM	0x00008000	reg.h	RX Key cache miss
34620	AR5K_ISR_SWBA	0x00010000	reg.h	Software beacon alert
34621	AR5K_ISR_BRSSI	0x00020000	reg.h	Beacon rssi below threshold (?)
34622	AR5K_ISR_BMISS	0x00040000	reg.h	Beacon missed
34623	AR5K_ISR_HIUERR	0x00080000	reg.h	Host Interface Unit error [5211+]
34624	AR5K_ISR_BNR	0x00100000	reg.h	Beacon not ready [5211+]
34625	AR5K_ISR_MCABT	0x00100000	reg.h	Master Cycle Abort [5210]
34626	AR5K_ISR_RXCHIRP	0x00200000	reg.h	CHIRP Received [5212+]
34627	AR5K_ISR_SSERR	0x00200000	reg.h	Signaled System Error [5210]
34628	AR5K_ISR_DPERR	0x00400000	reg.h	Det par Error (?) [5210]
34629	AR5K_ISR_RXDOPPLER	0x00400000	reg.h	Doppler chirp received [5212+]
34630	AR5K_ISR_TIM	0x00800000	reg.h	[5211+]
34631	AR5K_ISR_BCNMISC	0x00800000	reg.h	'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
34632	AR5K_ISR_GPIO	0x01000000	reg.h	GPIO (rf kill)
34633	AR5K_ISR_QCBRORN	0x02000000	reg.h	QCU CBR overrun [5211+]
34634	AR5K_ISR_QCBRURN	0x04000000	reg.h	QCU CBR underrun [5211+]
34635	AR5K_ISR_QTRIG	0x08000000	reg.h	QCU scheduling trigger [5211+]
34636	AR5K_SISR0	0x0084	reg.h	Register Address [5211+]
34637	AR5K_SISR0_QCU_TXOK	0x000003ff	reg.h	Mask for QCU_TXOK
34638	AR5K_SISR0_QCU_TXOK_S	0	reg.h
34639	AR5K_SISR0_QCU_TXDESC	0x03ff0000	reg.h	Mask for QCU_TXDESC
34640	AR5K_SISR0_QCU_TXDESC_S	16	reg.h
34641	AR5K_SISR1	0x0088	reg.h	Register Address [5211+]
34642	AR5K_SISR1_QCU_TXERR	0x000003ff	reg.h	Mask for QCU_TXERR
34643	AR5K_SISR1_QCU_TXERR_S	0	reg.h
34644	AR5K_SISR1_QCU_TXEOL	0x03ff0000	reg.h	Mask for QCU_TXEOL
34645	AR5K_SISR1_QCU_TXEOL_S	16	reg.h
34646	AR5K_SISR2	0x008c	reg.h	Register Address [5211+]
34647	AR5K_SISR2_QCU_TXURN	0x000003ff	reg.h	Mask for QCU_TXURN
34648	AR5K_SISR2_QCU_TXURN_S	0	reg.h
34649	AR5K_SISR2_MCABT	0x00100000	reg.h	Master Cycle Abort
34650	AR5K_SISR2_SSERR	0x00200000	reg.h	Signaled System Error
34651	AR5K_SISR2_DPERR	0x00400000	reg.h	Bus parity error
34652	AR5K_SISR2_TIM	0x01000000	reg.h	[5212+]
34653	AR5K_SISR2_CAB_END	0x02000000	reg.h	[5212+]
34654	AR5K_SISR2_DTIM_SYNC	0x04000000	reg.h	DTIM sync lost [5212+]
34655	AR5K_SISR2_BCN_TIMEOUT	0x08000000	reg.h	Beacon Timeout [5212+]
34656	AR5K_SISR2_CAB_TIMEOUT	0x10000000	reg.h	CAB Timeout [5212+]
34657	AR5K_SISR2_DTIM	0x20000000	reg.h	[5212+]
34658	AR5K_SISR2_TSFOOR	0x80000000	reg.h	TSF OOR (?)
34659	AR5K_SISR3	0x0090	reg.h	Register Address [5211+]
34660	AR5K_SISR3_QCBRORN	0x000003ff	reg.h	Mask for QCBRORN
34661	AR5K_SISR3_QCBRORN_S	0	reg.h
34662	AR5K_SISR3_QCBRURN	0x03ff0000	reg.h	Mask for QCBRURN
34663	AR5K_SISR3_QCBRURN_S	16	reg.h
34664	AR5K_SISR4	0x0094	reg.h	Register Address [5211+]
34665	AR5K_SISR4_QTRIG	0x000003ff	reg.h	Mask for QTRIG
34666	AR5K_SISR4_QTRIG_S	0	reg.h
34667	AR5K_RAC_PISR	0x00c0	reg.h	Read and clear PISR
34668	AR5K_RAC_SISR0	0x00c4	reg.h	Read and clear SISR0
34669	AR5K_RAC_SISR1	0x00c8	reg.h	Read and clear SISR1
34670	AR5K_RAC_SISR2	0x00cc	reg.h	Read and clear SISR2
34671	AR5K_RAC_SISR3	0x00d0	reg.h	Read and clear SISR3
34672	AR5K_RAC_SISR4	0x00d4	reg.h	Read and clear SISR4
34673	AR5K_IMR	0x0020	reg.h	Register Address [5210]
34674	AR5K_PIMR	0x00a0	reg.h	Register Address [5211+]
34675	AR5K_IMR_RXOK	0x00000001	reg.h	Frame successfuly recieved
34676	AR5K_IMR_RXDESC	0x00000002	reg.h	RX descriptor request
34677	AR5K_IMR_RXERR	0x00000004	reg.h	Receive error
34678	AR5K_IMR_RXNOFRM	0x00000008	reg.h	No frame received (receive timeout)
34679	AR5K_IMR_RXEOL	0x00000010	reg.h	Empty RX descriptor
34680	AR5K_IMR_RXORN	0x00000020	reg.h	Receive FIFO overrun
34681	AR5K_IMR_TXOK	0x00000040	reg.h	Frame successfuly transmited
34682	AR5K_IMR_TXDESC	0x00000080	reg.h	TX descriptor request
34683	AR5K_IMR_TXERR	0x00000100	reg.h	Transmit error
34684	AR5K_IMR_TXNOFRM	0x00000200	reg.h	No frame transmited (transmit timeout)
34685	AR5K_IMR_TXEOL	0x00000400	reg.h	Empty TX descriptor
34686	AR5K_IMR_TXURN	0x00000800	reg.h	Transmit FIFO underrun
34687	AR5K_IMR_MIB	0x00001000	reg.h	Update MIB counters
34688	AR5K_IMR_SWI	0x00002000	reg.h	Software interrupt
34689	AR5K_IMR_RXPHY	0x00004000	reg.h	PHY error
34690	AR5K_IMR_RXKCM	0x00008000	reg.h	RX Key cache miss
34691	AR5K_IMR_SWBA	0x00010000	reg.h	Software beacon alert
34692	AR5K_IMR_BRSSI	0x00020000	reg.h	Beacon rssi below threshold (?)
34693	AR5K_IMR_BMISS	0x00040000	reg.h	Beacon missed
34694	AR5K_IMR_HIUERR	0x00080000	reg.h	Host Interface Unit error [5211+]
34695	AR5K_IMR_BNR	0x00100000	reg.h	Beacon not ready [5211+]
34696	AR5K_IMR_MCABT	0x00100000	reg.h	Master Cycle Abort [5210]
34697	AR5K_IMR_RXCHIRP	0x00200000	reg.h	CHIRP Received [5212+]
34698	AR5K_IMR_SSERR	0x00200000	reg.h	Signaled System Error [5210]
34699	AR5K_IMR_DPERR	0x00400000	reg.h	Det par Error (?) [5210]
34700	AR5K_IMR_RXDOPPLER	0x00400000	reg.h	Doppler chirp received [5212+]
34701	AR5K_IMR_TIM	0x00800000	reg.h	[5211+]
34702	AR5K_IMR_BCNMISC	0x00800000	reg.h	'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
34703	AR5K_IMR_GPIO	0x01000000	reg.h	GPIO (rf kill)
34704	AR5K_IMR_QCBRORN	0x02000000	reg.h	QCU CBR overrun (?) [5211+]
34705	AR5K_IMR_QCBRURN	0x04000000	reg.h	QCU CBR underrun (?) [5211+]
34706	AR5K_IMR_QTRIG	0x08000000	reg.h	QCU scheduling trigger [5211+]
34707	AR5K_SIMR0	0x00a4	reg.h	Register Address [5211+]
34708	AR5K_SIMR0_QCU_TXOK	0x000003ff	reg.h	Mask for QCU_TXOK
34709	AR5K_SIMR0_QCU_TXOK_S	0	reg.h
34710	AR5K_SIMR0_QCU_TXDESC	0x03ff0000	reg.h	Mask for QCU_TXDESC
34711	AR5K_SIMR0_QCU_TXDESC_S	16	reg.h
34712	AR5K_SIMR1	0x00a8	reg.h	Register Address [5211+]
34713	AR5K_SIMR1_QCU_TXERR	0x000003ff	reg.h	Mask for QCU_TXERR
34714	AR5K_SIMR1_QCU_TXERR_S	0	reg.h
34715	AR5K_SIMR1_QCU_TXEOL	0x03ff0000	reg.h	Mask for QCU_TXEOL
34716	AR5K_SIMR1_QCU_TXEOL_S	16	reg.h
34717	AR5K_SIMR2	0x00ac	reg.h	Register Address [5211+]
34718	AR5K_SIMR2_QCU_TXURN	0x000003ff	reg.h	Mask for QCU_TXURN
34719	AR5K_SIMR2_QCU_TXURN_S	0	reg.h
34720	AR5K_SIMR2_MCABT	0x00100000	reg.h	Master Cycle Abort
34721	AR5K_SIMR2_SSERR	0x00200000	reg.h	Signaled System Error
34722	AR5K_SIMR2_DPERR	0x00400000	reg.h	Bus parity error
34723	AR5K_SIMR2_TIM	0x01000000	reg.h	[5212+]
34724	AR5K_SIMR2_CAB_END	0x02000000	reg.h	[5212+]
34725	AR5K_SIMR2_DTIM_SYNC	0x04000000	reg.h	DTIM Sync lost [5212+]
34726	AR5K_SIMR2_BCN_TIMEOUT	0x08000000	reg.h	Beacon Timeout [5212+]
34727	AR5K_SIMR2_CAB_TIMEOUT	0x10000000	reg.h	CAB Timeout [5212+]
34728	AR5K_SIMR2_DTIM	0x20000000	reg.h	[5212+]
34729	AR5K_SIMR2_TSFOOR	0x80000000	reg.h	TSF OOR (?)
34730	AR5K_SIMR3	0x00b0	reg.h	Register Address [5211+]
34731	AR5K_SIMR3_QCBRORN	0x000003ff	reg.h	Mask for QCBRORN
34732	AR5K_SIMR3_QCBRORN_S	0	reg.h
34733	AR5K_SIMR3_QCBRURN	0x03ff0000	reg.h	Mask for QCBRURN
34734	AR5K_SIMR3_QCBRURN_S	16	reg.h
34735	AR5K_SIMR4	0x00b4	reg.h	Register Address [5211+]
34736	AR5K_SIMR4_QTRIG	0x000003ff	reg.h	Mask for QTRIG
34737	AR5K_SIMR4_QTRIG_S	0	reg.h
34738	AR5K_DCM_ADDR	0x0400	reg.h	Decompression mask address (index)
34739	AR5K_DCM_DATA	0x0404	reg.h	Decompression mask data
34740	AR5K_WOW_PCFG	0x0410	reg.h	Register Address
34741	AR5K_WOW_PCFG_PAT_MATCH_EN	0x00000001	reg.h	Pattern match enable
34742	AR5K_WOW_PCFG_LONG_FRAME_POL	0x00000002	reg.h	Long frame policy
34743	AR5K_WOW_PCFG_WOBMISS	0x00000004	reg.h	Wake on bea(con) miss (?)
34744	AR5K_WOW_PCFG_PAT_0_EN	0x00000100	reg.h	Enable pattern 0
34745	AR5K_WOW_PCFG_PAT_1_EN	0x00000200	reg.h	Enable pattern 1
34746	AR5K_WOW_PCFG_PAT_2_EN	0x00000400	reg.h	Enable pattern 2
34747	AR5K_WOW_PCFG_PAT_3_EN	0x00000800	reg.h	Enable pattern 3
34748	AR5K_WOW_PCFG_PAT_4_EN	0x00001000	reg.h	Enable pattern 4
34749	AR5K_WOW_PCFG_PAT_5_EN	0x00002000	reg.h	Enable pattern 5
34750	AR5K_WOW_PAT_IDX	0x0414	reg.h
34751	AR5K_WOW_PAT_DATA	0x0418	reg.h	Register Address
34752	AR5K_WOW_PAT_DATA_0_3_V	0x00000001	reg.h	Pattern 0, 3 value
34753	AR5K_WOW_PAT_DATA_1_4_V	0x00000100	reg.h	Pattern 1, 4 value
34754	AR5K_WOW_PAT_DATA_2_5_V	0x00010000	reg.h	Pattern 2, 5 value
34755	AR5K_WOW_PAT_DATA_0_3_M	0x01000000	reg.h	Pattern 0, 3 mask
34756	AR5K_WOW_PAT_DATA_1_4_M	0x04000000	reg.h	Pattern 1, 4 mask
34757	AR5K_WOW_PAT_DATA_2_5_M	0x10000000	reg.h	Pattern 2, 5 mask
34758	AR5K_DCCFG	0x0420	reg.h	Register Address
34759	AR5K_DCCFG_GLOBAL_EN	0x00000001	reg.h	Enable decompression on all queues
34760	AR5K_DCCFG_BYPASS_EN	0x00000002	reg.h	Bypass decompression
34761	AR5K_DCCFG_BCAST_EN	0x00000004	reg.h	Enable decompression for bcast frames
34762	AR5K_DCCFG_MCAST_EN	0x00000008	reg.h	Enable decompression for mcast frames
34763	AR5K_CCFG	0x0600	reg.h	Register Address
34764	AR5K_CCFG_WINDOW_SIZE	0x00000007	reg.h	Compression window size
34765	AR5K_CCFG_CPC_EN	0x00000008	reg.h	Enable performance counters
34766	AR5K_CCFG_CCU	0x0604	reg.h	Register Address
34767	AR5K_CCFG_CCU_CUP_EN	0x00000001	reg.h	CCU Catchup enable
34768	AR5K_CCFG_CCU_CREDIT	0x00000002	reg.h	CCU Credit (field)
34769	AR5K_CCFG_CCU_CD_THRES	0x00000080	reg.h	CCU Cyc(lic?) debt threshold (field)
34770	AR5K_CCFG_CCU_CUP_LCNT	0x00010000	reg.h	CCU Catchup lit(?) count
34771	AR5K_CCFG_CCU_INIT	0x00100200	reg.h	Initial value during reset
34772	AR5K_CPC0	0x0610	reg.h	Compression performance counter 0
34773	AR5K_CPC1	0x0614	reg.h	Compression performance counter 1
34774	AR5K_CPC2	0x0618	reg.h	Compression performance counter 2
34775	AR5K_CPC3	0x061c	reg.h	Compression performance counter 3
34776	AR5K_CPCOVF	0x0620	reg.h	Compression performance overflow
34777	AR5K_QCU_TXDP_BASE	0x0800	reg.h	Register Address - Queue0 TXDP
34778	AR5K_QCU_TXE	0x0840	reg.h
34779	AR5K_QCU_TXD	0x0880	reg.h
34780	AR5K_QCU_CBRCFG_BASE	0x08c0	reg.h	Register Address - Queue0 CBRCFG
34781	AR5K_QCU_CBRCFG_INTVAL	0x00ffffff	reg.h	CBR Interval mask
34782	AR5K_QCU_CBRCFG_INTVAL_S	0	reg.h
34783	AR5K_QCU_CBRCFG_ORN_THRES	0xff000000	reg.h	CBR overrun threshold mask
34784	AR5K_QCU_CBRCFG_ORN_THRES_S	24	reg.h
34785	AR5K_QCU_RDYTIMECFG_BASE	0x0900	reg.h	Register Address - Queue0 RDYTIMECFG
34786	AR5K_QCU_RDYTIMECFG_INTVAL	0x00ffffff	reg.h	Ready time interval mask
34787	AR5K_QCU_RDYTIMECFG_INTVAL_S	0	reg.h
34788	AR5K_QCU_RDYTIMECFG_ENABLE	0x01000000	reg.h	Ready time enable mask
34789	AR5K_QCU_ONESHOTARM_SET	0x0940	reg.h	Register Address -QCU "one shot arm set (?)"
34790	AR5K_QCU_ONESHOTARM_SET_M	0x0000ffff	reg.h
34791	AR5K_QCU_ONESHOTARM_CLEAR	0x0980	reg.h	Register Address -QCU "one shot arm clear (?)"
34792	AR5K_QCU_ONESHOTARM_CLEAR_M	0x0000ffff	reg.h
34793	AR5K_QCU_MISC_BASE	0x09c0	reg.h	Register Address -Queue0 MISC
34794	AR5K_QCU_MISC_FRSHED_M	0x0000000f	reg.h	Frame sheduling mask
34795	AR5K_QCU_MISC_FRSHED_ASAP	0	reg.h	ASAP
34796	AR5K_QCU_MISC_FRSHED_CBR	1	reg.h	Constant Bit Rate
34797	AR5K_QCU_MISC_FRSHED_DBA_GT	2	reg.h	DMA Beacon alert gated
34798	AR5K_QCU_MISC_FRSHED_TIM_GT	3	reg.h	TIMT gated
34799	AR5K_QCU_MISC_FRSHED_BCN_SENT_G	4	reg.h	Beacon sent gated
34800	AR5K_QCU_MISC_ONESHOT_ENABLE	0x00000010	reg.h	Oneshot enable
34801	AR5K_QCU_MISC_CBREXP_DIS	0x00000020	reg.h	Disable CBR expired counter (normal queue)
34802	AR5K_QCU_MISC_CBREXP_BCN_DIS	0x00000040	reg.h	Disable CBR expired counter (beacon queue)
34803	AR5K_QCU_MISC_BCN_ENABLE	0x00000080	reg.h	Enable Beacon use
34804	AR5K_QCU_MISC_CBR_THRES_ENABLE	0x00000100	reg.h	CBR expired threshold enabled
34805	AR5K_QCU_MISC_RDY_VEOL_POLICY	0x00000200	reg.h	TXE reset when RDYTIME expired or VEOL
34806	AR5K_QCU_MISC_CBR_RESET_CNT	0x00000400	reg.h	CBR threshold (counter) reset
34807	AR5K_QCU_MISC_DCU_EARLY	0x00000800	reg.h	DCU early termination
34808	AR5K_QCU_MISC_DCU_CMP_EN	0x00001000	reg.h	Enable frame compression
34809	AR5K_QCU_STS_BASE	0x0a00	reg.h	Register Address - Queue0 STS
34810	AR5K_QCU_STS_FRMPENDCNT	0x00000003	reg.h	Frames pending counter
34811	AR5K_QCU_STS_CBREXPCNT	0x0000ff00	reg.h	CBR expired counter
34812	AR5K_QCU_RDYTIMESHDN	0x0a40	reg.h
34813	AR5K_QCU_RDYTIMESHDN_M	0x000003ff	reg.h
34814	AR5K_QCU_CBB_SELECT	0x0b00	reg.h
34815	AR5K_QCU_CBB_ADDR	0x0b04	reg.h
34816	AR5K_QCU_CBB_ADDR_S	9	reg.h
34817	AR5K_QCU_CBCFG	0x0b08	reg.h
34818	AR5K_DCU_QCUMASK_BASE	0x1000	reg.h	Register Address -Queue0 DCU_QCUMASK
34819	AR5K_DCU_QCUMASK_M	0x000003ff	reg.h
34820	AR5K_DCU_LCL_IFS_BASE	0x1040	reg.h	Register Address -Queue0 DCU_LCL_IFS
34821	AR5K_DCU_LCL_IFS_CW_MIN	0x000003ff	reg.h	Minimum Contention Window
34822	AR5K_DCU_LCL_IFS_CW_MIN_S	0	reg.h
34823	AR5K_DCU_LCL_IFS_CW_MAX	0x000ffc00	reg.h	Maximum Contention Window
34824	AR5K_DCU_LCL_IFS_CW_MAX_S	10	reg.h
34825	AR5K_DCU_LCL_IFS_AIFS	0x0ff00000	reg.h	Arbitrated Interframe Space
34826	AR5K_DCU_LCL_IFS_AIFS_S	20	reg.h
34827	AR5K_DCU_LCL_IFS_AIFS_MAX	0xfc	reg.h	Anything above that can cause DCU to hang
34828	AR5K_DCU_RETRY_LMT_BASE	0x1080	reg.h	Register Address -Queue0 DCU_RETRY_LMT
34829	AR5K_DCU_RETRY_LMT_SH_RETRY	0x0000000f	reg.h	Short retry limit mask
34830	AR5K_DCU_RETRY_LMT_SH_RETRY_S	0	reg.h
34831	AR5K_DCU_RETRY_LMT_LG_RETRY	0x000000f0	reg.h	Long retry limit mask
34832	AR5K_DCU_RETRY_LMT_LG_RETRY_S	4	reg.h
34833	AR5K_DCU_RETRY_LMT_SSH_RETRY	0x00003f00	reg.h	Station short retry limit mask (?)
34834	AR5K_DCU_RETRY_LMT_SSH_RETRY_S	8	reg.h
34835	AR5K_DCU_RETRY_LMT_SLG_RETRY	0x000fc000	reg.h	Station long retry limit mask (?)
34836	AR5K_DCU_RETRY_LMT_SLG_RETRY_S	14	reg.h
34837	AR5K_DCU_CHAN_TIME_BASE	0x10c0	reg.h	Register Address -Queue0 DCU_CHAN_TIME
34838	AR5K_DCU_CHAN_TIME_DUR	0x000fffff	reg.h	Channel time duration
34839	AR5K_DCU_CHAN_TIME_DUR_S	0	reg.h
34840	AR5K_DCU_CHAN_TIME_ENABLE	0x00100000	reg.h	Enable channel time
34841	AR5K_DCU_MISC_BASE	0x1100	reg.h	Register Address -Queue0 DCU_MISC
34842	AR5K_DCU_MISC_BACKOFF	0x0000003f	reg.h	Mask for backoff threshold
34843	AR5K_DCU_MISC_ETS_RTS_POL	0x00000040	reg.h	End of transmission series
34844	AR5K_DCU_MISC_ETS_CW_POL	0x00000080	reg.h	End of transmission series
34845	AR5K_DCU_MISC_FRAG_WAIT	0x00000100	reg.h	Wait for next fragment
34846	AR5K_DCU_MISC_BACKOFF_FRAG	0x00000200	reg.h	Enable backoff while bursting
34847	AR5K_DCU_MISC_HCFPOLL_ENABLE	0x00000800	reg.h	CF - Poll enable
34848	AR5K_DCU_MISC_BACKOFF_PERSIST	0x00001000	reg.h	Persistent backoff
34849	AR5K_DCU_MISC_FRMPRFTCH_ENABLE	0x00002000	reg.h	Enable frame pre-fetch
34850	AR5K_DCU_MISC_VIRTCOL	0x0000c000	reg.h	Mask for Virtual Collision (?)
34851	AR5K_DCU_MISC_VIRTCOL_NORMAL	0	reg.h
34852	AR5K_DCU_MISC_VIRTCOL_IGNORE	1	reg.h
34853	AR5K_DCU_MISC_BCN_ENABLE	0x00010000	reg.h	Enable Beacon use
34854	AR5K_DCU_MISC_ARBLOCK_CTL	0x00060000	reg.h	Arbiter lockout control mask
34855	AR5K_DCU_MISC_ARBLOCK_CTL_S	17	reg.h
34856	AR5K_DCU_MISC_ARBLOCK_CTL_NONE	0	reg.h	No arbiter lockout
34857	AR5K_DCU_MISC_ARBLOCK_CTL_INTFR	1	reg.h	Intra-frame lockout
34858	AR5K_DCU_MISC_ARBLOCK_CTL_GLOBA	2	reg.h	Global lockout
34859	AR5K_DCU_MISC_ARBLOCK_IGNORE	0x00080000	reg.h	Ignore Arbiter lockout
34860	AR5K_DCU_MISC_SEQ_NUM_INCR_DIS	0x00100000	reg.h	Disable sequence number increment
34861	AR5K_DCU_MISC_POST_FR_BKOFF_DIS	0x00200000	reg.h	Disable post-frame backoff
34862	AR5K_DCU_MISC_VIRT_COLL_POLICY	0x00400000	reg.h	Virtual Collision cw policy
34863	AR5K_DCU_MISC_BLOWN_IFS_POLICY	0x00800000	reg.h	Blown IFS policy (?)
34864	AR5K_DCU_MISC_SEQNUM_CTL	0x01000000	reg.h	Sequence number control (?)
34865	AR5K_DCU_SEQNUM_BASE	0x1140	reg.h
34866	AR5K_DCU_SEQNUM_M	0x00000fff	reg.h
34867	AR5K_DCU_GBL_IFS_SIFS	0x1030	reg.h
34868	AR5K_DCU_GBL_IFS_SIFS_M	0x0000ffff	reg.h
34869	AR5K_DCU_GBL_IFS_SLOT	0x1070	reg.h
34870	AR5K_DCU_GBL_IFS_SLOT_M	0x0000ffff	reg.h
34871	AR5K_DCU_GBL_IFS_EIFS	0x10b0	reg.h
34872	AR5K_DCU_GBL_IFS_EIFS_M	0x0000ffff	reg.h
34873	AR5K_DCU_GBL_IFS_MISC	0x10f0	reg.h	Register Address
34874	AR5K_DCU_GBL_IFS_MISC_LFSR_SLIC	0x00000007	reg.h	LFSR Slice Select
34875	AR5K_DCU_GBL_IFS_MISC_TURBO_MOD	0x00000008	reg.h	Turbo mode
34876	AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_	0x000003f0	reg.h	SIFS Duration mask
34877	AR5K_DCU_GBL_IFS_MISC_USEC_DUR	0x000ffc00	reg.h	USEC Duration mask
34878	AR5K_DCU_GBL_IFS_MISC_USEC_DUR_	10	reg.h
34879	AR5K_DCU_GBL_IFS_MISC_DCU_ARB_D	0x00300000	reg.h	DCU Arbiter delay mask
34880	AR5K_DCU_GBL_IFS_MISC_SIFS_CNT_	0x00400000	reg.h	SIFS cnt reset policy (?)
34881	AR5K_DCU_GBL_IFS_MISC_AIFS_CNT_	0x00800000	reg.h	AIFS cnt reset policy (?)
34882	AR5K_DCU_GBL_IFS_MISC_RND_LFSR_	0x01000000	reg.h	Disable random LFSR slice
34883	AR5K_DCU_FP	0x1230	reg.h	Register Address
34884	AR5K_DCU_FP_NOBURST_DCU_EN	0x00000001	reg.h	Enable non-burst prefetch on DCU (?)
34885	AR5K_DCU_FP_NOBURST_EN	0x00000010	reg.h	Enable non-burst prefetch (?)
34886	AR5K_DCU_FP_BURST_DCU_EN	0x00000020	reg.h	Enable burst prefetch on DCU (?)
34887	AR5K_DCU_TXP	0x1270	reg.h	Register Address
34888	AR5K_DCU_TXP_M	0x000003ff	reg.h	Tx pause mask
34889	AR5K_DCU_TXP_STATUS	0x00010000	reg.h	Tx pause status
34890	AR5K_DCU_TX_FILTER_0_BASE	0x1038	reg.h
34891	AR5K_DCU_TX_FILTER_1_BASE	0x103c	reg.h
34892	AR5K_DCU_TX_FILTER_CLR	0x143c	reg.h
34893	AR5K_DCU_TX_FILTER_SET	0x147c	reg.h
34894	AR5K_RESET_CTL	0x4000	reg.h	Register Address
34895	AR5K_RESET_CTL_PCU	0x00000001	reg.h	Protocol Control Unit reset
34896	AR5K_RESET_CTL_DMA	0x00000002	reg.h	DMA (Rx/Tx) reset [5210]
34897	AR5K_RESET_CTL_BASEBAND	0x00000002	reg.h	Baseband reset [5211+]
34898	AR5K_RESET_CTL_MAC	0x00000004	reg.h	MAC reset (PCU+Baseband ?) [5210]
34899	AR5K_RESET_CTL_PHY	0x00000008	reg.h	PHY reset [5210]
34900	AR5K_RESET_CTL_PCI	0x00000010	reg.h	PCI Core reset (interrupts etc)
34901	AR5K_SLEEP_CTL	0x4004	reg.h	Register Address
34902	AR5K_SLEEP_CTL_SLDUR	0x0000ffff	reg.h	Sleep duration mask
34903	AR5K_SLEEP_CTL_SLDUR_S	0	reg.h
34904	AR5K_SLEEP_CTL_SLE	0x00030000	reg.h	Sleep enable mask
34905	AR5K_SLEEP_CTL_SLE_S	16	reg.h
34906	AR5K_SLEEP_CTL_SLE_WAKE	0x00000000	reg.h	Force chip awake
34907	AR5K_SLEEP_CTL_SLE_SLP	0x00010000	reg.h	Force chip sleep
34908	AR5K_SLEEP_CTL_SLE_ALLOW	0x00020000	reg.h	Normal sleep policy
34909	AR5K_SLEEP_CTL_SLE_UNITS	0x00000008	reg.h	[5211+]
34910	AR5K_SLEEP_CTL_DUR_TIM_POL	0x00040000	reg.h	Sleep duration timing policy
34911	AR5K_SLEEP_CTL_DUR_WRITE_POL	0x00080000	reg.h	Sleep duration write policy
34912	AR5K_SLEEP_CTL_SLE_POL	0x00100000	reg.h	Sleep policy mode
34913	AR5K_INTPEND	0x4008	reg.h
34914	AR5K_INTPEND_M	0x00000001	reg.h
34915	AR5K_SFR	0x400c	reg.h
34916	AR5K_SFR_EN	0x00000001	reg.h
34917	AR5K_PCICFG	0x4010	reg.h	Register Address
34918	AR5K_PCICFG_EEAE	0x00000001	reg.h	Eeprom access enable [5210]
34919	AR5K_PCICFG_SLEEP_CLOCK_EN	0x00000002	reg.h	Enable sleep clock
34920	AR5K_PCICFG_CLKRUNEN	0x00000004	reg.h	CLKRUN enable [5211+]
34921	AR5K_PCICFG_EESIZE	0x00000018	reg.h	Mask for EEPROM size [5211+]
34922	AR5K_PCICFG_EESIZE_S	3	reg.h
34923	AR5K_PCICFG_EESIZE_4K	0	reg.h	4K
34924	AR5K_PCICFG_EESIZE_8K	1	reg.h	8K
34925	AR5K_PCICFG_EESIZE_16K	2	reg.h	16K
34926	AR5K_PCICFG_EESIZE_FAIL	3	reg.h	Failed to get size [5211+]
34927	AR5K_PCICFG_LED	0x00000060	reg.h	Led status [5211+]
34928	AR5K_PCICFG_LED_NONE	0x00000000	reg.h	Default [5211+]
34929	AR5K_PCICFG_LED_PEND	0x00000020	reg.h	Scan / Auth pending
34930	AR5K_PCICFG_LED_ASSOC	0x00000040	reg.h	Associated
34931	AR5K_PCICFG_BUS_SEL	0x00000380	reg.h	Mask for "bus select" [5211+] (?)
34932	AR5K_PCICFG_CBEFIX_DIS	0x00000400	reg.h	Disable CBE fix
34933	AR5K_PCICFG_SL_INTEN	0x00000800	reg.h	Enable interrupts when asleep
34934	AR5K_PCICFG_LED_BCTL	0x00001000	reg.h	Led blink (?) [5210]
34935	AR5K_PCICFG_RETRY_FIX	0x00001000	reg.h	Enable pci core retry fix
34936	AR5K_PCICFG_SL_INPEN	0x00002000	reg.h	Sleep even whith pending interrupts
34937	AR5K_PCICFG_SPWR_DN	0x00010000	reg.h	Mask for power status
34938	AR5K_PCICFG_LEDMODE	0x000e0000	reg.h	Ledmode [5211+]
34939	AR5K_PCICFG_LEDMODE_PROP	0x00000000	reg.h	Blink on standard traffic [5211+]
34940	AR5K_PCICFG_LEDMODE_PROM	0x00020000	reg.h	Default mode (blink on any traffic) [5211+]
34941	AR5K_PCICFG_LEDMODE_PWR	0x00040000	reg.h	Some other blinking mode (?) [5211+]
34942	AR5K_PCICFG_LEDMODE_RAND	0x00060000	reg.h	Random blinking (?) [5211+]
34943	AR5K_PCICFG_LEDBLINK	0x00700000	reg.h	Led blink rate
34944	AR5K_PCICFG_LEDBLINK_S	20	reg.h
34945	AR5K_PCICFG_LEDSLOW	0x00800000	reg.h	Slowest led blink rate [5211+]
34946	AR5K_PCICFG_LEDSTATE	(AR5K_PCICFG_LED \| AR5K_PCICFG_LEDMODE \| \ AR5K_PCICFG_LEDBLINK \| AR5K_PCICFG_LEDSLOW)	reg.h
34947	AR5K_PCICFG_SLEEP_CLOCK_RATE	0x03000000	reg.h	Sleep clock rate
34948	AR5K_PCICFG_SLEEP_CLOCK_RATE_S	24	reg.h
34949	AR5K_NUM_GPIO	6	reg.h
34950	AR5K_GPIOCR	0x4014	reg.h	Register Address
34951	AR5K_GPIOCR_INT_ENA	0x00008000	reg.h	Enable GPIO interrupt
34952	AR5K_GPIOCR_INT_SELL	0x00000000	reg.h	Generate interrupt when pin is low
34953	AR5K_GPIOCR_INT_SELH	0x00010000	reg.h	Generate interrupt when pin is high
34954	AR5K_GPIODO	0x4018	reg.h
34955	AR5K_GPIODI	0x401c	reg.h
34956	AR5K_GPIODI_M	0x0000002f	reg.h
34957	AR5K_SREV	0x4020	reg.h	Register Address
34958	AR5K_SREV_REV	0x0000000f	reg.h	Mask for revision
34959	AR5K_SREV_REV_S	0	reg.h
34960	AR5K_SREV_VER	0x000000ff	reg.h	Mask for version
34961	AR5K_SREV_VER_S	4	reg.h
34962	AR5K_TXEPOST	0x4028	reg.h
34963	AR5K_QCU_SLEEP_MASK	0x402c	reg.h
34964	AR5K_5414_CBCFG	0x4068	reg.h
34965	AR5K_5414_CBCFG_BUF_DIS	0x10	reg.h	Disable buffer
34966	AR5K_PCIE_PM_CTL	0x4068	reg.h	Register address
34967	AR5K_PCIE_PM_CTL_L1_WHEN_D2	0x00000001	reg.h	enable PCIe core enter L1
34968	AR5K_PCIE_PM_CTL_L0_L0S_CLEAR	0x00000002	reg.h	Clear L0 and L0S counters
34969	AR5K_PCIE_PM_CTL_L0_L0S_EN	0x00000004	reg.h	Start L0 nd L0S counters
34970	AR5K_PCIE_PM_CTL_LDRESET_EN	0x00000008	reg.h	Enable reset when link goes
34971	AR5K_PCIE_PM_CTL_PME_EN	0x00000010	reg.h	PME Enable
34972	AR5K_PCIE_PM_CTL_AUX_PWR_DET	0x00000020	reg.h	Aux power detect
34973	AR5K_PCIE_PM_CTL_PME_CLEAR	0x00000040	reg.h	Clear PME
34974	AR5K_PCIE_PM_CTL_PSM_D0	0x00000080	reg.h
34975	AR5K_PCIE_PM_CTL_PSM_D1	0x00000100	reg.h
34976	AR5K_PCIE_PM_CTL_PSM_D2	0x00000200	reg.h
34977	AR5K_PCIE_PM_CTL_PSM_D3	0x00000400	reg.h
34978	AR5K_PCIE_WAEN	0x407c	reg.h
34979	AR5K_PCIE_SERDES	0x4080	reg.h
34980	AR5K_PCIE_SERDES_RESET	0x4084	reg.h
34981	AR5K_EEPROM_BASE	0x6000	reg.h
34982	AR5K_EEPROM_DATA_5211	0x6004	reg.h
34983	AR5K_EEPROM_DATA_5210	0x6800	reg.h
34984	AR5K_EEPROM_DATA	(ah->ah_version == AR5K_AR5210 ? \ AR5K_EEPROM_DATA_5210 : AR5K_EEPROM_DATA_5211)	reg.h
34985	AR5K_EEPROM_CMD	0x6008	reg.h	Register Addres
34986	AR5K_EEPROM_CMD_READ	0x00000001	reg.h	EEPROM read
34987	AR5K_EEPROM_CMD_WRITE	0x00000002	reg.h	EEPROM write
34988	AR5K_EEPROM_CMD_RESET	0x00000004	reg.h	EEPROM reset
34989	AR5K_EEPROM_STAT_5210	0x6c00	reg.h	Register Address [5210]
34990	AR5K_EEPROM_STAT_5211	0x600c	reg.h	Register Address [5211+]
34991	AR5K_EEPROM_STATUS	(ah->ah_version == AR5K_AR5210 ? \ AR5K_EEPROM_STAT_5210 : AR5K_EEPROM_STAT_5211)	reg.h
34992	AR5K_EEPROM_STAT_RDERR	0x00000001	reg.h	EEPROM read failed
34993	AR5K_EEPROM_STAT_RDDONE	0x00000002	reg.h	EEPROM read successful
34994	AR5K_EEPROM_STAT_WRERR	0x00000004	reg.h	EEPROM write failed
34995	AR5K_EEPROM_STAT_WRDONE	0x00000008	reg.h	EEPROM write successful
34996	AR5K_EEPROM_CFG	0x6010	reg.h	Register Addres
34997	AR5K_EEPROM_CFG_SIZE	0x00000003	reg.h	Size determination override
34998	AR5K_EEPROM_CFG_SIZE_AUTO	0	reg.h
34999	AR5K_EEPROM_CFG_SIZE_4KBIT	1	reg.h
35000	AR5K_EEPROM_CFG_SIZE_8KBIT	2	reg.h
35001	AR5K_EEPROM_CFG_SIZE_16KBIT	3	reg.h
35002	AR5K_EEPROM_CFG_WR_WAIT_DIS	0x00000004	reg.h	Disable write wait
35003	AR5K_EEPROM_CFG_CLK_RATE	0x00000018	reg.h	Clock rate
35004	AR5K_EEPROM_CFG_CLK_RATE_S	3	reg.h
35005	AR5K_EEPROM_CFG_CLK_RATE_156KHZ	0	reg.h
35006	AR5K_EEPROM_CFG_CLK_RATE_312KHZ	1	reg.h
35007	AR5K_EEPROM_CFG_CLK_RATE_625KHZ	2	reg.h
35008	AR5K_EEPROM_CFG_PROT_KEY	0x00ffff00	reg.h	Protection key
35009	AR5K_EEPROM_CFG_PROT_KEY_S	8	reg.h
35010	AR5K_EEPROM_CFG_LIND_EN	0x01000000	reg.h	Enable length indicator (?)
35011	AR5K_PCU_MIN	0x8000	reg.h
35012	AR5K_PCU_MAX	0x8fff	reg.h
35013	AR5K_STA_ID0	0x8000	reg.h
35014	AR5K_STA_ID0_ARRD_L32	0xffffffff	reg.h
35015	AR5K_STA_ID1	0x8004	reg.h	Register Address
35016	AR5K_STA_ID1_ADDR_U16	0x0000ffff	reg.h	Upper 16 bits of MAC addres
35017	AR5K_STA_ID1_AP	0x00010000	reg.h	Set AP mode
35018	AR5K_STA_ID1_ADHOC	0x00020000	reg.h	Set Ad-Hoc mode
35019	AR5K_STA_ID1_PWR_SV	0x00040000	reg.h	Power save reporting
35020	AR5K_STA_ID1_NO_KEYSRCH	0x00080000	reg.h	No key search
35021	AR5K_STA_ID1_NO_PSPOLL	0x00100000	reg.h	No power save polling [5210]
35022	AR5K_STA_ID1_PCF_5211	0x00100000	reg.h	Enable PCF on [5211+]
35023	AR5K_STA_ID1_PCF_5210	0x00200000	reg.h	Enable PCF on [5210]
35024	AR5K_STA_ID1_PCF	(ah->ah_version == AR5K_AR5210 ? \ AR5K_STA_ID1_PCF_5210 : AR5K_STA_ID1_PCF_5211)	reg.h
35025	AR5K_STA_ID1_DEFAULT_ANTENNA	0x00200000	reg.h	Use default antenna
35026	AR5K_STA_ID1_DESC_ANTENNA	0x00400000	reg.h	Update antenna from descriptor
35027	AR5K_STA_ID1_RTS_DEF_ANTENNA	0x00800000	reg.h	Use default antenna for RTS
35028	AR5K_STA_ID1_ACKCTS_6MB	0x01000000	reg.h	Use 6Mbit/s for ACK/CTS
35029	AR5K_STA_ID1_BASE_RATE_11B	0x02000000	reg.h	Use 11b base rate for ACK/CTS [5211+]
35030	AR5K_STA_ID1_SELFGEN_DEF_ANT	0x04000000	reg.h	Use def. antenna for self generated frames
35031	AR5K_STA_ID1_CRYPT_MIC_EN	0x08000000	reg.h	Enable MIC
35032	AR5K_STA_ID1_KEYSRCH_MODE	0x10000000	reg.h	Look up key when key id != 0
35033	AR5K_STA_ID1_PRESERVE_SEQ_NUM	0x20000000	reg.h	Preserve sequence number
35034	AR5K_STA_ID1_CBCIV_ENDIAN	0x40000000	reg.h	???
35035	AR5K_STA_ID1_KEYSRCH_MCAST	0x80000000	reg.h	Do key cache search for mcast frames
35036	AR5K_BSS_ID0	0x8008	reg.h
35037	AR5K_BSS_ID1	0x800c	reg.h
35038	AR5K_BSS_ID1_AID	0xffff0000	reg.h
35039	AR5K_BSS_ID1_AID_S	16	reg.h
35040	AR5K_SLOT_TIME	0x8010	reg.h
35041	AR5K_TIME_OUT	0x8014	reg.h	Register Address
35042	AR5K_TIME_OUT_ACK	0x00001fff	reg.h	ACK timeout mask
35043	AR5K_TIME_OUT_ACK_S	0	reg.h
35044	AR5K_TIME_OUT_CTS	0x1fff0000	reg.h	CTS timeout mask
35045	AR5K_TIME_OUT_CTS_S	16	reg.h
35046	AR5K_RSSI_THR	0x8018	reg.h	Register Address
35047	AR5K_RSSI_THR_M	0x000000ff	reg.h	Mask for RSSI threshold [5211+]
35048	AR5K_RSSI_THR_BMISS_5210	0x00000700	reg.h	Mask for Beacon Missed threshold [5210]
35049	AR5K_RSSI_THR_BMISS_5210_S	8	reg.h
35050	AR5K_RSSI_THR_BMISS_5211	0x0000ff00	reg.h	Mask for Beacon Missed threshold [5211+]
35051	AR5K_RSSI_THR_BMISS_5211_S	8	reg.h
35052	AR5K_RSSI_THR_BMISS	(ah->ah_version == AR5K_AR5210 ? \ AR5K_RSSI_THR_BMISS_5210 : AR5K_RSSI_THR_BMISS_5211)	reg.h
35053	AR5K_RSSI_THR_BMISS_S	8	reg.h
35054	AR5K_NODCU_RETRY_LMT	0x801c	reg.h	Register Address
35055	AR5K_NODCU_RETRY_LMT_SH_RETRY	0x0000000f	reg.h	Short retry limit mask
35056	AR5K_NODCU_RETRY_LMT_SH_RETRY_S	0	reg.h
35057	AR5K_NODCU_RETRY_LMT_LG_RETRY	0x000000f0	reg.h	Long retry mask
35058	AR5K_NODCU_RETRY_LMT_LG_RETRY_S	4	reg.h
35059	AR5K_NODCU_RETRY_LMT_SSH_RETRY	0x00003f00	reg.h	Station short retry limit mask
35060	AR5K_NODCU_RETRY_LMT_SSH_RETRY_	8	reg.h
35061	AR5K_NODCU_RETRY_LMT_SLG_RETRY	0x000fc000	reg.h	Station long retry limit mask
35062	AR5K_NODCU_RETRY_LMT_SLG_RETRY_	14	reg.h
35063	AR5K_NODCU_RETRY_LMT_CW_MIN	0x3ff00000	reg.h	Minimum contention window mask
35064	AR5K_NODCU_RETRY_LMT_CW_MIN_S	20	reg.h
35065	AR5K_USEC_5210	0x8020	reg.h	Register Address [5210]
35066	AR5K_USEC_5211	0x801c	reg.h	Register Address [5211+]
35067	AR5K_USEC	(ah->ah_version == AR5K_AR5210 ? \ AR5K_USEC_5210 : AR5K_USEC_5211)	reg.h
35068	AR5K_USEC_1	0x0000007f	reg.h	clock cycles for 1us
35069	AR5K_USEC_1_S	0	reg.h
35070	AR5K_USEC_32	0x00003f80	reg.h	clock cycles for 1us while on 32Mhz clock
35071	AR5K_USEC_32_S	7	reg.h
35072	AR5K_USEC_TX_LATENCY_5211	0x007fc000	reg.h
35073	AR5K_USEC_TX_LATENCY_5211_S	14	reg.h
35074	AR5K_USEC_RX_LATENCY_5211	0x1f800000	reg.h
35075	AR5K_USEC_RX_LATENCY_5211_S	23	reg.h
35076	AR5K_USEC_TX_LATENCY_5210	0x000fc000	reg.h	also for 5311
35077	AR5K_USEC_TX_LATENCY_5210_S	14	reg.h
35078	AR5K_USEC_RX_LATENCY_5210	0x03f00000	reg.h	also for 5311
35079	AR5K_USEC_RX_LATENCY_5210_S	20	reg.h
35080	AR5K_BEACON_5210	0x8024	reg.h	Register Address [5210]
35081	AR5K_BEACON_5211	0x8020	reg.h	Register Address [5211+]
35082	AR5K_BEACON	(ah->ah_version == AR5K_AR5210 ? \ AR5K_BEACON_5210 : AR5K_BEACON_5211)	reg.h
35083	AR5K_BEACON_PERIOD	0x0000ffff	reg.h	Mask for beacon period
35084	AR5K_BEACON_PERIOD_S	0	reg.h
35085	AR5K_BEACON_TIM	0x007f0000	reg.h	Mask for TIM offset
35086	AR5K_BEACON_TIM_S	16	reg.h
35087	AR5K_BEACON_ENABLE	0x00800000	reg.h	Enable beacons
35088	AR5K_BEACON_RESET_TSF	0x01000000	reg.h	Force TSF reset
35089	AR5K_CFP_PERIOD_5210	0x8028	reg.h
35090	AR5K_CFP_PERIOD_5211	0x8024	reg.h
35091	AR5K_CFP_PERIOD	(ah->ah_version == AR5K_AR5210 ? \ AR5K_CFP_PERIOD_5210 : AR5K_CFP_PERIOD_5211)	reg.h
35092	AR5K_TIMER0_5210	0x802c	reg.h
35093	AR5K_TIMER0_5211	0x8028	reg.h
35094	AR5K_TIMER0	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER0_5210 : AR5K_TIMER0_5211)	reg.h
35095	AR5K_TIMER1_5210	0x8030	reg.h
35096	AR5K_TIMER1_5211	0x802c	reg.h
35097	AR5K_TIMER1	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER1_5210 : AR5K_TIMER1_5211)	reg.h
35098	AR5K_TIMER2_5210	0x8034	reg.h
35099	AR5K_TIMER2_5211	0x8030	reg.h
35100	AR5K_TIMER2	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER2_5210 : AR5K_TIMER2_5211)	reg.h
35101	AR5K_TIMER3_5210	0x8038	reg.h
35102	AR5K_TIMER3_5211	0x8034	reg.h
35103	AR5K_TIMER3	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER3_5210 : AR5K_TIMER3_5211)	reg.h
35104	AR5K_IFS0	0x8040	reg.h
35105	AR5K_IFS0_SIFS	0x000007ff	reg.h
35106	AR5K_IFS0_SIFS_S	0	reg.h
35107	AR5K_IFS0_DIFS	0x007ff800	reg.h
35108	AR5K_IFS0_DIFS_S	11	reg.h
35109	AR5K_IFS1	0x8044	reg.h
35110	AR5K_IFS1_PIFS	0x00000fff	reg.h
35111	AR5K_IFS1_PIFS_S	0	reg.h
35112	AR5K_IFS1_EIFS	0x03fff000	reg.h
35113	AR5K_IFS1_EIFS_S	12	reg.h
35114	AR5K_IFS1_CS_EN	0x04000000	reg.h
35115	AR5K_CFP_DUR_5210	0x8048	reg.h
35116	AR5K_CFP_DUR_5211	0x8038	reg.h
35117	AR5K_CFP_DUR	(ah->ah_version == AR5K_AR5210 ? \ AR5K_CFP_DUR_5210 : AR5K_CFP_DUR_5211)	reg.h
35118	AR5K_RX_FILTER_5210	0x804c	reg.h	Register Address [5210]
35119	AR5K_RX_FILTER_5211	0x803c	reg.h	Register Address [5211+]
35120	AR5K_RX_FILTER	(ah->ah_version == AR5K_AR5210 ? \ AR5K_RX_FILTER_5210 : AR5K_RX_FILTER_5211)	reg.h
35121	AR5K_RX_FILTER_UCAST	0x00000001	reg.h	Don't filter unicast frames
35122	AR5K_RX_FILTER_MCAST	0x00000002	reg.h	Don't filter multicast frames
35123	AR5K_RX_FILTER_BCAST	0x00000004	reg.h	Don't filter broadcast frames
35124	AR5K_RX_FILTER_CONTROL	0x00000008	reg.h	Don't filter control frames
35125	AR5K_RX_FILTER_BEACON	0x00000010	reg.h	Don't filter beacon frames
35126	AR5K_RX_FILTER_PROM	0x00000020	reg.h	Set promiscuous mode
35127	AR5K_RX_FILTER_XRPOLL	0x00000040	reg.h	Don't filter XR poll frame [5212+]
35128	AR5K_RX_FILTER_PROBEREQ	0x00000080	reg.h	Don't filter probe requests [5212+]
35129	AR5K_RX_FILTER_PHYERR_5212	0x00000100	reg.h	Don't filter phy errors [5212+]
35130	AR5K_RX_FILTER_RADARERR_5212	0x00000200	reg.h	Don't filter phy radar errors [5212+]
35131	AR5K_RX_FILTER_PHYERR_5211	0x00000040	reg.h	[5211]
35132	AR5K_RX_FILTER_RADARERR_5211	0x00000080	reg.h	[5211]
35133	AR5K_RX_FILTER_PHYERR	((ah->ah_version == AR5K_AR5211 ? \ AR5K_RX_FILTER_PHYERR_5211 : AR5K_RX_FILTER_PHYERR_5212))	reg.h
35134	AR5K_RX_FILTER_RADARERR	((ah->ah_version == AR5K_AR5211 ? \ AR5K_RX_FILTER_RADARERR_5211 : AR5K_RX_FILTER_RADARERR_5212))	reg.h
35135	AR5K_MCAST_FILTER0_5210	0x8050	reg.h
35136	AR5K_MCAST_FILTER0_5211	0x8040	reg.h
35137	AR5K_MCAST_FILTER0	(ah->ah_version == AR5K_AR5210 ? \ AR5K_MCAST_FILTER0_5210 : AR5K_MCAST_FILTER0_5211)	reg.h
35138	AR5K_MCAST_FILTER1_5210	0x8054	reg.h
35139	AR5K_MCAST_FILTER1_5211	0x8044	reg.h
35140	AR5K_MCAST_FILTER1	(ah->ah_version == AR5K_AR5210 ? \ AR5K_MCAST_FILTER1_5210 : AR5K_MCAST_FILTER1_5211)	reg.h
35141	AR5K_TX_MASK0	0x8058	reg.h
35142	AR5K_TX_MASK1	0x805c	reg.h
35143	AR5K_CLR_TMASK	0x8060	reg.h
35144	AR5K_TRIG_LVL	0x8064	reg.h
35145	AR5K_DIAG_SW_5210	0x8068	reg.h	Register Address [5210]
35146	AR5K_DIAG_SW_5211	0x8048	reg.h	Register Address [5211+]
35147	AR5K_DIAG_SW	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_5210 : AR5K_DIAG_SW_5211)	reg.h
35148	AR5K_DIAG_SW_DIS_WEP_ACK	0x00000001	reg.h	Disable ACKs if WEP key is invalid
35149	AR5K_DIAG_SW_DIS_ACK	0x00000002	reg.h	Disable ACKs
35150	AR5K_DIAG_SW_DIS_CTS	0x00000004	reg.h	Disable CTSs
35151	AR5K_DIAG_SW_DIS_ENC	0x00000008	reg.h	Disable encryption
35152	AR5K_DIAG_SW_DIS_DEC	0x00000010	reg.h	Disable decryption
35153	AR5K_DIAG_SW_DIS_TX	0x00000020	reg.h	Disable transmit [5210]
35154	AR5K_DIAG_SW_DIS_RX_5210	0x00000040	reg.h	Disable recieve
35155	AR5K_DIAG_SW_DIS_RX_5211	0x00000020	reg.h
35156	AR5K_DIAG_SW_DIS_RX	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_DIS_RX_5210 : AR5K_DIAG_SW_DIS_RX_5211)	reg.h
35157	AR5K_DIAG_SW_LOOP_BACK_5210	0x00000080	reg.h	Loopback (i guess it goes with DIS_TX) [5210]
35158	AR5K_DIAG_SW_LOOP_BACK_5211	0x00000040	reg.h
35159	AR5K_DIAG_SW_LOOP_BACK	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_LOOP_BACK_5210 : AR5K_DIAG_SW_LOOP_BACK_5211)	reg.h
35160	AR5K_DIAG_SW_CORR_FCS_5210	0x00000100	reg.h	Corrupted FCS
35161	AR5K_DIAG_SW_CORR_FCS_5211	0x00000080	reg.h
35162	AR5K_DIAG_SW_CORR_FCS	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_CORR_FCS_5210 : AR5K_DIAG_SW_CORR_FCS_5211)	reg.h
35163	AR5K_DIAG_SW_CHAN_INFO_5210	0x00000200	reg.h	Dump channel info
35164	AR5K_DIAG_SW_CHAN_INFO_5211	0x00000100	reg.h
35165	AR5K_DIAG_SW_CHAN_INFO	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_CHAN_INFO_5210 : AR5K_DIAG_SW_CHAN_INFO_5211)	reg.h
35166	AR5K_DIAG_SW_EN_SCRAM_SEED_5210	0x00000400	reg.h	Enable fixed scrambler seed
35167	AR5K_DIAG_SW_EN_SCRAM_SEED_5211	0x00000200	reg.h
35168	AR5K_DIAG_SW_EN_SCRAM_SEED	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_EN_SCRAM_SEED_5210 : AR5K_DIAG_SW_EN_SCRAM_SEED_5211)	reg.h
35169	AR5K_DIAG_SW_ECO_ENABLE	0x00000400	reg.h	[5211+]
35170	AR5K_DIAG_SW_SCVRAM_SEED	0x0003f800	reg.h	[5210]
35171	AR5K_DIAG_SW_SCRAM_SEED_M	0x0001fc00	reg.h	Scrambler seed mask
35172	AR5K_DIAG_SW_SCRAM_SEED_S	10	reg.h
35173	AR5K_DIAG_SW_DIS_SEQ_INC	0x00040000	reg.h	Disable seqnum increment (?)[5210]
35174	AR5K_DIAG_SW_FRAME_NV0_5210	0x00080000	reg.h
35175	AR5K_DIAG_SW_FRAME_NV0_5211	0x00020000	reg.h	Accept frames of non-zero protocol number
35176	AR5K_DIAG_SW_FRAME_NV0	(ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_FRAME_NV0_5210 : AR5K_DIAG_SW_FRAME_NV0_5211)	reg.h
35177	AR5K_DIAG_SW_OBSPT_M	0x000c0000	reg.h	Observation point select (?)
35178	AR5K_DIAG_SW_OBSPT_S	18	reg.h
35179	AR5K_DIAG_SW_RX_CLEAR_HIGH	0x0010000	reg.h	Force RX Clear high
35180	AR5K_DIAG_SW_IGNORE_CARR_SENSE	0x0020000	reg.h	Ignore virtual carrier sense
35181	AR5K_DIAG_SW_CHANEL_IDLE_HIGH	0x0040000	reg.h	Force channel idle high
35182	AR5K_DIAG_SW_PHEAR_ME	0x0080000	reg.h	???
35183	AR5K_TSF_L32_5210	0x806c	reg.h
35184	AR5K_TSF_L32_5211	0x804c	reg.h
35185	AR5K_TSF_L32	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TSF_L32_5210 : AR5K_TSF_L32_5211)	reg.h
35186	AR5K_TSF_U32_5210	0x8070	reg.h
35187	AR5K_TSF_U32_5211	0x8050	reg.h
35188	AR5K_TSF_U32	(ah->ah_version == AR5K_AR5210 ? \ AR5K_TSF_U32_5210 : AR5K_TSF_U32_5211)	reg.h
35189	AR5K_LAST_TSTP	0x8080	reg.h
35190	AR5K_ADDAC_TEST	0x8054	reg.h	Register Address
35191	AR5K_ADDAC_TEST_TXCONT	0x00000001	reg.h	Test continuous tx
35192	AR5K_ADDAC_TEST_TST_MODE	0x00000002	reg.h	Test mode
35193	AR5K_ADDAC_TEST_LOOP_EN	0x00000004	reg.h	Enable loop
35194	AR5K_ADDAC_TEST_LOOP_LEN	0x00000008	reg.h	Loop length (field)
35195	AR5K_ADDAC_TEST_USE_U8	0x00004000	reg.h	Use upper 8 bits
35196	AR5K_ADDAC_TEST_MSB	0x00008000	reg.h	State of MSB
35197	AR5K_ADDAC_TEST_TRIG_SEL	0x00010000	reg.h	Trigger select
35198	AR5K_ADDAC_TEST_TRIG_PTY	0x00020000	reg.h	Trigger polarity
35199	AR5K_ADDAC_TEST_RXCONT	0x00040000	reg.h	Continuous capture
35200	AR5K_ADDAC_TEST_CAPTURE	0x00080000	reg.h	Begin capture
35201	AR5K_ADDAC_TEST_TST_ARM	0x00100000	reg.h	ARM rx buffer for capture
35202	AR5K_DEFAULT_ANTENNA	0x8058	reg.h
35203	AR5K_FRAME_CTL_QOSM	0x805c	reg.h
35204	AR5K_SEQ_MASK	0x8060	reg.h
35205	AR5K_RETRY_CNT	0x8084	reg.h	Register Address [5210]
35206	AR5K_RETRY_CNT_SSH	0x0000003f	reg.h	Station short retry count (?)
35207	AR5K_RETRY_CNT_SLG	0x00000fc0	reg.h	Station long retry count (?)
35208	AR5K_BACKOFF	0x8088	reg.h	Register Address [5210]
35209	AR5K_BACKOFF_CW	0x000003ff	reg.h	Backoff Contention Window (?)
35210	AR5K_BACKOFF_CNT	0x03ff0000	reg.h	Backoff count (?)
35211	AR5K_NAV_5210	0x808c	reg.h
35212	AR5K_NAV_5211	0x8084	reg.h
35213	AR5K_NAV	(ah->ah_version == AR5K_AR5210 ? \ AR5K_NAV_5210 : AR5K_NAV_5211)	reg.h
35214	AR5K_RTS_OK_5210	0x8090	reg.h
35215	AR5K_RTS_OK_5211	0x8088	reg.h
35216	AR5K_RTS_OK	(ah->ah_version == AR5K_AR5210 ? \ AR5K_RTS_OK_5210 : AR5K_RTS_OK_5211)	reg.h
35217	AR5K_RTS_FAIL_5210	0x8094	reg.h
35218	AR5K_RTS_FAIL_5211	0x808c	reg.h
35219	AR5K_RTS_FAIL	(ah->ah_version == AR5K_AR5210 ? \ AR5K_RTS_FAIL_5210 : AR5K_RTS_FAIL_5211)	reg.h
35220	AR5K_ACK_FAIL_5210	0x8098	reg.h
35221	AR5K_ACK_FAIL_5211	0x8090	reg.h
35222	AR5K_ACK_FAIL	(ah->ah_version == AR5K_AR5210 ? \ AR5K_ACK_FAIL_5210 : AR5K_ACK_FAIL_5211)	reg.h
35223	AR5K_FCS_FAIL_5210	0x809c	reg.h
35224	AR5K_FCS_FAIL_5211	0x8094	reg.h
35225	AR5K_FCS_FAIL	(ah->ah_version == AR5K_AR5210 ? \ AR5K_FCS_FAIL_5210 : AR5K_FCS_FAIL_5211)	reg.h
35226	AR5K_BEACON_CNT_5210	0x80a0	reg.h
35227	AR5K_BEACON_CNT_5211	0x8098	reg.h
35228	AR5K_BEACON_CNT	(ah->ah_version == AR5K_AR5210 ? \ AR5K_BEACON_CNT_5210 : AR5K_BEACON_CNT_5211)	reg.h
35229	AR5K_TPC	0x80e8	reg.h
35230	AR5K_TPC_ACK	0x0000003f	reg.h	ack frames
35231	AR5K_TPC_ACK_S	0	reg.h
35232	AR5K_TPC_CTS	0x00003f00	reg.h	cts frames
35233	AR5K_TPC_CTS_S	8	reg.h
35234	AR5K_TPC_CHIRP	0x003f0000	reg.h	chirp frames
35235	AR5K_TPC_CHIRP_S	16	reg.h
35236	AR5K_TPC_DOPPLER	0x0f000000	reg.h	doppler chirp span
35237	AR5K_TPC_DOPPLER_S	24	reg.h
35238	AR5K_XRMODE	0x80c0	reg.h	Register Address
35239	AR5K_XRMODE_POLL_TYPE_M	0x0000003f	reg.h	Mask for Poll type (?)
35240	AR5K_XRMODE_POLL_TYPE_S	0	reg.h
35241	AR5K_XRMODE_POLL_SUBTYPE_M	0x0000003c	reg.h	Mask for Poll subtype (?)
35242	AR5K_XRMODE_POLL_SUBTYPE_S	2	reg.h
35243	AR5K_XRMODE_POLL_WAIT_ALL	0x00000080	reg.h	Wait for poll
35244	AR5K_XRMODE_SIFS_DELAY	0x000fff00	reg.h	Mask for SIFS delay
35245	AR5K_XRMODE_FRAME_HOLD_M	0xfff00000	reg.h	Mask for frame hold (?)
35246	AR5K_XRMODE_FRAME_HOLD_S	20	reg.h
35247	AR5K_XRDELAY	0x80c4	reg.h	Register Address
35248	AR5K_XRDELAY_SLOT_DELAY_M	0x0000ffff	reg.h	Mask for slot delay
35249	AR5K_XRDELAY_SLOT_DELAY_S	0	reg.h
35250	AR5K_XRDELAY_CHIRP_DELAY_M	0xffff0000	reg.h	Mask for CHIRP data delay
35251	AR5K_XRDELAY_CHIRP_DELAY_S	16	reg.h
35252	AR5K_XRTIMEOUT	0x80c8	reg.h	Register Address
35253	AR5K_XRTIMEOUT_CHIRP_M	0x0000ffff	reg.h	Mask for CHIRP timeout
35254	AR5K_XRTIMEOUT_CHIRP_S	0	reg.h
35255	AR5K_XRTIMEOUT_POLL_M	0xffff0000	reg.h	Mask for Poll timeout
35256	AR5K_XRTIMEOUT_POLL_S	16	reg.h
35257	AR5K_XRCHIRP	0x80cc	reg.h	Register Address
35258	AR5K_XRCHIRP_SEND	0x00000001	reg.h	Send CHIRP
35259	AR5K_XRCHIRP_GAP	0xffff0000	reg.h	Mask for CHIRP gap (?)
35260	AR5K_XRSTOMP	0x80d0	reg.h	Register Address
35261	AR5K_XRSTOMP_TX	0x00000001	reg.h	Stomp Tx (?)
35262	AR5K_XRSTOMP_RX	0x00000002	reg.h	Stomp Rx (?)
35263	AR5K_XRSTOMP_TX_RSSI	0x00000004	reg.h	Stomp Tx RSSI (?)
35264	AR5K_XRSTOMP_TX_BSSID	0x00000008	reg.h	Stomp Tx BSSID (?)
35265	AR5K_XRSTOMP_DATA	0x00000010	reg.h	Stomp data (?)
35266	AR5K_XRSTOMP_RSSI_THRES	0x0000ff00	reg.h	Mask for XR RSSI threshold
35267	AR5K_SLEEP0	0x80d4	reg.h	Register Address
35268	AR5K_SLEEP0_NEXT_DTIM	0x0007ffff	reg.h	Mask for next DTIM (?)
35269	AR5K_SLEEP0_NEXT_DTIM_S	0	reg.h
35270	AR5K_SLEEP0_ASSUME_DTIM	0x00080000	reg.h	Assume DTIM
35271	AR5K_SLEEP0_ENH_SLEEP_EN	0x00100000	reg.h	Enable enchanced sleep control
35272	AR5K_SLEEP0_CABTO	0xff000000	reg.h	Mask for CAB Time Out
35273	AR5K_SLEEP0_CABTO_S	24	reg.h
35274	AR5K_SLEEP1	0x80d8	reg.h	Register Address
35275	AR5K_SLEEP1_NEXT_TIM	0x0007ffff	reg.h	Mask for next TIM (?)
35276	AR5K_SLEEP1_NEXT_TIM_S	0	reg.h
35277	AR5K_SLEEP1_BEACON_TO	0xff000000	reg.h	Mask for Beacon Time Out
35278	AR5K_SLEEP1_BEACON_TO_S	24	reg.h
35279	AR5K_SLEEP2	0x80dc	reg.h	Register Address
35280	AR5K_SLEEP2_TIM_PER	0x0000ffff	reg.h	Mask for TIM period (?)
35281	AR5K_SLEEP2_TIM_PER_S	0	reg.h
35282	AR5K_SLEEP2_DTIM_PER	0xffff0000	reg.h	Mask for DTIM period (?)
35283	AR5K_SLEEP2_DTIM_PER_S	16	reg.h
35284	AR5K_BSS_IDM0	0x80e0	reg.h	Upper bits
35285	AR5K_BSS_IDM1	0x80e4	reg.h	Lower bits
35286	AR5K_TXPC	0x80e8	reg.h	Register Address
35287	AR5K_TXPC_ACK_M	0x0000003f	reg.h	ACK tx power
35288	AR5K_TXPC_ACK_S	0	reg.h
35289	AR5K_TXPC_CTS_M	0x00003f00	reg.h	CTS tx power
35290	AR5K_TXPC_CTS_S	8	reg.h
35291	AR5K_TXPC_CHIRP_M	0x003f0000	reg.h	CHIRP tx power
35292	AR5K_TXPC_CHIRP_S	16	reg.h
35293	AR5K_TXPC_DOPPLER	0x0f000000	reg.h	Doppler chirp span (?)
35294	AR5K_TXPC_DOPPLER_S	24	reg.h
35295	AR5K_PROFCNT_TX	0x80ec	reg.h	Tx count
35296	AR5K_PROFCNT_RX	0x80f0	reg.h	Rx count
35297	AR5K_PROFCNT_RXCLR	0x80f4	reg.h	Clear Rx count
35298	AR5K_PROFCNT_CYCLE	0x80f8	reg.h	Cycle count (?)
35299	AR5K_QUIET_CTL1	0x80fc	reg.h	Register Address
35300	AR5K_QUIET_CTL1_NEXT_QT_TSF	0x0000ffff	reg.h	Next quiet period TSF (TU)
35301	AR5K_QUIET_CTL1_NEXT_QT_TSF_S	0	reg.h
35302	AR5K_QUIET_CTL1_QT_EN	0x00010000	reg.h	Enable quiet period
35303	AR5K_QUIET_CTL1_ACK_CTS_EN	0x00020000	reg.h	Send ACK/CTS during quiet period
35304	AR5K_QUIET_CTL2	0x8100	reg.h	Register Address
35305	AR5K_QUIET_CTL2_QT_PER	0x0000ffff	reg.h	Mask for quiet period periodicity
35306	AR5K_QUIET_CTL2_QT_PER_S	0	reg.h
35307	AR5K_QUIET_CTL2_QT_DUR	0xffff0000	reg.h	Mask for quiet period duration
35308	AR5K_QUIET_CTL2_QT_DUR_S	16	reg.h
35309	AR5K_TSF_PARM	0x8104	reg.h	Register Address
35310	AR5K_TSF_PARM_INC	0x000000ff	reg.h	Mask for TSF increment
35311	AR5K_TSF_PARM_INC_S	0	reg.h
35312	AR5K_QOS_NOACK	0x8108	reg.h	Register Address
35313	AR5K_QOS_NOACK_2BIT_VALUES	0x0000000f	reg.h	???
35314	AR5K_QOS_NOACK_2BIT_VALUES_S	0	reg.h
35315	AR5K_QOS_NOACK_BIT_OFFSET	0x00000070	reg.h	???
35316	AR5K_QOS_NOACK_BIT_OFFSET_S	4	reg.h
35317	AR5K_QOS_NOACK_BYTE_OFFSET	0x00000180	reg.h	???
35318	AR5K_QOS_NOACK_BYTE_OFFSET_S	7	reg.h
35319	AR5K_PHY_ERR_FIL	0x810c	reg.h
35320	AR5K_PHY_ERR_FIL_RADAR	0x00000020	reg.h	Radar signal
35321	AR5K_PHY_ERR_FIL_OFDM	0x00020000	reg.h	OFDM false detect (ANI)
35322	AR5K_PHY_ERR_FIL_CCK	0x02000000	reg.h	CCK false detect (ANI)
35323	AR5K_XRLAT_TX	0x8110	reg.h
35324	AR5K_ACKSIFS	0x8114	reg.h	Register Address
35325	AR5K_ACKSIFS_INC	0x00000000	reg.h	ACK SIFS Increment (field)
35326	AR5K_MIC_QOS_CTL	0x8118	reg.h	Register Address
35327	AR5K_MIC_QOS_CTL_MQ_EN	0x00010000	reg.h	Enable MIC QoS
35328	AR5K_MIC_QOS_SEL	0x811c	reg.h
35329	AR5K_MISC_MODE	0x8120	reg.h	Register Address
35330	AR5K_MISC_MODE_FBSSID_MATCH	0x00000001	reg.h	Force BSSID match
35331	AR5K_MISC_MODE_ACKSIFS_MEM	0x00000002	reg.h	ACK SIFS memory (?)
35332	AR5K_MISC_MODE_COMBINED_MIC	0x00000004	reg.h	use rx/tx MIC key
35333	AR5K_OFDM_FIL_CNT	0x8124	reg.h
35334	AR5K_CCK_FIL_CNT	0x8128	reg.h
35335	AR5K_PHYERR_CNT1	0x812c	reg.h
35336	AR5K_PHYERR_CNT1_MASK	0x8130	reg.h
35337	AR5K_PHYERR_CNT2	0x8134	reg.h
35338	AR5K_PHYERR_CNT2_MASK	0x8138	reg.h
35339	AR5K_TSF_THRES	0x813c	reg.h
35340	AR5K_RATE_ACKSIFS_BASE	0x8680	reg.h	Register Address
35341	AR5K_RATE_ACKSIFS_NORMAL	0x00000001	reg.h	Normal SIFS (field)
35342	AR5K_RATE_ACKSIFS_TURBO	0x00000400	reg.h	Turbo SIFS (field)
35343	AR5K_RATE_DUR_BASE	0x8700	reg.h
35344	AR5K_RATE2DB_BASE	0x87c0	reg.h
35345	AR5K_DB2RATE_BASE	0x87e0	reg.h
35346	AR5K_KEYTABLE_0_5210	0x9000	reg.h
35347	AR5K_KEYTABLE_0_5211	0x8800	reg.h
35348	AR5K_KEYTABLE_TYPE_40	0x00000000	reg.h
35349	AR5K_KEYTABLE_TYPE_104	0x00000001	reg.h
35350	AR5K_KEYTABLE_TYPE_128	0x00000003	reg.h
35351	AR5K_KEYTABLE_TYPE_TKIP	0x00000004	reg.h	[5212+]
35352	AR5K_KEYTABLE_TYPE_AES	0x00000005	reg.h	[5211+]
35353	AR5K_KEYTABLE_TYPE_CCM	0x00000006	reg.h	[5212+]
35354	AR5K_KEYTABLE_TYPE_NULL	0x00000007	reg.h	[5211+]
35355	AR5K_KEYTABLE_ANTENNA	0x00000008	reg.h	[5212+]
35356	AR5K_KEYTABLE_VALID	0x00008000	reg.h
35357	AR5K_KEYTABLE_MIC_OFFSET	64	reg.h
35358	AR5K_KEYTABLE_SIZE_5210	64	reg.h
35359	AR5K_KEYTABLE_SIZE_5211	128	reg.h
35360	AR5K_KEYTABLE_SIZE	(ah->ah_version == AR5K_AR5210 ? \ AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211)	reg.h
35361	AR5K_PHY_BASE	0x9800	reg.h
35362	AR5K_PHY_TST2	0x9800	reg.h	Register Address
35363	AR5K_PHY_TST2_TRIG_SEL	0x00000007	reg.h	Trigger select (?)
35364	AR5K_PHY_TST2_TRIG	0x00000010	reg.h	Trigger (?)
35365	AR5K_PHY_TST2_CBUS_MODE	0x00000060	reg.h	Cardbus mode (?)
35366	AR5K_PHY_TST2_CLK32	0x00000400	reg.h	CLK_OUT is CLK32 (32Khz external)
35367	AR5K_PHY_TST2_CHANCOR_DUMP_EN	0x00000800	reg.h	Enable Chancor dump (?)
35368	AR5K_PHY_TST2_EVEN_CHANCOR_DUMP	0x00001000	reg.h	Even Chancor dump (?)
35369	AR5K_PHY_TST2_RFSILENT_EN	0x00002000	reg.h	Enable RFSILENT
35370	AR5K_PHY_TST2_ALT_RFDATA	0x00004000	reg.h	Alternate RFDATA (5-2GHz switch ?)
35371	AR5K_PHY_TST2_MINI_OBS_EN	0x00008000	reg.h	Enable mini OBS (?)
35372	AR5K_PHY_TST2_RX2_IS_RX5_INV	0x00010000	reg.h	2GHz rx path is the 5GHz path inverted (?)
35373	AR5K_PHY_TST2_SLOW_CLK160	0x00020000	reg.h	Slow CLK160 (?)
35374	AR5K_PHY_TST2_AGC_OBS_SEL_3	0x00040000	reg.h	AGC OBS Select 3 (?)
35375	AR5K_PHY_TST2_BBB_OBS_SEL	0x00080000	reg.h	BB OBS Select (field ?)
35376	AR5K_PHY_TST2_ADC_OBS_SEL	0x00800000	reg.h	ADC OBS Select (field ?)
35377	AR5K_PHY_TST2_RX_CLR_SEL	0x08000000	reg.h	RX Clear Select (?)
35378	AR5K_PHY_TST2_FORCE_AGC_CLR	0x10000000	reg.h	Force AGC clear (?)
35379	AR5K_PHY_SHIFT_2GHZ	0x00004007	reg.h	Used to access 2GHz radios
35380	AR5K_PHY_SHIFT_5GHZ	0x00000007	reg.h	Used to access 5GHz radios (default)
35381	AR5K_PHY_TURBO	0x9804	reg.h	Register Address
35382	AR5K_PHY_TURBO_MODE	0x00000001	reg.h	Enable turbo mode
35383	AR5K_PHY_TURBO_SHORT	0x00000002	reg.h	Set short symbols to turbo mode
35384	AR5K_PHY_TURBO_MIMO	0x00000004	reg.h	Set turbo for mimo mimo
35385	AR5K_PHY_AGC	0x9808	reg.h	Register Address
35386	AR5K_PHY_TST1	0x9808	reg.h
35387	AR5K_PHY_AGC_DISABLE	0x08000000	reg.h	Disable AGC to A2 (?)
35388	AR5K_PHY_TST1_TXHOLD	0x00003800	reg.h	Set tx hold (?)
35389	AR5K_PHY_TST1_TXSRC_SRC	0x00000002	reg.h	Used with bit 7 (?)
35390	AR5K_PHY_TST1_TXSRC_SRC_S	1	reg.h
35391	AR5K_PHY_TST1_TXSRC_ALT	0x00000080	reg.h	Set input to tsdac (?)
35392	AR5K_PHY_TST1_TXSRC_ALT_S	7	reg.h
35393	AR5K_PHY_TIMING_3	0x9814	reg.h
35394	AR5K_PHY_TIMING_3_DSC_MAN	0xfffe0000	reg.h
35395	AR5K_PHY_TIMING_3_DSC_MAN_S	17	reg.h
35396	AR5K_PHY_TIMING_3_DSC_EXP	0x0001e000	reg.h
35397	AR5K_PHY_TIMING_3_DSC_EXP_S	13	reg.h
35398	AR5K_PHY_CHIP_ID	0x9818	reg.h
35399	AR5K_PHY_ACT	0x981c	reg.h	Register Address
35400	AR5K_PHY_ACT_ENABLE	0x00000001	reg.h	Activate PHY
35401	AR5K_PHY_ACT_DISABLE	0x00000002	reg.h	Deactivate PHY
35402	AR5K_PHY_RF_CTL2	0x9824	reg.h	Register Address
35403	AR5K_PHY_RF_CTL2_TXF2TXD_START	0x0000000f	reg.h	TX frame to TX data start
35404	AR5K_PHY_RF_CTL2_TXF2TXD_START_	0	reg.h
35405	AR5K_PHY_RF_CTL3	0x9828	reg.h	Register Address
35406	AR5K_PHY_RF_CTL3_TXE2XLNA_ON	0x0000ff00	reg.h	TX end to XLNA on
35407	AR5K_PHY_RF_CTL3_TXE2XLNA_ON_S	8	reg.h
35408	AR5K_PHY_ADC_CTL	0x982c	reg.h
35409	AR5K_PHY_ADC_CTL_INBUFGAIN_OFF	0x00000003	reg.h
35410	AR5K_PHY_ADC_CTL_INBUFGAIN_OFF_	0	reg.h
35411	AR5K_PHY_ADC_CTL_PWD_DAC_OFF	0x00002000	reg.h
35412	AR5K_PHY_ADC_CTL_PWD_BAND_GAP_O	0x00004000	reg.h
35413	AR5K_PHY_ADC_CTL_PWD_ADC_OFF	0x00008000	reg.h
35414	AR5K_PHY_ADC_CTL_INBUFGAIN_ON	0x00030000	reg.h
35415	AR5K_PHY_ADC_CTL_INBUFGAIN_ON_S	16	reg.h
35416	AR5K_PHY_RF_CTL4	0x9834	reg.h	Register Address
35417	AR5K_PHY_RF_CTL4_TXF2XPA_A_ON	0x00000001	reg.h	TX frame to XPA A on (field)
35418	AR5K_PHY_RF_CTL4_TXF2XPA_B_ON	0x00000100	reg.h	TX frame to XPA B on (field)
35419	AR5K_PHY_RF_CTL4_TXE2XPA_A_OFF	0x00010000	reg.h	TX end to XPA A off (field)
35420	AR5K_PHY_RF_CTL4_TXE2XPA_B_OFF	0x01000000	reg.h	TX end to XPA B off (field)
35421	AR5K_PHY_PA_CTL	0x9838	reg.h	Register Address
35422	AR5K_PHY_PA_CTL_XPA_A_HI	0x00000001	reg.h	XPA A high (?)
35423	AR5K_PHY_PA_CTL_XPA_B_HI	0x00000002	reg.h	XPA B high (?)
35424	AR5K_PHY_PA_CTL_XPA_A_EN	0x00000004	reg.h	Enable XPA A
35425	AR5K_PHY_PA_CTL_XPA_B_EN	0x00000008	reg.h	Enable XPA B
35426	AR5K_PHY_SETTLING	0x9844	reg.h	Register Address
35427	AR5K_PHY_SETTLING_AGC	0x0000007f	reg.h	AGC settling time
35428	AR5K_PHY_SETTLING_AGC_S	0	reg.h
35429	AR5K_PHY_SETTLING_SWITCH	0x00003f80	reg.h	Switch settlig time
35430	AR5K_PHY_SETTLING_SWITCH_S	7	reg.h
35431	AR5K_PHY_GAIN	0x9848	reg.h	Register Address
35432	AR5K_PHY_GAIN_TXRX_ATTEN	0x0003f000	reg.h	TX-RX Attenuation
35433	AR5K_PHY_GAIN_TXRX_ATTEN_S	12	reg.h
35434	AR5K_PHY_GAIN_TXRX_RF_MAX	0x007c0000	reg.h
35435	AR5K_PHY_GAIN_TXRX_RF_MAX_S	18	reg.h
35436	AR5K_PHY_GAIN_OFFSET	0x984c	reg.h	Register Address
35437	AR5K_PHY_GAIN_OFFSET_RXTX_FLAG	0x00020000	reg.h	RX-TX flag (?)
35438	AR5K_PHY_DESIRED_SIZE	0x9850	reg.h	Register Address
35439	AR5K_PHY_DESIRED_SIZE_ADC	0x000000ff	reg.h	ADC desired size
35440	AR5K_PHY_DESIRED_SIZE_ADC_S	0	reg.h
35441	AR5K_PHY_DESIRED_SIZE_PGA	0x0000ff00	reg.h	PGA desired size
35442	AR5K_PHY_DESIRED_SIZE_PGA_S	8	reg.h
35443	AR5K_PHY_DESIRED_SIZE_TOT	0x0ff00000	reg.h	Total desired size
35444	AR5K_PHY_DESIRED_SIZE_TOT_S	20	reg.h
35445	AR5K_PHY_SIG	0x9858	reg.h	Register Address
35446	AR5K_PHY_SIG_FIRSTEP	0x0003f000	reg.h	FIRSTEP
35447	AR5K_PHY_SIG_FIRSTEP_S	12	reg.h
35448	AR5K_PHY_SIG_FIRPWR	0x03fc0000	reg.h	FIPWR
35449	AR5K_PHY_SIG_FIRPWR_S	18	reg.h
35450	AR5K_PHY_AGCCOARSE	0x985c	reg.h	Register Address
35451	AR5K_PHY_AGCCOARSE_LO	0x00007f80	reg.h	AGC Coarse low
35452	AR5K_PHY_AGCCOARSE_LO_S	7	reg.h
35453	AR5K_PHY_AGCCOARSE_HI	0x003f8000	reg.h	AGC Coarse high
35454	AR5K_PHY_AGCCOARSE_HI_S	15	reg.h
35455	AR5K_PHY_AGCCTL	0x9860	reg.h	Register address
35456	AR5K_PHY_AGCCTL_CAL	0x00000001	reg.h	Enable PHY calibration
35457	AR5K_PHY_AGCCTL_NF	0x00000002	reg.h	Enable Noise Floor calibration
35458	AR5K_PHY_AGCCTL_NF_EN	0x00008000	reg.h	Enable nf calibration to happen (?)
35459	AR5K_PHY_AGCCTL_NF_NOUPDATE	0x00020000	reg.h	Don't update nf automaticaly
35460	AR5K_PHY_NF	0x9864	reg.h	Register address
35461	AR5K_PHY_NF_M	0x000001ff	reg.h	Noise floor mask
35462	AR5K_PHY_NF_ACTIVE	0x00000100	reg.h	Noise floor calibration still active
35463	AR5K_PHY_NF_THRESH62	0x0007f000	reg.h	Thresh62 -check ANI patent- (field)
35464	AR5K_PHY_NF_THRESH62_S	12	reg.h
35465	AR5K_PHY_NF_MINCCA_PWR	0x0ff80000	reg.h	???
35466	AR5K_PHY_NF_MINCCA_PWR_S	19	reg.h
35467	AR5K_PHY_ADCSAT	0x9868	reg.h
35468	AR5K_PHY_ADCSAT_ICNT	0x0001f800	reg.h
35469	AR5K_PHY_ADCSAT_ICNT_S	11	reg.h
35470	AR5K_PHY_ADCSAT_THR	0x000007e0	reg.h
35471	AR5K_PHY_ADCSAT_THR_S	5	reg.h
35472	AR5K_PHY_WEAK_OFDM_HIGH_THR	0x9868	reg.h
35473	AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_	0x0000001f	reg.h
35474	AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_	0	reg.h
35475	AR5K_PHY_WEAK_OFDM_HIGH_THR_M1	0x00fe0000	reg.h
35476	AR5K_PHY_WEAK_OFDM_HIGH_THR_M1_	17	reg.h
35477	AR5K_PHY_WEAK_OFDM_HIGH_THR_M2	0x7f000000	reg.h
35478	AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_	24	reg.h
35479	AR5K_PHY_WEAK_OFDM_LOW_THR	0x986c	reg.h
35480	AR5K_PHY_WEAK_OFDM_LOW_THR_SELF	0x00000001	reg.h
35481	AR5K_PHY_WEAK_OFDM_LOW_THR_M2_C	0x00003f00	reg.h
35482	AR5K_PHY_WEAK_OFDM_LOW_THR_M2_C	8	reg.h
35483	AR5K_PHY_WEAK_OFDM_LOW_THR_M1	0x001fc000	reg.h
35484	AR5K_PHY_WEAK_OFDM_LOW_THR_M1_S	14	reg.h
35485	AR5K_PHY_WEAK_OFDM_LOW_THR_M2	0x0fe00000	reg.h
35486	AR5K_PHY_WEAK_OFDM_LOW_THR_M2_S	21	reg.h
35487	AR5K_PHY_SCR	0x9870	reg.h
35488	AR5K_PHY_SLMT	0x9874	reg.h
35489	AR5K_PHY_SLMT_32MHZ	0x0000007f	reg.h
35490	AR5K_PHY_SCAL	0x9878	reg.h
35491	AR5K_PHY_SCAL_32MHZ	0x0000000e	reg.h
35492	AR5K_PHY_SCAL_32MHZ_2417	0x0000000a	reg.h
35493	AR5K_PHY_SCAL_32MHZ_HB63	0x00000032	reg.h
35494	AR5K_PHY_PLL	0x987c	reg.h
35495	AR5K_PHY_PLL_20MHZ	0x00000013	reg.h	For half rate (?)
35496	AR5K_PHY_PLL_40MHZ_5211	0x00000018	reg.h
35497	AR5K_PHY_PLL_40MHZ_5212	0x000000aa	reg.h
35498	AR5K_PHY_PLL_40MHZ_5413	0x00000004	reg.h
35499	AR5K_PHY_PLL_40MHZ	(ah->ah_version == AR5K_AR5211 ? \ AR5K_PHY_PLL_40MHZ_5211 : AR5K_PHY_PLL_40MHZ_5212)	reg.h
35500	AR5K_PHY_PLL_44MHZ_5211	0x00000019	reg.h
35501	AR5K_PHY_PLL_44MHZ_5212	0x000000ab	reg.h
35502	AR5K_PHY_PLL_44MHZ	(ah->ah_version == AR5K_AR5211 ? \ AR5K_PHY_PLL_44MHZ_5211 : AR5K_PHY_PLL_44MHZ_5212)	reg.h
35503	AR5K_PHY_PLL_RF5111	0x00000000	reg.h
35504	AR5K_PHY_PLL_RF5112	0x00000040	reg.h
35505	AR5K_PHY_PLL_HALF_RATE	0x00000100	reg.h
35506	AR5K_PHY_PLL_QUARTER_RATE	0x00000200	reg.h
35507	AR5K_RF_BUFFER	0x989c	reg.h
35508	AR5K_RF_BUFFER_CONTROL_0	0x98c0	reg.h	Channel on 5110
35509	AR5K_RF_BUFFER_CONTROL_1	0x98c4	reg.h	Bank 7 on 5112
35510	AR5K_RF_BUFFER_CONTROL_2	0x98cc	reg.h	Bank 7 on 5111
35511	AR5K_RF_BUFFER_CONTROL_3	0x98d0	reg.h	Bank 2 on 5112
35512	AR5K_RF_BUFFER_CONTROL_4	0x98d4	reg.h	RF Stage register on 5110
35513	AR5K_RF_BUFFER_CONTROL_5	0x98d8	reg.h	Bank 3 on 5111
35514	AR5K_RF_BUFFER_CONTROL_6	0x98dc	reg.h	Bank 3 on 5112
35515	AR5K_PHY_RFSTG	0x98d4	reg.h
35516	AR5K_PHY_RFSTG_DISABLE	0x00000021	reg.h
35517	AR5K_PHY_BIN_MASK_1	0x9900	reg.h
35518	AR5K_PHY_BIN_MASK_2	0x9904	reg.h
35519	AR5K_PHY_BIN_MASK_3	0x9908	reg.h
35520	AR5K_PHY_BIN_MASK_CTL	0x990c	reg.h
35521	AR5K_PHY_BIN_MASK_CTL_MASK_4	0x00003fff	reg.h
35522	AR5K_PHY_BIN_MASK_CTL_MASK_4_S	0	reg.h
35523	AR5K_PHY_BIN_MASK_CTL_RATE	0xff000000	reg.h
35524	AR5K_PHY_BIN_MASK_CTL_RATE_S	24	reg.h
35525	AR5K_PHY_ANT_CTL	0x9910	reg.h	Register Address
35526	AR5K_PHY_ANT_CTL_TXRX_EN	0x00000001	reg.h	Enable TX/RX (?)
35527	AR5K_PHY_ANT_CTL_SECTORED_ANT	0x00000004	reg.h	Sectored Antenna
35528	AR5K_PHY_ANT_CTL_HITUNE5	0x00000008	reg.h	Hitune5 (?)
35529	AR5K_PHY_ANT_CTL_SWTABLE_IDLE	0x000003f0	reg.h	Switch table idle (?)
35530	AR5K_PHY_ANT_CTL_SWTABLE_IDLE_S	4	reg.h
35531	AR5K_PHY_RX_DELAY	0x9914	reg.h	Register Address
35532	AR5K_PHY_RX_DELAY_M	0x00003fff	reg.h	Mask for RX activate to receive delay (/100ns)
35533	AR5K_PHY_MAX_RX_LEN	0x991c	reg.h
35534	AR5K_PHY_IQ	0x9920	reg.h	Register Address
35535	AR5K_PHY_IQ_CORR_Q_Q_COFF	0x0000001f	reg.h	Mask for q correction info
35536	AR5K_PHY_IQ_CORR_Q_I_COFF	0x000007e0	reg.h	Mask for i correction info
35537	AR5K_PHY_IQ_CORR_Q_I_COFF_S	5	reg.h
35538	AR5K_PHY_IQ_CORR_ENABLE	0x00000800	reg.h	Enable i/q correction
35539	AR5K_PHY_IQ_CAL_NUM_LOG_MAX	0x0000f000	reg.h	Mask for max number of samples in log scale
35540	AR5K_PHY_IQ_CAL_NUM_LOG_MAX_S	12	reg.h
35541	AR5K_PHY_IQ_RUN	0x00010000	reg.h	Run i/q calibration
35542	AR5K_PHY_IQ_USE_PT_DF	0x00020000	reg.h	Use pilot track df (?)
35543	AR5K_PHY_IQ_EARLY_TRIG_THR	0x00200000	reg.h	Early trigger threshold (?) (field)
35544	AR5K_PHY_IQ_PILOT_MASK_EN	0x10000000	reg.h	Enable pilot mask (?)
35545	AR5K_PHY_IQ_CHAN_MASK_EN	0x20000000	reg.h	Enable channel mask (?)
35546	AR5K_PHY_IQ_SPUR_FILT_EN	0x40000000	reg.h	Enable spur filter
35547	AR5K_PHY_IQ_SPUR_RSSI_EN	0x80000000	reg.h	Enable spur rssi
35548	AR5K_PHY_OFDM_SELFCORR	0x9924	reg.h	Register Address
35549	AR5K_PHY_OFDM_SELFCORR_CYPWR_TH	0x00000001	reg.h	Enable cyclic RSSI thr 1
35550	AR5K_PHY_OFDM_SELFCORR_CYPWR_TH	0x000000fe	reg.h	Mask for Cyclic RSSI threshold 1
35551	AR5K_PHY_OFDM_SELFCORR_CYPWR_TH	1	reg.h
35552	AR5K_PHY_OFDM_SELFCORR_CYPWR_TH	0x00000100	reg.h	Cyclic RSSI threshold 3 (field) (?)
35553	AR5K_PHY_OFDM_SELFCORR_RSSI_1AT	0x00008000	reg.h	Enable 1A RSSI threshold (?)
35554	AR5K_PHY_OFDM_SELFCORR_RSSI_1AT	0x00010000	reg.h	1A RSSI threshold (field) (?)
35555	AR5K_PHY_OFDM_SELFCORR_LSCTHR_H	0x00800000	reg.h	Long sc threshold hi rssi (?)
35556	AR5K_PHY_WARM_RESET	0x9928	reg.h
35557	AR5K_PHY_CTL	0x992c	reg.h	Register Address
35558	AR5K_PHY_CTL_RX_DRAIN_RATE	0x00000001	reg.h	RX drain rate (?)
35559	AR5K_PHY_CTL_LATE_TX_SIG_SYM	0x00000002	reg.h	Late tx signal symbol (?)
35560	AR5K_PHY_CTL_GEN_SCRAMBLER	0x00000004	reg.h	Generate scrambler
35561	AR5K_PHY_CTL_TX_ANT_SEL	0x00000008	reg.h	TX antenna select
35562	AR5K_PHY_CTL_TX_ANT_STATIC	0x00000010	reg.h	Static TX antenna
35563	AR5K_PHY_CTL_RX_ANT_SEL	0x00000020	reg.h	RX antenna select
35564	AR5K_PHY_CTL_RX_ANT_STATIC	0x00000040	reg.h	Static RX antenna
35565	AR5K_PHY_CTL_LOW_FREQ_SLE_EN	0x00000080	reg.h	Enable low freq sleep
35566	AR5K_PHY_PAPD_PROBE	0x9930	reg.h
35567	AR5K_PHY_PAPD_PROBE_SH_HI_PAR	0x00000001	reg.h
35568	AR5K_PHY_PAPD_PROBE_PCDAC_BIAS	0x00000002	reg.h
35569	AR5K_PHY_PAPD_PROBE_COMP_GAIN	0x00000040	reg.h
35570	AR5K_PHY_PAPD_PROBE_TXPOWER	0x00007e00	reg.h
35571	AR5K_PHY_PAPD_PROBE_TXPOWER_S	9	reg.h
35572	AR5K_PHY_PAPD_PROBE_TX_NEXT	0x00008000	reg.h
35573	AR5K_PHY_PAPD_PROBE_PREDIST_EN	0x00010000	reg.h
35574	AR5K_PHY_PAPD_PROBE_TYPE	0x01800000	reg.h	[5112+]
35575	AR5K_PHY_PAPD_PROBE_TYPE_S	23	reg.h
35576	AR5K_PHY_PAPD_PROBE_TYPE_OFDM	0	reg.h
35577	AR5K_PHY_PAPD_PROBE_TYPE_XR	1	reg.h
35578	AR5K_PHY_PAPD_PROBE_TYPE_CCK	2	reg.h
35579	AR5K_PHY_PAPD_PROBE_GAINF	0xfe000000	reg.h
35580	AR5K_PHY_PAPD_PROBE_GAINF_S	25	reg.h
35581	AR5K_PHY_PAPD_PROBE_INI_5111	0x00004883	reg.h	[5212+]
35582	AR5K_PHY_PAPD_PROBE_INI_5112	0x00004882	reg.h	[5212+]
35583	AR5K_PHY_TXPOWER_RATE1	0x9934	reg.h
35584	AR5K_PHY_TXPOWER_RATE2	0x9938	reg.h
35585	AR5K_PHY_TXPOWER_RATE_MAX	0x993c	reg.h
35586	AR5K_PHY_TXPOWER_RATE_MAX_TPC_E	0x00000040	reg.h
35587	AR5K_PHY_TXPOWER_RATE3	0xa234	reg.h
35588	AR5K_PHY_TXPOWER_RATE4	0xa238	reg.h
35589	AR5K_PHY_FRAME_CTL_5210	0x9804	reg.h
35590	AR5K_PHY_FRAME_CTL_5211	0x9944	reg.h
35591	AR5K_PHY_FRAME_CTL	(ah->ah_version == AR5K_AR5210 ? \ AR5K_PHY_FRAME_CTL_5210 : AR5K_PHY_FRAME_CTL_5211)	reg.h
35592	AR5K_PHY_FRAME_CTL_TX_CLIP	0x00000038	reg.h	Mask for tx clip (?)
35593	AR5K_PHY_FRAME_CTL_TX_CLIP_S	3	reg.h
35594	AR5K_PHY_FRAME_CTL_PREP_CHINFO	0x00010000	reg.h	Prepend chan info
35595	AR5K_PHY_FRAME_CTL_EMU	0x80000000	reg.h
35596	AR5K_PHY_FRAME_CTL_EMU_S	31	reg.h
35597	AR5K_PHY_FRAME_CTL_TIMING_ERR	0x01000000	reg.h	PHY timing error
35598	AR5K_PHY_FRAME_CTL_PARITY_ERR	0x02000000	reg.h	Parity error
35599	AR5K_PHY_FRAME_CTL_ILLRATE_ERR	0x04000000	reg.h	Illegal rate
35600	AR5K_PHY_FRAME_CTL_ILLLEN_ERR	0x08000000	reg.h	Illegal length
35601	AR5K_PHY_FRAME_CTL_SERVICE_ERR	0x20000000	reg.h
35602	AR5K_PHY_FRAME_CTL_TXURN_ERR	0x40000000	reg.h	TX underrun
35603	AR5K_PHY_FRAME_CTL_INI	AR5K_PHY_FRAME_CTL_SERVICE_ERR \| \ AR5K_PHY_FRAME_CTL_TXURN_ERR \| \ AR5K_PHY_FRAME_CTL_ILLLEN_ERR \| \ AR5K_PHY_FRAME_CTL_ILLRAT	reg.h
35604	AR5K_PHY_TX_PWR_ADJ	0x994c	reg.h
35605	AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE	0x00000fc0	reg.h
35606	AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE	6	reg.h
35607	AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I	0x00fc0000	reg.h
35608	AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I	18	reg.h
35609	AR5K_PHY_RADAR	0x9954	reg.h
35610	AR5K_PHY_RADAR_ENABLE	0x00000001	reg.h
35611	AR5K_PHY_RADAR_DISABLE	0x00000000	reg.h
35612	AR5K_PHY_RADAR_INBANDTHR	0x0000003e	reg.h	Inband threshold
35613	AR5K_PHY_RADAR_INBANDTHR_S	1	reg.h
35614	AR5K_PHY_RADAR_PRSSI_THR	0x00000fc0	reg.h	Pulse RSSI/SNR threshold
35615	AR5K_PHY_RADAR_PRSSI_THR_S	6	reg.h
35616	AR5K_PHY_RADAR_PHEIGHT_THR	0x0003f000	reg.h	Pulse height threshold
35617	AR5K_PHY_RADAR_PHEIGHT_THR_S	12	reg.h
35618	AR5K_PHY_RADAR_RSSI_THR	0x00fc0000	reg.h	Radar RSSI/SNR threshold.
35619	AR5K_PHY_RADAR_RSSI_THR_S	18	reg.h
35620	AR5K_PHY_RADAR_FIRPWR_THR	0x7f000000	reg.h	Finite Impulse Response
35621	AR5K_PHY_RADAR_FIRPWR_THRS	24	reg.h
35622	AR5K_PHY_ANT_SWITCH_TABLE_0	0x9960	reg.h
35623	AR5K_PHY_ANT_SWITCH_TABLE_1	0x9964	reg.h
35624	AR5K_PHY_NFTHRES	0x9968	reg.h
35625	AR5K_PHY_SIGMA_DELTA	0x996C	reg.h
35626	AR5K_PHY_SIGMA_DELTA_ADC_SEL	0x00000003	reg.h
35627	AR5K_PHY_SIGMA_DELTA_ADC_SEL_S	0	reg.h
35628	AR5K_PHY_SIGMA_DELTA_FILT2	0x000000f8	reg.h
35629	AR5K_PHY_SIGMA_DELTA_FILT2_S	3	reg.h
35630	AR5K_PHY_SIGMA_DELTA_FILT1	0x00001f00	reg.h
35631	AR5K_PHY_SIGMA_DELTA_FILT1_S	8	reg.h
35632	AR5K_PHY_SIGMA_DELTA_ADC_CLIP	0x01ffe000	reg.h
35633	AR5K_PHY_SIGMA_DELTA_ADC_CLIP_S	13	reg.h
35634	AR5K_PHY_RESTART	0x9970	reg.h	restart
35635	AR5K_PHY_RESTART_DIV_GC	0x001c0000	reg.h	Fast diversity gc_limit (?)
35636	AR5K_PHY_RESTART_DIV_GC_S	18	reg.h
35637	AR5K_PHY_RFBUS_REQ	0x997C	reg.h
35638	AR5K_PHY_RFBUS_REQ_REQUEST	0x00000001	reg.h
35639	AR5K_PHY_TIMING_7	0x9980	reg.h
35640	AR5K_PHY_TIMING_8	0x9984	reg.h
35641	AR5K_PHY_TIMING_8_PILOT_MASK_2	0x000fffff	reg.h
35642	AR5K_PHY_TIMING_8_PILOT_MASK_2_	0	reg.h
35643	AR5K_PHY_BIN_MASK2_1	0x9988	reg.h
35644	AR5K_PHY_BIN_MASK2_2	0x998c	reg.h
35645	AR5K_PHY_BIN_MASK2_3	0x9990	reg.h
35646	AR5K_PHY_BIN_MASK2_4	0x9994	reg.h
35647	AR5K_PHY_BIN_MASK2_4_MASK_4	0x00003fff	reg.h
35648	AR5K_PHY_BIN_MASK2_4_MASK_4_S	0	reg.h
35649	AR5K_PHY_TIMING_9	0x9998	reg.h
35650	AR5K_PHY_TIMING_10	0x999c	reg.h
35651	AR5K_PHY_TIMING_10_PILOT_MASK_2	0x000fffff	reg.h
35652	AR5K_PHY_TIMING_10_PILOT_MASK_2	0	reg.h
35653	AR5K_PHY_TIMING_11	0x99a0	reg.h	Register address
35654	AR5K_PHY_TIMING_11_SPUR_DELTA_P	0x000fffff	reg.h	Spur delta phase
35655	AR5K_PHY_TIMING_11_SPUR_DELTA_P	0	reg.h
35656	AR5K_PHY_TIMING_11_SPUR_FREQ_SD	0x3ff00000	reg.h	Freq sigma delta
35657	AR5K_PHY_TIMING_11_SPUR_FREQ_SD	20	reg.h
35658	AR5K_PHY_TIMING_11_USE_SPUR_IN_	0x40000000	reg.h	Spur filter in AGC detector
35659	AR5K_PHY_TIMING_11_USE_SPUR_IN_	0x80000000	reg.h	Spur filter in OFDM self correlator
35660	AR5K_BB_GAIN_BASE	0x9b00	reg.h	BaseBand Amplifier Gain table base address
35661	AR5K_RF_GAIN_BASE	0x9a00	reg.h	RF Amplrifier Gain table base address
35662	AR5K_PHY_IQRES_CAL_PWR_I	0x9c10	reg.h	I (Inphase) power value
35663	AR5K_PHY_IQRES_CAL_PWR_Q	0x9c14	reg.h	Q (Quadrature) power value
35664	AR5K_PHY_IQRES_CAL_CORR	0x9c18	reg.h	I/Q Correlation
35665	AR5K_PHY_CURRENT_RSSI	0x9c1c	reg.h
35666	AR5K_PHY_RFBUS_GRANT	0x9c20	reg.h
35667	AR5K_PHY_RFBUS_GRANT_OK	0x00000001	reg.h
35668	AR5K_PHY_ADC_TEST	0x9c24	reg.h
35669	AR5K_PHY_ADC_TEST_I	0x00000001	reg.h
35670	AR5K_PHY_ADC_TEST_Q	0x00000200	reg.h
35671	AR5K_PHY_DAC_TEST	0x9c28	reg.h
35672	AR5K_PHY_DAC_TEST_I	0x00000001	reg.h
35673	AR5K_PHY_DAC_TEST_Q	0x00000200	reg.h
35674	AR5K_PHY_PTAT	0x9c2c	reg.h
35675	AR5K_PHY_BAD_TX_RATE	0x9c30	reg.h
35676	AR5K_PHY_SPUR_PWR	0x9c34	reg.h	Register Address
35677	AR5K_PHY_SPUR_PWR_I	0x00000001	reg.h	SPUR Power estimate for I (field)
35678	AR5K_PHY_SPUR_PWR_Q	0x00000100	reg.h	SPUR Power estimate for Q (field)
35679	AR5K_PHY_SPUR_PWR_FILT	0x00010000	reg.h	Power with SPUR removed (field)
35680	AR5K_PHY_CHAN_STATUS	0x9c38	reg.h
35681	AR5K_PHY_CHAN_STATUS_BT_ACT	0x00000001	reg.h
35682	AR5K_PHY_CHAN_STATUS_RX_CLR_RAW	0x00000002	reg.h
35683	AR5K_PHY_CHAN_STATUS_RX_CLR_MAC	0x00000004	reg.h
35684	AR5K_PHY_CHAN_STATUS_RX_CLR_PAP	0x00000008	reg.h
35685	AR5K_PHY_HEAVY_CLIP_ENABLE	0x99e0	reg.h
35686	AR5K_PHY_SCLOCK	0x99f0	reg.h
35687	AR5K_PHY_SCLOCK_32MHZ	0x0000000c	reg.h
35688	AR5K_PHY_SDELAY	0x99f4	reg.h
35689	AR5K_PHY_SDELAY_32MHZ	0x000000ff	reg.h
35690	AR5K_PHY_SPENDING	0x99f8	reg.h
35691	AR5K_PHY_PAPD_I_BASE	0xa000	reg.h
35692	AR5K_PHY_PCDAC_TXPOWER_BASE	0xa180	reg.h
35693	AR5K_PHY_MODE	0x0a200	reg.h	Register Address
35694	AR5K_PHY_MODE_MOD	0x00000001	reg.h	PHY Modulation bit
35695	AR5K_PHY_MODE_MOD_OFDM	0	reg.h
35696	AR5K_PHY_MODE_MOD_CCK	1	reg.h
35697	AR5K_PHY_MODE_FREQ	0x00000002	reg.h	Freq mode bit
35698	AR5K_PHY_MODE_FREQ_5GHZ	0	reg.h
35699	AR5K_PHY_MODE_FREQ_2GHZ	2	reg.h
35700	AR5K_PHY_MODE_MOD_DYN	0x00000004	reg.h	Enable Dynamic OFDM/CCK mode [5112+]
35701	AR5K_PHY_MODE_RAD	0x00000008	reg.h	[5212+]
35702	AR5K_PHY_MODE_RAD_RF5111	0	reg.h
35703	AR5K_PHY_MODE_RAD_RF5112	8	reg.h
35704	AR5K_PHY_MODE_XR	0x00000010	reg.h	Enable XR mode [5112+]
35705	AR5K_PHY_MODE_HALF_RATE	0x00000020	reg.h	Enable Half rate (test)
35706	AR5K_PHY_MODE_QUARTER_RATE	0x00000040	reg.h	Enable Quarter rat (test)
35707	AR5K_PHY_CCKTXCTL	0xa204	reg.h
35708	AR5K_PHY_CCKTXCTL_WORLD	0x00000000	reg.h
35709	AR5K_PHY_CCKTXCTL_JAPAN	0x00000010	reg.h
35710	AR5K_PHY_CCKTXCTL_SCRAMBLER_DIS	0x00000001	reg.h
35711	AR5K_PHY_CCKTXCTK_DAC_SCALE	0x00000004	reg.h
35712	AR5K_PHY_CCK_CROSSCORR	0xa208	reg.h
35713	AR5K_PHY_CCK_CROSSCORR_WEAK_SIG	0x0000000f	reg.h
35714	AR5K_PHY_CCK_CROSSCORR_WEAK_SIG	0	reg.h
35715	AR5K_PHY_FAST_ANT_DIV	0xa208	reg.h
35716	AR5K_PHY_FAST_ANT_DIV_EN	0x00002000	reg.h
35717	AR5K_PHY_GAIN_2GHZ	0xa20c	reg.h
35718	AR5K_PHY_GAIN_2GHZ_MARGIN_TXRX	0x00fc0000	reg.h
35719	AR5K_PHY_GAIN_2GHZ_MARGIN_TXRX_	18	reg.h
35720	AR5K_PHY_GAIN_2GHZ_INI_5111	0x6480416c	reg.h
35721	AR5K_PHY_CCK_RX_CTL_4	0xa21c	reg.h
35722	AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_	0x01f80000	reg.h
35723	AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_	19	reg.h
35724	AR5K_PHY_DAG_CCK_CTL	0xa228	reg.h
35725	AR5K_PHY_DAG_CCK_CTL_EN_RSSI_TH	0x00000200	reg.h
35726	AR5K_PHY_DAG_CCK_CTL_RSSI_THR	0x0001fc00	reg.h
35727	AR5K_PHY_DAG_CCK_CTL_RSSI_THR_S	10	reg.h
35728	AR5K_PHY_FAST_ADC	0xa24c	reg.h
35729	AR5K_PHY_BLUETOOTH	0xa254	reg.h
35730	AR5K_PHY_TPC_RG1	0xa258	reg.h
35731	AR5K_PHY_TPC_RG1_NUM_PD_GAIN	0x0000c000	reg.h
35732	AR5K_PHY_TPC_RG1_NUM_PD_GAIN_S	14	reg.h
35733	AR5K_PHY_TPC_RG1_PDGAIN_1	0x00030000	reg.h
35734	AR5K_PHY_TPC_RG1_PDGAIN_1_S	16	reg.h
35735	AR5K_PHY_TPC_RG1_PDGAIN_2	0x000c0000	reg.h
35736	AR5K_PHY_TPC_RG1_PDGAIN_2_S	18	reg.h
35737	AR5K_PHY_TPC_RG1_PDGAIN_3	0x00300000	reg.h
35738	AR5K_PHY_TPC_RG1_PDGAIN_3_S	20	reg.h
35739	AR5K_PHY_TPC_RG5	0xa26C	reg.h
35740	AR5K_PHY_TPC_RG5_PD_GAIN_OVERLA	0x0000000F	reg.h
35741	AR5K_PHY_TPC_RG5_PD_GAIN_OVERLA	0	reg.h
35742	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	0x000003F0	reg.h
35743	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	4	reg.h
35744	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	0x0000FC00	reg.h
35745	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	10	reg.h
35746	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	0x003F0000	reg.h
35747	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	16	reg.h
35748	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	0x0FC00000	reg.h
35749	AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA	22	reg.h
35750	AR5K_PHY_PDADC_TXPOWER_BASE	0xa280	reg.h
35751	AR5K_RF5111_OB_2GHZ	{ 3, 119, 0 }	rfbuffer.h
35752	AR5K_RF5111_DB_2GHZ	{ 3, 122, 0 }	rfbuffer.h
35753	AR5K_RF5111_OB_5GHZ	{ 3, 104, 0 }	rfbuffer.h
35754	AR5K_RF5111_DB_5GHZ	{ 3, 107, 0 }	rfbuffer.h
35755	AR5K_RF5111_PWD_XPD	{ 1, 95, 0 }	rfbuffer.h
35756	AR5K_RF5111_XPD_GAIN	{ 4, 96, 0 }	rfbuffer.h
35757	AR5K_RF5111_GAIN_I	{ 6, 29, 0 }	rfbuffer.h
35758	AR5K_RF5111_PLO_SEL	{ 1, 4, 0 }	rfbuffer.h
35759	AR5K_RF5111_RFGAIN_SEL	{ 1, 36, 0 }	rfbuffer.h
35760	AR5K_RF5111_RFGAIN_STEP	{ 6, 37, 0 }	rfbuffer.h
35761	AR5K_RF5111_WAIT_S	{ 5, 19, 0 }	rfbuffer.h
35762	AR5K_RF5111_WAIT_I	{ 5, 24, 0 }	rfbuffer.h
35763	AR5K_RF5111_MAX_TIME	{ 2, 49, 0 }	rfbuffer.h
35764	AR5K_RF5112X_GAIN_I	{ 6, 14, 0 }	rfbuffer.h
35765	AR5K_RF5112X_MIXVGA_OVR	{ 1, 36, 0 }	rfbuffer.h
35766	AR5K_RF5112X_MIXGAIN_OVR	{ 2, 37, 0 }	rfbuffer.h
35767	AR5K_RF5112X_MIXGAIN_STEP	{ 4, 32, 0 }	rfbuffer.h
35768	AR5K_RF5112X_PD_DELAY_A	{ 4, 58, 0 }	rfbuffer.h
35769	AR5K_RF5112X_PD_DELAY_B	{ 4, 62, 0 }	rfbuffer.h
35770	AR5K_RF5112X_PD_DELAY_XR	{ 4, 66, 0 }	rfbuffer.h
35771	AR5K_RF5112X_PD_PERIOD_A	{ 4, 70, 0 }	rfbuffer.h
35772	AR5K_RF5112X_PD_PERIOD_B	{ 4, 74, 0 }	rfbuffer.h
35773	AR5K_RF5112X_PD_PERIOD_XR	{ 4, 78, 0 }	rfbuffer.h
35774	AR5K_RF5112_OB_2GHZ	{ 3, 269, 0 }	rfbuffer.h
35775	AR5K_RF5112_DB_2GHZ	{ 3, 272, 0 }	rfbuffer.h
35776	AR5K_RF5112_OB_5GHZ	{ 3, 261, 0 }	rfbuffer.h
35777	AR5K_RF5112_DB_5GHZ	{ 3, 264, 0 }	rfbuffer.h
35778	AR5K_RF5112_FIXED_BIAS_A	{ 1, 260, 0 }	rfbuffer.h
35779	AR5K_RF5112_FIXED_BIAS_B	{ 1, 259, 0 }	rfbuffer.h
35780	AR5K_RF5112_XPD_SEL	{ 1, 284, 0 }	rfbuffer.h
35781	AR5K_RF5112_XPD_GAIN	{ 2, 252, 0 }	rfbuffer.h
35782	AR5K_RF5112A_OB_2GHZ	{ 3, 287, 0 }	rfbuffer.h
35783	AR5K_RF5112A_DB_2GHZ	{ 3, 290, 0 }	rfbuffer.h
35784	AR5K_RF5112A_OB_5GHZ	{ 3, 279, 0 }	rfbuffer.h
35785	AR5K_RF5112A_DB_5GHZ	{ 3, 282, 0 }	rfbuffer.h
35786	AR5K_RF5112A_FIXED_BIAS_A	{ 1, 278, 0 }	rfbuffer.h
35787	AR5K_RF5112A_FIXED_BIAS_B	{ 1, 277, 0 }	rfbuffer.h
35788	AR5K_RF5112A_XPD_SEL	{ 1, 302, 0 }	rfbuffer.h
35789	AR5K_RF5112A_PDGAINLO	{ 2, 270, 0 }	rfbuffer.h
35790	AR5K_RF5112A_PDGAINHI	{ 2, 257, 0 }	rfbuffer.h
35791	AR5K_RF5112A_HIGH_VC_CP	{ 2, 90, 2 }	rfbuffer.h
35792	AR5K_RF5112A_MID_VC_CP	{ 2, 92, 2 }	rfbuffer.h
35793	AR5K_RF5112A_LOW_VC_CP	{ 2, 94, 2 }	rfbuffer.h
35794	AR5K_RF5112A_PUSH_UP	{ 1, 254, 2 }	rfbuffer.h
35795	AR5K_RF5112A_PAD2GND	{ 1, 281, 1 }	rfbuffer.h
35796	AR5K_RF5112A_XB2_LVL	{ 2, 1, 3 }	rfbuffer.h
35797	AR5K_RF5112A_XB5_LVL	{ 2, 3, 3 }	rfbuffer.h
35798	AR5K_RF2413_OB_2GHZ	{ 3, 168, 0 }	rfbuffer.h
35799	AR5K_RF2413_DB_2GHZ	{ 3, 165, 0 }	rfbuffer.h
35800	AR5K_RF2316_OB_2GHZ	{ 3, 178, 0 }	rfbuffer.h
35801	AR5K_RF2316_DB_2GHZ	{ 3, 175, 0 }	rfbuffer.h
35802	AR5K_RF5413_OB_2GHZ	{ 3, 241, 0 }	rfbuffer.h
35803	AR5K_RF5413_DB_2GHZ	{ 3, 238, 0 }	rfbuffer.h
35804	AR5K_RF5413_OB_5GHZ	{ 3, 247, 0 }	rfbuffer.h
35805	AR5K_RF5413_DB_5GHZ	{ 3, 244, 0 }	rfbuffer.h
35806	AR5K_RF5413_PWD_ICLOBUF2G	{ 3, 131, 3 }	rfbuffer.h
35807	AR5K_RF5413_DERBY_CHAN_SEL_MODE	{ 1, 291, 2 }	rfbuffer.h
35808	AR5K_RF2425_OB_2GHZ	{ 3, 193, 0 }	rfbuffer.h
35809	AR5K_RF2425_DB_2GHZ	{ 3, 190, 0 }	rfbuffer.h
35810	AR5K_GAIN_CRN_FIX_BITS_5111	4	rfgain.h
35811	AR5K_GAIN_CRN_FIX_BITS_5112	7	rfgain.h
35812	AR5K_GAIN_CRN_MAX_FIX_BITS	AR5K_GAIN_CRN_FIX_BITS_5112	rfgain.h
35813	AR5K_GAIN_DYN_ADJUST_HI_MARGIN	15	rfgain.h
35814	AR5K_GAIN_DYN_ADJUST_LO_MARGIN	20	rfgain.h
35815	AR5K_GAIN_CCK_PROBE_CORR	5	rfgain.h
35816	AR5K_GAIN_CCK_OFDM_GAIN_DELTA	15	rfgain.h
35817	AR5K_GAIN_STEP_COUNT	10	rfgain.h
35818	BAR_0	0	e1000.h
35819	BAR_1	1	e1000.h
35820	BAR_5	5	e1000.h
35821	E1000_RXBUFFER_128	128	e1000.h	Used for packet split
35822	E1000_RXBUFFER_256	256	e1000.h	Used for packet split
35823	E1000_RXBUFFER_512	512	e1000.h
35824	E1000_RXBUFFER_1024	1024	e1000.h
35825	E1000_RXBUFFER_2048	2048	e1000.h
35826	E1000_RXBUFFER_4096	4096	e1000.h
35827	E1000_RXBUFFER_8192	8192	e1000.h
35828	E1000_RXBUFFER_16384	16384	e1000.h
35829	E1000_SMARTSPEED_DOWNSHIFT	3	e1000.h
35830	E1000_SMARTSPEED_MAX	15	e1000.h
35831	E1000_PBA_BYTES_SHIFT	0xA	e1000.h
35832	E1000_TX_HEAD_ADDR_SHIFT	7	e1000.h
35833	E1000_PBA_TX_MASK	0xFFFF0000	e1000.h
35834	E1000_FC_HIGH_DIFF	0x1638	e1000.h	High: 5688 bytes below Rx FIFO size
35835	E1000_FC_LOW_DIFF	0x1640	e1000.h	Low: 5696 bytes below Rx FIFO size
35836	E1000_FC_PAUSE_TIME	0x0680	e1000.h	858 usec
35837	MAXIMUM_ETHERNET_VLAN_SIZE	1522	e1000.h
35838	E1000_TX_QUEUE_WAKE	16	e1000.h
35839	E1000_RX_BUFFER_WRITE	16	e1000.h	Must be power of 2
35840	AUTO_ALL_MODES	0	e1000.h
35841	E1000_EEPROM_82544_APM	0x0004	e1000.h
35842	E1000_EEPROM_ICH8_APME	0x0004	e1000.h
35843	E1000_EEPROM_APME	0x0400	e1000.h
35844	E1000_MASTER_SLAVE	e1000_ms_hw_default	e1000.h
35845	E1000_MNG2HOST_PORT_623	(1 << 5)	e1000.h
35846	E1000_MNG2HOST_PORT_664	(1 << 6)	e1000.h
35847	E1000_ERT_2048	0x100	e1000.h
35848	IORESOURCE_IO	0x00000100	e1000.h
35849	IORESOURCE_MEM	0x00000200	e1000.h
35850	IORESOURCE_PREFETCH	0x00001000	e1000.h
35851	E1000_HOST_IF_MAX_SIZE	2048	e1000_hw.h
35852	E1000_SUCCESS	0	e1000_hw.h
35853	E1000_ERR_EEPROM	1	e1000_hw.h
35854	E1000_ERR_PHY	2	e1000_hw.h
35855	E1000_ERR_CONFIG	3	e1000_hw.h
35856	E1000_ERR_PARAM	4	e1000_hw.h
35857	E1000_ERR_MAC_TYPE	5	e1000_hw.h
35858	E1000_ERR_PHY_TYPE	6	e1000_hw.h
35859	E1000_ERR_RESET	9	e1000_hw.h
35860	E1000_ERR_MASTER_REQUESTS_PENDI	10	e1000_hw.h
35861	E1000_ERR_HOST_INTERFACE_COMMAN	11	e1000_hw.h
35862	E1000_BLK_PHY_RESET	12	e1000_hw.h
35863	E1000_ERR_SWFW_SYNC	13	e1000_hw.h
35864	E1000_MNG_DHCP_TX_PAYLOAD_CMD	64	e1000_hw.h
35865	E1000_HI_MAX_MNG_DATA_LENGTH	0x6F8	e1000_hw.h	Host Interface data length
35866	E1000_MNG_DHCP_COMMAND_TIMEOUT	10	e1000_hw.h	Time in ms to process MNG command
35867	E1000_MNG_DHCP_COOKIE_OFFSET	0x6F0	e1000_hw.h	Cookie offset
35868	E1000_MNG_DHCP_COOKIE_LENGTH	0x10	e1000_hw.h	Cookie length
35869	E1000_MNG_IAMT_MODE	0x3	e1000_hw.h
35870	E1000_MNG_ICH_IAMT_MODE	0x2	e1000_hw.h
35871	E1000_IAMT_SIGNATURE	0x544D4149	e1000_hw.h	Intel(R) Active Management Technology signature
35872	E1000_MNG_DHCP_COOKIE_STATUS_PA	0x1	e1000_hw.h	DHCP parsing enabled
35873	E1000_MNG_DHCP_COOKIE_STATUS_VL	0x2	e1000_hw.h	DHCP parsing enabled
35874	E1000_VFTA_ENTRY_SHIFT	0x5	e1000_hw.h
35875	E1000_VFTA_ENTRY_MASK	0x7F	e1000_hw.h
35876	E1000_VFTA_ENTRY_BIT_SHIFT_MASK	0x1F	e1000_hw.h
35877	E1000_DEV_ID_82542	0x1000	e1000_hw.h
35878	E1000_DEV_ID_82543GC_FIBER	0x1001	e1000_hw.h
35879	E1000_DEV_ID_82543GC_COPPER	0x1004	e1000_hw.h
35880	E1000_DEV_ID_82544EI_COPPER	0x1008	e1000_hw.h
35881	E1000_DEV_ID_82544EI_FIBER	0x1009	e1000_hw.h
35882	E1000_DEV_ID_82544GC_COPPER	0x100C	e1000_hw.h
35883	E1000_DEV_ID_82544GC_LOM	0x100D	e1000_hw.h
35884	E1000_DEV_ID_82540EM	0x100E	e1000_hw.h
35885	E1000_DEV_ID_82540EM_LOM	0x1015	e1000_hw.h
35886	E1000_DEV_ID_82540EP_LOM	0x1016	e1000_hw.h
35887	E1000_DEV_ID_82540EP	0x1017	e1000_hw.h
35888	E1000_DEV_ID_82540EP_LP	0x101E	e1000_hw.h
35889	E1000_DEV_ID_82545EM_COPPER	0x100F	e1000_hw.h
35890	E1000_DEV_ID_82545EM_FIBER	0x1011	e1000_hw.h
35891	E1000_DEV_ID_82545GM_COPPER	0x1026	e1000_hw.h
35892	E1000_DEV_ID_82545GM_FIBER	0x1027	e1000_hw.h
35893	E1000_DEV_ID_82545GM_SERDES	0x1028	e1000_hw.h
35894	E1000_DEV_ID_82546EB_COPPER	0x1010	e1000_hw.h
35895	E1000_DEV_ID_82546EB_FIBER	0x1012	e1000_hw.h
35896	E1000_DEV_ID_82546EB_QUAD_COPPE	0x101D	e1000_hw.h
35897	E1000_DEV_ID_82541EI	0x1013	e1000_hw.h
35898	E1000_DEV_ID_82541EI_MOBILE	0x1018	e1000_hw.h
35899	E1000_DEV_ID_82541ER_LOM	0x1014	e1000_hw.h
35900	E1000_DEV_ID_82541ER	0x1078	e1000_hw.h
35901	E1000_DEV_ID_82547GI	0x1075	e1000_hw.h
35902	E1000_DEV_ID_82541GI	0x1076	e1000_hw.h
35903	E1000_DEV_ID_82541GI_MOBILE	0x1077	e1000_hw.h
35904	E1000_DEV_ID_82541GI_LF	0x107C	e1000_hw.h
35905	E1000_DEV_ID_82546GB_COPPER	0x1079	e1000_hw.h
35906	E1000_DEV_ID_82546GB_FIBER	0x107A	e1000_hw.h
35907	E1000_DEV_ID_82546GB_SERDES	0x107B	e1000_hw.h
35908	E1000_DEV_ID_82546GB_PCIE	0x108A	e1000_hw.h
35909	E1000_DEV_ID_82546GB_QUAD_COPPE	0x1099	e1000_hw.h
35910	E1000_DEV_ID_82547EI	0x1019	e1000_hw.h
35911	E1000_DEV_ID_82547EI_MOBILE	0x101A	e1000_hw.h
35912	E1000_DEV_ID_82571EB_COPPER	0x105E	e1000_hw.h
35913	E1000_DEV_ID_82571EB_FIBER	0x105F	e1000_hw.h
35914	E1000_DEV_ID_82571EB_SERDES	0x1060	e1000_hw.h
35915	E1000_DEV_ID_82571EB_QUAD_COPPE	0x10A4	e1000_hw.h
35916	E1000_DEV_ID_82571EB_QUAD_FIBER	0x10A5	e1000_hw.h
35917	E1000_DEV_ID_82571EB_QUAD_COPPE	0x10BC	e1000_hw.h
35918	E1000_DEV_ID_82571EB_SERDES_DUA	0x10D9	e1000_hw.h
35919	E1000_DEV_ID_82571EB_SERDES_QUA	0x10DA	e1000_hw.h
35920	E1000_DEV_ID_82572EI_COPPER	0x107D	e1000_hw.h
35921	E1000_DEV_ID_82572EI_FIBER	0x107E	e1000_hw.h
35922	E1000_DEV_ID_82572EI_SERDES	0x107F	e1000_hw.h
35923	E1000_DEV_ID_82572EI	0x10B9	e1000_hw.h
35924	E1000_DEV_ID_82573E	0x108B	e1000_hw.h
35925	E1000_DEV_ID_82573E_IAMT	0x108C	e1000_hw.h
35926	E1000_DEV_ID_82573L	0x109A	e1000_hw.h
35927	E1000_DEV_ID_82546GB_QUAD_COPPE	0x10B5	e1000_hw.h
35928	E1000_DEV_ID_80003ES2LAN_COPPER	0x1096	e1000_hw.h
35929	E1000_DEV_ID_80003ES2LAN_SERDES	0x1098	e1000_hw.h
35930	E1000_DEV_ID_80003ES2LAN_COPPER	0x10BA	e1000_hw.h
35931	E1000_DEV_ID_80003ES2LAN_SERDES	0x10BB	e1000_hw.h
35932	E1000_DEV_ID_ICH8_IGP_M_AMT	0x1049	e1000_hw.h
35933	E1000_DEV_ID_ICH8_IGP_AMT	0x104A	e1000_hw.h
35934	E1000_DEV_ID_ICH8_IGP_C	0x104B	e1000_hw.h
35935	E1000_DEV_ID_ICH8_IFE	0x104C	e1000_hw.h
35936	E1000_DEV_ID_ICH8_IFE_GT	0x10C4	e1000_hw.h
35937	E1000_DEV_ID_ICH8_IFE_G	0x10C5	e1000_hw.h
35938	E1000_DEV_ID_ICH8_IGP_M	0x104D	e1000_hw.h
35939	E1000_DEV_ID_82576	0x10C9	e1000_hw.h
35940	NODE_ADDRESS_SIZE	6	e1000_hw.h
35941	ETH_LENGTH_OF_ADDRESS	6	e1000_hw.h
35942	MAC_DECODE_SIZE	(128 * 1024)	e1000_hw.h
35943	E1000_82542_2_0_REV_ID	2	e1000_hw.h
35944	E1000_82542_2_1_REV_ID	3	e1000_hw.h
35945	E1000_REVISION_0	0	e1000_hw.h
35946	E1000_REVISION_1	1	e1000_hw.h
35947	E1000_REVISION_2	2	e1000_hw.h
35948	E1000_REVISION_3	3	e1000_hw.h
35949	SPEED_10	10	e1000_hw.h
35950	SPEED_100	100	e1000_hw.h
35951	SPEED_1000	1000	e1000_hw.h
35952	HALF_DUPLEX	1	e1000_hw.h
35953	FULL_DUPLEX	2	e1000_hw.h
35954	ENET_HEADER_SIZE	14	e1000_hw.h
35955	MAXIMUM_ETHERNET_FRAME_SIZE	1518	e1000_hw.h	With FCS
35956	MINIMUM_ETHERNET_FRAME_SIZE	64	e1000_hw.h	With FCS
35957	ETHERNET_FCS_SIZE	4	e1000_hw.h
35958	MAXIMUM_ETHERNET_PACKET_SIZE	(MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)	e1000_hw.h
35959	MINIMUM_ETHERNET_PACKET_SIZE	(MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)	e1000_hw.h
35960	CRC_LENGTH	ETHERNET_FCS_SIZE	e1000_hw.h
35961	MAX_JUMBO_FRAME_SIZE	0x3F00	e1000_hw.h
35962	VLAN_TAG_SIZE	4	e1000_hw.h	802.3ac tag (not DMAed)
35963	ETHERNET_IEEE_VLAN_TYPE	0x8100	e1000_hw.h	802.3ac packet
35964	ETHERNET_IP_TYPE	0x0800	e1000_hw.h	IP packets
35965	ETHERNET_ARP_TYPE	0x0806	e1000_hw.h	Address Resolution Protocol (ARP)
35966	IP_PROTOCOL_TCP	6	e1000_hw.h
35967	IP_PROTOCOL_UDP	0x11	e1000_hw.h
35968	POLL_IMS_ENABLE_MASK	( \ E1000_IMS_RXDMT0 \| \ E1000_IMS_RXSEQ)	e1000_hw.h
35969	IMS_ENABLE_MASK	( \ E1000_IMS_RXT0 \| \ E1000_IMS_TXDW \| \ E1000_IMS_RXDMT0 \| \ E1000_IMS_RXSEQ \| \ E1000_IMS_LSC \| \ E10	e1000_hw.h
35970	IMS_ICH8LAN_ENABLE_MASK	(\ E1000_IMS_DSW \| \ E1000_IMS_PHYINT \| \ E1000_IMS_EPRST)	e1000_hw.h
35971	E1000_RAR_ENTRIES	15	e1000_hw.h
35972	E1000_RAR_ENTRIES_ICH8LAN	6	e1000_hw.h
35973	MIN_NUMBER_OF_DESCRIPTORS	8	e1000_hw.h
35974	MAX_NUMBER_OF_DESCRIPTORS	0xFFF8	e1000_hw.h
35975	MAX_PS_BUFFERS	4	e1000_hw.h
35976	E1000_RXD_STAT_DD	0x01	e1000_hw.h	Descriptor Done
35977	E1000_RXD_STAT_EOP	0x02	e1000_hw.h	End of Packet
35978	E1000_RXD_STAT_IXSM	0x04	e1000_hw.h	Ignore checksum
35979	E1000_RXD_STAT_VP	0x08	e1000_hw.h	IEEE VLAN Packet
35980	E1000_RXD_STAT_UDPCS	0x10	e1000_hw.h	UDP xsum caculated
35981	E1000_RXD_STAT_TCPCS	0x20	e1000_hw.h	TCP xsum calculated
35982	E1000_RXD_STAT_IPCS	0x40	e1000_hw.h	IP xsum calculated
35983	E1000_RXD_STAT_PIF	0x80	e1000_hw.h	passed in-exact filter
35984	E1000_RXD_STAT_IPIDV	0x200	e1000_hw.h	IP identification valid
35985	E1000_RXD_STAT_UDPV	0x400	e1000_hw.h	Valid UDP checksum
35986	E1000_RXD_STAT_ACK	0x8000	e1000_hw.h	ACK Packet indication
35987	E1000_RXD_ERR_CE	0x01	e1000_hw.h	CRC Error
35988	E1000_RXD_ERR_SE	0x02	e1000_hw.h	Symbol Error
35989	E1000_RXD_ERR_SEQ	0x04	e1000_hw.h	Sequence Error
35990	E1000_RXD_ERR_CXE	0x10	e1000_hw.h	Carrier Extension Error
35991	E1000_RXD_ERR_TCPE	0x20	e1000_hw.h	TCP/UDP Checksum Error
35992	E1000_RXD_ERR_IPE	0x40	e1000_hw.h	IP Checksum Error
35993	E1000_RXD_ERR_RXE	0x80	e1000_hw.h	Rx Data Error
35994	E1000_RXD_SPC_VLAN_MASK	0x0FFF	e1000_hw.h	VLAN ID is in lower 12 bits
35995	E1000_RXD_SPC_PRI_MASK	0xE000	e1000_hw.h	Priority is in upper 3 bits
35996	E1000_RXD_SPC_PRI_SHIFT	13	e1000_hw.h
35997	E1000_RXD_SPC_CFI_MASK	0x1000	e1000_hw.h	CFI is bit 12
35998	E1000_RXD_SPC_CFI_SHIFT	12	e1000_hw.h
35999	E1000_RXDEXT_STATERR_CE	0x01000000	e1000_hw.h
36000	E1000_RXDEXT_STATERR_SE	0x02000000	e1000_hw.h
36001	E1000_RXDEXT_STATERR_SEQ	0x04000000	e1000_hw.h
36002	E1000_RXDEXT_STATERR_CXE	0x10000000	e1000_hw.h
36003	E1000_RXDEXT_STATERR_TCPE	0x20000000	e1000_hw.h
36004	E1000_RXDEXT_STATERR_IPE	0x40000000	e1000_hw.h
36005	E1000_RXDEXT_STATERR_RXE	0x80000000	e1000_hw.h
36006	E1000_RXDPS_HDRSTAT_HDRSP	0x00008000	e1000_hw.h
36007	E1000_RXDPS_HDRSTAT_HDRLEN_MASK	0x000003FF	e1000_hw.h
36008	E1000_RXD_ERR_FRAME_ERR_MASK	( \ E1000_RXD_ERR_CE \| \ E1000_RXD_ERR_SE \| \ E1000_RXD_ERR_SEQ \| \ E1000_RXD_ER	e1000_hw.h
36009	E1000_RXDEXT_ERR_FRAME_ERR_MASK	( \ E1000_RXDEXT_STATERR_CE \| \ E1000_RXDEXT_STATERR_SE \| \ E1000_RXDEXT_STATERR_SEQ \| \ E10	e1000_hw.h
36010	E1000_TXD_DTYP_D	0x00100000	e1000_hw.h	Data Descriptor
36011	E1000_TXD_DTYP_C	0x00000000	e1000_hw.h	Context Descriptor
36012	E1000_TXD_POPTS_IXSM	0x01	e1000_hw.h	Insert IP checksum
36013	E1000_TXD_POPTS_TXSM	0x02	e1000_hw.h	Insert TCP/UDP checksum
36014	E1000_TXD_CMD_EOP	0x01000000	e1000_hw.h	End of Packet
36015	E1000_TXD_CMD_IFCS	0x02000000	e1000_hw.h	Insert FCS (Ethernet CRC)
36016	E1000_TXD_CMD_IC	0x04000000	e1000_hw.h	Insert Checksum
36017	E1000_TXD_CMD_RS	0x08000000	e1000_hw.h	Report Status
36018	E1000_TXD_CMD_RPS	0x10000000	e1000_hw.h	Report Packet Sent
36019	E1000_TXD_CMD_DEXT	0x20000000	e1000_hw.h	Descriptor extension (0 = legacy)
36020	E1000_TXD_CMD_VLE	0x40000000	e1000_hw.h	Add VLAN tag
36021	E1000_TXD_CMD_IDE	0x80000000	e1000_hw.h	Enable Tidv register
36022	E1000_TXD_STAT_DD	0x00000001	e1000_hw.h	Descriptor Done
36023	E1000_TXD_STAT_EC	0x00000002	e1000_hw.h	Excess Collisions
36024	E1000_TXD_STAT_LC	0x00000004	e1000_hw.h	Late Collisions
36025	E1000_TXD_STAT_TU	0x00000008	e1000_hw.h	Transmit underrun
36026	E1000_TXD_CMD_TCP	0x01000000	e1000_hw.h	TCP packet
36027	E1000_TXD_CMD_IP	0x02000000	e1000_hw.h	IP packet
36028	E1000_TXD_CMD_TSE	0x04000000	e1000_hw.h	TCP Seg enable
36029	E1000_TXD_STAT_TC	0x00000004	e1000_hw.h	Tx Underrun
36030	E1000_NUM_UNICAST	16	e1000_hw.h	Unicast filter entries
36031	E1000_MC_TBL_SIZE	128	e1000_hw.h	Multicast Filter Table (4096 bits)
36032	E1000_VLAN_FILTER_TBL_SIZE	128	e1000_hw.h	VLAN Filter Table (4096 bits)
36033	E1000_NUM_UNICAST_ICH8LAN	7	e1000_hw.h
36034	E1000_MC_TBL_SIZE_ICH8LAN	32	e1000_hw.h
36035	E1000_NUM_MTA_REGISTERS	128	e1000_hw.h
36036	E1000_NUM_MTA_REGISTERS_ICH8LAN	32	e1000_hw.h
36037	E1000_WAKEUP_IP_ADDRESS_COUNT_M	4	e1000_hw.h
36038	E1000_IP4AT_SIZE	E1000_WAKEUP_IP_ADDRESS_COUNT_MAX	e1000_hw.h
36039	E1000_IP4AT_SIZE_ICH8LAN	3	e1000_hw.h
36040	E1000_IP6AT_SIZE	1	e1000_hw.h
36041	E1000_FLEXIBLE_FILTER_COUNT_MAX	4	e1000_hw.h
36042	E1000_FLEXIBLE_FILTER_SIZE_MAX	128	e1000_hw.h
36043	E1000_FFLT_SIZE	E1000_FLEXIBLE_FILTER_COUNT_MAX	e1000_hw.h
36044	E1000_FFMT_SIZE	E1000_FLEXIBLE_FILTER_SIZE_MAX	e1000_hw.h
36045	E1000_FFVT_SIZE	E1000_FLEXIBLE_FILTER_SIZE_MAX	e1000_hw.h
36046	E1000_DISABLE_SERDES_LOOPBACK	0x0400	e1000_hw.h
36047	E1000_CTRL	0x00000	e1000_hw.h	Device Control - RW
36048	E1000_CTRL_DUP	0x00004	e1000_hw.h	Device Control Duplicate (Shadow) - RW
36049	E1000_STATUS	0x00008	e1000_hw.h	Device Status - RO
36050	E1000_EECD	0x00010	e1000_hw.h	EEPROM/Flash Control - RW
36051	E1000_EERD	0x00014	e1000_hw.h	EEPROM Read - RW
36052	E1000_CTRL_EXT	0x00018	e1000_hw.h	Extended Device Control - RW
36053	E1000_FLA	0x0001C	e1000_hw.h	Flash Access - RW
36054	E1000_MDIC	0x00020	e1000_hw.h	MDI Control - RW
36055	E1000_SCTL	0x00024	e1000_hw.h	SerDes Control - RW
36056	E1000_FEXTNVM	0x00028	e1000_hw.h	Future Extended NVM register
36057	E1000_FCAL	0x00028	e1000_hw.h	Flow Control Address Low - RW
36058	E1000_FCAH	0x0002C	e1000_hw.h	Flow Control Address High -RW
36059	E1000_FCT	0x00030	e1000_hw.h	Flow Control Type - RW
36060	E1000_VET	0x00038	e1000_hw.h	VLAN Ether Type - RW
36061	E1000_ICR	0x000C0	e1000_hw.h	Interrupt Cause Read - R/clr
36062	E1000_ITR	0x000C4	e1000_hw.h	Interrupt Throttling Rate - RW
36063	E1000_ICS	0x000C8	e1000_hw.h	Interrupt Cause Set - WO
36064	E1000_IMS	0x000D0	e1000_hw.h	Interrupt Mask Set - RW
36065	E1000_IMC	0x000D8	e1000_hw.h	Interrupt Mask Clear - WO
36066	E1000_IAM	0x000E0	e1000_hw.h	Interrupt Acknowledge Auto Mask
36067	E1000_RCTL	0x00100	e1000_hw.h	RX Control - RW
36068	E1000_RDTR1	0x02820	e1000_hw.h	RX Delay Timer (1) - RW
36069	E1000_RDBAL1	0x02900	e1000_hw.h	RX Descriptor Base Address Low (1) - RW
36070	E1000_RDBAH1	0x02904	e1000_hw.h	RX Descriptor Base Address High (1) - RW
36071	E1000_RDLEN1	0x02908	e1000_hw.h	RX Descriptor Length (1) - RW
36072	E1000_RDH1	0x02910	e1000_hw.h	RX Descriptor Head (1) - RW
36073	E1000_RDT1	0x02918	e1000_hw.h	RX Descriptor Tail (1) - RW
36074	E1000_FCTTV	0x00170	e1000_hw.h	Flow Control Transmit Timer Value - RW
36075	E1000_TXCW	0x00178	e1000_hw.h	TX Configuration Word - RW
36076	E1000_RXCW	0x00180	e1000_hw.h	RX Configuration Word - RO
36077	E1000_TCTL	0x00400	e1000_hw.h	TX Control - RW
36078	E1000_TCTL_EXT	0x00404	e1000_hw.h	Extended TX Control - RW
36079	E1000_TIPG	0x00410	e1000_hw.h	TX Inter-packet gap -RW
36080	E1000_TBT	0x00448	e1000_hw.h	TX Burst Timer - RW
36081	E1000_AIT	0x00458	e1000_hw.h	Adaptive Interframe Spacing Throttle - RW
36082	E1000_LEDCTL	0x00E00	e1000_hw.h	LED Control - RW
36083	E1000_EXTCNF_CTRL	0x00F00	e1000_hw.h	Extended Configuration Control
36084	E1000_EXTCNF_SIZE	0x00F08	e1000_hw.h	Extended Configuration Size
36085	E1000_PHY_CTRL	0x00F10	e1000_hw.h	PHY Control Register in CSR
36086	FEXTNVM_SW_CONFIG	0x0001	e1000_hw.h
36087	E1000_PBA	0x01000	e1000_hw.h	Packet Buffer Allocation - RW
36088	E1000_PBS	0x01008	e1000_hw.h	Packet Buffer Size
36089	E1000_EEMNGCTL	0x01010	e1000_hw.h	MNG EEprom Control
36090	E1000_FLASH_UPDATES	1000	e1000_hw.h
36091	E1000_EEARBC	0x01024	e1000_hw.h	EEPROM Auto Read Bus Control
36092	E1000_FLASHT	0x01028	e1000_hw.h	FLASH Timer Register
36093	E1000_EEWR	0x0102C	e1000_hw.h	EEPROM Write Register - RW
36094	E1000_FLSWCTL	0x01030	e1000_hw.h	FLASH control register
36095	E1000_FLSWDATA	0x01034	e1000_hw.h	FLASH data register
36096	E1000_FLSWCNT	0x01038	e1000_hw.h	FLASH Access Counter
36097	E1000_FLOP	0x0103C	e1000_hw.h	FLASH Opcode Register
36098	E1000_ERT	0x02008	e1000_hw.h	Early Rx Threshold - RW
36099	E1000_FCRTL	0x02160	e1000_hw.h	Flow Control Receive Threshold Low - RW
36100	E1000_FCRTH	0x02168	e1000_hw.h	Flow Control Receive Threshold High - RW
36101	E1000_PSRCTL	0x02170	e1000_hw.h	Packet Split Receive Control - RW
36102	E1000_RDBAL	0x02800	e1000_hw.h	RX Descriptor Base Address Low - RW
36103	E1000_RDBAH	0x02804	e1000_hw.h	RX Descriptor Base Address High - RW
36104	E1000_RDLEN	0x02808	e1000_hw.h	RX Descriptor Length - RW
36105	E1000_RDH	0x02810	e1000_hw.h	RX Descriptor Head - RW
36106	E1000_RDT	0x02818	e1000_hw.h	RX Descriptor Tail - RW
36107	E1000_RDTR	0x02820	e1000_hw.h	RX Delay Timer - RW
36108	E1000_RDBAL0	E1000_RDBAL	e1000_hw.h	RX Desc Base Address Low (0) - RW
36109	E1000_RDBAH0	E1000_RDBAH	e1000_hw.h	RX Desc Base Address High (0) - RW
36110	E1000_RDLEN0	E1000_RDLEN	e1000_hw.h	RX Desc Length (0) - RW
36111	E1000_RDH0	E1000_RDH	e1000_hw.h	RX Desc Head (0) - RW
36112	E1000_RDT0	E1000_RDT	e1000_hw.h	RX Desc Tail (0) - RW
36113	E1000_RDTR0	E1000_RDTR	e1000_hw.h	RX Delay Timer (0) - RW
36114	E1000_RXDCTL	0x02828	e1000_hw.h	RX Descriptor Control queue 0 - RW
36115	E1000_RXDCTL1	0x02928	e1000_hw.h	RX Descriptor Control queue 1 - RW
36116	E1000_RADV	0x0282C	e1000_hw.h	RX Interrupt Absolute Delay Timer - RW
36117	E1000_RSRPD	0x02C00	e1000_hw.h	RX Small Packet Detect - RW
36118	E1000_RAID	0x02C08	e1000_hw.h	Receive Ack Interrupt Delay - RW
36119	E1000_TXDMAC	0x03000	e1000_hw.h	TX DMA Control - RW
36120	E1000_KABGTXD	0x03004	e1000_hw.h	AFE Band Gap Transmit Ref Data
36121	E1000_TDFH	0x03410	e1000_hw.h	TX Data FIFO Head - RW
36122	E1000_TDFT	0x03418	e1000_hw.h	TX Data FIFO Tail - RW
36123	E1000_TDFHS	0x03420	e1000_hw.h	TX Data FIFO Head Saved - RW
36124	E1000_TDFTS	0x03428	e1000_hw.h	TX Data FIFO Tail Saved - RW
36125	E1000_TDFPC	0x03430	e1000_hw.h	TX Data FIFO Packet Count - RW
36126	E1000_TDBAL	0x03800	e1000_hw.h	TX Descriptor Base Address Low - RW
36127	E1000_TDBAH	0x03804	e1000_hw.h	TX Descriptor Base Address High - RW
36128	E1000_TDLEN	0x03808	e1000_hw.h	TX Descriptor Length - RW
36129	E1000_TDH	0x03810	e1000_hw.h	TX Descriptor Head - RW
36130	E1000_TDT	0x03818	e1000_hw.h	TX Descripotr Tail - RW
36131	E1000_TIDV	0x03820	e1000_hw.h	TX Interrupt Delay Value - RW
36132	E1000_TXDCTL	0x03828	e1000_hw.h	TX Descriptor Control - RW
36133	E1000_TADV	0x0382C	e1000_hw.h	TX Interrupt Absolute Delay Val - RW
36134	E1000_TSPMT	0x03830	e1000_hw.h	TCP Segmentation PAD & Min Threshold - RW
36135	E1000_TARC0	0x03840	e1000_hw.h	TX Arbitration Count (0)
36136	E1000_TDBAL1	0x03900	e1000_hw.h	TX Desc Base Address Low (1) - RW
36137	E1000_TDBAH1	0x03904	e1000_hw.h	TX Desc Base Address High (1) - RW
36138	E1000_TDLEN1	0x03908	e1000_hw.h	TX Desc Length (1) - RW
36139	E1000_TDH1	0x03910	e1000_hw.h	TX Desc Head (1) - RW
36140	E1000_TDT1	0x03918	e1000_hw.h	TX Desc Tail (1) - RW
36141	E1000_TXDCTL1	0x03928	e1000_hw.h	TX Descriptor Control (1) - RW
36142	E1000_TARC1	0x03940	e1000_hw.h	TX Arbitration Count (1)
36143	E1000_CRCERRS	0x04000	e1000_hw.h	CRC Error Count - R/clr
36144	E1000_ALGNERRC	0x04004	e1000_hw.h	Alignment Error Count - R/clr
36145	E1000_SYMERRS	0x04008	e1000_hw.h	Symbol Error Count - R/clr
36146	E1000_RXERRC	0x0400C	e1000_hw.h	Receive Error Count - R/clr
36147	E1000_MPC	0x04010	e1000_hw.h	Missed Packet Count - R/clr
36148	E1000_SCC	0x04014	e1000_hw.h	Single Collision Count - R/clr
36149	E1000_ECOL	0x04018	e1000_hw.h	Excessive Collision Count - R/clr
36150	E1000_MCC	0x0401C	e1000_hw.h	Multiple Collision Count - R/clr
36151	E1000_LATECOL	0x04020	e1000_hw.h	Late Collision Count - R/clr
36152	E1000_COLC	0x04028	e1000_hw.h	Collision Count - R/clr
36153	E1000_DC	0x04030	e1000_hw.h	Defer Count - R/clr
36154	E1000_TNCRS	0x04034	e1000_hw.h	TX-No CRS - R/clr
36155	E1000_SEC	0x04038	e1000_hw.h	Sequence Error Count - R/clr
36156	E1000_CEXTERR	0x0403C	e1000_hw.h	Carrier Extension Error Count - R/clr
36157	E1000_RLEC	0x04040	e1000_hw.h	Receive Length Error Count - R/clr
36158	E1000_XONRXC	0x04048	e1000_hw.h	XON RX Count - R/clr
36159	E1000_XONTXC	0x0404C	e1000_hw.h	XON TX Count - R/clr
36160	E1000_XOFFRXC	0x04050	e1000_hw.h	XOFF RX Count - R/clr
36161	E1000_XOFFTXC	0x04054	e1000_hw.h	XOFF TX Count - R/clr
36162	E1000_FCRUC	0x04058	e1000_hw.h	Flow Control RX Unsupported Count- R/clr
36163	E1000_PRC64	0x0405C	e1000_hw.h	Packets RX (64 bytes) - R/clr
36164	E1000_PRC127	0x04060	e1000_hw.h	Packets RX (65-127 bytes) - R/clr
36165	E1000_PRC255	0x04064	e1000_hw.h	Packets RX (128-255 bytes) - R/clr
36166	E1000_PRC511	0x04068	e1000_hw.h	Packets RX (255-511 bytes) - R/clr
36167	E1000_PRC1023	0x0406C	e1000_hw.h	Packets RX (512-1023 bytes) - R/clr
36168	E1000_PRC1522	0x04070	e1000_hw.h	Packets RX (1024-1522 bytes) - R/clr
36169	E1000_GPRC	0x04074	e1000_hw.h	Good Packets RX Count - R/clr
36170	E1000_BPRC	0x04078	e1000_hw.h	Broadcast Packets RX Count - R/clr
36171	E1000_MPRC	0x0407C	e1000_hw.h	Multicast Packets RX Count - R/clr
36172	E1000_GPTC	0x04080	e1000_hw.h	Good Packets TX Count - R/clr
36173	E1000_GORCL	0x04088	e1000_hw.h	Good Octets RX Count Low - R/clr
36174	E1000_GORCH	0x0408C	e1000_hw.h	Good Octets RX Count High - R/clr
36175	E1000_GOTCL	0x04090	e1000_hw.h	Good Octets TX Count Low - R/clr
36176	E1000_GOTCH	0x04094	e1000_hw.h	Good Octets TX Count High - R/clr
36177	E1000_RNBC	0x040A0	e1000_hw.h	RX No Buffers Count - R/clr
36178	E1000_RUC	0x040A4	e1000_hw.h	RX Undersize Count - R/clr
36179	E1000_RFC	0x040A8	e1000_hw.h	RX Fragment Count - R/clr
36180	E1000_ROC	0x040AC	e1000_hw.h	RX Oversize Count - R/clr
36181	E1000_RJC	0x040B0	e1000_hw.h	RX Jabber Count - R/clr
36182	E1000_MGTPRC	0x040B4	e1000_hw.h	Management Packets RX Count - R/clr
36183	E1000_MGTPDC	0x040B8	e1000_hw.h	Management Packets Dropped Count - R/clr
36184	E1000_MGTPTC	0x040BC	e1000_hw.h	Management Packets TX Count - R/clr
36185	E1000_TORL	0x040C0	e1000_hw.h	Total Octets RX Low - R/clr
36186	E1000_TORH	0x040C4	e1000_hw.h	Total Octets RX High - R/clr
36187	E1000_TOTL	0x040C8	e1000_hw.h	Total Octets TX Low - R/clr
36188	E1000_TOTH	0x040CC	e1000_hw.h	Total Octets TX High - R/clr
36189	E1000_TPR	0x040D0	e1000_hw.h	Total Packets RX - R/clr
36190	E1000_TPT	0x040D4	e1000_hw.h	Total Packets TX - R/clr
36191	E1000_PTC64	0x040D8	e1000_hw.h	Packets TX (64 bytes) - R/clr
36192	E1000_PTC127	0x040DC	e1000_hw.h	Packets TX (65-127 bytes) - R/clr
36193	E1000_PTC255	0x040E0	e1000_hw.h	Packets TX (128-255 bytes) - R/clr
36194	E1000_PTC511	0x040E4	e1000_hw.h	Packets TX (256-511 bytes) - R/clr
36195	E1000_PTC1023	0x040E8	e1000_hw.h	Packets TX (512-1023 bytes) - R/clr
36196	E1000_PTC1522	0x040EC	e1000_hw.h	Packets TX (1024-1522 Bytes) - R/clr
36197	E1000_MPTC	0x040F0	e1000_hw.h	Multicast Packets TX Count - R/clr
36198	E1000_BPTC	0x040F4	e1000_hw.h	Broadcast Packets TX Count - R/clr
36199	E1000_TSCTC	0x040F8	e1000_hw.h	TCP Segmentation Context TX - R/clr
36200	E1000_TSCTFC	0x040FC	e1000_hw.h	TCP Segmentation Context TX Fail - R/clr
36201	E1000_IAC	0x04100	e1000_hw.h	Interrupt Assertion Count
36202	E1000_ICRXPTC	0x04104	e1000_hw.h	Interrupt Cause Rx Packet Timer Expire Count
36203	E1000_ICRXATC	0x04108	e1000_hw.h	Interrupt Cause Rx Absolute Timer Expire Count
36204	E1000_ICTXPTC	0x0410C	e1000_hw.h	Interrupt Cause Tx Packet Timer Expire Count
36205	E1000_ICTXATC	0x04110	e1000_hw.h	Interrupt Cause Tx Absolute Timer Expire Count
36206	E1000_ICTXQEC	0x04118	e1000_hw.h	Interrupt Cause Tx Queue Empty Count
36207	E1000_ICTXQMTC	0x0411C	e1000_hw.h	Interrupt Cause Tx Queue Minimum Threshold Count
36208	E1000_ICRXDMTC	0x04120	e1000_hw.h	Interrupt Cause Rx Descriptor Minimum Threshold Count
36209	E1000_ICRXOC	0x04124	e1000_hw.h	Interrupt Cause Receiver Overrun Count
36210	E1000_RXCSUM	0x05000	e1000_hw.h	RX Checksum Control - RW
36211	E1000_RFCTL	0x05008	e1000_hw.h	Receive Filter Control
36212	E1000_MTA	0x05200	e1000_hw.h	Multicast Table Array - RW Array
36213	E1000_RA	0x05400	e1000_hw.h	Receive Address - RW Array
36214	E1000_VFTA	0x05600	e1000_hw.h	VLAN Filter Table Array - RW Array
36215	E1000_WUC	0x05800	e1000_hw.h	Wakeup Control - RW
36216	E1000_WUFC	0x05808	e1000_hw.h	Wakeup Filter Control - RW
36217	E1000_WUS	0x05810	e1000_hw.h	Wakeup Status - RO
36218	E1000_MANC	0x05820	e1000_hw.h	Management Control - RW
36219	E1000_IPAV	0x05838	e1000_hw.h	IP Address Valid - RW
36220	E1000_IP4AT	0x05840	e1000_hw.h	IPv4 Address Table - RW Array
36221	E1000_IP6AT	0x05880	e1000_hw.h	IPv6 Address Table - RW Array
36222	E1000_WUPL	0x05900	e1000_hw.h	Wakeup Packet Length - RW
36223	E1000_WUPM	0x05A00	e1000_hw.h	Wakeup Packet Memory - RO A
36224	E1000_FFLT	0x05F00	e1000_hw.h	Flexible Filter Length Table - RW Array
36225	E1000_HOST_IF	0x08800	e1000_hw.h	Host Interface
36226	E1000_FFMT	0x09000	e1000_hw.h	Flexible Filter Mask Table - RW Array
36227	E1000_FFVT	0x09800	e1000_hw.h	Flexible Filter Value Table - RW Array
36228	E1000_KUMCTRLSTA	0x00034	e1000_hw.h	MAC-PHY interface - RW
36229	E1000_MDPHYA	0x0003C	e1000_hw.h	PHY address - RW
36230	E1000_MANC2H	0x05860	e1000_hw.h	Managment Control To Host - RW
36231	E1000_SW_FW_SYNC	0x05B5C	e1000_hw.h	Software-Firmware Synchronization - RW
36232	E1000_GCR	0x05B00	e1000_hw.h	PCI-Ex Control
36233	E1000_GSCL_1	0x05B10	e1000_hw.h	PCI-Ex Statistic Control #1
36234	E1000_GSCL_2	0x05B14	e1000_hw.h	PCI-Ex Statistic Control #2
36235	E1000_GSCL_3	0x05B18	e1000_hw.h	PCI-Ex Statistic Control #3
36236	E1000_GSCL_4	0x05B1C	e1000_hw.h	PCI-Ex Statistic Control #4
36237	E1000_FACTPS	0x05B30	e1000_hw.h	Function Active and Power State to MNG
36238	E1000_SWSM	0x05B50	e1000_hw.h	SW Semaphore
36239	E1000_FWSM	0x05B54	e1000_hw.h	FW Semaphore
36240	E1000_FFLT_DBG	0x05F04	e1000_hw.h	Debug Register
36241	E1000_HICR	0x08F00	e1000_hw.h	Host Inteface Control
36242	E1000_CPUVEC	0x02C10	e1000_hw.h	CPU Vector Register - RW
36243	E1000_MRQC	0x05818	e1000_hw.h	Multiple Receive Control - RW
36244	E1000_RETA	0x05C00	e1000_hw.h	Redirection Table - RW Array
36245	E1000_RSSRK	0x05C80	e1000_hw.h	RSS Random Key - RW Array
36246	E1000_RSSIM	0x05864	e1000_hw.h	RSS Interrupt Mask
36247	E1000_RSSIR	0x05868	e1000_hw.h	RSS Interrupt Request
36248	E1000_82542_CTRL	E1000_CTRL	e1000_hw.h
36249	E1000_82542_CTRL_DUP	E1000_CTRL_DUP	e1000_hw.h
36250	E1000_82542_STATUS	E1000_STATUS	e1000_hw.h
36251	E1000_82542_EECD	E1000_EECD	e1000_hw.h
36252	E1000_82542_EERD	E1000_EERD	e1000_hw.h
36253	E1000_82542_CTRL_EXT	E1000_CTRL_EXT	e1000_hw.h
36254	E1000_82542_FLA	E1000_FLA	e1000_hw.h
36255	E1000_82542_MDIC	E1000_MDIC	e1000_hw.h
36256	E1000_82542_SCTL	E1000_SCTL	e1000_hw.h
36257	E1000_82542_FEXTNVM	E1000_FEXTNVM	e1000_hw.h
36258	E1000_82542_FCAL	E1000_FCAL	e1000_hw.h
36259	E1000_82542_FCAH	E1000_FCAH	e1000_hw.h
36260	E1000_82542_FCT	E1000_FCT	e1000_hw.h
36261	E1000_82542_VET	E1000_VET	e1000_hw.h
36262	E1000_82542_RA	0x00040	e1000_hw.h
36263	E1000_82542_ICR	E1000_ICR	e1000_hw.h
36264	E1000_82542_ITR	E1000_ITR	e1000_hw.h
36265	E1000_82542_ICS	E1000_ICS	e1000_hw.h
36266	E1000_82542_IMS	E1000_IMS	e1000_hw.h
36267	E1000_82542_IMC	E1000_IMC	e1000_hw.h
36268	E1000_82542_RCTL	E1000_RCTL	e1000_hw.h
36269	E1000_82542_RDTR	0x00108	e1000_hw.h
36270	E1000_82542_RDBAL	0x00110	e1000_hw.h
36271	E1000_82542_RDBAH	0x00114	e1000_hw.h
36272	E1000_82542_RDLEN	0x00118	e1000_hw.h
36273	E1000_82542_RDH	0x00120	e1000_hw.h
36274	E1000_82542_RDT	0x00128	e1000_hw.h
36275	E1000_82542_RDTR0	E1000_82542_RDTR	e1000_hw.h
36276	E1000_82542_RDBAL0	E1000_82542_RDBAL	e1000_hw.h
36277	E1000_82542_RDBAH0	E1000_82542_RDBAH	e1000_hw.h
36278	E1000_82542_RDLEN0	E1000_82542_RDLEN	e1000_hw.h
36279	E1000_82542_RDH0	E1000_82542_RDH	e1000_hw.h
36280	E1000_82542_RDT0	E1000_82542_RDT	e1000_hw.h
36281	E1000_82542_RDBAH3	0x02B04	e1000_hw.h	RX Desc Base High Queue 3 - RW
36282	E1000_82542_RDBAL3	0x02B00	e1000_hw.h	RX Desc Low Queue 3 - RW
36283	E1000_82542_RDLEN3	0x02B08	e1000_hw.h	RX Desc Length Queue 3 - RW
36284	E1000_82542_RDH3	0x02B10	e1000_hw.h	RX Desc Head Queue 3 - RW
36285	E1000_82542_RDT3	0x02B18	e1000_hw.h	RX Desc Tail Queue 3 - RW
36286	E1000_82542_RDBAL2	0x02A00	e1000_hw.h	RX Desc Base Low Queue 2 - RW
36287	E1000_82542_RDBAH2	0x02A04	e1000_hw.h	RX Desc Base High Queue 2 - RW
36288	E1000_82542_RDLEN2	0x02A08	e1000_hw.h	RX Desc Length Queue 2 - RW
36289	E1000_82542_RDH2	0x02A10	e1000_hw.h	RX Desc Head Queue 2 - RW
36290	E1000_82542_RDT2	0x02A18	e1000_hw.h	RX Desc Tail Queue 2 - RW
36291	E1000_82542_RDTR1	0x00130	e1000_hw.h
36292	E1000_82542_RDBAL1	0x00138	e1000_hw.h
36293	E1000_82542_RDBAH1	0x0013C	e1000_hw.h
36294	E1000_82542_RDLEN1	0x00140	e1000_hw.h
36295	E1000_82542_RDH1	0x00148	e1000_hw.h
36296	E1000_82542_RDT1	0x00150	e1000_hw.h
36297	E1000_82542_FCRTH	0x00160	e1000_hw.h
36298	E1000_82542_FCRTL	0x00168	e1000_hw.h
36299	E1000_82542_FCTTV	E1000_FCTTV	e1000_hw.h
36300	E1000_82542_TXCW	E1000_TXCW	e1000_hw.h
36301	E1000_82542_RXCW	E1000_RXCW	e1000_hw.h
36302	E1000_82542_MTA	0x00200	e1000_hw.h
36303	E1000_82542_TCTL	E1000_TCTL	e1000_hw.h
36304	E1000_82542_TCTL_EXT	E1000_TCTL_EXT	e1000_hw.h
36305	E1000_82542_TIPG	E1000_TIPG	e1000_hw.h
36306	E1000_82542_TDBAL	0x00420	e1000_hw.h
36307	E1000_82542_TDBAH	0x00424	e1000_hw.h
36308	E1000_82542_TDLEN	0x00428	e1000_hw.h
36309	E1000_82542_TDH	0x00430	e1000_hw.h
36310	E1000_82542_TDT	0x00438	e1000_hw.h
36311	E1000_82542_TIDV	0x00440	e1000_hw.h
36312	E1000_82542_TBT	E1000_TBT	e1000_hw.h
36313	E1000_82542_AIT	E1000_AIT	e1000_hw.h
36314	E1000_82542_VFTA	0x00600	e1000_hw.h
36315	E1000_82542_LEDCTL	E1000_LEDCTL	e1000_hw.h
36316	E1000_82542_PBA	E1000_PBA	e1000_hw.h
36317	E1000_82542_PBS	E1000_PBS	e1000_hw.h
36318	E1000_82542_EEMNGCTL	E1000_EEMNGCTL	e1000_hw.h
36319	E1000_82542_EEARBC	E1000_EEARBC	e1000_hw.h
36320	E1000_82542_FLASHT	E1000_FLASHT	e1000_hw.h
36321	E1000_82542_EEWR	E1000_EEWR	e1000_hw.h
36322	E1000_82542_FLSWCTL	E1000_FLSWCTL	e1000_hw.h
36323	E1000_82542_FLSWDATA	E1000_FLSWDATA	e1000_hw.h
36324	E1000_82542_FLSWCNT	E1000_FLSWCNT	e1000_hw.h
36325	E1000_82542_FLOP	E1000_FLOP	e1000_hw.h
36326	E1000_82542_EXTCNF_CTRL	E1000_EXTCNF_CTRL	e1000_hw.h
36327	E1000_82542_EXTCNF_SIZE	E1000_EXTCNF_SIZE	e1000_hw.h
36328	E1000_82542_PHY_CTRL	E1000_PHY_CTRL	e1000_hw.h
36329	E1000_82542_ERT	E1000_ERT	e1000_hw.h
36330	E1000_82542_RXDCTL	E1000_RXDCTL	e1000_hw.h
36331	E1000_82542_RXDCTL1	E1000_RXDCTL1	e1000_hw.h
36332	E1000_82542_RADV	E1000_RADV	e1000_hw.h
36333	E1000_82542_RSRPD	E1000_RSRPD	e1000_hw.h
36334	E1000_82542_TXDMAC	E1000_TXDMAC	e1000_hw.h
36335	E1000_82542_KABGTXD	E1000_KABGTXD	e1000_hw.h
36336	E1000_82542_TDFHS	E1000_TDFHS	e1000_hw.h
36337	E1000_82542_TDFTS	E1000_TDFTS	e1000_hw.h
36338	E1000_82542_TDFPC	E1000_TDFPC	e1000_hw.h
36339	E1000_82542_TXDCTL	E1000_TXDCTL	e1000_hw.h
36340	E1000_82542_TADV	E1000_TADV	e1000_hw.h
36341	E1000_82542_TSPMT	E1000_TSPMT	e1000_hw.h
36342	E1000_82542_CRCERRS	E1000_CRCERRS	e1000_hw.h
36343	E1000_82542_ALGNERRC	E1000_ALGNERRC	e1000_hw.h
36344	E1000_82542_SYMERRS	E1000_SYMERRS	e1000_hw.h
36345	E1000_82542_RXERRC	E1000_RXERRC	e1000_hw.h
36346	E1000_82542_MPC	E1000_MPC	e1000_hw.h
36347	E1000_82542_SCC	E1000_SCC	e1000_hw.h
36348	E1000_82542_ECOL	E1000_ECOL	e1000_hw.h
36349	E1000_82542_MCC	E1000_MCC	e1000_hw.h
36350	E1000_82542_LATECOL	E1000_LATECOL	e1000_hw.h
36351	E1000_82542_COLC	E1000_COLC	e1000_hw.h
36352	E1000_82542_DC	E1000_DC	e1000_hw.h
36353	E1000_82542_TNCRS	E1000_TNCRS	e1000_hw.h
36354	E1000_82542_SEC	E1000_SEC	e1000_hw.h
36355	E1000_82542_CEXTERR	E1000_CEXTERR	e1000_hw.h
36356	E1000_82542_RLEC	E1000_RLEC	e1000_hw.h
36357	E1000_82542_XONRXC	E1000_XONRXC	e1000_hw.h
36358	E1000_82542_XONTXC	E1000_XONTXC	e1000_hw.h
36359	E1000_82542_XOFFRXC	E1000_XOFFRXC	e1000_hw.h
36360	E1000_82542_XOFFTXC	E1000_XOFFTXC	e1000_hw.h
36361	E1000_82542_FCRUC	E1000_FCRUC	e1000_hw.h
36362	E1000_82542_PRC64	E1000_PRC64	e1000_hw.h
36363	E1000_82542_PRC127	E1000_PRC127	e1000_hw.h
36364	E1000_82542_PRC255	E1000_PRC255	e1000_hw.h
36365	E1000_82542_PRC511	E1000_PRC511	e1000_hw.h
36366	E1000_82542_PRC1023	E1000_PRC1023	e1000_hw.h
36367	E1000_82542_PRC1522	E1000_PRC1522	e1000_hw.h
36368	E1000_82542_GPRC	E1000_GPRC	e1000_hw.h
36369	E1000_82542_BPRC	E1000_BPRC	e1000_hw.h
36370	E1000_82542_MPRC	E1000_MPRC	e1000_hw.h
36371	E1000_82542_GPTC	E1000_GPTC	e1000_hw.h
36372	E1000_82542_GORCL	E1000_GORCL	e1000_hw.h
36373	E1000_82542_GORCH	E1000_GORCH	e1000_hw.h
36374	E1000_82542_GOTCL	E1000_GOTCL	e1000_hw.h
36375	E1000_82542_GOTCH	E1000_GOTCH	e1000_hw.h
36376	E1000_82542_RNBC	E1000_RNBC	e1000_hw.h
36377	E1000_82542_RUC	E1000_RUC	e1000_hw.h
36378	E1000_82542_RFC	E1000_RFC	e1000_hw.h
36379	E1000_82542_ROC	E1000_ROC	e1000_hw.h
36380	E1000_82542_RJC	E1000_RJC	e1000_hw.h
36381	E1000_82542_MGTPRC	E1000_MGTPRC	e1000_hw.h
36382	E1000_82542_MGTPDC	E1000_MGTPDC	e1000_hw.h
36383	E1000_82542_MGTPTC	E1000_MGTPTC	e1000_hw.h
36384	E1000_82542_TORL	E1000_TORL	e1000_hw.h
36385	E1000_82542_TORH	E1000_TORH	e1000_hw.h
36386	E1000_82542_TOTL	E1000_TOTL	e1000_hw.h
36387	E1000_82542_TOTH	E1000_TOTH	e1000_hw.h
36388	E1000_82542_TPR	E1000_TPR	e1000_hw.h
36389	E1000_82542_TPT	E1000_TPT	e1000_hw.h
36390	E1000_82542_PTC64	E1000_PTC64	e1000_hw.h
36391	E1000_82542_PTC127	E1000_PTC127	e1000_hw.h
36392	E1000_82542_PTC255	E1000_PTC255	e1000_hw.h
36393	E1000_82542_PTC511	E1000_PTC511	e1000_hw.h
36394	E1000_82542_PTC1023	E1000_PTC1023	e1000_hw.h
36395	E1000_82542_PTC1522	E1000_PTC1522	e1000_hw.h
36396	E1000_82542_MPTC	E1000_MPTC	e1000_hw.h
36397	E1000_82542_BPTC	E1000_BPTC	e1000_hw.h
36398	E1000_82542_TSCTC	E1000_TSCTC	e1000_hw.h
36399	E1000_82542_TSCTFC	E1000_TSCTFC	e1000_hw.h
36400	E1000_82542_RXCSUM	E1000_RXCSUM	e1000_hw.h
36401	E1000_82542_WUC	E1000_WUC	e1000_hw.h
36402	E1000_82542_WUFC	E1000_WUFC	e1000_hw.h
36403	E1000_82542_WUS	E1000_WUS	e1000_hw.h
36404	E1000_82542_MANC	E1000_MANC	e1000_hw.h
36405	E1000_82542_IPAV	E1000_IPAV	e1000_hw.h
36406	E1000_82542_IP4AT	E1000_IP4AT	e1000_hw.h
36407	E1000_82542_IP6AT	E1000_IP6AT	e1000_hw.h
36408	E1000_82542_WUPL	E1000_WUPL	e1000_hw.h
36409	E1000_82542_WUPM	E1000_WUPM	e1000_hw.h
36410	E1000_82542_FFLT	E1000_FFLT	e1000_hw.h
36411	E1000_82542_TDFH	0x08010	e1000_hw.h
36412	E1000_82542_TDFT	0x08018	e1000_hw.h
36413	E1000_82542_FFMT	E1000_FFMT	e1000_hw.h
36414	E1000_82542_FFVT	E1000_FFVT	e1000_hw.h
36415	E1000_82542_HOST_IF	E1000_HOST_IF	e1000_hw.h
36416	E1000_82542_IAM	E1000_IAM	e1000_hw.h
36417	E1000_82542_EEMNGCTL	E1000_EEMNGCTL	e1000_hw.h
36418	E1000_82542_PSRCTL	E1000_PSRCTL	e1000_hw.h
36419	E1000_82542_RAID	E1000_RAID	e1000_hw.h
36420	E1000_82542_TARC0	E1000_TARC0	e1000_hw.h
36421	E1000_82542_TDBAL1	E1000_TDBAL1	e1000_hw.h
36422	E1000_82542_TDBAH1	E1000_TDBAH1	e1000_hw.h
36423	E1000_82542_TDLEN1	E1000_TDLEN1	e1000_hw.h
36424	E1000_82542_TDH1	E1000_TDH1	e1000_hw.h
36425	E1000_82542_TDT1	E1000_TDT1	e1000_hw.h
36426	E1000_82542_TXDCTL1	E1000_TXDCTL1	e1000_hw.h
36427	E1000_82542_TARC1	E1000_TARC1	e1000_hw.h
36428	E1000_82542_RFCTL	E1000_RFCTL	e1000_hw.h
36429	E1000_82542_GCR	E1000_GCR	e1000_hw.h
36430	E1000_82542_GSCL_1	E1000_GSCL_1	e1000_hw.h
36431	E1000_82542_GSCL_2	E1000_GSCL_2	e1000_hw.h
36432	E1000_82542_GSCL_3	E1000_GSCL_3	e1000_hw.h
36433	E1000_82542_GSCL_4	E1000_GSCL_4	e1000_hw.h
36434	E1000_82542_FACTPS	E1000_FACTPS	e1000_hw.h
36435	E1000_82542_SWSM	E1000_SWSM	e1000_hw.h
36436	E1000_82542_FWSM	E1000_FWSM	e1000_hw.h
36437	E1000_82542_FFLT_DBG	E1000_FFLT_DBG	e1000_hw.h
36438	E1000_82542_IAC	E1000_IAC	e1000_hw.h
36439	E1000_82542_ICRXPTC	E1000_ICRXPTC	e1000_hw.h
36440	E1000_82542_ICRXATC	E1000_ICRXATC	e1000_hw.h
36441	E1000_82542_ICTXPTC	E1000_ICTXPTC	e1000_hw.h
36442	E1000_82542_ICTXATC	E1000_ICTXATC	e1000_hw.h
36443	E1000_82542_ICTXQEC	E1000_ICTXQEC	e1000_hw.h
36444	E1000_82542_ICTXQMTC	E1000_ICTXQMTC	e1000_hw.h
36445	E1000_82542_ICRXDMTC	E1000_ICRXDMTC	e1000_hw.h
36446	E1000_82542_ICRXOC	E1000_ICRXOC	e1000_hw.h
36447	E1000_82542_HICR	E1000_HICR	e1000_hw.h
36448	E1000_82542_CPUVEC	E1000_CPUVEC	e1000_hw.h
36449	E1000_82542_MRQC	E1000_MRQC	e1000_hw.h
36450	E1000_82542_RETA	E1000_RETA	e1000_hw.h
36451	E1000_82542_RSSRK	E1000_RSSRK	e1000_hw.h
36452	E1000_82542_RSSIM	E1000_RSSIM	e1000_hw.h
36453	E1000_82542_RSSIR	E1000_RSSIR	e1000_hw.h
36454	E1000_82542_KUMCTRLSTA	E1000_KUMCTRLSTA	e1000_hw.h
36455	E1000_82542_SW_FW_SYNC	E1000_SW_FW_SYNC	e1000_hw.h
36456	E1000_82542_MANC2H	E1000_MANC2H	e1000_hw.h
36457	E1000_EEPROM_SWDPIN0	0x0001	e1000_hw.h	SWDPIN 0 EEPROM Value
36458	E1000_EEPROM_LED_LOGIC	0x0020	e1000_hw.h	Led Logic Word
36459	E1000_EEPROM_RW_REG_DATA	16	e1000_hw.h	Offset to data in EEPROM read/write registers
36460	E1000_EEPROM_RW_REG_DONE	2	e1000_hw.h	Offset to READ/WRITE done bit
36461	E1000_EEPROM_RW_REG_START	1	e1000_hw.h	First bit for telling part to start operation
36462	E1000_EEPROM_RW_ADDR_SHIFT	2	e1000_hw.h	Shift to the address bits
36463	E1000_EEPROM_POLL_WRITE	1	e1000_hw.h	Flag for polling for write complete
36464	E1000_EEPROM_POLL_READ	0	e1000_hw.h	Flag for polling for read complete
36465	E1000_CTRL_FD	0x00000001	e1000_hw.h	Full duplex.0=half; 1=full
36466	E1000_CTRL_BEM	0x00000002	e1000_hw.h	Endian Mode.0=little,1=big
36467	E1000_CTRL_PRIOR	0x00000004	e1000_hw.h	Priority on PCI. 0=rx,1=fair
36468	E1000_CTRL_GIO_MASTER_DISABLE	0x00000004	e1000_hw.h	Blocks new Master requests
36469	E1000_CTRL_LRST	0x00000008	e1000_hw.h	Link reset. 0=normal,1=reset
36470	E1000_CTRL_TME	0x00000010	e1000_hw.h	Test mode. 0=normal,1=test
36471	E1000_CTRL_SLE	0x00000020	e1000_hw.h	Serial Link on 0=dis,1=en
36472	E1000_CTRL_ASDE	0x00000020	e1000_hw.h	Auto-speed detect enable
36473	E1000_CTRL_SLU	0x00000040	e1000_hw.h	Set link up (Force Link)
36474	E1000_CTRL_ILOS	0x00000080	e1000_hw.h	Invert Loss-Of Signal
36475	E1000_CTRL_SPD_SEL	0x00000300	e1000_hw.h	Speed Select Mask
36476	E1000_CTRL_SPD_10	0x00000000	e1000_hw.h	Force 10Mb
36477	E1000_CTRL_SPD_100	0x00000100	e1000_hw.h	Force 100Mb
36478	E1000_CTRL_SPD_1000	0x00000200	e1000_hw.h	Force 1Gb
36479	E1000_CTRL_BEM32	0x00000400	e1000_hw.h	Big Endian 32 mode
36480	E1000_CTRL_FRCSPD	0x00000800	e1000_hw.h	Force Speed
36481	E1000_CTRL_FRCDPX	0x00001000	e1000_hw.h	Force Duplex
36482	E1000_CTRL_D_UD_EN	0x00002000	e1000_hw.h	Dock/Undock enable
36483	E1000_CTRL_D_UD_POLARITY	0x00004000	e1000_hw.h	Defined polarity of Dock/Undock indication in SDP[0]
36484	E1000_CTRL_FORCE_PHY_RESET	0x00008000	e1000_hw.h	Reset both PHY ports, through PHYRST_N pin
36485	E1000_CTRL_EXT_LINK_EN	0x00010000	e1000_hw.h	enable link status from external LINK_0 and LINK_1 pins
36486	E1000_CTRL_SWDPIN0	0x00040000	e1000_hw.h	SWDPIN 0 value
36487	E1000_CTRL_SWDPIN1	0x00080000	e1000_hw.h	SWDPIN 1 value
36488	E1000_CTRL_SWDPIN2	0x00100000	e1000_hw.h	SWDPIN 2 value
36489	E1000_CTRL_SWDPIN3	0x00200000	e1000_hw.h	SWDPIN 3 value
36490	E1000_CTRL_SWDPIO0	0x00400000	e1000_hw.h	SWDPIN 0 Input or output
36491	E1000_CTRL_SWDPIO1	0x00800000	e1000_hw.h	SWDPIN 1 input or output
36492	E1000_CTRL_SWDPIO2	0x01000000	e1000_hw.h	SWDPIN 2 input or output
36493	E1000_CTRL_SWDPIO3	0x02000000	e1000_hw.h	SWDPIN 3 input or output
36494	E1000_CTRL_RST	0x04000000	e1000_hw.h	Global reset
36495	E1000_CTRL_RFCE	0x08000000	e1000_hw.h	Receive Flow Control enable
36496	E1000_CTRL_TFCE	0x10000000	e1000_hw.h	Transmit flow control enable
36497	E1000_CTRL_RTE	0x20000000	e1000_hw.h	Routing tag enable
36498	E1000_CTRL_VME	0x40000000	e1000_hw.h	IEEE VLAN mode enable
36499	E1000_CTRL_PHY_RST	0x80000000	e1000_hw.h	PHY Reset
36500	E1000_CTRL_SW2FW_INT	0x02000000	e1000_hw.h	Initiate an interrupt to manageability engine
36501	E1000_STATUS_FD	0x00000001	e1000_hw.h	Full duplex.0=half,1=full
36502	E1000_STATUS_LU	0x00000002	e1000_hw.h	Link up.0=no,1=link
36503	E1000_STATUS_FUNC_MASK	0x0000000C	e1000_hw.h	PCI Function Mask
36504	E1000_STATUS_FUNC_SHIFT	2	e1000_hw.h
36505	E1000_STATUS_FUNC_0	0x00000000	e1000_hw.h	Function 0
36506	E1000_STATUS_FUNC_1	0x00000004	e1000_hw.h	Function 1
36507	E1000_STATUS_TXOFF	0x00000010	e1000_hw.h	transmission paused
36508	E1000_STATUS_TBIMODE	0x00000020	e1000_hw.h	TBI mode
36509	E1000_STATUS_SPEED_MASK	0x000000C0	e1000_hw.h
36510	E1000_STATUS_SPEED_10	0x00000000	e1000_hw.h	Speed 10Mb/s
36511	E1000_STATUS_SPEED_100	0x00000040	e1000_hw.h	Speed 100Mb/s
36512	E1000_STATUS_SPEED_1000	0x00000080	e1000_hw.h	Speed 1000Mb/s
36513	E1000_STATUS_LAN_INIT_DONE	0x00000200	e1000_hw.h	Lan Init Completion
36514	E1000_STATUS_ASDV	0x00000300	e1000_hw.h	Auto speed detect value
36515	E1000_STATUS_DOCK_CI	0x00000800	e1000_hw.h	Change in Dock/Undock state. Clear on write '0'.
36516	E1000_STATUS_GIO_MASTER_ENABLE	0x00080000	e1000_hw.h	Status of Master requests.
36517	E1000_STATUS_MTXCKOK	0x00000400	e1000_hw.h	MTX clock running OK
36518	E1000_STATUS_PCI66	0x00000800	e1000_hw.h	In 66Mhz slot
36519	E1000_STATUS_BUS64	0x00001000	e1000_hw.h	In 64 bit slot
36520	E1000_STATUS_PCIX_MODE	0x00002000	e1000_hw.h	PCI-X mode
36521	E1000_STATUS_PCIX_SPEED	0x0000C000	e1000_hw.h	PCI-X bus speed
36522	E1000_STATUS_BMC_SKU_0	0x00100000	e1000_hw.h	BMC USB redirect disabled
36523	E1000_STATUS_BMC_SKU_1	0x00200000	e1000_hw.h	BMC SRAM disabled
36524	E1000_STATUS_BMC_SKU_2	0x00400000	e1000_hw.h	BMC SDRAM disabled
36525	E1000_STATUS_BMC_CRYPTO	0x00800000	e1000_hw.h	BMC crypto disabled
36526	E1000_STATUS_BMC_LITE	0x01000000	e1000_hw.h	BMC external code execution disabled
36527	E1000_STATUS_RGMII_ENABLE	0x02000000	e1000_hw.h	RGMII disabled
36528	E1000_STATUS_FUSE_8	0x04000000	e1000_hw.h
36529	E1000_STATUS_FUSE_9	0x08000000	e1000_hw.h
36530	E1000_STATUS_SERDES0_DIS	0x10000000	e1000_hw.h	SERDES disabled on port 0
36531	E1000_STATUS_SERDES1_DIS	0x20000000	e1000_hw.h	SERDES disabled on port 1
36532	E1000_STATUS_PCIX_SPEED_66	0x00000000	e1000_hw.h	PCI-X bus speed 50-66 MHz
36533	E1000_STATUS_PCIX_SPEED_100	0x00004000	e1000_hw.h	PCI-X bus speed 66-100 MHz
36534	E1000_STATUS_PCIX_SPEED_133	0x00008000	e1000_hw.h	PCI-X bus speed 100-133 MHz
36535	E1000_EECD_SK	0x00000001	e1000_hw.h	EEPROM Clock
36536	E1000_EECD_CS	0x00000002	e1000_hw.h	EEPROM Chip Select
36537	E1000_EECD_DI	0x00000004	e1000_hw.h	EEPROM Data In
36538	E1000_EECD_DO	0x00000008	e1000_hw.h	EEPROM Data Out
36539	E1000_EECD_FWE_MASK	0x00000030	e1000_hw.h
36540	E1000_EECD_FWE_DIS	0x00000010	e1000_hw.h	Disable FLASH writes
36541	E1000_EECD_FWE_EN	0x00000020	e1000_hw.h	Enable FLASH writes
36542	E1000_EECD_FWE_SHIFT	4	e1000_hw.h
36543	E1000_EECD_REQ	0x00000040	e1000_hw.h	EEPROM Access Request
36544	E1000_EECD_GNT	0x00000080	e1000_hw.h	EEPROM Access Grant
36545	E1000_EECD_PRES	0x00000100	e1000_hw.h	EEPROM Present
36546	E1000_EECD_SIZE	0x00000200	e1000_hw.h	EEPROM Size (0=64 word 1=256 word)
36547	E1000_EECD_ADDR_BITS	0x00000400	e1000_hw.h	EEPROM Addressing bits based on type
36548	E1000_EECD_TYPE	0x00002000	e1000_hw.h	EEPROM Type (1-SPI, 0-Microwire)
36549	E1000_EEPROM_GRANT_ATTEMPTS	1000	e1000_hw.h	EEPROM # attempts to gain grant
36550	E1000_EECD_AUTO_RD	0x00000200	e1000_hw.h	EEPROM Auto Read done
36551	E1000_EECD_SIZE_EX_MASK	0x00007800	e1000_hw.h	EEprom Size
36552	E1000_EECD_SIZE_EX_SHIFT	11	e1000_hw.h
36553	E1000_EECD_NVADDS	0x00018000	e1000_hw.h	NVM Address Size
36554	E1000_EECD_SELSHAD	0x00020000	e1000_hw.h	Select Shadow RAM
36555	E1000_EECD_INITSRAM	0x00040000	e1000_hw.h	Initialize Shadow RAM
36556	E1000_EECD_FLUPD	0x00080000	e1000_hw.h	Update FLASH
36557	E1000_EECD_AUPDEN	0x00100000	e1000_hw.h	Enable Autonomous FLASH update
36558	E1000_EECD_SHADV	0x00200000	e1000_hw.h	Shadow RAM Data Valid
36559	E1000_EECD_SEC1VAL	0x00400000	e1000_hw.h	Sector One Valid
36560	E1000_EECD_SECVAL_SHIFT	22	e1000_hw.h
36561	E1000_STM_OPCODE	0xDB00	e1000_hw.h
36562	E1000_HICR_FW_RESET	0xC0	e1000_hw.h
36563	E1000_SHADOW_RAM_WORDS	2048	e1000_hw.h
36564	E1000_ICH_NVM_SIG_WORD	0x13	e1000_hw.h
36565	E1000_ICH_NVM_SIG_MASK	0xC0	e1000_hw.h
36566	E1000_EERD_START	0x00000001	e1000_hw.h	Start Read
36567	E1000_EERD_DONE	0x00000010	e1000_hw.h	Read Done
36568	E1000_EERD_ADDR_SHIFT	8	e1000_hw.h
36569	E1000_EERD_ADDR_MASK	0x0000FF00	e1000_hw.h	Read Address
36570	E1000_EERD_DATA_SHIFT	16	e1000_hw.h
36571	E1000_EERD_DATA_MASK	0xFFFF0000	e1000_hw.h	Read Data
36572	EEPROM_STATUS_RDY_SPI	0x01	e1000_hw.h
36573	EEPROM_STATUS_WEN_SPI	0x02	e1000_hw.h
36574	EEPROM_STATUS_BP0_SPI	0x04	e1000_hw.h
36575	EEPROM_STATUS_BP1_SPI	0x08	e1000_hw.h
36576	EEPROM_STATUS_WPEN_SPI	0x80	e1000_hw.h
36577	E1000_CTRL_EXT_GPI0_EN	0x00000001	e1000_hw.h	Maps SDP4 to GPI0
36578	E1000_CTRL_EXT_GPI1_EN	0x00000002	e1000_hw.h	Maps SDP5 to GPI1
36579	E1000_CTRL_EXT_PHYINT_EN	E1000_CTRL_EXT_GPI1_EN	e1000_hw.h
36580	E1000_CTRL_EXT_GPI2_EN	0x00000004	e1000_hw.h	Maps SDP6 to GPI2
36581	E1000_CTRL_EXT_GPI3_EN	0x00000008	e1000_hw.h	Maps SDP7 to GPI3
36582	E1000_CTRL_EXT_SDP4_DATA	0x00000010	e1000_hw.h	Value of SW Defineable Pin 4
36583	E1000_CTRL_EXT_SDP5_DATA	0x00000020	e1000_hw.h	Value of SW Defineable Pin 5
36584	E1000_CTRL_EXT_PHY_INT	E1000_CTRL_EXT_SDP5_DATA	e1000_hw.h
36585	E1000_CTRL_EXT_SDP6_DATA	0x00000040	e1000_hw.h	Value of SW Defineable Pin 6
36586	E1000_CTRL_EXT_SDP7_DATA	0x00000080	e1000_hw.h	Value of SW Defineable Pin 7
36587	E1000_CTRL_EXT_SDP4_DIR	0x00000100	e1000_hw.h	Direction of SDP4 0=in 1=out
36588	E1000_CTRL_EXT_SDP5_DIR	0x00000200	e1000_hw.h	Direction of SDP5 0=in 1=out
36589	E1000_CTRL_EXT_SDP6_DIR	0x00000400	e1000_hw.h	Direction of SDP6 0=in 1=out
36590	E1000_CTRL_EXT_SDP7_DIR	0x00000800	e1000_hw.h	Direction of SDP7 0=in 1=out
36591	E1000_CTRL_EXT_ASDCHK	0x00001000	e1000_hw.h	Initiate an ASD sequence
36592	E1000_CTRL_EXT_EE_RST	0x00002000	e1000_hw.h	Reinitialize from EEPROM
36593	E1000_CTRL_EXT_IPS	0x00004000	e1000_hw.h	Invert Power State
36594	E1000_CTRL_EXT_SPD_BYPS	0x00008000	e1000_hw.h	Speed Select Bypass
36595	E1000_CTRL_EXT_RO_DIS	0x00020000	e1000_hw.h	Relaxed Ordering disable
36596	E1000_CTRL_EXT_LINK_MODE_MASK	0x00C00000	e1000_hw.h
36597	E1000_CTRL_EXT_LINK_MODE_GMII	0x00000000	e1000_hw.h
36598	E1000_CTRL_EXT_LINK_MODE_TBI	0x00C00000	e1000_hw.h
36599	E1000_CTRL_EXT_LINK_MODE_KMRN	0x00000000	e1000_hw.h
36600	E1000_CTRL_EXT_LINK_MODE_SERDES	0x00C00000	e1000_hw.h
36601	E1000_CTRL_EXT_LINK_MODE_SGMII	0x00800000	e1000_hw.h
36602	E1000_CTRL_EXT_WR_WMARK_MASK	0x03000000	e1000_hw.h
36603	E1000_CTRL_EXT_WR_WMARK_256	0x00000000	e1000_hw.h
36604	E1000_CTRL_EXT_WR_WMARK_320	0x01000000	e1000_hw.h
36605	E1000_CTRL_EXT_WR_WMARK_384	0x02000000	e1000_hw.h
36606	E1000_CTRL_EXT_WR_WMARK_448	0x03000000	e1000_hw.h
36607	E1000_CTRL_EXT_DRV_LOAD	0x10000000	e1000_hw.h	Driver loaded bit for FW
36608	E1000_CTRL_EXT_IAME	0x08000000	e1000_hw.h	Interrupt acknowledge Auto-mask
36609	E1000_CTRL_EXT_INT_TIMER_CLR	0x20000000	e1000_hw.h	Clear Interrupt timers after IMS clear
36610	E1000_CRTL_EXT_PB_PAREN	0x01000000	e1000_hw.h	packet buffer parity error detection enabled
36611	E1000_CTRL_EXT_DF_PAREN	0x02000000	e1000_hw.h	descriptor FIFO parity error detection enable
36612	E1000_CTRL_EXT_GHOST_PAREN	0x40000000	e1000_hw.h
36613	E1000_MDIC_DATA_MASK	0x0000FFFF	e1000_hw.h
36614	E1000_MDIC_REG_MASK	0x001F0000	e1000_hw.h
36615	E1000_MDIC_REG_SHIFT	16	e1000_hw.h
36616	E1000_MDIC_PHY_MASK	0x03E00000	e1000_hw.h
36617	E1000_MDIC_PHY_SHIFT	21	e1000_hw.h
36618	E1000_MDIC_OP_WRITE	0x04000000	e1000_hw.h
36619	E1000_MDIC_OP_READ	0x08000000	e1000_hw.h
36620	E1000_MDIC_READY	0x10000000	e1000_hw.h
36621	E1000_MDIC_INT_EN	0x20000000	e1000_hw.h
36622	E1000_MDIC_ERROR	0x40000000	e1000_hw.h
36623	E1000_KUMCTRLSTA_MASK	0x0000FFFF	e1000_hw.h
36624	E1000_KUMCTRLSTA_OFFSET	0x001F0000	e1000_hw.h
36625	E1000_KUMCTRLSTA_OFFSET_SHIFT	16	e1000_hw.h
36626	E1000_KUMCTRLSTA_REN	0x00200000	e1000_hw.h
36627	E1000_KUMCTRLSTA_OFFSET_FIFO_CT	0x00000000	e1000_hw.h
36628	E1000_KUMCTRLSTA_OFFSET_CTRL	0x00000001	e1000_hw.h
36629	E1000_KUMCTRLSTA_OFFSET_INB_CTR	0x00000002	e1000_hw.h
36630	E1000_KUMCTRLSTA_OFFSET_DIAG	0x00000003	e1000_hw.h
36631	E1000_KUMCTRLSTA_OFFSET_TIMEOUT	0x00000004	e1000_hw.h
36632	E1000_KUMCTRLSTA_OFFSET_INB_PAR	0x00000009	e1000_hw.h
36633	E1000_KUMCTRLSTA_OFFSET_HD_CTRL	0x00000010	e1000_hw.h
36634	E1000_KUMCTRLSTA_OFFSET_M2P_SER	0x0000001E	e1000_hw.h
36635	E1000_KUMCTRLSTA_OFFSET_M2P_MOD	0x0000001F	e1000_hw.h
36636	E1000_KUMCTRLSTA_FIFO_CTRL_RX_B	0x00000008	e1000_hw.h
36637	E1000_KUMCTRLSTA_FIFO_CTRL_TX_B	0x00000800	e1000_hw.h
36638	E1000_KUMCTRLSTA_INB_CTRL_LINK_	0x00000500	e1000_hw.h
36639	E1000_KUMCTRLSTA_INB_CTRL_DIS_P	0x00000010	e1000_hw.h
36640	E1000_KUMCTRLSTA_HD_CTRL_10_100	0x00000004	e1000_hw.h
36641	E1000_KUMCTRLSTA_HD_CTRL_1000_D	0x00000000	e1000_hw.h
36642	E1000_KUMCTRLSTA_OFFSET_K0S_CTR	0x0000001E	e1000_hw.h
36643	E1000_KUMCTRLSTA_DIAG_FELPBK	0x2000	e1000_hw.h
36644	E1000_KUMCTRLSTA_DIAG_NELPBK	0x1000	e1000_hw.h
36645	E1000_KUMCTRLSTA_K0S_100_EN	0x2000	e1000_hw.h
36646	E1000_KUMCTRLSTA_K0S_GBE_EN	0x1000	e1000_hw.h
36647	E1000_KUMCTRLSTA_K0S_ENTRY_LATE	0x0003	e1000_hw.h
36648	E1000_KABGTXD_BGSQLBIAS	0x00050000	e1000_hw.h
36649	E1000_PHY_CTRL_SPD_EN	0x00000001	e1000_hw.h
36650	E1000_PHY_CTRL_D0A_LPLU	0x00000002	e1000_hw.h
36651	E1000_PHY_CTRL_NOND0A_LPLU	0x00000004	e1000_hw.h
36652	E1000_PHY_CTRL_NOND0A_GBE_DISAB	0x00000008	e1000_hw.h
36653	E1000_PHY_CTRL_GBE_DISABLE	0x00000040	e1000_hw.h
36654	E1000_PHY_CTRL_B2B_EN	0x00000080	e1000_hw.h
36655	E1000_LEDCTL_LED0_MODE_MASK	0x0000000F	e1000_hw.h
36656	E1000_LEDCTL_LED0_MODE_SHIFT	0	e1000_hw.h
36657	E1000_LEDCTL_LED0_BLINK_RATE	0x0000020	e1000_hw.h
36658	E1000_LEDCTL_LED0_IVRT	0x00000040	e1000_hw.h
36659	E1000_LEDCTL_LED0_BLINK	0x00000080	e1000_hw.h
36660	E1000_LEDCTL_LED1_MODE_MASK	0x00000F00	e1000_hw.h
36661	E1000_LEDCTL_LED1_MODE_SHIFT	8	e1000_hw.h
36662	E1000_LEDCTL_LED1_BLINK_RATE	0x0002000	e1000_hw.h
36663	E1000_LEDCTL_LED1_IVRT	0x00004000	e1000_hw.h
36664	E1000_LEDCTL_LED1_BLINK	0x00008000	e1000_hw.h
36665	E1000_LEDCTL_LED2_MODE_MASK	0x000F0000	e1000_hw.h
36666	E1000_LEDCTL_LED2_MODE_SHIFT	16	e1000_hw.h
36667	E1000_LEDCTL_LED2_BLINK_RATE	0x00200000	e1000_hw.h
36668	E1000_LEDCTL_LED2_IVRT	0x00400000	e1000_hw.h
36669	E1000_LEDCTL_LED2_BLINK	0x00800000	e1000_hw.h
36670	E1000_LEDCTL_LED3_MODE_MASK	0x0F000000	e1000_hw.h
36671	E1000_LEDCTL_LED3_MODE_SHIFT	24	e1000_hw.h
36672	E1000_LEDCTL_LED3_BLINK_RATE	0x20000000	e1000_hw.h
36673	E1000_LEDCTL_LED3_IVRT	0x40000000	e1000_hw.h
36674	E1000_LEDCTL_LED3_BLINK	0x80000000	e1000_hw.h
36675	E1000_LEDCTL_MODE_LINK_10_1000	0x0	e1000_hw.h
36676	E1000_LEDCTL_MODE_LINK_100_1000	0x1	e1000_hw.h
36677	E1000_LEDCTL_MODE_LINK_UP	0x2	e1000_hw.h
36678	E1000_LEDCTL_MODE_ACTIVITY	0x3	e1000_hw.h
36679	E1000_LEDCTL_MODE_LINK_ACTIVITY	0x4	e1000_hw.h
36680	E1000_LEDCTL_MODE_LINK_10	0x5	e1000_hw.h
36681	E1000_LEDCTL_MODE_LINK_100	0x6	e1000_hw.h
36682	E1000_LEDCTL_MODE_LINK_1000	0x7	e1000_hw.h
36683	E1000_LEDCTL_MODE_PCIX_MODE	0x8	e1000_hw.h
36684	E1000_LEDCTL_MODE_FULL_DUPLEX	0x9	e1000_hw.h
36685	E1000_LEDCTL_MODE_COLLISION	0xA	e1000_hw.h
36686	E1000_LEDCTL_MODE_BUS_SPEED	0xB	e1000_hw.h
36687	E1000_LEDCTL_MODE_BUS_SIZE	0xC	e1000_hw.h
36688	E1000_LEDCTL_MODE_PAUSED	0xD	e1000_hw.h
36689	E1000_LEDCTL_MODE_LED_ON	0xE	e1000_hw.h
36690	E1000_LEDCTL_MODE_LED_OFF	0xF	e1000_hw.h
36691	E1000_RAH_AV	0x80000000	e1000_hw.h	Receive descriptor valid
36692	E1000_RAH_POOL_1	0x00040000	e1000_hw.h
36693	E1000_ICR_TXDW	0x00000001	e1000_hw.h	Transmit desc written back
36694	E1000_ICR_TXQE	0x00000002	e1000_hw.h	Transmit Queue empty
36695	E1000_ICR_LSC	0x00000004	e1000_hw.h	Link Status Change
36696	E1000_ICR_RXSEQ	0x00000008	e1000_hw.h	rx sequence error
36697	E1000_ICR_RXDMT0	0x00000010	e1000_hw.h	rx desc min. threshold (0)
36698	E1000_ICR_DOUTSYNC	0x10000000	e1000_hw.h	NIC DMA out of sync
36699	E1000_ICR_RXO	0x00000040	e1000_hw.h	rx overrun
36700	E1000_ICR_RXT0	0x00000080	e1000_hw.h	rx timer intr (ring 0)
36701	E1000_ICR_MDAC	0x00000200	e1000_hw.h	MDIO access complete
36702	E1000_ICR_RXCFG	0x00000400	e1000_hw.h	RX /c/ ordered set
36703	E1000_ICR_GPI_EN0	0x00000800	e1000_hw.h	GP Int 0
36704	E1000_ICR_GPI_EN1	0x00001000	e1000_hw.h	GP Int 1
36705	E1000_ICR_GPI_EN2	0x00002000	e1000_hw.h	GP Int 2
36706	E1000_ICR_GPI_EN3	0x00004000	e1000_hw.h	GP Int 3
36707	E1000_ICR_TXD_LOW	0x00008000	e1000_hw.h
36708	E1000_ICR_SRPD	0x00010000	e1000_hw.h
36709	E1000_ICR_ACK	0x00020000	e1000_hw.h	Receive Ack frame
36710	E1000_ICR_MNG	0x00040000	e1000_hw.h	Manageability event
36711	E1000_ICR_DOCK	0x00080000	e1000_hw.h	Dock/Undock
36712	E1000_ICR_INT_ASSERTED	0x80000000	e1000_hw.h	If this bit asserted, the driver should claim the interrupt
36713	E1000_ICR_RXD_FIFO_PAR0	0x00100000	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
36714	E1000_ICR_TXD_FIFO_PAR0	0x00200000	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
36715	E1000_ICR_HOST_ARB_PAR	0x00400000	e1000_hw.h	host arb read buffer parity error
36716	E1000_ICR_PB_PAR	0x00800000	e1000_hw.h	packet buffer parity error
36717	E1000_ICR_RXD_FIFO_PAR1	0x01000000	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
36718	E1000_ICR_TXD_FIFO_PAR1	0x02000000	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
36719	E1000_ICR_ALL_PARITY	0x03F00000	e1000_hw.h	all parity error bits
36720	E1000_ICR_DSW	0x00000020	e1000_hw.h	FW changed the status of DISSW bit in the FWSM
36721	E1000_ICR_PHYINT	0x00001000	e1000_hw.h	LAN connected device generates an interrupt
36722	E1000_ICR_EPRST	0x00100000	e1000_hw.h	ME handware reset occurs
36723	E1000_ICS_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
36724	E1000_ICS_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
36725	E1000_ICS_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
36726	E1000_ICS_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
36727	E1000_ICS_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
36728	E1000_ICS_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
36729	E1000_ICS_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
36730	E1000_ICS_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
36731	E1000_ICS_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
36732	E1000_ICS_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
36733	E1000_ICS_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
36734	E1000_ICS_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
36735	E1000_ICS_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
36736	E1000_ICS_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
36737	E1000_ICS_SRPD	E1000_ICR_SRPD	e1000_hw.h
36738	E1000_ICS_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
36739	E1000_ICS_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
36740	E1000_ICS_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
36741	E1000_ICS_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
36742	E1000_ICS_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
36743	E1000_ICS_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
36744	E1000_ICS_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
36745	E1000_ICS_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
36746	E1000_ICS_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
36747	E1000_ICS_DSW	E1000_ICR_DSW	e1000_hw.h
36748	E1000_ICS_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
36749	E1000_ICS_EPRST	E1000_ICR_EPRST	e1000_hw.h
36750	E1000_IMS_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
36751	E1000_IMS_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
36752	E1000_IMS_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
36753	E1000_IMS_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
36754	E1000_IMS_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
36755	E1000_IMS_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
36756	E1000_IMS_DOUTSYNC	E1000_ICR_DOUTSYNC	e1000_hw.h	NIC DMA out of sync
36757	E1000_IMS_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
36758	E1000_IMS_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
36759	E1000_IMS_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
36760	E1000_IMS_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
36761	E1000_IMS_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
36762	E1000_IMS_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
36763	E1000_IMS_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
36764	E1000_IMS_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
36765	E1000_IMS_SRPD	E1000_ICR_SRPD	e1000_hw.h
36766	E1000_IMS_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
36767	E1000_IMS_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
36768	E1000_IMS_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
36769	E1000_IMS_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
36770	E1000_IMS_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
36771	E1000_IMS_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
36772	E1000_IMS_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
36773	E1000_IMS_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
36774	E1000_IMS_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
36775	E1000_IMS_DSW	E1000_ICR_DSW	e1000_hw.h
36776	E1000_IMS_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
36777	E1000_IMS_EPRST	E1000_ICR_EPRST	e1000_hw.h
36778	E1000_IMC_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
36779	E1000_IMC_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
36780	E1000_IMC_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
36781	E1000_IMC_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
36782	E1000_IMC_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
36783	E1000_IMC_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
36784	E1000_IMC_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
36785	E1000_IMC_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
36786	E1000_IMC_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
36787	E1000_IMC_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
36788	E1000_IMC_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
36789	E1000_IMC_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
36790	E1000_IMC_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
36791	E1000_IMC_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
36792	E1000_IMC_SRPD	E1000_ICR_SRPD	e1000_hw.h
36793	E1000_IMC_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
36794	E1000_IMC_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
36795	E1000_IMC_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
36796	E1000_IMC_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
36797	E1000_IMC_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
36798	E1000_IMC_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
36799	E1000_IMC_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
36800	E1000_IMC_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
36801	E1000_IMC_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
36802	E1000_IMC_DSW	E1000_ICR_DSW	e1000_hw.h
36803	E1000_IMC_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
36804	E1000_IMC_EPRST	E1000_ICR_EPRST	e1000_hw.h
36805	E1000_RCTL_RST	0x00000001	e1000_hw.h	Software reset
36806	E1000_RCTL_EN	0x00000002	e1000_hw.h	enable
36807	E1000_RCTL_SBP	0x00000004	e1000_hw.h	store bad packet
36808	E1000_RCTL_UPE	0x00000008	e1000_hw.h	unicast promiscuous enable
36809	E1000_RCTL_MPE	0x00000010	e1000_hw.h	multicast promiscuous enab
36810	E1000_RCTL_LPE	0x00000020	e1000_hw.h	long packet enable
36811	E1000_RCTL_LBM_NO	0x00000000	e1000_hw.h	no loopback mode
36812	E1000_RCTL_LBM_MAC	0x00000040	e1000_hw.h	MAC loopback mode
36813	E1000_RCTL_LBM_SLP	0x00000080	e1000_hw.h	serial link loopback mode
36814	E1000_RCTL_LBM_TCVR	0x000000C0	e1000_hw.h	tcvr loopback mode
36815	E1000_RCTL_DTYP_MASK	0x00000C00	e1000_hw.h	Descriptor type mask
36816	E1000_RCTL_DTYP_PS	0x00000400	e1000_hw.h	Packet Split descriptor
36817	E1000_RCTL_RDMTS_HALF	0x00000000	e1000_hw.h	rx desc min threshold size
36818	E1000_RCTL_RDMTS_QUAT	0x00000100	e1000_hw.h	rx desc min threshold size
36819	E1000_RCTL_RDMTS_EIGTH	0x00000200	e1000_hw.h	rx desc min threshold size
36820	E1000_RCTL_MO_SHIFT	12	e1000_hw.h	multicast offset shift
36821	E1000_RCTL_MO_0	0x00000000	e1000_hw.h	multicast offset 11:0
36822	E1000_RCTL_MO_1	0x00001000	e1000_hw.h	multicast offset 12:1
36823	E1000_RCTL_MO_2	0x00002000	e1000_hw.h	multicast offset 13:2
36824	E1000_RCTL_MO_3	0x00003000	e1000_hw.h	multicast offset 15:4
36825	E1000_RCTL_MDR	0x00004000	e1000_hw.h	multicast desc ring 0
36826	E1000_RCTL_BAM	0x00008000	e1000_hw.h	broadcast enable
36827	E1000_RCTL_SZ_2048	0x00000000	e1000_hw.h	rx buffer size 2048
36828	E1000_RCTL_SZ_1024	0x00010000	e1000_hw.h	rx buffer size 1024
36829	E1000_RCTL_SZ_512	0x00020000	e1000_hw.h	rx buffer size 512
36830	E1000_RCTL_SZ_256	0x00030000	e1000_hw.h	rx buffer size 256
36831	E1000_RCTL_SZ_16384	0x00010000	e1000_hw.h	rx buffer size 16384
36832	E1000_RCTL_SZ_8192	0x00020000	e1000_hw.h	rx buffer size 8192
36833	E1000_RCTL_SZ_4096	0x00030000	e1000_hw.h	rx buffer size 4096
36834	E1000_RCTL_VFE	0x00040000	e1000_hw.h	vlan filter enable
36835	E1000_RCTL_CFIEN	0x00080000	e1000_hw.h	canonical form enable
36836	E1000_RCTL_CFI	0x00100000	e1000_hw.h	canonical form indicator
36837	E1000_RCTL_DPF	0x00400000	e1000_hw.h	discard pause frames
36838	E1000_RCTL_PMCF	0x00800000	e1000_hw.h	pass MAC control frames
36839	E1000_RCTL_BSEX	0x02000000	e1000_hw.h	Buffer size extension
36840	E1000_RCTL_SECRC	0x04000000	e1000_hw.h	Strip Ethernet CRC
36841	E1000_RCTL_FLXBUF_MASK	0x78000000	e1000_hw.h	Flexible buffer size
36842	E1000_RCTL_FLXBUF_SHIFT	27	e1000_hw.h	Flexible buffer shift
36843	E1000_PSRCTL_BSIZE0_MASK	0x0000007F	e1000_hw.h
36844	E1000_PSRCTL_BSIZE1_MASK	0x00003F00	e1000_hw.h
36845	E1000_PSRCTL_BSIZE2_MASK	0x003F0000	e1000_hw.h
36846	E1000_PSRCTL_BSIZE3_MASK	0x3F000000	e1000_hw.h
36847	E1000_PSRCTL_BSIZE0_SHIFT	7	e1000_hw.h	Shift _right_ 7
36848	E1000_PSRCTL_BSIZE1_SHIFT	2	e1000_hw.h	Shift _right_ 2
36849	E1000_PSRCTL_BSIZE2_SHIFT	6	e1000_hw.h	Shift _left_ 6
36850	E1000_PSRCTL_BSIZE3_SHIFT	14	e1000_hw.h	Shift _left_ 14
36851	E1000_SWFW_EEP_SM	0x0001	e1000_hw.h
36852	E1000_SWFW_PHY0_SM	0x0002	e1000_hw.h
36853	E1000_SWFW_PHY1_SM	0x0004	e1000_hw.h
36854	E1000_SWFW_MAC_CSR_SM	0x0008	e1000_hw.h
36855	E1000_RDT_DELAY	0x0000ffff	e1000_hw.h	Delay timer (1=1024us)
36856	E1000_RDT_FPDB	0x80000000	e1000_hw.h	Flush descriptor block
36857	E1000_RDLEN_LEN	0x0007ff80	e1000_hw.h	descriptor length
36858	E1000_RDH_RDH	0x0000ffff	e1000_hw.h	receive descriptor head
36859	E1000_RDT_RDT	0x0000ffff	e1000_hw.h	receive descriptor tail
36860	E1000_FCRTH_RTH	0x0000FFF8	e1000_hw.h	Mask Bits[15:3] for RTH
36861	E1000_FCRTH_XFCE	0x80000000	e1000_hw.h	External Flow Control Enable
36862	E1000_FCRTL_RTL	0x0000FFF8	e1000_hw.h	Mask Bits[15:3] for RTL
36863	E1000_FCRTL_XONE	0x80000000	e1000_hw.h	Enable XON frame transmission
36864	E1000_RFCTL_ISCSI_DIS	0x00000001	e1000_hw.h
36865	E1000_RFCTL_ISCSI_DWC_MASK	0x0000003E	e1000_hw.h
36866	E1000_RFCTL_ISCSI_DWC_SHIFT	1	e1000_hw.h
36867	E1000_RFCTL_NFSW_DIS	0x00000040	e1000_hw.h
36868	E1000_RFCTL_NFSR_DIS	0x00000080	e1000_hw.h
36869	E1000_RFCTL_NFS_VER_MASK	0x00000300	e1000_hw.h
36870	E1000_RFCTL_NFS_VER_SHIFT	8	e1000_hw.h
36871	E1000_RFCTL_IPV6_DIS	0x00000400	e1000_hw.h
36872	E1000_RFCTL_IPV6_XSUM_DIS	0x00000800	e1000_hw.h
36873	E1000_RFCTL_ACK_DIS	0x00001000	e1000_hw.h
36874	E1000_RFCTL_ACKD_DIS	0x00002000	e1000_hw.h
36875	E1000_RFCTL_IPFRSP_DIS	0x00004000	e1000_hw.h
36876	E1000_RFCTL_EXTEN	0x00008000	e1000_hw.h
36877	E1000_RFCTL_IPV6_EX_DIS	0x00010000	e1000_hw.h
36878	E1000_RFCTL_NEW_IPV6_EXT_DIS	0x00020000	e1000_hw.h
36879	E1000_RXDCTL_PTHRESH	0x0000003F	e1000_hw.h	RXDCTL Prefetch Threshold
36880	E1000_RXDCTL_HTHRESH	0x00003F00	e1000_hw.h	RXDCTL Host Threshold
36881	E1000_RXDCTL_WTHRESH	0x003F0000	e1000_hw.h	RXDCTL Writeback Threshold
36882	E1000_RXDCTL_GRAN	0x01000000	e1000_hw.h	RXDCTL Granularity
36883	E1000_RXDCTL_QUEUE_ENABLE	0x02000000	e1000_hw.h	Enable specific Rx Queue
36884	IGB_RX_PTHRESH	16	e1000_hw.h
36885	IGB_RX_HTHRESH	8	e1000_hw.h
36886	IGB_RX_WTHRESH	1	e1000_hw.h
36887	E1000_TXDCTL_PTHRESH	0x0000003F	e1000_hw.h	TXDCTL Prefetch Threshold
36888	E1000_TXDCTL_HTHRESH	0x00003F00	e1000_hw.h	TXDCTL Host Threshold
36889	E1000_TXDCTL_WTHRESH	0x003F0000	e1000_hw.h	TXDCTL Writeback Threshold
36890	E1000_TXDCTL_GRAN	0x01000000	e1000_hw.h	TXDCTL Granularity
36891	E1000_TXDCTL_LWTHRESH	0xFE000000	e1000_hw.h	TXDCTL Low Threshold
36892	E1000_TXDCTL_FULL_TX_DESC_WB	0x01010000	e1000_hw.h	GRAN=1, WTHRESH=1
36893	E1000_TXDCTL_COUNT_DESC	0x00400000	e1000_hw.h	Enable the counting of desc.
36894	E1000_TXDCTL_QUEUE_ENABLE	0x02000000	e1000_hw.h	Enable specific Tx Queue
36895	E1000_TXCW_FD	0x00000020	e1000_hw.h	TXCW full duplex
36896	E1000_TXCW_HD	0x00000040	e1000_hw.h	TXCW half duplex
36897	E1000_TXCW_PAUSE	0x00000080	e1000_hw.h	TXCW sym pause request
36898	E1000_TXCW_ASM_DIR	0x00000100	e1000_hw.h	TXCW astm pause direction
36899	E1000_TXCW_PAUSE_MASK	0x00000180	e1000_hw.h	TXCW pause request mask
36900	E1000_TXCW_RF	0x00003000	e1000_hw.h	TXCW remote fault
36901	E1000_TXCW_NP	0x00008000	e1000_hw.h	TXCW next page
36902	E1000_TXCW_CW	0x0000ffff	e1000_hw.h	TxConfigWord mask
36903	E1000_TXCW_TXC	0x40000000	e1000_hw.h	Transmit Config control
36904	E1000_TXCW_ANE	0x80000000	e1000_hw.h	Auto-neg enable
36905	E1000_RXCW_CW	0x0000ffff	e1000_hw.h	RxConfigWord mask
36906	E1000_RXCW_NC	0x04000000	e1000_hw.h	Receive config no carrier
36907	E1000_RXCW_IV	0x08000000	e1000_hw.h	Receive config invalid
36908	E1000_RXCW_CC	0x10000000	e1000_hw.h	Receive config change
36909	E1000_RXCW_C	0x20000000	e1000_hw.h	Receive config
36910	E1000_RXCW_SYNCH	0x40000000	e1000_hw.h	Receive config synch
36911	E1000_RXCW_ANC	0x80000000	e1000_hw.h	Auto-neg complete
36912	E1000_TCTL_RST	0x00000001	e1000_hw.h	software reset
36913	E1000_TCTL_EN	0x00000002	e1000_hw.h	enable tx
36914	E1000_TCTL_BCE	0x00000004	e1000_hw.h	busy check enable
36915	E1000_TCTL_PSP	0x00000008	e1000_hw.h	pad short packets
36916	E1000_TCTL_CT	0x00000ff0	e1000_hw.h	collision threshold
36917	E1000_TCTL_COLD	0x003ff000	e1000_hw.h	collision distance
36918	E1000_TCTL_SWXOFF	0x00400000	e1000_hw.h	SW Xoff transmission
36919	E1000_TCTL_PBE	0x00800000	e1000_hw.h	Packet Burst Enable
36920	E1000_TCTL_RTLC	0x01000000	e1000_hw.h	Re-transmit on late collision
36921	E1000_TCTL_NRTU	0x02000000	e1000_hw.h	No Re-transmit on underrun
36922	E1000_TCTL_MULR	0x10000000	e1000_hw.h	Multiple request support
36923	E1000_TCTL_EXT_BST_MASK	0x000003FF	e1000_hw.h	Backoff Slot Time
36924	E1000_TCTL_EXT_GCEX_MASK	0x000FFC00	e1000_hw.h	Gigabit Carry Extend Padding
36925	DEFAULT_80003ES2LAN_TCTL_EXT_GC	0x00010000	e1000_hw.h
36926	E1000_RXCSUM_PCSS_MASK	0x000000FF	e1000_hw.h	Packet Checksum Start
36927	E1000_RXCSUM_IPOFL	0x00000100	e1000_hw.h	IPv4 checksum offload
36928	E1000_RXCSUM_TUOFL	0x00000200	e1000_hw.h	TCP / UDP checksum offload
36929	E1000_RXCSUM_IPV6OFL	0x00000400	e1000_hw.h	IPv6 checksum offload
36930	E1000_RXCSUM_IPPCSE	0x00001000	e1000_hw.h	IP payload checksum enable
36931	E1000_RXCSUM_PCSD	0x00002000	e1000_hw.h	packet checksum disabled
36932	E1000_MRQC_ENABLE_MASK	0x00000003	e1000_hw.h
36933	E1000_MRQC_ENABLE_VMDQ	0x00000003	e1000_hw.h
36934	E1000_MRQC_ENABLE_RSS_2Q	0x00000001	e1000_hw.h
36935	E1000_MRQC_ENABLE_RSS_INT	0x00000004	e1000_hw.h
36936	E1000_MRQC_RSS_FIELD_MASK	0xFFFF0000	e1000_hw.h
36937	E1000_MRQC_RSS_FIELD_IPV4_TCP	0x00010000	e1000_hw.h
36938	E1000_MRQC_RSS_FIELD_IPV4	0x00020000	e1000_hw.h
36939	E1000_MRQC_RSS_FIELD_IPV6_TCP_E	0x00040000	e1000_hw.h
36940	E1000_MRQC_RSS_FIELD_IPV6_EX	0x00080000	e1000_hw.h
36941	E1000_MRQC_RSS_FIELD_IPV6	0x00100000	e1000_hw.h
36942	E1000_MRQC_RSS_FIELD_IPV6_TCP	0x00200000	e1000_hw.h
36943	E1000_WUC_APME	0x00000001	e1000_hw.h	APM Enable
36944	E1000_WUC_PME_EN	0x00000002	e1000_hw.h	PME Enable
36945	E1000_WUC_PME_STATUS	0x00000004	e1000_hw.h	PME Status
36946	E1000_WUC_APMPME	0x00000008	e1000_hw.h	Assert PME on APM Wakeup
36947	E1000_WUC_SPM	0x80000000	e1000_hw.h	Enable SPM
36948	E1000_WUFC_LNKC	0x00000001	e1000_hw.h	Link Status Change Wakeup Enable
36949	E1000_WUFC_MAG	0x00000002	e1000_hw.h	Magic Packet Wakeup Enable
36950	E1000_WUFC_EX	0x00000004	e1000_hw.h	Directed Exact Wakeup Enable
36951	E1000_WUFC_MC	0x00000008	e1000_hw.h	Directed Multicast Wakeup Enable
36952	E1000_WUFC_BC	0x00000010	e1000_hw.h	Broadcast Wakeup Enable
36953	E1000_WUFC_ARP	0x00000020	e1000_hw.h	ARP Request Packet Wakeup Enable
36954	E1000_WUFC_IPV4	0x00000040	e1000_hw.h	Directed IPv4 Packet Wakeup Enable
36955	E1000_WUFC_IPV6	0x00000080	e1000_hw.h	Directed IPv6 Packet Wakeup Enable
36956	E1000_WUFC_IGNORE_TCO	0x00008000	e1000_hw.h	Ignore WakeOn TCO packets
36957	E1000_WUFC_FLX0	0x00010000	e1000_hw.h	Flexible Filter 0 Enable
36958	E1000_WUFC_FLX1	0x00020000	e1000_hw.h	Flexible Filter 1 Enable
36959	E1000_WUFC_FLX2	0x00040000	e1000_hw.h	Flexible Filter 2 Enable
36960	E1000_WUFC_FLX3	0x00080000	e1000_hw.h	Flexible Filter 3 Enable
36961	E1000_WUFC_ALL_FILTERS	0x000F00FF	e1000_hw.h	Mask for all wakeup filters
36962	E1000_WUFC_FLX_OFFSET	16	e1000_hw.h	Offset to the Flexible Filters bits
36963	E1000_WUFC_FLX_FILTERS	0x000F0000	e1000_hw.h	Mask for the 4 flexible filters
36964	E1000_WUS_LNKC	0x00000001	e1000_hw.h	Link Status Changed
36965	E1000_WUS_MAG	0x00000002	e1000_hw.h	Magic Packet Received
36966	E1000_WUS_EX	0x00000004	e1000_hw.h	Directed Exact Received
36967	E1000_WUS_MC	0x00000008	e1000_hw.h	Directed Multicast Received
36968	E1000_WUS_BC	0x00000010	e1000_hw.h	Broadcast Received
36969	E1000_WUS_ARP	0x00000020	e1000_hw.h	ARP Request Packet Received
36970	E1000_WUS_IPV4	0x00000040	e1000_hw.h	Directed IPv4 Packet Wakeup Received
36971	E1000_WUS_IPV6	0x00000080	e1000_hw.h	Directed IPv6 Packet Wakeup Received
36972	E1000_WUS_FLX0	0x00010000	e1000_hw.h	Flexible Filter 0 Match
36973	E1000_WUS_FLX1	0x00020000	e1000_hw.h	Flexible Filter 1 Match
36974	E1000_WUS_FLX2	0x00040000	e1000_hw.h	Flexible Filter 2 Match
36975	E1000_WUS_FLX3	0x00080000	e1000_hw.h	Flexible Filter 3 Match
36976	E1000_WUS_FLX_FILTERS	0x000F0000	e1000_hw.h	Mask for the 4 flexible filters
36977	E1000_MANC_SMBUS_EN	0x00000001	e1000_hw.h	SMBus Enabled - RO
36978	E1000_MANC_ASF_EN	0x00000002	e1000_hw.h	ASF Enabled - RO
36979	E1000_MANC_R_ON_FORCE	0x00000004	e1000_hw.h	Reset on Force TCO - RO
36980	E1000_MANC_RMCP_EN	0x00000100	e1000_hw.h	Enable RCMP 026Fh Filtering
36981	E1000_MANC_0298_EN	0x00000200	e1000_hw.h	Enable RCMP 0298h Filtering
36982	E1000_MANC_IPV4_EN	0x00000400	e1000_hw.h	Enable IPv4
36983	E1000_MANC_IPV6_EN	0x00000800	e1000_hw.h	Enable IPv6
36984	E1000_MANC_SNAP_EN	0x00001000	e1000_hw.h	Accept LLC/SNAP
36985	E1000_MANC_ARP_EN	0x00002000	e1000_hw.h	Enable ARP Request Filtering
36986	E1000_MANC_NEIGHBOR_EN	0x00004000	e1000_hw.h	Enable Neighbor Discovery
36987	E1000_MANC_ARP_RES_EN	0x00008000	e1000_hw.h	Enable ARP response Filtering
36988	E1000_MANC_TCO_RESET	0x00010000	e1000_hw.h	TCO Reset Occurred
36989	E1000_MANC_RCV_TCO_EN	0x00020000	e1000_hw.h	Receive TCO Packets Enabled
36990	E1000_MANC_REPORT_STATUS	0x00040000	e1000_hw.h	Status Reporting Enabled
36991	E1000_MANC_RCV_ALL	0x00080000	e1000_hw.h	Receive All Enabled
36992	E1000_MANC_BLK_PHY_RST_ON_IDE	0x00040000	e1000_hw.h	Block phy resets
36993	E1000_MANC_EN_MAC_ADDR_FILTER	0x00100000	e1000_hw.h	Enable MAC address
36994	E1000_MANC_EN_MNG2HOST	0x00200000	e1000_hw.h	Enable MNG packets to host
36995	E1000_MANC_EN_IP_ADDR_FILTER	0x00400000	e1000_hw.h	Enable IP address
36996	E1000_MANC_EN_XSUM_FILTER	0x00800000	e1000_hw.h	Enable checksum filtering
36997	E1000_MANC_BR_EN	0x01000000	e1000_hw.h	Enable broadcast filtering
36998	E1000_MANC_SMB_REQ	0x01000000	e1000_hw.h	SMBus Request
36999	E1000_MANC_SMB_GNT	0x02000000	e1000_hw.h	SMBus Grant
37000	E1000_MANC_SMB_CLK_IN	0x04000000	e1000_hw.h	SMBus Clock In
37001	E1000_MANC_SMB_DATA_IN	0x08000000	e1000_hw.h	SMBus Data In
37002	E1000_MANC_SMB_DATA_OUT	0x10000000	e1000_hw.h	SMBus Data Out
37003	E1000_MANC_SMB_CLK_OUT	0x20000000	e1000_hw.h	SMBus Clock Out
37004	E1000_MANC_SMB_DATA_OUT_SHIFT	28	e1000_hw.h	SMBus Data Out Shift
37005	E1000_MANC_SMB_CLK_OUT_SHIFT	29	e1000_hw.h	SMBus Clock Out Shift
37006	E1000_SWSM_SMBI	0x00000001	e1000_hw.h	Driver Semaphore bit
37007	E1000_SWSM_SWESMBI	0x00000002	e1000_hw.h	FW Semaphore bit
37008	E1000_SWSM_WMNG	0x00000004	e1000_hw.h	Wake MNG Clock
37009	E1000_SWSM_DRV_LOAD	0x00000008	e1000_hw.h	Driver Loaded Bit
37010	E1000_FWSM_MODE_MASK	0x0000000E	e1000_hw.h	FW mode
37011	E1000_FWSM_MODE_SHIFT	1	e1000_hw.h
37012	E1000_FWSM_FW_VALID	0x00008000	e1000_hw.h	FW established a valid mode
37013	E1000_FWSM_RSPCIPHY	0x00000040	e1000_hw.h	Reset PHY on PCI reset
37014	E1000_FWSM_DISSW	0x10000000	e1000_hw.h	FW disable SW Write Access
37015	E1000_FWSM_SKUSEL_MASK	0x60000000	e1000_hw.h	LAN SKU select
37016	E1000_FWSM_SKUEL_SHIFT	29	e1000_hw.h
37017	E1000_FWSM_SKUSEL_EMB	0x0	e1000_hw.h	Embedded SKU
37018	E1000_FWSM_SKUSEL_CONS	0x1	e1000_hw.h	Consumer SKU
37019	E1000_FWSM_SKUSEL_PERF_100	0x2	e1000_hw.h	Perf & Corp 10/100 SKU
37020	E1000_FWSM_SKUSEL_PERF_GBE	0x3	e1000_hw.h	Perf & Copr GbE SKU
37021	E1000_FFLT_DBG_INVC	0x00100000	e1000_hw.h	Invalid /C/ code handling
37022	E1000_HICR_EN	0x00000001	e1000_hw.h	Enable Bit - RO
37023	E1000_HICR_C	0x00000002	e1000_hw.h	Driver sets this bit when done
37024	E1000_HICR_SV	0x00000004	e1000_hw.h	Status Validity
37025	E1000_HICR_FWR	0x00000080	e1000_hw.h	FW reset. Set by the Host
37026	E1000_HI_MAX_DATA_LENGTH	252	e1000_hw.h	Host Interface data length
37027	E1000_HI_MAX_BLOCK_BYTE_LENGTH	1792	e1000_hw.h	Number of bytes in range
37028	E1000_HI_MAX_BLOCK_DWORD_LENGTH	448	e1000_hw.h	Number of dwords in range
37029	E1000_HI_COMMAND_TIMEOUT	500	e1000_hw.h	Time in ms to process HI command
37030	E1000_HSMC0R_CLKIN	0x00000001	e1000_hw.h	SMB Clock in
37031	E1000_HSMC0R_DATAIN	0x00000002	e1000_hw.h	SMB Data in
37032	E1000_HSMC0R_DATAOUT	0x00000004	e1000_hw.h	SMB Data out
37033	E1000_HSMC0R_CLKOUT	0x00000008	e1000_hw.h	SMB Clock out
37034	E1000_HSMC1R_CLKIN	E1000_HSMC0R_CLKIN	e1000_hw.h
37035	E1000_HSMC1R_DATAIN	E1000_HSMC0R_DATAIN	e1000_hw.h
37036	E1000_HSMC1R_DATAOUT	E1000_HSMC0R_DATAOUT	e1000_hw.h
37037	E1000_HSMC1R_CLKOUT	E1000_HSMC0R_CLKOUT	e1000_hw.h
37038	E1000_FWSTS_FWS_MASK	0x000000FF	e1000_hw.h	FW Status
37039	E1000_WUPL_LENGTH_MASK	0x0FFF	e1000_hw.h	Only the lower 12 bits are valid
37040	E1000_MDALIGN	4096	e1000_hw.h
37041	E1000_GCR_RXD_NO_SNOOP	0x00000001	e1000_hw.h
37042	E1000_GCR_RXDSCW_NO_SNOOP	0x00000002	e1000_hw.h
37043	E1000_GCR_RXDSCR_NO_SNOOP	0x00000004	e1000_hw.h
37044	E1000_GCR_TXD_NO_SNOOP	0x00000008	e1000_hw.h
37045	E1000_GCR_TXDSCW_NO_SNOOP	0x00000010	e1000_hw.h
37046	E1000_GCR_TXDSCR_NO_SNOOP	0x00000020	e1000_hw.h
37047	PCI_EX_NO_SNOOP_ALL	(E1000_GCR_RXD_NO_SNOOP \| \ E1000_GCR_RXDSCW_NO_SNOOP \| \ E1000_GCR_RXDSCR_NO_SNOOP \| \ E1000_GCR_TXD_NO_SNOO	e1000_hw.h
37048	PCI_EX_82566_SNOOP_ALL	PCI_EX_NO_SNOOP_ALL	e1000_hw.h
37049	E1000_GCR_L1_ACT_WITHOUT_L0S_RX	0x08000000	e1000_hw.h
37050	E1000_FACTPS_FUNC0_POWER_STATE_	0x00000003	e1000_hw.h
37051	E1000_FACTPS_LAN0_VALID	0x00000004	e1000_hw.h
37052	E1000_FACTPS_FUNC0_AUX_EN	0x00000008	e1000_hw.h
37053	E1000_FACTPS_FUNC1_POWER_STATE_	0x000000C0	e1000_hw.h
37054	E1000_FACTPS_FUNC1_POWER_STATE_	6	e1000_hw.h
37055	E1000_FACTPS_LAN1_VALID	0x00000100	e1000_hw.h
37056	E1000_FACTPS_FUNC1_AUX_EN	0x00000200	e1000_hw.h
37057	E1000_FACTPS_FUNC2_POWER_STATE_	0x00003000	e1000_hw.h
37058	E1000_FACTPS_FUNC2_POWER_STATE_	12	e1000_hw.h
37059	E1000_FACTPS_IDE_ENABLE	0x00004000	e1000_hw.h
37060	E1000_FACTPS_FUNC2_AUX_EN	0x00008000	e1000_hw.h
37061	E1000_FACTPS_FUNC3_POWER_STATE_	0x000C0000	e1000_hw.h
37062	E1000_FACTPS_FUNC3_POWER_STATE_	18	e1000_hw.h
37063	E1000_FACTPS_SP_ENABLE	0x00100000	e1000_hw.h
37064	E1000_FACTPS_FUNC3_AUX_EN	0x00200000	e1000_hw.h
37065	E1000_FACTPS_FUNC4_POWER_STATE_	0x03000000	e1000_hw.h
37066	E1000_FACTPS_FUNC4_POWER_STATE_	24	e1000_hw.h
37067	E1000_FACTPS_IPMI_ENABLE	0x04000000	e1000_hw.h
37068	E1000_FACTPS_FUNC4_AUX_EN	0x08000000	e1000_hw.h
37069	E1000_FACTPS_MNGCG	0x20000000	e1000_hw.h
37070	E1000_FACTPS_LAN_FUNC_SEL	0x40000000	e1000_hw.h
37071	E1000_FACTPS_PM_STATE_CHANGED	0x80000000	e1000_hw.h
37072	PCI_EX_LINK_STATUS	0x12	e1000_hw.h
37073	PCI_EX_LINK_WIDTH_MASK	0x3F0	e1000_hw.h
37074	PCI_EX_LINK_WIDTH_SHIFT	4	e1000_hw.h
37075	EEPROM_READ_OPCODE_MICROWIRE	0x6	e1000_hw.h	EEPROM read opcode
37076	EEPROM_WRITE_OPCODE_MICROWIRE	0x5	e1000_hw.h	EEPROM write opcode
37077	EEPROM_ERASE_OPCODE_MICROWIRE	0x7	e1000_hw.h	EEPROM erase opcode
37078	EEPROM_EWEN_OPCODE_MICROWIRE	0x13	e1000_hw.h	EEPROM erase/write enable
37079	EEPROM_EWDS_OPCODE_MICROWIRE	0x10	e1000_hw.h	EEPROM erast/write disable
37080	EEPROM_MAX_RETRY_SPI	5000	e1000_hw.h	Max wait of 5ms, for RDY signal
37081	EEPROM_READ_OPCODE_SPI	0x03	e1000_hw.h	EEPROM read opcode
37082	EEPROM_WRITE_OPCODE_SPI	0x02	e1000_hw.h	EEPROM write opcode
37083	EEPROM_A8_OPCODE_SPI	0x08	e1000_hw.h	opcode bit-3 = address bit-8
37084	EEPROM_WREN_OPCODE_SPI	0x06	e1000_hw.h	EEPROM set Write Enable latch
37085	EEPROM_WRDI_OPCODE_SPI	0x04	e1000_hw.h	EEPROM reset Write Enable latch
37086	EEPROM_RDSR_OPCODE_SPI	0x05	e1000_hw.h	EEPROM read Status register
37087	EEPROM_WRSR_OPCODE_SPI	0x01	e1000_hw.h	EEPROM write Status register
37088	EEPROM_ERASE4K_OPCODE_SPI	0x20	e1000_hw.h	EEPROM ERASE 4KB
37089	EEPROM_ERASE64K_OPCODE_SPI	0xD8	e1000_hw.h	EEPROM ERASE 64KB
37090	EEPROM_ERASE256_OPCODE_SPI	0xDB	e1000_hw.h	EEPROM ERASE 256B
37091	EEPROM_WORD_SIZE_SHIFT	6	e1000_hw.h
37092	EEPROM_SIZE_SHIFT	10	e1000_hw.h
37093	EEPROM_SIZE_MASK	0x1C00	e1000_hw.h
37094	EEPROM_COMPAT	0x0003	e1000_hw.h
37095	EEPROM_ID_LED_SETTINGS	0x0004	e1000_hw.h
37096	EEPROM_VERSION	0x0005	e1000_hw.h
37097	EEPROM_SERDES_AMPLITUDE	0x0006	e1000_hw.h	For SERDES output amplitude adjustment.
37098	EEPROM_PHY_CLASS_WORD	0x0007	e1000_hw.h
37099	EEPROM_INIT_CONTROL1_REG	0x000A	e1000_hw.h
37100	EEPROM_INIT_CONTROL2_REG	0x000F	e1000_hw.h
37101	EEPROM_SWDEF_PINS_CTRL_PORT_1	0x0010	e1000_hw.h
37102	EEPROM_INIT_CONTROL3_PORT_B	0x0014	e1000_hw.h
37103	EEPROM_INIT_3GIO_3	0x001A	e1000_hw.h
37104	EEPROM_SWDEF_PINS_CTRL_PORT_0	0x0020	e1000_hw.h
37105	EEPROM_INIT_CONTROL3_PORT_A	0x0024	e1000_hw.h
37106	EEPROM_CFG	0x0012	e1000_hw.h
37107	EEPROM_FLASH_VERSION	0x0032	e1000_hw.h
37108	EEPROM_ALT_MAC_ADDR_PTR	0x0037	e1000_hw.h
37109	EEPROM_CHECKSUM_REG	0x003F	e1000_hw.h
37110	E1000_EEPROM_CFG_DONE	0x00040000	e1000_hw.h	MNG config cycle done
37111	E1000_EEPROM_CFG_DONE_PORT_1	0x00080000	e1000_hw.h	...for second port
37112	ID_LED_RESERVED_0000	0x0000	e1000_hw.h
37113	ID_LED_RESERVED_FFFF	0xFFFF	e1000_hw.h
37114	ID_LED_RESERVED_82573	0xF746	e1000_hw.h
37115	ID_LED_DEFAULT_82573	0x1811	e1000_hw.h
37116	ID_LED_DEFAULT	((ID_LED_OFF1_ON2 << 12) \| \ (ID_LED_OFF1_OFF2 << 8) \| \ (ID_LED_DEF1_DEF2 << 4) \| \ (ID_LED_DEF1_DEF2))	e1000_hw.h
37117	ID_LED_DEFAULT_ICH8LAN	((ID_LED_DEF1_DEF2 << 12) \| \ (ID_LED_DEF1_OFF2 << 8) \| \ (ID_LED_DEF1_ON2 << 4) \| \ (ID_LED_DEF1_DEF2))	e1000_hw.h
37118	ID_LED_DEF1_DEF2	0x1	e1000_hw.h
37119	ID_LED_DEF1_ON2	0x2	e1000_hw.h
37120	ID_LED_DEF1_OFF2	0x3	e1000_hw.h
37121	ID_LED_ON1_DEF2	0x4	e1000_hw.h
37122	ID_LED_ON1_ON2	0x5	e1000_hw.h
37123	ID_LED_ON1_OFF2	0x6	e1000_hw.h
37124	ID_LED_OFF1_DEF2	0x7	e1000_hw.h
37125	ID_LED_OFF1_ON2	0x8	e1000_hw.h
37126	ID_LED_OFF1_OFF2	0x9	e1000_hw.h
37127	IGP_ACTIVITY_LED_MASK	0xFFFFF0FF	e1000_hw.h
37128	IGP_ACTIVITY_LED_ENABLE	0x0300	e1000_hw.h
37129	IGP_LED3_MODE	0x07000000	e1000_hw.h
37130	EEPROM_SERDES_AMPLITUDE_MASK	0x000F	e1000_hw.h
37131	EEPROM_PHY_CLASS_A	0x8000	e1000_hw.h
37132	EEPROM_WORD0A_ILOS	0x0010	e1000_hw.h
37133	EEPROM_WORD0A_SWDPIO	0x01E0	e1000_hw.h
37134	EEPROM_WORD0A_LRST	0x0200	e1000_hw.h
37135	EEPROM_WORD0A_FD	0x0400	e1000_hw.h
37136	EEPROM_WORD0A_66MHZ	0x0800	e1000_hw.h
37137	EEPROM_WORD0F_PAUSE_MASK	0x3000	e1000_hw.h
37138	EEPROM_WORD0F_PAUSE	0x1000	e1000_hw.h
37139	EEPROM_WORD0F_ASM_DIR	0x2000	e1000_hw.h
37140	EEPROM_WORD0F_ANE	0x0800	e1000_hw.h
37141	EEPROM_WORD0F_SWPDIO_EXT	0x00F0	e1000_hw.h
37142	EEPROM_WORD0F_LPLU	0x0001	e1000_hw.h
37143	EEPROM_WORD1020_GIGA_DISABLE	0x0010	e1000_hw.h
37144	EEPROM_WORD1020_GIGA_DISABLE_NO	0x0008	e1000_hw.h
37145	EEPROM_WORD1A_ASPM_MASK	0x000C	e1000_hw.h
37146	EEPROM_SUM	0xBABA	e1000_hw.h
37147	EEPROM_NODE_ADDRESS_BYTE_0	0	e1000_hw.h
37148	EEPROM_PBA_BYTE_1	8	e1000_hw.h
37149	EEPROM_RESERVED_WORD	0xFFFF	e1000_hw.h
37150	PBA_SIZE	4	e1000_hw.h
37151	E1000_COLLISION_THRESHOLD	15	e1000_hw.h
37152	E1000_CT_SHIFT	4	e1000_hw.h
37153	E1000_COLLISION_DISTANCE	63	e1000_hw.h
37154	E1000_COLLISION_DISTANCE_82542	64	e1000_hw.h
37155	E1000_FDX_COLLISION_DISTANCE	E1000_COLLISION_DISTANCE	e1000_hw.h
37156	E1000_HDX_COLLISION_DISTANCE	E1000_COLLISION_DISTANCE	e1000_hw.h
37157	E1000_COLD_SHIFT	12	e1000_hw.h
37158	REQ_TX_DESCRIPTOR_MULTIPLE	8	e1000_hw.h
37159	REQ_RX_DESCRIPTOR_MULTIPLE	8	e1000_hw.h
37160	DEFAULT_82542_TIPG_IPGT	10	e1000_hw.h
37161	DEFAULT_82543_TIPG_IPGT_FIBER	9	e1000_hw.h
37162	DEFAULT_82543_TIPG_IPGT_COPPER	8	e1000_hw.h
37163	E1000_TIPG_IPGT_MASK	0x000003FF	e1000_hw.h
37164	E1000_TIPG_IPGR1_MASK	0x000FFC00	e1000_hw.h
37165	E1000_TIPG_IPGR2_MASK	0x3FF00000	e1000_hw.h
37166	DEFAULT_82542_TIPG_IPGR1	2	e1000_hw.h
37167	DEFAULT_82543_TIPG_IPGR1	8	e1000_hw.h
37168	E1000_TIPG_IPGR1_SHIFT	10	e1000_hw.h
37169	DEFAULT_82542_TIPG_IPGR2	10	e1000_hw.h
37170	DEFAULT_82543_TIPG_IPGR2	6	e1000_hw.h
37171	DEFAULT_80003ES2LAN_TIPG_IPGR2	7	e1000_hw.h
37172	E1000_TIPG_IPGR2_SHIFT	20	e1000_hw.h
37173	DEFAULT_80003ES2LAN_TIPG_IPGT_1	0x00000009	e1000_hw.h
37174	DEFAULT_80003ES2LAN_TIPG_IPGT_1	0x00000008	e1000_hw.h
37175	E1000_TXDMAC_DPP	0x00000001	e1000_hw.h
37176	TX_THRESHOLD_START	8	e1000_hw.h
37177	TX_THRESHOLD_INCREMENT	10	e1000_hw.h
37178	TX_THRESHOLD_DECREMENT	1	e1000_hw.h
37179	TX_THRESHOLD_STOP	190	e1000_hw.h
37180	TX_THRESHOLD_DISABLE	0	e1000_hw.h
37181	TX_THRESHOLD_TIMER_MS	10000	e1000_hw.h
37182	MIN_NUM_XMITS	1000	e1000_hw.h
37183	IFS_MAX	80	e1000_hw.h
37184	IFS_STEP	10	e1000_hw.h
37185	IFS_MIN	40	e1000_hw.h
37186	IFS_RATIO	4	e1000_hw.h
37187	E1000_EXTCNF_CTRL_PCIE_WRITE_EN	0x00000001	e1000_hw.h
37188	E1000_EXTCNF_CTRL_PHY_WRITE_ENA	0x00000002	e1000_hw.h
37189	E1000_EXTCNF_CTRL_D_UD_ENABLE	0x00000004	e1000_hw.h
37190	E1000_EXTCNF_CTRL_D_UD_LATENCY	0x00000008	e1000_hw.h
37191	E1000_EXTCNF_CTRL_D_UD_OWNER	0x00000010	e1000_hw.h
37192	E1000_EXTCNF_CTRL_MDIO_SW_OWNER	0x00000020	e1000_hw.h
37193	E1000_EXTCNF_CTRL_MDIO_HW_OWNER	0x00000040	e1000_hw.h
37194	E1000_EXTCNF_CTRL_EXT_CNF_POINT	0x0FFF0000	e1000_hw.h
37195	E1000_EXTCNF_SIZE_EXT_PHY_LENGT	0x000000FF	e1000_hw.h
37196	E1000_EXTCNF_SIZE_EXT_DOCK_LENG	0x0000FF00	e1000_hw.h
37197	E1000_EXTCNF_SIZE_EXT_PCIE_LENG	0x00FF0000	e1000_hw.h
37198	E1000_EXTCNF_CTRL_LCD_WRITE_ENA	0x00000001	e1000_hw.h
37199	E1000_EXTCNF_CTRL_SWFLAG	0x00000020	e1000_hw.h
37200	E1000_PBA_8K	0x0008	e1000_hw.h	8KB, default Rx allocation
37201	E1000_PBA_12K	0x000C	e1000_hw.h	12KB, default Rx allocation
37202	E1000_PBA_16K	0x0010	e1000_hw.h	16KB, default TX allocation
37203	E1000_PBA_20K	0x0014	e1000_hw.h
37204	E1000_PBA_22K	0x0016	e1000_hw.h
37205	E1000_PBA_24K	0x0018	e1000_hw.h
37206	E1000_PBA_30K	0x001E	e1000_hw.h
37207	E1000_PBA_32K	0x0020	e1000_hw.h
37208	E1000_PBA_34K	0x0022	e1000_hw.h
37209	E1000_PBA_38K	0x0026	e1000_hw.h
37210	E1000_PBA_40K	0x0028	e1000_hw.h
37211	E1000_PBA_48K	0x0030	e1000_hw.h	48KB, default RX allocation
37212	E1000_PBA_64K	0x0040	e1000_hw.h	64KB
37213	E1000_PBS_16K	E1000_PBA_16K	e1000_hw.h
37214	FLOW_CONTROL_ADDRESS_LOW	0x00C28001	e1000_hw.h
37215	FLOW_CONTROL_ADDRESS_HIGH	0x00000100	e1000_hw.h
37216	FLOW_CONTROL_TYPE	0x8808	e1000_hw.h
37217	FC_DEFAULT_HI_THRESH	(0x8000)	e1000_hw.h	32KB
37218	FC_DEFAULT_LO_THRESH	(0x4000)	e1000_hw.h	16KB
37219	FC_DEFAULT_TX_TIMER	(0x100)	e1000_hw.h	~130 us
37220	PCIX_COMMAND_REGISTER	0xE6	e1000_hw.h
37221	PCIX_STATUS_REGISTER_LO	0xE8	e1000_hw.h
37222	PCIX_STATUS_REGISTER_HI	0xEA	e1000_hw.h
37223	PCIX_COMMAND_MMRBC_MASK	0x000C	e1000_hw.h
37224	PCIX_COMMAND_MMRBC_SHIFT	0x2	e1000_hw.h
37225	PCIX_STATUS_HI_MMRBC_MASK	0x0060	e1000_hw.h
37226	PCIX_STATUS_HI_MMRBC_SHIFT	0x5	e1000_hw.h
37227	PCIX_STATUS_HI_MMRBC_4K	0x3	e1000_hw.h
37228	PCIX_STATUS_HI_MMRBC_2K	0x2	e1000_hw.h
37229	PAUSE_SHIFT	5	e1000_hw.h
37230	SWDPIO_SHIFT	17	e1000_hw.h
37231	SWDPIO__EXT_SHIFT	4	e1000_hw.h
37232	ILOS_SHIFT	3	e1000_hw.h
37233	RECEIVE_BUFFER_ALIGN_SIZE	(256)	e1000_hw.h
37234	LINK_UP_TIMEOUT	500	e1000_hw.h
37235	MASTER_DISABLE_TIMEOUT	800	e1000_hw.h
37236	AUTO_READ_DONE_TIMEOUT	10	e1000_hw.h
37237	PHY_CFG_TIMEOUT	100	e1000_hw.h
37238	E1000_TX_BUFFER_SIZE	((uint32_t)1514)	e1000_hw.h
37239	CARRIER_EXTENSION	0x0F	e1000_hw.h
37240	E1000_CTRL_PHY_RESET_DIR	E1000_CTRL_SWDPIO0	e1000_hw.h
37241	E1000_CTRL_PHY_RESET	E1000_CTRL_SWDPIN0	e1000_hw.h
37242	E1000_CTRL_MDIO_DIR	E1000_CTRL_SWDPIO2	e1000_hw.h
37243	E1000_CTRL_MDIO	E1000_CTRL_SWDPIN2	e1000_hw.h
37244	E1000_CTRL_MDC_DIR	E1000_CTRL_SWDPIO3	e1000_hw.h
37245	E1000_CTRL_MDC	E1000_CTRL_SWDPIN3	e1000_hw.h
37246	E1000_CTRL_PHY_RESET_DIR4	E1000_CTRL_EXT_SDP4_DIR	e1000_hw.h
37247	E1000_CTRL_PHY_RESET4	E1000_CTRL_EXT_SDP4_DATA	e1000_hw.h
37248	PHY_CTRL	0x00	e1000_hw.h	Control Register
37249	PHY_STATUS	0x01	e1000_hw.h	Status Regiser
37250	PHY_ID1	0x02	e1000_hw.h	Phy Id Reg (word 1)
37251	PHY_ID2	0x03	e1000_hw.h	Phy Id Reg (word 2)
37252	PHY_AUTONEG_ADV	0x04	e1000_hw.h	Autoneg Advertisement
37253	PHY_LP_ABILITY	0x05	e1000_hw.h	Link Partner Ability (Base Page)
37254	PHY_AUTONEG_EXP	0x06	e1000_hw.h	Autoneg Expansion Reg
37255	PHY_NEXT_PAGE_TX	0x07	e1000_hw.h	Next Page TX
37256	PHY_LP_NEXT_PAGE	0x08	e1000_hw.h	Link Partner Next Page
37257	PHY_1000T_CTRL	0x09	e1000_hw.h	1000Base-T Control Reg
37258	PHY_1000T_STATUS	0x0A	e1000_hw.h	1000Base-T Status Reg
37259	PHY_EXT_STATUS	0x0F	e1000_hw.h	Extended Status Reg
37260	MAX_PHY_REG_ADDRESS	0x1F	e1000_hw.h	5 bit address bus (0-0x1F)
37261	MAX_PHY_MULTI_PAGE_REG	0xF	e1000_hw.h	Registers equal on all pages
37262	M88E1000_PHY_SPEC_CTRL	0x10	e1000_hw.h	PHY Specific Control Register
37263	M88E1000_PHY_SPEC_STATUS	0x11	e1000_hw.h	PHY Specific Status Register
37264	M88E1000_INT_ENABLE	0x12	e1000_hw.h	Interrupt Enable Register
37265	M88E1000_INT_STATUS	0x13	e1000_hw.h	Interrupt Status Register
37266	M88E1000_EXT_PHY_SPEC_CTRL	0x14	e1000_hw.h	Extended PHY Specific Control
37267	M88E1000_RX_ERR_CNTR	0x15	e1000_hw.h	Receive Error Counter
37268	M88E1000_PHY_EXT_CTRL	0x1A	e1000_hw.h	PHY extend control register
37269	M88E1000_PHY_PAGE_SELECT	0x1D	e1000_hw.h	Reg 29 for page number setting
37270	M88E1000_PHY_GEN_CONTROL	0x1E	e1000_hw.h	Its meaning depends on reg 29
37271	M88E1000_PHY_VCO_REG_BIT8	0x100	e1000_hw.h	Bits 8 & 11 are adjusted for
37272	M88E1000_PHY_VCO_REG_BIT11	0x800	e1000_hw.h	improved BER performance
37273	IGP01E1000_IEEE_REGS_PAGE	0x0000	e1000_hw.h
37274	IGP01E1000_IEEE_RESTART_AUTONEG	0x3300	e1000_hw.h
37275	IGP01E1000_IEEE_FORCE_GIGA	0x0140	e1000_hw.h
37276	IGP01E1000_PHY_PORT_CONFIG	0x10	e1000_hw.h	PHY Specific Port Config Register
37277	IGP01E1000_PHY_PORT_STATUS	0x11	e1000_hw.h	PHY Specific Status Register
37278	IGP01E1000_PHY_PORT_CTRL	0x12	e1000_hw.h	PHY Specific Control Register
37279	IGP01E1000_PHY_LINK_HEALTH	0x13	e1000_hw.h	PHY Link Health Register
37280	IGP01E1000_GMII_FIFO	0x14	e1000_hw.h	GMII FIFO Register
37281	IGP01E1000_PHY_CHANNEL_QUALITY	0x15	e1000_hw.h	PHY Channel Quality Register
37282	IGP02E1000_PHY_POWER_MGMT	0x19	e1000_hw.h
37283	IGP01E1000_PHY_PAGE_SELECT	0x1F	e1000_hw.h	PHY Page Select Core Register
37284	IGP01E1000_PHY_AGC_A	0x1172	e1000_hw.h
37285	IGP01E1000_PHY_AGC_B	0x1272	e1000_hw.h
37286	IGP01E1000_PHY_AGC_C	0x1472	e1000_hw.h
37287	IGP01E1000_PHY_AGC_D	0x1872	e1000_hw.h
37288	IGP02E1000_PHY_AGC_A	0x11B1	e1000_hw.h
37289	IGP02E1000_PHY_AGC_B	0x12B1	e1000_hw.h
37290	IGP02E1000_PHY_AGC_C	0x14B1	e1000_hw.h
37291	IGP02E1000_PHY_AGC_D	0x18B1	e1000_hw.h
37292	IGP01E1000_PHY_DSP_RESET	0x1F33	e1000_hw.h
37293	IGP01E1000_PHY_DSP_SET	0x1F71	e1000_hw.h
37294	IGP01E1000_PHY_DSP_FFE	0x1F35	e1000_hw.h
37295	IGP01E1000_PHY_CHANNEL_NUM	4	e1000_hw.h
37296	IGP02E1000_PHY_CHANNEL_NUM	4	e1000_hw.h
37297	IGP01E1000_PHY_AGC_PARAM_A	0x1171	e1000_hw.h
37298	IGP01E1000_PHY_AGC_PARAM_B	0x1271	e1000_hw.h
37299	IGP01E1000_PHY_AGC_PARAM_C	0x1471	e1000_hw.h
37300	IGP01E1000_PHY_AGC_PARAM_D	0x1871	e1000_hw.h
37301	IGP01E1000_PHY_EDAC_MU_INDEX	0xC000	e1000_hw.h
37302	IGP01E1000_PHY_EDAC_SIGN_EXT_9_	0x8000	e1000_hw.h
37303	IGP01E1000_PHY_ANALOG_TX_STATE	0x2890	e1000_hw.h
37304	IGP01E1000_PHY_ANALOG_CLASS_A	0x2000	e1000_hw.h
37305	IGP01E1000_PHY_FORCE_ANALOG_ENA	0x0004	e1000_hw.h
37306	IGP01E1000_PHY_DSP_FFE_CM_CP	0x0069	e1000_hw.h
37307	IGP01E1000_PHY_DSP_FFE_DEFAULT	0x002A	e1000_hw.h
37308	IGP01E1000_PHY_PCS_INIT_REG	0x00B4	e1000_hw.h
37309	IGP01E1000_PHY_PCS_CTRL_REG	0x00B5	e1000_hw.h
37310	IGP01E1000_ANALOG_REGS_PAGE	0x20C0	e1000_hw.h
37311	GG82563_PAGE_SHIFT	5	e1000_hw.h
37312	GG82563_MIN_ALT_REG	30	e1000_hw.h
37313	GG82563_PHY_SPEC_CTRL	GG82563_REG(0, 16)	e1000_hw.h	PHY Specific Control
37314	GG82563_PHY_SPEC_STATUS	GG82563_REG(0, 17)	e1000_hw.h	PHY Specific Status
37315	GG82563_PHY_INT_ENABLE	GG82563_REG(0, 18)	e1000_hw.h	Interrupt Enable
37316	GG82563_PHY_SPEC_STATUS_2	GG82563_REG(0, 19)	e1000_hw.h	PHY Specific Status 2
37317	GG82563_PHY_RX_ERR_CNTR	GG82563_REG(0, 21)	e1000_hw.h	Receive Error Counter
37318	GG82563_PHY_PAGE_SELECT	GG82563_REG(0, 22)	e1000_hw.h	Page Select
37319	GG82563_PHY_SPEC_CTRL_2	GG82563_REG(0, 26)	e1000_hw.h	PHY Specific Control 2
37320	GG82563_PHY_PAGE_SELECT_ALT	GG82563_REG(0, 29)	e1000_hw.h	Alternate Page Select
37321	GG82563_PHY_TEST_CLK_CTRL	GG82563_REG(0, 30)	e1000_hw.h	Test Clock Control (use reg. 29 to select)
37322	GG82563_PHY_MAC_SPEC_CTRL	GG82563_REG(2, 21)	e1000_hw.h	MAC Specific Control Register
37323	GG82563_PHY_MAC_SPEC_CTRL_2	GG82563_REG(2, 26)	e1000_hw.h	MAC Specific Control 2
37324	GG82563_PHY_DSP_DISTANCE	GG82563_REG(5, 26)	e1000_hw.h	DSP Distance
37325	GG82563_PHY_KMRN_MODE_CTRL	GG82563_REG(193, 16)	e1000_hw.h	Kumeran Mode Control
37326	GG82563_PHY_PORT_RESET	GG82563_REG(193, 17)	e1000_hw.h	Port Reset
37327	GG82563_PHY_REVISION_ID	GG82563_REG(193, 18)	e1000_hw.h	Revision ID
37328	GG82563_PHY_DEVICE_ID	GG82563_REG(193, 19)	e1000_hw.h	Device ID
37329	GG82563_PHY_PWR_MGMT_CTRL	GG82563_REG(193, 20)	e1000_hw.h	Power Management Control
37330	GG82563_PHY_RATE_ADAPT_CTRL	GG82563_REG(193, 25)	e1000_hw.h	Rate Adaptation Control
37331	GG82563_PHY_KMRN_FIFO_CTRL_STAT	GG82563_REG(194, 16)	e1000_hw.h	FIFO's Control/Status
37332	GG82563_PHY_KMRN_CTRL	GG82563_REG(194, 17)	e1000_hw.h	Control
37333	GG82563_PHY_INBAND_CTRL	GG82563_REG(194, 18)	e1000_hw.h	Inband Control
37334	GG82563_PHY_KMRN_DIAGNOSTIC	GG82563_REG(194, 19)	e1000_hw.h	Diagnostic
37335	GG82563_PHY_ACK_TIMEOUTS	GG82563_REG(194, 20)	e1000_hw.h	Acknowledge Timeouts
37336	GG82563_PHY_ADV_ABILITY	GG82563_REG(194, 21)	e1000_hw.h	Advertised Ability
37337	GG82563_PHY_LINK_PARTNER_ADV_AB	GG82563_REG(194, 23)	e1000_hw.h	Link Partner Advertised Ability
37338	GG82563_PHY_ADV_NEXT_PAGE	GG82563_REG(194, 24)	e1000_hw.h	Advertised Next Page
37339	GG82563_PHY_LINK_PARTNER_ADV_NE	GG82563_REG(194, 25)	e1000_hw.h	Link Partner Advertised Next page
37340	GG82563_PHY_KMRN_MISC	GG82563_REG(194, 26)	e1000_hw.h	Misc.
37341	MII_CR_SPEED_SELECT_MSB	0x0040	e1000_hw.h	bits 6,13: 10=1000, 01=100, 00=10
37342	MII_CR_COLL_TEST_ENABLE	0x0080	e1000_hw.h	Collision test enable
37343	MII_CR_FULL_DUPLEX	0x0100	e1000_hw.h	FDX =1, half duplex =0
37344	MII_CR_RESTART_AUTO_NEG	0x0200	e1000_hw.h	Restart auto negotiation
37345	MII_CR_ISOLATE	0x0400	e1000_hw.h	Isolate PHY from MII
37346	MII_CR_POWER_DOWN	0x0800	e1000_hw.h	Power down
37347	MII_CR_AUTO_NEG_EN	0x1000	e1000_hw.h	Auto Neg Enable
37348	MII_CR_SPEED_SELECT_LSB	0x2000	e1000_hw.h	bits 6,13: 10=1000, 01=100, 00=10
37349	MII_CR_LOOPBACK	0x4000	e1000_hw.h	0 = normal, 1 = loopback
37350	MII_CR_RESET	0x8000	e1000_hw.h	0 = normal, 1 = PHY reset
37351	MII_SR_EXTENDED_CAPS	0x0001	e1000_hw.h	Extended register capabilities
37352	MII_SR_JABBER_DETECT	0x0002	e1000_hw.h	Jabber Detected
37353	MII_SR_LINK_STATUS	0x0004	e1000_hw.h	Link Status 1 = link
37354	MII_SR_AUTONEG_CAPS	0x0008	e1000_hw.h	Auto Neg Capable
37355	MII_SR_REMOTE_FAULT	0x0010	e1000_hw.h	Remote Fault Detect
37356	MII_SR_AUTONEG_COMPLETE	0x0020	e1000_hw.h	Auto Neg Complete
37357	MII_SR_PREAMBLE_SUPPRESS	0x0040	e1000_hw.h	Preamble may be suppressed
37358	MII_SR_EXTENDED_STATUS	0x0100	e1000_hw.h	Ext. status info in Reg 0x0F
37359	MII_SR_100T2_HD_CAPS	0x0200	e1000_hw.h	100T2 Half Duplex Capable
37360	MII_SR_100T2_FD_CAPS	0x0400	e1000_hw.h	100T2 Full Duplex Capable
37361	MII_SR_10T_HD_CAPS	0x0800	e1000_hw.h	10T Half Duplex Capable
37362	MII_SR_10T_FD_CAPS	0x1000	e1000_hw.h	10T Full Duplex Capable
37363	MII_SR_100X_HD_CAPS	0x2000	e1000_hw.h	100X Half Duplex Capable
37364	MII_SR_100X_FD_CAPS	0x4000	e1000_hw.h	100X Full Duplex Capable
37365	MII_SR_100T4_CAPS	0x8000	e1000_hw.h	100T4 Capable
37366	NWAY_AR_SELECTOR_FIELD	0x0001	e1000_hw.h	indicates IEEE 802.3 CSMA/CD
37367	NWAY_AR_10T_HD_CAPS	0x0020	e1000_hw.h	10T Half Duplex Capable
37368	NWAY_AR_10T_FD_CAPS	0x0040	e1000_hw.h	10T Full Duplex Capable
37369	NWAY_AR_100TX_HD_CAPS	0x0080	e1000_hw.h	100TX Half Duplex Capable
37370	NWAY_AR_100TX_FD_CAPS	0x0100	e1000_hw.h	100TX Full Duplex Capable
37371	NWAY_AR_100T4_CAPS	0x0200	e1000_hw.h	100T4 Capable
37372	NWAY_AR_PAUSE	0x0400	e1000_hw.h	Pause operation desired
37373	NWAY_AR_ASM_DIR	0x0800	e1000_hw.h	Asymmetric Pause Direction bit
37374	NWAY_AR_REMOTE_FAULT	0x2000	e1000_hw.h	Remote Fault detected
37375	NWAY_AR_NEXT_PAGE	0x8000	e1000_hw.h	Next Page ability supported
37376	NWAY_LPAR_SELECTOR_FIELD	0x0000	e1000_hw.h	LP protocol selector field
37377	NWAY_LPAR_10T_HD_CAPS	0x0020	e1000_hw.h	LP is 10T Half Duplex Capable
37378	NWAY_LPAR_10T_FD_CAPS	0x0040	e1000_hw.h	LP is 10T Full Duplex Capable
37379	NWAY_LPAR_100TX_HD_CAPS	0x0080	e1000_hw.h	LP is 100TX Half Duplex Capable
37380	NWAY_LPAR_100TX_FD_CAPS	0x0100	e1000_hw.h	LP is 100TX Full Duplex Capable
37381	NWAY_LPAR_100T4_CAPS	0x0200	e1000_hw.h	LP is 100T4 Capable
37382	NWAY_LPAR_PAUSE	0x0400	e1000_hw.h	LP Pause operation desired
37383	NWAY_LPAR_ASM_DIR	0x0800	e1000_hw.h	LP Asymmetric Pause Direction bit
37384	NWAY_LPAR_REMOTE_FAULT	0x2000	e1000_hw.h	LP has detected Remote Fault
37385	NWAY_LPAR_ACKNOWLEDGE	0x4000	e1000_hw.h	LP has rx'd link code word
37386	NWAY_LPAR_NEXT_PAGE	0x8000	e1000_hw.h	Next Page ability supported
37387	NWAY_ER_LP_NWAY_CAPS	0x0001	e1000_hw.h	LP has Auto Neg Capability
37388	NWAY_ER_PAGE_RXD	0x0002	e1000_hw.h	LP is 10T Half Duplex Capable
37389	NWAY_ER_NEXT_PAGE_CAPS	0x0004	e1000_hw.h	LP is 10T Full Duplex Capable
37390	NWAY_ER_LP_NEXT_PAGE_CAPS	0x0008	e1000_hw.h	LP is 100TX Half Duplex Capable
37391	NWAY_ER_PAR_DETECT_FAULT	0x0010	e1000_hw.h	LP is 100TX Full Duplex Capable
37392	NPTX_MSG_CODE_FIELD	0x0001	e1000_hw.h	NP msg code or unformatted data
37393	NPTX_TOGGLE	0x0800	e1000_hw.h	Toggles between exchanges
37394	NPTX_ACKNOWLDGE2	0x1000	e1000_hw.h	1 = will comply with msg
37395	NPTX_MSG_PAGE	0x2000	e1000_hw.h	formatted(1)/unformatted(0) pg
37396	NPTX_NEXT_PAGE	0x8000	e1000_hw.h	1 = addition NP will follow
37397	LP_RNPR_MSG_CODE_FIELD	0x0001	e1000_hw.h	NP msg code or unformatted data
37398	LP_RNPR_TOGGLE	0x0800	e1000_hw.h	Toggles between exchanges
37399	LP_RNPR_ACKNOWLDGE2	0x1000	e1000_hw.h	1 = will comply with msg
37400	LP_RNPR_MSG_PAGE	0x2000	e1000_hw.h	formatted(1)/unformatted(0) pg
37401	LP_RNPR_ACKNOWLDGE	0x4000	e1000_hw.h	1 = ACK / 0 = NO ACK
37402	LP_RNPR_NEXT_PAGE	0x8000	e1000_hw.h	1 = addition NP will follow
37403	CR_1000T_ASYM_PAUSE	0x0080	e1000_hw.h	Advertise asymmetric pause bit
37404	CR_1000T_HD_CAPS	0x0100	e1000_hw.h	Advertise 1000T HD capability
37405	CR_1000T_FD_CAPS	0x0200	e1000_hw.h	Advertise 1000T FD capability
37406	CR_1000T_REPEATER_DTE	0x0400	e1000_hw.h	1=Repeater/switch device port
37407	CR_1000T_MS_VALUE	0x0800	e1000_hw.h	1=Configure PHY as Master
37408	CR_1000T_MS_ENABLE	0x1000	e1000_hw.h	1=Master/Slave manual config value
37409	CR_1000T_TEST_MODE_NORMAL	0x0000	e1000_hw.h	Normal Operation
37410	CR_1000T_TEST_MODE_1	0x2000	e1000_hw.h	Transmit Waveform test
37411	CR_1000T_TEST_MODE_2	0x4000	e1000_hw.h	Master Transmit Jitter test
37412	CR_1000T_TEST_MODE_3	0x6000	e1000_hw.h	Slave Transmit Jitter test
37413	CR_1000T_TEST_MODE_4	0x8000	e1000_hw.h	Transmitter Distortion test
37414	SR_1000T_IDLE_ERROR_CNT	0x00FF	e1000_hw.h	Num idle errors since last read
37415	SR_1000T_ASYM_PAUSE_DIR	0x0100	e1000_hw.h	LP asymmetric pause direction bit
37416	SR_1000T_LP_HD_CAPS	0x0400	e1000_hw.h	LP is 1000T HD capable
37417	SR_1000T_LP_FD_CAPS	0x0800	e1000_hw.h	LP is 1000T FD capable
37418	SR_1000T_REMOTE_RX_STATUS	0x1000	e1000_hw.h	Remote receiver OK
37419	SR_1000T_LOCAL_RX_STATUS	0x2000	e1000_hw.h	Local receiver OK
37420	SR_1000T_MS_CONFIG_RES	0x4000	e1000_hw.h	1=Local TX is Master, 0=Slave
37421	SR_1000T_MS_CONFIG_FAULT	0x8000	e1000_hw.h	Master/Slave config fault
37422	SR_1000T_REMOTE_RX_STATUS_SHIFT	12	e1000_hw.h
37423	SR_1000T_LOCAL_RX_STATUS_SHIFT	13	e1000_hw.h
37424	SR_1000T_PHY_EXCESSIVE_IDLE_ERR	5	e1000_hw.h
37425	FFE_IDLE_ERR_COUNT_TIMEOUT_20	20	e1000_hw.h
37426	FFE_IDLE_ERR_COUNT_TIMEOUT_100	100	e1000_hw.h
37427	IEEE_ESR_1000T_HD_CAPS	0x1000	e1000_hw.h	1000T HD capable
37428	IEEE_ESR_1000T_FD_CAPS	0x2000	e1000_hw.h	1000T FD capable
37429	IEEE_ESR_1000X_HD_CAPS	0x4000	e1000_hw.h	1000X HD capable
37430	IEEE_ESR_1000X_FD_CAPS	0x8000	e1000_hw.h	1000X FD capable
37431	PHY_TX_POLARITY_MASK	0x0100	e1000_hw.h	register 10h bit 8 (polarity bit)
37432	PHY_TX_NORMAL_POLARITY	0	e1000_hw.h	register 10h bit 8 (normal polarity)
37433	AUTO_POLARITY_DISABLE	0x0010	e1000_hw.h	register 11h bit 4
37434	M88E1000_PSCR_JABBER_DISABLE	0x0001	e1000_hw.h	1=Jabber Function disabled
37435	M88E1000_PSCR_POLARITY_REVERSAL	0x0002	e1000_hw.h	1=Polarity Reversal enabled
37436	M88E1000_PSCR_SQE_TEST	0x0004	e1000_hw.h	1=SQE Test enabled
37437	M88E1000_PSCR_CLK125_DISABLE	0x0010	e1000_hw.h	1=CLK125 low,
37438	M88E1000_PSCR_MDI_MANUAL_MODE	0x0000	e1000_hw.h	MDI Crossover Mode bits 6:5
37439	M88E1000_PSCR_MDIX_MANUAL_MODE	0x0020	e1000_hw.h	Manual MDIX configuration
37440	M88E1000_PSCR_AUTO_X_1000T	0x0040	e1000_hw.h	1000BASE-T: Auto crossover,
37441	M88E1000_PSCR_AUTO_X_MODE	0x0060	e1000_hw.h	Auto crossover enabled
37442	M88E1000_PSCR_10BT_EXT_DIST_ENA	0x0080	e1000_hw.h
37443	M88E1000_PSCR_MII_5BIT_ENABLE	0x0100	e1000_hw.h
37444	M88E1000_PSCR_SCRAMBLER_DISABLE	0x0200	e1000_hw.h	1=Scrambler disable
37445	M88E1000_PSCR_FORCE_LINK_GOOD	0x0400	e1000_hw.h	1=Force link good
37446	M88E1000_PSCR_ASSERT_CRS_ON_TX	0x0800	e1000_hw.h	1=Assert CRS on Transmit
37447	M88E1000_PSCR_POLARITY_REVERSAL	1	e1000_hw.h
37448	M88E1000_PSCR_AUTO_X_MODE_SHIFT	5	e1000_hw.h
37449	M88E1000_PSCR_10BT_EXT_DIST_ENA	7	e1000_hw.h
37450	M88E1000_PSSR_JABBER	0x0001	e1000_hw.h	1=Jabber
37451	M88E1000_PSSR_REV_POLARITY	0x0002	e1000_hw.h	1=Polarity reversed
37452	M88E1000_PSSR_DOWNSHIFT	0x0020	e1000_hw.h	1=Downshifted
37453	M88E1000_PSSR_MDIX	0x0040	e1000_hw.h	1=MDIX; 0=MDI
37454	M88E1000_PSSR_CABLE_LENGTH	0x0380	e1000_hw.h	0=<50M;1=50-80M;2=80-110M;
37455	M88E1000_PSSR_LINK	0x0400	e1000_hw.h	1=Link up, 0=Link down
37456	M88E1000_PSSR_SPD_DPLX_RESOLVED	0x0800	e1000_hw.h	1=Speed & Duplex resolved
37457	M88E1000_PSSR_PAGE_RCVD	0x1000	e1000_hw.h	1=Page received
37458	M88E1000_PSSR_DPLX	0x2000	e1000_hw.h	1=Duplex 0=Half Duplex
37459	M88E1000_PSSR_SPEED	0xC000	e1000_hw.h	Speed, bits 14:15
37460	M88E1000_PSSR_10MBS	0x0000	e1000_hw.h	00=10Mbs
37461	M88E1000_PSSR_100MBS	0x4000	e1000_hw.h	01=100Mbs
37462	M88E1000_PSSR_1000MBS	0x8000	e1000_hw.h	10=1000Mbs
37463	M88E1000_PSSR_REV_POLARITY_SHIF	1	e1000_hw.h
37464	M88E1000_PSSR_DOWNSHIFT_SHIFT	5	e1000_hw.h
37465	M88E1000_PSSR_MDIX_SHIFT	6	e1000_hw.h
37466	M88E1000_PSSR_CABLE_LENGTH_SHIF	7	e1000_hw.h
37467	M88E1000_EPSCR_FIBER_LOOPBACK	0x4000	e1000_hw.h	1=Fiber loopback
37468	M88E1000_EPSCR_DOWN_NO_IDLE	0x8000	e1000_hw.h	1=Lost lock detect enabled.
37469	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0C00	e1000_hw.h
37470	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0000	e1000_hw.h
37471	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0400	e1000_hw.h
37472	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0800	e1000_hw.h
37473	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0C00	e1000_hw.h
37474	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0300	e1000_hw.h
37475	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0000	e1000_hw.h
37476	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0100	e1000_hw.h
37477	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0200	e1000_hw.h
37478	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0300	e1000_hw.h
37479	M88E1000_EPSCR_TX_CLK_2_5	0x0060	e1000_hw.h	2.5 MHz TX_CLK
37480	M88E1000_EPSCR_TX_CLK_25	0x0070	e1000_hw.h	25 MHz TX_CLK
37481	M88E1000_EPSCR_TX_CLK_0	0x0000	e1000_hw.h	NO TX_CLK
37482	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0E00	e1000_hw.h
37483	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0000	e1000_hw.h
37484	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0200	e1000_hw.h
37485	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0400	e1000_hw.h
37486	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0600	e1000_hw.h
37487	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0800	e1000_hw.h
37488	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0A00	e1000_hw.h
37489	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0C00	e1000_hw.h
37490	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0E00	e1000_hw.h
37491	IGP01E1000_PSCFR_AUTO_MDIX_PAR_	0x0010	e1000_hw.h
37492	IGP01E1000_PSCFR_PRE_EN	0x0020	e1000_hw.h
37493	IGP01E1000_PSCFR_SMART_SPEED	0x0080	e1000_hw.h
37494	IGP01E1000_PSCFR_DISABLE_TPLOOP	0x0100	e1000_hw.h
37495	IGP01E1000_PSCFR_DISABLE_JABBER	0x0400	e1000_hw.h
37496	IGP01E1000_PSCFR_DISABLE_TRANSM	0x2000	e1000_hw.h
37497	IGP01E1000_PSSR_AUTONEG_FAILED	0x0001	e1000_hw.h	RO LH SC
37498	IGP01E1000_PSSR_POLARITY_REVERS	0x0002	e1000_hw.h
37499	IGP01E1000_PSSR_CABLE_LENGTH	0x007C	e1000_hw.h
37500	IGP01E1000_PSSR_FULL_DUPLEX	0x0200	e1000_hw.h
37501	IGP01E1000_PSSR_LINK_UP	0x0400	e1000_hw.h
37502	IGP01E1000_PSSR_MDIX	0x0800	e1000_hw.h
37503	IGP01E1000_PSSR_SPEED_MASK	0xC000	e1000_hw.h	speed bits mask
37504	IGP01E1000_PSSR_SPEED_10MBPS	0x4000	e1000_hw.h
37505	IGP01E1000_PSSR_SPEED_100MBPS	0x8000	e1000_hw.h
37506	IGP01E1000_PSSR_SPEED_1000MBPS	0xC000	e1000_hw.h
37507	IGP01E1000_PSSR_CABLE_LENGTH_SH	0x0002	e1000_hw.h	shift right 2
37508	IGP01E1000_PSSR_MDIX_SHIFT	0x000B	e1000_hw.h	shift right 11
37509	IGP01E1000_PSCR_TP_LOOPBACK	0x0010	e1000_hw.h
37510	IGP01E1000_PSCR_CORRECT_NC_SCMB	0x0200	e1000_hw.h
37511	IGP01E1000_PSCR_TEN_CRS_SELECT	0x0400	e1000_hw.h
37512	IGP01E1000_PSCR_FLIP_CHIP	0x0800	e1000_hw.h
37513	IGP01E1000_PSCR_AUTO_MDIX	0x1000	e1000_hw.h
37514	IGP01E1000_PSCR_FORCE_MDI_MDIX	0x2000	e1000_hw.h	0-MDI, 1-MDIX
37515	IGP01E1000_PLHR_SS_DOWNGRADE	0x8000	e1000_hw.h
37516	IGP01E1000_PLHR_GIG_SCRAMBLER_E	0x4000	e1000_hw.h
37517	IGP01E1000_PLHR_MASTER_FAULT	0x2000	e1000_hw.h
37518	IGP01E1000_PLHR_MASTER_RESOLUTI	0x1000	e1000_hw.h
37519	IGP01E1000_PLHR_GIG_REM_RCVR_NO	0x0800	e1000_hw.h	LH
37520	IGP01E1000_PLHR_IDLE_ERROR_CNT_	0x0400	e1000_hw.h	LH
37521	IGP01E1000_PLHR_DATA_ERR_1	0x0200	e1000_hw.h	LH
37522	IGP01E1000_PLHR_DATA_ERR_0	0x0100	e1000_hw.h
37523	IGP01E1000_PLHR_AUTONEG_FAULT	0x0040	e1000_hw.h
37524	IGP01E1000_PLHR_AUTONEG_ACTIVE	0x0010	e1000_hw.h
37525	IGP01E1000_PLHR_VALID_CHANNEL_D	0x0008	e1000_hw.h
37526	IGP01E1000_PLHR_VALID_CHANNEL_C	0x0004	e1000_hw.h
37527	IGP01E1000_PLHR_VALID_CHANNEL_B	0x0002	e1000_hw.h
37528	IGP01E1000_PLHR_VALID_CHANNEL_A	0x0001	e1000_hw.h
37529	IGP01E1000_MSE_CHANNEL_D	0x000F	e1000_hw.h
37530	IGP01E1000_MSE_CHANNEL_C	0x00F0	e1000_hw.h
37531	IGP01E1000_MSE_CHANNEL_B	0x0F00	e1000_hw.h
37532	IGP01E1000_MSE_CHANNEL_A	0xF000	e1000_hw.h
37533	IGP02E1000_PM_SPD	0x0001	e1000_hw.h	Smart Power Down
37534	IGP02E1000_PM_D3_LPLU	0x0004	e1000_hw.h	Enable LPLU in non-D0a modes
37535	IGP02E1000_PM_D0_LPLU	0x0002	e1000_hw.h	Enable LPLU in D0a mode
37536	DSP_RESET_ENABLE	0x0	e1000_hw.h
37537	DSP_RESET_DISABLE	0x2	e1000_hw.h
37538	E1000_MAX_DSP_RESETS	10	e1000_hw.h
37539	IGP01E1000_AGC_LENGTH_SHIFT	7	e1000_hw.h	Coarse - 13:11, Fine - 10:7
37540	IGP02E1000_AGC_LENGTH_SHIFT	9	e1000_hw.h	Coarse - 15:13, Fine - 12:9
37541	IGP02E1000_AGC_LENGTH_MASK	0x7F	e1000_hw.h
37542	IGP01E1000_AGC_LENGTH_TABLE_SIZ	128	e1000_hw.h
37543	IGP02E1000_AGC_LENGTH_TABLE_SIZ	113	e1000_hw.h
37544	IGP01E1000_AGC_RANGE	10	e1000_hw.h
37545	IGP02E1000_AGC_RANGE	15	e1000_hw.h
37546	IGP01E1000_PHY_POLARITY_MASK	0x0078	e1000_hw.h
37547	IGP01E1000_GMII_FLEX_SPD	0x10	e1000_hw.h	Enable flexible speed
37548	IGP01E1000_GMII_SPD	0x20	e1000_hw.h	Enable SPD
37549	IGP01E1000_ANALOG_SPARE_FUSE_ST	0x20D1	e1000_hw.h
37550	IGP01E1000_ANALOG_FUSE_STATUS	0x20D0	e1000_hw.h
37551	IGP01E1000_ANALOG_FUSE_CONTROL	0x20DC	e1000_hw.h
37552	IGP01E1000_ANALOG_FUSE_BYPASS	0x20DE	e1000_hw.h
37553	IGP01E1000_ANALOG_FUSE_POLY_MAS	0xF000	e1000_hw.h
37554	IGP01E1000_ANALOG_FUSE_FINE_MAS	0x0F80	e1000_hw.h
37555	IGP01E1000_ANALOG_FUSE_COARSE_M	0x0070	e1000_hw.h
37556	IGP01E1000_ANALOG_SPARE_FUSE_EN	0x0100	e1000_hw.h
37557	IGP01E1000_ANALOG_FUSE_ENABLE_S	0x0002	e1000_hw.h
37558	IGP01E1000_ANALOG_FUSE_COARSE_T	0x0040	e1000_hw.h
37559	IGP01E1000_ANALOG_FUSE_COARSE_1	0x0010	e1000_hw.h
37560	IGP01E1000_ANALOG_FUSE_FINE_1	0x0080	e1000_hw.h
37561	IGP01E1000_ANALOG_FUSE_FINE_10	0x0500	e1000_hw.h
37562	GG82563_PSCR_DISABLE_JABBER	0x0001	e1000_hw.h	1=Disable Jabber
37563	GG82563_PSCR_POLARITY_REVERSAL_	0x0002	e1000_hw.h	1=Polarity Reversal Disabled
37564	GG82563_PSCR_POWER_DOWN	0x0004	e1000_hw.h	1=Power Down
37565	GG82563_PSCR_COPPER_TRANSMITER_	0x0008	e1000_hw.h	1=Transmitter Disabled
37566	GG82563_PSCR_CROSSOVER_MODE_MAS	0x0060	e1000_hw.h
37567	GG82563_PSCR_CROSSOVER_MODE_MDI	0x0000	e1000_hw.h	00=Manual MDI configuration
37568	GG82563_PSCR_CROSSOVER_MODE_MDI	0x0020	e1000_hw.h	01=Manual MDIX configuration
37569	GG82563_PSCR_CROSSOVER_MODE_AUT	0x0060	e1000_hw.h	11=Automatic crossover
37570	GG82563_PSCR_ENALBE_EXTENDED_DI	0x0080	e1000_hw.h	1=Enable Extended Distance
37571	GG82563_PSCR_ENERGY_DETECT_MASK	0x0300	e1000_hw.h
37572	GG82563_PSCR_ENERGY_DETECT_OFF	0x0000	e1000_hw.h	00,01=Off
37573	GG82563_PSCR_ENERGY_DETECT_RX	0x0200	e1000_hw.h	10=Sense on Rx only (Energy Detect)
37574	GG82563_PSCR_ENERGY_DETECT_RX_T	0x0300	e1000_hw.h	11=Sense and Tx NLP
37575	GG82563_PSCR_FORCE_LINK_GOOD	0x0400	e1000_hw.h	1=Force Link Good
37576	GG82563_PSCR_DOWNSHIFT_ENABLE	0x0800	e1000_hw.h	1=Enable Downshift
37577	GG82563_PSCR_DOWNSHIFT_COUNTER_	0x7000	e1000_hw.h
37578	GG82563_PSCR_DOWNSHIFT_COUNTER_	12	e1000_hw.h
37579	GG82563_PSSR_JABBER	0x0001	e1000_hw.h	1=Jabber
37580	GG82563_PSSR_POLARITY	0x0002	e1000_hw.h	1=Polarity Reversed
37581	GG82563_PSSR_LINK	0x0008	e1000_hw.h	1=Link is Up
37582	GG82563_PSSR_ENERGY_DETECT	0x0010	e1000_hw.h	1=Sleep, 0=Active
37583	GG82563_PSSR_DOWNSHIFT	0x0020	e1000_hw.h	1=Downshift
37584	GG82563_PSSR_CROSSOVER_STATUS	0x0040	e1000_hw.h	1=MDIX, 0=MDI
37585	GG82563_PSSR_RX_PAUSE_ENABLED	0x0100	e1000_hw.h	1=Receive Pause Enabled
37586	GG82563_PSSR_TX_PAUSE_ENABLED	0x0200	e1000_hw.h	1=Transmit Pause Enabled
37587	GG82563_PSSR_LINK_UP	0x0400	e1000_hw.h	1=Link Up
37588	GG82563_PSSR_SPEED_DUPLEX_RESOL	0x0800	e1000_hw.h	1=Resolved
37589	GG82563_PSSR_PAGE_RECEIVED	0x1000	e1000_hw.h	1=Page Received
37590	GG82563_PSSR_DUPLEX	0x2000	e1000_hw.h	1-Full-Duplex
37591	GG82563_PSSR_SPEED_MASK	0xC000	e1000_hw.h
37592	GG82563_PSSR_SPEED_10MBPS	0x0000	e1000_hw.h	00=10Mbps
37593	GG82563_PSSR_SPEED_100MBPS	0x4000	e1000_hw.h	01=100Mbps
37594	GG82563_PSSR_SPEED_1000MBPS	0x8000	e1000_hw.h	10=1000Mbps
37595	GG82563_PSSR2_JABBER	0x0001	e1000_hw.h	1=Jabber
37596	GG82563_PSSR2_POLARITY_CHANGED	0x0002	e1000_hw.h	1=Polarity Changed
37597	GG82563_PSSR2_ENERGY_DETECT_CHA	0x0010	e1000_hw.h	1=Energy Detect Changed
37598	GG82563_PSSR2_DOWNSHIFT_INTERRU	0x0020	e1000_hw.h	1=Downshift Detected
37599	GG82563_PSSR2_MDI_CROSSOVER_CHA	0x0040	e1000_hw.h	1=Crossover Changed
37600	GG82563_PSSR2_FALSE_CARRIER	0x0100	e1000_hw.h	1=False Carrier
37601	GG82563_PSSR2_SYMBOL_ERROR	0x0200	e1000_hw.h	1=Symbol Error
37602	GG82563_PSSR2_LINK_STATUS_CHANG	0x0400	e1000_hw.h	1=Link Status Changed
37603	GG82563_PSSR2_AUTO_NEG_COMPLETE	0x0800	e1000_hw.h	1=Auto-Neg Completed
37604	GG82563_PSSR2_PAGE_RECEIVED	0x1000	e1000_hw.h	1=Page Received
37605	GG82563_PSSR2_DUPLEX_CHANGED	0x2000	e1000_hw.h	1=Duplex Changed
37606	GG82563_PSSR2_SPEED_CHANGED	0x4000	e1000_hw.h	1=Speed Changed
37607	GG82563_PSSR2_AUTO_NEG_ERROR	0x8000	e1000_hw.h	1=Auto-Neg Error
37608	GG82563_PSCR2_10BT_POLARITY_FOR	0x0002	e1000_hw.h	1=Force Negative Polarity
37609	GG82563_PSCR2_1000MB_TEST_SELEC	0x000C	e1000_hw.h
37610	GG82563_PSCR2_1000MB_TEST_SELEC	0x0000	e1000_hw.h	00,01=Normal Operation
37611	GG82563_PSCR2_1000MB_TEST_SELEC	0x0008	e1000_hw.h	10=Select 112ns Sequence
37612	GG82563_PSCR2_1000MB_TEST_SELEC	0x000C	e1000_hw.h	11=Select 16ns Sequence
37613	GG82563_PSCR2_REVERSE_AUTO_NEG	0x2000	e1000_hw.h	1=Reverse Auto-Negotiation
37614	GG82563_PSCR2_1000BT_DISABLE	0x4000	e1000_hw.h	1=Disable 1000BASE-T
37615	GG82563_PSCR2_TRANSMITER_TYPE_M	0x8000	e1000_hw.h
37616	GG82563_PSCR2_TRANSMITTER_TYPE_	0x0000	e1000_hw.h	0=Class B
37617	GG82563_PSCR2_TRANSMITTER_TYPE_	0x8000	e1000_hw.h	1=Class A
37618	GG82563_MSCR_TX_CLK_MASK	0x0007	e1000_hw.h
37619	GG82563_MSCR_TX_CLK_10MBPS_2_5M	0x0004	e1000_hw.h
37620	GG82563_MSCR_TX_CLK_100MBPS_25M	0x0005	e1000_hw.h
37621	GG82563_MSCR_TX_CLK_1000MBPS_2_	0x0006	e1000_hw.h
37622	GG82563_MSCR_TX_CLK_1000MBPS_25	0x0007	e1000_hw.h
37623	GG82563_MSCR_ASSERT_CRS_ON_TX	0x0010	e1000_hw.h	1=Assert
37624	GG82563_DSPD_CABLE_LENGTH	0x0007	e1000_hw.h	0 = <50M;
37625	GG82563_KMCR_PHY_LEDS_EN	0x0020	e1000_hw.h	1=PHY LEDs, 0=Kumeran Inband LEDs
37626	GG82563_KMCR_FORCE_LINK_UP	0x0040	e1000_hw.h	1=Force Link Up
37627	GG82563_KMCR_SUPPRESS_SGMII_EPD	0x0080	e1000_hw.h
37628	GG82563_KMCR_MDIO_BUS_SPEED_SEL	0x0400	e1000_hw.h
37629	GG82563_KMCR_MDIO_BUS_SPEED_SEL	0x0400	e1000_hw.h	1=6.25MHz, 0=0.8MHz
37630	GG82563_KMCR_PASS_FALSE_CARRIER	0x0800	e1000_hw.h
37631	GG82563_PMCR_ENABLE_ELECTRICAL_	0x0001	e1000_hw.h	1=Enalbe SERDES Electrical Idle
37632	GG82563_PMCR_DISABLE_PORT	0x0002	e1000_hw.h	1=Disable Port
37633	GG82563_PMCR_DISABLE_SERDES	0x0004	e1000_hw.h	1=Disable SERDES
37634	GG82563_PMCR_REVERSE_AUTO_NEG	0x0008	e1000_hw.h	1=Enable Reverse Auto-Negotiation
37635	GG82563_PMCR_DISABLE_1000_NON_D	0x0010	e1000_hw.h	1=Disable 1000Mbps Auto-Neg in non D0
37636	GG82563_PMCR_DISABLE_1000	0x0020	e1000_hw.h	1=Disable 1000Mbps Auto-Neg Always
37637	GG82563_PMCR_REVERSE_AUTO_NEG_D	0x0040	e1000_hw.h	1=Enable D0a Reverse Auto-Negotiation
37638	GG82563_PMCR_FORCE_POWER_STATE	0x0080	e1000_hw.h	1=Force Power State
37639	GG82563_PMCR_PROGRAMMED_POWER_S	0x0300	e1000_hw.h
37640	GG82563_PMCR_PROGRAMMED_POWER_S	0x0000	e1000_hw.h	00=Dr
37641	GG82563_PMCR_PROGRAMMED_POWER_S	0x0100	e1000_hw.h	01=D0u
37642	GG82563_PMCR_PROGRAMMED_POWER_S	0x0200	e1000_hw.h	10=D0a
37643	GG82563_PMCR_PROGRAMMED_POWER_S	0x0300	e1000_hw.h	11=D3
37644	GG82563_ICR_DIS_PADDING	0x0010	e1000_hw.h	Disable Padding Use
37645	M88_VENDOR	0x0141	e1000_hw.h
37646	M88E1000_E_PHY_ID	0x01410C50	e1000_hw.h
37647	M88E1000_I_PHY_ID	0x01410C30	e1000_hw.h
37648	M88E1011_I_PHY_ID	0x01410C20	e1000_hw.h
37649	IGP01E1000_I_PHY_ID	0x02A80380	e1000_hw.h
37650	M88E1000_12_PHY_ID	M88E1000_E_PHY_ID	e1000_hw.h
37651	M88E1000_14_PHY_ID	M88E1000_E_PHY_ID	e1000_hw.h
37652	M88E1011_I_REV_4	0x04	e1000_hw.h
37653	M88E1111_I_PHY_ID	0x01410CC0	e1000_hw.h
37654	L1LXT971A_PHY_ID	0x001378E0	e1000_hw.h
37655	GG82563_E_PHY_ID	0x01410CA0	e1000_hw.h
37656	PHY_PAGE_SHIFT	5	e1000_hw.h
37657	IGP3_PHY_PORT_CTRL	PHY_REG(769, 17)	e1000_hw.h	Port General Configuration
37658	IGP3_PHY_RATE_ADAPT_CTRL	PHY_REG(769, 25)	e1000_hw.h	Rate Adapter Control Register
37659	IGP3_KMRN_FIFO_CTRL_STATS	PHY_REG(770, 16)	e1000_hw.h	KMRN FIFO's control/status register
37660	IGP3_KMRN_POWER_MNG_CTRL	PHY_REG(770, 17)	e1000_hw.h	KMRN Power Management Control Register
37661	IGP3_KMRN_INBAND_CTRL	PHY_REG(770, 18)	e1000_hw.h	KMRN Inband Control Register
37662	IGP3_KMRN_DIAG	PHY_REG(770, 19)	e1000_hw.h	KMRN Diagnostic register
37663	IGP3_KMRN_DIAG_PCS_LOCK_LOSS	0x0002	e1000_hw.h	RX PCS is not synced
37664	IGP3_KMRN_ACK_TIMEOUT	PHY_REG(770, 20)	e1000_hw.h	KMRN Acknowledge Timeouts register
37665	IGP3_VR_CTRL	PHY_REG(776, 18)	e1000_hw.h	Voltage regulator control register
37666	IGP3_VR_CTRL_MODE_SHUT	0x0200	e1000_hw.h	Enter powerdown, shutdown VRs
37667	IGP3_VR_CTRL_MODE_MASK	0x0300	e1000_hw.h	Shutdown VR Mask
37668	IGP3_CAPABILITY	PHY_REG(776, 19)	e1000_hw.h	IGP3 Capability Register
37669	IGP3_CAP_INITIATE_TEAM	0x0001	e1000_hw.h	Able to initiate a team
37670	IGP3_CAP_WFM	0x0002	e1000_hw.h	Support WoL and PXE
37671	IGP3_CAP_ASF	0x0004	e1000_hw.h	Support ASF
37672	IGP3_CAP_LPLU	0x0008	e1000_hw.h	Support Low Power Link Up
37673	IGP3_CAP_DC_AUTO_SPEED	0x0010	e1000_hw.h	Support AC/DC Auto Link Speed
37674	IGP3_CAP_SPD	0x0020	e1000_hw.h	Support Smart Power Down
37675	IGP3_CAP_MULT_QUEUE	0x0040	e1000_hw.h	Support 2 tx & 2 rx queues
37676	IGP3_CAP_RSS	0x0080	e1000_hw.h	Support RSS
37677	IGP3_CAP_8021PQ	0x0100	e1000_hw.h	Support 802.1Q & 802.1p
37678	IGP3_CAP_AMT_CB	0x0200	e1000_hw.h	Support active manageability and circuit breaker
37679	IGP3_PPC_JORDAN_EN	0x0001	e1000_hw.h
37680	IGP3_PPC_JORDAN_GIGA_SPEED	0x0002	e1000_hw.h
37681	IGP3_KMRN_PMC_EE_IDLE_LINK_DIS	0x0001	e1000_hw.h
37682	IGP3_KMRN_PMC_K0S_ENTRY_LATENCY	0x001E	e1000_hw.h
37683	IGP3_KMRN_PMC_K0S_MODE1_EN_GIGA	0x0020	e1000_hw.h
37684	IGP3_KMRN_PMC_K0S_MODE1_EN_100	0x0040	e1000_hw.h
37685	IGP3E1000_PHY_MISC_CTRL	0x1B	e1000_hw.h	Misc. Ctrl register
37686	IGP3_PHY_MISC_DUPLEX_MANUAL_SET	0x1000	e1000_hw.h	Duplex Manual Set
37687	IGP3_KMRN_EXT_CTRL	PHY_REG(770, 18)	e1000_hw.h
37688	IGP3_KMRN_EC_DIS_INBAND	0x0080	e1000_hw.h
37689	IGP03E1000_E_PHY_ID	0x02A80390	e1000_hw.h
37690	IFE_E_PHY_ID	0x02A80330	e1000_hw.h	10/100 PHY
37691	IFE_PLUS_E_PHY_ID	0x02A80320	e1000_hw.h
37692	IFE_C_E_PHY_ID	0x02A80310	e1000_hw.h
37693	IFE_PHY_EXTENDED_STATUS_CONTROL	0x10	e1000_hw.h	100BaseTx Extended Status, Control and Address
37694	IFE_PHY_SPECIAL_CONTROL	0x11	e1000_hw.h	100BaseTx PHY special control register
37695	IFE_PHY_RCV_FALSE_CARRIER	0x13	e1000_hw.h	100BaseTx Receive False Carrier Counter
37696	IFE_PHY_RCV_DISCONNECT	0x14	e1000_hw.h	100BaseTx Receive Disconnet Counter
37697	IFE_PHY_RCV_ERROT_FRAME	0x15	e1000_hw.h	100BaseTx Receive Error Frame Counter
37698	IFE_PHY_RCV_SYMBOL_ERR	0x16	e1000_hw.h	Receive Symbol Error Counter
37699	IFE_PHY_PREM_EOF_ERR	0x17	e1000_hw.h	100BaseTx Receive Premature End Of Frame Error Counter
37700	IFE_PHY_RCV_EOF_ERR	0x18	e1000_hw.h	10BaseT Receive End Of Frame Error Counter
37701	IFE_PHY_TX_JABBER_DETECT	0x19	e1000_hw.h	10BaseT Transmit Jabber Detect Counter
37702	IFE_PHY_EQUALIZER	0x1A	e1000_hw.h	PHY Equalizer Control and Status
37703	IFE_PHY_SPECIAL_CONTROL_LED	0x1B	e1000_hw.h	PHY special control and LED configuration
37704	IFE_PHY_MDIX_CONTROL	0x1C	e1000_hw.h	MDI/MDI-X Control register
37705	IFE_PHY_HWI_CONTROL	0x1D	e1000_hw.h	Hardware Integrity Control (HWI)
37706	IFE_PESC_REDUCED_POWER_DOWN_DIS	0x2000	e1000_hw.h	Defaut 1 = Disable auto reduced power down
37707	IFE_PESC_100BTX_POWER_DOWN	0x0400	e1000_hw.h	Indicates the power state of 100BASE-TX
37708	IFE_PESC_10BTX_POWER_DOWN	0x0200	e1000_hw.h	Indicates the power state of 10BASE-T
37709	IFE_PESC_POLARITY_REVERSED	0x0100	e1000_hw.h	Indicates 10BASE-T polarity
37710	IFE_PESC_PHY_ADDR_MASK	0x007C	e1000_hw.h	Bit 6:2 for sampled PHY address
37711	IFE_PESC_SPEED	0x0002	e1000_hw.h	Auto-negotiation speed result 1=100Mbs, 0=10Mbs
37712	IFE_PESC_DUPLEX	0x0001	e1000_hw.h	Auto-negotiation duplex result 1=Full, 0=Half
37713	IFE_PESC_POLARITY_REVERSED_SHIF	8	e1000_hw.h
37714	IFE_PSC_DISABLE_DYNAMIC_POWER_D	0x0100	e1000_hw.h	1 = Dyanmic Power Down disabled
37715	IFE_PSC_FORCE_POLARITY	0x0020	e1000_hw.h	1=Reversed Polarity, 0=Normal
37716	IFE_PSC_AUTO_POLARITY_DISABLE	0x0010	e1000_hw.h	1=Auto Polarity Disabled, 0=Enabled
37717	IFE_PSC_JABBER_FUNC_DISABLE	0x0001	e1000_hw.h	1=Jabber Disabled, 0=Normal Jabber Operation
37718	IFE_PSC_FORCE_POLARITY_SHIFT	5	e1000_hw.h
37719	IFE_PSC_AUTO_POLARITY_DISABLE_S	4	e1000_hw.h
37720	IFE_PMC_AUTO_MDIX	0x0080	e1000_hw.h	1=enable MDI/MDI-X feature, default 0=disabled
37721	IFE_PMC_FORCE_MDIX	0x0040	e1000_hw.h	1=force MDIX-X, 0=force MDI
37722	IFE_PMC_MDIX_STATUS	0x0020	e1000_hw.h	1=MDI-X, 0=MDI
37723	IFE_PMC_AUTO_MDIX_COMPLETE	0x0010	e1000_hw.h	Resolution algorithm is completed
37724	IFE_PMC_MDIX_MODE_SHIFT	6	e1000_hw.h
37725	IFE_PHC_MDIX_RESET_ALL_MASK	0x0000	e1000_hw.h	Disable auto MDI-X
37726	IFE_PHC_HWI_ENABLE	0x8000	e1000_hw.h	Enable the HWI feature
37727	IFE_PHC_ABILITY_CHECK	0x4000	e1000_hw.h	1= Test Passed, 0=failed
37728	IFE_PHC_TEST_EXEC	0x2000	e1000_hw.h	PHY launch test pulses on the wire
37729	IFE_PHC_HIGHZ	0x0200	e1000_hw.h	1 = Open Circuit
37730	IFE_PHC_LOWZ	0x0400	e1000_hw.h	1 = Short Circuit
37731	IFE_PHC_LOW_HIGH_Z_MASK	0x0600	e1000_hw.h	Mask for indication type of problem on the line
37732	IFE_PHC_DISTANCE_MASK	0x01FF	e1000_hw.h	Mask for distance to the cable problem, in 80cm granularity
37733	IFE_PHC_RESET_ALL_MASK	0x0000	e1000_hw.h	Disable HWI
37734	IFE_PSCL_PROBE_MODE	0x0020	e1000_hw.h	LED Probe mode
37735	IFE_PSCL_PROBE_LEDS_OFF	0x0006	e1000_hw.h	Force LEDs 0 and 2 off
37736	IFE_PSCL_PROBE_LEDS_ON	0x0007	e1000_hw.h	Force LEDs 0 and 2 on
37737	ICH_FLASH_COMMAND_TIMEOUT	5000	e1000_hw.h	5000 uSecs - adjusted
37738	ICH_FLASH_ERASE_TIMEOUT	3000000	e1000_hw.h	Up to 3 seconds - worst case
37739	ICH_FLASH_CYCLE_REPEAT_COUNT	10	e1000_hw.h	10 cycles
37740	ICH_FLASH_SEG_SIZE_256	256	e1000_hw.h
37741	ICH_FLASH_SEG_SIZE_4K	4096	e1000_hw.h
37742	ICH_FLASH_SEG_SIZE_64K	65536	e1000_hw.h
37743	ICH_CYCLE_READ	0x0	e1000_hw.h
37744	ICH_CYCLE_RESERVED	0x1	e1000_hw.h
37745	ICH_CYCLE_WRITE	0x2	e1000_hw.h
37746	ICH_CYCLE_ERASE	0x3	e1000_hw.h
37747	ICH_FLASH_GFPREG	0x0000	e1000_hw.h
37748	ICH_FLASH_HSFSTS	0x0004	e1000_hw.h
37749	ICH_FLASH_HSFCTL	0x0006	e1000_hw.h
37750	ICH_FLASH_FADDR	0x0008	e1000_hw.h
37751	ICH_FLASH_FDATA0	0x0010	e1000_hw.h
37752	ICH_FLASH_FRACC	0x0050	e1000_hw.h
37753	ICH_FLASH_FREG0	0x0054	e1000_hw.h
37754	ICH_FLASH_FREG1	0x0058	e1000_hw.h
37755	ICH_FLASH_FREG2	0x005C	e1000_hw.h
37756	ICH_FLASH_FREG3	0x0060	e1000_hw.h
37757	ICH_FLASH_FPR0	0x0074	e1000_hw.h
37758	ICH_FLASH_FPR1	0x0078	e1000_hw.h
37759	ICH_FLASH_SSFSTS	0x0090	e1000_hw.h
37760	ICH_FLASH_SSFCTL	0x0092	e1000_hw.h
37761	ICH_FLASH_PREOP	0x0094	e1000_hw.h
37762	ICH_FLASH_OPTYPE	0x0096	e1000_hw.h
37763	ICH_FLASH_OPMENU	0x0098	e1000_hw.h
37764	ICH_FLASH_REG_MAPSIZE	0x00A0	e1000_hw.h
37765	ICH_FLASH_SECTOR_SIZE	4096	e1000_hw.h
37766	ICH_GFPREG_BASE_MASK	0x1FFF	e1000_hw.h
37767	ICH_FLASH_LINEAR_ADDR_MASK	0x00FFFFFF	e1000_hw.h
37768	PHY_PREAMBLE	0xFFFFFFFF	e1000_hw.h
37769	PHY_SOF	0x01	e1000_hw.h
37770	PHY_OP_READ	0x02	e1000_hw.h
37771	PHY_OP_WRITE	0x01	e1000_hw.h
37772	PHY_TURNAROUND	0x02	e1000_hw.h
37773	PHY_PREAMBLE_SIZE	32	e1000_hw.h
37774	MII_CR_SPEED_1000	0x0040	e1000_hw.h
37775	MII_CR_SPEED_100	0x2000	e1000_hw.h
37776	MII_CR_SPEED_10	0x0000	e1000_hw.h
37777	E1000_PHY_ADDRESS	0x01	e1000_hw.h
37778	PHY_AUTO_NEG_TIME	45	e1000_hw.h	4.5 Seconds
37779	PHY_FORCE_TIME	20	e1000_hw.h	2.0 Seconds
37780	PHY_REVISION_MASK	0xFFFFFFF0	e1000_hw.h
37781	DEVICE_SPEED_MASK	0x00000300	e1000_hw.h	Device Ctrl Reg Speed Mask
37782	REG4_SPEED_MASK	0x01E0	e1000_hw.h
37783	REG9_SPEED_MASK	0x0300	e1000_hw.h
37784	ADVERTISE_10_HALF	0x0001	e1000_hw.h
37785	ADVERTISE_10_FULL	0x0002	e1000_hw.h
37786	ADVERTISE_100_HALF	0x0004	e1000_hw.h
37787	ADVERTISE_100_FULL	0x0008	e1000_hw.h
37788	ADVERTISE_1000_HALF	0x0010	e1000_hw.h
37789	ADVERTISE_1000_FULL	0x0020	e1000_hw.h
37790	AUTONEG_ADVERTISE_SPEED_DEFAULT	0x002F	e1000_hw.h	Everything but 1000-Half
37791	AUTONEG_ADVERTISE_10_100_ALL	0x000F	e1000_hw.h	All 10/100 speeds
37792	AUTONEG_ADVERTISE_10_ALL	0x0003	e1000_hw.h	10Mbps Full & Half speeds
37793	DEBUGOUT2	DEBUGOUT1	e1000_osdep.h
37794	DEBUGOUT3	DEBUGOUT1	e1000_osdep.h
37795	DEBUGOUT7	DEBUGOUT1	e1000_osdep.h
37796	E1000_READ_REG_ARRAY_DWORD	E1000_READ_REG_ARRAY	e1000_osdep.h
37797	E1000_WRITE_REG_ARRAY_DWORD	E1000_WRITE_REG_ARRAY	e1000_osdep.h
37798	NX_CDRP_CLEAR	0x00000000	nxhal_nic_interface.h
37799	NX_CDRP_CMD_BIT	0x80000000	nxhal_nic_interface.h
37800	NX_CDRP_RSP_OK	0x00000001	nxhal_nic_interface.h
37801	NX_CDRP_RSP_FAIL	0x00000002	nxhal_nic_interface.h
37802	NX_CDRP_RSP_TIMEOUT	0x00000003	nxhal_nic_interface.h
37803	NX_CDRP_CMD_SUBMIT_CAPABILITIES	0x00000001	nxhal_nic_interface.h
37804	NX_CDRP_CMD_READ_MAX_RDS_PER_CT	0x00000002	nxhal_nic_interface.h
37805	NX_CDRP_CMD_READ_MAX_SDS_PER_CT	0x00000003	nxhal_nic_interface.h
37806	NX_CDRP_CMD_READ_MAX_RULES_PER_	0x00000004	nxhal_nic_interface.h
37807	NX_CDRP_CMD_READ_MAX_RX_CTX	0x00000005	nxhal_nic_interface.h
37808	NX_CDRP_CMD_READ_MAX_TX_CTX	0x00000006	nxhal_nic_interface.h
37809	NX_CDRP_CMD_CREATE_RX_CTX	0x00000007	nxhal_nic_interface.h
37810	NX_CDRP_CMD_DESTROY_RX_CTX	0x00000008	nxhal_nic_interface.h
37811	NX_CDRP_CMD_CREATE_TX_CTX	0x00000009	nxhal_nic_interface.h
37812	NX_CDRP_CMD_DESTROY_TX_CTX	0x0000000a	nxhal_nic_interface.h
37813	NX_CDRP_CMD_SETUP_STATISTICS	0x0000000e	nxhal_nic_interface.h
37814	NX_CDRP_CMD_GET_STATISTICS	0x0000000f	nxhal_nic_interface.h
37815	NX_CDRP_CMD_DELETE_STATISTICS	0x00000010	nxhal_nic_interface.h
37816	NX_CDRP_CMD_MAX	0x00000011	nxhal_nic_interface.h
37817	NX_CAP0_LEGACY_CONTEXT	NX_CAP_BIT(0, 0)	nxhal_nic_interface.h
37818	NX_CAP0_MULTI_CONTEXT	NX_CAP_BIT(0, 1)	nxhal_nic_interface.h
37819	NX_CAP0_LEGACY_MN	NX_CAP_BIT(0, 2)	nxhal_nic_interface.h
37820	NX_CAP0_LEGACY_MS	NX_CAP_BIT(0, 3)	nxhal_nic_interface.h
37821	NX_CAP0_CUT_THROUGH	NX_CAP_BIT(0, 4)	nxhal_nic_interface.h
37822	NX_CAP0_LRO	NX_CAP_BIT(0, 5)	nxhal_nic_interface.h
37823	NX_CAP0_LSO	NX_CAP_BIT(0, 6)	nxhal_nic_interface.h
37824	NX_CAP1_NIC	NX_CAP_BIT(1, 0)	nxhal_nic_interface.h
37825	NX_CAP1_PXE	NX_CAP_BIT(1, 1)	nxhal_nic_interface.h
37826	NX_CAP1_CHIMNEY	NX_CAP_BIT(1, 2)	nxhal_nic_interface.h
37827	NX_CAP1_LSA	NX_CAP_BIT(1, 3)	nxhal_nic_interface.h
37828	NX_CAP1_RDMA	NX_CAP_BIT(1, 4)	nxhal_nic_interface.h
37829	NX_CAP1_ISCSI	NX_CAP_BIT(1, 5)	nxhal_nic_interface.h
37830	NX_CAP1_FCOE	NX_CAP_BIT(1, 6)	nxhal_nic_interface.h
37831	NX_RX_RULETYPE_DEFAULT	0	nxhal_nic_interface.h
37832	NX_RX_RULETYPE_MAC	1	nxhal_nic_interface.h
37833	NX_RX_RULETYPE_MAC_VLAN	2	nxhal_nic_interface.h
37834	NX_RX_RULETYPE_MAC_RSS	3	nxhal_nic_interface.h
37835	NX_RX_RULETYPE_MAC_VLAN_RSS	4	nxhal_nic_interface.h
37836	NX_RX_RULETYPE_MAX	5	nxhal_nic_interface.h
37837	NX_RX_RULECMD_ADD	0	nxhal_nic_interface.h
37838	NX_RX_RULECMD_REMOVE	1	nxhal_nic_interface.h
37839	NX_RX_RULECMD_MAX	2	nxhal_nic_interface.h
37840	NX_HOST_CTX_STATE_FREED	0	nxhal_nic_interface.h	Invalid state
37841	NX_HOST_CTX_STATE_ALLOCATED	1	nxhal_nic_interface.h	Not committed
37842	NX_HOST_CTX_STATE_ACTIVE	2	nxhal_nic_interface.h
37843	NX_HOST_CTX_STATE_DISABLED	3	nxhal_nic_interface.h
37844	NX_HOST_CTX_STATE_QUIESCED	4	nxhal_nic_interface.h
37845	NX_HOST_CTX_STATE_MAX	5	nxhal_nic_interface.h
37846	NX_HOST_INT_CRB_MODE_UNIQUE	0	nxhal_nic_interface.h
37847	NX_HOST_INT_CRB_MODE_SHARED	1	nxhal_nic_interface.h	<= LEGACY
37848	NX_HOST_INT_CRB_MODE_NORX	2	nxhal_nic_interface.h
37849	NX_HOST_INT_CRB_MODE_NOTX	3	nxhal_nic_interface.h
37850	NX_HOST_INT_CRB_MODE_NORXTX	4	nxhal_nic_interface.h
37851	NX_DESTROY_CTX_RESET	0	nxhal_nic_interface.h
37852	NX_DESTROY_CTX_D3_RESET	1	nxhal_nic_interface.h
37853	NX_DESTROY_CTX_MAX	2	nxhal_nic_interface.h
37854	NX_HOST_RDS_CRB_MODE_UNIQUE	0	nxhal_nic_interface.h	<= LEGACY
37855	NX_HOST_RDS_CRB_MODE_SHARED	1	nxhal_nic_interface.h
37856	NX_HOST_RDS_CRB_MODE_CUSTOM	2	nxhal_nic_interface.h
37857	NX_HOST_RDS_CRB_MODE_MAX	3	nxhal_nic_interface.h
37858	NX_RDS_RING_TYPE_NORMAL	0	nxhal_nic_interface.h
37859	NX_RDS_RING_TYPE_JUMBO	1	nxhal_nic_interface.h
37860	NX_RDS_RING_TYPE_LRO	2	nxhal_nic_interface.h
37861	NX_RDS_RING_TYPE_MAX	3	nxhal_nic_interface.h
37862	NX_STATISTICS_MODE_INVALID	0	nxhal_nic_interface.h
37863	NX_STATISTICS_MODE_PULL	1	nxhal_nic_interface.h
37864	NX_STATISTICS_MODE_PUSH	2	nxhal_nic_interface.h
37865	NX_STATISTICS_MODE_SINGLE_SHOT	3	nxhal_nic_interface.h
37866	NX_STATISTICS_MODE_MAX	4	nxhal_nic_interface.h
37867	NX_STATISTICS_TYPE_INVALID	0	nxhal_nic_interface.h
37868	NX_STATISTICS_TYPE_NIC_RX_CORE	1	nxhal_nic_interface.h
37869	NX_STATISTICS_TYPE_NIC_TX_CORE	2	nxhal_nic_interface.h
37870	NX_STATISTICS_TYPE_NIC_RX_ALL	3	nxhal_nic_interface.h
37871	NX_STATISTICS_TYPE_NIC_TX_ALL	4	nxhal_nic_interface.h
37872	NX_STATISTICS_TYPE_MAX	5	nxhal_nic_interface.h
37873	NXHAL_VERSION	1	phantom.h
37874	UNM_DMA_BUFFER_ALIGN	16	phantom.h
37875	__unm_dma_aligned	__attribute__ (( aligned ( UNM_DMA_BUFFER_ALIGN ) ))	phantom.h
37876	UNM_128M_CRB_WINDOW	0x6110210UL	phantom.h
37877	UNM_32M_CRB_WINDOW	0x0110210UL	phantom.h
37878	UNM_2M_CRB_WINDOW	0x0130060UL	phantom.h
37879	UNM_CRB_PCIE	UNM_CRB_BASE ( UNM_CRB_BLK_PCIE )	phantom.h
37880	UNM_PCIE_SEM2_LOCK	( UNM_CRB_PCIE + 0x1c010 )	phantom.h
37881	UNM_PCIE_SEM2_UNLOCK	( UNM_CRB_PCIE + 0x1c014 )	phantom.h
37882	UNM_CRB_CAM	UNM_CRB_BASE ( UNM_CRB_BLK_CAM )	phantom.h
37883	UNM_CAM_RAM	( UNM_CRB_CAM + 0x02000 )	phantom.h
37884	UNM_CAM_RAM_PORT_MODE	( UNM_CAM_RAM + 0x00024 )	phantom.h
37885	UNM_CAM_RAM_PORT_MODE_AUTO_NEG	4	phantom.h
37886	UNM_CAM_RAM_PORT_MODE_AUTO_NEG_	5	phantom.h
37887	UNM_CAM_RAM_DMESG_SIG_MAGIC	0xcafebabeUL	phantom.h
37888	UNM_CAM_RAM_NUM_DMESG_BUFFERS	5	phantom.h
37889	UNM_CAM_RAM_CLP_COMMAND	( UNM_CAM_RAM + 0x000c0 )	phantom.h
37890	UNM_CAM_RAM_CLP_COMMAND_LAST	0x00000080UL	phantom.h
37891	UNM_CAM_RAM_CLP_DATA_LO	( UNM_CAM_RAM + 0x000c4 )	phantom.h
37892	UNM_CAM_RAM_CLP_DATA_HI	( UNM_CAM_RAM + 0x000c8 )	phantom.h
37893	UNM_CAM_RAM_CLP_STATUS	( UNM_CAM_RAM + 0x000cc )	phantom.h
37894	UNM_CAM_RAM_CLP_STATUS_START	0x00000001UL	phantom.h
37895	UNM_CAM_RAM_CLP_STATUS_DONE	0x00000002UL	phantom.h
37896	UNM_CAM_RAM_CLP_STATUS_ERROR	0x0000ff00UL	phantom.h
37897	UNM_CAM_RAM_CLP_STATUS_UNINITIA	0xffffffffUL	phantom.h
37898	UNM_CAM_RAM_BOOT_ENABLE	( UNM_CAM_RAM + 0x000fc )	phantom.h
37899	UNM_CAM_RAM_WOL_PORT_MODE	( UNM_CAM_RAM + 0x00198 )	phantom.h
37900	UNM_CAM_RAM_MAC_ADDRS	( UNM_CAM_RAM + 0x001c0 )	phantom.h
37901	UNM_CAM_RAM_COLD_BOOT	( UNM_CAM_RAM + 0x001fc )	phantom.h
37902	UNM_CAM_RAM_COLD_BOOT_MAGIC	0x55555555UL	phantom.h
37903	UNM_NIC_REG	( UNM_CRB_CAM + 0x02200 )	phantom.h
37904	UNM_NIC_REG_NX_CDRP	( UNM_NIC_REG + 0x00018 )	phantom.h
37905	UNM_NIC_REG_NX_ARG1	( UNM_NIC_REG + 0x0001c )	phantom.h
37906	UNM_NIC_REG_NX_ARG2	( UNM_NIC_REG + 0x00020 )	phantom.h
37907	UNM_NIC_REG_NX_ARG3	( UNM_NIC_REG + 0x00024 )	phantom.h
37908	UNM_NIC_REG_NX_SIGN	( UNM_NIC_REG + 0x00028 )	phantom.h
37909	UNM_NIC_REG_DUMMY_BUF_ADDR_HI	( UNM_NIC_REG + 0x0003c )	phantom.h
37910	UNM_NIC_REG_DUMMY_BUF_ADDR_LO	( UNM_NIC_REG + 0x00040 )	phantom.h
37911	UNM_NIC_REG_CMDPEG_STATE	( UNM_NIC_REG + 0x00050 )	phantom.h
37912	UNM_NIC_REG_CMDPEG_STATE_INITIA	0xff01	phantom.h
37913	UNM_NIC_REG_CMDPEG_STATE_INITIA	0xf00f	phantom.h
37914	UNM_NIC_REG_DUMMY_BUF	( UNM_NIC_REG + 0x000fc )	phantom.h
37915	UNM_NIC_REG_DUMMY_BUF_INIT	0	phantom.h
37916	UNM_NIC_REG_XG_STATE_P3	( UNM_NIC_REG + 0x00098 )	phantom.h
37917	UNM_NIC_REG_XG_STATE_P3_LINK_UP	0x01	phantom.h
37918	UNM_NIC_REG_XG_STATE_P3_LINK_DO	0x02	phantom.h
37919	UNM_NIC_REG_RCVPEG_STATE	( UNM_NIC_REG + 0x0013c )	phantom.h
37920	UNM_NIC_REG_RCVPEG_STATE_INITIA	0xff01	phantom.h
37921	UNM_NIC_REG_SW_INT_MASK_0	( UNM_NIC_REG + 0x001d8 )	phantom.h
37922	UNM_NIC_REG_SW_INT_MASK_1	( UNM_NIC_REG + 0x001e0 )	phantom.h
37923	UNM_NIC_REG_SW_INT_MASK_2	( UNM_NIC_REG + 0x001e4 )	phantom.h
37924	UNM_NIC_REG_SW_INT_MASK_3	( UNM_NIC_REG + 0x001e8 )	phantom.h
37925	UNM_CRB_ROMUSB	UNM_CRB_BASE ( UNM_CRB_BLK_ROMUSB )	phantom.h
37926	UNM_ROMUSB_GLB	( UNM_CRB_ROMUSB + 0x00000 )	phantom.h
37927	UNM_ROMUSB_GLB_STATUS	( UNM_ROMUSB_GLB + 0x00004 )	phantom.h
37928	UNM_ROMUSB_GLB_STATUS_ROM_DONE	( 1 << 1 )	phantom.h
37929	UNM_ROMUSB_GLB_SW_RESET	( UNM_ROMUSB_GLB + 0x00008 )	phantom.h
37930	UNM_ROMUSB_GLB_SW_RESET_MAGIC	0x0080000fUL	phantom.h
37931	UNM_ROMUSB_GLB_PEGTUNE_DONE	( UNM_ROMUSB_GLB + 0x0005c )	phantom.h
37932	UNM_ROMUSB_GLB_PEGTUNE_DONE_MAG	0x31	phantom.h
37933	UNM_ROMUSB_ROM	( UNM_CRB_ROMUSB + 0x10000 )	phantom.h
37934	UNM_ROMUSB_ROM_INSTR_OPCODE	( UNM_ROMUSB_ROM + 0x00004 )	phantom.h
37935	UNM_ROMUSB_ROM_ADDRESS	( UNM_ROMUSB_ROM + 0x00008 )	phantom.h
37936	UNM_ROMUSB_ROM_WDATA	( UNM_ROMUSB_ROM + 0x0000c )	phantom.h
37937	UNM_ROMUSB_ROM_ABYTE_CNT	( UNM_ROMUSB_ROM + 0x00010 )	phantom.h
37938	UNM_ROMUSB_ROM_DUMMY_BYTE_CNT	( UNM_ROMUSB_ROM + 0x00014 )	phantom.h
37939	UNM_ROMUSB_ROM_RDATA	( UNM_ROMUSB_ROM + 0x00018 )	phantom.h
37940	UNM_CRB_TEST	UNM_CRB_BASE ( UNM_CRB_BLK_TEST )	phantom.h
37941	UNM_TEST_CONTROL	( UNM_CRB_TEST + 0x00090 )	phantom.h
37942	UNM_TEST_CONTROL_START	0x01	phantom.h
37943	UNM_TEST_CONTROL_ENABLE	0x02	phantom.h
37944	UNM_TEST_CONTROL_BUSY	0x08	phantom.h
37945	UNM_TEST_ADDR_LO	( UNM_CRB_TEST + 0x00094 )	phantom.h
37946	UNM_TEST_ADDR_HI	( UNM_CRB_TEST + 0x00098 )	phantom.h
37947	UNM_TEST_RDDATA_LO	( UNM_CRB_TEST + 0x000a8 )	phantom.h
37948	UNM_TEST_RDDATA_HI	( UNM_CRB_TEST + 0x000ac )	phantom.h
37949	UNM_CRB_PEG_0	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_0 )	phantom.h
37950	UNM_PEG_0_HALT_STATUS	( UNM_CRB_PEG_0 + 0x00030 )	phantom.h
37951	UNM_PEG_0_HALT	( UNM_CRB_PEG_0 + 0x0003c )	phantom.h
37952	UNM_CRB_PEG_1	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_1 )	phantom.h
37953	UNM_PEG_1_HALT_STATUS	( UNM_CRB_PEG_1 + 0x00030 )	phantom.h
37954	UNM_PEG_1_HALT	( UNM_CRB_PEG_1 + 0x0003c )	phantom.h
37955	UNM_CRB_PEG_2	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_2 )	phantom.h
37956	UNM_PEG_2_HALT_STATUS	( UNM_CRB_PEG_2 + 0x00030 )	phantom.h
37957	UNM_PEG_2_HALT	( UNM_CRB_PEG_2 + 0x0003c )	phantom.h
37958	UNM_CRB_PEG_3	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_3 )	phantom.h
37959	UNM_PEG_3_HALT_STATUS	( UNM_CRB_PEG_3 + 0x00030 )	phantom.h
37960	UNM_PEG_3_HALT	( UNM_CRB_PEG_3 + 0x0003c )	phantom.h
37961	UNM_CRB_PEG_4	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_4 )	phantom.h
37962	UNM_PEG_4_HALT_STATUS	( UNM_CRB_PEG_4 + 0x00030 )	phantom.h
37963	UNM_PEG_4_HALT	( UNM_CRB_PEG_4 + 0x0003c )	phantom.h
37964	MAX_RX_SIZE	IEEE80211_MAX_FRAME_LEN	rtl818x.h
37965	RF_PARAM_ANALOGPHY	(1 << 0)	rtl818x.h
37966	RF_PARAM_ANTBDEFAULT	(1 << 1)	rtl818x.h
37967	RF_PARAM_CARRIERSENSE1	(1 << 2)	rtl818x.h
37968	RF_PARAM_CARRIERSENSE2	(1 << 3)	rtl818x.h
37969	BB_ANTATTEN_CHAN14	0x0C	rtl818x.h
37970	BB_ANTENNA_B	0x40	rtl818x.h
37971	BB_HOST_BANG	(1 << 30)	rtl818x.h
37972	BB_HOST_BANG_EN	(1 << 2)	rtl818x.h
37973	BB_HOST_BANG_CLK	(1 << 1)	rtl818x.h
37974	BB_HOST_BANG_DATA	1	rtl818x.h
37975	ANAPARAM_TXDACOFF_SHIFT	27	rtl818x.h
37976	ANAPARAM_PWR0_SHIFT	28	rtl818x.h
37977	ANAPARAM_PWR0_MASK	(0x07 << ANAPARAM_PWR0_SHIFT)	rtl818x.h
37978	ANAPARAM_PWR1_SHIFT	20	rtl818x.h
37979	ANAPARAM_PWR1_MASK	(0x7F << ANAPARAM_PWR1_SHIFT)	rtl818x.h
37980	RTL818X_RX_RING_SIZE	8	rtl818x.h	doesn't have to be a power of 2
37981	RTL818X_TX_RING_SIZE	8	rtl818x.h	nor this [but 2^n is very slightly faster]
37982	RTL818X_RING_ALIGN	256	rtl818x.h
37983	RTL818X_MAX_RETRIES	4	rtl818x.h
37984	RTL818X_RF_DRIVERS	__table(struct rtl818x_rf_ops, "rtl818x_rf_drivers")	rtl818x.h
37985	__rtl818x_rf_driver	__table_entry(RTL818X_RF_DRIVERS, 01)	rtl818x.h
37986	WRAP	0	mucurses.h
37987	NOWRAP	1	mucurses.h
37988	ASSERTING	0	assert.h
37989	ASSERTING	1	assert.h
37990	NON_STANDARD_BOOTP_SERVER	1067	bootp.h
37991	NON_STANDARD_BOOTP_CLIENT	1068	bootp.h
37992	BOOTP_SERVER	NON_STANDARD_BOOTP_SERVER	bootp.h
37993	BOOTP_SERVER	67	bootp.h
37994	BOOTP_CLIENT	NON_STANDARD_BOOTP_CLIENT	bootp.h
37995	BOOTP_CLIENT	68	bootp.h
37996	PROXYDHCP_SERVER	4011	bootp.h	For PXE
37997	BOOTP_REQUEST	1	bootp.h
37998	BOOTP_REPLY	2	bootp.h
37999	RFC1533_COOKIE	99, 130, 83, 99	bootp.h
38000	RFC1533_PAD	0	bootp.h
38001	RFC1533_NETMASK	1	bootp.h
38002	RFC1533_TIMEOFFSET	2	bootp.h
38003	RFC1533_GATEWAY	3	bootp.h
38004	RFC1533_TIMESERVER	4	bootp.h
38005	RFC1533_IEN116NS	5	bootp.h
38006	RFC1533_DNS	6	bootp.h
38007	RFC1533_LOGSERVER	7	bootp.h
38008	RFC1533_COOKIESERVER	8	bootp.h
38009	RFC1533_LPRSERVER	9	bootp.h
38010	RFC1533_IMPRESSSERVER	10	bootp.h
38011	RFC1533_RESOURCESERVER	11	bootp.h
38012	RFC1533_HOSTNAME	12	bootp.h
38013	RFC1533_BOOTFILESIZE	13	bootp.h
38014	RFC1533_MERITDUMPFILE	14	bootp.h
38015	RFC1533_DOMAINNAME	15	bootp.h
38016	RFC1533_SWAPSERVER	16	bootp.h
38017	RFC1533_ROOTPATH	17	bootp.h
38018	RFC1533_EXTENSIONPATH	18	bootp.h
38019	RFC1533_IPFORWARDING	19	bootp.h
38020	RFC1533_IPSOURCEROUTING	20	bootp.h
38021	RFC1533_IPPOLICYFILTER	21	bootp.h
38022	RFC1533_IPMAXREASSEMBLY	22	bootp.h
38023	RFC1533_IPTTL	23	bootp.h
38024	RFC1533_IPMTU	24	bootp.h
38025	RFC1533_IPMTUPLATEAU	25	bootp.h
38026	RFC1533_INTMTU	26	bootp.h
38027	RFC1533_INTLOCALSUBNETS	27	bootp.h
38028	RFC1533_INTBROADCAST	28	bootp.h
38029	RFC1533_INTICMPDISCOVER	29	bootp.h
38030	RFC1533_INTICMPRESPOND	30	bootp.h
38031	RFC1533_INTROUTEDISCOVER	31	bootp.h
38032	RFC1533_INTROUTESOLICIT	32	bootp.h
38033	RFC1533_INTSTATICROUTES	33	bootp.h
38034	RFC1533_LLTRAILERENCAP	34	bootp.h
38035	RFC1533_LLARPCACHETMO	35	bootp.h
38036	RFC1533_LLETHERNETENCAP	36	bootp.h
38037	RFC1533_TCPTTL	37	bootp.h
38038	RFC1533_TCPKEEPALIVETMO	38	bootp.h
38039	RFC1533_TCPKEEPALIVEGB	39	bootp.h
38040	RFC1533_NISDOMAIN	40	bootp.h
38041	RFC1533_NISSERVER	41	bootp.h
38042	RFC1533_NTPSERVER	42	bootp.h
38043	RFC1533_VENDOR	43	bootp.h
38044	RFC1533_NBNS	44	bootp.h
38045	RFC1533_NBDD	45	bootp.h
38046	RFC1533_NBNT	46	bootp.h
38047	RFC1533_NBSCOPE	47	bootp.h
38048	RFC1533_XFS	48	bootp.h
38049	RFC1533_XDM	49	bootp.h
38050	RFC2132_REQ_ADDR	50	bootp.h
38051	RFC2132_MSG_TYPE	53	bootp.h
38052	RFC2132_SRV_ID	54	bootp.h
38053	RFC2132_PARAM_LIST	55	bootp.h
38054	RFC2132_MAX_SIZE	57	bootp.h
38055	RFC2132_VENDOR_CLASS_ID	60	bootp.h
38056	RFC2132_CLIENT_ID	61	bootp.h
38057	RFC2132_TFTP_SERVER_NAME	66	bootp.h
38058	RFC2132_BOOTFILE_NAME	67	bootp.h
38059	RFC3004_USER_CLASS	77	bootp.h
38060	RFC3679_PXE_CLIENT_ARCH	93	bootp.h
38061	RFC3679_PXE_CLIENT_NDI	94	bootp.h
38062	RFC3679_PXE_CLIENT_UUID	97	bootp.h
38063	RFC3679_PXE_CLIENT_ARCH_LENGTH	2	bootp.h
38064	RFC3679_PXE_CLIENT_NDI_LENGTH	3	bootp.h
38065	RFC3679_PXE_CLIENT_UUID_LENGTH	17	bootp.h
38066	RFC3679_PXE_CLIENT_ARCH_IAX86PC	0,0	bootp.h
38067	RFC3679_PXE_CLIENT_ARCH_NECPC98	0,1	bootp.h
38068	RFC3679_PXE_CLIENT_ARCH_IA64PC	0,2	bootp.h
38069	RFC3679_PXE_CLIENT_ARCH_DECALPH	0,3	bootp.h
38070	RFC3679_PXE_CLIENT_ARCH_ARCX86	0,4	bootp.h
38071	RFC3679_PXE_CLIENT_ARCH_INTELLE	0,5	bootp.h
38072	RFC3679_PXE_CLIENT_NDI_21	1,2,1	bootp.h
38073	RFC3679_PXE_CLIENT_UUID_TYPE	0	bootp.h
38074	RFC3679_PXE_CLIENT_UUID_DEFAULT	RFC3679_PXE_CLIENT_UUID_TYPE, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF	bootp.h
38075	RFC2132_VENDOR_CLASS_ID_PXE_LEN	32	bootp.h
38076	RFC2132_VENDOR_CLASS_ID_PXE	'P','X','E','C','l','i','e','n','t',':', \ 'A','r','c','h',':','0','0','0','0','0',':', \ 'U','N','D','I',':','0','0','2','0'	bootp.h
38077	RFC1533_VENDOR_PXE_OPT128	128	bootp.h
38078	RFC1533_VENDOR_PXE_OPT129	129	bootp.h
38079	RFC1533_VENDOR_PXE_OPT130	130	bootp.h
38080	RFC1533_VENDOR_PXE_OPT131	131	bootp.h
38081	RFC1533_VENDOR_PXE_OPT132	132	bootp.h
38082	RFC1533_VENDOR_PXE_OPT133	133	bootp.h
38083	RFC1533_VENDOR_PXE_OPT134	134	bootp.h
38084	RFC1533_VENDOR_PXE_OPT135	135	bootp.h
38085	DHCPDISCOVER	1	bootp.h
38086	DHCPOFFER	2	bootp.h
38087	DHCPREQUEST	3	bootp.h
38088	DHCPACK	5	bootp.h
38089	RFC1533_VENDOR_MAJOR	0	bootp.h
38090	RFC1533_VENDOR_MINOR	0	bootp.h
38091	RFC1533_VENDOR_MAGIC	128	bootp.h
38092	RFC1533_VENDOR_ADDPARM	129	bootp.h
38093	RFC1533_VENDOR_ETHDEV	130	bootp.h
38094	RFC1533_VENDOR_ETHERBOOT_ENCAP	150	bootp.h
38095	RFC1533_VENDOR_HOWTO	132	bootp.h
38096	RFC1533_VENDOR_KERNEL_ENV	133	bootp.h
38097	RFC1533_VENDOR_NIC_DEV_ID	175	bootp.h
38098	RFC1533_VENDOR_ARCH	177	bootp.h
38099	RFC1533_END	255	bootp.h
38100	BOOTP_VENDOR_LEN	64	bootp.h
38101	DHCP_OPT_LEN	312	bootp.h
38102	u32	unsigned int	btext.h
38103	u16	unsigned short	btext.h
38104	u8	unsigned char	btext.h
38105	BOOTX_COLORTABLE_SIZE	(256UL3UL2UL)	btext.h
38106	CMDL_BUFFER_SIZE	256	cmdlinelib.h
38107	CMDL_PROMPT_SIZE	8	cmdlinelib.h
38108	CMDL_MAX_TAB_COMPLETE_RESULT	256	cmdlinelib.h
38109	NULL	((void *)0)	cmdlinelib.h
38110	F_RELFLG	0x0001	coff.h	If set, not reloc. info. Clear for executables
38111	F_EXEC	0x0002	coff.h	No unresolved symbols. Executable file !
38112	F_LNNO	0x0004	coff.h	If set, line information numbers removed
38113	F_LSYMS	0x0008	coff.h	If set, local symbols removed
38114	F_AR32WR	0x0100	coff.h	Indicates little endian file
38115	EM_E1	0x17a	coff.h	Magic number for Hyperstone. Big endian format
38116	O_MAGIC	0x017c	coff.h	Optional's header magic number for Hyperstone
38117	S_TYPE_TEXT	0x0020	coff.h	If set, the section contains only executable
38118	S_TYPE_DATA	0x0040	coff.h	If set, the section contains only initialized data
38119	S_TYPE_BSS	0x0080	coff.h	If set, the section is BSS no data stored
38120	OBJECT_SYMBOL	PREFIX_OBJECT ( obj_ )	compiler.h
38121	CONFIG_SYMBOL	PREFIX_OBJECT ( obj_config_ )	compiler.h
38122	ERRFILE	PREFIX_OBJECT ( ERRFILE_ )	compiler.h
38123	DEBUG_SYMBOL	PREFIX_OBJECT ( debug_ )	compiler.h
38124	DBGLVL_MAX	DEBUG_SYMBOL	compiler.h
38125	DBGLVL_MAX	0	compiler.h
38126	DBGLVL	( DBGLVL_MAX & ~__debug_disable )	compiler.h
38127	DBGLVL	0	compiler.h
38128	DBGLVL_LOG	1	compiler.h
38129	DBG_LOG	( DBGLVL & DBGLVL_LOG )	compiler.h
38130	DBGLVL_EXTRA	2	compiler.h
38131	DBG_EXTRA	( DBGLVL & DBGLVL_EXTRA )	compiler.h
38132	DBGLVL_PROFILE	4	compiler.h
38133	DBG_PROFILE	( DBGLVL & DBGLVL_PROFILE )	compiler.h
38134	DBGLVL_IO	8	compiler.h
38135	DBG_IO	( DBGLVL & DBGLVL_IO )	compiler.h
38136	PACKED	__attribute__ (( packed ))	compiler.h
38137	__unused	__attribute__ (( unused ))	compiler.h
38138	__pure	__attribute__ (( pure ))	compiler.h
38139	__const	__attribute__ (( const ))	compiler.h
38140	__nonnull	__attribute__ (( nonnull ))	compiler.h
38141	__malloc	__attribute__ (( malloc ))	compiler.h
38142	__used	__attribute__ (( used ))	compiler.h
38143	__aligned	__attribute__ (( aligned ( 16 ) ))	compiler.h
38144	__always_inline	__attribute__ (( always_inline ))	compiler.h
38145	__shared	__asm__ ( "_shared_bss" ) __aligned	compiler.h
38146	FILE_LICENCE_PUBLIC_DOMAIN	PROVIDE_SYMBOL ( __licence_public_domain )	compiler.h
38147	FILE_LICENCE_GPL2_OR_LATER	PROVIDE_SYMBOL ( __licence_gpl2_or_later )	compiler.h
38148	FILE_LICENCE_GPL2_ONLY	PROVIDE_SYMBOL ( __licence_gpl2_only )	compiler.h
38149	FILE_LICENCE_GPL_ANY	PROVIDE_SYMBOL ( __licence_gpl_any )	compiler.h
38150	FILE_LICENCE_BSD3	PROVIDE_SYMBOL ( __licence_bsd3 )	compiler.h
38151	FILE_LICENCE_BSD2	PROVIDE_SYMBOL ( __licence_bsd2 )	compiler.h
38152	FILE_LICENCE_MIT	PROVIDE_SYMBOL ( __licence_mit )	compiler.h
38153	CONSOLES	__table ( struct console_driver, "consoles" )	console.h
38154	__console_driver	__table_entry ( CONSOLES, 01 )	console.h
38155	ERR	(-1)	curses.h
38156	FALSE	(0)	curses.h
38157	OK	(0)	curses.h
38158	TRUE	(1)	curses.h
38159	stdscr	( &_stdscr )	curses.h
38160	COLS	_COLS	curses.h
38161	LINES	_LINES	curses.h
38162	CPAIR_SHIFT	8	curses.h
38163	ATTRS_SHIFT	16	curses.h
38164	WA_DEFAULT	( 0x0000 << ATTRS_SHIFT )	curses.h
38165	WA_ALTCHARSET	( 0x0001 << ATTRS_SHIFT )	curses.h
38166	WA_BLINK	( 0x0002 << ATTRS_SHIFT )	curses.h
38167	WA_BOLD	( 0x0004 << ATTRS_SHIFT )	curses.h
38168	WA_DIM	( 0x0008 << ATTRS_SHIFT )	curses.h
38169	WA_INVIS	( 0x0010 << ATTRS_SHIFT )	curses.h
38170	WA_PROTECT	( 0x0020 << ATTRS_SHIFT )	curses.h
38171	WA_REVERSE	( 0x0040 << ATTRS_SHIFT )	curses.h
38172	WA_STANDOUT	( 0x0080 << ATTRS_SHIFT )	curses.h
38173	WA_UNDERLINE	( 0x0100 << ATTRS_SHIFT )	curses.h
38174	WA_HORIZONTAL	( 0x0200 << ATTRS_SHIFT )	curses.h
38175	WA_VERTICAL	( 0x0400 << ATTRS_SHIFT )	curses.h
38176	WA_LEFT	( 0x0800 << ATTRS_SHIFT )	curses.h
38177	WA_RIGHT	( 0x1000 << ATTRS_SHIFT )	curses.h
38178	WA_LOW	( 0x2000 << ATTRS_SHIFT )	curses.h
38179	WA_TOP	( 0x4000 << ATTRS_SHIFT )	curses.h
38180	A_DEFAULT	WA_DEFAULT	curses.h
38181	A_ALTCHARSET	WA_ALTCHARSET	curses.h
38182	A_BLINK	WA_BLINK	curses.h
38183	A_BOLD	WA_BOLD	curses.h
38184	A_DIM	WA_DIM	curses.h
38185	A_INVIS	WA_INVIS	curses.h
38186	A_PROTECT	WA_PROTECT	curses.h
38187	A_REVERSE	WA_REVERSE	curses.h
38188	A_STANDOUT	WA_STANDOUT	curses.h
38189	A_UNDERLINE	WA_UNDERLINE	curses.h
38190	A_ATTRIBUTES	( 0xffff << ATTRS_SHIFT )	curses.h
38191	A_CHARTEXT	( 0xff )	curses.h
38192	A_COLOUR	( 0xff << CPAIR_SHIFT )	curses.h
38193	A_COLOR	A_COLOUR	curses.h
38194	COLOUR_PAIRS	8	curses.h	Arbitrary limit
38195	COLOR_PAIRS	COLOUR_PAIRS	curses.h
38196	ACS_ULCORNER	'+'	curses.h
38197	ACS_LLCORNER	'+'	curses.h
38198	ACS_URCORNER	'+'	curses.h
38199	ACS_LRCORNER	'+'	curses.h
38200	ACS_RTEE	'+'	curses.h
38201	ACS_LTEE	'+'	curses.h
38202	ACS_BTEE	'+'	curses.h
38203	ACS_TTEE	'+'	curses.h
38204	ACS_HLINE	'-'	curses.h
38205	ACS_VLINE	'\|'	curses.h
38206	ACS_PLUS	'+'	curses.h
38207	ACS_S1	'-'	curses.h
38208	ACS_S9	'_'	curses.h
38209	ACS_DIAMOND	'+'	curses.h
38210	ACS_CKBOARD	':'	curses.h
38211	ACS_DEGREE	'\''	curses.h
38212	ACS_PLMINUS	'#'	curses.h
38213	ACS_BULLET	'o'	curses.h
38214	ACS_LARROW	'<'	curses.h
38215	ACS_RARROW	'>'	curses.h
38216	ACS_DARROW	'v'	curses.h
38217	ACS_UARROW	'^'	curses.h
38218	ACS_BOARD	'#'	curses.h
38219	ACS_LANTERN	'#'	curses.h
38220	ACS_BLOCK	'#'	curses.h
38221	COLOUR_BLACK	0	curses.h
38222	COLOUR_RED	1	curses.h
38223	COLOUR_GREEN	2	curses.h
38224	COLOUR_YELLOW	3	curses.h
38225	COLOUR_BLUE	4	curses.h
38226	COLOUR_MAGENTA	5	curses.h
38227	COLOUR_CYAN	6	curses.h
38228	COLOUR_WHITE	7	curses.h
38229	COLOURS	7	curses.h
38230	COLOUR_FG	30	curses.h
38231	COLOUR_BG	40	curses.h
38232	COLOR_FG	COLOUR_FG	curses.h
38233	COLOR_BG	COLOUR_BG	curses.h
38234	COLOR_BLACK	COLOUR_BLACK	curses.h
38235	COLOR_BLUE	COLOUR_BLUE	curses.h
38236	COLOR_GREEN	COLOUR_GREEN	curses.h
38237	COLOR_CYAN	COLOUR_CYAN	curses.h
38238	COLOR_RED	COLOUR_RED	curses.h
38239	COLOR_MAGENTA	COLOUR_MAGENTA	curses.h
38240	COLOR_YELLOW	COLOUR_YELLOW	curses.h
38241	COLOR_WHITE	COLOUR_WHITE	curses.h
38242	COLORS	COLOURS	curses.h
38243	init_color	( c, r, g, b ) init_colour ( (c), (r), (g), (b) )	curses.h
38244	EI_NIDENT	16	elf.h	Size of e_ident array.
38245	ET_NONE	0	elf.h	No file type
38246	ET_REL	1	elf.h	Relocatable file
38247	ET_EXEC	2	elf.h	Executable file
38248	ET_DYN	3	elf.h	Shared object file
38249	ET_CORE	4	elf.h	Core file
38250	EM_NONE	0	elf.h	No machine
38251	EM_M32	1	elf.h	AT&T WE 32100
38252	EM_SPARC	2	elf.h	SUN SPARC
38253	EM_386	3	elf.h	Intel 80386+
38254	EM_68K	4	elf.h	Motorola m68k family
38255	EM_88K	5	elf.h	Motorola m88k family
38256	EM_486	6	elf.h	Perhaps disused
38257	EM_860	7	elf.h	Intel 80860
38258	EM_MIPS	8	elf.h	MIPS R3000 big-endian
38259	EM_S370	9	elf.h	IBM System/370
38260	EM_MIPS_RS3_LE	10	elf.h	MIPS R3000 little-endian
38261	EM_PARISC	15	elf.h	HPPA
38262	EM_VPP500	17	elf.h	Fujitsu VPP500
38263	EM_SPARC32PLUS	18	elf.h	Sun's "v8plus"
38264	EM_960	19	elf.h	Intel 80960
38265	EM_PPC	20	elf.h	PowerPC
38266	EM_PPC64	21	elf.h	PowerPC 64-bit
38267	EM_S390	22	elf.h	IBM S390
38268	EM_V800	36	elf.h	NEC V800 series
38269	EM_FR20	37	elf.h	Fujitsu FR20
38270	EM_RH32	38	elf.h	TRW RH-32
38271	EM_RCE	39	elf.h	Motorola RCE
38272	EM_ARM	40	elf.h	ARM
38273	EM_FAKE_ALPHA	41	elf.h	Digital Alpha
38274	EM_SH	42	elf.h	Hitachi SH
38275	EM_SPARCV9	43	elf.h	SPARC v9 64-bit
38276	EM_TRICORE	44	elf.h	Siemens Tricore
38277	EM_ARC	45	elf.h	Argonaut RISC Core
38278	EM_H8_300	46	elf.h	Hitachi H8/300
38279	EM_H8_300H	47	elf.h	Hitachi H8/300H
38280	EM_H8S	48	elf.h	Hitachi H8S
38281	EM_H8_500	49	elf.h	Hitachi H8/500
38282	EM_IA_64	50	elf.h	Intel Merced
38283	EM_MIPS_X	51	elf.h	Stanford MIPS-X
38284	EM_COLDFIRE	52	elf.h	Motorola Coldfire
38285	EM_68HC12	53	elf.h	Motorola M68HC12
38286	EM_MMA	54	elf.h	Fujitsu MMA Multimedia Accelerator
38287	EM_PCP	55	elf.h	Siemens PCP
38288	EM_NCPU	56	elf.h	Sony nCPU embeeded RISC
38289	EM_NDR1	57	elf.h	Denso NDR1 microprocessor
38290	EM_STARCORE	58	elf.h	Motorola Start*Core processor
38291	EM_ME16	59	elf.h	Toyota ME16 processor
38292	EM_ST100	60	elf.h	STMicroelectronic ST100 processor
38293	EM_TINYJ	61	elf.h	Advanced Logic Corp. Tinyj emb.fam
38294	EM_X86_64	62	elf.h	AMD x86-64 architecture
38295	EM_PDSP	63	elf.h	Sony DSP Processor
38296	EM_FX66	66	elf.h	Siemens FX66 microcontroller
38297	EM_ST9PLUS	67	elf.h	STMicroelectronics ST9+ 8/16 mc
38298	EM_ST7	68	elf.h	STmicroelectronics ST7 8 bit mc
38299	EM_68HC16	69	elf.h	Motorola MC68HC16 microcontroller
38300	EM_68HC11	70	elf.h	Motorola MC68HC11 microcontroller
38301	EM_68HC08	71	elf.h	Motorola MC68HC08 microcontroller
38302	EM_68HC05	72	elf.h	Motorola MC68HC05 microcontroller
38303	EM_SVX	73	elf.h	Silicon Graphics SVx
38304	EM_AT19	74	elf.h	STMicroelectronics ST19 8 bit mc
38305	EM_VAX	75	elf.h	Digital VAX
38306	EM_CRIS	76	elf.h	Axis Communications 32-bit embedded processor
38307	EM_JAVELIN	77	elf.h	Infineon Technologies 32-bit embedded processor
38308	EM_FIREPATH	78	elf.h	Element 14 64-bit DSP Processor
38309	EM_ZSP	79	elf.h	LSI Logic 16-bit DSP Processor
38310	EM_MMIX	80	elf.h	Donald Knuth's educational 64-bit processor
38311	EM_HUANY	81	elf.h	Harvard University machine-independent object files
38312	EM_PRISM	82	elf.h	SiTera Prism
38313	EM_AVR	83	elf.h	Atmel AVR 8-bit microcontroller
38314	EM_FR30	84	elf.h	Fujitsu FR30
38315	EM_D10V	85	elf.h	Mitsubishi D10V
38316	EM_D30V	86	elf.h	Mitsubishi D30V
38317	EM_V850	87	elf.h	NEC v850
38318	EM_M32R	88	elf.h	Mitsubishi M32R
38319	EM_MN10300	89	elf.h	Matsushita MN10300
38320	EM_MN10200	90	elf.h	Matsushita MN10200
38321	EM_PJ	91	elf.h	picoJava
38322	EM_OPENRISC	92	elf.h	OpenRISC 32-bit embedded processor
38323	EM_ARC_A5	93	elf.h	ARC Cores Tangent-A5
38324	EM_XTENSA	94	elf.h	Tensilica Xtensa Architecture
38325	EM_NUM	95	elf.h
38326	PT_NULL	0	elf.h	Unused entry.
38327	PT_LOAD	1	elf.h	Loadable segment.
38328	PT_DYNAMIC	2	elf.h	Dynamic linking information segment.
38329	PT_INTERP	3	elf.h	Pathname of interpreter.
38330	PT_NOTE	4	elf.h	Auxiliary information.
38331	PT_SHLIB	5	elf.h	Reserved (not used).
38332	PT_PHDR	6	elf.h	Location of program header itself.
38333	PF_X	0x1	elf.h	Executable.
38334	PF_W	0x2	elf.h	Writable.
38335	PF_R	0x4	elf.h	Readable.
38336	ELF_PROGRAM_RETURNS_BIT	0x8000000	elf.h	e_flags bit 31
38337	EI_MAG0	0	elf.h
38338	ELFMAG0	0x7f	elf.h
38339	EI_MAG1	1	elf.h
38340	ELFMAG1	'E'	elf.h
38341	EI_MAG2	2	elf.h
38342	ELFMAG2	'L'	elf.h
38343	EI_MAG3	3	elf.h
38344	ELFMAG3	'F'	elf.h
38345	ELFMAG	"\177ELF"	elf.h
38346	SELFMAG	4	elf.h
38347	EI_CLASS	4	elf.h	File class byte index
38348	ELFCLASSNONE	0	elf.h	Invalid class
38349	ELFCLASS32	1	elf.h	32-bit objects
38350	ELFCLASS64	2	elf.h	64-bit objects
38351	EI_DATA	5	elf.h	Data encodeing byte index
38352	ELFDATANONE	0	elf.h	Invalid data encoding
38353	ELFDATA2LSB	1	elf.h	2's complement little endian
38354	ELFDATA2MSB	2	elf.h	2's complement big endian
38355	EI_VERSION	6	elf.h	File version byte index
38356	EV_NONE	0	elf.h	Invalid ELF Version
38357	EV_CURRENT	1	elf.h	Current version
38358	ELF32_PHDR_SIZE	(8*4)	elf.h	Size of an elf program header
38359	__LITTLE_ENDIAN	1234	endian.h
38360	__BIG_ENDIAN	4321	endian.h
38361	__PDP_ENDIAN	3412	endian.h
38362	ERRFILE	( 0 * ( ( int ) missing_errfile_declaration ) )	errno.h
38363	PXENV_STATUS_SUCCESS	0x0000	errno.h
38364	PXENV_STATUS_FAILURE	0x0001	errno.h
38365	PXENV_STATUS_BAD_FUNC	0x0002	errno.h
38366	PXENV_STATUS_UNSUPPORTED	0x0003	errno.h
38367	PXENV_STATUS_KEEP_UNDI	0x0004	errno.h
38368	PXENV_STATUS_KEEP_ALL	0x0005	errno.h
38369	PXENV_STATUS_OUT_OF_RESOURCES	0x0006	errno.h
38370	PXENV_STATUS_ARP_TIMEOUT	0x0011	errno.h
38371	PXENV_STATUS_UDP_CLOSED	0x0018	errno.h
38372	PXENV_STATUS_UDP_OPEN	0x0019	errno.h
38373	PXENV_STATUS_TFTP_CLOSED	0x001a	errno.h
38374	PXENV_STATUS_TFTP_OPEN	0x001b	errno.h
38375	PXENV_STATUS_MCOPY_PROBLEM	0x0020	errno.h
38376	PXENV_STATUS_BIS_INTEGRITY_FAIL	0x0021	errno.h
38377	PXENV_STATUS_BIS_VALIDATE_FAILU	0x0022	errno.h
38378	PXENV_STATUS_BIS_INIT_FAILURE	0x0023	errno.h
38379	PXENV_STATUS_BIS_SHUTDOWN_FAILU	0x0024	errno.h
38380	PXENV_STATUS_BIS_GBOA_FAILURE	0x0025	errno.h
38381	PXENV_STATUS_BIS_FREE_FAILURE	0x0026	errno.h
38382	PXENV_STATUS_BIS_GSI_FAILURE	0x0027	errno.h
38383	PXENV_STATUS_BIS_BAD_CKSUM	0x0028	errno.h
38384	PXENV_STATUS_TFTP_CANNOT_ARP_AD	0x0030	errno.h
38385	PXENV_STATUS_TFTP_OPEN_TIMEOUT	0x0032	errno.h
38386	PXENV_STATUS_TFTP_UNKNOWN_OPCOD	0x0033	errno.h
38387	PXENV_STATUS_TFTP_READ_TIMEOUT	0x0035	errno.h
38388	PXENV_STATUS_TFTP_ERROR_OPCODE	0x0036	errno.h
38389	PXENV_STATUS_TFTP_CANNOT_OPEN_C	0x0038	errno.h
38390	PXENV_STATUS_TFTP_CANNOT_READ_F	0x0039	errno.h
38391	PXENV_STATUS_TFTP_TOO_MANY_PACK	0x003a	errno.h
38392	PXENV_STATUS_TFTP_FILE_NOT_FOUN	0x003b	errno.h
38393	PXENV_STATUS_TFTP_ACCESS_VIOLAT	0x003c	errno.h
38394	PXENV_STATUS_TFTP_NO_MCAST_ADDR	0x003d	errno.h
38395	PXENV_STATUS_TFTP_NO_FILESIZE	0x003e	errno.h
38396	PXENV_STATUS_TFTP_INVALID_PACKE	0x003f	errno.h
38397	PXENV_STATUS_DHCP_TIMEOUT	0x0051	errno.h
38398	PXENV_STATUS_DHCP_NO_IP_ADDRESS	0x0052	errno.h
38399	PXENV_STATUS_DHCP_NO_BOOTFILE_N	0x0053	errno.h
38400	PXENV_STATUS_DHCP_BAD_IP_ADDRES	0x0054	errno.h
38401	PXENV_STATUS_UNDI_INVALID_FUNCT	0x0060	errno.h
38402	PXENV_STATUS_UNDI_MEDIATEST_FAI	0x0061	errno.h
38403	PXENV_STATUS_UNDI_CANNOT_INIT_N	0x0062	errno.h
38404	PXENV_STATUS_UNDI_CANNOT_INITIA	0x0063	errno.h
38405	PXENV_STATUS_UNDI_CANNOT_INITIA	0x0064	errno.h
38406	PXENV_STATUS_UNDI_CANNOT_READ_C	0x0065	errno.h
38407	PXENV_STATUS_UNDI_CANNOT_READ_I	0x0066	errno.h
38408	PXENV_STATUS_UNDI_BAD_MAC_ADDRE	0x0067	errno.h
38409	PXENV_STATUS_UNDI_BAD_EEPROM_CH	0x0068	errno.h
38410	PXENV_STATUS_UNDI_ERROR_SETTING	0x0069	errno.h
38411	PXENV_STATUS_UNDI_INVALID_STATE	0x006a	errno.h
38412	PXENV_STATUS_UNDI_TRANSMIT_ERRO	0x006b	errno.h
38413	PXENV_STATUS_UNDI_INVALID_PARAM	0x006c	errno.h
38414	PXENV_STATUS_BSTRAP_PROMPT_MENU	0x0074	errno.h
38415	PXENV_STATUS_BSTRAP_MCAST_ADDR	0x0076	errno.h
38416	PXENV_STATUS_BSTRAP_MISSING_LIS	0x0077	errno.h
38417	PXENV_STATUS_BSTRAP_NO_RESPONSE	0x0078	errno.h
38418	PXENV_STATUS_BSTRAP_FILE_TOO_BI	0x0079	errno.h
38419	PXENV_STATUS_BINL_CANCELED_BY_K	0x00a0	errno.h
38420	PXENV_STATUS_BINL_NO_PXE_SERVER	0x00a1	errno.h
38421	PXENV_STATUS_NOT_AVAILABLE_IN_P	0x00a2	errno.h
38422	PXENV_STATUS_NOT_AVAILABLE_IN_R	0x00a3	errno.h
38423	PXENV_STATUS_BUSD_DEVICE_NOT_SU	0x00b0	errno.h
38424	PXENV_STATUS_LOADER_NO_FREE_BAS	0x00c0	errno.h
38425	PXENV_STATUS_LOADER_NO_BC_ROMID	0x00c1	errno.h
38426	PXENV_STATUS_LOADER_BAD_BC_ROMI	0x00c2	errno.h
38427	PXENV_STATUS_LOADER_BAD_BC_RUNT	0x00c3	errno.h
38428	PXENV_STATUS_LOADER_NO_UNDI_ROM	0x00c4	errno.h
38429	PXENV_STATUS_LOADER_BAD_UNDI_RO	0x00c5	errno.h
38430	PXENV_STATUS_LOADER_BAD_UNDI_DR	0x00c6	errno.h
38431	PXENV_STATUS_LOADER_NO_PXE_STRU	0x00c8	errno.h
38432	PXENV_STATUS_LOADER_NO_PXENV_ST	0x00c9	errno.h
38433	PXENV_STATUS_LOADER_UNDI_START	0x00ca	errno.h
38434	PXENV_STATUS_LOADER_BC_START	0x00cb	errno.h
38435	ENOERR	( ERRFILE \| PXENV_STATUS_SUCCESS \| 0x00000000 )	errno.h
38436	E2BIG	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x01000000 )	errno.h
38437	EACCES	( ERRFILE \| PXENV_STATUS_TFTP_ACCESS_VIOLATION \| 0x02000000 )	errno.h
38438	EADDRINUSE	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x03000000 )	errno.h
38439	EADDRNOTAVAIL	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x04000000 )	errno.h
38440	EAFNOSUPPORT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x05000000 )	errno.h
38441	EAGAIN	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x06000000 )	errno.h
38442	EALREADY	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x07000000 )	errno.h
38443	EBADF	( ERRFILE \| PXENV_STATUS_TFTP_CLOSED \| 0x08000000 )	errno.h
38444	EBADMSG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x09000000 )	errno.h
38445	EBUSY	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x0a000000 )	errno.h
38446	ECANCELED	( ERRFILE \| PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE \| 0x0b000000 )	errno.h
38447	ECHILD	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x0c000000 )	errno.h
38448	ECONNABORTED	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x0d000000 )	errno.h
38449	ECONNREFUSED	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION \| 0x0e000000 )	errno.h
38450	ECONNRESET	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x0f000000 )	errno.h
38451	EDEADLK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x10000000 )	errno.h
38452	EDESTADDRREQ	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x11000000 )	errno.h
38453	EDOM	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x12000000 )	errno.h
38454	EDQUOT	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x13000000 )	errno.h
38455	EEXIST	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x14000000 )	errno.h
38456	EFAULT	( ERRFILE \| PXENV_STATUS_MCOPY_PROBLEM \| 0x15000000 )	errno.h
38457	EFBIG	( ERRFILE \| PXENV_STATUS_MCOPY_PROBLEM \| 0x16000000 )	errno.h
38458	EHOSTUNREACH	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x17000000 )	errno.h
38459	EIDRM	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x18000000 )	errno.h
38460	EILSEQ	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x19000000 )	errno.h
38461	EINPROGRESS	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1a000000 )	errno.h
38462	EINTR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1b000000 )	errno.h
38463	EINVAL	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x1c000000 )	errno.h
38464	EIO	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x1d000000 )	errno.h
38465	EISCONN	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x1e000000 )	errno.h
38466	EISDIR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1f000000 )	errno.h
38467	ELOOP	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x20000000 )	errno.h
38468	EMFILE	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x21000000 )	errno.h
38469	EMLINK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x22000000 )	errno.h
38470	EMSGSIZE	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x23000000 )	errno.h
38471	EMULTIHOP	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x24000000 )	errno.h
38472	ENAMETOOLONG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x25000000 )	errno.h
38473	ENETDOWN	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x26000000 )	errno.h
38474	ENETRESET	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x27000000 )	errno.h
38475	ENETUNREACH	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x28000000 )	errno.h
38476	ENFILE	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x29000000 )	errno.h
38477	ENOBUFS	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x2a000000 )	errno.h
38478	ENODATA	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2b000000 )	errno.h
38479	ENODEV	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x2c000000 )	errno.h
38480	ENOENT	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x2d000000 )	errno.h
38481	ENOEXEC	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2e000000 )	errno.h
38482	ENOLCK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2f000000 )	errno.h
38483	ENOLINK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x30000000 )	errno.h
38484	ENOMEM	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x31000000 )	errno.h
38485	ENOMSG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x32000000 )	errno.h
38486	ENOPROTOOPT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x33000000 )	errno.h
38487	ENOSPC	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x34000000 )	errno.h
38488	ENOSR	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x35000000 )	errno.h
38489	ENOSTR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x36000000 )	errno.h
38490	ENOSYS	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x37000000 )	errno.h
38491	ENOTCONN	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x38000000 )	errno.h
38492	ENOTDIR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x39000000 )	errno.h
38493	ENOTEMPTY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3a000000 )	errno.h
38494	ENOTSOCK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3b000000 )	errno.h
38495	ENOTSUP	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x3c000000 )	errno.h
38496	ENOTTY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3d000000 )	errno.h
38497	ENXIO	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x3e000000 )	errno.h
38498	EOPNOTSUPP	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x3f000000 )	errno.h
38499	EOVERFLOW	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x40000000 )	errno.h
38500	EPERM	( ERRFILE \| PXENV_STATUS_TFTP_ACCESS_VIOLATION \| 0x41000000 )	errno.h
38501	EPIPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x42000000 )	errno.h
38502	EPROTO	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x43000000 )	errno.h
38503	EPROTONOSUPPORT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x44000000 )	errno.h
38504	EPROTOTYPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x45000000 )	errno.h
38505	ERANGE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x46000000 )	errno.h
38506	EROFS	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x47000000 )	errno.h
38507	ESPIPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x48000000 )	errno.h
38508	ESRCH	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x49000000 )	errno.h
38509	ESTALE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4a000000 )	errno.h
38510	ETIME	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4b000000 )	errno.h
38511	ETIMEDOUT	( ERRFILE \| PXENV_STATUS_TFTP_READ_TIMEOUT \| 0x4c000000 )	errno.h
38512	ETXTBSY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4d000000 )	errno.h
38513	EWOULDBLOCK	( ERRFILE \| PXENV_STATUS_TFTP_OPEN \| 0x4e000000 )	errno.h
38514	EXDEV	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4f000000 )	errno.h
38515	EUNIQ_01	0x00000100	errno.h
38516	EUNIQ_02	0x00000200	errno.h
38517	EUNIQ_03	0x00000300	errno.h
38518	EUNIQ_04	0x00000400	errno.h
38519	EUNIQ_05	0x00000500	errno.h
38520	EUNIQ_06	0x00000600	errno.h
38521	EUNIQ_07	0x00000700	errno.h
38522	EUNIQ_08	0x00000800	errno.h
38523	EUNIQ_09	0x00000900	errno.h
38524	EUNIQ_0A	0x00000a00	errno.h
38525	EUNIQ_0B	0x00000b00	errno.h
38526	EUNIQ_0C	0x00000c00	errno.h
38527	EUNIQ_0D	0x00000d00	errno.h
38528	EUNIQ_0E	0x00000e00	errno.h
38529	EUNIQ_0F	0x00000f00	errno.h
38530	EUNIQ_10	0x00001000	errno.h
38531	EUNIQ_11	0x00001100	errno.h
38532	EUNIQ_12	0x00001200	errno.h
38533	EUNIQ_13	0x00001300	errno.h
38534	EUNIQ_14	0x00001400	errno.h
38535	EUNIQ_15	0x00001500	errno.h
38536	EUNIQ_16	0x00001600	errno.h
38537	EUNIQ_17	0x00001700	errno.h
38538	EUNIQ_18	0x00001800	errno.h
38539	EUNIQ_19	0x00001900	errno.h
38540	EUNIQ_1A	0x00001a00	errno.h
38541	EUNIQ_1B	0x00001b00	errno.h
38542	EUNIQ_1C	0x00001c00	errno.h
38543	EUNIQ_1D	0x00001d00	errno.h
38544	EUNIQ_1E	0x00001e00	errno.h
38545	EUNIQ_1F	0x00001f00	errno.h
38546	VALID_LINK_TIMEOUT	100	etherboot.h	10.0 seconds
38547	DISK_IDE	1	fs.h
38548	DISK_MEM	2	fs.h
38549	DISK_USB	3	fs.h
38550	PARTITION_UNKNOWN	0xbad6a7	fs.h
38551	I365_IDENT	0x00	i82365.h	Identification and revision
38552	I365_STATUS	0x01	i82365.h	Interface status
38553	I365_POWER	0x02	i82365.h	Power and RESETDRV control
38554	I365_INTCTL	0x03	i82365.h	Interrupt and general control
38555	I365_CSC	0x04	i82365.h	Card status change
38556	I365_CSCINT	0x05	i82365.h	Card status change interrupt control
38557	I365_ADDRWIN	0x06	i82365.h	Address window enable
38558	I365_IOCTL	0x07	i82365.h	I/O control
38559	I365_GENCTL	0x16	i82365.h	Card detect and general control
38560	I365_GBLCTL	0x1E	i82365.h	Global control register
38561	I365_W_START	0	i82365.h
38562	I365_W_STOP	2	i82365.h
38563	I365_W_OFF	4	i82365.h
38564	I365_CS_BVD1	0x01	i82365.h
38565	I365_CS_STSCHG	0x01	i82365.h
38566	I365_CS_BVD2	0x02	i82365.h
38567	I365_CS_SPKR	0x02	i82365.h
38568	I365_CS_DETECT	0x0C	i82365.h
38569	I365_CS_WRPROT	0x10	i82365.h
38570	I365_CS_READY	0x20	i82365.h	Inverted
38571	I365_CS_POWERON	0x40	i82365.h
38572	I365_CS_GPI	0x80	i82365.h
38573	I365_PWR_OFF	0x00	i82365.h	Turn off the socket
38574	I365_PWR_OUT	0x80	i82365.h	Output enable
38575	I365_PWR_NORESET	0x40	i82365.h	Disable RESETDRV on resume
38576	I365_PWR_AUTO	0x20	i82365.h	Auto pwr switch enable
38577	I365_VCC_MASK	0x18	i82365.h	Mask for turning off Vcc
38578	I365_VCC_5V	0x10	i82365.h	Vcc = 5.0v
38579	I365_VCC_3V	0x18	i82365.h	Vcc = 3.3v
38580	I365_VPP2_MASK	0x0c	i82365.h	Mask for turning off Vpp2
38581	I365_VPP2_5V	0x04	i82365.h	Vpp2 = 5.0v
38582	I365_VPP2_12V	0x08	i82365.h	Vpp2 = 12.0v
38583	I365_VPP1_MASK	0x03	i82365.h	Mask for turning off Vpp1
38584	I365_VPP1_5V	0x01	i82365.h	Vpp2 = 5.0v
38585	I365_VPP1_12V	0x02	i82365.h	Vpp2 = 12.0v
38586	I365_RING_ENA	0x80	i82365.h
38587	I365_PC_RESET	0x40	i82365.h
38588	I365_PC_IOCARD	0x20	i82365.h
38589	I365_INTR_ENA	0x10	i82365.h
38590	I365_IRQ_MASK	0x0F	i82365.h
38591	I365_CSC_BVD1	0x01	i82365.h
38592	I365_CSC_STSCHG	0x01	i82365.h
38593	I365_CSC_BVD2	0x02	i82365.h
38594	I365_CSC_READY	0x04	i82365.h
38595	I365_CSC_DETECT	0x08	i82365.h
38596	I365_CSC_ANY	0x0F	i82365.h
38597	I365_CSC_GPI	0x10	i82365.h
38598	I365_CTL_16DELAY	0x01	i82365.h
38599	I365_CTL_RESET	0x02	i82365.h
38600	I365_CTL_GPI_ENA	0x04	i82365.h
38601	I365_CTL_GPI_CTL	0x08	i82365.h
38602	I365_CTL_RESUME	0x10	i82365.h
38603	I365_CTL_SW_IRQ	0x20	i82365.h
38604	I365_GBL_PWRDOWN	0x01	i82365.h
38605	I365_GBL_CSC_LEV	0x02	i82365.h
38606	I365_GBL_WRBACK	0x04	i82365.h
38607	I365_GBL_IRQ_0_LEV	0x08	i82365.h
38608	I365_GBL_IRQ_1_LEV	0x10	i82365.h
38609	I365_MEM_16BIT	0x8000	i82365.h	In memory start high byte
38610	I365_MEM_0WS	0x4000	i82365.h
38611	I365_MEM_WS1	0x8000	i82365.h	In memory stop high byte
38612	I365_MEM_WS0	0x4000	i82365.h
38613	I365_MEM_WRPROT	0x8000	i82365.h	In offset high byte
38614	I365_MEM_REG	0x4000	i82365.h
38615	I365_IDENT_VADEM	0x08	i82365.h
38616	VG468_VPP2_MASK	0x0c	i82365.h
38617	VG468_VPP2_5V	0x04	i82365.h
38618	VG468_VPP2_12V	0x08	i82365.h
38619	VG469_VSENSE	0x1f	i82365.h	Card voltage sense
38620	VG469_VSELECT	0x2f	i82365.h	Card voltage select
38621	VG468_CTL	0x38	i82365.h	Control register
38622	VG468_TIMER	0x39	i82365.h	Timer control
38623	VG468_MISC	0x3a	i82365.h	Miscellaneous
38624	VG468_GPIO_CFG	0x3b	i82365.h	GPIO configuration
38625	VG469_EXT_MODE	0x3c	i82365.h	Extended mode register
38626	VG468_SELECT	0x3d	i82365.h	Programmable chip select
38627	VG468_SELECT_CFG	0x3e	i82365.h	Chip select configuration
38628	VG468_ATA	0x3f	i82365.h	ATA control
38629	VG469_VSENSE_A_VS1	0x01	i82365.h
38630	VG469_VSENSE_A_VS2	0x02	i82365.h
38631	VG469_VSENSE_B_VS1	0x04	i82365.h
38632	VG469_VSENSE_B_VS2	0x08	i82365.h
38633	VG469_VSEL_VCC	0x03	i82365.h
38634	VG469_VSEL_5V	0x00	i82365.h
38635	VG469_VSEL_3V	0x03	i82365.h
38636	VG469_VSEL_MAX	0x0c	i82365.h
38637	VG469_VSEL_EXT_STAT	0x10	i82365.h
38638	VG469_VSEL_EXT_BUS	0x20	i82365.h
38639	VG469_VSEL_MIXED	0x40	i82365.h
38640	VG469_VSEL_ISA	0x80	i82365.h
38641	VG468_CTL_SLOW	0x01	i82365.h	600ns memory timing
38642	VG468_CTL_ASYNC	0x02	i82365.h	Asynchronous bus clocking
38643	VG468_CTL_TSSI	0x08	i82365.h	Tri-state some outputs
38644	VG468_CTL_DELAY	0x10	i82365.h	Card detect debounce
38645	VG468_CTL_INPACK	0x20	i82365.h	Obey INPACK signal?
38646	VG468_CTL_POLARITY	0x40	i82365.h	VCCEN polarity
38647	VG468_CTL_COMPAT	0x80	i82365.h	Compatibility stuff
38648	VG469_CTL_WS_COMPAT	0x04	i82365.h	Wait state compatibility
38649	VG469_CTL_STRETCH	0x10	i82365.h	LED stretch
38650	VG468_TIMER_ZEROPWR	0x10	i82365.h	Zero power control
38651	VG468_TIMER_SIGEN	0x20	i82365.h	Power up
38652	VG468_TIMER_STATUS	0x40	i82365.h	Activity timer status
38653	VG468_TIMER_RES	0x80	i82365.h	Timer resolution
38654	VG468_TIMER_MASK	0x0f	i82365.h	Activity timer timeout
38655	VG468_MISC_GPIO	0x04	i82365.h	General-purpose IO
38656	VG468_MISC_DMAWSB	0x08	i82365.h	DMA wait state control
38657	VG469_MISC_LEDENA	0x10	i82365.h	LED enable
38658	VG468_MISC_VADEMREV	0x40	i82365.h	Vadem revision control
38659	VG468_MISC_UNLOCK	0x80	i82365.h	Unique register lock
38660	VG469_MODE_VPPST	0x03	i82365.h	Vpp steering control
38661	VG469_MODE_INT_SENSE	0x04	i82365.h	Internal voltage sense
38662	VG469_MODE_CABLE	0x08	i82365.h
38663	VG469_MODE_COMPAT	0x10	i82365.h	i82365sl B or DF step
38664	VG469_MODE_TEST	0x20	i82365.h
38665	VG469_MODE_RIO	0x40	i82365.h	Steer RIO to INTR?
38666	VG469_MODE_B_3V	0x01	i82365.h	3.3v for socket B
38667	RF5C_MODE_CTL	0x1f	i82365.h	Mode control
38668	RF5C_PWR_CTL	0x2f	i82365.h	Mixed voltage control
38669	RF5C_CHIP_ID	0x3a	i82365.h	Chip identification
38670	RF5C_MODE_CTL_3	0x3b	i82365.h	Mode control 3
38671	RF5C_MODE_ATA	0x01	i82365.h	ATA mode
38672	RF5C_MODE_LED_ENA	0x02	i82365.h	IRQ 12 is LED
38673	RF5C_MODE_CA21	0x04	i82365.h
38674	RF5C_MODE_CA22	0x08	i82365.h
38675	RF5C_MODE_CA23	0x10	i82365.h
38676	RF5C_MODE_CA24	0x20	i82365.h
38677	RF5C_MODE_CA25	0x40	i82365.h
38678	RF5C_MODE_3STATE_BIT7	0x80	i82365.h
38679	RF5C_PWR_VCC_3V	0x01	i82365.h
38680	RF5C_PWR_IREQ_HIGH	0x02	i82365.h
38681	RF5C_PWR_INPACK_ENA	0x04	i82365.h
38682	RF5C_PWR_5V_DET	0x08	i82365.h
38683	RF5C_PWR_TC_SEL	0x10	i82365.h	Terminal Count: irq 11 or 15
38684	RF5C_PWR_DREQ_LOW	0x20	i82365.h
38685	RF5C_PWR_DREQ_OFF	0x00	i82365.h	DREQ steering control
38686	RF5C_PWR_DREQ_INPACK	0x40	i82365.h
38687	RF5C_PWR_DREQ_SPKR	0x80	i82365.h
38688	RF5C_PWR_DREQ_IOIS16	0xc0	i82365.h
38689	RF5C_CHIP_RF5C296	0x32	i82365.h
38690	RF5C_CHIP_RF5C396	0xb2	i82365.h
38691	RF5C_MCTL3_DISABLE	0x01	i82365.h	Disable PCMCIA interface
38692	RF5C_MCTL3_DMA_ENA	0x02	i82365.h
38693	RL5C46X_BCR_3E0_ENA	0x0800	i82365.h
38694	RL5C46X_BCR_3E2_ENA	0x1000	i82365.h
38695	RL5C4XX_CONFIG	0x80	i82365.h	16 bit
38696	RL5C4XX_CONFIG_IO_1_MODE	0x0200	i82365.h
38697	RL5C4XX_CONFIG_IO_0_MODE	0x0100	i82365.h
38698	RL5C4XX_CONFIG_PREFETCH	0x0001	i82365.h
38699	RL5C4XX_MISC	0x0082	i82365.h	16 bit
38700	RL5C4XX_MISC_HW_SUSPEND_ENA	0x0002	i82365.h
38701	RL5C4XX_MISC_VCCEN_POL	0x0100	i82365.h
38702	RL5C4XX_MISC_VPPEN_POL	0x0200	i82365.h
38703	RL5C46X_MISC_SUSPEND	0x0001	i82365.h
38704	RL5C46X_MISC_PWR_SAVE_2	0x0004	i82365.h
38705	RL5C46X_MISC_IFACE_BUSY	0x0008	i82365.h
38706	RL5C46X_MISC_B_LOCK	0x0010	i82365.h
38707	RL5C46X_MISC_A_LOCK	0x0020	i82365.h
38708	RL5C46X_MISC_PCI_LOCK	0x0040	i82365.h
38709	RL5C47X_MISC_IFACE_BUSY	0x0004	i82365.h
38710	RL5C47X_MISC_PCI_INT_MASK	0x0018	i82365.h
38711	RL5C47X_MISC_PCI_INT_DIS	0x0020	i82365.h
38712	RL5C47X_MISC_SUBSYS_WR	0x0040	i82365.h
38713	RL5C47X_MISC_SRIRQ_ENA	0x0080	i82365.h
38714	RL5C47X_MISC_5V_DISABLE	0x0400	i82365.h
38715	RL5C47X_MISC_LED_POL	0x0800	i82365.h
38716	RL5C4XX_16BIT_CTL	0x0084	i82365.h	16 bit
38717	RL5C4XX_16CTL_IO_TIMING	0x0100	i82365.h
38718	RL5C4XX_16CTL_MEM_TIMING	0x0200	i82365.h
38719	RL5C46X_16CTL_LEVEL_1	0x0010	i82365.h
38720	RL5C46X_16CTL_LEVEL_2	0x0020	i82365.h
38721	RL5C4XX_16BIT_IO_0	0x0088	i82365.h	16 bit
38722	RL5C4XX_16BIT_MEM_0	0x0088	i82365.h	16 bit
38723	RL5C4XX_SETUP_MASK	0x0007	i82365.h
38724	RL5C4XX_SETUP_SHIFT	0	i82365.h
38725	RL5C4XX_CMD_MASK	0x01f0	i82365.h
38726	RL5C4XX_CMD_SHIFT	4	i82365.h
38727	RL5C4XX_HOLD_MASK	0x1c00	i82365.h
38728	RL5C4XX_HOLD_SHIFT	10	i82365.h
38729	RL5C4XX_MISC_CONTROL	0x2F	i82365.h	8 bit
38730	RL5C4XX_ZV_ENABLE	0x08	i82365.h
38731	PCI_VENDOR_ID_CIRRUS	0x1013	i82365.h
38732	PCI_DEVICE_ID_CIRRUS_6729	0x1100	i82365.h
38733	PCI_DEVICE_ID_CIRRUS_6832	0x1110	i82365.h
38734	PD67_MISC_CTL_1	0x16	i82365.h	Misc control 1
38735	PD67_FIFO_CTL	0x17	i82365.h	FIFO control
38736	PD67_MISC_CTL_2	0x1E	i82365.h	Misc control 2
38737	PD67_CHIP_INFO	0x1f	i82365.h	Chip information
38738	PD67_ATA_CTL	0x026	i82365.h	6730: ATA control
38739	PD67_EXT_INDEX	0x2e	i82365.h	Extension index
38740	PD67_EXT_DATA	0x2f	i82365.h	Extension data
38741	PD67_DATA_MASK0	0x01	i82365.h	Data mask 0
38742	PD67_DATA_MASK1	0x02	i82365.h	Data mask 1
38743	PD67_DMA_CTL	0x03	i82365.h	DMA control
38744	PD67_EXT_CTL_1	0x03	i82365.h	Extension control 1
38745	PD67_EXTERN_DATA	0x0a	i82365.h
38746	PD67_MISC_CTL_3	0x25	i82365.h
38747	PD67_SMB_PWR_CTL	0x26	i82365.h
38748	PD67_MC1_5V_DET	0x01	i82365.h	5v detect
38749	PD67_MC1_MEDIA_ENA	0x01	i82365.h	6730: Multimedia enable
38750	PD67_MC1_VCC_3V	0x02	i82365.h	3.3v Vcc
38751	PD67_MC1_PULSE_MGMT	0x04	i82365.h
38752	PD67_MC1_PULSE_IRQ	0x08	i82365.h
38753	PD67_MC1_SPKR_ENA	0x10	i82365.h
38754	PD67_MC1_INPACK_ENA	0x80	i82365.h
38755	PD67_FIFO_EMPTY	0x80	i82365.h
38756	PD67_MC2_FREQ_BYPASS	0x01	i82365.h
38757	PD67_MC2_DYNAMIC_MODE	0x02	i82365.h
38758	PD67_MC2_SUSPEND	0x04	i82365.h
38759	PD67_MC2_5V_CORE	0x08	i82365.h
38760	PD67_MC2_LED_ENA	0x10	i82365.h	IRQ 12 is LED enable
38761	PD67_MC2_FAST_PCI	0x10	i82365.h	6729: PCI bus > 25 MHz
38762	PD67_MC2_3STATE_BIT7	0x20	i82365.h	Floppy change bit
38763	PD67_MC2_DMA_MODE	0x40	i82365.h
38764	PD67_MC2_IRQ15_RI	0x80	i82365.h	IRQ 15 is ring enable
38765	PD67_INFO_SLOTS	0x20	i82365.h	0 = 1 slot, 1 = 2 slots
38766	PD67_INFO_CHIP_ID	0xc0	i82365.h
38767	PD67_INFO_REV	0x1c	i82365.h
38768	PD67_TIME_SCALE	0xc0	i82365.h
38769	PD67_TIME_SCALE_1	0x00	i82365.h
38770	PD67_TIME_SCALE_16	0x40	i82365.h
38771	PD67_TIME_SCALE_256	0x80	i82365.h
38772	PD67_TIME_SCALE_4096	0xc0	i82365.h
38773	PD67_TIME_MULT	0x3f	i82365.h
38774	PD67_DMA_MODE	0xc0	i82365.h
38775	PD67_DMA_OFF	0x00	i82365.h
38776	PD67_DMA_DREQ_INPACK	0x40	i82365.h
38777	PD67_DMA_DREQ_WP	0x80	i82365.h
38778	PD67_DMA_DREQ_BVD2	0xc0	i82365.h
38779	PD67_DMA_PULLUP	0x20	i82365.h	Disable socket pullups?
38780	PD67_EC1_VCC_PWR_LOCK	0x01	i82365.h
38781	PD67_EC1_AUTO_PWR_CLEAR	0x02	i82365.h
38782	PD67_EC1_LED_ENA	0x04	i82365.h
38783	PD67_EC1_INV_CARD_IRQ	0x08	i82365.h
38784	PD67_EC1_INV_MGMT_IRQ	0x10	i82365.h
38785	PD67_EC1_PULLUP_CTL	0x20	i82365.h
38786	PD67_MC3_IRQ_MASK	0x03	i82365.h
38787	PD67_MC3_IRQ_PCPCI	0x00	i82365.h
38788	PD67_MC3_IRQ_EXTERN	0x01	i82365.h
38789	PD67_MC3_IRQ_PCIWAY	0x02	i82365.h
38790	PD67_MC3_IRQ_PCI	0x03	i82365.h
38791	PD67_MC3_PWR_MASK	0x0c	i82365.h
38792	PD67_MC3_PWR_SERIAL	0x00	i82365.h
38793	PD67_MC3_PWR_TI2202	0x08	i82365.h
38794	PD67_MC3_PWR_SMB	0x0c	i82365.h
38795	PD68_EXT_CTL_2	0x0b	i82365.h
38796	PD68_PCI_SPACE	0x22	i82365.h
38797	PD68_PCCARD_SPACE	0x23	i82365.h
38798	PD68_WINDOW_TYPE	0x24	i82365.h
38799	PD68_EXT_CSC	0x2e	i82365.h
38800	PD68_MISC_CTL_4	0x2f	i82365.h
38801	PD68_MISC_CTL_5	0x30	i82365.h
38802	PD68_MISC_CTL_6	0x31	i82365.h
38803	PD68_MC3_HW_SUSP	0x10	i82365.h
38804	PD68_MC3_MM_EXPAND	0x40	i82365.h
38805	PD68_MC3_MM_ARM	0x80	i82365.h
38806	PD6832_BCR_MGMT_IRQ_ENA	0x0800	i82365.h
38807	PD6832_SOCKET_NUMBER	0x004c	i82365.h	8 bit
38808	MII_BMCR	0x00	mii.h	Basic mode control register
38809	MII_BMSR	0x01	mii.h	Basic mode status register
38810	MII_PHYSID1	0x02	mii.h	PHYS ID 1
38811	MII_PHYSID2	0x03	mii.h	PHYS ID 2
38812	MII_ADVERTISE	0x04	mii.h	Advertisement control reg
38813	MII_LPA	0x05	mii.h	Link partner ability reg
38814	MII_EXPANSION	0x06	mii.h	Expansion register
38815	MII_CTRL1000	0x09	mii.h	1000BASE-T control
38816	MII_STAT1000	0x0a	mii.h	1000BASE-T status
38817	MII_ESTATUS	0x0f	mii.h	Extended Status
38818	MII_DCOUNTER	0x12	mii.h	Disconnect counter
38819	MII_FCSCOUNTER	0x13	mii.h	False carrier counter
38820	MII_NWAYTEST	0x14	mii.h	N-way auto-neg test reg
38821	MII_RERRCOUNTER	0x15	mii.h	Receive error counter
38822	MII_SREVISION	0x16	mii.h	Silicon revision
38823	MII_RESV1	0x17	mii.h	Reserved...
38824	MII_LBRERROR	0x18	mii.h	Lpback, rx, bypass error
38825	MII_PHYADDR	0x19	mii.h	PHY address
38826	MII_RESV2	0x1a	mii.h	Reserved...
38827	MII_TPISTATUS	0x1b	mii.h	TPI status for 10mbps
38828	MII_NCONFIG	0x1c	mii.h	Network interface config
38829	BMCR_RESV	0x003f	mii.h	Unused...
38830	BMCR_SPEED1000	0x0040	mii.h	MSB of Speed (1000)
38831	BMCR_CTST	0x0080	mii.h	Collision test
38832	BMCR_FULLDPLX	0x0100	mii.h	Full duplex
38833	BMCR_ANRESTART	0x0200	mii.h	Auto negotiation restart
38834	BMCR_ISOLATE	0x0400	mii.h	Disconnect DP83840 from MII
38835	BMCR_PDOWN	0x0800	mii.h	Powerdown the DP83840
38836	BMCR_ANENABLE	0x1000	mii.h	Enable auto negotiation
38837	BMCR_SPEED100	0x2000	mii.h	Select 100Mbps
38838	BMCR_LOOPBACK	0x4000	mii.h	TXD loopback bits
38839	BMCR_RESET	0x8000	mii.h	Reset the DP83840
38840	BMSR_ERCAP	0x0001	mii.h	Ext-reg capability
38841	BMSR_JCD	0x0002	mii.h	Jabber detected
38842	BMSR_LSTATUS	0x0004	mii.h	Link status
38843	BMSR_ANEGCAPABLE	0x0008	mii.h	Able to do auto-negotiation
38844	BMSR_RFAULT	0x0010	mii.h	Remote fault detected
38845	BMSR_ANEGCOMPLETE	0x0020	mii.h	Auto-negotiation complete
38846	BMSR_RESV	0x00c0	mii.h	Unused...
38847	BMSR_ESTATEN	0x0100	mii.h	Extended Status in R15
38848	BMSR_100HALF2	0x0200	mii.h	Can do 100BASE-T2 HDX
38849	BMSR_100FULL2	0x0400	mii.h	Can do 100BASE-T2 FDX
38850	BMSR_10HALF	0x0800	mii.h	Can do 10mbps, half-duplex
38851	BMSR_10FULL	0x1000	mii.h	Can do 10mbps, full-duplex
38852	BMSR_100HALF	0x2000	mii.h	Can do 100mbps, half-duplex
38853	BMSR_100FULL	0x4000	mii.h	Can do 100mbps, full-duplex
38854	BMSR_100BASE4	0x8000	mii.h	Can do 100mbps, 4k packets
38855	ADVERTISE_SLCT	0x001f	mii.h	Selector bits
38856	ADVERTISE_CSMA	0x0001	mii.h	Only selector supported
38857	ADVERTISE_10HALF	0x0020	mii.h	Try for 10mbps half-duplex
38858	ADVERTISE_1000XFULL	0x0020	mii.h	Try for 1000BASE-X full-duplex
38859	ADVERTISE_10FULL	0x0040	mii.h	Try for 10mbps full-duplex
38860	ADVERTISE_1000XHALF	0x0040	mii.h	Try for 1000BASE-X half-duplex
38861	ADVERTISE_100HALF	0x0080	mii.h	Try for 100mbps half-duplex
38862	ADVERTISE_1000XPAUSE	0x0080	mii.h	Try for 1000BASE-X pause
38863	ADVERTISE_100FULL	0x0100	mii.h	Try for 100mbps full-duplex
38864	ADVERTISE_1000XPSE_ASYM	0x0100	mii.h	Try for 1000BASE-X asym pause
38865	ADVERTISE_100BASE4	0x0200	mii.h	Try for 100mbps 4k packets
38866	ADVERTISE_PAUSE_CAP	0x0400	mii.h	Try for pause
38867	ADVERTISE_PAUSE_ASYM	0x0800	mii.h	Try for asymetric pause
38868	ADVERTISE_RESV	0x1000	mii.h	Unused...
38869	ADVERTISE_RFAULT	0x2000	mii.h	Say we can detect faults
38870	ADVERTISE_LPACK	0x4000	mii.h	Ack link partners response
38871	ADVERTISE_NPAGE	0x8000	mii.h	Next page bit
38872	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	mii.h
38873	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	mii.h
38874	LPA_SLCT	0x001f	mii.h	Same as advertise selector
38875	LPA_10HALF	0x0020	mii.h	Can do 10mbps half-duplex
38876	LPA_1000XFULL	0x0020	mii.h	Can do 1000BASE-X full-duplex
38877	LPA_10FULL	0x0040	mii.h	Can do 10mbps full-duplex
38878	LPA_1000XHALF	0x0040	mii.h	Can do 1000BASE-X half-duplex
38879	LPA_100HALF	0x0080	mii.h	Can do 100mbps half-duplex
38880	LPA_1000XPAUSE	0x0080	mii.h	Can do 1000BASE-X pause
38881	LPA_100FULL	0x0100	mii.h	Can do 100mbps full-duplex
38882	LPA_1000XPAUSE_ASYM	0x0100	mii.h	Can do 1000BASE-X pause asym
38883	LPA_100BASE4	0x0200	mii.h	Can do 100mbps 4k packets
38884	LPA_PAUSE_CAP	0x0400	mii.h	Can pause
38885	LPA_PAUSE_ASYM	0x0800	mii.h	Can pause asymetrically
38886	LPA_RESV	0x1000	mii.h	Unused...
38887	LPA_RFAULT	0x2000	mii.h	Link partner faulted
38888	LPA_LPACK	0x4000	mii.h	Link partner acked us
38889	LPA_NPAGE	0x8000	mii.h	Next page bit
38890	LPA_DUPLEX	(LPA_10FULL \| LPA_100FULL)	mii.h
38891	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	mii.h
38892	EXPANSION_NWAY	0x0001	mii.h	Can do N-way auto-nego
38893	EXPANSION_LCWP	0x0002	mii.h	Got new RX page code word
38894	EXPANSION_ENABLENPAGE	0x0004	mii.h	This enables npage words
38895	EXPANSION_NPCAPABLE	0x0008	mii.h	Link partner supports npage
38896	EXPANSION_MFAULTS	0x0010	mii.h	Multiple faults detected
38897	EXPANSION_RESV	0xffe0	mii.h	Unused...
38898	ESTATUS_1000_TFULL	0x2000	mii.h	Can do 1000BT Full
38899	ESTATUS_1000_THALF	0x1000	mii.h	Can do 1000BT Half
38900	NWAYTEST_RESV1	0x00ff	mii.h	Unused...
38901	NWAYTEST_LOOPBACK	0x0100	mii.h	Enable loopback for N-way
38902	NWAYTEST_RESV2	0xfe00	mii.h	Unused...
38903	ADVERTISE_1000FULL	0x0200	mii.h	Advertise 1000BASE-T full duplex
38904	ADVERTISE_1000HALF	0x0100	mii.h	Advertise 1000BASE-T half duplex
38905	LPA_1000LOCALRXOK	0x2000	mii.h	Link partner local receiver status
38906	LPA_1000REMRXOK	0x1000	mii.h	Link partner remote receiver status
38907	LPA_1000FULL	0x0800	mii.h	Link partner 1000BASE-T full duplex
38908	LPA_1000HALF	0x0400	mii.h	Link partner 1000BASE-T half duplex
38909	TCP_INITIAL_TIMEOUT	(3*TICKS_PER_SEC)	old_tcp.h
38910	TCP_MAX_TIMEOUT	(60*TICKS_PER_SEC)	old_tcp.h
38911	TCP_MIN_TIMEOUT	(TICKS_PER_SEC)	old_tcp.h
38912	TCP_MAX_RETRY	10	old_tcp.h
38913	TCP_MAX_HEADER	((int)sizeof(struct iphdr)+64)	old_tcp.h
38914	TCP_MIN_WINDOW	(1500-TCP_MAX_HEADER)	old_tcp.h
38915	TCP_MAX_WINDOW	(65535-TCP_MAX_HEADER)	old_tcp.h
38916	FIN	1	old_tcp.h
38917	SYN	2	old_tcp.h
38918	RST	4	old_tcp.h
38919	PSH	8	old_tcp.h
38920	ACK	16	old_tcp.h
38921	URG	32	old_tcp.h
38922	_yes_	1	pcmcia-opts.h
38923	_no_	0	pcmcia-opts.h
38924	SUPPORT_I82365	(_yes_)	pcmcia-opts.h
38925	PCMCIA_SHUTDOWN	(_yes_)	pcmcia-opts.h
38926	MAP_ATTRMEM_TO	0xd0000	pcmcia-opts.h
38927	MAP_ATTRMEM_LEN	0x02000	pcmcia-opts.h
38928	PDEBUG	3	pcmcia-opts.h
38929	MAXPCCSOCKS	8	pcmcia.h
38930	MAXPCCCONFIGS	8	pcmcia.h
38931	EINVAL	22	pcmcia.h
38932	SS_WRPROT	0x0001	pcmcia.h
38933	SS_CARDLOCK	0x0002	pcmcia.h
38934	SS_EJECTION	0x0004	pcmcia.h
38935	SS_INSERTION	0x0008	pcmcia.h
38936	SS_BATDEAD	0x0010	pcmcia.h
38937	SS_BATWARN	0x0020	pcmcia.h
38938	SS_READY	0x0040	pcmcia.h
38939	SS_DETECT	0x0080	pcmcia.h
38940	SS_POWERON	0x0100	pcmcia.h
38941	SS_GPI	0x0200	pcmcia.h
38942	SS_STSCHG	0x0400	pcmcia.h
38943	SS_CARDBUS	0x0800	pcmcia.h
38944	SS_3VCARD	0x1000	pcmcia.h
38945	SS_XVCARD	0x2000	pcmcia.h
38946	SS_PENDING	0x4000	pcmcia.h
38947	SS_CAP_PAGE_REGS	0x0001	pcmcia.h
38948	SS_CAP_VIRTUAL_BUS	0x0002	pcmcia.h
38949	SS_CAP_MEM_ALIGN	0x0004	pcmcia.h
38950	SS_CAP_STATIC_MAP	0x0008	pcmcia.h
38951	SS_CAP_PCCARD	0x4000	pcmcia.h
38952	SS_CAP_CARDBUS	0x8000	pcmcia.h
38953	SS_PWR_AUTO	0x0010	pcmcia.h
38954	SS_IOCARD	0x0020	pcmcia.h
38955	SS_RESET	0x0040	pcmcia.h
38956	SS_DMA_MODE	0x0080	pcmcia.h
38957	SS_SPKR_ENA	0x0100	pcmcia.h
38958	SS_OUTPUT_ENA	0x0200	pcmcia.h
38959	SS_DEBOUNCED	0x0400	pcmcia.h	Tell driver that the debounce delay has ended
38960	SS_ZVCARD	0x0800	pcmcia.h
38961	MAP_ACTIVE	0x01	pcmcia.h
38962	MAP_16BIT	0x02	pcmcia.h
38963	MAP_AUTOSZ	0x04	pcmcia.h
38964	MAP_0WS	0x08	pcmcia.h
38965	MAP_WRPROT	0x10	pcmcia.h
38966	MAP_ATTRIB	0x20	pcmcia.h
38967	MAP_USE_WAIT	0x40	pcmcia.h
38968	MAP_PREFETCH	0x80	pcmcia.h
38969	MAP_IOSPACE	0x20	pcmcia.h
38970	NULL	((void *)0)	stddef.h
38971	__WCHAR_TYPE__	long int	stddef.h
38972	__SIZE_TYPE__	unsigned long	stdint.h	safe choice on most systems
38973	AES_BLOCKSIZE	16	aes.h
38974	AES_CTX_SIZE	sizeof ( struct aes_context )	aes.h
38975	ANSIESC_MAX_PARAMS	4	ansiesc.h
38976	ESC	0x1b	ansiesc.h
38977	CSI	"\033["	ansiesc.h
38978	ANSIESC_CUP	'H'	ansiesc.h
38979	ANSIESC_ED	'J'	ansiesc.h
38980	ANSIESC_ED_TO_END	0	ansiesc.h
38981	ANSIESC_ED_FROM_START	1	ansiesc.h
38982	ANSIESC_ED_ALL	2	ansiesc.h
38983	ANSIESC_SGR	'm'	ansiesc.h
38984	AOE_FL_EXTENDED	0x40	aoe.h	*< LBA48 extended addressing
38985	AOE_FL_DEV_HEAD	0x10	aoe.h	*< Device/head flag
38986	AOE_FL_ASYNC	0x02	aoe.h	*< Asynchronous write
38987	AOE_FL_WRITE	0x01	aoe.h	*< Write command
38988	AOE_VERSION	0x10	aoe.h	*< Version 1
38989	AOE_VERSION_MASK	0xf0	aoe.h	*< Version part of ver_flags field
38990	AOE_FL_RESPONSE	0x08	aoe.h	*< Message is a response
38991	AOE_FL_ERROR	0x04	aoe.h	*< Command generated an error
38992	AOE_MAJOR_BROADCAST	0xffff	aoe.h
38993	AOE_MINOR_BROADCAST	0xff	aoe.h
38994	AOE_CMD_ATA	0x00	aoe.h	*< Issue ATA command
38995	AOE_CMD_CONFIG	0x01	aoe.h	*< Query Config Information
38996	AOE_TAG_MAGIC	0xebeb0000	aoe.h
38997	AOE_ERR_BAD_COMMAND	1	aoe.h	*< Unrecognised command code
38998	AOE_ERR_BAD_PARAMETER	2	aoe.h	*< Bad argument parameter
38999	AOE_ERR_UNAVAILABLE	3	aoe.h	*< Device unavailable
39000	AOE_ERR_CONFIG_EXISTS	4	aoe.h	*< Config string present
39001	AOE_ERR_BAD_VERSION	5	aoe.h	*< Unsupported version
39002	AOE_STATUS_ERR_MASK	0x0f	aoe.h	*< Error portion of status code
39003	AOE_STATUS_PENDING	0x80	aoe.h	*< Command pending
39004	AOE_MAX_COUNT	2	aoe.h
39005	ARC4_CTX_SIZE	sizeof ( struct arc4_ctx )	arc4.h
39006	ARP_NET_PROTOCOLS	__table ( struct arp_net_protocol, "arp_net_protocols" )	arp.h
39007	__arp_net_protocol	__table_entry ( ARP_NET_PROTOCOLS, 01 )	arp.h
39008	ASN1_INTEGER	0x02	asn1.h
39009	ASN1_BIT_STRING	0x03	asn1.h
39010	ASN1_OCTET_STRING	0x04	asn1.h
39011	ASN1_NULL	0x05	asn1.h
39012	ASN1_OID	0x06	asn1.h
39013	ASN1_SEQUENCE	0x30	asn1.h
39014	ASN1_IP_ADDRESS	0x40	asn1.h
39015	ASN1_EXPLICIT_TAG	0xa0	asn1.h
39016	ATA_DEV_OBSOLETE	0xa0	ata.h
39017	ATA_DEV_LBA	0x40	ata.h
39018	ATA_DEV_SLAVE	0x10	ata.h
39019	ATA_DEV_MASTER	0x00	ata.h
39020	ATA_DEV_MASK	0xf0	ata.h
39021	ATA_CMD_READ	0x20	ata.h
39022	ATA_CMD_READ_EXT	0x24	ata.h
39023	ATA_CMD_WRITE	0x30	ata.h
39024	ATA_CMD_WRITE_EXT	0x34	ata.h
39025	ATA_CMD_IDENTIFY	0xec	ata.h
39026	ATA_SUPPORTS_LBA48	( 1 << 10 )	ata.h
39027	ATA_SECTOR_SIZE	512	ata.h
39028	BITMAP_BLKSIZE	( sizeof ( bitmap_block_t ) * 8 )	bitmap.h
39029	cpu_to_BIT64	cpu_to_le64	bitops.h
39030	cpu_to_BIT32	cpu_to_le32	bitops.h
39031	BIT64_to_cpu	le64_to_cpu	bitops.h
39032	BIT32_to_cpu	le32_to_cpu	bitops.h
39033	cpu_to_BIT64	cpu_to_be64	bitops.h
39034	cpu_to_BIT32	cpu_to_be32	bitops.h
39035	BIT64_to_cpu	be64_to_cpu	bitops.h
39036	BIT32_to_cpu	be32_to_cpu	bitops.h
39037	COMMANDS	__table ( struct command, "commands" )	command.h
39038	__command	__table_entry ( COMMANDS, 01 )	command.h
39039	CPIO_MAGIC	"070701"	cpio.h
39040	BUS_TYPE_PCI	1	device.h
39041	BUS_TYPE_ISAPNP	2	device.h
39042	BUS_TYPE_EISA	3	device.h
39043	BUS_TYPE_MCA	4	device.h
39044	BUS_TYPE_ISA	5	device.h
39045	ROOT_DEVICES	__table ( struct root_device, "root_devices" )	device.h
39046	__root_device	__table_entry ( ROOT_DEVICES, 01 )	device.h
39047	BOOTPS_PORT	67	dhcp.h
39048	BOOTPC_PORT	68	dhcp.h
39049	PXE_PORT	4011	dhcp.h
39050	DHCP_PAD	0	dhcp.h
39051	DHCP_MIN_OPTION	1	dhcp.h
39052	DHCP_SUBNET_MASK	1	dhcp.h
39053	DHCP_ROUTERS	3	dhcp.h
39054	DHCP_DNS_SERVERS	6	dhcp.h
39055	DHCP_LOG_SERVERS	7	dhcp.h
39056	DHCP_HOST_NAME	12	dhcp.h
39057	DHCP_DOMAIN_NAME	15	dhcp.h
39058	DHCP_ROOT_PATH	17	dhcp.h
39059	DHCP_VENDOR_ENCAP	43	dhcp.h
39060	DHCP_PXE_DISCOVERY_CONTROL	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 6 )	dhcp.h
39061	DHCP_PXE_BOOT_SERVER_MCAST	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 7 )	dhcp.h
39062	DHCP_PXE_BOOT_SERVERS	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 8 )	dhcp.h
39063	DHCP_PXE_BOOT_MENU	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 9 )	dhcp.h
39064	DHCP_PXE_BOOT_MENU_PROMPT	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 10 )	dhcp.h
39065	DHCP_PXE_BOOT_MENU_ITEM	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 71 )	dhcp.h
39066	DHCP_REQUESTED_ADDRESS	50	dhcp.h
39067	DHCP_LEASE_TIME	51	dhcp.h
39068	DHCP_OPTION_OVERLOAD	52	dhcp.h
39069	DHCP_OPTION_OVERLOAD_FILE	1	dhcp.h
39070	DHCP_OPTION_OVERLOAD_SNAME	2	dhcp.h
39071	DHCP_MESSAGE_TYPE	53	dhcp.h
39072	DHCPNONE	0	dhcp.h
39073	DHCPDISCOVER	1	dhcp.h
39074	DHCPOFFER	2	dhcp.h
39075	DHCPREQUEST	3	dhcp.h
39076	DHCPDECLINE	4	dhcp.h
39077	DHCPACK	5	dhcp.h
39078	DHCPNAK	6	dhcp.h
39079	DHCPRELEASE	7	dhcp.h
39080	DHCPINFORM	8	dhcp.h
39081	DHCP_SERVER_IDENTIFIER	54	dhcp.h
39082	DHCP_PARAMETER_REQUEST_LIST	55	dhcp.h
39083	DHCP_MAX_MESSAGE_SIZE	57	dhcp.h
39084	DHCP_VENDOR_CLASS_ID	60	dhcp.h
39085	DHCP_CLIENT_ID	61	dhcp.h
39086	DHCP_TFTP_SERVER_NAME	66	dhcp.h
39087	DHCP_BOOTFILE_NAME	67	dhcp.h
39088	DHCP_USER_CLASS_ID	77	dhcp.h
39089	DHCP_CLIENT_ARCHITECTURE	93	dhcp.h
39090	DHCP_CLIENT_NDI	94	dhcp.h
39091	DHCP_CLIENT_UUID	97	dhcp.h
39092	DHCP_CLIENT_UUID_TYPE	0	dhcp.h
39093	DHCP_EB_ENCAP	175	dhcp.h
39094	DHCP_EB_PRIORITY	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x01 )	dhcp.h
39095	DHCP_EB_YIADDR	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x02 )	dhcp.h
39096	DHCP_EB_SIADDR	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x03 )	dhcp.h
39097	DHCP_EB_KEEP_SAN	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x08 )	dhcp.h
39098	DHCP_EB_NO_PXEDHCP	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb0 )	dhcp.h
39099	DHCP_EB_BUS_ID	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb1 )	dhcp.h
39100	DHCP_EB_USE_CACHED	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb2 )	dhcp.h
39101	DHCP_EB_BIOS_DRIVE	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbd )	dhcp.h
39102	DHCP_EB_USERNAME	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbe )	dhcp.h
39103	DHCP_EB_PASSWORD	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbf )	dhcp.h
39104	DHCP_EB_REVERSE_USERNAME	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc0 )	dhcp.h
39105	DHCP_EB_REVERSE_PASSWORD	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc1 )	dhcp.h
39106	DHCP_EB_VERSION	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xeb )	dhcp.h
39107	DHCP_ISCSI_PRIMARY_TARGET_IQN	201	dhcp.h
39108	DHCP_ISCSI_SECONDARY_TARGET_IQN	202	dhcp.h
39109	DHCP_ISCSI_INITIATOR_IQN	203	dhcp.h
39110	DHCP_MAX_OPTION	254	dhcp.h
39111	DHCP_END	255	dhcp.h
39112	DHCP_OPTION_HEADER_LEN	( offsetof ( struct dhcp_option, data ) )	dhcp.h
39113	DHCP_MAX_LEN	0xff	dhcp.h
39114	BOOTP_REQUEST	1	dhcp.h
39115	BOOTP_REPLY	2	dhcp.h
39116	BOOTP_FL_BROADCAST	0x8000	dhcp.h
39117	DHCP_MAGIC_COOKIE	0x63825363UL	dhcp.h
39118	DHCP_MIN_LEN	552	dhcp.h
39119	DHCP_MIN_TIMEOUT	( 1 * TICKS_PER_SEC )	dhcp.h
39120	DHCP_MAX_TIMEOUT	( 10 * TICKS_PER_SEC )	dhcp.h
39121	PROXYDHCP_MAX_TIMEOUT	( 2 * TICKS_PER_SEC )	dhcp.h
39122	PXEBS_MAX_TIMEOUT	( 3 * TICKS_PER_SEC )	dhcp.h
39123	DHCP_SETTINGS_NAME	"dhcp"	dhcp.h
39124	PROXYDHCP_SETTINGS_NAME	"proxydhcp"	dhcp.h
39125	PXEBS_SETTINGS_NAME	"pxebs"	dhcp.h
39126	DNS_TYPE_A	1	dns.h
39127	DNS_TYPE_CNAME	5	dns.h
39128	DNS_TYPE_ANY	255	dns.h
39129	DNS_CLASS_IN	1	dns.h
39130	DNS_CLASS_CS	2	dns.h
39131	DNS_CLASS_CH	3	dns.h
39132	DNS_CLASS_HS	4	dns.h
39133	DNS_FLAG_QUERY	( 0x00 << 15 )	dns.h
39134	DNS_FLAG_RESPONSE	( 0x01 << 15 )	dns.h
39135	DNS_FLAG_OPCODE_QUERY	( 0x00 << 11 )	dns.h
39136	DNS_FLAG_OPCODE_IQUERY	( 0x01 << 11 )	dns.h
39137	DNS_FLAG_OPCODE_STATUS	( 0x02 << 11 )	dns.h
39138	DNS_FLAG_RD	( 0x01 << 8 )	dns.h
39139	DNS_FLAG_RA	( 0x01 << 7 )	dns.h
39140	DNS_FLAG_RCODE_OK	( 0x00 << 0 )	dns.h
39141	DNS_FLAG_RCODE_NX	( 0x03 << 0 )	dns.h
39142	DNS_PORT	53	dns.h
39143	DNS_MAX_RETRIES	3	dns.h
39144	DNS_MAX_CNAME_RECURSION	0x30	dns.h
39145	EAPOL_TYPE_EAP	0	eapol.h	*< EAP authentication handshake packet
39146	EAPOL_TYPE_START	1	eapol.h	*< Request by Peer to begin (no data)
39147	EAPOL_TYPE_LOGOFF	2	eapol.h	*< Request by Peer to terminate (no data)
39148	EAPOL_TYPE_KEY	3	eapol.h	*< EAPOL-Key packet
39149	EAPOL_THIS_VERSION	1	eapol.h
39150	EAPOL_HDR_LEN	4	eapol.h
39151	EAPOL_HANDLERS	__table ( struct eapol_handler, "eapol_handlers" )	eapol.h
39152	__eapol_handler	__table_entry ( EAPOL_HANDLERS, 01 )	eapol.h
39153	EISA_MIN_SLOT	(0x1)	eisa.h
39154	EISA_MAX_SLOT	(0xf)	eisa.h	Must be 2^n - 1
39155	EISA_VENDOR_ID	( 0xc80 )	eisa.h
39156	EISA_PROD_ID	( 0xc82 )	eisa.h
39157	EISA_GLOBAL_CONFIG	( 0xc84 )	eisa.h
39158	EISA_CMD_RESET	( 1 << 2 )	eisa.h
39159	EISA_CMD_ENABLE	( 1 << 0 )	eisa.h
39160	EISA_DRIVERS	__table ( struct eisa_driver, "eisa_drivers" )	eisa.h
39161	__eisa_driver	__table_entry ( EISA_DRIVERS, 01 )	eisa.h
39162	ERRFILE_CORE	0x00002000	errfile.h	*< Core code
39163	ERRFILE_DRIVER	0x00004000	errfile.h	*< Driver code
39164	ERRFILE_NET	0x00006000	errfile.h	*< Networking code
39165	ERRFILE_IMAGE	0x00008000	errfile.h	*< Image code
39166	ERRFILE_OTHER	0x0000e000	errfile.h	*< Any other code
39167	ERRFILE_ARCH	0x00800000	errfile.h
39168	ERRFILE_asprintf	( ERRFILE_CORE \| 0x00000000 )	errfile.h
39169	ERRFILE_downloader	( ERRFILE_CORE \| 0x00010000 )	errfile.h
39170	ERRFILE_exec	( ERRFILE_CORE \| 0x00020000 )	errfile.h
39171	ERRFILE_hw	( ERRFILE_CORE \| 0x00030000 )	errfile.h
39172	ERRFILE_iobuf	( ERRFILE_CORE \| 0x00040000 )	errfile.h
39173	ERRFILE_job	( ERRFILE_CORE \| 0x00050000 )	errfile.h
39174	ERRFILE_linebuf	( ERRFILE_CORE \| 0x00060000 )	errfile.h
39175	ERRFILE_monojob	( ERRFILE_CORE \| 0x00070000 )	errfile.h
39176	ERRFILE_nvo	( ERRFILE_CORE \| 0x00080000 )	errfile.h
39177	ERRFILE_open	( ERRFILE_CORE \| 0x00090000 )	errfile.h
39178	ERRFILE_posix_io	( ERRFILE_CORE \| 0x000a0000 )	errfile.h
39179	ERRFILE_resolv	( ERRFILE_CORE \| 0x000b0000 )	errfile.h
39180	ERRFILE_settings	( ERRFILE_CORE \| 0x000c0000 )	errfile.h
39181	ERRFILE_vsprintf	( ERRFILE_CORE \| 0x000d0000 )	errfile.h
39182	ERRFILE_xfer	( ERRFILE_CORE \| 0x000e0000 )	errfile.h
39183	ERRFILE_bitmap	( ERRFILE_CORE \| 0x000f0000 )	errfile.h
39184	ERRFILE_eisa	( ERRFILE_DRIVER \| 0x00000000 )	errfile.h
39185	ERRFILE_isa	( ERRFILE_DRIVER \| 0x00010000 )	errfile.h
39186	ERRFILE_isapnp	( ERRFILE_DRIVER \| 0x00020000 )	errfile.h
39187	ERRFILE_mca	( ERRFILE_DRIVER \| 0x00030000 )	errfile.h
39188	ERRFILE_pci	( ERRFILE_DRIVER \| 0x00040000 )	errfile.h
39189	ERRFILE_nvs	( ERRFILE_DRIVER \| 0x00100000 )	errfile.h
39190	ERRFILE_spi	( ERRFILE_DRIVER \| 0x00110000 )	errfile.h
39191	ERRFILE_i2c_bit	( ERRFILE_DRIVER \| 0x00120000 )	errfile.h
39192	ERRFILE_spi_bit	( ERRFILE_DRIVER \| 0x00130000 )	errfile.h
39193	ERRFILE_3c509	( ERRFILE_DRIVER \| 0x00200000 )	errfile.h
39194	ERRFILE_bnx2	( ERRFILE_DRIVER \| 0x00210000 )	errfile.h
39195	ERRFILE_cs89x0	( ERRFILE_DRIVER \| 0x00220000 )	errfile.h
39196	ERRFILE_eepro	( ERRFILE_DRIVER \| 0x00230000 )	errfile.h
39197	ERRFILE_etherfabric	( ERRFILE_DRIVER \| 0x00240000 )	errfile.h
39198	ERRFILE_legacy	( ERRFILE_DRIVER \| 0x00250000 )	errfile.h
39199	ERRFILE_natsemi	( ERRFILE_DRIVER \| 0x00260000 )	errfile.h
39200	ERRFILE_pnic	( ERRFILE_DRIVER \| 0x00270000 )	errfile.h
39201	ERRFILE_prism2_pci	( ERRFILE_DRIVER \| 0x00280000 )	errfile.h
39202	ERRFILE_prism2_plx	( ERRFILE_DRIVER \| 0x00290000 )	errfile.h
39203	ERRFILE_rtl8139	( ERRFILE_DRIVER \| 0x002a0000 )	errfile.h
39204	ERRFILE_smc9000	( ERRFILE_DRIVER \| 0x002b0000 )	errfile.h
39205	ERRFILE_tg3	( ERRFILE_DRIVER \| 0x002c0000 )	errfile.h
39206	ERRFILE_3c509_eisa	( ERRFILE_DRIVER \| 0x002d0000 )	errfile.h
39207	ERRFILE_3c515	( ERRFILE_DRIVER \| 0x002e0000 )	errfile.h
39208	ERRFILE_3c529	( ERRFILE_DRIVER \| 0x002f0000 )	errfile.h
39209	ERRFILE_3c595	( ERRFILE_DRIVER \| 0x00300000 )	errfile.h
39210	ERRFILE_3c5x9	( ERRFILE_DRIVER \| 0x00310000 )	errfile.h
39211	ERRFILE_3c90x	( ERRFILE_DRIVER \| 0x00320000 )	errfile.h
39212	ERRFILE_amd8111e	( ERRFILE_DRIVER \| 0x00330000 )	errfile.h
39213	ERRFILE_davicom	( ERRFILE_DRIVER \| 0x00340000 )	errfile.h
39214	ERRFILE_depca	( ERRFILE_DRIVER \| 0x00350000 )	errfile.h
39215	ERRFILE_dmfe	( ERRFILE_DRIVER \| 0x00360000 )	errfile.h
39216	ERRFILE_eepro100	( ERRFILE_DRIVER \| 0x00380000 )	errfile.h
39217	ERRFILE_epic100	( ERRFILE_DRIVER \| 0x00390000 )	errfile.h
39218	ERRFILE_forcedeth	( ERRFILE_DRIVER \| 0x003a0000 )	errfile.h
39219	ERRFILE_mtd80x	( ERRFILE_DRIVER \| 0x003b0000 )	errfile.h
39220	ERRFILE_ns83820	( ERRFILE_DRIVER \| 0x003c0000 )	errfile.h
39221	ERRFILE_ns8390	( ERRFILE_DRIVER \| 0x003d0000 )	errfile.h
39222	ERRFILE_pcnet32	( ERRFILE_DRIVER \| 0x003e0000 )	errfile.h
39223	ERRFILE_r8169	( ERRFILE_DRIVER \| 0x003f0000 )	errfile.h
39224	ERRFILE_sis900	( ERRFILE_DRIVER \| 0x00400000 )	errfile.h
39225	ERRFILE_sundance	( ERRFILE_DRIVER \| 0x00410000 )	errfile.h
39226	ERRFILE_tlan	( ERRFILE_DRIVER \| 0x00420000 )	errfile.h
39227	ERRFILE_tulip	( ERRFILE_DRIVER \| 0x00430000 )	errfile.h
39228	ERRFILE_via_rhine	( ERRFILE_DRIVER \| 0x00440000 )	errfile.h
39229	ERRFILE_via_velocity	( ERRFILE_DRIVER \| 0x00450000 )	errfile.h
39230	ERRFILE_w89c840	( ERRFILE_DRIVER \| 0x00460000 )	errfile.h
39231	ERRFILE_ipoib	( ERRFILE_DRIVER \| 0x00470000 )	errfile.h
39232	ERRFILE_e1000	( ERRFILE_DRIVER \| 0x00480000 )	errfile.h
39233	ERRFILE_e1000_hw	( ERRFILE_DRIVER \| 0x00490000 )	errfile.h
39234	ERRFILE_mtnic	( ERRFILE_DRIVER \| 0x004a0000 )	errfile.h
39235	ERRFILE_phantom	( ERRFILE_DRIVER \| 0x004b0000 )	errfile.h
39236	ERRFILE_ne2k_isa	( ERRFILE_DRIVER \| 0x004c0000 )	errfile.h
39237	ERRFILE_b44	( ERRFILE_DRIVER \| 0x004d0000 )	errfile.h
39238	ERRFILE_rtl818x	( ERRFILE_DRIVER \| 0x004e0000 )	errfile.h
39239	ERRFILE_sky2	( ERRFILE_DRIVER \| 0x004f0000 )	errfile.h
39240	ERRFILE_ath5k	( ERRFILE_DRIVER \| 0x00500000 )	errfile.h
39241	ERRFILE_atl1e	( ERRFILE_DRIVER \| 0x00510000 )	errfile.h
39242	ERRFILE_sis190	( ERRFILE_DRIVER \| 0x00520000 )	errfile.h
39243	ERRFILE_myri10ge	( ERRFILE_DRIVER \| 0x00530000 )	errfile.h
39244	ERRFILE_skge	( ERRFILE_DRIVER \| 0x00540000 )	errfile.h
39245	ERRFILE_scsi	( ERRFILE_DRIVER \| 0x00700000 )	errfile.h
39246	ERRFILE_arbel	( ERRFILE_DRIVER \| 0x00710000 )	errfile.h
39247	ERRFILE_hermon	( ERRFILE_DRIVER \| 0x00720000 )	errfile.h
39248	ERRFILE_linda	( ERRFILE_DRIVER \| 0x00730000 )	errfile.h
39249	ERRFILE_ata	( ERRFILE_DRIVER \| 0x00740000 )	errfile.h
39250	ERRFILE_srp	( ERRFILE_DRIVER \| 0x00750000 )	errfile.h
39251	ERRFILE_aoe	( ERRFILE_NET \| 0x00000000 )	errfile.h
39252	ERRFILE_arp	( ERRFILE_NET \| 0x00010000 )	errfile.h
39253	ERRFILE_dhcpopts	( ERRFILE_NET \| 0x00020000 )	errfile.h
39254	ERRFILE_ethernet	( ERRFILE_NET \| 0x00030000 )	errfile.h
39255	ERRFILE_icmpv6	( ERRFILE_NET \| 0x00040000 )	errfile.h
39256	ERRFILE_ipv4	( ERRFILE_NET \| 0x00050000 )	errfile.h
39257	ERRFILE_ipv6	( ERRFILE_NET \| 0x00060000 )	errfile.h
39258	ERRFILE_ndp	( ERRFILE_NET \| 0x00070000 )	errfile.h
39259	ERRFILE_netdevice	( ERRFILE_NET \| 0x00080000 )	errfile.h
39260	ERRFILE_nullnet	( ERRFILE_NET \| 0x00090000 )	errfile.h
39261	ERRFILE_tcp	( ERRFILE_NET \| 0x000a0000 )	errfile.h
39262	ERRFILE_ftp	( ERRFILE_NET \| 0x000b0000 )	errfile.h
39263	ERRFILE_http	( ERRFILE_NET \| 0x000c0000 )	errfile.h
39264	ERRFILE_iscsi	( ERRFILE_NET \| 0x000d0000 )	errfile.h
39265	ERRFILE_tcpip	( ERRFILE_NET \| 0x000e0000 )	errfile.h
39266	ERRFILE_udp	( ERRFILE_NET \| 0x000f0000 )	errfile.h
39267	ERRFILE_dhcp	( ERRFILE_NET \| 0x00100000 )	errfile.h
39268	ERRFILE_dns	( ERRFILE_NET \| 0x00110000 )	errfile.h
39269	ERRFILE_tftp	( ERRFILE_NET \| 0x00120000 )	errfile.h
39270	ERRFILE_infiniband	( ERRFILE_NET \| 0x00130000 )	errfile.h
39271	ERRFILE_netdev_settings	( ERRFILE_NET \| 0x00140000 )	errfile.h
39272	ERRFILE_dhcppkt	( ERRFILE_NET \| 0x00150000 )	errfile.h
39273	ERRFILE_slam	( ERRFILE_NET \| 0x00160000 )	errfile.h
39274	ERRFILE_ib_sma	( ERRFILE_NET \| 0x00170000 )	errfile.h
39275	ERRFILE_ib_packet	( ERRFILE_NET \| 0x00180000 )	errfile.h
39276	ERRFILE_icmp	( ERRFILE_NET \| 0x00190000 )	errfile.h
39277	ERRFILE_ib_qset	( ERRFILE_NET \| 0x001a0000 )	errfile.h
39278	ERRFILE_ib_gma	( ERRFILE_NET \| 0x001b0000 )	errfile.h
39279	ERRFILE_ib_pathrec	( ERRFILE_NET \| 0x001c0000 )	errfile.h
39280	ERRFILE_ib_mcast	( ERRFILE_NET \| 0x001d0000 )	errfile.h
39281	ERRFILE_ib_cm	( ERRFILE_NET \| 0x001e0000 )	errfile.h
39282	ERRFILE_net80211	( ERRFILE_NET \| 0x001f0000 )	errfile.h
39283	ERRFILE_ib_mi	( ERRFILE_NET \| 0x00200000 )	errfile.h
39284	ERRFILE_ib_cmrc	( ERRFILE_NET \| 0x00210000 )	errfile.h
39285	ERRFILE_ib_srp	( ERRFILE_NET \| 0x00220000 )	errfile.h
39286	ERRFILE_sec80211	( ERRFILE_NET \| 0x00230000 )	errfile.h
39287	ERRFILE_wep	( ERRFILE_NET \| 0x00240000 )	errfile.h
39288	ERRFILE_eapol	( ERRFILE_NET \| 0x00250000 )	errfile.h
39289	ERRFILE_wpa	( ERRFILE_NET \| 0x00260000 )	errfile.h
39290	ERRFILE_wpa_psk	( ERRFILE_NET \| 0x00270000 )	errfile.h
39291	ERRFILE_wpa_tkip	( ERRFILE_NET \| 0x00280000 )	errfile.h
39292	ERRFILE_wpa_ccmp	( ERRFILE_NET \| 0x00290000 )	errfile.h
39293	ERRFILE_image	( ERRFILE_IMAGE \| 0x00000000 )	errfile.h
39294	ERRFILE_elf	( ERRFILE_IMAGE \| 0x00010000 )	errfile.h
39295	ERRFILE_script	( ERRFILE_IMAGE \| 0x00020000 )	errfile.h
39296	ERRFILE_segment	( ERRFILE_IMAGE \| 0x00030000 )	errfile.h
39297	ERRFILE_efi_image	( ERRFILE_IMAGE \| 0x00040000 )	errfile.h
39298	ERRFILE_embedded	( ERRFILE_IMAGE \| 0x00050000 )	errfile.h
39299	ERRFILE_asn1	( ERRFILE_OTHER \| 0x00000000 )	errfile.h
39300	ERRFILE_chap	( ERRFILE_OTHER \| 0x00010000 )	errfile.h
39301	ERRFILE_aoeboot	( ERRFILE_OTHER \| 0x00020000 )	errfile.h
39302	ERRFILE_autoboot	( ERRFILE_OTHER \| 0x00030000 )	errfile.h
39303	ERRFILE_dhcpmgmt	( ERRFILE_OTHER \| 0x00040000 )	errfile.h
39304	ERRFILE_imgmgmt	( ERRFILE_OTHER \| 0x00050000 )	errfile.h
39305	ERRFILE_pxe_tftp	( ERRFILE_OTHER \| 0x00060000 )	errfile.h
39306	ERRFILE_pxe_udp	( ERRFILE_OTHER \| 0x00070000 )	errfile.h
39307	ERRFILE_axtls_aes	( ERRFILE_OTHER \| 0x00080000 )	errfile.h
39308	ERRFILE_cipher	( ERRFILE_OTHER \| 0x00090000 )	errfile.h
39309	ERRFILE_image_cmd	( ERRFILE_OTHER \| 0x000a0000 )	errfile.h
39310	ERRFILE_uri_test	( ERRFILE_OTHER \| 0x000b0000 )	errfile.h
39311	ERRFILE_ibft	( ERRFILE_OTHER \| 0x000c0000 )	errfile.h
39312	ERRFILE_tls	( ERRFILE_OTHER \| 0x000d0000 )	errfile.h
39313	ERRFILE_ifmgmt	( ERRFILE_OTHER \| 0x000e0000 )	errfile.h
39314	ERRFILE_iscsiboot	( ERRFILE_OTHER \| 0x000f0000 )	errfile.h
39315	ERRFILE_efi_pci	( ERRFILE_OTHER \| 0x00100000 )	errfile.h
39316	ERRFILE_efi_snp	( ERRFILE_OTHER \| 0x00110000 )	errfile.h
39317	ERRFILE_smbios	( ERRFILE_OTHER \| 0x00120000 )	errfile.h
39318	ERRFILE_smbios_settings	( ERRFILE_OTHER \| 0x00130000 )	errfile.h
39319	ERRFILE_efi_smbios	( ERRFILE_OTHER \| 0x00140000 )	errfile.h
39320	ERRFILE_pxemenu	( ERRFILE_OTHER \| 0x00150000 )	errfile.h
39321	ERRFILE_x509	( ERRFILE_OTHER \| 0x00160000 )	errfile.h
39322	ERRFILE_login_ui	( ERRFILE_OTHER \| 0x00170000 )	errfile.h
39323	ERRFILE_ib_srpboot	( ERRFILE_OTHER \| 0x00180000 )	errfile.h
39324	ERRFILE_iwmgmt	( ERRFILE_OTHER \| 0x00190000 )	errfile.h
39325	ERRORTAB	__table ( struct errortab, "errortab" )	errortab.h
39326	__errortab	__table_entry ( ERRORTAB, 01 )	errortab.h
39327	FEATURE_PROTOCOL	01	features.h	*< Network protocols
39328	FEATURE_IMAGE	02	features.h	*< Image formats
39329	FEATURE_MISC	03	features.h	*< Miscellaneous
39330	DHCP_EB_FEATURE_PXE_EXT	0x10	features.h	*< PXE API extensions
39331	DHCP_EB_FEATURE_ISCSI	0x11	features.h	*< iSCSI protocol
39332	DHCP_EB_FEATURE_AOE	0x12	features.h	*< AoE protocol
39333	DHCP_EB_FEATURE_HTTP	0x13	features.h	*< HTTP protocol
39334	DHCP_EB_FEATURE_HTTPS	0x14	features.h	*< HTTPS protocol
39335	DHCP_EB_FEATURE_TFTP	0x15	features.h	*< TFTP protocol
39336	DHCP_EB_FEATURE_FTP	0x16	features.h	*< FTP protocol
39337	DHCP_EB_FEATURE_DNS	0x17	features.h	*< DNS protocol
39338	DHCP_EB_FEATURE_BZIMAGE	0x18	features.h	*< bzImage format
39339	DHCP_EB_FEATURE_MULTIBOOT	0x19	features.h	*< Multiboot format
39340	DHCP_EB_FEATURE_SLAM	0x1a	features.h	*< SLAM protocol
39341	DHCP_EB_FEATURE_SRP	0x1b	features.h	*< SRP protocol
39342	DHCP_EB_FEATURE_NBI	0x20	features.h	*< NBI format
39343	DHCP_EB_FEATURE_PXE	0x21	features.h	*< PXE format
39344	DHCP_EB_FEATURE_ELF	0x22	features.h	*< ELF format
39345	DHCP_EB_FEATURE_COMBOOT	0x23	features.h	*< COMBOOT format
39346	DHCP_EB_FEATURE_EFI	0x24	features.h	*< EFI format
39347	DHCP_FEATURES	__table ( uint8_t, "dhcp_features" )	features.h
39348	__dhcp_feature	__table_entry ( DHCP_FEATURES, 01 )	features.h
39349	FEATURES	__table ( struct feature, "features" )	features.h
39350	FTP_PORT	21	ftp.h
39351	GDB_TRANSPORTS	__table ( struct gdb_transport, "gdb_transports" )	gdbstub.h
39352	__gdb_transport	__table_entry ( GDB_TRANSPORTS, 01 )	gdbstub.h
39353	HTTP_PORT	80	http.h
39354	HTTPS_PORT	443	http.h
39355	I2C_TENBIT_ADDRESS	0x7800	i2c.h
39356	I2C_WRITE	0	i2c.h
39357	I2C_READ	1	i2c.h
39358	I2C_UDELAY	5	i2c.h
39359	I2C_RESET_MAX_CYCLES	32	i2c.h
39360	IB_SMP_CLASS_VERSION	1	ib_mad.h
39361	IB_SMP_STATUS_D_INBOUND	0x8000	ib_mad.h
39362	IB_SMP_ATTR_NOTICE	0x0002	ib_mad.h
39363	IB_SMP_ATTR_NODE_DESC	0x0010	ib_mad.h
39364	IB_SMP_ATTR_NODE_INFO	0x0011	ib_mad.h
39365	IB_SMP_ATTR_SWITCH_INFO	0x0012	ib_mad.h
39366	IB_SMP_ATTR_GUID_INFO	0x0014	ib_mad.h
39367	IB_SMP_ATTR_PORT_INFO	0x0015	ib_mad.h
39368	IB_SMP_ATTR_PKEY_TABLE	0x0016	ib_mad.h
39369	IB_SMP_ATTR_SL_TO_VL_TABLE	0x0017	ib_mad.h
39370	IB_SMP_ATTR_VL_ARB_TABLE	0x0018	ib_mad.h
39371	IB_SMP_ATTR_LINEAR_FORWARD_TABL	0x0019	ib_mad.h
39372	IB_SMP_ATTR_RANDOM_FORWARD_TABL	0x001A	ib_mad.h
39373	IB_SMP_ATTR_MCAST_FORWARD_TABLE	0x001B	ib_mad.h
39374	IB_SMP_ATTR_SM_INFO	0x0020	ib_mad.h
39375	IB_SMP_ATTR_VENDOR_DIAG	0x0030	ib_mad.h
39376	IB_SMP_ATTR_LED_INFO	0x0031	ib_mad.h
39377	IB_SMP_ATTR_VENDOR_MASK	0xFF00	ib_mad.h
39378	IB_NODE_TYPE_HCA	0x01	ib_mad.h
39379	IB_NODE_TYPE_SWITCH	0x02	ib_mad.h
39380	IB_NODE_TYPE_ROUTER	0x03	ib_mad.h
39381	IB_LINK_WIDTH_1X	0x01	ib_mad.h
39382	IB_LINK_WIDTH_4X	0x02	ib_mad.h
39383	IB_LINK_WIDTH_8X	0x04	ib_mad.h
39384	IB_LINK_WIDTH_12X	0x08	ib_mad.h
39385	IB_LINK_SPEED_SDR	0x01	ib_mad.h
39386	IB_LINK_SPEED_DDR	0x02	ib_mad.h
39387	IB_LINK_SPEED_QDR	0x04	ib_mad.h
39388	IB_PORT_STATE_DOWN	0x01	ib_mad.h
39389	IB_PORT_STATE_INIT	0x02	ib_mad.h
39390	IB_PORT_STATE_ARMED	0x03	ib_mad.h
39391	IB_PORT_STATE_ACTIVE	0x04	ib_mad.h
39392	IB_PORT_PHYS_STATE_SLEEP	0x01	ib_mad.h
39393	IB_PORT_PHYS_STATE_POLLING	0x02	ib_mad.h
39394	IB_MTU_256	0x01	ib_mad.h
39395	IB_MTU_512	0x02	ib_mad.h
39396	IB_MTU_1024	0x03	ib_mad.h
39397	IB_MTU_2048	0x04	ib_mad.h
39398	IB_MTU_4096	0x05	ib_mad.h
39399	IB_VL_0	0x01	ib_mad.h
39400	IB_VL_0_1	0x02	ib_mad.h
39401	IB_VL_0_3	0x03	ib_mad.h
39402	IB_VL_0_7	0x04	ib_mad.h
39403	IB_VL_0_14	0x05	ib_mad.h
39404	IB_SA_CLASS_VERSION	2	ib_mad.h
39405	IB_SA_METHOD_DELETE_RESP	0x95	ib_mad.h
39406	IB_SA_ATTR_MC_MEMBER_REC	0x38	ib_mad.h
39407	IB_SA_ATTR_PATH_REC	0x35	ib_mad.h
39408	IB_SA_PATH_REC_DGID	(1<<2)	ib_mad.h
39409	IB_SA_PATH_REC_SGID	(1<<3)	ib_mad.h
39410	IB_SA_MCMEMBER_REC_MGID	(1<<0)	ib_mad.h
39411	IB_SA_MCMEMBER_REC_PORT_GID	(1<<1)	ib_mad.h
39412	IB_SA_MCMEMBER_REC_QKEY	(1<<2)	ib_mad.h
39413	IB_SA_MCMEMBER_REC_MLID	(1<<3)	ib_mad.h
39414	IB_SA_MCMEMBER_REC_MTU_SELECTOR	(1<<4)	ib_mad.h
39415	IB_SA_MCMEMBER_REC_MTU	(1<<5)	ib_mad.h
39416	IB_SA_MCMEMBER_REC_TRAFFIC_CLAS	(1<<6)	ib_mad.h
39417	IB_SA_MCMEMBER_REC_PKEY	(1<<7)	ib_mad.h
39418	IB_SA_MCMEMBER_REC_RATE_SELECTO	(1<<8)	ib_mad.h
39419	IB_SA_MCMEMBER_REC_RATE	(1<<9)	ib_mad.h
39420	IB_SA_MCMEMBER_REC_PACKET_LIFE_	(1<<10)	ib_mad.h
39421	IB_SA_MCMEMBER_REC_PACKET_LIFE_	(1<<11)	ib_mad.h
39422	IB_SA_MCMEMBER_REC_SL	(1<<12)	ib_mad.h
39423	IB_SA_MCMEMBER_REC_FLOW_LABEL	(1<<13)	ib_mad.h
39424	IB_SA_MCMEMBER_REC_HOP_LIMIT	(1<<14)	ib_mad.h
39425	IB_SA_MCMEMBER_REC_SCOPE	(1<<15)	ib_mad.h
39426	IB_SA_MCMEMBER_REC_JOIN_STATE	(1<<16)	ib_mad.h
39427	IB_SA_MCMEMBER_REC_PROXY_JOIN	(1<<17)	ib_mad.h
39428	IB_CM_CLASS_VERSION	2	ib_mad.h
39429	IB_CM_ATTR_CLASS_PORT_INFO	0x0001	ib_mad.h
39430	IB_CM_ATTR_CONNECT_REQUEST	0x0010	ib_mad.h
39431	IB_CM_ATTR_MSG_RCPT_ACK	0x0011	ib_mad.h
39432	IB_CM_ATTR_CONNECT_REJECT	0x0012	ib_mad.h
39433	IB_CM_ATTR_CONNECT_REPLY	0x0013	ib_mad.h
39434	IB_CM_ATTR_READY_TO_USE	0x0014	ib_mad.h
39435	IB_CM_ATTR_DISCONNECT_REQUEST	0x0015	ib_mad.h
39436	IB_CM_ATTR_DISCONNECT_REPLY	0x0016	ib_mad.h
39437	IB_CM_ATTR_SERVICE_ID_RES_REQ	0x0016	ib_mad.h
39438	IB_CM_ATTR_SERVICE_ID_RES_REQ_R	0x0018	ib_mad.h
39439	IB_CM_ATTR_LOAD_ALTERNATE_PATH	0x0019	ib_mad.h
39440	IB_CM_ATTR_ALTERNATE_PATH_RESPO	0x001a	ib_mad.h
39441	IB_CM_TRANSPORT_RC	0	ib_mad.h
39442	IB_CM_TRANSPORT_UC	1	ib_mad.h
39443	IB_CM_TRANSPORT_RD	2	ib_mad.h
39444	IB_CM_REJECT_BAD_SERVICE_ID	8	ib_mad.h
39445	IB_CM_REJECT_STALE_CONN	10	ib_mad.h
39446	IB_CM_REJECT_CONSUMER	28	ib_mad.h
39447	IB_MGMT_BASE_VERSION	1	ib_mad.h
39448	IB_MGMT_CLASS_SUBN_LID_ROUTED	0x01	ib_mad.h
39449	IB_MGMT_CLASS_SUBN_DIRECTED_ROU	0x81	ib_mad.h
39450	IB_MGMT_CLASS_SUBN_ADM	0x03	ib_mad.h
39451	IB_MGMT_CLASS_PERF_MGMT	0x04	ib_mad.h
39452	IB_MGMT_CLASS_BM	0x05	ib_mad.h
39453	IB_MGMT_CLASS_DEVICE_MGMT	0x06	ib_mad.h
39454	IB_MGMT_CLASS_CM	0x07	ib_mad.h
39455	IB_MGMT_CLASS_SNMP	0x08	ib_mad.h
39456	IB_MGMT_CLASS_VENDOR_RANGE2_STA	0x30	ib_mad.h
39457	IB_MGMT_CLASS_VENDOR_RANGE2_END	0x4f	ib_mad.h
39458	IB_MGMT_CLASS_MASK	0x7f	ib_mad.h
39459	IB_MGMT_METHOD_GET	0x01	ib_mad.h
39460	IB_MGMT_METHOD_SET	0x02	ib_mad.h
39461	IB_MGMT_METHOD_GET_RESP	0x81	ib_mad.h
39462	IB_MGMT_METHOD_SEND	0x03	ib_mad.h
39463	IB_MGMT_METHOD_TRAP	0x05	ib_mad.h
39464	IB_MGMT_METHOD_REPORT	0x06	ib_mad.h
39465	IB_MGMT_METHOD_REPORT_RESP	0x86	ib_mad.h
39466	IB_MGMT_METHOD_TRAP_REPRESS	0x07	ib_mad.h
39467	IB_MGMT_METHOD_DELETE	0x15	ib_mad.h
39468	IB_MGMT_STATUS_OK	0x0000	ib_mad.h
39469	IB_MGMT_STATUS_BAD_VERSION	0x0001	ib_mad.h
39470	IB_MGMT_STATUS_UNSUPPORTED_METH	0x0002	ib_mad.h
39471	IB_MGMT_STATUS_UNSUPPORTED_METH	0x0003	ib_mad.h
39472	IB_MGMT_STATUS_INVALID_VALUE	0x0004	ib_mad.h
39473	IB_MAD_AGENTS	__table ( struct ib_mad_agent, "ib_mad_agents" )	ib_mi.h
39474	__ib_mad_agent	__table_entry ( IB_MAD_AGENTS, 01 )	ib_mi.h
39475	IB_LID_NONE	0xffff	ib_packet.h
39476	IB_GRH_IPVER_IPv6	0x06	ib_packet.h
39477	IB_GRH_NXTHDR_IBA	0x1b	ib_packet.h
39478	IB_MAX_HEADER_SIZE	sizeof ( union ib_headers )	ib_packet.h
39479	ICMP_ECHO_RESPONSE	0	icmp.h
39480	ICMP_ECHO_REQUEST	8	icmp.h
39481	ICMP6_NSOLICIT	135	icmp6.h
39482	ICMP6_NADVERT	136	icmp6.h
39483	ICMP6_FLAGS_ROUTER	0x80	icmp6.h
39484	ICMP6_FLAGS_SOLICITED	0x40	icmp6.h
39485	ICMP6_FLAGS_OVERRIDE	0x20	icmp6.h
39486	IEEE80211_MAX_DATA_LEN	2304	ieee80211.h
39487	IEEE80211_LLC_HEADER_LEN	8	ieee80211.h
39488	IEEE80211_MAX_CRYPTO_HEADER	8	ieee80211.h
39489	IEEE80211_MAX_CRYPTO_TRAILER	8	ieee80211.h
39490	IEEE80211_MAX_CRYPTO_OVERHEAD	16	ieee80211.h
39491	IEEE80211_MAX_FRAME_DATA	2296	ieee80211.h
39492	IEEE80211_TYP_FRAME_HEADER_LEN	24	ieee80211.h
39493	IEEE80211_MAX_FRAME_HEADER_LEN	32	ieee80211.h
39494	IEEE80211_MAX_FRAME_LEN	2352	ieee80211.h
39495	IEEE80211_MAX_SSID_LEN	32	ieee80211.h
39496	IEEE80211_FC_VERSION	0x0003	ieee80211.h
39497	IEEE80211_THIS_VERSION	0x0000	ieee80211.h
39498	IEEE80211_FC_TYPE	0x000C	ieee80211.h
39499	IEEE80211_TYPE_MGMT	0x0000	ieee80211.h
39500	IEEE80211_TYPE_CTRL	0x0004	ieee80211.h
39501	IEEE80211_TYPE_DATA	0x0008	ieee80211.h
39502	IEEE80211_FC_SUBTYPE	0x00F0	ieee80211.h
39503	IEEE80211_STYPE_ASSOC_REQ	0x0000	ieee80211.h
39504	IEEE80211_STYPE_ASSOC_RESP	0x0010	ieee80211.h
39505	IEEE80211_STYPE_REASSOC_REQ	0x0020	ieee80211.h
39506	IEEE80211_STYPE_REASSOC_RESP	0x0030	ieee80211.h
39507	IEEE80211_STYPE_PROBE_REQ	0x0040	ieee80211.h
39508	IEEE80211_STYPE_PROBE_RESP	0x0050	ieee80211.h
39509	IEEE80211_STYPE_BEACON	0x0080	ieee80211.h
39510	IEEE80211_STYPE_DISASSOC	0x00A0	ieee80211.h
39511	IEEE80211_STYPE_AUTH	0x00B0	ieee80211.h
39512	IEEE80211_STYPE_DEAUTH	0x00C0	ieee80211.h
39513	IEEE80211_STYPE_ACTION	0x00D0	ieee80211.h
39514	IEEE80211_STYPE_RTS	0x00B0	ieee80211.h
39515	IEEE80211_STYPE_CTS	0x00C0	ieee80211.h
39516	IEEE80211_STYPE_ACK	0x00D0	ieee80211.h
39517	IEEE80211_STYPE_DATA	0x0000	ieee80211.h
39518	IEEE80211_STYPE_NODATA	0x0040	ieee80211.h
39519	IEEE80211_FC_TODS	0x0100	ieee80211.h
39520	IEEE80211_FC_FROMDS	0x0200	ieee80211.h
39521	IEEE80211_FC_MORE_FRAG	0x0400	ieee80211.h
39522	IEEE80211_FC_RETRY	0x0800	ieee80211.h
39523	IEEE80211_FC_PWR_MGMT	0x1000	ieee80211.h
39524	IEEE80211_FC_MORE_DATA	0x2000	ieee80211.h
39525	IEEE80211_FC_PROTECTED	0x4000	ieee80211.h
39526	IEEE80211_FC_ORDER	0x8000	ieee80211.h
39527	IEEE80211_LLC_DSAP	0xAA	ieee80211.h
39528	IEEE80211_LLC_SSAP	0xAA	ieee80211.h
39529	IEEE80211_LLC_CTRL	0x03	ieee80211.h
39530	IEEE80211_RTS_LEN	16	ieee80211.h
39531	ieee80211_cts	ieee80211_cts_or_ack	ieee80211.h
39532	ieee80211_ack	ieee80211_cts_or_ack	ieee80211.h
39533	IEEE80211_CTS_LEN	10	ieee80211.h
39534	IEEE80211_ACK_LEN	10	ieee80211.h
39535	IEEE80211_CAPAB_MANAGED	0x0001	ieee80211.h
39536	IEEE80211_CAPAB_ADHOC	0x0002	ieee80211.h
39537	IEEE80211_CAPAB_CFPOLL	0x0004	ieee80211.h
39538	IEEE80211_CAPAB_CFPR	0x0008	ieee80211.h
39539	IEEE80211_CAPAB_PRIVACY	0x0010	ieee80211.h
39540	IEEE80211_CAPAB_SHORT_PMBL	0x0020	ieee80211.h
39541	IEEE80211_CAPAB_PBCC	0x0040	ieee80211.h
39542	IEEE80211_CAPAB_CHAN_AGILITY	0x0080	ieee80211.h
39543	IEEE80211_CAPAB_SPECTRUM_MGMT	0x0100	ieee80211.h
39544	IEEE80211_CAPAB_QOS	0x0200	ieee80211.h
39545	IEEE80211_CAPAB_SHORT_SLOT	0x0400	ieee80211.h
39546	IEEE80211_CAPAB_APSD	0x0800	ieee80211.h
39547	IEEE80211_CAPAB_DSSS_OFDM	0x2000	ieee80211.h
39548	IEEE80211_CAPAB_DELAYED_BACK	0x4000	ieee80211.h
39549	IEEE80211_CAPAB_IMMED_BACK	0x8000	ieee80211.h
39550	IEEE80211_STATUS_SUCCESS	0	ieee80211.h
39551	IEEE80211_STATUS_FAILURE	1	ieee80211.h
39552	IEEE80211_STATUS_CAPAB_UNSUPP	10	ieee80211.h
39553	IEEE80211_STATUS_REASSOC_INVALI	11	ieee80211.h
39554	IEEE80211_STATUS_ASSOC_DENIED	12	ieee80211.h
39555	IEEE80211_STATUS_AUTH_ALGO_UNSU	13	ieee80211.h
39556	IEEE80211_STATUS_AUTH_SEQ_INVAL	14	ieee80211.h
39557	IEEE80211_STATUS_AUTH_CHALL_INV	15	ieee80211.h
39558	IEEE80211_STATUS_AUTH_TIMEOUT	16	ieee80211.h
39559	IEEE80211_STATUS_ASSOC_NO_ROOM	17	ieee80211.h
39560	IEEE80211_STATUS_ASSOC_NEED_RAT	18	ieee80211.h
39561	IEEE80211_STATUS_ASSOC_NEED_SHO	19	ieee80211.h
39562	IEEE80211_STATUS_ASSOC_NEED_PBC	20	ieee80211.h
39563	IEEE80211_STATUS_ASSOC_NEED_CHA	21	ieee80211.h
39564	IEEE80211_STATUS_ASSOC_NEED_SPE	22	ieee80211.h
39565	IEEE80211_STATUS_ASSOC_BAD_POWE	23	ieee80211.h
39566	IEEE80211_STATUS_ASSOC_BAD_CHAN	24	ieee80211.h
39567	IEEE80211_STATUS_ASSOC_NEED_SHO	25	ieee80211.h
39568	IEEE80211_STATUS_ASSOC_NEED_DSS	26	ieee80211.h
39569	IEEE80211_STATUS_QOS_FAILURE	32	ieee80211.h
39570	IEEE80211_STATUS_QOS_NO_ROOM	33	ieee80211.h
39571	IEEE80211_STATUS_LINK_IS_HORRIB	34	ieee80211.h
39572	IEEE80211_STATUS_ASSOC_NEED_QOS	35	ieee80211.h
39573	IEEE80211_STATUS_REQUEST_DECLIN	37	ieee80211.h
39574	IEEE80211_STATUS_REQUEST_INVALI	38	ieee80211.h
39575	IEEE80211_STATUS_TS_NOT_CREATED	39	ieee80211.h
39576	IEEE80211_STATUS_INVALID_IE	40	ieee80211.h
39577	IEEE80211_STATUS_GROUP_CIPHER_I	41	ieee80211.h
39578	IEEE80211_STATUS_PAIR_CIPHER_IN	42	ieee80211.h
39579	IEEE80211_STATUS_AKMP_INVALID	43	ieee80211.h
39580	IEEE80211_STATUS_RSN_VERSION_UN	44	ieee80211.h
39581	IEEE80211_STATUS_RSN_CAPAB_INVA	45	ieee80211.h
39582	IEEE80211_STATUS_CIPHER_REJECTE	46	ieee80211.h
39583	IEEE80211_STATUS_TS_NOT_CREATED	47	ieee80211.h
39584	IEEE80211_STATUS_DIRECT_LINK_FO	48	ieee80211.h
39585	IEEE80211_STATUS_DEST_NOT_PRESE	49	ieee80211.h
39586	IEEE80211_STATUS_DEST_NOT_QOS	50	ieee80211.h
39587	IEEE80211_STATUS_ASSOC_LISTEN_T	51	ieee80211.h
39588	IEEE80211_REASON_NONE	0	ieee80211.h
39589	IEEE80211_REASON_UNSPECIFIED	1	ieee80211.h
39590	IEEE80211_REASON_AUTH_NO_LONGER	2	ieee80211.h
39591	IEEE80211_REASON_LEAVING	3	ieee80211.h
39592	IEEE80211_REASON_INACTIVITY	4	ieee80211.h
39593	IEEE80211_REASON_OUT_OF_RESOURC	5	ieee80211.h
39594	IEEE80211_REASON_NEED_AUTH	6	ieee80211.h
39595	IEEE80211_REASON_NEED_ASSOC	7	ieee80211.h
39596	IEEE80211_REASON_LEAVING_TO_ROA	8	ieee80211.h
39597	IEEE80211_REASON_REASSOC_INVALI	9	ieee80211.h
39598	IEEE80211_REASON_BAD_POWER	10	ieee80211.h
39599	IEEE80211_REASON_BAD_CHANNELS	11	ieee80211.h
39600	IEEE80211_REASON_INVALID_IE	13	ieee80211.h
39601	IEEE80211_REASON_MIC_FAILURE	14	ieee80211.h
39602	IEEE80211_REASON_4WAY_TIMEOUT	15	ieee80211.h
39603	IEEE80211_REASON_GROUPKEY_TIMEO	16	ieee80211.h
39604	IEEE80211_REASON_4WAY_INVALID	17	ieee80211.h
39605	IEEE80211_REASON_GROUP_CIPHER_I	18	ieee80211.h
39606	IEEE80211_REASON_PAIR_CIPHER_IN	19	ieee80211.h
39607	IEEE80211_REASON_AKMP_INVALID	20	ieee80211.h
39608	IEEE80211_REASON_RSN_VERSION_IN	21	ieee80211.h
39609	IEEE80211_REASON_RSN_CAPAB_INVA	22	ieee80211.h
39610	IEEE80211_REASON_8021X_FAILURE	23	ieee80211.h
39611	IEEE80211_REASON_CIPHER_REJECTE	24	ieee80211.h
39612	IEEE80211_REASON_QOS_UNSPECIFIE	32	ieee80211.h
39613	IEEE80211_REASON_QOS_OUT_OF_RES	33	ieee80211.h
39614	IEEE80211_REASON_LINK_IS_HORRIB	34	ieee80211.h
39615	IEEE80211_REASON_INVALID_TXOP	35	ieee80211.h
39616	IEEE80211_REASON_REQUESTED_LEAV	36	ieee80211.h
39617	IEEE80211_REASON_REQUESTED_NO_U	37	ieee80211.h
39618	IEEE80211_REASON_REQUESTED_NEED	38	ieee80211.h
39619	IEEE80211_REASON_REQUESTED_TIME	39	ieee80211.h
39620	IEEE80211_REASON_CIPHER_UNSUPPO	45	ieee80211.h
39621	IEEE80211_IE_SSID	0	ieee80211.h
39622	IEEE80211_IE_RATES	1	ieee80211.h
39623	IEEE80211_IE_EXT_RATES	50	ieee80211.h
39624	IEEE80211_IE_DS_PARAM	3	ieee80211.h
39625	IEEE80211_IE_COUNTRY	7	ieee80211.h
39626	IEEE80211_IE_REQUEST	10	ieee80211.h
39627	IEEE80211_IE_CHALLENGE_TEXT	16	ieee80211.h
39628	IEEE80211_IE_POWER_CONSTRAINT	52	ieee80211.h
39629	IEEE80211_IE_POWER_CAPAB	33	ieee80211.h
39630	IEEE80211_IE_CHANNELS	36	ieee80211.h
39631	IEEE80211_IE_ERP_INFO	42	ieee80211.h
39632	IEEE80211_ERP_NONERP_PRESENT	0x01	ieee80211.h
39633	IEEE80211_ERP_USE_PROTECTION	0x02	ieee80211.h
39634	IEEE80211_ERP_BARKER_LONG	0x04	ieee80211.h
39635	IEEE80211_IE_RSN	48	ieee80211.h
39636	OUI_ORG_MASK	0xFFFFFF00	ieee80211.h
39637	OUI_TYPE_MASK	0x000000FF	ieee80211.h
39638	OUI_ORG_MASK	0x00FFFFFF	ieee80211.h
39639	OUI_TYPE_MASK	0xFF000000	ieee80211.h
39640	IEEE80211_RSN_OUI	_MKOUI ( 0x00, 0x0F, 0xAC, 0 )	ieee80211.h
39641	IEEE80211_WPA_OUI	_MKOUI ( 0x00, 0x50, 0xF2, 0 )	ieee80211.h
39642	IEEE80211_WPA_OUI_VEN	_MKOUI ( 0x00, 0x50, 0xF2, 0x01 )	ieee80211.h
39643	IEEE80211_RSN_VERSION	1	ieee80211.h
39644	IEEE80211_RSN_CTYPE_WEP40	_MKOUI ( 0, 0, 0, 0x01 )	ieee80211.h
39645	IEEE80211_RSN_CTYPE_WEP104	_MKOUI ( 0, 0, 0, 0x05 )	ieee80211.h
39646	IEEE80211_RSN_CTYPE_TKIP	_MKOUI ( 0, 0, 0, 0x02 )	ieee80211.h
39647	IEEE80211_RSN_CTYPE_CCMP	_MKOUI ( 0, 0, 0, 0x04 )	ieee80211.h
39648	IEEE80211_RSN_CTYPE_USEGROUP	_MKOUI ( 0, 0, 0, 0x00 )	ieee80211.h
39649	IEEE80211_RSN_ATYPE_8021X	_MKOUI ( 0, 0, 0, 0x01 )	ieee80211.h
39650	IEEE80211_RSN_ATYPE_PSK	_MKOUI ( 0, 0, 0, 0x02 )	ieee80211.h
39651	IEEE80211_RSN_CAPAB_PREAUTH	0x001	ieee80211.h
39652	IEEE80211_RSN_CAPAB_NO_PAIRWISE	0x002	ieee80211.h
39653	IEEE80211_RSN_CAPAB_PTKSA_REPLA	0x00C	ieee80211.h
39654	IEEE80211_RSN_CAPAB_GTKSA_REPLA	0x030	ieee80211.h
39655	IEEE80211_RSN_CAPAB_PEERKEY	0x200	ieee80211.h
39656	IEEE80211_RSN_1_CTR	0x000	ieee80211.h
39657	IEEE80211_RSN_2_CTR	0x014	ieee80211.h
39658	IEEE80211_RSN_4_CTR	0x028	ieee80211.h
39659	IEEE80211_RSN_16_CTR	0x03C	ieee80211.h
39660	IEEE80211_IE_VENDOR	221	ieee80211.h
39661	ieee80211_beacon	ieee80211_beacon_or_probe_resp	ieee80211.h
39662	ieee80211_probe_resp	ieee80211_beacon_or_probe_resp	ieee80211.h
39663	ieee80211_disassoc	ieee80211_disassoc_or_deauth	ieee80211.h
39664	ieee80211_deauth	ieee80211_disassoc_or_deauth	ieee80211.h
39665	ieee80211_assoc_resp	ieee80211_assoc_or_reassoc_resp	ieee80211.h
39666	ieee80211_reassoc_resp	ieee80211_assoc_or_reassoc_resp	ieee80211.h
39667	IEEE80211_AUTH_OPEN_SYSTEM	0	ieee80211.h
39668	IEEE80211_AUTH_SHARED_KEY	1	ieee80211.h
39669	ARPHRD_NETROM	0	if_arp.h	*< from KA9Q: NET/ROM pseudo
39670	ARPHRD_ETHER	1	if_arp.h	*< Ethernet 10Mbps
39671	ARPHRD_EETHER	2	if_arp.h	*< Experimental Ethernet
39672	ARPHRD_AX25	3	if_arp.h	*< AX.25 Level 2
39673	ARPHRD_PRONET	4	if_arp.h	*< PROnet token ring
39674	ARPHRD_CHAOS	5	if_arp.h	*< Chaosnet
39675	ARPHRD_IEEE802	6	if_arp.h	*< IEEE 802.2 Ethernet/TR/TB
39676	ARPHRD_ARCNET	7	if_arp.h	*< ARCnet
39677	ARPHRD_APPLETLK	8	if_arp.h	*< APPLEtalk
39678	ARPHRD_DLCI	15	if_arp.h	*< Frame Relay DLCI
39679	ARPHRD_ATM	19	if_arp.h	*< ATM
39680	ARPHRD_METRICOM	23	if_arp.h	*< Metricom STRIP (new IANA id)
39681	ARPHRD_IEEE1394	24	if_arp.h	*< IEEE 1394 IPv4 - RFC 2734
39682	ARPHRD_EUI64	27	if_arp.h	*< EUI-64
39683	ARPHRD_INFINIBAND	32	if_arp.h	*< InfiniBand
39684	ARPOP_REQUEST	1	if_arp.h	*< ARP request
39685	ARPOP_REPLY	2	if_arp.h	*< ARP reply
39686	ARPOP_RREQUEST	3	if_arp.h	*< RARP request
39687	ARPOP_RREPLY	4	if_arp.h	*< RARP reply
39688	ARPOP_InREQUEST	8	if_arp.h	*< InARP request
39689	ARPOP_InREPLY	9	if_arp.h	*< InARP reply
39690	ARPOP_NAK	10	if_arp.h	*< (ATM)ARP NAK
39691	ETH_ALEN	6	if_ether.h	Size of Ethernet address
39692	ETH_HLEN	14	if_ether.h	Size of ethernet header
39693	ETH_ZLEN	60	if_ether.h	Minimum packet
39694	ETH_FRAME_LEN	1514	if_ether.h	Maximum packet
39695	ETH_DATA_ALIGN	2	if_ether.h	Amount needed to align the data after an ethernet header
39696	ETH_MAX_MTU	(ETH_FRAME_LEN-ETH_HLEN)	if_ether.h
39697	ETH_P_RAW	0x0000	if_ether.h	Raw packet
39698	ETH_P_IP	0x0800	if_ether.h	Internet Protocl Packet
39699	ETH_P_ARP	0x0806	if_ether.h	Address Resolution Protocol
39700	ETH_P_RARP	0x8035	if_ether.h	Reverse Address resolution Protocol
39701	ETH_P_IPV6	0x86DD	if_ether.h	IPv6 over blueblook
39702	ETH_P_SLOW	0x8809	if_ether.h	Ethernet slow protocols
39703	ETH_P_EAPOL	0x888E	if_ether.h	802.1X EAP over LANs
39704	ETH_P_AOE	0x88A2	if_ether.h	ATA over Ethernet
39705	IMAGE_LOADED	0x0001	image.h
39706	PROBE_MULTIBOOT	01	image.h
39707	PROBE_NORMAL	02	image.h
39708	PROBE_PXE	03	image.h
39709	IMAGE_TYPES	__table ( struct image_type, "image_types" )	image.h
39710	IP_ICMP	1	in.h
39711	IP_TCP	6	in.h
39712	IP_UDP	17	in.h
39713	IP_ICMP6	58	in.h
39714	INADDR_NONE	0xffffffff	in.h
39715	INADDR_BROADCAST	0xffffffff	in.h
39716	IN_CLASSA_NET	0xff000000	in.h
39717	IN_CLASSB_NET	0xffff0000	in.h
39718	IN_CLASSC_NET	0xffffff00	in.h
39719	IB_QPN_SMI	0	infiniband.h
39720	IB_QKEY_SMI	0	infiniband.h
39721	IB_QPN_GSI	1	infiniband.h
39722	IB_QKEY_GSI	0x80010000UL	infiniband.h
39723	IB_QPN_BROADCAST	0xffffffUL	infiniband.h
39724	IB_QPN_MASK	0xffffffUL	infiniband.h
39725	IB_PKEY_DEFAULT	0xffff	infiniband.h
39726	IB_PKEY_FULL	0x8000	infiniband.h
39727	IB_MAX_PAYLOAD_SIZE	2048	infiniband.h
39728	INIT_FNS	__table ( struct init_fn, "init_fns" )	init.h
39729	INIT_EARLY	01	init.h	*< Early initialisation
39730	INIT_SERIAL	02	init.h	*< Serial driver initialisation
39731	INIT_CONSOLE	03	init.h	*< Console initialisation
39732	INIT_NORMAL	04	init.h	*< Normal initialisation
39733	STARTUP_FNS	__table ( struct startup_fn, "startup_fns" )	init.h
39734	STARTUP_EARLY	01	init.h	*< Early startup
39735	STARTUP_NORMAL	02	init.h	*< Normal startup
39736	STARTUP_LATE	03	init.h	*< Late startup
39737	IOB_ALIGN	2048	iobuf.h
39738	IOB_ZLEN	64	iobuf.h
39739	IP_VER	0x40U	ip.h
39740	IP_MASK_VER	0xf0U	ip.h
39741	IP_MASK_HLEN	0x0fU	ip.h
39742	IP_MASK_OFFSET	0x1fffU	ip.h
39743	IP_MASK_DONOTFRAG	0x4000U	ip.h
39744	IP_MASK_MOREFRAGS	0x2000U	ip.h
39745	IP_PSHLEN	12	ip.h
39746	IP_TOS	0	ip.h
39747	IP_TTL	64	ip.h
39748	IP_FRAG_IOB_SIZE	1500	ip.h
39749	IP_FRAG_TIMEOUT	50	ip.h
39750	IP6_VERSION	0x6	ip6.h
39751	IP6_HOP_LIMIT	255	ip6.h
39752	MAX_HDR_LEN	100	ip6.h
39753	MAX_IOB_LEN	1500	ip6.h
39754	MIN_IOB_LEN	MAX_HDR_LEN + 100	ip6.h	To account for padding by LL
39755	IP6_HOPBYHOP	0x00	ip6.h
39756	IP6_ROUTING	0x43	ip6.h
39757	IP6_FRAGMENT	0x44	ip6.h
39758	IP6_AUTHENTICATION	0x51	ip6.h
39759	IP6_DEST_OPTS	0x60	ip6.h
39760	IP6_ESP	0x50	ip6.h
39761	IP6_ICMP6	0x58	ip6.h
39762	IP6_NO_HEADER	0x59	ip6.h
39763	IPOIB_ALEN	20	ipoib.h
39764	IPOIB_HLEN	4	ipoib.h
39765	ISA_DRIVERS	__table ( struct isa_driver, "isa_drivers" )	isa.h
39766	__isa_driver	__table_entry ( ISA_DRIVERS, 01 )	isa.h
39767	ISAPNP_ADDRESS	0x279	isapnp.h
39768	ISAPNP_WRITE_DATA	0xa79	isapnp.h
39769	ISAPNP_READ_PORT_MIN	0x203	isapnp.h
39770	ISAPNP_READ_PORT_START	0x213	isapnp.h	ISAPnP spec says 0x203, but
39771	ISAPNP_READ_PORT_MAX	0x3ff	isapnp.h
39772	ISAPNP_READ_PORT_STEP	0x10	isapnp.h	Can be any multiple of 4
39773	ISAPNP_CSN_MIN	0x01	isapnp.h
39774	ISAPNP_CSN_MAX	0x0f	isapnp.h
39775	ISAPNP_READPORT	0x00	isapnp.h
39776	ISAPNP_SERIALISOLATION	0x01	isapnp.h
39777	ISAPNP_CONFIGCONTROL	0x02	isapnp.h
39778	ISAPNP_WAKE	0x03	isapnp.h
39779	ISAPNP_RESOURCEDATA	0x04	isapnp.h
39780	ISAPNP_STATUS	0x05	isapnp.h
39781	ISAPNP_CARDSELECTNUMBER	0x06	isapnp.h
39782	ISAPNP_LOGICALDEVICENUMBER	0x07	isapnp.h
39783	ISAPNP_ACTIVATE	0x30	isapnp.h
39784	ISAPNP_IORANGECHECK	0x31	isapnp.h
39785	ISAPNP_CONFIG_RESET	( 1 << 0 )	isapnp.h
39786	ISAPNP_CONFIG_WAIT_FOR_KEY	( 1 << 1 )	isapnp.h
39787	ISAPNP_CONFIG_RESET_CSN	( 1 << 2 )	isapnp.h
39788	ISAPNP_CONFIG_RESET_DRV	( ISAPNP_CONFIG_RESET \| \ ISAPNP_CONFIG_WAIT_FOR_KEY \| \ ISAPNP_CONFIG_RESET_CSN )	isapnp.h
39789	ISAPNP_LFSR_SEED	0x6a	isapnp.h
39790	ISAPNP_TAG_PNPVERNO	0x01	isapnp.h
39791	ISAPNP_TAG_LOGDEVID	0x02	isapnp.h
39792	ISAPNP_TAG_COMPATDEVID	0x03	isapnp.h
39793	ISAPNP_TAG_IRQ	0x04	isapnp.h
39794	ISAPNP_TAG_DMA	0x05	isapnp.h
39795	ISAPNP_TAG_STARTDEP	0x06	isapnp.h
39796	ISAPNP_TAG_ENDDEP	0x07	isapnp.h
39797	ISAPNP_TAG_IOPORT	0x08	isapnp.h
39798	ISAPNP_TAG_FIXEDIO	0x09	isapnp.h
39799	ISAPNP_TAG_RSVDSHORTA	0x0A	isapnp.h
39800	ISAPNP_TAG_RSVDSHORTB	0x0B	isapnp.h
39801	ISAPNP_TAG_RSVDSHORTC	0x0C	isapnp.h
39802	ISAPNP_TAG_RSVDSHORTD	0x0D	isapnp.h
39803	ISAPNP_TAG_VENDORSHORT	0x0E	isapnp.h
39804	ISAPNP_TAG_END	0x0F	isapnp.h
39805	ISAPNP_TAG_MEMRANGE	0x81	isapnp.h
39806	ISAPNP_TAG_ANSISTR	0x82	isapnp.h
39807	ISAPNP_TAG_UNICODESTR	0x83	isapnp.h
39808	ISAPNP_TAG_VENDORLONG	0x84	isapnp.h
39809	ISAPNP_TAG_MEM32RANGE	0x85	isapnp.h
39810	ISAPNP_TAG_FIXEDMEM32RANGE	0x86	isapnp.h
39811	ISAPNP_TAG_RSVDLONG0	0xF0	isapnp.h
39812	ISAPNP_TAG_RSVDLONG1	0xF1	isapnp.h
39813	ISAPNP_TAG_RSVDLONG2	0xF2	isapnp.h
39814	ISAPNP_TAG_RSVDLONG3	0xF3	isapnp.h
39815	ISAPNP_TAG_RSVDLONG4	0xF4	isapnp.h
39816	ISAPNP_TAG_RSVDLONG5	0xF5	isapnp.h
39817	ISAPNP_TAG_RSVDLONG6	0xF6	isapnp.h
39818	ISAPNP_TAG_RSVDLONG7	0xF7	isapnp.h
39819	ISAPNP_TAG_RSVDLONG8	0xF8	isapnp.h
39820	ISAPNP_TAG_RSVDLONG9	0xF9	isapnp.h
39821	ISAPNP_TAG_RSVDLONGA	0xFA	isapnp.h
39822	ISAPNP_TAG_RSVDLONGB	0xFB	isapnp.h
39823	ISAPNP_TAG_RSVDLONGC	0xFC	isapnp.h
39824	ISAPNP_TAG_RSVDLONGD	0xFD	isapnp.h
39825	ISAPNP_TAG_RSVDLONGE	0xFE	isapnp.h
39826	ISAPNP_TAG_RSVDLONGF	0xFF	isapnp.h
39827	ISAPNP_TAG_PSEUDO_NEWBOARD	0x100	isapnp.h
39828	ISAPNP_DRIVERS	__table ( struct isapnp_driver, "isapnp_drivers" )	isapnp.h
39829	__isapnp_driver	__table_entry ( ISAPNP_DRIVERS, 01 )	isapnp.h
39830	GENERIC_ISAPNP_VENDOR	ISAPNP_VENDOR ( 'P','N','P' )	isa_ids.h
39831	ISA_PROD_ID_MASK	( 0xf0ff )	isa_ids.h
39832	ISCSI_PORT	3260	iscsi.h
39833	ISCSI_OPCODE_MASK	0x3f	iscsi.h
39834	ISCSI_FLAG_IMMEDIATE	0x40	iscsi.h
39835	ISCSI_FLAG_FINAL	0x80	iscsi.h
39836	ISCSI_OPCODE_LOGIN_REQUEST	0x03	iscsi.h
39837	ISCSI_LOGIN_FLAG_TRANSITION	0x80	iscsi.h
39838	ISCSI_LOGIN_FLAG_CONTINUE	0x40	iscsi.h
39839	ISCSI_LOGIN_CSG_MASK	0x0c	iscsi.h
39840	ISCSI_LOGIN_CSG_SECURITY_NEGOTI	0x00	iscsi.h
39841	ISCSI_LOGIN_CSG_OPERATIONAL_NEG	0x04	iscsi.h
39842	ISCSI_LOGIN_CSG_FULL_FEATURE_PH	0x0c	iscsi.h
39843	ISCSI_LOGIN_NSG_MASK	0x03	iscsi.h
39844	ISCSI_LOGIN_NSG_SECURITY_NEGOTI	0x00	iscsi.h
39845	ISCSI_LOGIN_NSG_OPERATIONAL_NEG	0x01	iscsi.h
39846	ISCSI_LOGIN_NSG_FULL_FEATURE_PH	0x03	iscsi.h
39847	ISCSI_ISID_IANA	0x40000000	iscsi.h
39848	IANA_EN_FEN_SYSTEMS	10019	iscsi.h
39849	ISCSI_OPCODE_LOGIN_RESPONSE	0x23	iscsi.h
39850	ISCSI_STATUS_SUCCESS	0x00	iscsi.h
39851	ISCSI_STATUS_REDIRECT	0x01	iscsi.h
39852	ISCSI_STATUS_INITIATOR_ERROR	0x02	iscsi.h
39853	ISCSI_STATUS_INITIATOR_ERROR_AU	0x01	iscsi.h
39854	ISCSI_STATUS_INITIATOR_ERROR_AU	0x02	iscsi.h
39855	ISCSI_STATUS_INITIATOR_ERROR_NO	0x03	iscsi.h
39856	ISCSI_STATUS_INITIATOR_ERROR_RE	0x04	iscsi.h
39857	ISCSI_STATUS_TARGET_ERROR	0x03	iscsi.h
39858	ISCSI_OPCODE_SCSI_COMMAND	0x01	iscsi.h
39859	ISCSI_COMMAND_FLAG_READ	0x40	iscsi.h
39860	ISCSI_COMMAND_FLAG_WRITE	0x20	iscsi.h
39861	ISCSI_COMMAND_ATTR_UNTAGGED	0x00	iscsi.h
39862	ISCSI_COMMAND_ATTR_SIMPLE	0x01	iscsi.h
39863	ISCSI_COMMAND_ATTR_ORDERED	0x02	iscsi.h
39864	ISCSI_COMMAND_ATTR_HEAD_OF_QUEU	0x03	iscsi.h
39865	ISCSI_COMMAND_ATTR_ACA	0x04	iscsi.h
39866	ISCSI_OPCODE_SCSI_RESPONSE	0x21	iscsi.h
39867	ISCSI_RESPONSE_COMMAND_COMPLETE	0x00	iscsi.h
39868	ISCSI_RESPONSE_TARGET_FAILURE	0x01	iscsi.h
39869	ISCSI_SENSE_RESPONSE_CODE_OFFSE	2	iscsi.h
39870	ISCSI_OPCODE_DATA_IN	0x25	iscsi.h
39871	ISCSI_DATA_FLAG_ACKNOWLEDGE	0x40	iscsi.h
39872	ISCSI_DATA_FLAG_OVERFLOW	0x04	iscsi.h
39873	ISCSI_DATA_FLAG_UNDERFLOW	0x02	iscsi.h
39874	ISCSI_DATA_FLAG_STATUS	0x01	iscsi.h
39875	ISCSI_OPCODE_DATA_OUT	0x05	iscsi.h
39876	ISCSI_OPCODE_R2T	0x31	iscsi.h
39877	ISCSI_STATUS_SECURITY_NEGOTIATI	( ISCSI_LOGIN_CSG_SECURITY_NEGOTIATION \| \ ISCSI_LOGIN_NSG_OPERATIONAL_NEGOTIATION )	iscsi.h
39878	ISCSI_STATUS_OPERATIONAL_NEGOTI	( ISCSI_LOGIN_CSG_OPERATIONAL_NEGOTIATION \| \ ISCSI_LOGIN_NSG_FULL_FEATURE_PHASE )	iscsi.h
39879	ISCSI_STATUS_FULL_FEATURE_PHASE	ISCSI_LOGIN_CSG_FULL_FEATURE_PHASE	iscsi.h
39880	ISCSI_STATUS_PHASE_MASK	( ISCSI_LOGIN_CSG_MASK \| ISCSI_LOGIN_NSG_MASK )	iscsi.h
39881	ISCSI_STATUS_STRINGS_SECURITY	0x0100	iscsi.h
39882	ISCSI_STATUS_STRINGS_CHAP_ALGOR	0x0200	iscsi.h
39883	ISCSI_STATUS_STRINGS_CHAP_RESPO	0x0400	iscsi.h
39884	ISCSI_STATUS_STRINGS_CHAP_CHALL	0x0800	iscsi.h
39885	ISCSI_STATUS_STRINGS_OPERATIONA	0x1000	iscsi.h
39886	ISCSI_STATUS_STRINGS_MASK	0xff00	iscsi.h
39887	ISCSI_STATUS_AUTH_FORWARD_REQUI	0x00010000	iscsi.h
39888	ISCSI_STATUS_AUTH_REVERSE_REQUI	0x00020000	iscsi.h
39889	ISCSI_STATUS_AUTH_REVERSE_OK	0x00040000	iscsi.h
39890	ISCSI_MAX_RETRIES	2	iscsi.h
39891	NUL	0x00	keys.h
39892	CTRL_A	0x01	keys.h
39893	CTRL_B	0x02	keys.h
39894	CTRL_C	0x03	keys.h
39895	CTRL_D	0x04	keys.h
39896	CTRL_E	0x05	keys.h
39897	CTRL_F	0x06	keys.h
39898	CTRL_G	0x07	keys.h
39899	CTRL_H	0x08	keys.h
39900	CTRL_I	0x09	keys.h
39901	CTRL_J	0x0a	keys.h
39902	CTRL_K	0x0b	keys.h
39903	CTRL_L	0x0c	keys.h
39904	CTRL_M	0x0d	keys.h
39905	CTRL_N	0x0e	keys.h
39906	CTRL_O	0x0f	keys.h
39907	CTRL_P	0x10	keys.h
39908	CTRL_Q	0x11	keys.h
39909	CTRL_R	0x12	keys.h
39910	CTRL_S	0x13	keys.h
39911	CTRL_T	0x14	keys.h
39912	CTRL_U	0x15	keys.h
39913	CTRL_V	0x16	keys.h
39914	CTRL_W	0x17	keys.h
39915	CTRL_X	0x18	keys.h
39916	CTRL_Y	0x19	keys.h
39917	CTRL_Z	0x1a	keys.h
39918	BACKSPACE	CTRL_H	keys.h
39919	TAB	CTRL_I	keys.h
39920	LF	CTRL_J	keys.h
39921	CR	CTRL_M	keys.h
39922	ESC	0x1b	keys.h
39923	KEY_MIN	0x101	keys.h
39924	KEY_UP	KEY_ANSI ( 0, 'A' )	keys.h	*< Up arrow
39925	KEY_DOWN	KEY_ANSI ( 0, 'B' )	keys.h	*< Down arrow
39926	KEY_RIGHT	KEY_ANSI ( 0, 'C' )	keys.h	*< Right arrow
39927	KEY_LEFT	KEY_ANSI ( 0, 'D' )	keys.h	*< Left arrow
39928	KEY_END	KEY_ANSI ( 0, 'F' )	keys.h	*< End
39929	KEY_HOME	KEY_ANSI ( 0, 'H' )	keys.h	*< Home
39930	KEY_IC	KEY_ANSI ( 2, '~' )	keys.h	*< Insert
39931	KEY_DC	KEY_ANSI ( 3, '~' )	keys.h	*< Delete
39932	KEY_PPAGE	KEY_ANSI ( 5, '~' )	keys.h	*< Page up
39933	KEY_NPAGE	KEY_ANSI ( 6, '~' )	keys.h	*< Page down
39934	KEY_F8	KEY_ANSI ( 19, '~' )	keys.h	*< F8 (for PXE)
39935	KEY_BACKSPACE	BACKSPACE	keys.h
39936	KEY_ENTER	LF	keys.h
39937	printk	printf	linux_compat.h
39938	MCA_MOTHERBOARD_SETUP_REG	0x94	mca.h
39939	MCA_ADAPTER_SETUP_REG	0x96	mca.h
39940	MCA_MAX_SLOT_NR	0x07	mca.h	Must be 2^n - 1
39941	GENERIC_MCA_VENDOR	ISA_VENDOR ( 'M', 'C', 'A' )	mca.h
39942	MCA_DRIVERS	__table ( struct mca_driver, "mca_drivers" )	mca.h
39943	__mca_driver	__table_entry ( MCA_DRIVERS, 01 )	mca.h
39944	MD5_DIGEST_SIZE	16	md5.h
39945	MD5_BLOCK_WORDS	16	md5.h
39946	MD5_HASH_WORDS	4	md5.h
39947	MD5_CTX_SIZE	sizeof ( struct md5_ctx )	md5.h
39948	MAX_MEMORY_REGIONS	8	memmap.h
39949	NDP_STATE_INVALID	0	ndp.h
39950	NDP_STATE_INCOMPLETE	1	ndp.h
39951	NDP_STATE_REACHABLE	2	ndp.h
39952	NDP_STATE_DELAY	3	ndp.h
39953	NDP_STATE_PROBE	4	ndp.h
39954	NDP_STATE_STALE	5	ndp.h
39955	NET80211_BAND_2GHZ	0	net80211.h
39956	NET80211_BAND_5GHZ	1	net80211.h
39957	NET80211_NR_BANDS	2	net80211.h
39958	NET80211_BAND_BIT_2GHZ	(1 << 0)	net80211.h
39959	NET80211_BAND_BIT_5GHZ	(1 << 1)	net80211.h
39960	NET80211_MODE_A	(1 << 0)	net80211.h
39961	NET80211_MODE_B	(1 << 1)	net80211.h
39962	NET80211_MODE_G	(1 << 2)	net80211.h
39963	NET80211_MODE_N	(1 << 3)	net80211.h
39964	NET80211_CFG_CHANNEL	(1 << 0)	net80211.h
39965	NET80211_CFG_RATE	(1 << 1)	net80211.h
39966	NET80211_CFG_ASSOC	(1 << 2)	net80211.h
39967	NET80211_CFG_PHY_PARAMS	(1 << 3)	net80211.h
39968	NET80211_STATUS_MASK	0x7F	net80211.h
39969	NET80211_IS_REASON	0x80	net80211.h
39970	NET80211_PROBED	(1 << 8)	net80211.h
39971	NET80211_AUTHENTICATED	(1 << 9)	net80211.h
39972	NET80211_ASSOCIATED	(1 << 10)	net80211.h
39973	NET80211_CRYPTO_SYNCED	(1 << 11)	net80211.h
39974	NET80211_WORKING	(1 << 12)	net80211.h
39975	NET80211_WAITING	(1 << 13)	net80211.h
39976	NET80211_NO_ASSOC	(1 << 14)	net80211.h
39977	NET80211_AUTO_SSID	(1 << 15)	net80211.h
39978	NET80211_PHY_USE_PROTECTION	(1 << 1)	net80211.h
39979	NET80211_PHY_USE_SHORT_PREAMBLE	(1 << 2)	net80211.h
39980	NET80211_PHY_USE_SHORT_SLOT	(1 << 3)	net80211.h
39981	NET80211_MAX_RATES	16	net80211.h
39982	NET80211_MAX_CHANNELS	32	net80211.h
39983	NET80211_FRAG_TIMEOUT	2	net80211.h
39984	NET80211_NR_CONCURRENT_FRAGS	3	net80211.h
39985	NET80211_REG_TXPOWER	20	net80211.h
39986	NET80211_HANDSHAKERS	__table ( struct net80211_handshaker, \ "net80211_handshakers" )	net80211.h
39987	__net80211_handshaker	__table_entry ( NET80211_HANDSHAKERS, 01 )	net80211.h
39988	NET80211_CRYPTOS	__table ( struct net80211_crypto, "net80211_cryptos" )	net80211.h
39989	__net80211_crypto	__table_entry ( NET80211_CRYPTOS, 01 )	net80211.h
39990	MAX_HW_ADDR_LEN	8	netdevice.h
39991	MAX_LL_ADDR_LEN	20	netdevice.h
39992	MAX_LL_HEADER_LEN	32	netdevice.h
39993	MAX_NET_ADDR_LEN	4	netdevice.h
39994	NETDEV_MAX_UNIQUE_ERRORS	4	netdevice.h
39995	NETDEV_OPEN	0x0001	netdevice.h
39996	LL_PROTOCOLS	__table ( struct ll_protocol, "ll_protocols" )	netdevice.h
39997	__ll_protocol	__table_entry ( LL_PROTOCOLS, 01 )	netdevice.h
39998	NET_PROTOCOLS	__table ( struct net_protocol, "net_protocols" )	netdevice.h
39999	__net_protocol	__table_entry ( NET_PROTOCOLS, 01 )	netdevice.h
40000	NAP_PREFIX_null	__null_	null_nap.h
40001	URI_OPENERS	__table ( struct uri_opener, "uri_openers" )	open.h
40002	__uri_opener	__table_entry ( URI_OPENERS, 01 )	open.h
40003	SOCKET_OPENERS	__table ( struct socket_opener, "socket_openers" )	open.h
40004	__socket_opener	__table_entry ( SOCKET_OPENERS, 01 )	open.h
40005	PCI_COMMAND_IO	0x1	pci.h	Enable response in I/O space
40006	PCI_COMMAND_MEM	0x2	pci.h	Enable response in mem space
40007	PCI_COMMAND_MASTER	0x4	pci.h	Enable bus mastering
40008	PCI_CACHE_LINE_SIZE	0x0c	pci.h	8 bits
40009	PCI_LATENCY_TIMER	0x0d	pci.h	8 bits
40010	PCI_COMMAND_SPECIAL	0x8	pci.h	Enable response to special cycles
40011	PCI_COMMAND_INVALIDATE	0x10	pci.h	Use memory write and invalidate
40012	PCI_COMMAND_VGA_PALETTE	0x20	pci.h	Enable palette snooping
40013	PCI_COMMAND_PARITY	0x40	pci.h	Enable parity checking
40014	PCI_COMMAND_WAIT	0x80	pci.h	Enable address/data stepping
40015	PCI_COMMAND_SERR	0x100	pci.h	Enable SERR
40016	PCI_COMMAND_FAST_BACK	0x200	pci.h	Enable back-to-back writes
40017	PCI_COMMAND_INTX_DISABLE	0x400	pci.h	INTx Emulation Disable
40018	PCI_VENDOR_ID	0x00	pci.h	16 bits
40019	PCI_DEVICE_ID	0x02	pci.h	16 bits
40020	PCI_COMMAND	0x04	pci.h	16 bits
40021	PCI_STATUS	0x06	pci.h	16 bits
40022	PCI_STATUS_CAP_LIST	0x10	pci.h	Support Capability List
40023	PCI_STATUS_66MHZ	0x20	pci.h	Support 66 Mhz PCI 2.1 bus
40024	PCI_STATUS_UDF	0x40	pci.h	Support User Definable Features [obsolete]
40025	PCI_STATUS_FAST_BACK	0x80	pci.h	Accept fast-back to back
40026	PCI_STATUS_PARITY	0x100	pci.h	Detected parity error
40027	PCI_STATUS_DEVSEL_MASK	0x600	pci.h	DEVSEL timing
40028	PCI_STATUS_DEVSEL_FAST	0x000	pci.h
40029	PCI_STATUS_DEVSEL_MEDIUM	0x200	pci.h
40030	PCI_STATUS_DEVSEL_SLOW	0x400	pci.h
40031	PCI_STATUS_SIG_TARGET_ABORT	0x800	pci.h	Set on target abort
40032	PCI_STATUS_REC_TARGET_ABORT	0x1000	pci.h	Master ack of "
40033	PCI_STATUS_REC_MASTER_ABORT	0x2000	pci.h	Set on master abort
40034	PCI_STATUS_SIG_SYSTEM_ERROR	0x4000	pci.h	Set when we drive SERR
40035	PCI_STATUS_DETECTED_PARITY	0x8000	pci.h	Set on parity error
40036	PCI_REVISION	0x08	pci.h	8 bits
40037	PCI_REVISION_ID	0x08	pci.h	8 bits
40038	PCI_CLASS_REVISION	0x08	pci.h	32 bits
40039	PCI_CLASS_CODE	0x0b	pci.h	8 bits
40040	PCI_SUBCLASS_CODE	0x0a	pci.h	8 bits
40041	PCI_HEADER_TYPE	0x0e	pci.h	8 bits
40042	PCI_HEADER_TYPE_NORMAL	0	pci.h
40043	PCI_HEADER_TYPE_BRIDGE	1	pci.h
40044	PCI_HEADER_TYPE_CARDBUS	2	pci.h
40045	PCI_CARDBUS_CIS	0x28	pci.h
40046	PCI_SUBSYSTEM_VENDOR_ID	0x2c	pci.h
40047	PCI_SUBSYSTEM_ID	0x2e	pci.h
40048	PCI_BASE_ADDRESS_0	0x10	pci.h	32 bits
40049	PCI_BASE_ADDRESS_1	0x14	pci.h	32 bits
40050	PCI_BASE_ADDRESS_2	0x18	pci.h	32 bits
40051	PCI_BASE_ADDRESS_3	0x1c	pci.h	32 bits
40052	PCI_BASE_ADDRESS_4	0x20	pci.h	32 bits
40053	PCI_BASE_ADDRESS_5	0x24	pci.h	32 bits
40054	PCI_BASE_ADDRESS_SPACE	0x01	pci.h	0 = memory, 1 = I/O
40055	PCI_BASE_ADDRESS_SPACE_IO	0x01	pci.h
40056	PCI_BASE_ADDRESS_SPACE_MEMORY	0x00	pci.h
40057	PCI_BASE_ADDRESS_MEM_TYPE_MASK	0x06	pci.h
40058	PCI_BASE_ADDRESS_MEM_TYPE_32	0x00	pci.h	32 bit address
40059	PCI_BASE_ADDRESS_MEM_TYPE_1M	0x02	pci.h	Below 1M [obsolete]
40060	PCI_BASE_ADDRESS_MEM_TYPE_64	0x04	pci.h	64 bit address
40061	PCI_BASE_ADDRESS_MEM_MASK	(~0x0f)	pci.h
40062	PCI_BASE_ADDRESS_IO_MASK	(~0x03)	pci.h
40063	PCI_ROM_ADDRESS	0x30	pci.h	32 bits
40064	PCI_ROM_ADDRESS_ENABLE	0x01	pci.h	Write 1 to enable ROM,
40065	PCI_CAPABILITY_LIST	0x34	pci.h	Offset of first capability list entry
40066	PCI_INTERRUPT_LINE	0x3c	pci.h	IRQ number (0-15)
40067	PCI_INTERRUPT_PIN	0x3d	pci.h	IRQ pin on PCI bus (A-D)
40068	PCI_PRIMARY_BUS	0x18	pci.h	Primary bus number
40069	PCI_SECONDARY_BUS	0x19	pci.h	Secondary bus number
40070	PCI_SUBORDINATE_BUS	0x1a	pci.h	Highest bus number behind the bridge
40071	PCI_SEC_LATENCY_TIMER	0x1b	pci.h	Latency timer for secondary interface
40072	PCI_IO_BASE	0x1c	pci.h	I/O range behind the bridge
40073	PCI_IO_LIMIT	0x1d	pci.h
40074	PCI_IO_RANGE_TYPE_MASK	0x0f	pci.h	I/O bridging type
40075	PCI_IO_RANGE_TYPE_16	0x00	pci.h
40076	PCI_IO_RANGE_TYPE_32	0x01	pci.h
40077	PCI_IO_RANGE_MASK	~0x0f	pci.h
40078	PCI_SEC_STATUS	0x1e	pci.h	Secondary status register, only bit 14 used
40079	PCI_MEMORY_BASE	0x20	pci.h	Memory range behind
40080	PCI_MEMORY_LIMIT	0x22	pci.h
40081	PCI_MEMORY_RANGE_TYPE_MASK	0x0f	pci.h
40082	PCI_MEMORY_RANGE_MASK	~0x0f	pci.h
40083	PCI_PREF_MEMORY_BASE	0x24	pci.h	Prefetchable memory range behind
40084	PCI_PREF_MEMORY_LIMIT	0x26	pci.h
40085	PCI_PREF_RANGE_TYPE_MASK	0x0f	pci.h
40086	PCI_PREF_RANGE_TYPE_32	0x00	pci.h
40087	PCI_PREF_RANGE_TYPE_64	0x01	pci.h
40088	PCI_PREF_RANGE_MASK	~0x0f	pci.h
40089	PCI_PREF_BASE_UPPER32	0x28	pci.h	Upper half of prefetchable memory range
40090	PCI_PREF_LIMIT_UPPER32	0x2c	pci.h
40091	PCI_IO_BASE_UPPER16	0x30	pci.h	Upper half of I/O addresses
40092	PCI_IO_LIMIT_UPPER16	0x32	pci.h
40093	PCI_ROM_ADDRESS1	0x38	pci.h	Same as PCI_ROM_ADDRESS, but for htype 1
40094	PCI_BRIDGE_CONTROL	0x3e	pci.h
40095	PCI_BRIDGE_CTL_PARITY	0x01	pci.h	Enable parity detection on secondary interface
40096	PCI_BRIDGE_CTL_SERR	0x02	pci.h	The same for SERR forwarding
40097	PCI_BRIDGE_CTL_NO_ISA	0x04	pci.h	Disable bridging of ISA ports
40098	PCI_BRIDGE_CTL_VGA	0x08	pci.h	Forward VGA addresses
40099	PCI_BRIDGE_CTL_MASTER_ABORT	0x20	pci.h	Report master aborts
40100	PCI_BRIDGE_CTL_BUS_RESET	0x40	pci.h	Secondary bus reset
40101	PCI_BRIDGE_CTL_FAST_BACK	0x80	pci.h	Fast Back2Back enabled on secondary interface
40102	PCI_CB_CAPABILITY_LIST	0x14	pci.h
40103	PCI_CAP_LIST_ID	0	pci.h	Capability ID
40104	PCI_CAP_ID_PM	0x01	pci.h	Power Management
40105	PCI_CAP_ID_AGP	0x02	pci.h	Accelerated Graphics Port
40106	PCI_CAP_ID_VPD	0x03	pci.h	Vital Product Data
40107	PCI_CAP_ID_SLOTID	0x04	pci.h	Slot Identification
40108	PCI_CAP_ID_MSI	0x05	pci.h	Message Signalled Interrupts
40109	PCI_CAP_ID_CHSWP	0x06	pci.h	CompactPCI HotSwap
40110	PCI_CAP_ID_EXP	0x10	pci.h	PCI Express
40111	PCI_CAP_LIST_NEXT	1	pci.h	Next capability in the list
40112	PCI_CAP_FLAGS	2	pci.h	Capability defined flags (16 bits)
40113	PCI_CAP_SIZEOF	4	pci.h
40114	PCI_PM_PMC	2	pci.h	PM Capabilities Register
40115	PCI_PM_CAP_VER_MASK	0x0007	pci.h	Version
40116	PCI_PM_CAP_PME_CLOCK	0x0008	pci.h	PME clock required
40117	PCI_PM_CAP_RESERVED	0x0010	pci.h	Reserved field
40118	PCI_PM_CAP_DSI	0x0020	pci.h	Device specific initialization
40119	PCI_PM_CAP_AUX_POWER	0x01C0	pci.h	Auxilliary power support mask
40120	PCI_PM_CAP_D1	0x0200	pci.h	D1 power state support
40121	PCI_PM_CAP_D2	0x0400	pci.h	D2 power state support
40122	PCI_PM_CAP_PME	0x0800	pci.h	PME pin supported
40123	PCI_PM_CAP_PME_MASK	0xF800	pci.h	PME Mask of all supported states
40124	PCI_PM_CAP_PME_D0	0x0800	pci.h	PME# from D0
40125	PCI_PM_CAP_PME_D1	0x1000	pci.h	PME# from D1
40126	PCI_PM_CAP_PME_D2	0x2000	pci.h	PME# from D2
40127	PCI_PM_CAP_PME_D3	0x4000	pci.h	PME# from D3 (hot)
40128	PCI_PM_CAP_PME_D3cold	0x8000	pci.h	PME# from D3 (cold)
40129	PCI_PM_CTRL	4	pci.h	PM control and status register
40130	PCI_PM_CTRL_STATE_MASK	0x0003	pci.h	Current power state (D0 to D3)
40131	PCI_PM_CTRL_PME_ENABLE	0x0100	pci.h	PME pin enable
40132	PCI_PM_CTRL_DATA_SEL_MASK	0x1e00	pci.h	Data select (??)
40133	PCI_PM_CTRL_DATA_SCALE_MASK	0x6000	pci.h	Data scale (??)
40134	PCI_PM_CTRL_PME_STATUS	0x8000	pci.h	PME pin status
40135	PCI_PM_PPB_EXTENSIONS	6	pci.h	PPB support extensions (??)
40136	PCI_PM_PPB_B2_B3	0x40	pci.h	Stop clock when in D3hot (??)
40137	PCI_PM_BPCC_ENABLE	0x80	pci.h	Bus power/clock control enable (??)
40138	PCI_PM_DATA_REGISTER	7	pci.h	(??)
40139	PCI_PM_SIZEOF	8	pci.h
40140	PCI_AGP_VERSION	2	pci.h	BCD version number
40141	PCI_AGP_RFU	3	pci.h	Rest of capability flags
40142	PCI_AGP_STATUS	4	pci.h	Status register
40143	PCI_AGP_STATUS_RQ_MASK	0xff000000	pci.h	Maximum number of requests - 1
40144	PCI_AGP_STATUS_SBA	0x0200	pci.h	Sideband addressing supported
40145	PCI_AGP_STATUS_64BIT	0x0020	pci.h	64-bit addressing supported
40146	PCI_AGP_STATUS_FW	0x0010	pci.h	FW transfers supported
40147	PCI_AGP_STATUS_RATE4	0x0004	pci.h	4x transfer rate supported
40148	PCI_AGP_STATUS_RATE2	0x0002	pci.h	2x transfer rate supported
40149	PCI_AGP_STATUS_RATE1	0x0001	pci.h	1x transfer rate supported
40150	PCI_AGP_COMMAND	8	pci.h	Control register
40151	PCI_AGP_COMMAND_RQ_MASK	0xff000000	pci.h	Master: Maximum number of requests
40152	PCI_AGP_COMMAND_SBA	0x0200	pci.h	Sideband addressing enabled
40153	PCI_AGP_COMMAND_AGP	0x0100	pci.h	Allow processing of AGP transactions
40154	PCI_AGP_COMMAND_64BIT	0x0020	pci.h	Allow processing of 64-bit addresses
40155	PCI_AGP_COMMAND_FW	0x0010	pci.h	Force FW transfers
40156	PCI_AGP_COMMAND_RATE4	0x0004	pci.h	Use 4x rate
40157	PCI_AGP_COMMAND_RATE2	0x0002	pci.h	Use 2x rate
40158	PCI_AGP_COMMAND_RATE1	0x0001	pci.h	Use 1x rate
40159	PCI_AGP_SIZEOF	12	pci.h
40160	PCI_SID_ESR	2	pci.h	Expansion Slot Register
40161	PCI_SID_ESR_NSLOTS	0x1f	pci.h	Number of expansion slots available
40162	PCI_SID_ESR_FIC	0x20	pci.h	First In Chassis Flag
40163	PCI_SID_CHASSIS_NR	3	pci.h	Chassis Number
40164	PCI_MSI_FLAGS	2	pci.h	Various flags
40165	PCI_MSI_FLAGS_64BIT	0x80	pci.h	64-bit addresses allowed
40166	PCI_MSI_FLAGS_QSIZE	0x70	pci.h	Message queue size configured
40167	PCI_MSI_FLAGS_QMASK	0x0e	pci.h	Maximum queue size available
40168	PCI_MSI_FLAGS_ENABLE	0x01	pci.h	MSI feature enabled
40169	PCI_MSI_RFU	3	pci.h	Rest of capability flags
40170	PCI_MSI_ADDRESS_LO	4	pci.h	Lower 32 bits
40171	PCI_MSI_ADDRESS_HI	8	pci.h	Upper 32 bits (if PCI_MSI_FLAGS_64BIT set)
40172	PCI_MSI_DATA_32	8	pci.h	16 bits of data for 32-bit devices
40173	PCI_MSI_DATA_64	12	pci.h	16 bits of data for 64-bit devices
40174	PCI_ERR_UNCOR_STATUS	4	pci.h	Uncorrectable Error Status
40175	PCI_ERR_UNC_TRAIN	0x00000001	pci.h	Training
40176	PCI_ERR_UNC_DLP	0x00000010	pci.h	Data Link Protocol
40177	PCI_ERR_UNC_POISON_TLP	0x00001000	pci.h	Poisoned TLP
40178	PCI_ERR_UNC_FCP	0x00002000	pci.h	Flow Control Protocol
40179	PCI_ERR_UNC_COMP_TIME	0x00004000	pci.h	Completion Timeout
40180	PCI_ERR_UNC_COMP_ABORT	0x00008000	pci.h	Completer Abort
40181	PCI_ERR_UNC_UNX_COMP	0x00010000	pci.h	Unexpected Completion
40182	PCI_ERR_UNC_RX_OVER	0x00020000	pci.h	Receiver Overflow
40183	PCI_ERR_UNC_MALF_TLP	0x00040000	pci.h	Malformed TLP
40184	PCI_ERR_UNC_ECRC	0x00080000	pci.h	ECRC Error Status
40185	PCI_ERR_UNC_UNSUP	0x00100000	pci.h	Unsupported Request
40186	PCI_ERR_UNCOR_MASK	8	pci.h	Uncorrectable Error Mask
40187	PCI_ERR_UNCOR_SEVER	12	pci.h	Uncorrectable Error Severity
40188	PCI_ERR_COR_STATUS	16	pci.h	Correctable Error Status
40189	PCI_ERR_COR_RCVR	0x00000001	pci.h	Receiver Error Status
40190	PCI_ERR_COR_BAD_TLP	0x00000040	pci.h	Bad TLP Status
40191	PCI_ERR_COR_BAD_DLLP	0x00000080	pci.h	Bad DLLP Status
40192	PCI_ERR_COR_REP_ROLL	0x00000100	pci.h	REPLAY_NUM Rollover
40193	PCI_ERR_COR_REP_TIMER	0x00001000	pci.h	Replay Timer Timeout
40194	PCI_ERR_COR_MASK	20	pci.h	Correctable Error Mask
40195	PCI_ANY_ID	0xffff	pci.h
40196	PCI_DRIVERS	__table ( struct pci_driver, "pci_drivers" )	pci.h
40197	__pci_driver	__table_entry ( PCI_DRIVERS, 01 )	pci.h
40198	PCI_CONFIG_BACKUP_EXCLUDE_END	0xff	pcibackup.h
40199	PCI_CLASS_NOT_DEFINED	0x0000	pci_ids.h
40200	PCI_CLASS_NOT_DEFINED_VGA	0x0001	pci_ids.h
40201	PCI_BASE_CLASS_STORAGE	0x01	pci_ids.h
40202	PCI_CLASS_STORAGE_SCSI	0x0100	pci_ids.h
40203	PCI_CLASS_STORAGE_IDE	0x0101	pci_ids.h
40204	PCI_CLASS_STORAGE_FLOPPY	0x0102	pci_ids.h
40205	PCI_CLASS_STORAGE_IPI	0x0103	pci_ids.h
40206	PCI_CLASS_STORAGE_RAID	0x0104	pci_ids.h
40207	PCI_CLASS_STORAGE_OTHER	0x0180	pci_ids.h
40208	PCI_BASE_CLASS_NETWORK	0x02	pci_ids.h
40209	PCI_CLASS_NETWORK_ETHERNET	0x0200	pci_ids.h
40210	PCI_CLASS_NETWORK_TOKEN_RING	0x0201	pci_ids.h
40211	PCI_CLASS_NETWORK_FDDI	0x0202	pci_ids.h
40212	PCI_CLASS_NETWORK_ATM	0x0203	pci_ids.h
40213	PCI_CLASS_NETWORK_OTHER	0x0280	pci_ids.h
40214	PCI_BASE_CLASS_DISPLAY	0x03	pci_ids.h
40215	PCI_CLASS_DISPLAY_VGA	0x0300	pci_ids.h
40216	PCI_CLASS_DISPLAY_XGA	0x0301	pci_ids.h
40217	PCI_CLASS_DISPLAY_3D	0x0302	pci_ids.h
40218	PCI_CLASS_DISPLAY_OTHER	0x0380	pci_ids.h
40219	PCI_BASE_CLASS_MULTIMEDIA	0x04	pci_ids.h
40220	PCI_CLASS_MULTIMEDIA_VIDEO	0x0400	pci_ids.h
40221	PCI_CLASS_MULTIMEDIA_AUDIO	0x0401	pci_ids.h
40222	PCI_CLASS_MULTIMEDIA_PHONE	0x0402	pci_ids.h
40223	PCI_CLASS_MULTIMEDIA_OTHER	0x0480	pci_ids.h
40224	PCI_BASE_CLASS_MEMORY	0x05	pci_ids.h
40225	PCI_CLASS_MEMORY_RAM	0x0500	pci_ids.h
40226	PCI_CLASS_MEMORY_FLASH	0x0501	pci_ids.h
40227	PCI_CLASS_MEMORY_OTHER	0x0580	pci_ids.h
40228	PCI_BASE_CLASS_BRIDGE	0x06	pci_ids.h
40229	PCI_CLASS_BRIDGE_HOST	0x0600	pci_ids.h
40230	PCI_CLASS_BRIDGE_ISA	0x0601	pci_ids.h
40231	PCI_CLASS_BRIDGE_EISA	0x0602	pci_ids.h
40232	PCI_CLASS_BRIDGE_MC	0x0603	pci_ids.h
40233	PCI_CLASS_BRIDGE_PCI	0x0604	pci_ids.h
40234	PCI_CLASS_BRIDGE_PCMCIA	0x0605	pci_ids.h
40235	PCI_CLASS_BRIDGE_NUBUS	0x0606	pci_ids.h
40236	PCI_CLASS_BRIDGE_CARDBUS	0x0607	pci_ids.h
40237	PCI_CLASS_BRIDGE_RACEWAY	0x0608	pci_ids.h
40238	PCI_CLASS_BRIDGE_OTHER	0x0680	pci_ids.h
40239	PCI_BASE_CLASS_COMMUNICATION	0x07	pci_ids.h
40240	PCI_CLASS_COMMUNICATION_SERIAL	0x0700	pci_ids.h
40241	PCI_CLASS_COMMUNICATION_PARALLE	0x0701	pci_ids.h
40242	PCI_CLASS_COMMUNICATION_MULTISE	0x0702	pci_ids.h
40243	PCI_CLASS_COMMUNICATION_MODEM	0x0703	pci_ids.h
40244	PCI_CLASS_COMMUNICATION_OTHER	0x0780	pci_ids.h
40245	PCI_BASE_CLASS_SYSTEM	0x08	pci_ids.h
40246	PCI_CLASS_SYSTEM_PIC	0x0800	pci_ids.h
40247	PCI_CLASS_SYSTEM_DMA	0x0801	pci_ids.h
40248	PCI_CLASS_SYSTEM_TIMER	0x0802	pci_ids.h
40249	PCI_CLASS_SYSTEM_RTC	0x0803	pci_ids.h
40250	PCI_CLASS_SYSTEM_PCI_HOTPLUG	0x0804	pci_ids.h
40251	PCI_CLASS_SYSTEM_OTHER	0x0880	pci_ids.h
40252	PCI_BASE_CLASS_INPUT	0x09	pci_ids.h
40253	PCI_CLASS_INPUT_KEYBOARD	0x0900	pci_ids.h
40254	PCI_CLASS_INPUT_PEN	0x0901	pci_ids.h
40255	PCI_CLASS_INPUT_MOUSE	0x0902	pci_ids.h
40256	PCI_CLASS_INPUT_SCANNER	0x0903	pci_ids.h
40257	PCI_CLASS_INPUT_GAMEPORT	0x0904	pci_ids.h
40258	PCI_CLASS_INPUT_OTHER	0x0980	pci_ids.h
40259	PCI_BASE_CLASS_DOCKING	0x0a	pci_ids.h
40260	PCI_CLASS_DOCKING_GENERIC	0x0a00	pci_ids.h
40261	PCI_CLASS_DOCKING_OTHER	0x0a80	pci_ids.h
40262	PCI_BASE_CLASS_PROCESSOR	0x0b	pci_ids.h
40263	PCI_CLASS_PROCESSOR_386	0x0b00	pci_ids.h
40264	PCI_CLASS_PROCESSOR_486	0x0b01	pci_ids.h
40265	PCI_CLASS_PROCESSOR_PENTIUM	0x0b02	pci_ids.h
40266	PCI_CLASS_PROCESSOR_ALPHA	0x0b10	pci_ids.h
40267	PCI_CLASS_PROCESSOR_POWERPC	0x0b20	pci_ids.h
40268	PCI_CLASS_PROCESSOR_MIPS	0x0b30	pci_ids.h
40269	PCI_CLASS_PROCESSOR_CO	0x0b40	pci_ids.h
40270	PCI_BASE_CLASS_SERIAL	0x0c	pci_ids.h
40271	PCI_CLASS_SERIAL_FIREWIRE	0x0c00	pci_ids.h
40272	PCI_CLASS_SERIAL_ACCESS	0x0c01	pci_ids.h
40273	PCI_CLASS_SERIAL_SSA	0x0c02	pci_ids.h
40274	PCI_CLASS_SERIAL_USB	0x0c03	pci_ids.h
40275	PCI_CLASS_SERIAL_FIBER	0x0c04	pci_ids.h
40276	PCI_CLASS_SERIAL_SMBUS	0x0c05	pci_ids.h
40277	PCI_BASE_CLASS_INTELLIGENT	0x0e	pci_ids.h
40278	PCI_CLASS_INTELLIGENT_I2O	0x0e00	pci_ids.h
40279	PCI_BASE_CLASS_SATELLITE	0x0f	pci_ids.h
40280	PCI_CLASS_SATELLITE_TV	0x0f00	pci_ids.h
40281	PCI_CLASS_SATELLITE_AUDIO	0x0f01	pci_ids.h
40282	PCI_CLASS_SATELLITE_VOICE	0x0f03	pci_ids.h
40283	PCI_CLASS_SATELLITE_DATA	0x0f04	pci_ids.h
40284	PCI_BASE_CLASS_CRYPT	0x10	pci_ids.h
40285	PCI_CLASS_CRYPT_NETWORK	0x1000	pci_ids.h
40286	PCI_CLASS_CRYPT_ENTERTAINMENT	0x1001	pci_ids.h
40287	PCI_CLASS_CRYPT_OTHER	0x1080	pci_ids.h
40288	PCI_BASE_CLASS_SIGNAL_PROCESSIN	0x11	pci_ids.h
40289	PCI_CLASS_SP_DPIO	0x1100	pci_ids.h
40290	PCI_CLASS_SP_OTHER	0x1180	pci_ids.h
40291	PCI_CLASS_OTHERS	0xff	pci_ids.h
40292	PCI_VENDOR_ID_DYNALINK	0x0675	pci_ids.h
40293	PCI_VENDOR_ID_BERKOM	0x0871	pci_ids.h
40294	PCI_VENDOR_ID_COMPAQ	0x0e11	pci_ids.h
40295	PCI_VENDOR_ID_NCR	0x1000	pci_ids.h
40296	PCI_VENDOR_ID_LSI_LOGIC	0x1000	pci_ids.h
40297	PCI_VENDOR_ID_ATI	0x1002	pci_ids.h
40298	PCI_VENDOR_ID_VLSI	0x1004	pci_ids.h
40299	PCI_VENDOR_ID_ADL	0x1005	pci_ids.h
40300	PCI_VENDOR_ID_NS	0x100b	pci_ids.h
40301	PCI_VENDOR_ID_TSENG	0x100c	pci_ids.h
40302	PCI_VENDOR_ID_WEITEK	0x100e	pci_ids.h
40303	PCI_VENDOR_ID_DEC	0x1011	pci_ids.h
40304	PCI_VENDOR_ID_CIRRUS	0x1013	pci_ids.h
40305	PCI_VENDOR_ID_IBM	0x1014	pci_ids.h
40306	PCI_VENDOR_ID_COMPEX2	0x101a	pci_ids.h
40307	PCI_VENDOR_ID_WD	0x101c	pci_ids.h
40308	PCI_VENDOR_ID_AMI	0x101e	pci_ids.h
40309	PCI_VENDOR_ID_AMD	0x1022	pci_ids.h
40310	PCI_VENDOR_ID_TRIDENT	0x1023	pci_ids.h
40311	PCI_VENDOR_ID_AI	0x1025	pci_ids.h
40312	PCI_VENDOR_ID_DELL	0x1028	pci_ids.h
40313	PCI_VENDOR_ID_MATROX	0x102B	pci_ids.h
40314	PCI_VENDOR_ID_CT	0x102c	pci_ids.h
40315	PCI_VENDOR_ID_MIRO	0x1031	pci_ids.h
40316	PCI_VENDOR_ID_NEC	0x1033	pci_ids.h
40317	PCI_VENDOR_ID_FD	0x1036	pci_ids.h
40318	PCI_VENDOR_ID_SIS	0x1039	pci_ids.h
40319	PCI_VENDOR_ID_SI	0x1039	pci_ids.h
40320	PCI_VENDOR_ID_HP	0x103c	pci_ids.h
40321	PCI_VENDOR_ID_PCTECH	0x1042	pci_ids.h
40322	PCI_VENDOR_ID_ASUSTEK	0x1043	pci_ids.h
40323	PCI_VENDOR_ID_DPT	0x1044	pci_ids.h
40324	PCI_VENDOR_ID_OPTI	0x1045	pci_ids.h
40325	PCI_VENDOR_ID_ELSA	0x1048	pci_ids.h
40326	PCI_VENDOR_ID_ELSA	0x1048	pci_ids.h
40327	PCI_VENDOR_ID_SGS	0x104a	pci_ids.h
40328	PCI_VENDOR_ID_BUSLOGIC	0x104B	pci_ids.h
40329	PCI_VENDOR_ID_TI	0x104c	pci_ids.h
40330	PCI_VENDOR_ID_SONY	0x104d	pci_ids.h
40331	PCI_VENDOR_ID_OAK	0x104e	pci_ids.h
40332	PCI_VENDOR_ID_WINBOND2	0x1050	pci_ids.h
40333	PCI_VENDOR_ID_ANIGMA	0x1051	pci_ids.h
40334	PCI_VENDOR_ID_EFAR	0x1055	pci_ids.h
40335	PCI_VENDOR_ID_MOTOROLA	0x1057	pci_ids.h
40336	PCI_VENDOR_ID_MOTOROLA_OOPS	0x1507	pci_ids.h
40337	PCI_VENDOR_ID_PROMISE	0x105a	pci_ids.h
40338	PCI_VENDOR_ID_N9	0x105d	pci_ids.h
40339	PCI_VENDOR_ID_UMC	0x1060	pci_ids.h
40340	PCI_VENDOR_ID_X	0x1061	pci_ids.h
40341	PCI_VENDOR_ID_MYLEX	0x1069	pci_ids.h
40342	PCI_VENDOR_ID_PICOP	0x1066	pci_ids.h
40343	PCI_VENDOR_ID_APPLE	0x106b	pci_ids.h
40344	PCI_VENDOR_ID_YAMAHA	0x1073	pci_ids.h
40345	PCI_VENDOR_ID_NEXGEN	0x1074	pci_ids.h
40346	PCI_VENDOR_ID_QLOGIC	0x1077	pci_ids.h
40347	PCI_VENDOR_ID_CYRIX	0x1078	pci_ids.h
40348	PCI_VENDOR_ID_LEADTEK	0x107d	pci_ids.h
40349	PCI_VENDOR_ID_INTERPHASE	0x107e	pci_ids.h
40350	PCI_VENDOR_ID_CONTAQ	0x1080	pci_ids.h
40351	PCI_VENDOR_ID_FOREX	0x1083	pci_ids.h
40352	PCI_VENDOR_ID_OLICOM	0x108d	pci_ids.h
40353	PCI_VENDOR_ID_SUN	0x108e	pci_ids.h
40354	PCI_VENDOR_ID_CMD	0x1095	pci_ids.h
40355	PCI_VENDOR_ID_VISION	0x1098	pci_ids.h
40356	PCI_VENDOR_ID_BROOKTREE	0x109e	pci_ids.h
40357	PCI_VENDOR_ID_SIERRA	0x10a8	pci_ids.h
40358	PCI_VENDOR_ID_SGI	0x10a9	pci_ids.h
40359	PCI_VENDOR_ID_ACC	0x10aa	pci_ids.h
40360	PCI_VENDOR_ID_WINBOND	0x10ad	pci_ids.h
40361	PCI_VENDOR_ID_DATABOOK	0x10b3	pci_ids.h
40362	PCI_VENDOR_ID_PLX	0x10b5	pci_ids.h
40363	PCI_VENDOR_ID_MADGE	0x10b6	pci_ids.h
40364	PCI_VENDOR_ID_3COM	0x10b7	pci_ids.h
40365	PCI_VENDOR_ID_SMC	0x10b8	pci_ids.h
40366	PCI_VENDOR_ID_SUNDANCE	0x13F0	pci_ids.h
40367	PCI_VENDOR_ID_AL	0x10b9	pci_ids.h
40368	PCI_VENDOR_ID_MITSUBISHI	0x10ba	pci_ids.h
40369	PCI_VENDOR_ID_SURECOM	0x10bd	pci_ids.h
40370	PCI_VENDOR_ID_NEOMAGIC	0x10c8	pci_ids.h
40371	PCI_VENDOR_ID_ASP	0x10cd	pci_ids.h
40372	PCI_VENDOR_ID_MACRONIX	0x10d9	pci_ids.h
40373	PCI_VENDOR_ID_TCONRAD	0x10da	pci_ids.h
40374	PCI_VENDOR_ID_CERN	0x10dc	pci_ids.h
40375	PCI_VENDOR_ID_NVIDIA	0x10de	pci_ids.h
40376	PCI_VENDOR_ID_IMS	0x10e0	pci_ids.h
40377	PCI_VENDOR_ID_TEKRAM2	0x10e1	pci_ids.h
40378	PCI_VENDOR_ID_TUNDRA	0x10e3	pci_ids.h
40379	PCI_VENDOR_ID_AMCC	0x10e8	pci_ids.h
40380	PCI_VENDOR_ID_INTERG	0x10ea	pci_ids.h
40381	PCI_VENDOR_ID_REALTEK	0x10ec	pci_ids.h
40382	PCI_VENDOR_ID_XILINX	0x10ee	pci_ids.h
40383	PCI_VENDOR_ID_TRUEVISION	0x10fa	pci_ids.h
40384	PCI_VENDOR_ID_INIT	0x1101	pci_ids.h
40385	PCI_VENDOR_ID_CREATIVE	0x1102	pci_ids.h
40386	PCI_VENDOR_ID_ECTIVA	0x1102	pci_ids.h
40387	PCI_VENDOR_ID_TTI	0x1103	pci_ids.h
40388	PCI_VENDOR_ID_VIA	0x1106	pci_ids.h
40389	PCI_VENDOR_ID_VIATEC	0x1106	pci_ids.h
40390	PCI_VENDOR_ID_SIEMENS	0x110A	pci_ids.h
40391	PCI_VENDOR_ID_SMC2	0x1113	pci_ids.h
40392	PCI_VENDOR_ID_VORTEX	0x1119	pci_ids.h
40393	PCI_VENDOR_ID_EF	0x111a	pci_ids.h
40394	PCI_VENDOR_ID_IDT	0x111d	pci_ids.h
40395	PCI_VENDOR_ID_FORE	0x1127	pci_ids.h
40396	PCI_VENDOR_ID_IMAGINGTECH	0x112f	pci_ids.h
40397	PCI_VENDOR_ID_PHILIPS	0x1131	pci_ids.h
40398	PCI_VENDOR_ID_EICON	0x1133	pci_ids.h
40399	PCI_VENDOR_ID_CYCLONE	0x113c	pci_ids.h
40400	PCI_VENDOR_ID_ALLIANCE	0x1142	pci_ids.h
40401	PCI_VENDOR_ID_SYSKONNECT	0x1148	pci_ids.h
40402	PCI_VENDOR_ID_VMIC	0x114a	pci_ids.h
40403	PCI_VENDOR_ID_DIGI	0x114f	pci_ids.h
40404	PCI_VENDOR_ID_MUTECH	0x1159	pci_ids.h
40405	PCI_VENDOR_ID_XIRCOM	0x115d	pci_ids.h
40406	PCI_VENDOR_ID_RENDITION	0x1163	pci_ids.h
40407	PCI_VENDOR_ID_SERVERWORKS	0x1166	pci_ids.h
40408	PCI_VENDOR_ID_SBE	0x1176	pci_ids.h
40409	PCI_VENDOR_ID_TOSHIBA	0x1179	pci_ids.h
40410	PCI_VENDOR_ID_RICOH	0x1180	pci_ids.h
40411	PCI_VENDOR_ID_DLINK	0x1186	pci_ids.h
40412	PCI_VENDOR_ID_ARTOP	0x1191	pci_ids.h
40413	PCI_VENDOR_ID_ZEITNET	0x1193	pci_ids.h
40414	PCI_VENDOR_ID_OMEGA	0x119b	pci_ids.h
40415	PCI_VENDOR_ID_FUJITSU_ME	0x119e	pci_ids.h
40416	PCI_SUBVENDOR_ID_KEYSPAN	0x11a9	pci_ids.h
40417	PCI_VENDOR_ID_GALILEO	0x11ab	pci_ids.h
40418	PCI_VENDOR_ID_LINKSYS	0x11ad	pci_ids.h
40419	PCI_VENDOR_ID_LITEON	0x11ad	pci_ids.h
40420	PCI_VENDOR_ID_V3	0x11b0	pci_ids.h
40421	PCI_VENDOR_ID_NP	0x11bc	pci_ids.h
40422	PCI_VENDOR_ID_ATT	0x11c1	pci_ids.h
40423	PCI_VENDOR_ID_SPECIALIX	0x11cb	pci_ids.h
40424	PCI_VENDOR_ID_AURAVISION	0x11d1	pci_ids.h
40425	PCI_VENDOR_ID_ANALOG_DEVICES	0x11d4	pci_ids.h
40426	PCI_VENDOR_ID_IKON	0x11d5	pci_ids.h
40427	PCI_VENDOR_ID_ZORAN	0x11de	pci_ids.h
40428	PCI_VENDOR_ID_KINETIC	0x11f4	pci_ids.h
40429	PCI_VENDOR_ID_COMPEX	0x11f6	pci_ids.h
40430	PCI_VENDOR_ID_RP	0x11fe	pci_ids.h
40431	PCI_VENDOR_ID_CYCLADES	0x120e	pci_ids.h
40432	PCI_VENDOR_ID_ESSENTIAL	0x120f	pci_ids.h
40433	PCI_VENDOR_ID_O2	0x1217	pci_ids.h
40434	PCI_VENDOR_ID_3DFX	0x121a	pci_ids.h
40435	PCI_VENDOR_ID_SIGMADES	0x1236	pci_ids.h
40436	PCI_VENDOR_ID_CCUBE	0x123f	pci_ids.h
40437	PCI_VENDOR_ID_AVM	0x1244	pci_ids.h
40438	PCI_VENDOR_ID_DIPIX	0x1246	pci_ids.h
40439	PCI_VENDOR_ID_STALLION	0x124d	pci_ids.h
40440	PCI_VENDOR_ID_OPTIBASE	0x1255	pci_ids.h
40441	PCI_VENDOR_ID_ESS	0x125d	pci_ids.h
40442	PCI_VENDOR_ID_HARRIS	0x1260	pci_ids.h
40443	PCI_VENDOR_ID_SATSAGEM	0x1267	pci_ids.h
40444	PCI_VENDOR_ID_HUGHES	0x1273	pci_ids.h
40445	PCI_VENDOR_ID_ENSONIQ	0x1274	pci_ids.h
40446	PCI_VENDOR_ID_ROCKWELL	0x127A	pci_ids.h
40447	PCI_VENDOR_ID_DAVICOM	0x1282	pci_ids.h
40448	PCI_VENDOR_ID_ITE	0x1283	pci_ids.h
40449	PCI_VENDOR_ID_ESS_OLD	0x1285	pci_ids.h
40450	PCI_VENDOR_ID_ALTEON	0x12ae	pci_ids.h
40451	PCI_VENDOR_ID_USR	0x12B9	pci_ids.h
40452	PCI_VENDOR_ID_HOLTEK	0x12c3	pci_ids.h
40453	PCI_SUBVENDOR_ID_CONNECT_TECH	0x12c4	pci_ids.h
40454	PCI_VENDOR_ID_PICTUREL	0x12c5	pci_ids.h
40455	PCI_VENDOR_ID_NVIDIA_SGS	0x12d2	pci_ids.h
40456	PCI_SUBVENDOR_ID_CHASE_PCIFAST	0x12E0	pci_ids.h
40457	PCI_SUBVENDOR_ID_CHASE_PCIRAS	0x124D	pci_ids.h
40458	PCI_VENDOR_ID_AUREAL	0x12eb	pci_ids.h
40459	PCI_VENDOR_ID_CBOARDS	0x1307	pci_ids.h
40460	PCI_VENDOR_ID_SIIG	0x131f	pci_ids.h
40461	PCI_VENDOR_ID_ADMTEK	0x1317	pci_ids.h
40462	PCI_VENDOR_ID_DOMEX	0x134a	pci_ids.h
40463	PCI_VENDOR_ID_QUATECH	0x135C	pci_ids.h
40464	PCI_VENDOR_ID_SEALEVEL	0x135e	pci_ids.h
40465	PCI_VENDOR_ID_HYPERCOPE	0x1365	pci_ids.h
40466	PCI_VENDOR_ID_KAWASAKI	0x136b	pci_ids.h
40467	PCI_VENDOR_ID_LMC	0x1376	pci_ids.h
40468	PCI_VENDOR_ID_NETGEAR	0x1385	pci_ids.h
40469	PCI_VENDOR_ID_APPLICOM	0x1389	pci_ids.h
40470	PCI_VENDOR_ID_MOXA	0x1393	pci_ids.h
40471	PCI_VENDOR_ID_CCD	0x1397	pci_ids.h
40472	PCI_VENDOR_ID_MICROGATE	0x13c0	pci_ids.h
40473	PCI_VENDOR_ID_3WARE	0x13C1	pci_ids.h
40474	PCI_VENDOR_ID_ABOCOM	0x13D1	pci_ids.h
40475	PCI_VENDOR_ID_CMEDIA	0x13f6	pci_ids.h
40476	PCI_VENDOR_ID_LAVA	0x1407	pci_ids.h
40477	PCI_VENDOR_ID_TIMEDIA	0x1409	pci_ids.h
40478	PCI_VENDOR_ID_OXSEMI	0x1415	pci_ids.h
40479	PCI_VENDOR_ID_AIRONET	0x14b9	pci_ids.h
40480	PCI_VENDOR_ID_MYRICOM	0x14c1	pci_ids.h
40481	PCI_VENDOR_ID_TITAN	0x14D2	pci_ids.h
40482	PCI_VENDOR_ID_PANACOM	0x14d4	pci_ids.h
40483	PCI_VENDOR_ID_BROADCOM	0x14e4	pci_ids.h
40484	PCI_VENDOR_ID_SYBA	0x1592	pci_ids.h
40485	PCI_VENDOR_ID_MORETON	0x15aa	pci_ids.h
40486	PCI_VENDOR_ID_ZOLTRIX	0x15b0	pci_ids.h
40487	PCI_VENDOR_ID_PDC	0x15e9	pci_ids.h
40488	PCI_VENDOR_ID_FSC	0x1734	pci_ids.h
40489	PCI_VENDOR_ID_SYMPHONY	0x1c1c	pci_ids.h
40490	PCI_VENDOR_ID_TEKRAM	0x1de1	pci_ids.h
40491	PCI_VENDOR_ID_3DLABS	0x3d3d	pci_ids.h
40492	PCI_VENDOR_ID_AVANCE	0x4005	pci_ids.h
40493	PCI_VENDOR_ID_AKS	0x416c	pci_ids.h
40494	PCI_VENDOR_ID_NETVIN	0x4a14	pci_ids.h
40495	PCI_VENDOR_ID_S3	0x5333	pci_ids.h
40496	PCI_VENDOR_ID_DCI	0x6666	pci_ids.h
40497	PCI_VENDOR_ID_GENROCO	0x5555	pci_ids.h
40498	PCI_VENDOR_ID_INTEL	0x8086	pci_ids.h
40499	PCI_VENDOR_ID_COMPUTONE	0x8e0e	pci_ids.h
40500	PCI_SUBVENDOR_ID_COMPUTONE	0x8e0e	pci_ids.h
40501	PCI_VENDOR_ID_KTI	0x8e2e	pci_ids.h
40502	PCI_VENDOR_ID_ADAPTEC	0x9004	pci_ids.h
40503	PCI_VENDOR_ID_ADAPTEC2	0x9005	pci_ids.h
40504	PCI_VENDOR_ID_ATRONICS	0x907f	pci_ids.h
40505	PCI_VENDOR_ID_HOLTEK2	0x9412	pci_ids.h
40506	PCI_VENDOR_ID_NETMOS	0x9710	pci_ids.h
40507	PCI_SUBVENDOR_ID_EXSYS	0xd84d	pci_ids.h
40508	PCI_VENDOR_ID_TIGERJET	0xe159	pci_ids.h
40509	PCI_VENDOR_ID_ARK	0xedd8	pci_ids.h
40510	POSIX_FD_MIN	( 1 )	posix_io.h
40511	POSIX_FD_MAX	( 31 )	posix_io.h
40512	RESOLV_NUMERIC	01	resolv.h
40513	RESOLV_NORMAL	02	resolv.h
40514	RESOLVERS	__table ( struct resolver, "resolvers" )	resolv.h
40515	DEFAULT_MIN_TIMEOUT	( TICKS_PER_SEC / 4 )	retry.h
40516	DEFAULT_MAX_TIMEOUT	( 10 * TICKS_PER_SEC )	retry.h
40517	SANBOOT_PROTOCOLS	__table ( struct sanboot_protocol, "sanboot_protocols" )	sanboot.h
40518	__sanboot_protocol	__table_entry ( SANBOOT_PROTOCOLS, 01 )	sanboot.h
40519	SCSI_OPCODE_READ_10	0x28	scsi.h	*< READ (10)
40520	SCSI_OPCODE_READ_16	0x88	scsi.h	*< READ (16)
40521	SCSI_OPCODE_WRITE_10	0x2a	scsi.h	*< WRITE (10)
40522	SCSI_OPCODE_WRITE_16	0x8a	scsi.h	*< WRITE (16)
40523	SCSI_OPCODE_READ_CAPACITY_10	0x25	scsi.h	*< READ CAPACITY (10)
40524	SCSI_OPCODE_SERVICE_ACTION_IN	0x9e	scsi.h	*< SERVICE ACTION IN
40525	SCSI_SERVICE_ACTION_READ_CAPACI	0x10	scsi.h	*< READ CAPACITY (16)
40526	SCSI_FL_FUA_NV	0x02	scsi.h	*< Force unit access to NVS
40527	SCSI_FL_FUA	0x08	scsi.h	*< Force unit access
40528	SCSI_FL_DPO	0x10	scsi.h	*< Disable cache page out
40529	SCSI_CDB_FORMAT	"%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:" \ "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x"	scsi.h
40530	SETTINGS	__table ( struct setting, "settings" )	settings.h
40531	__setting	__table_entry ( SETTINGS, 01 )	settings.h
40532	SETTING_TYPES	__table ( struct setting_type, "setting_types" )	settings.h
40533	__setting_type	__table_entry ( SETTING_TYPES, 01 )	settings.h
40534	SETTINGS_APPLICATORS	__table ( struct settings_applicator, "settings_applicators" )	settings.h
40535	__settings_applicator	__table_entry ( SETTINGS_APPLICATORS, 01 )	settings.h
40536	SHA1_CTX_SIZE	sizeof ( SHA1_CTX )	sha1.h
40537	SHA1_DIGEST_SIZE	SHA1_SIZE	sha1.h
40538	SMBIOS_SIGNATURE	( ( '_' << 0 ) + ( 'S' << 8 ) + ( 'M' << 16 ) + ( '_' << 24 ) )	smbios.h
40539	SMBIOS_TYPE_SYSTEM_INFORMATION	1	smbios.h
40540	SMBIOS_TYPE_ENCLOSURE_INFORMATI	3	smbios.h
40541	TCP_SOCK_STREAM	0x1	socket.h
40542	SOCK_STREAM	tcp_sock_stream	socket.h
40543	UDP_SOCK_DGRAM	0x2	socket.h
40544	SOCK_DGRAM	udp_sock_dgram	socket.h
40545	AF_INET	1	socket.h	*< IPv4 Internet addresses
40546	AF_INET6	2	socket.h	*< IPv6 Internet addresses
40547	SA_LEN	32	socket.h
40548	SPI_WRSR	0x01	spi.h
40549	SPI_WRITE	0x02	spi.h
40550	SPI_READ	0x03	spi.h
40551	SPI_WRDI	0x04	spi.h
40552	SPI_RDSR	0x05	spi.h
40553	SPI_WREN	0x06	spi.h
40554	ATMEL_SECTOR_ERASE	0x52	spi.h
40555	ATMEL_CHIP_ERASE	0x62	spi.h
40556	ATMEL_RDID	0x15	spi.h
40557	SPI_STATUS_WPEN	0x80	spi.h
40558	SPI_STATUS_BP2	0x10	spi.h
40559	SPI_STATUS_BP1	0x08	spi.h
40560	SPI_STATUS_BP0	0x04	spi.h
40561	SPI_STATUS_WEN	0x02	spi.h
40562	SPI_STATUS_NRDY	0x01	spi.h
40563	SPI_AUTODETECT_ADDRESS_LEN	0	spi.h
40564	SPI_MODE_CPHA	0x01	spi.h
40565	SPI_MODE_CPOL	0x02	spi.h
40566	SPI_MODE_SSPOL	0x10	spi.h
40567	SPI_MODE_MICROWIRE	1	spi.h
40568	SPI_MODE_MICROWIRE_PLUS	0	spi.h
40569	SPI_MODE_THREEWIRE	( SPI_MODE_MICROWIRE_PLUS \| SPI_MODE_SSPOL )	spi.h
40570	SPI_BIT_UDELAY	1	spi_bit.h
40571	SPI_BIT_BIG_ENDIAN	0	spi_bit.h
40572	SPI_BIT_LITTLE_ENDIAN	1	spi_bit.h
40573	SRP_LOGIN_REQ	0x00	srp.h
40574	SRP_LOGIN_REQ_FMT_IDBD	0x04	srp.h
40575	SRP_LOGIN_REQ_FMT_DDBD	0x02	srp.h
40576	SRP_LOGIN_REQ_FLAG_AESOLNT	0x40	srp.h
40577	SRP_LOGIN_REQ_FLAG_CRSOLNT	0x20	srp.h
40578	SRP_LOGIN_REQ_FLAG_LOSOLNT	0x10	srp.h
40579	SRP_LOGIN_REQ_MCA_MASK	0x03	srp.h
40580	SRP_LOGIN_REQ_MCA_SINGLE_CHANNE	0x00	srp.h
40581	SRP_LOGIN_REQ_MCA_MULTIPLE_CHAN	0x01	srp.h
40582	SRP_LOGIN_RSP	0xc0	srp.h
40583	SRP_LOGIN_RSP_FMT_IDBD	0x04	srp.h
40584	SRP_LOGIN_RSP_FMT_DDBD	0x02	srp.h
40585	SRP_LOGIN_RSP_FLAG_SOLNTSUP	0x10	srp.h
40586	SRP_LOGIN_RSP_MCR_MASK	0x03	srp.h
40587	SRP_LOGIN_RSP_MCR_NO_EXISTING_C	0x00	srp.h
40588	SRP_LOGIN_RSP_MCR_EXISTING_CHAN	0x01	srp.h
40589	SRP_LOGIN_RSP_MCR_EXISTING_CHAN	0x02	srp.h
40590	SRP_LOGIN_REJ	0xc2	srp.h
40591	SRP_LOGIN_REJ_REASON_UNKNOWN	0x00010000UL	srp.h
40592	SRP_LOGIN_REJ_REASON_INSUFFICIE	0x00010001UL	srp.h
40593	SRP_LOGIN_REJ_REASON_BAD_MAX_I_	0x00010002UL	srp.h
40594	SRP_LOGIN_REJ_REASON_CANNOT_ASS	0x00010003UL	srp.h
40595	SRP_LOGIN_REJ_REASON_UNSUPPORTE	0x00010004UL	srp.h
40596	SRP_LOGIN_REJ_REASON_NO_MULTIPL	0x00010005UL	srp.h
40597	SRP_LOGIN_REJ_REASON_NO_MORE_CH	0x00010006UL	srp.h
40598	SRP_LOGIN_REJ_FMT_IDBD	0x04	srp.h
40599	SRP_LOGIN_REJ_FMT_DDBD	0x02	srp.h
40600	SRP_I_LOGOUT	0x03	srp.h
40601	SRP_T_LOGOUT	0x80	srp.h
40602	SRP_T_LOGOUT_FLAG_SOLNT	0x01	srp.h
40603	SRP_T_LOGOUT_REASON_UNKNOWN	0x00000000UL	srp.h
40604	SRP_T_LOGOUT_REASON_INACTIVE	0x00000001UL	srp.h
40605	SRP_T_LOGOUT_REASON_INVALID_TYP	0x00000002UL	srp.h
40606	SRP_T_LOGOUT_REASON_SPURIOUS_RE	0x00000003UL	srp.h
40607	SRP_T_LOGOUT_REASON_MCA	0x00000004UL	srp.h
40608	SRP_T_LOGOUT_UNSUPPORTED_DATA_O	0x00000005UL	srp.h
40609	SRP_T_LOGOUT_UNSUPPORTED_DATA_I	0x00000006UL	srp.h
40610	SRP_T_LOGOUT_INVALID_IU_LEN	0x00000008UL	srp.h
40611	SRP_TSK_MGMT	0x01	srp.h
40612	SRP_TSK_MGMT_FLAG_UCSOLNT	0x04	srp.h
40613	SRP_TSK_MGMT_FLAG_SCSOLNT	0x02	srp.h
40614	SRP_TSK_MGMT_FUNC_ABORT_TASK	0x01	srp.h
40615	SRP_TSK_MGMT_FUNC_ABORT_TASK_SE	0x02	srp.h
40616	SRP_TSK_MGMT_FUNC_CLEAR_TASK_SE	0x04	srp.h
40617	SRP_TSK_MGMT_FUNC_LOGICAL_UNIT_	0x08	srp.h
40618	SRP_TSK_MGMT_FUNC_CLEAR_ACA	0x40	srp.h
40619	SRP_CMD	0x02	srp.h
40620	SRP_CMD_FLAG_UCSOLNT	0x04	srp.h
40621	SRP_CMD_FLAG_SCSOLNT	0x02	srp.h
40622	SRP_CMD_DO_FMT_MASK	0xf0	srp.h
40623	SRP_CMD_DO_FMT_DIRECT	0x10	srp.h
40624	SRP_CMD_DO_FMT_INDIRECT	0x20	srp.h
40625	SRP_CMD_DI_FMT_MASK	0x0f	srp.h
40626	SRP_CMD_DI_FMT_DIRECT	0x01	srp.h
40627	SRP_CMD_DI_FMT_INDIRECT	0x02	srp.h
40628	SRP_CMD_TASK_ATTR_SIMPLE	0x00	srp.h
40629	SRP_CMD_TASK_ATTR_QUEUE_HEAD	0x01	srp.h
40630	SRP_CMD_TASK_ATTR_ORDERED	0x02	srp.h
40631	SRP_CMD_TASK_ATTR_AUTOMATIC_CON	0x08	srp.h
40632	SRP_RSP	0xc1	srp.h
40633	SRP_RSP_FLAG_SOLNT	0x01	srp.h
40634	SRP_RSP_VALID_DIUNDER	0x20	srp.h
40635	SRP_RSP_VALID_DIOVER	0x10	srp.h
40636	SRP_RSP_VALID_DOUNDER	0x08	srp.h
40637	SRP_RSP_VALID_DOOVER	0x04	srp.h
40638	SRP_RSP_VALID_SNSVALID	0x02	srp.h
40639	SRP_RSP_VALID_RSPVALID	0x01	srp.h
40640	SRP_CRED_REQ	0x81	srp.h
40641	SRP_CRED_REQ_FLAG_SOLNT	0x01	srp.h
40642	SRP_CRED_RSP	0x41	srp.h
40643	SRP_AER_REQ	0x82	srp.h
40644	SRP_AER_REQ_FLAG_SOLNT	0x01	srp.h
40645	SRP_AER_RSP	0x42	srp.h
40646	SRP_MAX_I_T_IU_LEN	80	srp.h
40647	SRP_MAX_RETRIES	3	srp.h
40648	ICC_ALIGN_HACK_FACTOR	128	tables.h
40649	TCP_OPTION_END	0	tcp.h
40650	TCP_OPTION_NOP	1	tcp.h
40651	TCP_OPTION_MSS	2	tcp.h
40652	TCP_OPTION_TS	8	tcp.h
40653	TCP_CWR	0x80	tcp.h
40654	TCP_ECE	0x40	tcp.h
40655	TCP_URG	0x20	tcp.h
40656	TCP_ACK	0x10	tcp.h
40657	TCP_PSH	0x08	tcp.h
40658	TCP_RST	0x04	tcp.h
40659	TCP_SYN	0x02	tcp.h
40660	TCP_FIN	0x01	tcp.h
40661	TCP_CLOSED	TCP_RST	tcp.h
40662	TCP_LISTEN	0	tcp.h
40663	TCP_SYN_SENT	( TCP_STATE_SENT ( TCP_SYN ) )	tcp.h
40664	TCP_SYN_RCVD	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
40665	TCP_ESTABLISHED	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
40666	TCP_FIN_WAIT_1	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
40667	TCP_FIN_WAIT_2	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN \| TCP_FIN ) \| \ TCP_STATE_RCVD ( TCP_SYN )	tcp.h
40668	TCP_CLOSING_OR_LAST_ACK	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN \| TCP_FI	tcp.h
40669	TCP_TIME_WAIT	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN \| TCP_FIN ) \| \ TCP_STATE_RCVD ( TCP_SYN \|	tcp.h
40670	TCP_CLOSE_WAIT	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN \| TCP_FIN ) )	tcp.h
40671	TCP_MASK_HLEN	0xf0	tcp.h
40672	TCP_MIN_PORT	1	tcp.h
40673	MAX_HDR_LEN	100	tcp.h
40674	MAX_IOB_LEN	1500	tcp.h
40675	MIN_IOB_LEN	MAX_HDR_LEN + 100	tcp.h	To account for padding by LL
40676	TCP_MAX_WINDOW_SIZE	( 65536 - 4 )	tcp.h
40677	TCP_PATH_MTU	1460	tcp.h
40678	TCP_MSS	1460	tcp.h
40679	TCP_MSL	( 2 * 60 * TICKS_PER_SEC )	tcp.h
40680	TCPIP_EMPTY_CSUM	0xffff	tcpip.h
40681	TCPIP_PROTOCOLS	__table ( struct tcpip_protocol, "tcpip_protocols" )	tcpip.h
40682	__tcpip_protocol	__table_entry ( TCPIP_PROTOCOLS, 01 )	tcpip.h
40683	TCPIP_NET_PROTOCOLS	__table ( struct tcpip_net_protocol, "tcpip_net_protocols" )	tcpip.h
40684	__tcpip_net_protocol	__table_entry ( TCPIP_NET_PROTOCOLS, 01 )	tcpip.h
40685	TFTP_PORT	69	tftp.h	*< Default TFTP server port
40686	TFTP_DEFAULT_BLKSIZE	512	tftp.h	*< Default TFTP data block size
40687	TFTP_MAX_BLKSIZE	1432	tftp.h
40688	TFTP_RRQ	1	tftp.h	*< Read request opcode
40689	TFTP_WRQ	2	tftp.h	*< Write request opcode
40690	TFTP_DATA	3	tftp.h	*< Data block opcode
40691	TFTP_ACK	4	tftp.h	*< Data block acknowledgement opcode
40692	TFTP_ERROR	5	tftp.h	*< Error opcode
40693	TFTP_OACK	6	tftp.h	*< Options acknowledgement opcode
40694	TFTP_ERR_FILE_NOT_FOUND	1	tftp.h	*< File not found
40695	TFTP_ERR_ACCESS_DENIED	2	tftp.h	*< Access violation
40696	TFTP_ERR_DISK_FULL	3	tftp.h	*< Disk full or allocation exceeded
40697	TFTP_ERR_ILLEGAL_OP	4	tftp.h	*< Illegal TFTP operation
40698	TFTP_ERR_UNKNOWN_TID	5	tftp.h	*< Unknown transfer ID
40699	TFTP_ERR_FILE_EXISTS	6	tftp.h	*< File already exists
40700	TFTP_ERR_UNKNOWN_USER	7	tftp.h	*< No such user
40701	TFTP_ERR_BAD_OPTS	8	tftp.h	*< Option negotiation failed
40702	MTFTP_PORT	1759	tftp.h	*< Default MTFTP server port
40703	THREEWIRE_READ	0x6	threewire.h
40704	THREEWIRE_WRITE	0x5	threewire.h
40705	THREEWIRE_EWEN	0x4	threewire.h
40706	THREEWIRE_EWEN_ADDRESS	INT_MAX	threewire.h
40707	THREEWIRE_WRITE_MDELAY	10	threewire.h
40708	TICKS_PER_SEC	( ticks_per_sec() )	timer.h
40709	TLS_VERSION_TLS_1_0	0x0301	tls.h
40710	TLS_VERSION_TLS_1_1	0x0302	tls.h
40711	TLS_TYPE_CHANGE_CIPHER	20	tls.h
40712	TLS_TYPE_ALERT	21	tls.h
40713	TLS_TYPE_HANDSHAKE	22	tls.h
40714	TLS_TYPE_DATA	23	tls.h
40715	TLS_HELLO_REQUEST	0	tls.h
40716	TLS_CLIENT_HELLO	1	tls.h
40717	TLS_SERVER_HELLO	2	tls.h
40718	TLS_CERTIFICATE	11	tls.h
40719	TLS_SERVER_KEY_EXCHANGE	12	tls.h
40720	TLS_CERTIFICATE_REQUEST	13	tls.h
40721	TLS_SERVER_HELLO_DONE	14	tls.h
40722	TLS_CERTIFICATE_VERIFY	15	tls.h
40723	TLS_CLIENT_KEY_EXCHANGE	16	tls.h
40724	TLS_FINISHED	20	tls.h
40725	TLS_ALERT_WARNING	1	tls.h
40726	TLS_ALERT_FATAL	2	tls.h
40727	TLS_RSA_WITH_NULL_MD5	0x0001	tls.h
40728	TLS_RSA_WITH_NULL_SHA	0x0002	tls.h
40729	TLS_RSA_WITH_AES_128_CBC_SHA	0x002f	tls.h
40730	TLS_RSA_WITH_AES_256_CBC_SHA	0x0035	tls.h
40731	UNULL	( ( userptr_t ) 0 )	uaccess.h
40732	UDP_MAX_HLEN	72	udp.h
40733	UDP_MAX_TXIOB	ETH_MAX_MTU	udp.h
40734	UDP_MIN_TXIOB	ETH_ZLEN	udp.h
40735	URI_ALL	( URI_SCHEME_BIT \| URI_OPAQUE_BIT \| URI_USER_BIT \| \ URI_PASSWORD_BIT \| URI_HOST_BIT \| URI_PORT_BIT \| \ URI_PATH_BIT \| URI_QUER	uri.h
40736	URI_ENCODED	( URI_USER_BIT \| URI_PASSWORD_BIT \| URI_HOST_BIT \| \ URI_PATH_BIT \| URI_QUERY_BIT \| URI_FRAGMENT_BIT )	uri.h
40737	VIRTIO_PCI_HOST_FEATURES	0	virtio-pci.h
40738	VIRTIO_PCI_GUEST_FEATURES	4	virtio-pci.h
40739	VIRTIO_PCI_QUEUE_PFN	8	virtio-pci.h
40740	VIRTIO_PCI_QUEUE_NUM	12	virtio-pci.h
40741	VIRTIO_PCI_QUEUE_SEL	14	virtio-pci.h
40742	VIRTIO_PCI_QUEUE_NOTIFY	16	virtio-pci.h
40743	VIRTIO_PCI_STATUS	18	virtio-pci.h
40744	VIRTIO_PCI_ISR	19	virtio-pci.h
40745	VIRTIO_PCI_ISR_CONFIG	0x2	virtio-pci.h
40746	VIRTIO_PCI_CONFIG	20	virtio-pci.h
40747	VIRTIO_PCI_ABI_VERSION	0	virtio-pci.h
40748	PAGE_SHIFT	(12)	virtio-ring.h
40749	PAGE_SIZE	(1<<PAGE_SHIFT)	virtio-ring.h
40750	PAGE_MASK	(PAGE_SIZE-1)	virtio-ring.h
40751	VIRTIO_CONFIG_S_ACKNOWLEDGE	1	virtio-ring.h
40752	VIRTIO_CONFIG_S_DRIVER	2	virtio-ring.h
40753	VIRTIO_CONFIG_S_DRIVER_OK	4	virtio-ring.h
40754	VIRTIO_CONFIG_S_FAILED	0x80	virtio-ring.h
40755	MAX_QUEUE_NUM	(512)	virtio-ring.h
40756	VRING_DESC_F_NEXT	1	virtio-ring.h
40757	VRING_DESC_F_WRITE	2	virtio-ring.h
40758	VRING_AVAIL_F_NO_INTERRUPT	1	virtio-ring.h
40759	VRING_USED_F_NO_NOTIFY	1	virtio-ring.h
40760	EAPOL_KEY_TYPE_RSN	2	wpa.h
40761	EAPOL_KEY_TYPE_WPA	254	wpa.h
40762	EAPOL_KEY_INFO_VERSION	0x0007	wpa.h
40763	EAPOL_KEY_INFO_TYPE	0x0008	wpa.h
40764	EAPOL_KEY_INFO_INSTALL	0x0040	wpa.h
40765	EAPOL_KEY_INFO_KEY_ACK	0x0080	wpa.h
40766	EAPOL_KEY_INFO_KEY_MIC	0x0100	wpa.h
40767	EAPOL_KEY_INFO_SECURE	0x0200	wpa.h
40768	EAPOL_KEY_INFO_ERROR	0x0400	wpa.h
40769	EAPOL_KEY_INFO_REQUEST	0x0800	wpa.h
40770	EAPOL_KEY_INFO_KEY_ENC	0x1000	wpa.h
40771	EAPOL_KEY_INFO_SMC_MESS	0x2000	wpa.h
40772	EAPOL_KEY_VERSION_WPA	1	wpa.h
40773	EAPOL_KEY_VERSION_WPA2	2	wpa.h
40774	EAPOL_KEY_TYPE_PTK	0x0008	wpa.h
40775	EAPOL_KEY_TYPE_GTK	0x0000	wpa.h
40776	WPA_NONCE_LEN	32	wpa.h
40777	WPA_TKIP_KEY_LEN	16	wpa.h
40778	WPA_TKIP_MIC_KEY_LEN	8	wpa.h
40779	WPA_CCMP_KEY_LEN	16	wpa.h
40780	WPA_KCK_LEN	16	wpa.h
40781	WPA_KEK_LEN	16	wpa.h
40782	WPA_PMK_LEN	32	wpa.h
40783	WPA_PMKID_LEN	16	wpa.h
40784	WPA_KIES	__table ( struct wpa_kie, "wpa_kies" )	wpa.h
40785	__wpa_kie	__table_entry ( WPA_KIES, 01 )	wpa.h
40786	WPA_GTK_KID	0x03	wpa.h
40787	WPA_GTK_TXBIT	0x04	wpa.h
40788	WPA_KDE_GTK	_MKOUI ( 0x00, 0x0F, 0xAC, 0x01 )	wpa.h
40789	WPA_KDE_MAC	_MKOUI ( 0x00, 0x0F, 0xAC, 0x03 )	wpa.h
40790	WPA_KDE_PMKID	_MKOUI ( 0x00, 0x0F, 0xAC, 0x04 )	wpa.h
40791	WPA_KDE_NONCE	_MKOUI ( 0x00, 0x0F, 0xAC, 0x06 )	wpa.h
40792	WPA_KDE_LIFETIME	_MKOUI ( 0x00, 0x0F, 0xAC, 0x07 )	wpa.h
40793	CONST	const	Base.h
40794	STATIC	static	Base.h
40795	VOID	void	Base.h
40796	TRUE	((BOOLEAN)(1==1))	Base.h
40797	FALSE	((BOOLEAN)(0==1))	Base.h
40798	NULL	((VOID *) 0)	Base.h
40799	BIT0	0x00000001	Base.h
40800	BIT1	0x00000002	Base.h
40801	BIT2	0x00000004	Base.h
40802	BIT3	0x00000008	Base.h
40803	BIT4	0x00000010	Base.h
40804	BIT5	0x00000020	Base.h
40805	BIT6	0x00000040	Base.h
40806	BIT7	0x00000080	Base.h
40807	BIT8	0x00000100	Base.h
40808	BIT9	0x00000200	Base.h
40809	BIT10	0x00000400	Base.h
40810	BIT11	0x00000800	Base.h
40811	BIT12	0x00001000	Base.h
40812	BIT13	0x00002000	Base.h
40813	BIT14	0x00004000	Base.h
40814	BIT15	0x00008000	Base.h
40815	BIT16	0x00010000	Base.h
40816	BIT17	0x00020000	Base.h
40817	BIT18	0x00040000	Base.h
40818	BIT19	0x00080000	Base.h
40819	BIT20	0x00100000	Base.h
40820	BIT21	0x00200000	Base.h
40821	BIT22	0x00400000	Base.h
40822	BIT23	0x00800000	Base.h
40823	BIT24	0x01000000	Base.h
40824	BIT25	0x02000000	Base.h
40825	BIT26	0x04000000	Base.h
40826	BIT27	0x08000000	Base.h
40827	BIT28	0x10000000	Base.h
40828	BIT29	0x20000000	Base.h
40829	BIT30	0x40000000	Base.h
40830	BIT31	0x80000000	Base.h
40831	BIT32	0x0000000100000000UL	Base.h
40832	BIT33	0x0000000200000000UL	Base.h
40833	BIT34	0x0000000400000000UL	Base.h
40834	BIT35	0x0000000800000000UL	Base.h
40835	BIT36	0x0000001000000000UL	Base.h
40836	BIT37	0x0000002000000000UL	Base.h
40837	BIT38	0x0000004000000000UL	Base.h
40838	BIT39	0x0000008000000000UL	Base.h
40839	BIT40	0x0000010000000000UL	Base.h
40840	BIT41	0x0000020000000000UL	Base.h
40841	BIT42	0x0000040000000000UL	Base.h
40842	BIT43	0x0000080000000000UL	Base.h
40843	BIT44	0x0000100000000000UL	Base.h
40844	BIT45	0x0000200000000000UL	Base.h
40845	BIT46	0x0000400000000000UL	Base.h
40846	BIT47	0x0000800000000000UL	Base.h
40847	BIT48	0x0001000000000000UL	Base.h
40848	BIT49	0x0002000000000000UL	Base.h
40849	BIT50	0x0004000000000000UL	Base.h
40850	BIT51	0x0008000000000000UL	Base.h
40851	BIT52	0x0010000000000000UL	Base.h
40852	BIT53	0x0020000000000000UL	Base.h
40853	BIT54	0x0040000000000000UL	Base.h
40854	BIT55	0x0080000000000000UL	Base.h
40855	BIT56	0x0100000000000000UL	Base.h
40856	BIT57	0x0200000000000000UL	Base.h
40857	BIT58	0x0400000000000000UL	Base.h
40858	BIT59	0x0800000000000000UL	Base.h
40859	BIT60	0x1000000000000000UL	Base.h
40860	BIT61	0x2000000000000000UL	Base.h
40861	BIT62	0x4000000000000000UL	Base.h
40862	BIT63	0x8000000000000000UL	Base.h
40863	RETURN_SUCCESS	0	Base.h
40864	RETURN_LOAD_ERROR	ENCODE_ERROR (1)	Base.h
40865	RETURN_INVALID_PARAMETER	ENCODE_ERROR (2)	Base.h
40866	RETURN_UNSUPPORTED	ENCODE_ERROR (3)	Base.h
40867	RETURN_BAD_BUFFER_SIZE	ENCODE_ERROR (4)	Base.h
40868	RETURN_BUFFER_TOO_SMALL	ENCODE_ERROR (5)	Base.h
40869	RETURN_NOT_READY	ENCODE_ERROR (6)	Base.h
40870	RETURN_DEVICE_ERROR	ENCODE_ERROR (7)	Base.h
40871	RETURN_WRITE_PROTECTED	ENCODE_ERROR (8)	Base.h
40872	RETURN_OUT_OF_RESOURCES	ENCODE_ERROR (9)	Base.h
40873	RETURN_VOLUME_CORRUPTED	ENCODE_ERROR (10)	Base.h
40874	RETURN_VOLUME_FULL	ENCODE_ERROR (11)	Base.h
40875	RETURN_NO_MEDIA	ENCODE_ERROR (12)	Base.h
40876	RETURN_MEDIA_CHANGED	ENCODE_ERROR (13)	Base.h
40877	RETURN_NOT_FOUND	ENCODE_ERROR (14)	Base.h
40878	RETURN_ACCESS_DENIED	ENCODE_ERROR (15)	Base.h
40879	RETURN_NO_RESPONSE	ENCODE_ERROR (16)	Base.h
40880	RETURN_NO_MAPPING	ENCODE_ERROR (17)	Base.h
40881	RETURN_TIMEOUT	ENCODE_ERROR (18)	Base.h
40882	RETURN_NOT_STARTED	ENCODE_ERROR (19)	Base.h
40883	RETURN_ALREADY_STARTED	ENCODE_ERROR (20)	Base.h
40884	RETURN_ABORTED	ENCODE_ERROR (21)	Base.h
40885	RETURN_ICMP_ERROR	ENCODE_ERROR (22)	Base.h
40886	RETURN_TFTP_ERROR	ENCODE_ERROR (23)	Base.h
40887	RETURN_PROTOCOL_ERROR	ENCODE_ERROR (24)	Base.h
40888	RETURN_INCOMPATIBLE_VERSION	ENCODE_ERROR (25)	Base.h
40889	RETURN_SECURITY_VIOLATION	ENCODE_ERROR (26)	Base.h
40890	RETURN_CRC_ERROR	ENCODE_ERROR (27)	Base.h
40891	RETURN_END_OF_MEDIA	ENCODE_ERROR (28)	Base.h
40892	RETURN_END_OF_FILE	ENCODE_ERROR (31)	Base.h
40893	RETURN_INVALID_LANGUAGE	ENCODE_ERROR (32)	Base.h
40894	RETURN_WARN_UNKNOWN_GLYPH	ENCODE_WARNING (1)	Base.h
40895	RETURN_WARN_DELETE_FAILURE	ENCODE_WARNING (2)	Base.h
40896	RETURN_WARN_WRITE_FAILURE	ENCODE_WARNING (3)	Base.h
40897	RETURN_WARN_BUFFER_TOO_SMALL	ENCODE_WARNING (4)	Base.h
40898	__GNUC__	1	efi.h
40899	EFI_PROTOCOLS	__table ( struct efi_protocol, "efi_protocols" )	efi.h
40900	__efi_protocol	__table_entry ( EFI_PROTOCOLS, 01 )	efi.h
40901	EFI_CONFIG_TABLES	__table ( struct efi_config_table, "efi_config_tables" )	efi.h
40902	__efi_config_table	__table_entry ( EFI_CONFIG_TABLES, 01 )	efi.h
40903	IOAPI_PREFIX_efi	__efi_	efi_io.h
40904	PCIAPI_PREFIX_efi	__efi_	efi_pci.h
40905	EFIPCI_WIDTH_BYTE	0	efi_pci.h
40906	EFIPCI_WIDTH_WORD	1	efi_pci.h
40907	EFIPCI_WIDTH_DWORD	2	efi_pci.h
40908	SMBIOS_PREFIX_efi	__efi_	efi_smbios.h
40909	TIMER_PREFIX_efi	__efi_	efi_timer.h
40910	UACCESS_PREFIX_efi	__efi_	efi_uaccess.h
40911	UMALLOC_PREFIX_efi	__efi_	efi_umalloc.h
40912	EFI_PC_ANSI_GUID	{ \ 0xe0c14753, 0xf9be, 0x11d2, {0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PcAnsi.h
40913	EFI_VT_100_GUID	{ \ 0xdfa66065, 0xb419, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PcAnsi.h
40914	EFI_VT_100_PLUS_GUID	{ \ 0x7baec70b, 0x57e0, 0x4c76, {0x8e, 0x87, 0x2f, 0x9e, 0x28, 0x08, 0x83, 0x43 } \ }	PcAnsi.h
40915	EFI_VT_UTF8_GUID	{ \ 0xad15a0d6, 0x8bec, 0x4acf, {0xa0, 0x73, 0xd0, 0x1d, 0xe7, 0x7e, 0x2d, 0x88 } \ }	PcAnsi.h
40916	EFI_UART_DEVICE_PATH_GUID	{ \ 0x37499a9d, 0x542f, 0x4c89, {0xa0, 0x26, 0x35, 0xda, 0x14, 0x20, 0x94, 0xe4 } \ }	PcAnsi.h
40917	EFI_SAS_DEVICE_PATH_GUID	{ \ 0xd487ddb4, 0x008b, 0x11d9, {0xaf, 0xdc, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \ }	PcAnsi.h
40918	EFI_SMBIOS_TABLE_GUID	{ \ 0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	SmBios.h
40919	SMBIOS_TABLE_GUID	EFI_SMBIOS_TABLE_GUID	SmBios.h
40920	UINT8_MAX	0xff	ProcessorBind.h
40921	MAX_BIT	0x80000000	ProcessorBind.h
40922	MAX_2_BITS	0xC0000000	ProcessorBind.h
40923	MAX_ADDRESS	0xFFFFFFFF	ProcessorBind.h
40924	CPU_STACK_ALIGNMENT	sizeof(UINTN)	ProcessorBind.h
40925	EFIAPI	__cdecl	ProcessorBind.h
40926	EFIAPI	__attribute__((cdecl,regparm(0)))	ProcessorBind.h
40927	GLOBAL_REMOVE_IF_UNREFERENCED	__declspec(selectany)	ProcessorBind.h
40928	PCI_MAX_SEGMENT	0	Pci22.h
40929	PCI_MAX_BUS	255	Pci22.h
40930	PCI_MAX_DEVICE	31	Pci22.h
40931	PCI_MAX_FUNC	7	Pci22.h
40932	PCI_CLASS_OLD	0x00	Pci22.h
40933	PCI_CLASS_OLD_OTHER	0x00	Pci22.h
40934	PCI_CLASS_OLD_VGA	0x01	Pci22.h
40935	PCI_CLASS_MASS_STORAGE	0x01	Pci22.h
40936	PCI_CLASS_MASS_STORAGE_SCSI	0x00	Pci22.h
40937	PCI_CLASS_MASS_STORAGE_IDE	0x01	Pci22.h
40938	PCI_CLASS_MASS_STORAGE_FLOPPY	0x02	Pci22.h
40939	PCI_CLASS_MASS_STORAGE_IPI	0x03	Pci22.h
40940	PCI_CLASS_MASS_STORAGE_RAID	0x04	Pci22.h
40941	PCI_CLASS_MASS_STORAGE_OTHER	0x80	Pci22.h
40942	PCI_CLASS_NETWORK	0x02	Pci22.h
40943	PCI_CLASS_NETWORK_ETHERNET	0x00	Pci22.h
40944	PCI_CLASS_NETWORK_TOKENRING	0x01	Pci22.h
40945	PCI_CLASS_NETWORK_FDDI	0x02	Pci22.h
40946	PCI_CLASS_NETWORK_ATM	0x03	Pci22.h
40947	PCI_CLASS_NETWORK_ISDN	0x04	Pci22.h
40948	PCI_CLASS_NETWORK_OTHER	0x80	Pci22.h
40949	PCI_CLASS_DISPLAY	0x03	Pci22.h
40950	PCI_CLASS_DISPLAY_VGA	0x00	Pci22.h
40951	PCI_IF_VGA_VGA	0x00	Pci22.h
40952	PCI_IF_VGA_8514	0x01	Pci22.h
40953	PCI_CLASS_DISPLAY_XGA	0x01	Pci22.h
40954	PCI_CLASS_DISPLAY_3D	0x02	Pci22.h
40955	PCI_CLASS_DISPLAY_OTHER	0x80	Pci22.h
40956	PCI_CLASS_DISPLAY_GFX	0x80	Pci22.h
40957	PCI_CLASS_MEDIA	0x04	Pci22.h
40958	PCI_CLASS_MEDIA_VIDEO	0x00	Pci22.h
40959	PCI_CLASS_MEDIA_AUDIO	0x01	Pci22.h
40960	PCI_CLASS_MEDIA_TELEPHONE	0x02	Pci22.h
40961	PCI_CLASS_MEDIA_OTHER	0x80	Pci22.h
40962	PCI_CLASS_MEMORY_CONTROLLER	0x05	Pci22.h
40963	PCI_CLASS_MEMORY_RAM	0x00	Pci22.h
40964	PCI_CLASS_MEMORY_FLASH	0x01	Pci22.h
40965	PCI_CLASS_MEMORY_OTHER	0x80	Pci22.h
40966	PCI_CLASS_BRIDGE	0x06	Pci22.h
40967	PCI_CLASS_BRIDGE_HOST	0x00	Pci22.h
40968	PCI_CLASS_BRIDGE_ISA	0x01	Pci22.h
40969	PCI_CLASS_BRIDGE_EISA	0x02	Pci22.h
40970	PCI_CLASS_BRIDGE_MCA	0x03	Pci22.h
40971	PCI_CLASS_BRIDGE_P2P	0x04	Pci22.h
40972	PCI_IF_BRIDGE_P2P	0x00	Pci22.h
40973	PCI_IF_BRIDGE_P2P_SUBTRACTIVE	0x01	Pci22.h
40974	PCI_CLASS_BRIDGE_PCMCIA	0x05	Pci22.h
40975	PCI_CLASS_BRIDGE_NUBUS	0x06	Pci22.h
40976	PCI_CLASS_BRIDGE_CARDBUS	0x07	Pci22.h
40977	PCI_CLASS_BRIDGE_RACEWAY	0x08	Pci22.h
40978	PCI_CLASS_BRIDGE_OTHER	0x80	Pci22.h
40979	PCI_CLASS_BRIDGE_ISA_PDECODE	0x80	Pci22.h
40980	PCI_CLASS_SCC	0x07	Pci22.h	< Simple communications controllers
40981	PCI_SUBCLASS_SERIAL	0x00	Pci22.h
40982	PCI_IF_GENERIC_XT	0x00	Pci22.h
40983	PCI_IF_16450	0x01	Pci22.h
40984	PCI_IF_16550	0x02	Pci22.h
40985	PCI_IF_16650	0x03	Pci22.h
40986	PCI_IF_16750	0x04	Pci22.h
40987	PCI_IF_16850	0x05	Pci22.h
40988	PCI_IF_16950	0x06	Pci22.h
40989	PCI_SUBCLASS_PARALLEL	0x01	Pci22.h
40990	PCI_IF_PARALLEL_PORT	0x00	Pci22.h
40991	PCI_IF_BI_DIR_PARALLEL_PORT	0x01	Pci22.h
40992	PCI_IF_ECP_PARALLEL_PORT	0x02	Pci22.h
40993	PCI_IF_1284_CONTROLLER	0x03	Pci22.h
40994	PCI_IF_1284_DEVICE	0xFE	Pci22.h
40995	PCI_SUBCLASS_MULTIPORT_SERIAL	0x02	Pci22.h
40996	PCI_SUBCLASS_MODEM	0x03	Pci22.h
40997	PCI_IF_GENERIC_MODEM	0x00	Pci22.h
40998	PCI_IF_16450_MODEM	0x01	Pci22.h
40999	PCI_IF_16550_MODEM	0x02	Pci22.h
41000	PCI_IF_16650_MODEM	0x03	Pci22.h
41001	PCI_IF_16750_MODEM	0x04	Pci22.h
41002	PCI_SUBCLASS_SCC_OTHER	0x80	Pci22.h
41003	PCI_CLASS_SYSTEM_PERIPHERAL	0x08	Pci22.h
41004	PCI_SUBCLASS_PIC	0x00	Pci22.h
41005	PCI_IF_8259_PIC	0x00	Pci22.h
41006	PCI_IF_ISA_PIC	0x01	Pci22.h
41007	PCI_IF_EISA_PIC	0x02	Pci22.h
41008	PCI_IF_APIC_CONTROLLER	0x10	Pci22.h	< I/O APIC interrupt controller , 32 bye none-prefectable memory.
41009	PCI_IF_APIC_CONTROLLER2	0x20	Pci22.h
41010	PCI_SUBCLASS_DMA	0x01	Pci22.h
41011	PCI_IF_8237_DMA	0x00	Pci22.h
41012	PCI_IF_ISA_DMA	0x01	Pci22.h
41013	PCI_IF_EISA_DMA	0x02	Pci22.h
41014	PCI_SUBCLASS_TIMER	0x02	Pci22.h
41015	PCI_IF_8254_TIMER	0x00	Pci22.h
41016	PCI_IF_ISA_TIMER	0x01	Pci22.h
41017	PCI_IF_EISA_TIMER	0x02	Pci22.h
41018	PCI_SUBCLASS_RTC	0x03	Pci22.h
41019	PCI_IF_GENERIC_RTC	0x00	Pci22.h
41020	PCI_IF_ISA_RTC	0x00	Pci22.h
41021	PCI_SUBCLASS_PNP_CONTROLLER	0x04	Pci22.h	< HotPlug Controller
41022	PCI_SUBCLASS_PERIPHERAL_OTHER	0x80	Pci22.h
41023	PCI_CLASS_INPUT_DEVICE	0x09	Pci22.h
41024	PCI_SUBCLASS_KEYBOARD	0x00	Pci22.h
41025	PCI_SUBCLASS_PEN	0x01	Pci22.h
41026	PCI_SUBCLASS_MOUSE_CONTROLLER	0x02	Pci22.h
41027	PCI_SUBCLASS_SCAN_CONTROLLER	0x03	Pci22.h
41028	PCI_SUBCLASS_GAMEPORT	0x04	Pci22.h
41029	PCI_IF_GAMEPORT	0x00	Pci22.h
41030	PCI_IF_GAMEPORT1	0x01	Pci22.h
41031	PCI_SUBCLASS_INPUT_OTHER	0x80	Pci22.h
41032	PCI_CLASS_DOCKING_STATION	0x0A	Pci22.h
41033	PCI_CLASS_PROCESSOR	0x0B	Pci22.h
41034	PCI_SUBCLASS_PROC_386	0x00	Pci22.h
41035	PCI_SUBCLASS_PROC_486	0x01	Pci22.h
41036	PCI_SUBCLASS_PROC_PENTIUM	0x02	Pci22.h
41037	PCI_SUBCLASS_PROC_ALPHA	0x10	Pci22.h
41038	PCI_SUBCLASS_PROC_POWERPC	0x20	Pci22.h
41039	PCI_SUBCLASS_PROC_MIPS	0x30	Pci22.h
41040	PCI_SUBCLASS_PROC_CO_PORC	0x40	Pci22.h	< Co-Processor
41041	PCI_CLASS_SERIAL	0x0C	Pci22.h
41042	PCI_CLASS_SERIAL_FIREWIRE	0x00	Pci22.h
41043	PCI_IF_1394	0x00	Pci22.h
41044	PCI_IF_1394_OPEN_HCI	0x10	Pci22.h
41045	PCI_CLASS_SERIAL_ACCESS_BUS	0x01	Pci22.h
41046	PCI_CLASS_SERIAL_SSA	0x02	Pci22.h
41047	PCI_CLASS_SERIAL_USB	0x03	Pci22.h
41048	PCI_IF_UHCI	0x00	Pci22.h
41049	PCI_IF_OHCI	0x10	Pci22.h
41050	PCI_IF_USB_OTHER	0x80	Pci22.h
41051	PCI_IF_USB_DEVICE	0xFE	Pci22.h
41052	PCI_CLASS_SERIAL_FIBRECHANNEL	0x04	Pci22.h
41053	PCI_CLASS_SERIAL_SMB	0x05	Pci22.h
41054	PCI_CLASS_WIRELESS	0x0D	Pci22.h
41055	PCI_SUBCLASS_IRDA	0x00	Pci22.h
41056	PCI_SUBCLASS_IR	0x01	Pci22.h
41057	PCI_SUBCLASS_RF	0x02	Pci22.h
41058	PCI_SUBCLASS_WIRELESS_OTHER	0x80	Pci22.h
41059	PCI_CLASS_INTELLIGENT_IO	0x0E	Pci22.h
41060	PCI_CLASS_SATELLITE	0x0F	Pci22.h
41061	PCI_SUBCLASS_TV	0x01	Pci22.h
41062	PCI_SUBCLASS_AUDIO	0x02	Pci22.h
41063	PCI_SUBCLASS_VOICE	0x03	Pci22.h
41064	PCI_SUBCLASS_DATA	0x04	Pci22.h
41065	PCI_SECURITY_CONTROLLER	0x10	Pci22.h	< Encryption and decryption controller
41066	PCI_SUBCLASS_NET_COMPUT	0x00	Pci22.h
41067	PCI_SUBCLASS_ENTERTAINMENT	0x10	Pci22.h
41068	PCI_SUBCLASS_SECURITY_OTHER	0x80	Pci22.h
41069	PCI_CLASS_DPIO	0x11	Pci22.h
41070	PCI_SUBCLASS_DPIO	0x00	Pci22.h
41071	PCI_SUBCLASS_DPIO_OTHER	0x80	Pci22.h
41072	HEADER_TYPE_DEVICE	0x00	Pci22.h
41073	HEADER_TYPE_PCI_TO_PCI_BRIDGE	0x01	Pci22.h
41074	HEADER_TYPE_CARDBUS_BRIDGE	0x02	Pci22.h
41075	HEADER_TYPE_MULTI_FUNCTION	0x80	Pci22.h
41076	HEADER_LAYOUT_CODE	0x7f	Pci22.h
41077	PCI_BRIDGE_ROMBAR	0x38	Pci22.h
41078	PCI_MAX_BAR	0x0006	Pci22.h
41079	PCI_MAX_CONFIG_OFFSET	0x0100	Pci22.h
41080	PCI_VENDOR_ID_OFFSET	0x00	Pci22.h
41081	PCI_DEVICE_ID_OFFSET	0x02	Pci22.h
41082	PCI_COMMAND_OFFSET	0x04	Pci22.h
41083	PCI_PRIMARY_STATUS_OFFSET	0x06	Pci22.h
41084	PCI_REVISION_ID_OFFSET	0x08	Pci22.h
41085	PCI_CLASSCODE_OFFSET	0x09	Pci22.h
41086	PCI_CACHELINE_SIZE_OFFSET	0x0C	Pci22.h
41087	PCI_LATENCY_TIMER_OFFSET	0x0D	Pci22.h
41088	PCI_HEADER_TYPE_OFFSET	0x0E	Pci22.h
41089	PCI_BIST_OFFSET	0x0F	Pci22.h
41090	PCI_BASE_ADDRESSREG_OFFSET	0x10	Pci22.h
41091	PCI_CARDBUS_CIS_OFFSET	0x28	Pci22.h
41092	PCI_SVID_OFFSET	0x2C	Pci22.h	< SubSystem Vendor id
41093	PCI_SUBSYSTEM_VENDOR_ID_OFFSET	0x2C	Pci22.h
41094	PCI_SID_OFFSET	0x2E	Pci22.h	< SubSystem ID
41095	PCI_SUBSYSTEM_ID_OFFSET	0x2E	Pci22.h
41096	PCI_EXPANSION_ROM_BASE	0x30	Pci22.h
41097	PCI_CAPBILITY_POINTER_OFFSET	0x34	Pci22.h
41098	PCI_INT_LINE_OFFSET	0x3C	Pci22.h	< Interrupt Line Register
41099	PCI_INT_PIN_OFFSET	0x3D	Pci22.h	< Interrupt Pin Register
41100	PCI_MAXGNT_OFFSET	0x3E	Pci22.h	< Max Grant Register
41101	PCI_MAXLAT_OFFSET	0x3F	Pci22.h	< Max Latency Register
41102	PCI_BRIDGE_PRIMARY_BUS_REGISTER	0x18	Pci22.h
41103	PCI_BRIDGE_SECONDARY_BUS_REGIST	0x19	Pci22.h
41104	PCI_BRIDGE_SUBORDINATE_BUS_REGI	0x1a	Pci22.h
41105	PCI_BRIDGE_STATUS_REGISTER_OFFS	0x1E	Pci22.h
41106	PCI_BRIDGE_CONTROL_REGISTER_OFF	0x3E	Pci22.h
41107	PCI_INT_LINE_UNKNOWN	0xFF	Pci22.h
41108	EFI_PCI_COMMAND_IO_SPACE	BIT0	Pci22.h	< 0x0001
41109	EFI_PCI_COMMAND_MEMORY_SPACE	BIT1	Pci22.h	< 0x0002
41110	EFI_PCI_COMMAND_BUS_MASTER	BIT2	Pci22.h	< 0x0004
41111	EFI_PCI_COMMAND_SPECIAL_CYCLE	BIT3	Pci22.h	< 0x0008
41112	EFI_PCI_COMMAND_MEMORY_WRITE_AN	BIT4	Pci22.h	< 0x0010
41113	EFI_PCI_COMMAND_VGA_PALETTE_SNO	BIT5	Pci22.h	< 0x0020
41114	EFI_PCI_COMMAND_PARITY_ERROR_RE	BIT6	Pci22.h	< 0x0040
41115	EFI_PCI_COMMAND_STEPPING_CONTRO	BIT7	Pci22.h	< 0x0080
41116	EFI_PCI_COMMAND_SERR	BIT8	Pci22.h	< 0x0100
41117	EFI_PCI_COMMAND_FAST_BACK_TO_BA	BIT9	Pci22.h	< 0x0200
41118	EFI_PCI_BRIDGE_CONTROL_PARITY_E	BIT0	Pci22.h	< 0x0001
41119	EFI_PCI_BRIDGE_CONTROL_SERR	BIT1	Pci22.h	< 0x0002
41120	EFI_PCI_BRIDGE_CONTROL_ISA	BIT2	Pci22.h	< 0x0004
41121	EFI_PCI_BRIDGE_CONTROL_VGA	BIT3	Pci22.h	< 0x0008
41122	EFI_PCI_BRIDGE_CONTROL_VGA_16	BIT4	Pci22.h	< 0x0010
41123	EFI_PCI_BRIDGE_CONTROL_MASTER_A	BIT5	Pci22.h	< 0x0020
41124	EFI_PCI_BRIDGE_CONTROL_RESET_SE	BIT6	Pci22.h	< 0x0040
41125	EFI_PCI_BRIDGE_CONTROL_FAST_BAC	BIT7	Pci22.h	< 0x0080
41126	EFI_PCI_BRIDGE_CONTROL_PRIMARY_	BIT8	Pci22.h	< 0x0100
41127	EFI_PCI_BRIDGE_CONTROL_SECONDAR	BIT9	Pci22.h	< 0x0200
41128	EFI_PCI_BRIDGE_CONTROL_TIMER_ST	BIT10	Pci22.h	< 0x0400
41129	EFI_PCI_BRIDGE_CONTROL_DISCARD_	BIT11	Pci22.h	< 0x0800
41130	EFI_PCI_BRIDGE_CONTROL_IREQINT_	BIT7	Pci22.h	< 0x0080
41131	EFI_PCI_BRIDGE_CONTROL_RANGE0_M	BIT8	Pci22.h	< 0x0100
41132	EFI_PCI_BRIDGE_CONTROL_RANGE1_M	BIT9	Pci22.h	< 0x0200
41133	EFI_PCI_BRIDGE_CONTROL_WRITE_PO	BIT10	Pci22.h	< 0x0400
41134	EFI_PCI_STATUS_CAPABILITY	BIT4	Pci22.h	< 0x0010
41135	EFI_PCI_STATUS_66MZ_CAPABLE	BIT5	Pci22.h	< 0x0020
41136	EFI_PCI_FAST_BACK_TO_BACK_CAPAB	BIT7	Pci22.h	< 0x0080
41137	EFI_PCI_MASTER_DATA_PARITY_ERRO	BIT8	Pci22.h	< 0x0100
41138	EFI_PCI_CARDBUS_BRIDGE_CAPABILI	0x14	Pci22.h
41139	EFI_PCI_CAPABILITY_ID_PMI	0x01	Pci22.h
41140	EFI_PCI_CAPABILITY_ID_AGP	0x02	Pci22.h
41141	EFI_PCI_CAPABILITY_ID_VPD	0x03	Pci22.h
41142	EFI_PCI_CAPABILITY_ID_SLOTID	0x04	Pci22.h
41143	EFI_PCI_CAPABILITY_ID_MSI	0x05	Pci22.h
41144	EFI_PCI_CAPABILITY_ID_HOTPLUG	0x06	Pci22.h
41145	DEVICE_ID_NOCARE	0xFFFF	Pci22.h
41146	PCI_ACPI_UNUSED	0	Pci22.h
41147	PCI_BAR_NOCHANGE	0	Pci22.h
41148	PCI_BAR_OLD_ALIGN	0xFFFFFFFFFFFFFFFFULL	Pci22.h
41149	PCI_BAR_EVEN_ALIGN	0xFFFFFFFFFFFFFFFEULL	Pci22.h
41150	PCI_BAR_SQUAD_ALIGN	0xFFFFFFFFFFFFFFFDULL	Pci22.h
41151	PCI_BAR_DQUAD_ALIGN	0xFFFFFFFFFFFFFFFCULL	Pci22.h
41152	PCI_BAR_IDX0	0x00	Pci22.h
41153	PCI_BAR_IDX1	0x01	Pci22.h
41154	PCI_BAR_IDX2	0x02	Pci22.h
41155	PCI_BAR_IDX3	0x03	Pci22.h
41156	PCI_BAR_IDX4	0x04	Pci22.h
41157	PCI_BAR_IDX5	0x05	Pci22.h
41158	PCI_BAR_ALL	0xFF	Pci22.h
41159	EFI_ROOT_BRIDGE_LIST	'eprb'	Pci22.h
41160	EFI_PCI_EXPANSION_ROM_HEADER_EF	0x0EF1	Pci22.h	< defined in UEFI Spec.
41161	PCI_EXPANSION_ROM_HEADER_SIGNAT	0xaa55	Pci22.h
41162	PCI_DATA_STRUCTURE_SIGNATURE	SIGNATURE_32 ('P', 'C', 'I', 'R')	Pci22.h
41163	PCI_CODE_TYPE_PCAT_IMAGE	0x00	Pci22.h
41164	EFI_PCI_EXPANSION_ROM_HEADER_CO	0x0001	Pci22.h	<defined in UEFI spec.
41165	EFI_IMAGE_SUBSYSTEM_EFI_APPLICA	10	PeImage.h
41166	EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SE	11	PeImage.h
41167	EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME	12	PeImage.h
41168	EFI_IMAGE_SUBSYSTEM_EFI_EFI_ROM	13	PeImage.h
41169	EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME	13	PeImage.h	< defined PI Specification, 1.0
41170	IMAGE_FILE_MACHINE_I386	0x014c	PeImage.h
41171	IMAGE_FILE_MACHINE_IA64	0x0200	PeImage.h
41172	IMAGE_FILE_MACHINE_EBC	0x0EBC	PeImage.h
41173	IMAGE_FILE_MACHINE_X64	0x8664	PeImage.h
41174	EFI_IMAGE_MACHINE_IA32	IMAGE_FILE_MACHINE_I386	PeImage.h
41175	EFI_IMAGE_MACHINE_IA64	IMAGE_FILE_MACHINE_IA64	PeImage.h
41176	EFI_IMAGE_MACHINE_IPF	IMAGE_FILE_MACHINE_IA64	PeImage.h
41177	EFI_IMAGE_MACHINE_EBC	IMAGE_FILE_MACHINE_EBC	PeImage.h
41178	EFI_IMAGE_MACHINE_X64	IMAGE_FILE_MACHINE_X64	PeImage.h
41179	EFI_IMAGE_DOS_SIGNATURE	SIGNATURE_16('M', 'Z')	PeImage.h
41180	EFI_IMAGE_OS2_SIGNATURE	SIGNATURE_16('N', 'E')	PeImage.h
41181	EFI_IMAGE_OS2_SIGNATURE_LE	SIGNATURE_16('L', 'E')	PeImage.h
41182	EFI_IMAGE_NT_SIGNATURE	SIGNATURE_32('P', 'E', '\0', '\0')	PeImage.h
41183	EFI_IMAGE_SIZEOF_FILE_HEADER	20	PeImage.h
41184	EFI_IMAGE_FILE_RELOCS_STRIPPED	BIT0	PeImage.h	< 0x0001 Relocation info stripped from file.
41185	EFI_IMAGE_FILE_EXECUTABLE_IMAGE	BIT1	PeImage.h	< 0x0002 File is executable (i.e. no unresolved externel references).
41186	EFI_IMAGE_FILE_LINE_NUMS_STRIPP	BIT2	PeImage.h	< 0x0004 Line nunbers stripped from file.
41187	EFI_IMAGE_FILE_LOCAL_SYMS_STRIP	BIT3	PeImage.h	< 0x0008 Local symbols stripped from file.
41188	EFI_IMAGE_FILE_BYTES_REVERSED_L	BIT7	PeImage.h	< 0x0080 Bytes of machine word are reversed.
41189	EFI_IMAGE_FILE_32BIT_MACHINE	BIT8	PeImage.h	< 0x0100 32 bit word machine.
41190	EFI_IMAGE_FILE_DEBUG_STRIPPED	BIT9	PeImage.h	< 0x0200 Debugging info stripped from file in .DBG file
41191	EFI_IMAGE_FILE_SYSTEM	BIT12	PeImage.h	< 0x1000 System File.
41192	EFI_IMAGE_FILE_DLL	BIT13	PeImage.h	< 0x2000 File is a DLL.
41193	EFI_IMAGE_FILE_BYTES_REVERSED_H	BIT15	PeImage.h	< 0x8000 Bytes of machine word are reversed.
41194	EFI_IMAGE_FILE_MACHINE_UNKNOWN	0	PeImage.h	< Any machine type
41195	EFI_IMAGE_FILE_MACHINE_I386	0x14c	PeImage.h	< Intel 386.
41196	EFI_IMAGE_FILE_MACHINE_R3000	0x162	PeImage.h	< MIPS* little-endian, 0540 big-endian
41197	EFI_IMAGE_FILE_MACHINE_R4000	0x166	PeImage.h	< MIPS* little-endian
41198	EFI_IMAGE_FILE_MACHINE_POWERPC	0x1F0	PeImage.h	< IBM* PowerPC Little-Endian
41199	EFI_IMAGE_ROM_OPTIONAL_HDR_MAGI	0x107	PeImage.h
41200	EFI_IMAGE_DIRECTORY_ENTRY_EXPOR	0	PeImage.h
41201	EFI_IMAGE_DIRECTORY_ENTRY_IMPOR	1	PeImage.h
41202	EFI_IMAGE_DIRECTORY_ENTRY_RESOU	2	PeImage.h
41203	EFI_IMAGE_DIRECTORY_ENTRY_EXCEP	3	PeImage.h
41204	EFI_IMAGE_DIRECTORY_ENTRY_SECUR	4	PeImage.h
41205	EFI_IMAGE_DIRECTORY_ENTRY_BASER	5	PeImage.h
41206	EFI_IMAGE_DIRECTORY_ENTRY_DEBUG	6	PeImage.h
41207	EFI_IMAGE_DIRECTORY_ENTRY_COPYR	7	PeImage.h
41208	EFI_IMAGE_DIRECTORY_ENTRY_GLOBA	8	PeImage.h
41209	EFI_IMAGE_DIRECTORY_ENTRY_TLS	9	PeImage.h
41210	EFI_IMAGE_DIRECTORY_ENTRY_LOAD_	10	PeImage.h
41211	EFI_IMAGE_NUMBER_OF_DIRECTORY_E	16	PeImage.h
41212	EFI_IMAGE_NT_OPTIONAL_HDR32_MAG	0x10b	PeImage.h
41213	EFI_IMAGE_NT_OPTIONAL_HDR64_MAG	0x20b	PeImage.h
41214	EFI_IMAGE_SIZEOF_NT_OPTIONAL32_	sizeof (EFI_IMAGE_NT_HEADERS32)	PeImage.h
41215	EFI_IMAGE_SIZEOF_NT_OPTIONAL64_	sizeof (EFI_IMAGE_NT_HEADERS64)	PeImage.h
41216	EFI_IMAGE_SUBSYSTEM_UNKNOWN	0	PeImage.h
41217	EFI_IMAGE_SUBSYSTEM_NATIVE	1	PeImage.h
41218	EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI	2	PeImage.h
41219	EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI	3	PeImage.h
41220	EFI_IMAGE_SUBSYSTEM_OS2_CUI	5	PeImage.h
41221	EFI_IMAGE_SUBSYSTEM_POSIX_CUI	7	PeImage.h
41222	EFI_IMAGE_SIZEOF_SHORT_NAME	8	PeImage.h
41223	EFI_IMAGE_SIZEOF_SECTION_HEADER	40	PeImage.h
41224	EFI_IMAGE_SCN_TYPE_NO_PAD	BIT3	PeImage.h	< 0x00000008 ///< Reserved.
41225	EFI_IMAGE_SCN_CNT_CODE	BIT5	PeImage.h	< 0x00000020
41226	EFI_IMAGE_SCN_CNT_INITIALIZED_D	BIT6	PeImage.h	< 0x00000040
41227	EFI_IMAGE_SCN_CNT_UNINITIALIZED	BIT7	PeImage.h	< 0x00000080
41228	EFI_IMAGE_SCN_LNK_OTHER	BIT8	PeImage.h	< 0x00000100 ///< Reserved.
41229	EFI_IMAGE_SCN_LNK_INFO	BIT9	PeImage.h	< 0x00000200 ///< Section contains comments or some other type of information.
41230	EFI_IMAGE_SCN_LNK_REMOVE	BIT10	PeImage.h	< 0x00000800 ///< Section contents will not become part of image.
41231	EFI_IMAGE_SCN_LNK_COMDAT	BIT12	PeImage.h	< 0x00001000
41232	EFI_IMAGE_SCN_ALIGN_1BYTES	BIT20	PeImage.h	< 0x00100000
41233	EFI_IMAGE_SCN_ALIGN_2BYTES	BIT21	PeImage.h	< 0x00200000
41234	EFI_IMAGE_SCN_ALIGN_4BYTES	(BIT20\|BIT21)	PeImage.h	< 0x00300000
41235	EFI_IMAGE_SCN_ALIGN_8BYTES	BIT22	PeImage.h	< 0x00400000
41236	EFI_IMAGE_SCN_ALIGN_16BYTES	(BIT20\|BIT22)	PeImage.h	< 0x00500000
41237	EFI_IMAGE_SCN_ALIGN_32BYTES	(BIT21\|BIT22)	PeImage.h	< 0x00600000
41238	EFI_IMAGE_SCN_ALIGN_64BYTES	(BIT20\|BIT21\|BIT22)	PeImage.h	< 0x00700000
41239	EFI_IMAGE_SCN_MEM_DISCARDABLE	BIT25	PeImage.h	< 0x02000000
41240	EFI_IMAGE_SCN_MEM_NOT_CACHED	BIT26	PeImage.h	< 0x04000000
41241	EFI_IMAGE_SCN_MEM_NOT_PAGED	BIT27	PeImage.h	< 0x08000000
41242	EFI_IMAGE_SCN_MEM_SHARED	BIT28	PeImage.h	< 0x10000000
41243	EFI_IMAGE_SCN_MEM_EXECUTE	BIT29	PeImage.h	< 0x20000000
41244	EFI_IMAGE_SCN_MEM_READ	BIT30	PeImage.h	< 0x40000000
41245	EFI_IMAGE_SCN_MEM_WRITE	BIT31	PeImage.h	< 0x80000000
41246	EFI_IMAGE_SIZEOF_SYMBOL	18	PeImage.h
41247	EFI_IMAGE_SYM_UNDEFINED	(UINT16) 0	PeImage.h	< Symbol is undefined or is common.
41248	EFI_IMAGE_SYM_ABSOLUTE	(UINT16) -1	PeImage.h	< Symbol is an absolute value.
41249	EFI_IMAGE_SYM_DEBUG	(UINT16) -2	PeImage.h	< Symbol is a special debug item.
41250	EFI_IMAGE_SYM_TYPE_NULL	0	PeImage.h	< no type.
41251	EFI_IMAGE_SYM_TYPE_VOID	1	PeImage.h	< no valid type.
41252	EFI_IMAGE_SYM_TYPE_CHAR	2	PeImage.h	< type character.
41253	EFI_IMAGE_SYM_TYPE_SHORT	3	PeImage.h	< type short integer.
41254	EFI_IMAGE_SYM_TYPE_INT	4	PeImage.h
41255	EFI_IMAGE_SYM_TYPE_LONG	5	PeImage.h
41256	EFI_IMAGE_SYM_TYPE_FLOAT	6	PeImage.h
41257	EFI_IMAGE_SYM_TYPE_DOUBLE	7	PeImage.h
41258	EFI_IMAGE_SYM_TYPE_STRUCT	8	PeImage.h
41259	EFI_IMAGE_SYM_TYPE_UNION	9	PeImage.h
41260	EFI_IMAGE_SYM_TYPE_ENUM	10	PeImage.h	< enumeration.
41261	EFI_IMAGE_SYM_TYPE_MOE	11	PeImage.h	< member of enumeration.
41262	EFI_IMAGE_SYM_TYPE_BYTE	12	PeImage.h
41263	EFI_IMAGE_SYM_TYPE_WORD	13	PeImage.h
41264	EFI_IMAGE_SYM_TYPE_UINT	14	PeImage.h
41265	EFI_IMAGE_SYM_TYPE_DWORD	15	PeImage.h
41266	EFI_IMAGE_SYM_DTYPE_NULL	0	PeImage.h	< no derived type.
41267	EFI_IMAGE_SYM_DTYPE_POINTER	1	PeImage.h
41268	EFI_IMAGE_SYM_DTYPE_FUNCTION	2	PeImage.h
41269	EFI_IMAGE_SYM_DTYPE_ARRAY	3	PeImage.h
41270	EFI_IMAGE_SYM_CLASS_END_OF_FUNC	((UINT8) -1)	PeImage.h
41271	EFI_IMAGE_SYM_CLASS_NULL	0	PeImage.h
41272	EFI_IMAGE_SYM_CLASS_AUTOMATIC	1	PeImage.h
41273	EFI_IMAGE_SYM_CLASS_EXTERNAL	2	PeImage.h
41274	EFI_IMAGE_SYM_CLASS_STATIC	3	PeImage.h
41275	EFI_IMAGE_SYM_CLASS_REGISTER	4	PeImage.h
41276	EFI_IMAGE_SYM_CLASS_EXTERNAL_DE	5	PeImage.h
41277	EFI_IMAGE_SYM_CLASS_LABEL	6	PeImage.h
41278	EFI_IMAGE_SYM_CLASS_UNDEFINED_L	7	PeImage.h
41279	EFI_IMAGE_SYM_CLASS_MEMBER_OF_S	8	PeImage.h
41280	EFI_IMAGE_SYM_CLASS_ARGUMENT	9	PeImage.h
41281	EFI_IMAGE_SYM_CLASS_STRUCT_TAG	10	PeImage.h
41282	EFI_IMAGE_SYM_CLASS_MEMBER_OF_U	11	PeImage.h
41283	EFI_IMAGE_SYM_CLASS_UNION_TAG	12	PeImage.h
41284	EFI_IMAGE_SYM_CLASS_TYPE_DEFINI	13	PeImage.h
41285	EFI_IMAGE_SYM_CLASS_UNDEFINED_S	14	PeImage.h
41286	EFI_IMAGE_SYM_CLASS_ENUM_TAG	15	PeImage.h
41287	EFI_IMAGE_SYM_CLASS_MEMBER_OF_E	16	PeImage.h
41288	EFI_IMAGE_SYM_CLASS_REGISTER_PA	17	PeImage.h
41289	EFI_IMAGE_SYM_CLASS_BIT_FIELD	18	PeImage.h
41290	EFI_IMAGE_SYM_CLASS_BLOCK	100	PeImage.h
41291	EFI_IMAGE_SYM_CLASS_FUNCTION	101	PeImage.h
41292	EFI_IMAGE_SYM_CLASS_END_OF_STRU	102	PeImage.h
41293	EFI_IMAGE_SYM_CLASS_FILE	103	PeImage.h
41294	EFI_IMAGE_SYM_CLASS_SECTION	104	PeImage.h
41295	EFI_IMAGE_SYM_CLASS_WEAK_EXTERN	105	PeImage.h
41296	EFI_IMAGE_N_BTMASK	017	PeImage.h
41297	EFI_IMAGE_N_TMASK	060	PeImage.h
41298	EFI_IMAGE_N_TMASK1	0300	PeImage.h
41299	EFI_IMAGE_N_TMASK2	0360	PeImage.h
41300	EFI_IMAGE_N_BTSHFT	4	PeImage.h
41301	EFI_IMAGE_N_TSHIFT	2	PeImage.h
41302	EFI_IMAGE_COMDAT_SELECT_NODUPLI	1	PeImage.h
41303	EFI_IMAGE_COMDAT_SELECT_ANY	2	PeImage.h
41304	EFI_IMAGE_COMDAT_SELECT_SAME_SI	3	PeImage.h
41305	EFI_IMAGE_COMDAT_SELECT_EXACT_M	4	PeImage.h
41306	EFI_IMAGE_COMDAT_SELECT_ASSOCIA	5	PeImage.h
41307	EFI_IMAGE_WEAK_EXTERN_SEARCH_NO	1	PeImage.h
41308	EFI_IMAGE_WEAK_EXTERN_SEARCH_LI	2	PeImage.h
41309	EFI_IMAGE_WEAK_EXTERN_SEARCH_AL	3	PeImage.h
41310	EFI_IMAGE_SIZEOF_RELOCATION	10	PeImage.h
41311	EFI_IMAGE_REL_I386_ABSOLUTE	0x0000	PeImage.h	< Reference is absolute, no relocation is necessary
41312	EFI_IMAGE_REL_I386_DIR16	0x0001	PeImage.h	< Direct 16-bit reference to the symbols virtual address
41313	EFI_IMAGE_REL_I386_REL16	0x0002	PeImage.h	< PC-relative 16-bit reference to the symbols virtual address
41314	EFI_IMAGE_REL_I386_DIR32	0x0006	PeImage.h	< Direct 32-bit reference to the symbols virtual address
41315	EFI_IMAGE_REL_I386_DIR32NB	0x0007	PeImage.h	< Direct 32-bit reference to the symbols virtual address, base not included
41316	EFI_IMAGE_REL_I386_SEG12	0x0009	PeImage.h	< Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address
41317	EFI_IMAGE_REL_I386_SECTION	0x000A	PeImage.h
41318	EFI_IMAGE_REL_I386_SECREL	0x000B	PeImage.h
41319	EFI_IMAGE_REL_I386_REL32	0x0014	PeImage.h	< PC-relative 32-bit reference to the symbols virtual address
41320	IMAGE_REL_AMD64_ABSOLUTE	0x0000	PeImage.h
41321	IMAGE_REL_AMD64_ADDR64	0x0001	PeImage.h
41322	IMAGE_REL_AMD64_ADDR32	0x0002	PeImage.h
41323	IMAGE_REL_AMD64_ADDR32NB	0x0003	PeImage.h
41324	IMAGE_REL_AMD64_REL32	0x0004	PeImage.h
41325	IMAGE_REL_AMD64_REL32_1	0x0005	PeImage.h
41326	IMAGE_REL_AMD64_REL32_2	0x0006	PeImage.h
41327	IMAGE_REL_AMD64_REL32_3	0x0007	PeImage.h
41328	IMAGE_REL_AMD64_REL32_4	0x0008	PeImage.h
41329	IMAGE_REL_AMD64_REL32_5	0x0009	PeImage.h
41330	IMAGE_REL_AMD64_SECTION	0x000A	PeImage.h
41331	IMAGE_REL_AMD64_SECREL	0x000B	PeImage.h
41332	IMAGE_REL_AMD64_SECREL7	0x000C	PeImage.h
41333	IMAGE_REL_AMD64_TOKEN	0x000D	PeImage.h
41334	IMAGE_REL_AMD64_SREL32	0x000E	PeImage.h
41335	IMAGE_REL_AMD64_PAIR	0x000F	PeImage.h
41336	IMAGE_REL_AMD64_SSPAN32	0x0010	PeImage.h
41337	EFI_IMAGE_SIZEOF_BASE_RELOCATIO	8	PeImage.h
41338	EFI_IMAGE_REL_BASED_ABSOLUTE	0	PeImage.h
41339	EFI_IMAGE_REL_BASED_HIGH	1	PeImage.h
41340	EFI_IMAGE_REL_BASED_LOW	2	PeImage.h
41341	EFI_IMAGE_REL_BASED_HIGHLOW	3	PeImage.h
41342	EFI_IMAGE_REL_BASED_HIGHADJ	4	PeImage.h
41343	EFI_IMAGE_REL_BASED_MIPS_JMPADD	5	PeImage.h
41344	EFI_IMAGE_REL_BASED_IA64_IMM64	9	PeImage.h
41345	IMAGE_REL_BASED_MIPS_JMPADDR16	9	PeImage.h
41346	EFI_IMAGE_REL_BASED_DIR64	10	PeImage.h
41347	EFI_IMAGE_SIZEOF_LINENUMBER	6	PeImage.h
41348	EFI_IMAGE_ARCHIVE_START_SIZE	8	PeImage.h
41349	EFI_IMAGE_ARCHIVE_START	"!<arch>\n"	PeImage.h
41350	EFI_IMAGE_ARCHIVE_END	"`\n"	PeImage.h
41351	EFI_IMAGE_ARCHIVE_PAD	"\n"	PeImage.h
41352	EFI_IMAGE_ARCHIVE_LINKER_MEMBER	"/ "	PeImage.h
41353	EFI_IMAGE_ARCHIVE_LONGNAMES_MEM	"// "	PeImage.h
41354	EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER	60	PeImage.h
41355	EFI_IMAGE_ORDINAL_FLAG	BIT31	PeImage.h	< Flag for PE32
41356	EFI_IMAGE_DEBUG_TYPE_CODEVIEW	2	PeImage.h	< The Visual C++ debug information
41357	CODEVIEW_SIGNATURE_NB10	SIGNATURE_32('N', 'B', '1', '0')	PeImage.h
41358	CODEVIEW_SIGNATURE_RSDS	SIGNATURE_32('R', 'S', 'D', 'S')	PeImage.h
41359	EFI_TE_IMAGE_HEADER_SIGNATURE	SIGNATURE_16('V', 'Z')	PeImage.h
41360	EFI_TE_IMAGE_DIRECTORY_ENTRY_BA	0	PeImage.h
41361	EFI_TE_IMAGE_DIRECTORY_ENTRY_DE	1	PeImage.h
41362	BOOT_WITH_FULL_CONFIGURATION	0x00	PiBootMode.h
41363	BOOT_WITH_MINIMAL_CONFIGURATION	0x01	PiBootMode.h
41364	BOOT_ASSUMING_NO_CONFIGURATION_	0x02	PiBootMode.h
41365	BOOT_WITH_FULL_CONFIGURATION_PL	0x03	PiBootMode.h
41366	BOOT_WITH_DEFAULT_SETTINGS	0x04	PiBootMode.h
41367	BOOT_ON_S4_RESUME	0x05	PiBootMode.h
41368	BOOT_ON_S5_RESUME	0x06	PiBootMode.h
41369	BOOT_ON_S2_RESUME	0x10	PiBootMode.h
41370	BOOT_ON_S3_RESUME	0x11	PiBootMode.h
41371	BOOT_ON_FLASH_UPDATE	0x12	PiBootMode.h
41372	BOOT_IN_RECOVERY_MODE	0x20	PiBootMode.h
41373	EFI_DEP_BEFORE	0x00	PiDependency.h
41374	EFI_DEP_AFTER	0x01	PiDependency.h
41375	EFI_DEP_PUSH	0x02	PiDependency.h
41376	EFI_DEP_AND	0x03	PiDependency.h
41377	EFI_DEP_OR	0x04	PiDependency.h
41378	EFI_DEP_NOT	0x05	PiDependency.h
41379	EFI_DEP_TRUE	0x06	PiDependency.h
41380	EFI_DEP_FALSE	0x07	PiDependency.h
41381	EFI_DEP_END	0x08	PiDependency.h
41382	EFI_DEP_SOR	0x09	PiDependency.h
41383	DXE_SERVICES_SIGNATURE	0x565245535f455844ULL	PiDxeCis.h
41384	DXE_SERVICES_REVISION	((1<<16) \| (00))	PiDxeCis.h
41385	EFI_FV_FILETYPE_ALL	0x00	PiFirmwareFile.h
41386	EFI_FV_FILETYPE_RAW	0x01	PiFirmwareFile.h
41387	EFI_FV_FILETYPE_FREEFORM	0x02	PiFirmwareFile.h
41388	EFI_FV_FILETYPE_SECURITY_CORE	0x03	PiFirmwareFile.h
41389	EFI_FV_FILETYPE_PEI_CORE	0x04	PiFirmwareFile.h
41390	EFI_FV_FILETYPE_DXE_CORE	0x05	PiFirmwareFile.h
41391	EFI_FV_FILETYPE_PEIM	0x06	PiFirmwareFile.h
41392	EFI_FV_FILETYPE_DRIVER	0x07	PiFirmwareFile.h
41393	EFI_FV_FILETYPE_COMBINED_PEIM_D	0x08	PiFirmwareFile.h
41394	EFI_FV_FILETYPE_APPLICATION	0x09	PiFirmwareFile.h
41395	EFI_FV_FILETYPE_FIRMWARE_VOLUME	0x0B	PiFirmwareFile.h
41396	EFI_FV_FILETYPE_OEM_MIN	0xc0	PiFirmwareFile.h
41397	EFI_FV_FILETYPE_OEM_MAX	0xdf	PiFirmwareFile.h
41398	EFI_FV_FILETYPE_DEBUG_MIN	0xe0	PiFirmwareFile.h
41399	EFI_FV_FILETYPE_DEBUG_MAX	0xef	PiFirmwareFile.h
41400	EFI_FV_FILETYPE_FFS_MIN	0xf0	PiFirmwareFile.h
41401	EFI_FV_FILETYPE_FFS_MAX	0xff	PiFirmwareFile.h
41402	EFI_FV_FILETYPE_FFS_PAD	0xf0	PiFirmwareFile.h
41403	FFS_ATTRIB_FIXED	0x04	PiFirmwareFile.h
41404	FFS_ATTRIB_DATA_ALIGNMENT	0x38	PiFirmwareFile.h
41405	FFS_ATTRIB_CHECKSUM	0x40	PiFirmwareFile.h
41406	EFI_FILE_HEADER_CONSTRUCTION	0x01	PiFirmwareFile.h
41407	EFI_FILE_HEADER_VALID	0x02	PiFirmwareFile.h
41408	EFI_FILE_DATA_VALID	0x04	PiFirmwareFile.h
41409	EFI_FILE_MARKED_FOR_UPDATE	0x08	PiFirmwareFile.h
41410	EFI_FILE_DELETED	0x10	PiFirmwareFile.h
41411	EFI_FILE_HEADER_INVALID	0x20	PiFirmwareFile.h
41412	EFI_SECTION_ALL	0x00	PiFirmwareFile.h
41413	EFI_SECTION_COMPRESSION	0x01	PiFirmwareFile.h
41414	EFI_SECTION_GUID_DEFINED	0x02	PiFirmwareFile.h
41415	EFI_SECTION_PE32	0x10	PiFirmwareFile.h
41416	EFI_SECTION_PIC	0x11	PiFirmwareFile.h
41417	EFI_SECTION_TE	0x12	PiFirmwareFile.h
41418	EFI_SECTION_DXE_DEPEX	0x13	PiFirmwareFile.h
41419	EFI_SECTION_VERSION	0x14	PiFirmwareFile.h
41420	EFI_SECTION_USER_INTERFACE	0x15	PiFirmwareFile.h
41421	EFI_SECTION_COMPATIBILITY16	0x16	PiFirmwareFile.h
41422	EFI_SECTION_FIRMWARE_VOLUME_IMA	0x17	PiFirmwareFile.h
41423	EFI_SECTION_FREEFORM_SUBTYPE_GU	0x18	PiFirmwareFile.h
41424	EFI_SECTION_RAW	0x19	PiFirmwareFile.h
41425	EFI_SECTION_PEI_DEPEX	0x1B	PiFirmwareFile.h
41426	EFI_NOT_COMPRESSED	0x00	PiFirmwareFile.h
41427	EFI_STANDARD_COMPRESSION	0x01	PiFirmwareFile.h
41428	EFI_GUIDED_SECTION_PROCESSING_R	0x01	PiFirmwareFile.h
41429	EFI_GUIDED_SECTION_AUTH_STATUS_	0x02	PiFirmwareFile.h
41430	EFI_FV_FILE_ATTRIB_ALIGNMENT	0x0000001F	PiFirmwareVolume.h
41431	EFI_FV_FILE_ATTRIB_FIXED	0x00000100	PiFirmwareVolume.h
41432	EFI_FV_FILE_ATTRIB_MEMORY_MAPPE	0x00000200	PiFirmwareVolume.h
41433	EFI_FVB2_READ_DISABLED_CAP	0x00000001	PiFirmwareVolume.h
41434	EFI_FVB2_READ_ENABLED_CAP	0x00000002	PiFirmwareVolume.h
41435	EFI_FVB2_READ_STATUS	0x00000004	PiFirmwareVolume.h
41436	EFI_FVB2_WRITE_DISABLED_CAP	0x00000008	PiFirmwareVolume.h
41437	EFI_FVB2_WRITE_ENABLED_CAP	0x00000010	PiFirmwareVolume.h
41438	EFI_FVB2_WRITE_STATUS	0x00000020	PiFirmwareVolume.h
41439	EFI_FVB2_LOCK_CAP	0x00000040	PiFirmwareVolume.h
41440	EFI_FVB2_LOCK_STATUS	0x00000080	PiFirmwareVolume.h
41441	EFI_FVB2_STICKY_WRITE	0x00000200	PiFirmwareVolume.h
41442	EFI_FVB2_MEMORY_MAPPED	0x00000400	PiFirmwareVolume.h
41443	EFI_FVB2_ERASE_POLARITY	0x00000800	PiFirmwareVolume.h
41444	EFI_FVB2_READ_LOCK_CAP	0x00001000	PiFirmwareVolume.h
41445	EFI_FVB2_READ_LOCK_STATUS	0x00002000	PiFirmwareVolume.h
41446	EFI_FVB2_WRITE_LOCK_CAP	0x00004000	PiFirmwareVolume.h
41447	EFI_FVB2_WRITE_LOCK_STATUS	0x00008000	PiFirmwareVolume.h
41448	EFI_FVB2_ALIGNMENT	0x001F0000	PiFirmwareVolume.h
41449	EFI_FVB2_ALIGNMENT_1	0x00000000	PiFirmwareVolume.h
41450	EFI_FVB2_ALIGNMENT_2	0x00010000	PiFirmwareVolume.h
41451	EFI_FVB2_ALIGNMENT_4	0x00020000	PiFirmwareVolume.h
41452	EFI_FVB2_ALIGNMENT_8	0x00030000	PiFirmwareVolume.h
41453	EFI_FVB2_ALIGNMENT_16	0x00040000	PiFirmwareVolume.h
41454	EFI_FVB2_ALIGNMENT_32	0x00050000	PiFirmwareVolume.h
41455	EFI_FVB2_ALIGNMENT_64	0x00060000	PiFirmwareVolume.h
41456	EFI_FVB2_ALIGNMENT_128	0x00070000	PiFirmwareVolume.h
41457	EFI_FVB2_ALIGNMENT_256	0x00080000	PiFirmwareVolume.h
41458	EFI_FVB2_ALIGNMENT_512	0x00090000	PiFirmwareVolume.h
41459	EFI_FVB2_ALIGNMENT_1K	0x000A0000	PiFirmwareVolume.h
41460	EFI_FVB2_ALIGNMENT_2K	0x000B0000	PiFirmwareVolume.h
41461	EFI_FVB2_ALIGNMENT_4K	0x000C0000	PiFirmwareVolume.h
41462	EFI_FVB2_ALIGNMENT_8K	0x000D0000	PiFirmwareVolume.h
41463	EFI_FVB2_ALIGNMENT_16K	0x000E0000	PiFirmwareVolume.h
41464	EFI_FVB2_ALIGNMENT_32K	0x000F0000	PiFirmwareVolume.h
41465	EFI_FVB2_ALIGNMENT_64K	0x00100000	PiFirmwareVolume.h
41466	EFI_FVB2_ALIGNMENT_128K	0x00110000	PiFirmwareVolume.h
41467	EFI_FVB2_ALIGNMENT_256K	0x00120000	PiFirmwareVolume.h
41468	EFI_FVB2_ALIGNMNET_512K	0x00130000	PiFirmwareVolume.h
41469	EFI_FVB2_ALIGNMENT_1M	0x00140000	PiFirmwareVolume.h
41470	EFI_FVB2_ALIGNMENT_2M	0x00150000	PiFirmwareVolume.h
41471	EFI_FVB2_ALIGNMENT_4M	0x00160000	PiFirmwareVolume.h
41472	EFI_FVB2_ALIGNMENT_8M	0x00170000	PiFirmwareVolume.h
41473	EFI_FVB2_ALIGNMENT_16M	0x00180000	PiFirmwareVolume.h
41474	EFI_FVB2_ALIGNMENT_32M	0x00190000	PiFirmwareVolume.h
41475	EFI_FVB2_ALIGNMENT_64M	0x001A0000	PiFirmwareVolume.h
41476	EFI_FVB2_ALIGNMENT_128M	0x001B0000	PiFirmwareVolume.h
41477	EFI_FVB2_ALIGNMENT_256M	0x001C0000	PiFirmwareVolume.h
41478	EFI_FVB2_ALIGNMENT_512M	0x001D0000	PiFirmwareVolume.h
41479	EFI_FVB2_ALIGNMENT_1G	0x001E0000	PiFirmwareVolume.h
41480	EFI_FVB2_ALIGNMENT_2G	0x001F0000	PiFirmwareVolume.h
41481	EFI_FVH_SIGNATURE	EFI_SIGNATURE_32 ('_', 'F', 'V', 'H')	PiFirmwareVolume.h
41482	EFI_FVH_REVISION	0x02	PiFirmwareVolume.h
41483	EFI_FV_EXT_TYPE_OEM_TYPE	0x01	PiFirmwareVolume.h
41484	EFI_HOB_TYPE_HANDOFF	0x0001	PiHob.h
41485	EFI_HOB_TYPE_MEMORY_ALLOCATION	0x0002	PiHob.h
41486	EFI_HOB_TYPE_RESOURCE_DESCRIPTO	0x0003	PiHob.h
41487	EFI_HOB_TYPE_GUID_EXTENSION	0x0004	PiHob.h
41488	EFI_HOB_TYPE_FV	0x0005	PiHob.h
41489	EFI_HOB_TYPE_CPU	0x0006	PiHob.h
41490	EFI_HOB_TYPE_MEMORY_POOL	0x0007	PiHob.h
41491	EFI_HOB_TYPE_FV2	0x0009	PiHob.h
41492	EFI_HOB_TYPE_LOAD_PEIM	0x000A	PiHob.h
41493	EFI_HOB_TYPE_UNUSED	0xFFFE	PiHob.h
41494	EFI_HOB_TYPE_END_OF_HOB_LIST	0xFFFF	PiHob.h
41495	EFI_HOB_HANDOFF_TABLE_VERSION	0x0009	PiHob.h
41496	EFI_RESOURCE_SYSTEM_MEMORY	0x00000000	PiHob.h
41497	EFI_RESOURCE_MEMORY_MAPPED_IO	0x00000001	PiHob.h
41498	EFI_RESOURCE_IO	0x00000002	PiHob.h
41499	EFI_RESOURCE_FIRMWARE_DEVICE	0x00000003	PiHob.h
41500	EFI_RESOURCE_MEMORY_MAPPED_IO_P	0x00000004	PiHob.h
41501	EFI_RESOURCE_MEMORY_RESERVED	0x00000005	PiHob.h
41502	EFI_RESOURCE_IO_RESERVED	0x00000006	PiHob.h
41503	EFI_RESOURCE_MAX_MEMORY_TYPE	0x00000007	PiHob.h
41504	EFI_RESOURCE_ATTRIBUTE_PRESENT	0x00000001	PiHob.h
41505	EFI_RESOURCE_ATTRIBUTE_INITIALI	0x00000002	PiHob.h
41506	EFI_RESOURCE_ATTRIBUTE_TESTED	0x00000004	PiHob.h
41507	EFI_RESOURCE_ATTRIBUTE_SINGLE_B	0x00000008	PiHob.h
41508	EFI_RESOURCE_ATTRIBUTE_MULTIPLE	0x00000010	PiHob.h
41509	EFI_RESOURCE_ATTRIBUTE_ECC_RESE	0x00000020	PiHob.h
41510	EFI_RESOURCE_ATTRIBUTE_ECC_RESE	0x00000040	PiHob.h
41511	EFI_RESOURCE_ATTRIBUTE_READ_PRO	0x00000080	PiHob.h
41512	EFI_RESOURCE_ATTRIBUTE_WRITE_PR	0x00000100	PiHob.h
41513	EFI_RESOURCE_ATTRIBUTE_EXECUTIO	0x00000200	PiHob.h
41514	EFI_RESOURCE_ATTRIBUTE_UNCACHEA	0x00000400	PiHob.h
41515	EFI_RESOURCE_ATTRIBUTE_WRITE_CO	0x00000800	PiHob.h
41516	EFI_RESOURCE_ATTRIBUTE_WRITE_TH	0x00001000	PiHob.h
41517	EFI_RESOURCE_ATTRIBUTE_WRITE_BA	0x00002000	PiHob.h
41518	EFI_RESOURCE_ATTRIBUTE_16_BIT_I	0x00004000	PiHob.h
41519	EFI_RESOURCE_ATTRIBUTE_32_BIT_I	0x00008000	PiHob.h
41520	EFI_RESOURCE_ATTRIBUTE_64_BIT_I	0x00010000	PiHob.h
41521	EFI_RESOURCE_ATTRIBUTE_UNCACHED	0x00020000	PiHob.h
41522	EFI_NOT_AVAILABLE_YET	EFIERR (32)	PiMultiPhase.h
41523	EFI_STATUS_CODE_TYPE_MASK	0x000000FF	PiMultiPhase.h
41524	EFI_STATUS_CODE_SEVERITY_MASK	0xFF000000	PiMultiPhase.h
41525	EFI_STATUS_CODE_RESERVED_MASK	0x00FFFF00	PiMultiPhase.h
41526	EFI_PROGRESS_CODE	0x00000001	PiMultiPhase.h
41527	EFI_ERROR_CODE	0x00000002	PiMultiPhase.h
41528	EFI_DEBUG_CODE	0x00000003	PiMultiPhase.h
41529	EFI_ERROR_MINOR	0x40000000	PiMultiPhase.h
41530	EFI_ERROR_MAJOR	0x80000000	PiMultiPhase.h
41531	EFI_ERROR_UNRECOVERED	0x90000000	PiMultiPhase.h
41532	EFI_ERROR_UNCONTAINED	0xa0000000	PiMultiPhase.h
41533	EFI_STATUS_CODE_CLASS_MASK	0xFF000000	PiMultiPhase.h
41534	EFI_STATUS_CODE_SUBCLASS_MASK	0x00FF0000	PiMultiPhase.h
41535	EFI_STATUS_CODE_OPERATION_MASK	0x0000FFFF	PiMultiPhase.h
41536	EFI_AUTH_STATUS_PLATFORM_OVERRI	0x01	PiMultiPhase.h
41537	EFI_AUTH_STATUS_IMAGE_SIGNED	0x02	PiMultiPhase.h
41538	EFI_AUTH_STATUS_NOT_TESTED	0x04	PiMultiPhase.h
41539	EFI_AUTH_STATUS_TEST_FAILED	0x08	PiMultiPhase.h
41540	EFI_AUTH_STATUS_ALL	0x0f	PiMultiPhase.h
41541	EFI_COMPONENT_NAME2_PROTOCOL_GU	{0x6a7a5cff, 0xe8d9, 0x4f70, { 0xba, 0xda, 0x75, 0xab, 0x30, 0x25, 0xce, 0x14 } }	ComponentName2.h
41542	EFI_CPU_ARCH_PROTOCOL_GUID	{ 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }	Cpu.h
41543	EFI_CPU_IO_PROTOCOL_GUID	{ \ 0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \ }	CpuIo.h
41544	EFI_DEBUG_SUPPORT_PROTOCOL_GUID	{ \ 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \ }	DebugSupport.h
41545	EXCEPT_IA32_DIVIDE_ERROR	0	DebugSupport.h
41546	EXCEPT_IA32_DEBUG	1	DebugSupport.h
41547	EXCEPT_IA32_NMI	2	DebugSupport.h
41548	EXCEPT_IA32_BREAKPOINT	3	DebugSupport.h
41549	EXCEPT_IA32_OVERFLOW	4	DebugSupport.h
41550	EXCEPT_IA32_BOUND	5	DebugSupport.h
41551	EXCEPT_IA32_INVALID_OPCODE	6	DebugSupport.h
41552	EXCEPT_IA32_DOUBLE_FAULT	8	DebugSupport.h
41553	EXCEPT_IA32_INVALID_TSS	10	DebugSupport.h
41554	EXCEPT_IA32_SEG_NOT_PRESENT	11	DebugSupport.h
41555	EXCEPT_IA32_STACK_FAULT	12	DebugSupport.h
41556	EXCEPT_IA32_GP_FAULT	13	DebugSupport.h
41557	EXCEPT_IA32_PAGE_FAULT	14	DebugSupport.h
41558	EXCEPT_IA32_FP_ERROR	16	DebugSupport.h
41559	EXCEPT_IA32_ALIGNMENT_CHECK	17	DebugSupport.h
41560	EXCEPT_IA32_MACHINE_CHECK	18	DebugSupport.h
41561	EXCEPT_IA32_SIMD	19	DebugSupport.h
41562	EXCEPT_X64_DIVIDE_ERROR	0	DebugSupport.h
41563	EXCEPT_X64_DEBUG	1	DebugSupport.h
41564	EXCEPT_X64_NMI	2	DebugSupport.h
41565	EXCEPT_X64_BREAKPOINT	3	DebugSupport.h
41566	EXCEPT_X64_OVERFLOW	4	DebugSupport.h
41567	EXCEPT_X64_BOUND	5	DebugSupport.h
41568	EXCEPT_X64_INVALID_OPCODE	6	DebugSupport.h
41569	EXCEPT_X64_DOUBLE_FAULT	8	DebugSupport.h
41570	EXCEPT_X64_INVALID_TSS	10	DebugSupport.h
41571	EXCEPT_X64_SEG_NOT_PRESENT	11	DebugSupport.h
41572	EXCEPT_X64_STACK_FAULT	12	DebugSupport.h
41573	EXCEPT_X64_GP_FAULT	13	DebugSupport.h
41574	EXCEPT_X64_PAGE_FAULT	14	DebugSupport.h
41575	EXCEPT_X64_FP_ERROR	16	DebugSupport.h
41576	EXCEPT_X64_ALIGNMENT_CHECK	17	DebugSupport.h
41577	EXCEPT_X64_MACHINE_CHECK	18	DebugSupport.h
41578	EXCEPT_X64_SIMD	19	DebugSupport.h
41579	EXCEPT_IPF_VHTP_TRANSLATION	0	DebugSupport.h
41580	EXCEPT_IPF_INSTRUCTION_TLB	1	DebugSupport.h
41581	EXCEPT_IPF_DATA_TLB	2	DebugSupport.h
41582	EXCEPT_IPF_ALT_INSTRUCTION_TLB	3	DebugSupport.h
41583	EXCEPT_IPF_ALT_DATA_TLB	4	DebugSupport.h
41584	EXCEPT_IPF_DATA_NESTED_TLB	5	DebugSupport.h
41585	EXCEPT_IPF_INSTRUCTION_KEY_MISS	6	DebugSupport.h
41586	EXCEPT_IPF_DATA_KEY_MISSED	7	DebugSupport.h
41587	EXCEPT_IPF_DIRTY_BIT	8	DebugSupport.h
41588	EXCEPT_IPF_INSTRUCTION_ACCESS_B	9	DebugSupport.h
41589	EXCEPT_IPF_DATA_ACCESS_BIT	10	DebugSupport.h
41590	EXCEPT_IPF_BREAKPOINT	11	DebugSupport.h
41591	EXCEPT_IPF_EXTERNAL_INTERRUPT	12	DebugSupport.h
41592	EXCEPT_IPF_PAGE_NOT_PRESENT	20	DebugSupport.h
41593	EXCEPT_IPF_KEY_PERMISSION	21	DebugSupport.h
41594	EXCEPT_IPF_INSTRUCTION_ACCESS_R	22	DebugSupport.h
41595	EXCEPT_IPF_DATA_ACCESS_RIGHTS	23	DebugSupport.h
41596	EXCEPT_IPF_GENERAL_EXCEPTION	24	DebugSupport.h
41597	EXCEPT_IPF_DISABLED_FP_REGISTER	25	DebugSupport.h
41598	EXCEPT_IPF_NAT_CONSUMPTION	26	DebugSupport.h
41599	EXCEPT_IPF_SPECULATION	27	DebugSupport.h
41600	EXCEPT_IPF_DEBUG	29	DebugSupport.h
41601	EXCEPT_IPF_UNALIGNED_REFERENCE	30	DebugSupport.h
41602	EXCEPT_IPF_UNSUPPORTED_DATA_REF	31	DebugSupport.h
41603	EXCEPT_IPF_FP_FAULT	32	DebugSupport.h
41604	EXCEPT_IPF_FP_TRAP	33	DebugSupport.h
41605	EXCEPT_IPF_LOWER_PRIVILEGE_TRAN	34	DebugSupport.h
41606	EXCEPT_IPF_TAKEN_BRANCH	35	DebugSupport.h
41607	EXCEPT_IPF_SINGLE_STEP	36	DebugSupport.h
41608	EXCEPT_IPF_IA32_EXCEPTION	45	DebugSupport.h
41609	EXCEPT_IPF_IA32_INTERCEPT	46	DebugSupport.h
41610	EXCEPT_IPF_IA32_INTERRUPT	47	DebugSupport.h
41611	EXCEPT_EBC_UNDEFINED	0	DebugSupport.h
41612	EXCEPT_EBC_DIVIDE_ERROR	1	DebugSupport.h
41613	EXCEPT_EBC_DEBUG	2	DebugSupport.h
41614	EXCEPT_EBC_BREAKPOINT	3	DebugSupport.h
41615	EXCEPT_EBC_OVERFLOW	4	DebugSupport.h
41616	EXCEPT_EBC_INVALID_OPCODE	5	DebugSupport.h	opcode out of range
41617	EXCEPT_EBC_STACK_FAULT	6	DebugSupport.h
41618	EXCEPT_EBC_ALIGNMENT_CHECK	7	DebugSupport.h
41619	EXCEPT_EBC_INSTRUCTION_ENCODING	8	DebugSupport.h	malformed instruction
41620	EXCEPT_EBC_BAD_BREAK	9	DebugSupport.h	BREAK 0 or undefined BREAK
41621	EXCEPT_EBC_STEP	10	DebugSupport.h	to support debug stepping
41622	MAX_EBC_EXCEPTION	EXCEPT_EBC_STEP	DebugSupport.h
41623	EFI_DEVICE_PATH_PROTOCOL_GUID	{ \ 0x9576e91, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	DevicePath.h
41624	DEVICE_PATH_PROTOCOL	EFI_DEVICE_PATH_PROTOCOL_GUID	DevicePath.h
41625	HARDWARE_DEVICE_PATH	0x01	DevicePath.h
41626	HW_PCI_DP	0x01	DevicePath.h
41627	HW_PCCARD_DP	0x02	DevicePath.h
41628	HW_MEMMAP_DP	0x03	DevicePath.h
41629	HW_VENDOR_DP	0x04	DevicePath.h
41630	HW_CONTROLLER_DP	0x05	DevicePath.h
41631	ACPI_DEVICE_PATH	0x02	DevicePath.h
41632	ACPI_DP	0x01	DevicePath.h
41633	ACPI_EXTENDED_DP	0x02	DevicePath.h
41634	PNP_EISA_ID_CONST	0x41d0	DevicePath.h
41635	PNP_EISA_ID_MASK	0xffff	DevicePath.h
41636	ACPI_ADR_DP	0x03	DevicePath.h
41637	ACPI_ADR_DISPLAY_TYPE_OTHER	0	DevicePath.h
41638	ACPI_ADR_DISPLAY_TYPE_VGA	1	DevicePath.h
41639	ACPI_ADR_DISPLAY_TYPE_TV	2	DevicePath.h
41640	ACPI_ADR_DISPLAY_TYPE_EXTERNAL_	3	DevicePath.h
41641	ACPI_ADR_DISPLAY_TYPE_INTERNAL_	4	DevicePath.h
41642	MESSAGING_DEVICE_PATH	0x03	DevicePath.h
41643	MSG_ATAPI_DP	0x01	DevicePath.h
41644	MSG_SCSI_DP	0x02	DevicePath.h
41645	MSG_FIBRECHANNEL_DP	0x03	DevicePath.h
41646	MSG_1394_DP	0x04	DevicePath.h
41647	MSG_USB_DP	0x05	DevicePath.h
41648	MSG_USB_CLASS_DP	0x0f	DevicePath.h
41649	MSG_USB_WWID_DP	0x10	DevicePath.h
41650	MSG_DEVICE_LOGICAL_UNIT_DP	0x11	DevicePath.h
41651	MSG_SATA_DP	0x12	DevicePath.h
41652	MSG_I2O_DP	0x06	DevicePath.h
41653	MSG_MAC_ADDR_DP	0x0b	DevicePath.h
41654	MSG_IPv4_DP	0x0c	DevicePath.h
41655	MSG_IPv6_DP	0x0d	DevicePath.h
41656	MSG_INFINIBAND_DP	0x09	DevicePath.h
41657	INFINIBAND_RESOURCE_FLAG_IOC_SE	0x01	DevicePath.h
41658	INFINIBAND_RESOURCE_FLAG_EXTEND	0x02	DevicePath.h
41659	INFINIBAND_RESOURCE_FLAG_CONSOL	0x04	DevicePath.h
41660	INFINIBAND_RESOURCE_FLAG_STORAG	0x08	DevicePath.h
41661	INFINIBAND_RESOURCE_FLAG_NETWOR	0x10	DevicePath.h
41662	MSG_UART_DP	0x0e	DevicePath.h
41663	MSG_VENDOR_DP	0x0a	DevicePath.h
41664	DEVICE_PATH_MESSAGING_PC_ANSI	EFI_PC_ANSI_GUID	DevicePath.h
41665	DEVICE_PATH_MESSAGING_VT_100	EFI_VT_100_GUID	DevicePath.h
41666	DEVICE_PATH_MESSAGING_VT_100_PL	EFI_VT_100_PLUS_GUID	DevicePath.h
41667	DEVICE_PATH_MESSAGING_VT_UTF8	EFI_VT_UTF8_GUID	DevicePath.h
41668	DEVICE_PATH_MESSAGING_UART_FLOW	EFI_UART_DEVICE_PATH_GUID	DevicePath.h
41669	DEVICE_PATH_MESSAGING_SAS	EFI_SAS_DEVICE_PATH_GUID	DevicePath.h
41670	MSG_ISCSI_DP	0x13	DevicePath.h
41671	ISCSI_LOGIN_OPTION_NO_HEADER_DI	0x0000	DevicePath.h
41672	ISCSI_LOGIN_OPTION_HEADER_DIGES	0x0002	DevicePath.h
41673	ISCSI_LOGIN_OPTION_NO_DATA_DIGE	0x0000	DevicePath.h
41674	ISCSI_LOGIN_OPTION_DATA_DIGEST_	0x0008	DevicePath.h
41675	ISCSI_LOGIN_OPTION_AUTHMETHOD_C	0x0000	DevicePath.h
41676	ISCSI_LOGIN_OPTION_AUTHMETHOD_N	0x1000	DevicePath.h
41677	ISCSI_LOGIN_OPTION_CHAP_BI	0x0000	DevicePath.h
41678	ISCSI_LOGIN_OPTION_CHAP_UNI	0x2000	DevicePath.h
41679	MEDIA_DEVICE_PATH	0x04	DevicePath.h
41680	MEDIA_HARDDRIVE_DP	0x01	DevicePath.h
41681	MBR_TYPE_PCAT	0x01	DevicePath.h
41682	MBR_TYPE_EFI_PARTITION_TABLE_HE	0x02	DevicePath.h
41683	SIGNATURE_TYPE_MBR	0x01	DevicePath.h
41684	SIGNATURE_TYPE_GUID	0x02	DevicePath.h
41685	MEDIA_CDROM_DP	0x02	DevicePath.h
41686	MEDIA_VENDOR_DP	0x03	DevicePath.h
41687	MEDIA_FILEPATH_DP	0x04	DevicePath.h
41688	SIZE_OF_FILEPATH_DEVICE_PATH	EFI_FIELD_OFFSET(FILEPATH_DEVICE_PATH,PathName)	DevicePath.h
41689	MEDIA_PROTOCOL_DP	0x05	DevicePath.h
41690	MEDIA_PIWG_FW_VOL_DP	0x7	DevicePath.h
41691	MEDIA_PIWG_FW_FILE_DP	0x6	DevicePath.h
41692	BBS_DEVICE_PATH	0x05	DevicePath.h
41693	BBS_BBS_DP	0x01	DevicePath.h
41694	BBS_TYPE_FLOPPY	0x01	DevicePath.h
41695	BBS_TYPE_HARDDRIVE	0x02	DevicePath.h
41696	BBS_TYPE_CDROM	0x03	DevicePath.h
41697	BBS_TYPE_PCMCIA	0x04	DevicePath.h
41698	BBS_TYPE_USB	0x05	DevicePath.h
41699	BBS_TYPE_EMBEDDED_NETWORK	0x06	DevicePath.h
41700	BBS_TYPE_BEV	0x80	DevicePath.h
41701	BBS_TYPE_UNKNOWN	0xFF	DevicePath.h
41702	END_DEVICE_PATH_TYPE	0x7f	DevicePath.h
41703	END_ENTIRE_DEVICE_PATH_SUBTYPE	0xFF	DevicePath.h
41704	END_INSTANCE_DEVICE_PATH_SUBTYP	0x01	DevicePath.h
41705	EFI_DRIVER_BINDING_PROTOCOL_GUI	{ \ 0x18a031ab, 0xb443, 0x4d1a, {0xa5, 0xc0, 0xc, 0x9, 0x26, 0x1e, 0x9f, 0x71 } \ }	DriverBinding.h
41706	EFI_NETWORK_INTERFACE_IDENTIFIE	{ \ 0xE18541CD, 0xF755, 0x4f73, {0x92, 0x8D, 0x64, 0x3C, 0x8A, 0x79, 0xB2, 0x29 } \ }	NetworkInterfaceIdentifier.h
41707	EFI_NETWORK_INTERFACE_IDENTIFIE	0x00010000	NetworkInterfaceIdentifier.h
41708	EFI_NETWORK_INTERFACE_IDENTIFIE	EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION	NetworkInterfaceIdentifier.h
41709	EFI_PCI_IO_PROTOCOL_GUID	{ \ 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \ }	PciIo.h
41710	EFI_PCI_IO_PASS_THROUGH_BAR	0xff	PciIo.h	< Special BAR that passes a memory or I/O cycle through unchanged
41711	EFI_PCI_IO_ATTRIBUTE_MASK	0x077f	PciIo.h	< All the following I/O and Memory cycles
41712	EFI_PCI_IO_ATTRIBUTE_ISA_MOTHER	0x0001	PciIo.h	< I/O cycles 0x0000-0x00FF (10 bit decode)
41713	EFI_PCI_IO_ATTRIBUTE_ISA_IO	0x0002	PciIo.h	< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
41714	EFI_PCI_IO_ATTRIBUTE_VGA_PALETT	0x0004	PciIo.h	< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
41715	EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY	0x0008	PciIo.h	< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
41716	EFI_PCI_IO_ATTRIBUTE_VGA_IO	0x0010	PciIo.h	< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
41717	EFI_PCI_IO_ATTRIBUTE_IDE_PRIMAR	0x0020	PciIo.h	< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
41718	EFI_PCI_IO_ATTRIBUTE_IDE_SECOND	0x0040	PciIo.h	< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
41719	EFI_PCI_IO_ATTRIBUTE_MEMORY_WRI	0x0080	PciIo.h	< Map a memory range so write are combined
41720	EFI_PCI_IO_ATTRIBUTE_IO	0x0100	PciIo.h	< Enable the I/O decode bit in the PCI Config Header
41721	EFI_PCI_IO_ATTRIBUTE_MEMORY	0x0200	PciIo.h	< Enable the Memory decode bit in the PCI Config Header
41722	EFI_PCI_IO_ATTRIBUTE_BUS_MASTER	0x0400	PciIo.h	< Enable the DMA bit in the PCI Config Header
41723	EFI_PCI_IO_ATTRIBUTE_MEMORY_CAC	0x0800	PciIo.h	< Map a memory range so all r/w accesses are cached
41724	EFI_PCI_IO_ATTRIBUTE_MEMORY_DIS	0x1000	PciIo.h	< Disable a memory range
41725	EFI_PCI_IO_ATTRIBUTE_EMBEDDED_D	0x2000	PciIo.h	< Clear for an add-in PCI Device
41726	EFI_PCI_IO_ATTRIBUTE_EMBEDDED_R	0x4000	PciIo.h	< Clear for a physical PCI Option ROM accessed through ROM BAR
41727	EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRE	0x8000	PciIo.h	< Clear for PCI controllers that can not genrate a DAC
41728	EFI_PCI_IO_ATTRIBUTE_ISA_IO_16	0x10000	PciIo.h	< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
41729	EFI_PCI_IO_ATTRIBUTE_VGA_PALETT	0x20000	PciIo.h	< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
41730	EFI_PCI_IO_ATTRIBUTE_VGA_IO_16	0x30000	PciIo.h	< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
41731	EFI_PCI_DEVICE_ENABLE	(EFI_PCI_IO_ATTRIBUTE_IO \| EFI_PCI_IO_ATTRIBUTE_MEMORY \| EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)	PciIo.h
41732	EFI_VGA_DEVICE_ENABLE	(EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO \| EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY \| EFI_PCI_IO_ATTRIBUTE_VGA_IO \| EFI_PCI_IO_ATTRIBUTE_IO)	PciIo.h
41733	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	{ \ 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PciRootBridgeIo.h
41734	EFI_PCI_ATTRIBUTE_ISA_MOTHERBOA	0x0001	PciRootBridgeIo.h
41735	EFI_PCI_ATTRIBUTE_ISA_IO	0x0002	PciRootBridgeIo.h
41736	EFI_PCI_ATTRIBUTE_VGA_PALETTE_I	0x0004	PciRootBridgeIo.h
41737	EFI_PCI_ATTRIBUTE_VGA_MEMORY	0x0008	PciRootBridgeIo.h
41738	EFI_PCI_ATTRIBUTE_VGA_IO	0x0010	PciRootBridgeIo.h
41739	EFI_PCI_ATTRIBUTE_IDE_PRIMARY_I	0x0020	PciRootBridgeIo.h
41740	EFI_PCI_ATTRIBUTE_IDE_SECONDARY	0x0040	PciRootBridgeIo.h
41741	EFI_PCI_ATTRIBUTE_MEMORY_WRITE_	0x0080	PciRootBridgeIo.h
41742	EFI_PCI_ATTRIBUTE_MEMORY_CACHED	0x0800	PciRootBridgeIo.h
41743	EFI_PCI_ATTRIBUTE_MEMORY_DISABL	0x1000	PciRootBridgeIo.h
41744	EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_	0x8000	PciRootBridgeIo.h
41745	EFI_PCI_ATTRIBUTE_VALID_FOR_ALL	(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE \| EFI_PCI_ATTRIBUTE_MEMORY_CACHED \| EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)	PciRootBridgeIo.h
41746	EFI_PCI_ATTRIBUTE_INVALID_FOR_A	(~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)	PciRootBridgeIo.h
41747	EFI_SIMPLE_NETWORK_PROTOCOL_GUI	{ \ 0xA19832B9, 0xAC25, 0x11D3, {0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \ }	SimpleNetwork.h
41748	EFI_SIMPLE_NETWORK_RECEIVE_UNIC	0x01	SimpleNetwork.h
41749	EFI_SIMPLE_NETWORK_RECEIVE_MULT	0x02	SimpleNetwork.h
41750	EFI_SIMPLE_NETWORK_RECEIVE_BROA	0x04	SimpleNetwork.h
41751	EFI_SIMPLE_NETWORK_RECEIVE_PROM	0x08	SimpleNetwork.h
41752	EFI_SIMPLE_NETWORK_RECEIVE_PROM	0x10	SimpleNetwork.h
41753	EFI_SIMPLE_NETWORK_RECEIVE_INTE	0x01	SimpleNetwork.h
41754	EFI_SIMPLE_NETWORK_TRANSMIT_INT	0x02	SimpleNetwork.h
41755	EFI_SIMPLE_NETWORK_COMMAND_INTE	0x04	SimpleNetwork.h
41756	EFI_SIMPLE_NETWORK_SOFTWARE_INT	0x08	SimpleNetwork.h
41757	MAX_MCAST_FILTER_CNT	16	SimpleNetwork.h
41758	EFI_SIMPLE_NETWORK_PROTOCOL_REV	0x00010000	SimpleNetwork.h
41759	EFI_SIMPLE_NETWORK_INTERFACE_RE	EFI_SIMPLE_NETWORK_PROTOCOL_REVISION	SimpleNetwork.h
41760	EFI_SIMPLE_TEXT_INPUT_PROTOCOL_	{ \ 0x387477c1, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	SimpleTextIn.h
41761	SIMPLE_INPUT_PROTOCOL	EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID	SimpleTextIn.h
41762	CHAR_NULL	0x0000	SimpleTextIn.h
41763	CHAR_BACKSPACE	0x0008	SimpleTextIn.h
41764	CHAR_TAB	0x0009	SimpleTextIn.h
41765	CHAR_LINEFEED	0x000A	SimpleTextIn.h
41766	CHAR_CARRIAGE_RETURN	0x000D	SimpleTextIn.h
41767	SCAN_NULL	0x0000	SimpleTextIn.h
41768	SCAN_UP	0x0001	SimpleTextIn.h
41769	SCAN_DOWN	0x0002	SimpleTextIn.h
41770	SCAN_RIGHT	0x0003	SimpleTextIn.h
41771	SCAN_LEFT	0x0004	SimpleTextIn.h
41772	SCAN_HOME	0x0005	SimpleTextIn.h
41773	SCAN_END	0x0006	SimpleTextIn.h
41774	SCAN_INSERT	0x0007	SimpleTextIn.h
41775	SCAN_DELETE	0x0008	SimpleTextIn.h
41776	SCAN_PAGE_UP	0x0009	SimpleTextIn.h
41777	SCAN_PAGE_DOWN	0x000A	SimpleTextIn.h
41778	SCAN_F1	0x000B	SimpleTextIn.h
41779	SCAN_F2	0x000C	SimpleTextIn.h
41780	SCAN_F3	0x000D	SimpleTextIn.h
41781	SCAN_F4	0x000E	SimpleTextIn.h
41782	SCAN_F5	0x000F	SimpleTextIn.h
41783	SCAN_F6	0x0010	SimpleTextIn.h
41784	SCAN_F7	0x0011	SimpleTextIn.h
41785	SCAN_F8	0x0012	SimpleTextIn.h
41786	SCAN_F9	0x0013	SimpleTextIn.h
41787	SCAN_F10	0x0014	SimpleTextIn.h
41788	SCAN_F11	0x0015	SimpleTextIn.h
41789	SCAN_F12	0x0016	SimpleTextIn.h
41790	SCAN_ESC	0x0017	SimpleTextIn.h
41791	EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL	{ \ 0x387477c2, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	SimpleTextOut.h
41792	SIMPLE_TEXT_OUTPUT_PROTOCOL	EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID	SimpleTextOut.h
41793	BOXDRAW_HORIZONTAL	0x2500	SimpleTextOut.h
41794	BOXDRAW_VERTICAL	0x2502	SimpleTextOut.h
41795	BOXDRAW_DOWN_RIGHT	0x250c	SimpleTextOut.h
41796	BOXDRAW_DOWN_LEFT	0x2510	SimpleTextOut.h
41797	BOXDRAW_UP_RIGHT	0x2514	SimpleTextOut.h
41798	BOXDRAW_UP_LEFT	0x2518	SimpleTextOut.h
41799	BOXDRAW_VERTICAL_RIGHT	0x251c	SimpleTextOut.h
41800	BOXDRAW_VERTICAL_LEFT	0x2524	SimpleTextOut.h
41801	BOXDRAW_DOWN_HORIZONTAL	0x252c	SimpleTextOut.h
41802	BOXDRAW_UP_HORIZONTAL	0x2534	SimpleTextOut.h
41803	BOXDRAW_VERTICAL_HORIZONTAL	0x253c	SimpleTextOut.h
41804	BOXDRAW_DOUBLE_HORIZONTAL	0x2550	SimpleTextOut.h
41805	BOXDRAW_DOUBLE_VERTICAL	0x2551	SimpleTextOut.h
41806	BOXDRAW_DOWN_RIGHT_DOUBLE	0x2552	SimpleTextOut.h
41807	BOXDRAW_DOWN_DOUBLE_RIGHT	0x2553	SimpleTextOut.h
41808	BOXDRAW_DOUBLE_DOWN_RIGHT	0x2554	SimpleTextOut.h
41809	BOXDRAW_DOWN_LEFT_DOUBLE	0x2555	SimpleTextOut.h
41810	BOXDRAW_DOWN_DOUBLE_LEFT	0x2556	SimpleTextOut.h
41811	BOXDRAW_DOUBLE_DOWN_LEFT	0x2557	SimpleTextOut.h
41812	BOXDRAW_UP_RIGHT_DOUBLE	0x2558	SimpleTextOut.h
41813	BOXDRAW_UP_DOUBLE_RIGHT	0x2559	SimpleTextOut.h
41814	BOXDRAW_DOUBLE_UP_RIGHT	0x255a	SimpleTextOut.h
41815	BOXDRAW_UP_LEFT_DOUBLE	0x255b	SimpleTextOut.h
41816	BOXDRAW_UP_DOUBLE_LEFT	0x255c	SimpleTextOut.h
41817	BOXDRAW_DOUBLE_UP_LEFT	0x255d	SimpleTextOut.h
41818	BOXDRAW_VERTICAL_RIGHT_DOUBLE	0x255e	SimpleTextOut.h
41819	BOXDRAW_VERTICAL_DOUBLE_RIGHT	0x255f	SimpleTextOut.h
41820	BOXDRAW_DOUBLE_VERTICAL_RIGHT	0x2560	SimpleTextOut.h
41821	BOXDRAW_VERTICAL_LEFT_DOUBLE	0x2561	SimpleTextOut.h
41822	BOXDRAW_VERTICAL_DOUBLE_LEFT	0x2562	SimpleTextOut.h
41823	BOXDRAW_DOUBLE_VERTICAL_LEFT	0x2563	SimpleTextOut.h
41824	BOXDRAW_DOWN_HORIZONTAL_DOUBLE	0x2564	SimpleTextOut.h
41825	BOXDRAW_DOWN_DOUBLE_HORIZONTAL	0x2565	SimpleTextOut.h
41826	BOXDRAW_DOUBLE_DOWN_HORIZONTAL	0x2566	SimpleTextOut.h
41827	BOXDRAW_UP_HORIZONTAL_DOUBLE	0x2567	SimpleTextOut.h
41828	BOXDRAW_UP_DOUBLE_HORIZONTAL	0x2568	SimpleTextOut.h
41829	BOXDRAW_DOUBLE_UP_HORIZONTAL	0x2569	SimpleTextOut.h
41830	BOXDRAW_VERTICAL_HORIZONTAL_DOU	0x256a	SimpleTextOut.h
41831	BOXDRAW_VERTICAL_DOUBLE_HORIZON	0x256b	SimpleTextOut.h
41832	BOXDRAW_DOUBLE_VERTICAL_HORIZON	0x256c	SimpleTextOut.h
41833	BLOCKELEMENT_FULL_BLOCK	0x2588	SimpleTextOut.h
41834	BLOCKELEMENT_LIGHT_SHADE	0x2591	SimpleTextOut.h
41835	GEOMETRICSHAPE_UP_TRIANGLE	0x25b2	SimpleTextOut.h
41836	GEOMETRICSHAPE_RIGHT_TRIANGLE	0x25ba	SimpleTextOut.h
41837	GEOMETRICSHAPE_DOWN_TRIANGLE	0x25bc	SimpleTextOut.h
41838	GEOMETRICSHAPE_LEFT_TRIANGLE	0x25c4	SimpleTextOut.h
41839	ARROW_LEFT	0x2190	SimpleTextOut.h
41840	ARROW_UP	0x2191	SimpleTextOut.h
41841	ARROW_RIGHT	0x2192	SimpleTextOut.h
41842	ARROW_DOWN	0x2193	SimpleTextOut.h
41843	EFI_BLACK	0x00	SimpleTextOut.h
41844	EFI_BLUE	0x01	SimpleTextOut.h
41845	EFI_GREEN	0x02	SimpleTextOut.h
41846	EFI_CYAN	(EFI_BLUE \| EFI_GREEN)	SimpleTextOut.h
41847	EFI_RED	0x04	SimpleTextOut.h
41848	EFI_MAGENTA	(EFI_BLUE \| EFI_RED)	SimpleTextOut.h
41849	EFI_BROWN	(EFI_GREEN \| EFI_RED)	SimpleTextOut.h
41850	EFI_LIGHTGRAY	(EFI_BLUE \| EFI_GREEN \| EFI_RED)	SimpleTextOut.h
41851	EFI_BRIGHT	0x08	SimpleTextOut.h
41852	EFI_DARKGRAY	(EFI_BRIGHT)	SimpleTextOut.h
41853	EFI_LIGHTBLUE	(EFI_BLUE \| EFI_BRIGHT)	SimpleTextOut.h
41854	EFI_LIGHTGREEN	(EFI_GREEN \| EFI_BRIGHT)	SimpleTextOut.h
41855	EFI_LIGHTCYAN	(EFI_CYAN \| EFI_BRIGHT)	SimpleTextOut.h
41856	EFI_LIGHTRED	(EFI_RED \| EFI_BRIGHT)	SimpleTextOut.h
41857	EFI_LIGHTMAGENTA	(EFI_MAGENTA \| EFI_BRIGHT)	SimpleTextOut.h
41858	EFI_YELLOW	(EFI_BROWN \| EFI_BRIGHT)	SimpleTextOut.h
41859	EFI_WHITE	(EFI_BLUE \| EFI_GREEN \| EFI_RED \| EFI_BRIGHT)	SimpleTextOut.h
41860	EFI_BACKGROUND_BLACK	0x00	SimpleTextOut.h
41861	EFI_BACKGROUND_BLUE	0x10	SimpleTextOut.h
41862	EFI_BACKGROUND_GREEN	0x20	SimpleTextOut.h
41863	EFI_BACKGROUND_CYAN	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_GREEN)	SimpleTextOut.h
41864	EFI_BACKGROUND_RED	0x40	SimpleTextOut.h
41865	EFI_BACKGROUND_MAGENTA	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_RED)	SimpleTextOut.h
41866	EFI_BACKGROUND_BROWN	(EFI_BACKGROUND_GREEN \| EFI_BACKGROUND_RED)	SimpleTextOut.h
41867	EFI_BACKGROUND_LIGHTGRAY	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_GREEN \| EFI_BACKGROUND_RED)	SimpleTextOut.h
41868	EFI_WIDE_ATTRIBUTE	0x80	SimpleTextOut.h
41869	EFI_SUCCESS	RETURN_SUCCESS	UefiBaseType.h
41870	EFI_LOAD_ERROR	RETURN_LOAD_ERROR	UefiBaseType.h
41871	EFI_INVALID_PARAMETER	RETURN_INVALID_PARAMETER	UefiBaseType.h
41872	EFI_UNSUPPORTED	RETURN_UNSUPPORTED	UefiBaseType.h
41873	EFI_BAD_BUFFER_SIZE	RETURN_BAD_BUFFER_SIZE	UefiBaseType.h
41874	EFI_BUFFER_TOO_SMALL	RETURN_BUFFER_TOO_SMALL	UefiBaseType.h
41875	EFI_NOT_READY	RETURN_NOT_READY	UefiBaseType.h
41876	EFI_DEVICE_ERROR	RETURN_DEVICE_ERROR	UefiBaseType.h
41877	EFI_WRITE_PROTECTED	RETURN_WRITE_PROTECTED	UefiBaseType.h
41878	EFI_OUT_OF_RESOURCES	RETURN_OUT_OF_RESOURCES	UefiBaseType.h
41879	EFI_VOLUME_CORRUPTED	RETURN_VOLUME_CORRUPTED	UefiBaseType.h
41880	EFI_VOLUME_FULL	RETURN_VOLUME_FULL	UefiBaseType.h
41881	EFI_NO_MEDIA	RETURN_NO_MEDIA	UefiBaseType.h
41882	EFI_MEDIA_CHANGED	RETURN_MEDIA_CHANGED	UefiBaseType.h
41883	EFI_NOT_FOUND	RETURN_NOT_FOUND	UefiBaseType.h
41884	EFI_ACCESS_DENIED	RETURN_ACCESS_DENIED	UefiBaseType.h
41885	EFI_NO_RESPONSE	RETURN_NO_RESPONSE	UefiBaseType.h
41886	EFI_NO_MAPPING	RETURN_NO_MAPPING	UefiBaseType.h
41887	EFI_TIMEOUT	RETURN_TIMEOUT	UefiBaseType.h
41888	EFI_NOT_STARTED	RETURN_NOT_STARTED	UefiBaseType.h
41889	EFI_ALREADY_STARTED	RETURN_ALREADY_STARTED	UefiBaseType.h
41890	EFI_ABORTED	RETURN_ABORTED	UefiBaseType.h
41891	EFI_ICMP_ERROR	RETURN_ICMP_ERROR	UefiBaseType.h
41892	EFI_TFTP_ERROR	RETURN_TFTP_ERROR	UefiBaseType.h
41893	EFI_PROTOCOL_ERROR	RETURN_PROTOCOL_ERROR	UefiBaseType.h
41894	EFI_INCOMPATIBLE_VERSION	RETURN_INCOMPATIBLE_VERSION	UefiBaseType.h
41895	EFI_SECURITY_VIOLATION	RETURN_SECURITY_VIOLATION	UefiBaseType.h
41896	EFI_CRC_ERROR	RETURN_CRC_ERROR	UefiBaseType.h
41897	EFI_END_OF_MEDIA	RETURN_END_OF_MEDIA	UefiBaseType.h
41898	EFI_END_OF_FILE	RETURN_END_OF_FILE	UefiBaseType.h
41899	EFI_INVALID_LANGUAGE	RETURN_INVALID_LANGUAGE	UefiBaseType.h
41900	EFI_WARN_UNKNOWN_GLYPH	RETURN_WARN_UNKNOWN_GLYPH	UefiBaseType.h
41901	EFI_WARN_DELETE_FAILURE	RETURN_WARN_DELETE_FAILURE	UefiBaseType.h
41902	EFI_WARN_WRITE_FAILURE	RETURN_WARN_WRITE_FAILURE	UefiBaseType.h
41903	EFI_WARN_BUFFER_TOO_SMALL	RETURN_WARN_BUFFER_TOO_SMALL	UefiBaseType.h
41904	EFI_PAGE_SIZE	0x1000	UefiBaseType.h
41905	EFI_PAGE_MASK	0xFFF	UefiBaseType.h
41906	EFI_PAGE_SHIFT	12	UefiBaseType.h
41907	EFI_MAX_BIT	MAX_BIT	UefiBaseType.h
41908	EFI_MAX_ADDRESS	MAX_ADDRESS	UefiBaseType.h
41909	RFC_3066_ENTRY_SIZE	(42 + 1)	UefiBaseType.h
41910	ISO_639_2_ENTRY_SIZE	3	UefiBaseType.h
41911	PRIMARY_PART_HEADER_LBA	1	UefiGpt.h
41912	EFI_PTAB_HEADER_ID	0x5452415020494645ULL	UefiGpt.h
41913	EFI_HII_PACKAGE_TYPE_ALL	0x00	UefiInternalFormRepresentation.h
41914	EFI_HII_PACKAGE_TYPE_GUID	0x01	UefiInternalFormRepresentation.h
41915	EFI_HII_PACKAGE_FORMS	0x02	UefiInternalFormRepresentation.h
41916	EFI_HII_PACKAGE_STRINGS	0x04	UefiInternalFormRepresentation.h
41917	EFI_HII_PACKAGE_FONTS	0x05	UefiInternalFormRepresentation.h
41918	EFI_HII_PACKAGE_IMAGES	0x06	UefiInternalFormRepresentation.h
41919	EFI_HII_PACKAGE_SIMPLE_FONTS	0x07	UefiInternalFormRepresentation.h
41920	EFI_HII_PACKAGE_DEVICE_PATH	0x08	UefiInternalFormRepresentation.h
41921	EFI_HII_PACKAGE_KEYBOARD_LAYOUT	0x09	UefiInternalFormRepresentation.h
41922	EFI_HII_PACKAGE_END	0xDF	UefiInternalFormRepresentation.h
41923	EFI_HII_PACKAGE_TYPE_SYSTEM_BEG	0xE0	UefiInternalFormRepresentation.h
41924	EFI_HII_PACKAGE_TYPE_SYSTEM_END	0xFF	UefiInternalFormRepresentation.h
41925	EFI_GLYPH_NON_SPACING	0x01	UefiInternalFormRepresentation.h
41926	EFI_GLYPH_WIDE	0x02	UefiInternalFormRepresentation.h
41927	EFI_GLYPH_HEIGHT	19	UefiInternalFormRepresentation.h
41928	EFI_GLYPH_WIDTH	8	UefiInternalFormRepresentation.h
41929	EFI_HII_FONT_STYLE_NORMAL	0x00000000	UefiInternalFormRepresentation.h
41930	EFI_HII_FONT_STYLE_BOLD	0x00000001	UefiInternalFormRepresentation.h
41931	EFI_HII_FONT_STYLE_ITALIC	0x00000002	UefiInternalFormRepresentation.h
41932	EFI_HII_FONT_STYLE_EMBOSS	0x00010000	UefiInternalFormRepresentation.h
41933	EFI_HII_FONT_STYLE_OUTLINE	0x00020000	UefiInternalFormRepresentation.h
41934	EFI_HII_FONT_STYLE_SHADOW	0x00040000	UefiInternalFormRepresentation.h
41935	EFI_HII_FONT_STYLE_UNDERLINE	0x00080000	UefiInternalFormRepresentation.h
41936	EFI_HII_FONT_STYLE_DBL_UNDER	0x00100000	UefiInternalFormRepresentation.h
41937	EFI_HII_GIBT_END	0x00	UefiInternalFormRepresentation.h
41938	EFI_HII_GIBT_GLYPH	0x10	UefiInternalFormRepresentation.h
41939	EFI_HII_GIBT_GLYPHS	0x11	UefiInternalFormRepresentation.h
41940	EFI_HII_GIBT_GLYPH_DEFAULT	0x12	UefiInternalFormRepresentation.h
41941	EFI_HII_GIBT_GLYPHS_DEFAULT	0x13	UefiInternalFormRepresentation.h
41942	EFI_HII_GIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
41943	EFI_HII_GIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
41944	EFI_HII_GIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
41945	EFI_HII_GIBT_DEFAULTS	0x23	UefiInternalFormRepresentation.h
41946	EFI_HII_GIBT_EXT1	0x30	UefiInternalFormRepresentation.h
41947	EFI_HII_GIBT_EXT2	0x31	UefiInternalFormRepresentation.h
41948	EFI_HII_GIBT_EXT4	0x32	UefiInternalFormRepresentation.h
41949	UEFI_CONFIG_LANG	L"x-UEFI"	UefiInternalFormRepresentation.h
41950	UEFI_CONFIG_LANG2	L"x-i-UEFI"	UefiInternalFormRepresentation.h
41951	EFI_HII_SIBT_END	0x00	UefiInternalFormRepresentation.h
41952	EFI_HII_SIBT_STRING_SCSU	0x10	UefiInternalFormRepresentation.h
41953	EFI_HII_SIBT_STRING_SCSU_FONT	0x11	UefiInternalFormRepresentation.h
41954	EFI_HII_SIBT_STRINGS_SCSU	0x12	UefiInternalFormRepresentation.h
41955	EFI_HII_SIBT_STRINGS_SCSU_FONT	0x13	UefiInternalFormRepresentation.h
41956	EFI_HII_SIBT_STRING_UCS2	0x14	UefiInternalFormRepresentation.h
41957	EFI_HII_SIBT_STRING_UCS2_FONT	0x15	UefiInternalFormRepresentation.h
41958	EFI_HII_SIBT_STRINGS_UCS2	0x16	UefiInternalFormRepresentation.h
41959	EFI_HII_SIBT_STRINGS_UCS2_FONT	0x17	UefiInternalFormRepresentation.h
41960	EFI_HII_SIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
41961	EFI_HII_SIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
41962	EFI_HII_SIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
41963	EFI_HII_SIBT_EXT1	0x30	UefiInternalFormRepresentation.h
41964	EFI_HII_SIBT_EXT2	0x31	UefiInternalFormRepresentation.h
41965	EFI_HII_SIBT_EXT4	0x32	UefiInternalFormRepresentation.h
41966	EFI_HII_SIBT_FONT	0x40	UefiInternalFormRepresentation.h
41967	EFI_HII_IIBT_END	0x00	UefiInternalFormRepresentation.h
41968	EFI_HII_IIBT_IMAGE_1BIT	0x10	UefiInternalFormRepresentation.h
41969	EFI_HII_IIBT_IMAGE_1BIT_TRANS	0x11	UefiInternalFormRepresentation.h
41970	EFI_HII_IIBT_IMAGE_4BIT	0x12	UefiInternalFormRepresentation.h
41971	EFI_HII_IIBT_IMAGE_4BIT_TRANS	0x13	UefiInternalFormRepresentation.h
41972	EFI_HII_IIBT_IMAGE_8BIT	0x14	UefiInternalFormRepresentation.h
41973	EFI_HII_IIBT_IMAGE_8BIT_TRANS	0x15	UefiInternalFormRepresentation.h
41974	EFI_HII_IIBT_IMAGE_24BIT	0x16	UefiInternalFormRepresentation.h
41975	EFI_HII_IIBT_IMAGE_24BIT_TRANS	0x17	UefiInternalFormRepresentation.h
41976	EFI_HII_IIBT_IMAGE_JPEG	0x18	UefiInternalFormRepresentation.h
41977	EFI_HII_IIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
41978	EFI_HII_IIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
41979	EFI_HII_IIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
41980	EFI_HII_IIBT_EXT1	0x30	UefiInternalFormRepresentation.h
41981	EFI_HII_IIBT_EXT2	0x31	UefiInternalFormRepresentation.h
41982	EFI_HII_IIBT_EXT4	0x32	UefiInternalFormRepresentation.h
41983	EFI_IFR_FORM_OP	0x01	UefiInternalFormRepresentation.h
41984	EFI_IFR_SUBTITLE_OP	0x02	UefiInternalFormRepresentation.h
41985	EFI_IFR_TEXT_OP	0x03	UefiInternalFormRepresentation.h
41986	EFI_IFR_IMAGE_OP	0x04	UefiInternalFormRepresentation.h
41987	EFI_IFR_ONE_OF_OP	0x05	UefiInternalFormRepresentation.h
41988	EFI_IFR_CHECKBOX_OP	0x06	UefiInternalFormRepresentation.h
41989	EFI_IFR_NUMERIC_OP	0x07	UefiInternalFormRepresentation.h
41990	EFI_IFR_PASSWORD_OP	0x08	UefiInternalFormRepresentation.h
41991	EFI_IFR_ONE_OF_OPTION_OP	0x09	UefiInternalFormRepresentation.h
41992	EFI_IFR_SUPPRESS_IF_OP	0x0A	UefiInternalFormRepresentation.h
41993	EFI_IFR_LOCKED_OP	0x0B	UefiInternalFormRepresentation.h
41994	EFI_IFR_ACTION_OP	0x0C	UefiInternalFormRepresentation.h
41995	EFI_IFR_RESET_BUTTON_OP	0x0D	UefiInternalFormRepresentation.h
41996	EFI_IFR_FORM_SET_OP	0x0E	UefiInternalFormRepresentation.h
41997	EFI_IFR_REF_OP	0x0F	UefiInternalFormRepresentation.h
41998	EFI_IFR_NO_SUBMIT_IF_OP	0x10	UefiInternalFormRepresentation.h
41999	EFI_IFR_INCONSISTENT_IF_OP	0x11	UefiInternalFormRepresentation.h
42000	EFI_IFR_EQ_ID_VAL_OP	0x12	UefiInternalFormRepresentation.h
42001	EFI_IFR_EQ_ID_ID_OP	0x13	UefiInternalFormRepresentation.h
42002	EFI_IFR_EQ_ID_LIST_OP	0x14	UefiInternalFormRepresentation.h
42003	EFI_IFR_AND_OP	0x15	UefiInternalFormRepresentation.h
42004	EFI_IFR_OR_OP	0x16	UefiInternalFormRepresentation.h
42005	EFI_IFR_NOT_OP	0x17	UefiInternalFormRepresentation.h
42006	EFI_IFR_RULE_OP	0x18	UefiInternalFormRepresentation.h
42007	EFI_IFR_GRAY_OUT_IF_OP	0x19	UefiInternalFormRepresentation.h
42008	EFI_IFR_DATE_OP	0x1A	UefiInternalFormRepresentation.h
42009	EFI_IFR_TIME_OP	0x1B	UefiInternalFormRepresentation.h
42010	EFI_IFR_STRING_OP	0x1C	UefiInternalFormRepresentation.h
42011	EFI_IFR_REFRESH_OP	0x1D	UefiInternalFormRepresentation.h
42012	EFI_IFR_DISABLE_IF_OP	0x1E	UefiInternalFormRepresentation.h
42013	EFI_IFR_TO_LOWER_OP	0x20	UefiInternalFormRepresentation.h
42014	EFI_IFR_TO_UPPER_OP	0x21	UefiInternalFormRepresentation.h
42015	EFI_IFR_ORDERED_LIST_OP	0x23	UefiInternalFormRepresentation.h
42016	EFI_IFR_VARSTORE_OP	0x24	UefiInternalFormRepresentation.h
42017	EFI_IFR_VARSTORE_NAME_VALUE_OP	0x25	UefiInternalFormRepresentation.h
42018	EFI_IFR_VARSTORE_EFI_OP	0x26	UefiInternalFormRepresentation.h
42019	EFI_IFR_VARSTORE_DEVICE_OP	0x27	UefiInternalFormRepresentation.h
42020	EFI_IFR_VERSION_OP	0x28	UefiInternalFormRepresentation.h
42021	EFI_IFR_END_OP	0x29	UefiInternalFormRepresentation.h
42022	EFI_IFR_MATCH_OP	0x2A	UefiInternalFormRepresentation.h
42023	EFI_IFR_EQUAL_OP	0x2F	UefiInternalFormRepresentation.h
42024	EFI_IFR_NOT_EQUAL_OP	0x30	UefiInternalFormRepresentation.h
42025	EFI_IFR_GREATER_THAN_OP	0x31	UefiInternalFormRepresentation.h
42026	EFI_IFR_GREATER_EQUAL_OP	0x32	UefiInternalFormRepresentation.h
42027	EFI_IFR_LESS_THAN_OP	0x33	UefiInternalFormRepresentation.h
42028	EFI_IFR_LESS_EQUAL_OP	0x34	UefiInternalFormRepresentation.h
42029	EFI_IFR_BITWISE_AND_OP	0x35	UefiInternalFormRepresentation.h
42030	EFI_IFR_BITWISE_OR_OP	0x36	UefiInternalFormRepresentation.h
42031	EFI_IFR_BITWISE_NOT_OP	0x37	UefiInternalFormRepresentation.h
42032	EFI_IFR_SHIFT_LEFT_OP	0x38	UefiInternalFormRepresentation.h
42033	EFI_IFR_SHIFT_RIGHT_OP	0x39	UefiInternalFormRepresentation.h
42034	EFI_IFR_ADD_OP	0x3A	UefiInternalFormRepresentation.h
42035	EFI_IFR_SUBTRACT_OP	0x3B	UefiInternalFormRepresentation.h
42036	EFI_IFR_MULTIPLY_OP	0x3C	UefiInternalFormRepresentation.h
42037	EFI_IFR_DIVIDE_OP	0x3D	UefiInternalFormRepresentation.h
42038	EFI_IFR_MODULO_OP	0x3E	UefiInternalFormRepresentation.h
42039	EFI_IFR_RULE_REF_OP	0x3F	UefiInternalFormRepresentation.h
42040	EFI_IFR_QUESTION_REF1_OP	0x40	UefiInternalFormRepresentation.h
42041	EFI_IFR_QUESTION_REF2_OP	0x41	UefiInternalFormRepresentation.h
42042	EFI_IFR_UINT8_OP	0x42	UefiInternalFormRepresentation.h
42043	EFI_IFR_UINT16_OP	0x43	UefiInternalFormRepresentation.h
42044	EFI_IFR_UINT32_OP	0x44	UefiInternalFormRepresentation.h
42045	EFI_IFR_UINT64_OP	0x45	UefiInternalFormRepresentation.h
42046	EFI_IFR_TRUE_OP	0x46	UefiInternalFormRepresentation.h
42047	EFI_IFR_FALSE_OP	0x47	UefiInternalFormRepresentation.h
42048	EFI_IFR_TO_UINT_OP	0x48	UefiInternalFormRepresentation.h
42049	EFI_IFR_TO_STRING_OP	0x49	UefiInternalFormRepresentation.h
42050	EFI_IFR_TO_BOOLEAN_OP	0x4A	UefiInternalFormRepresentation.h
42051	EFI_IFR_MID_OP	0x4B	UefiInternalFormRepresentation.h
42052	EFI_IFR_FIND_OP	0x4C	UefiInternalFormRepresentation.h
42053	EFI_IFR_TOKEN_OP	0x4D	UefiInternalFormRepresentation.h
42054	EFI_IFR_STRING_REF1_OP	0x4E	UefiInternalFormRepresentation.h
42055	EFI_IFR_STRING_REF2_OP	0x4F	UefiInternalFormRepresentation.h
42056	EFI_IFR_CONDITIONAL_OP	0x50	UefiInternalFormRepresentation.h
42057	EFI_IFR_QUESTION_REF3_OP	0x51	UefiInternalFormRepresentation.h
42058	EFI_IFR_ZERO_OP	0x52	UefiInternalFormRepresentation.h
42059	EFI_IFR_ONE_OP	0x53	UefiInternalFormRepresentation.h
42060	EFI_IFR_ONES_OP	0x54	UefiInternalFormRepresentation.h
42061	EFI_IFR_UNDEFINED_OP	0x55	UefiInternalFormRepresentation.h
42062	EFI_IFR_LENGTH_OP	0x56	UefiInternalFormRepresentation.h
42063	EFI_IFR_DUP_OP	0x57	UefiInternalFormRepresentation.h
42064	EFI_IFR_THIS_OP	0x58	UefiInternalFormRepresentation.h
42065	EFI_IFR_SPAN_OP	0x59	UefiInternalFormRepresentation.h
42066	EFI_IFR_VALUE_OP	0x5A	UefiInternalFormRepresentation.h
42067	EFI_IFR_DEFAULT_OP	0x5B	UefiInternalFormRepresentation.h
42068	EFI_IFR_DEFAULTSTORE_OP	0x5C	UefiInternalFormRepresentation.h
42069	EFI_IFR_CATENATE_OP	0x5E	UefiInternalFormRepresentation.h
42070	EFI_IFR_GUID_OP	0x5F	UefiInternalFormRepresentation.h
42071	EFI_IFR_FLAG_READ_ONLY	0x01	UefiInternalFormRepresentation.h
42072	EFI_IFR_FLAG_CALLBACK	0x04	UefiInternalFormRepresentation.h
42073	EFI_IFR_FLAG_RESET_REQUIRED	0x10	UefiInternalFormRepresentation.h
42074	EFI_IFR_FLAG_OPTIONS_ONLY	0x80	UefiInternalFormRepresentation.h
42075	EFI_HII_DEFAULT_CLASS_STANDARD	0x0000	UefiInternalFormRepresentation.h
42076	EFI_HII_DEFAULT_CLASS_MANUFACTU	0x0001	UefiInternalFormRepresentation.h
42077	EFI_HII_DEFAULT_CLASS_SAFE	0x0002	UefiInternalFormRepresentation.h
42078	EFI_HII_DEFAULT_CLASS_PLATFORM_	0x4000	UefiInternalFormRepresentation.h
42079	EFI_HII_DEFAULT_CLASS_PLATFORM_	0x7fff	UefiInternalFormRepresentation.h
42080	EFI_HII_DEFAULT_CLASS_HARDWARE_	0x8000	UefiInternalFormRepresentation.h
42081	EFI_HII_DEFAULT_CLASS_HARDWARE_	0xbfff	UefiInternalFormRepresentation.h
42082	EFI_HII_DEFAULT_CLASS_FIRMWARE_	0xc000	UefiInternalFormRepresentation.h
42083	EFI_HII_DEFAULT_CLASS_FIRMWARE_	0xffff	UefiInternalFormRepresentation.h
42084	EFI_IFR_FLAGS_HORIZONTAL	0x01	UefiInternalFormRepresentation.h
42085	EFI_IFR_CHECKBOX_DEFAULT	0x01	UefiInternalFormRepresentation.h
42086	EFI_IFR_CHECKBOX_DEFAULT_MFG	0x02	UefiInternalFormRepresentation.h
42087	EFI_QF_DATE_YEAR_SUPPRESS	0x01	UefiInternalFormRepresentation.h
42088	EFI_QF_DATE_MONTH_SUPPRESS	0x02	UefiInternalFormRepresentation.h
42089	EFI_QF_DATE_DAY_SUPPRESS	0x04	UefiInternalFormRepresentation.h
42090	EFI_QF_DATE_STORAGE	0x30	UefiInternalFormRepresentation.h
42091	QF_DATE_STORAGE_NORMAL	0x00	UefiInternalFormRepresentation.h
42092	QF_DATE_STORAGE_TIME	0x10	UefiInternalFormRepresentation.h
42093	QF_DATE_STORAGE_WAKEUP	0x20	UefiInternalFormRepresentation.h
42094	EFI_IFR_NUMERIC_SIZE	0x03	UefiInternalFormRepresentation.h
42095	EFI_IFR_NUMERIC_SIZE_1	0x00	UefiInternalFormRepresentation.h
42096	EFI_IFR_NUMERIC_SIZE_2	0x01	UefiInternalFormRepresentation.h
42097	EFI_IFR_NUMERIC_SIZE_4	0x02	UefiInternalFormRepresentation.h
42098	EFI_IFR_NUMERIC_SIZE_8	0x03	UefiInternalFormRepresentation.h
42099	EFI_IFR_DISPLAY	0x30	UefiInternalFormRepresentation.h
42100	EFI_IFR_DISPLAY_INT_DEC	0x00	UefiInternalFormRepresentation.h
42101	EFI_IFR_DISPLAY_UINT_DEC	0x10	UefiInternalFormRepresentation.h
42102	EFI_IFR_DISPLAY_UINT_HEX	0x20	UefiInternalFormRepresentation.h
42103	EFI_IFR_STRING_MULTI_LINE	0x01	UefiInternalFormRepresentation.h
42104	EFI_IFR_UNIQUE_SET	0x01	UefiInternalFormRepresentation.h
42105	EFI_IFR_NO_EMPTY_SET	0x02	UefiInternalFormRepresentation.h
42106	QF_TIME_HOUR_SUPPRESS	0x01	UefiInternalFormRepresentation.h
42107	QF_TIME_MINUTE_SUPPRESS	0x02	UefiInternalFormRepresentation.h
42108	QF_TIME_SECOND_SUPPRESS	0x04	UefiInternalFormRepresentation.h
42109	QF_TIME_STORAGE	0x30	UefiInternalFormRepresentation.h
42110	QF_TIME_STORAGE_NORMAL	0x00	UefiInternalFormRepresentation.h
42111	QF_TIME_STORAGE_TIME	0x10	UefiInternalFormRepresentation.h
42112	QF_TIME_STORAGE_WAKEUP	0x20	UefiInternalFormRepresentation.h
42113	EFI_IFR_TYPE_NUM_SIZE_8	0x00	UefiInternalFormRepresentation.h
42114	EFI_IFR_TYPE_NUM_SIZE_16	0x01	UefiInternalFormRepresentation.h
42115	EFI_IFR_TYPE_NUM_SIZE_32	0x02	UefiInternalFormRepresentation.h
42116	EFI_IFR_TYPE_NUM_SIZE_64	0x03	UefiInternalFormRepresentation.h
42117	EFI_IFR_TYPE_BOOLEAN	0x04	UefiInternalFormRepresentation.h
42118	EFI_IFR_TYPE_TIME	0x05	UefiInternalFormRepresentation.h
42119	EFI_IFR_TYPE_DATE	0x06	UefiInternalFormRepresentation.h
42120	EFI_IFR_TYPE_STRING	0x07	UefiInternalFormRepresentation.h
42121	EFI_IFR_TYPE_OTHER	0x08	UefiInternalFormRepresentation.h
42122	EFI_IFR_OPTION_DEFAULT	0x10	UefiInternalFormRepresentation.h
42123	EFI_IFR_OPTION_DEFAULT_MFG	0x20	UefiInternalFormRepresentation.h
42124	EFI_IFR_STRING_UNSIGNED_DEC	0	UefiInternalFormRepresentation.h
42125	EFI_IFR_STRING_SIGNED_DEC	1	UefiInternalFormRepresentation.h
42126	EFI_IFR_STRING_LOWERCASE_HEX	2	UefiInternalFormRepresentation.h
42127	EFI_IFR_STRING_UPPERCASE_HEX	3	UefiInternalFormRepresentation.h
42128	EFI_IFR_STRING_ASCII	0	UefiInternalFormRepresentation.h
42129	EFI_IFR_STRING_UNICODE	8	UefiInternalFormRepresentation.h
42130	EFI_IFR_FF_CASE_SENSITIVE	0x00	UefiInternalFormRepresentation.h
42131	EFI_IFR_FF_CASE_INSENSITIVE	0x01	UefiInternalFormRepresentation.h
42132	EFI_IFR_FLAGS_FIRST_MATCHING	0x00	UefiInternalFormRepresentation.h
42133	EFI_IFR_FLAGS_FIRST_NON_MATCHIN	0x01	UefiInternalFormRepresentation.h
42134	EFI_AFFECTED_BY_STANDARD_SHIFT	0x0001	UefiInternalFormRepresentation.h
42135	EFI_AFFECTED_BY_CAPS_LOCK	0x0002	UefiInternalFormRepresentation.h
42136	EFI_AFFECTED_BY_NUM_LOCK	0x0004	UefiInternalFormRepresentation.h
42137	EFI_NULL_MODIFIER	0x0000	UefiInternalFormRepresentation.h
42138	EFI_LEFT_CONTROL_MODIFIER	0x0001	UefiInternalFormRepresentation.h
42139	EFI_RIGHT_CONTROL_MODIFIER	0x0002	UefiInternalFormRepresentation.h
42140	EFI_LEFT_ALT_MODIFIER	0x0003	UefiInternalFormRepresentation.h
42141	EFI_RIGHT_ALT_MODIFIER	0x0004	UefiInternalFormRepresentation.h
42142	EFI_ALT_GR_MODIFIER	0x0005	UefiInternalFormRepresentation.h
42143	EFI_INSERT_MODIFIER	0x0006	UefiInternalFormRepresentation.h
42144	EFI_DELETE_MODIFIER	0x0007	UefiInternalFormRepresentation.h
42145	EFI_PAGE_DOWN_MODIFIER	0x0008	UefiInternalFormRepresentation.h
42146	EFI_PAGE_UP_MODIFIER	0x0009	UefiInternalFormRepresentation.h
42147	EFI_HOME_MODIFIER	0x000A	UefiInternalFormRepresentation.h
42148	EFI_END_MODIFIER	0x000B	UefiInternalFormRepresentation.h
42149	EFI_LEFT_SHIFT_MODIFIER	0x000C	UefiInternalFormRepresentation.h
42150	EFI_RIGHT_SHIFT_MODIFIER	0x000D	UefiInternalFormRepresentation.h
42151	EFI_CAPS_LOCK_MODIFIER	0x000E	UefiInternalFormRepresentation.h
42152	EFI_NUM_LOCK_MODIFIER	0x000F	UefiInternalFormRepresentation.h
42153	EFI_LEFT_ARROW_MODIFIER	0x0010	UefiInternalFormRepresentation.h
42154	EFI_RIGHT_ARROW_MODIFIER	0x0011	UefiInternalFormRepresentation.h
42155	EFI_DOWN_ARROW_MODIFIER	0x0012	UefiInternalFormRepresentation.h
42156	EFI_UP_ARROW_MODIFIER	0x0013	UefiInternalFormRepresentation.h
42157	EFI_NS_KEY_MODIFIER	0x0014	UefiInternalFormRepresentation.h
42158	EFI_NS_KEY_DEPENDENCY_MODIFIER	0x0015	UefiInternalFormRepresentation.h
42159	EFI_FUNCTION_KEY_ONE_MODIFIER	0x0016	UefiInternalFormRepresentation.h
42160	EFI_FUNCTION_KEY_TWO_MODIFIER	0x0017	UefiInternalFormRepresentation.h
42161	EFI_FUNCTION_KEY_THREE_MODIFIER	0x0018	UefiInternalFormRepresentation.h
42162	EFI_FUNCTION_KEY_FOUR_MODIFIER	0x0019	UefiInternalFormRepresentation.h
42163	EFI_FUNCTION_KEY_FIVE_MODIFIER	0x001A	UefiInternalFormRepresentation.h
42164	EFI_FUNCTION_KEY_SIX_MODIFIER	0x001B	UefiInternalFormRepresentation.h
42165	EFI_FUNCTION_KEY_SEVEN_MODIFIER	0x001C	UefiInternalFormRepresentation.h
42166	EFI_FUNCTION_KEY_EIGHT_MODIFIER	0x001D	UefiInternalFormRepresentation.h
42167	EFI_FUNCTION_KEY_NINE_MODIFIER	0x001E	UefiInternalFormRepresentation.h
42168	EFI_FUNCTION_KEY_TEN_MODIFIER	0x001F	UefiInternalFormRepresentation.h
42169	EFI_FUNCTION_KEY_ELEVEN_MODIFIE	0x0020	UefiInternalFormRepresentation.h
42170	EFI_FUNCTION_KEY_TWELVE_MODIFIE	0x0021	UefiInternalFormRepresentation.h
42171	EFI_PRINT_MODIFIER	0x0022	UefiInternalFormRepresentation.h
42172	EFI_SYS_REQUEST_MODIFIER	0x0023	UefiInternalFormRepresentation.h
42173	EFI_SCROLL_LOCK_MODIFIER	0x0024	UefiInternalFormRepresentation.h
42174	EFI_PAUSE_MODIFIER	0x0025	UefiInternalFormRepresentation.h
42175	EFI_BREAK_MODIFIER	0x0026	UefiInternalFormRepresentation.h
42176	EFI_LEFT_LOGO_MODIFIER	0x0027	UefiInternalFormRepresentation.h
42177	EFI_RIGHT_LOGO_MODIFIER	0x0028	UefiInternalFormRepresentation.h
42178	EFI_MENU_MODIFIER	0x0029	UefiInternalFormRepresentation.h
42179	EFI_VARIABLE_NON_VOLATILE	0x00000001	UefiMultiPhase.h
42180	EFI_VARIABLE_BOOTSERVICE_ACCESS	0x00000002	UefiMultiPhase.h
42181	EFI_VARIABLE_RUNTIME_ACCESS	0x00000004	UefiMultiPhase.h
42182	EFI_VARIABLE_HARDWARE_ERROR_REC	0x00000008	UefiMultiPhase.h
42183	EFI_VARIABLE_AUTHENTICATED_WRIT	0x00000010	UefiMultiPhase.h
42184	WIN_CERT_TYPE_EFI_PKCS115	0x0EF0	UefiMultiPhase.h
42185	WIN_CERT_TYPE_EFI_GUID	0x0EF1	UefiMultiPhase.h
42186	EFI_CERT_TYPE_RSA2048_SHA256_GU	{0xa7717414, 0xc616, 0x4977, {0x94, 0x20, 0x84, 0x47, 0x12, 0xa7, 0x35, 0xbf } }	UefiMultiPhase.h
42187	PXE_BUSTYPE_PXE	PXE_BUSTYPE ('!', 'P', 'X', 'E')	UefiPxe.h
42188	PXE_BUSTYPE_PCI	PXE_BUSTYPE ('P', 'C', 'I', 'R')	UefiPxe.h
42189	PXE_BUSTYPE_PC_CARD	PXE_BUSTYPE ('P', 'C', 'C', 'R')	UefiPxe.h
42190	PXE_BUSTYPE_USB	PXE_BUSTYPE ('U', 'S', 'B', 'R')	UefiPxe.h
42191	PXE_BUSTYPE_1394	PXE_BUSTYPE ('1', '3', '9', '4')	UefiPxe.h
42192	PXE_CPBSIZE_NOT_USED	0	UefiPxe.h	< zero
42193	PXE_DBSIZE_NOT_USED	0	UefiPxe.h	< zero
42194	PXE_CPBADDR_NOT_USED	(PXE_UINT64) 0	UefiPxe.h	< zero
42195	PXE_DBADDR_NOT_USED	(PXE_UINT64) 0	UefiPxe.h	< zero
42196	PXE_CONST	CONST	UefiPxe.h
42197	PXE_VOLATILE	volatile	UefiPxe.h
42198	PXE_FALSE	0	UefiPxe.h	< zero
42199	PXE_TRUE	(!PXE_FALSE)	UefiPxe.h
42200	PXE_OPCODE_GET_STATE	0x0000	UefiPxe.h
42201	PXE_OPCODE_START	0x0001	UefiPxe.h
42202	PXE_OPCODE_STOP	0x0002	UefiPxe.h
42203	PXE_OPCODE_GET_INIT_INFO	0x0003	UefiPxe.h
42204	PXE_OPCODE_GET_CONFIG_INFO	0x0004	UefiPxe.h
42205	PXE_OPCODE_INITIALIZE	0x0005	UefiPxe.h
42206	PXE_OPCODE_RESET	0x0006	UefiPxe.h
42207	PXE_OPCODE_SHUTDOWN	0x0007	UefiPxe.h
42208	PXE_OPCODE_INTERRUPT_ENABLES	0x0008	UefiPxe.h
42209	PXE_OPCODE_RECEIVE_FILTERS	0x0009	UefiPxe.h
42210	PXE_OPCODE_STATION_ADDRESS	0x000A	UefiPxe.h
42211	PXE_OPCODE_STATISTICS	0x000B	UefiPxe.h
42212	PXE_OPCODE_MCAST_IP_TO_MAC	0x000C	UefiPxe.h
42213	PXE_OPCODE_NVDATA	0x000D	UefiPxe.h
42214	PXE_OPCODE_GET_STATUS	0x000E	UefiPxe.h
42215	PXE_OPCODE_FILL_HEADER	0x000F	UefiPxe.h
42216	PXE_OPCODE_TRANSMIT	0x0010	UefiPxe.h
42217	PXE_OPCODE_RECEIVE	0x0011	UefiPxe.h
42218	PXE_OPCODE_LAST_VALID	0x0011	UefiPxe.h
42219	PXE_OPFLAGS_NOT_USED	0x0000	UefiPxe.h
42220	PXE_OPFLAGS_INITIALIZE_CABLE_DE	0x0001	UefiPxe.h
42221	PXE_OPFLAGS_INITIALIZE_DETECT_C	0x0000	UefiPxe.h
42222	PXE_OPFLAGS_INITIALIZE_DO_NOT_D	0x0001	UefiPxe.h
42223	PXE_OPFLAGS_RESET_DISABLE_INTER	0x0001	UefiPxe.h
42224	PXE_OPFLAGS_RESET_DISABLE_FILTE	0x0002	UefiPxe.h
42225	PXE_OPFLAGS_INTERRUPT_OPMASK	0xC000	UefiPxe.h
42226	PXE_OPFLAGS_INTERRUPT_ENABLE	0x8000	UefiPxe.h
42227	PXE_OPFLAGS_INTERRUPT_DISABLE	0x4000	UefiPxe.h
42228	PXE_OPFLAGS_INTERRUPT_READ	0x0000	UefiPxe.h
42229	PXE_OPFLAGS_INTERRUPT_RECEIVE	0x0001	UefiPxe.h
42230	PXE_OPFLAGS_INTERRUPT_TRANSMIT	0x0002	UefiPxe.h
42231	PXE_OPFLAGS_INTERRUPT_COMMAND	0x0004	UefiPxe.h
42232	PXE_OPFLAGS_INTERRUPT_SOFTWARE	0x0008	UefiPxe.h
42233	PXE_OPFLAGS_RECEIVE_FILTER_OPMA	0xC000	UefiPxe.h
42234	PXE_OPFLAGS_RECEIVE_FILTER_ENAB	0x8000	UefiPxe.h
42235	PXE_OPFLAGS_RECEIVE_FILTER_DISA	0x4000	UefiPxe.h
42236	PXE_OPFLAGS_RECEIVE_FILTER_READ	0x0000	UefiPxe.h
42237	PXE_OPFLAGS_RECEIVE_FILTER_RESE	0x2000	UefiPxe.h
42238	PXE_OPFLAGS_RECEIVE_FILTER_UNIC	0x0001	UefiPxe.h
42239	PXE_OPFLAGS_RECEIVE_FILTER_BROA	0x0002	UefiPxe.h
42240	PXE_OPFLAGS_RECEIVE_FILTER_FILT	0x0004	UefiPxe.h
42241	PXE_OPFLAGS_RECEIVE_FILTER_PROM	0x0008	UefiPxe.h
42242	PXE_OPFLAGS_RECEIVE_FILTER_ALL_	0x0010	UefiPxe.h
42243	PXE_OPFLAGS_STATION_ADDRESS_REA	0x0000	UefiPxe.h
42244	PXE_OPFLAGS_STATION_ADDRESS_WRI	0x0000	UefiPxe.h
42245	PXE_OPFLAGS_STATION_ADDRESS_RES	0x0001	UefiPxe.h
42246	PXE_OPFLAGS_STATISTICS_READ	0x0000	UefiPxe.h
42247	PXE_OPFLAGS_STATISTICS_RESET	0x0001	UefiPxe.h
42248	PXE_OPFLAGS_MCAST_IP_TO_MAC_OPM	0x0003	UefiPxe.h
42249	PXE_OPFLAGS_MCAST_IPV4_TO_MAC	0x0000	UefiPxe.h
42250	PXE_OPFLAGS_MCAST_IPV6_TO_MAC	0x0001	UefiPxe.h
42251	PXE_OPFLAGS_NVDATA_OPMASK	0x0001	UefiPxe.h
42252	PXE_OPFLAGS_NVDATA_READ	0x0000	UefiPxe.h
42253	PXE_OPFLAGS_NVDATA_WRITE	0x0001	UefiPxe.h
42254	PXE_OPFLAGS_GET_INTERRUPT_STATU	0x0001	UefiPxe.h
42255	PXE_OPFLAGS_GET_TRANSMITTED_BUF	0x0002	UefiPxe.h
42256	PXE_OPFLAGS_FILL_HEADER_OPMASK	0x0001	UefiPxe.h
42257	PXE_OPFLAGS_FILL_HEADER_FRAGMEN	0x0001	UefiPxe.h
42258	PXE_OPFLAGS_FILL_HEADER_WHOLE	0x0000	UefiPxe.h
42259	PXE_OPFLAGS_SWUNDI_TRANSMIT_OPM	0x0001	UefiPxe.h
42260	PXE_OPFLAGS_TRANSMIT_BLOCK	0x0001	UefiPxe.h
42261	PXE_OPFLAGS_TRANSMIT_DONT_BLOCK	0x0000	UefiPxe.h
42262	PXE_OPFLAGS_TRANSMIT_OPMASK	0x0002	UefiPxe.h
42263	PXE_OPFLAGS_TRANSMIT_FRAGMENTED	0x0002	UefiPxe.h
42264	PXE_OPFLAGS_TRANSMIT_WHOLE	0x0000	UefiPxe.h
42265	PXE_STATFLAGS_INITIALIZE	0x0000	UefiPxe.h
42266	PXE_STATFLAGS_STATUS_MASK	0xC000	UefiPxe.h
42267	PXE_STATFLAGS_COMMAND_COMPLETE	0xC000	UefiPxe.h
42268	PXE_STATFLAGS_COMMAND_FAILED	0x8000	UefiPxe.h
42269	PXE_STATFLAGS_COMMAND_QUEUED	0x4000	UefiPxe.h
42270	PXE_STATFLAGS_GET_STATE_MASK	0x0003	UefiPxe.h
42271	PXE_STATFLAGS_GET_STATE_INITIAL	0x0002	UefiPxe.h
42272	PXE_STATFLAGS_GET_STATE_STARTED	0x0001	UefiPxe.h
42273	PXE_STATFLAGS_GET_STATE_STOPPED	0x0000	UefiPxe.h
42274	PXE_STATFLAGS_CABLE_DETECT_MASK	0x0001	UefiPxe.h
42275	PXE_STATFLAGS_CABLE_DETECT_NOT_	0x0000	UefiPxe.h
42276	PXE_STATFLAGS_CABLE_DETECT_SUPP	0x0001	UefiPxe.h
42277	PXE_STATFLAGS_INITIALIZED_NO_ME	0x0001	UefiPxe.h
42278	PXE_STATFLAGS_RESET_NO_MEDIA	0x0001	UefiPxe.h
42279	PXE_STATFLAGS_INTERRUPT_RECEIVE	0x0001	UefiPxe.h
42280	PXE_STATFLAGS_INTERRUPT_TRANSMI	0x0002	UefiPxe.h
42281	PXE_STATFLAGS_INTERRUPT_COMMAND	0x0004	UefiPxe.h
42282	PXE_STATFLAGS_RECEIVE_FILTER_UN	0x0001	UefiPxe.h
42283	PXE_STATFLAGS_RECEIVE_FILTER_BR	0x0002	UefiPxe.h
42284	PXE_STATFLAGS_RECEIVE_FILTER_FI	0x0004	UefiPxe.h
42285	PXE_STATFLAGS_RECEIVE_FILTER_PR	0x0008	UefiPxe.h
42286	PXE_STATFLAGS_RECEIVE_FILTER_AL	0x0010	UefiPxe.h
42287	PXE_STATFLAGS_GET_STATUS_INTERR	0x000F	UefiPxe.h
42288	PXE_STATFLAGS_GET_STATUS_NO_INT	0x0000	UefiPxe.h
42289	PXE_STATFLAGS_GET_STATUS_RECEIV	0x0001	UefiPxe.h
42290	PXE_STATFLAGS_GET_STATUS_TRANSM	0x0002	UefiPxe.h
42291	PXE_STATFLAGS_GET_STATUS_COMMAN	0x0004	UefiPxe.h
42292	PXE_STATFLAGS_GET_STATUS_SOFTWA	0x0008	UefiPxe.h
42293	PXE_STATFLAGS_GET_STATUS_TXBUF_	0x0010	UefiPxe.h
42294	PXE_STATFLAGS_GET_STATUS_NO_TXB	0x0020	UefiPxe.h
42295	PXE_STATCODE_INITIALIZE	0x0000	UefiPxe.h
42296	PXE_STATCODE_SUCCESS	0x0000	UefiPxe.h
42297	PXE_STATCODE_INVALID_CDB	0x0001	UefiPxe.h
42298	PXE_STATCODE_INVALID_CPB	0x0002	UefiPxe.h
42299	PXE_STATCODE_BUSY	0x0003	UefiPxe.h
42300	PXE_STATCODE_QUEUE_FULL	0x0004	UefiPxe.h
42301	PXE_STATCODE_ALREADY_STARTED	0x0005	UefiPxe.h
42302	PXE_STATCODE_NOT_STARTED	0x0006	UefiPxe.h
42303	PXE_STATCODE_NOT_SHUTDOWN	0x0007	UefiPxe.h
42304	PXE_STATCODE_ALREADY_INITIALIZE	0x0008	UefiPxe.h
42305	PXE_STATCODE_NOT_INITIALIZED	0x0009	UefiPxe.h
42306	PXE_STATCODE_DEVICE_FAILURE	0x000A	UefiPxe.h
42307	PXE_STATCODE_NVDATA_FAILURE	0x000B	UefiPxe.h
42308	PXE_STATCODE_UNSUPPORTED	0x000C	UefiPxe.h
42309	PXE_STATCODE_BUFFER_FULL	0x000D	UefiPxe.h
42310	PXE_STATCODE_INVALID_PARAMETER	0x000E	UefiPxe.h
42311	PXE_STATCODE_INVALID_UNDI	0x000F	UefiPxe.h
42312	PXE_STATCODE_IPV4_NOT_SUPPORTED	0x0010	UefiPxe.h
42313	PXE_STATCODE_IPV6_NOT_SUPPORTED	0x0011	UefiPxe.h
42314	PXE_STATCODE_NOT_ENOUGH_MEMORY	0x0012	UefiPxe.h
42315	PXE_STATCODE_NO_DATA	0x0013	UefiPxe.h
42316	PXE_IFNUM_START	0x0000	UefiPxe.h
42317	PXE_IFNUM_INVALID	0x0000	UefiPxe.h
42318	PXE_CONTROL_QUEUE_IF_BUSY	0x0002	UefiPxe.h
42319	PXE_CONTROL_LINK	0x0001	UefiPxe.h
42320	PXE_CONTROL_LAST_CDB_IN_LIST	0x0000	UefiPxe.h
42321	PXE_FRAME_TYPE_NONE	0x00	UefiPxe.h
42322	PXE_FRAME_TYPE_UNICAST	0x01	UefiPxe.h
42323	PXE_FRAME_TYPE_BROADCAST	0x02	UefiPxe.h
42324	PXE_FRAME_TYPE_FILTERED_MULTICA	0x03	UefiPxe.h
42325	PXE_FRAME_TYPE_PROMISCUOUS	0x04	UefiPxe.h
42326	PXE_FRAME_TYPE_PROMISCUOUS_MULT	0x05	UefiPxe.h
42327	PXE_FRAME_TYPE_MULTICAST	PXE_FRAME_TYPE_FILTERED_MULTICAST	UefiPxe.h
42328	PXE_MAC_LENGTH	32	UefiPxe.h
42329	PXE_IFTYPE_ETHERNET	0x01	UefiPxe.h
42330	PXE_IFTYPE_TOKENRING	0x04	UefiPxe.h
42331	PXE_IFTYPE_FIBRE_CHANNEL	0x12	UefiPxe.h
42332	PXE_HWSTAT_STATE_MASK	0xC0000000	UefiPxe.h
42333	PXE_HWSTAT_BUSY	0xC0000000	UefiPxe.h
42334	PXE_HWSTAT_INITIALIZED	0x80000000	UefiPxe.h
42335	PXE_HWSTAT_STARTED	0x40000000	UefiPxe.h
42336	PXE_HWSTAT_STOPPED	0x00000000	UefiPxe.h
42337	PXE_HWSTAT_COMMAND_FAILED	0x20000000	UefiPxe.h
42338	PXE_HWSTAT_PROMISCUOUS_MULTICAS	0x00001000	UefiPxe.h
42339	PXE_HWSTAT_PROMISCUOUS_RX_ENABL	0x00000800	UefiPxe.h
42340	PXE_HWSTAT_BROADCAST_RX_ENABLED	0x00000400	UefiPxe.h
42341	PXE_HWSTAT_MULTICAST_RX_ENABLED	0x00000200	UefiPxe.h
42342	PXE_HWSTAT_UNICAST_RX_ENABLED	0x00000100	UefiPxe.h
42343	PXE_HWSTAT_SOFTWARE_INT_ENABLED	0x00000080	UefiPxe.h
42344	PXE_HWSTAT_TX_COMPLETE_INT_ENAB	0x00000040	UefiPxe.h
42345	PXE_HWSTAT_PACKET_RX_INT_ENABLE	0x00000020	UefiPxe.h
42346	PXE_HWSTAT_CMD_COMPLETE_INT_ENA	0x00000010	UefiPxe.h
42347	PXE_HWSTAT_SOFTWARE_INT_PENDING	0x00000008	UefiPxe.h
42348	PXE_HWSTAT_TX_COMPLETE_INT_PEND	0x00000004	UefiPxe.h
42349	PXE_HWSTAT_PACKET_RX_INT_PENDIN	0x00000002	UefiPxe.h
42350	PXE_HWSTAT_CMD_COMPLETE_INT_PEN	0x00000001	UefiPxe.h
42351	PXE_HWCMD_ISSUE_COMMAND	0x80000000	UefiPxe.h
42352	PXE_HWCMD_INTS_AND_FILTS	0x00000000	UefiPxe.h
42353	PXE_HWCMD_PROMISCUOUS_MULTICAST	0x00001000	UefiPxe.h
42354	PXE_HWCMD_PROMISCUOUS_RX_ENABLE	0x00000800	UefiPxe.h
42355	PXE_HWCMD_BROADCAST_RX_ENABLE	0x00000400	UefiPxe.h
42356	PXE_HWCMD_MULTICAST_RX_ENABLE	0x00000200	UefiPxe.h
42357	PXE_HWCMD_UNICAST_RX_ENABLE	0x00000100	UefiPxe.h
42358	PXE_HWCMD_SOFTWARE_INT_ENABLE	0x00000080	UefiPxe.h
42359	PXE_HWCMD_TX_COMPLETE_INT_ENABL	0x00000040	UefiPxe.h
42360	PXE_HWCMD_PACKET_RX_INT_ENABLE	0x00000020	UefiPxe.h
42361	PXE_HWCMD_CMD_COMPLETE_INT_ENAB	0x00000010	UefiPxe.h
42362	PXE_HWCMD_CLEAR_SOFTWARE_INT	0x00000008	UefiPxe.h
42363	PXE_HWCMD_CLEAR_TX_COMPLETE_INT	0x00000004	UefiPxe.h
42364	PXE_HWCMD_CLEAR_PACKET_RX_INT	0x00000002	UefiPxe.h
42365	PXE_HWCMD_CLEAR_CMD_COMPLETE_IN	0x00000001	UefiPxe.h
42366	PXE_ROMID_SIGNATURE	PXE_BUSTYPE ('!', 'P', 'X', 'E')	UefiPxe.h
42367	PXE_ROMID_REV	0x02	UefiPxe.h
42368	PXE_ROMID_MAJORVER	0x03	UefiPxe.h
42369	PXE_ROMID_MINORVER	0x01	UefiPxe.h
42370	PXE_ROMID_IMP_HW_UNDI	0x80000000	UefiPxe.h
42371	PXE_ROMID_IMP_SW_VIRT_ADDR	0x40000000	UefiPxe.h
42372	PXE_ROMID_IMP_64BIT_DEVICE	0x00010000	UefiPxe.h
42373	PXE_ROMID_IMP_FRAG_SUPPORTED	0x00008000	UefiPxe.h
42374	PXE_ROMID_IMP_CMD_LINK_SUPPORTE	0x00004000	UefiPxe.h
42375	PXE_ROMID_IMP_CMD_QUEUE_SUPPORT	0x00002000	UefiPxe.h
42376	PXE_ROMID_IMP_MULTI_FRAME_SUPPO	0x00001000	UefiPxe.h
42377	PXE_ROMID_IMP_NVDATA_SUPPORT_MA	0x00000C00	UefiPxe.h
42378	PXE_ROMID_IMP_NVDATA_BULK_WRITA	0x00000C00	UefiPxe.h
42379	PXE_ROMID_IMP_NVDATA_SPARSE_WRI	0x00000800	UefiPxe.h
42380	PXE_ROMID_IMP_NVDATA_READ_ONLY	0x00000400	UefiPxe.h
42381	PXE_ROMID_IMP_NVDATA_NOT_AVAILA	0x00000000	UefiPxe.h
42382	PXE_ROMID_IMP_STATISTICS_SUPPOR	0x00000200	UefiPxe.h
42383	PXE_ROMID_IMP_STATION_ADDR_SETT	0x00000100	UefiPxe.h
42384	PXE_ROMID_IMP_PROMISCUOUS_MULTI	0x00000080	UefiPxe.h
42385	PXE_ROMID_IMP_PROMISCUOUS_RX_SU	0x00000040	UefiPxe.h
42386	PXE_ROMID_IMP_BROADCAST_RX_SUPP	0x00000020	UefiPxe.h
42387	PXE_ROMID_IMP_FILTERED_MULTICAS	0x00000010	UefiPxe.h
42388	PXE_ROMID_IMP_SOFTWARE_INT_SUPP	0x00000008	UefiPxe.h
42389	PXE_ROMID_IMP_TX_COMPLETE_INT_S	0x00000004	UefiPxe.h
42390	PXE_ROMID_IMP_PACKET_RX_INT_SUP	0x00000002	UefiPxe.h
42391	PXE_ROMID_IMP_CMD_COMPLETE_INT_	0x00000001	UefiPxe.h
42392	MAX_PCI_CONFIG_LEN	64	UefiPxe.h	< # of dwords
42393	MAX_EEPROM_LEN	128	UefiPxe.h	< # of dwords
42394	MAX_XMIT_BUFFERS	32	UefiPxe.h	< recycling Q length for xmit_done
42395	MAX_MCAST_ADDRESS_CNT	8	UefiPxe.h
42396	TO_AND_FROM_DEVICE	0	UefiPxe.h
42397	FROM_DEVICE	1	UefiPxe.h
42398	TO_DEVICE	2	UefiPxe.h
42399	PXE_DELAY_MILLISECOND	1000	UefiPxe.h
42400	PXE_DELAY_SECOND	1000000	UefiPxe.h
42401	PXE_IO_READ	0	UefiPxe.h
42402	PXE_IO_WRITE	1	UefiPxe.h
42403	PXE_MEM_READ	2	UefiPxe.h
42404	PXE_MEM_WRITE	4	UefiPxe.h
42405	PXE_MAX_TXRX_UNIT_ETHER	1500	UefiPxe.h
42406	PXE_HWADDR_LEN_ETHER	0x0006	UefiPxe.h
42407	PXE_MAC_HEADER_LEN_ETHER	0x000E	UefiPxe.h
42408	PXE_DUPLEX_ENABLE_FULL_SUPPORTE	1	UefiPxe.h
42409	PXE_DUPLEX_FORCE_FULL_SUPPORTED	2	UefiPxe.h
42410	PXE_LOOPBACK_INTERNAL_SUPPORTED	1	UefiPxe.h
42411	PXE_LOOPBACK_EXTERNAL_SUPPORTED	2	UefiPxe.h
42412	PXE_DUPLEX_DEFAULT	0x00	UefiPxe.h
42413	PXE_FORCE_FULL_DUPLEX	0x01	UefiPxe.h
42414	PXE_ENABLE_FULL_DUPLEX	0x02	UefiPxe.h
42415	PXE_FORCE_HALF_DUPLEX	0x04	UefiPxe.h
42416	PXE_DISABLE_FULL_DUPLEX	0x08	UefiPxe.h
42417	LOOPBACK_NORMAL	0	UefiPxe.h
42418	LOOPBACK_INTERNAL	1	UefiPxe.h
42419	LOOPBACK_EXTERNAL	2	UefiPxe.h
42420	PXE_STATISTICS_RX_TOTAL_FRAMES	0x00	UefiPxe.h
42421	PXE_STATISTICS_RX_GOOD_FRAMES	0x01	UefiPxe.h
42422	PXE_STATISTICS_RX_UNDERSIZE_FRA	0x02	UefiPxe.h
42423	PXE_STATISTICS_RX_OVERSIZE_FRAM	0x03	UefiPxe.h
42424	PXE_STATISTICS_RX_DROPPED_FRAME	0x04	UefiPxe.h
42425	PXE_STATISTICS_RX_UNICAST_FRAME	0x05	UefiPxe.h
42426	PXE_STATISTICS_RX_BROADCAST_FRA	0x06	UefiPxe.h
42427	PXE_STATISTICS_RX_MULTICAST_FRA	0x07	UefiPxe.h
42428	PXE_STATISTICS_RX_CRC_ERROR_FRA	0x08	UefiPxe.h
42429	PXE_STATISTICS_RX_TOTAL_BYTES	0x09	UefiPxe.h
42430	PXE_STATISTICS_TX_TOTAL_FRAMES	0x0A	UefiPxe.h
42431	PXE_STATISTICS_TX_GOOD_FRAMES	0x0B	UefiPxe.h
42432	PXE_STATISTICS_TX_UNDERSIZE_FRA	0x0C	UefiPxe.h
42433	PXE_STATISTICS_TX_OVERSIZE_FRAM	0x0D	UefiPxe.h
42434	PXE_STATISTICS_TX_DROPPED_FRAME	0x0E	UefiPxe.h
42435	PXE_STATISTICS_TX_UNICAST_FRAME	0x0F	UefiPxe.h
42436	PXE_STATISTICS_TX_BROADCAST_FRA	0x10	UefiPxe.h
42437	PXE_STATISTICS_TX_MULTICAST_FRA	0x11	UefiPxe.h
42438	PXE_STATISTICS_TX_CRC_ERROR_FRA	0x12	UefiPxe.h
42439	PXE_STATISTICS_TX_TOTAL_BYTES	0x13	UefiPxe.h
42440	PXE_STATISTICS_COLLISIONS	0x14	UefiPxe.h
42441	PXE_STATISTICS_UNSUPPORTED_PROT	0x15	UefiPxe.h
42442	PXE_PROTOCOL_ETHERNET_IP	0x0800	UefiPxe.h
42443	PXE_PROTOCOL_ETHERNET_ARP	0x0806	UefiPxe.h
42444	MAX_XMIT_FRAGMENTS	16	UefiPxe.h
42445	EFI_TIME_ADJUST_DAYLIGHT	0x01	UefiSpec.h
42446	EFI_TIME_IN_DAYLIGHT	0x02	UefiSpec.h
42447	EFI_UNSPECIFIED_TIMEZONE	0x07FF	UefiSpec.h
42448	EFI_MEMORY_UC	0x0000000000000001ULL	UefiSpec.h
42449	EFI_MEMORY_WC	0x0000000000000002ULL	UefiSpec.h
42450	EFI_MEMORY_WT	0x0000000000000004ULL	UefiSpec.h
42451	EFI_MEMORY_WB	0x0000000000000008ULL	UefiSpec.h
42452	EFI_MEMORY_UCE	0x0000000000000010ULL	UefiSpec.h
42453	EFI_MEMORY_WP	0x0000000000001000ULL	UefiSpec.h
42454	EFI_MEMORY_RP	0x0000000000002000ULL	UefiSpec.h
42455	EFI_MEMORY_XP	0x0000000000004000ULL	UefiSpec.h
42456	EFI_MEMORY_RUNTIME	0x8000000000000000ULL	UefiSpec.h
42457	EFI_MEMORY_DESCRIPTOR_VERSION	1	UefiSpec.h
42458	EFI_OPTIONAL_PTR	0x00000001	UefiSpec.h
42459	EFI_OPTIONAL_POINTER	EFI_OPTIONAL_PTR	UefiSpec.h
42460	EVT_TIMER	0x80000000	UefiSpec.h
42461	EVT_RUNTIME	0x40000000	UefiSpec.h
42462	EVT_NOTIFY_WAIT	0x00000100	UefiSpec.h
42463	EVT_NOTIFY_SIGNAL	0x00000200	UefiSpec.h
42464	EVT_SIGNAL_EXIT_BOOT_SERVICES	0x00000201	UefiSpec.h
42465	EVT_SIGNAL_VIRTUAL_ADDRESS_CHAN	0x60000202	UefiSpec.h
42466	EVT_RUNTIME_CONTEXT	0x20000000	UefiSpec.h
42467	TPL_APPLICATION	4	UefiSpec.h
42468	TPL_CALLBACK	8	UefiSpec.h
42469	TPL_NOTIFY	16	UefiSpec.h
42470	TPL_HIGH_LEVEL	31	UefiSpec.h
42471	EFI_OPEN_PROTOCOL_BY_HANDLE_PRO	0x00000001	UefiSpec.h
42472	EFI_OPEN_PROTOCOL_GET_PROTOCOL	0x00000002	UefiSpec.h
42473	EFI_OPEN_PROTOCOL_TEST_PROTOCOL	0x00000004	UefiSpec.h
42474	EFI_OPEN_PROTOCOL_BY_CHILD_CONT	0x00000008	UefiSpec.h
42475	EFI_OPEN_PROTOCOL_BY_DRIVER	0x00000010	UefiSpec.h
42476	EFI_OPEN_PROTOCOL_EXCLUSIVE	0x00000020	UefiSpec.h
42477	CAPSULE_FLAGS_PERSIST_ACROSS_RE	0x00010000	UefiSpec.h
42478	CAPSULE_FLAGS_POPULATE_SYSTEM_T	0x00020000	UefiSpec.h
42479	EFI_SYSTEM_TABLE_SIGNATURE	0x5453595320494249ULL	UefiSpec.h
42480	EFI_SYSTEM_TABLE_REVISION	((2<<16) \| (10))	UefiSpec.h
42481	EFI_2_10_SYSTEM_TABLE_REVISION	((2<<16) \| (10))	UefiSpec.h
42482	EFI_2_00_SYSTEM_TABLE_REVISION	((2<<16) \| (00))	UefiSpec.h
42483	EFI_1_10_SYSTEM_TABLE_REVISION	((1<<16) \| (10))	UefiSpec.h
42484	EFI_1_02_SYSTEM_TABLE_REVISION	((1<<16) \| (02))	UefiSpec.h
42485	EFI_RUNTIME_SERVICES_SIGNATURE	0x56524553544e5552ULL	UefiSpec.h
42486	EFI_RUNTIME_SERVICES_REVISION	EFI_2_10_SYSTEM_TABLE_REVISION	UefiSpec.h
42487	EFI_BOOT_SERVICES_SIGNATURE	0x56524553544f4f42ULL	UefiSpec.h
42488	EFI_BOOT_SERVICES_REVISION	EFI_2_10_SYSTEM_TABLE_REVISION	UefiSpec.h
42489	LOAD_OPTION_ACTIVE	0x00000001	UefiSpec.h
42490	LOAD_OPTION_FORCE_RECONNECT	0x00000002	UefiSpec.h
42491	LOAD_OPTION_HIDDEN	0x00000008	UefiSpec.h
42492	LOAD_OPTION_CATEGORY	0x00001F00	UefiSpec.h
42493	LOAD_OPTION_CATEGORY_BOOT	0x00000000	UefiSpec.h
42494	LOAD_OPTION_CATEGORY_APP	0x00000100	UefiSpec.h
42495	EFI_BOOT_OPTION_SUPPORT_KEY	0x00000001	UefiSpec.h
42496	EFI_BOOT_OPTION_SUPPORT_APP	0x00000002	UefiSpec.h
42497	EFI_BOOT_OPTION_SUPPORT_COUNT	0x00000300	UefiSpec.h
42498	EFI_KEY_OPTION_SHIFT	0x00000001	UefiSpec.h
42499	EFI_KEY_OPTION_CONTROL	0x00000002	UefiSpec.h
42500	EFI_KEY_OPTION_ALT	0x00000004	UefiSpec.h
42501	EFI_KEY_OPTION_LOGO	0x00000008	UefiSpec.h
42502	EFI_KEY_OPTION_MENU	0x00000010	UefiSpec.h
42503	EFI_KEY_OPTION_SYSREQ	0x00000020	UefiSpec.h
42504	EFI_KEY_CODE_COUNT	0x00000300	UefiSpec.h
42505	EFI_REMOVABLE_MEDIA_FILE_NAME_I	L"\\EFI\\BOOT\\BOOTIA32.EFI"	UefiSpec.h
42506	EFI_REMOVABLE_MEDIA_FILE_NAME_I	L"\\EFI\\BOOT\\BOOTIA64.EFI"	UefiSpec.h
42507	EFI_REMOVABLE_MEDIA_FILE_NAME_X	L"\\EFI\\BOOT\\BOOTX64.EFI"	UefiSpec.h
42508	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_IA32	UefiSpec.h
42509	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_IA64	UefiSpec.h
42510	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_X64	UefiSpec.h
42511	UINT8_MAX	0xff	ProcessorBind.h
42512	MAX_BIT	0x8000000000000000ULL	ProcessorBind.h
42513	MAX_2_BITS	0xC000000000000000ULL	ProcessorBind.h
42514	MAX_ADDRESS	0xFFFFFFFFFFFFFFFFULL	ProcessorBind.h
42515	CPU_STACK_ALIGNMENT	16	ProcessorBind.h
42516	EFIAPI	__cdecl	ProcessorBind.h
42517	EFIAPI	__attribute__((ms_abi))	ProcessorBind.h
42518	GLOBAL_REMOVE_IF_UNREFERENCED	__declspec(selectany)	ProcessorBind.h
42519	BS_BOOTSIGNATURE	0x29	fat.h
42520	BS_SIGNATURE	0xAA55	fat.h
42521	LIBFAT_SECTOR_SHIFT	9	libfat.h
42522	LIBFAT_SECTOR_SIZE	512	libfat.h
42523	LIBFAT_SECTOR_MASK	511	libfat.h
42524	ADV_SIZE	512	syslinux.h	Total size
42525	ADV_LEN	(ADV_SIZE-3*4)	syslinux.h	Usable data size
42526	SECTOR_SHIFT	9	syslxint.h	512-byte sectors
42527	SECTOR_SIZE	(1 << SECTOR_SHIFT)	syslxint.h
42528	BIOS_INT13	(0x13*4)	bda.h	INT 13h vector
42529	BIOS_INT15	(0x15*4)	bda.h	INT 15h vector
42530	BIOS_INT1E	(0x1E*4)	bda.h	INT 1Eh vector
42531	BIOS_INT40	(0x40*4)	bda.h	INT 13h vector
42532	BIOS_INT41	(0x41*4)	bda.h	INT 41h vector
42533	BIOS_INT46	(0x46*4)	bda.h	INT 46h vector
42534	BIOS_BASEMEM	0x413	bda.h	Amount of DOS memory
42535	BIOS_EQUIP	0x410	bda.h	BIOS equipment list
42536	BIOS_HD_COUNT	0x475	bda.h	Number of hard drives present
42537	__cdecl	__attribute__((cdecl,regparm(0)))	memdisk.h
42538	sys_bounce	((void *)rm_args.rm_bounce)	memdisk.h
42539	shdr	((struct setup_header *)rm_args.rm_base)	memdisk.h
42540	FIRSTYEAR	"2001"	version.h
42541	COPYYEAR	"2008"	version.h
42542	MALLOC_CHUNK_SIZE	65536	malloc.h
42543	MALLOC_CHUNK_MASK	(MALLOC_CHUNK_SIZE-1)	malloc.h
42544	ARENA_TYPE_USED	0x64e69c70	malloc.h
42545	ARENA_TYPE_FREE	0x012d610a	malloc.h
42546	ARENA_TYPE_HEAD	0x971676b5	malloc.h
42547	ARENA_TYPE_DEAD	0xeeeeeeee	malloc.h
42548	ARENA_TYPE_USED	0	malloc.h
42549	ARENA_TYPE_FREE	1	malloc.h
42550	ARENA_TYPE_HEAD	2	malloc.h
42551	ARENA_SIZE_MASK	(sizeof(struct arena_header)-1)	malloc.h
42552	bool	_Bool	stdbool.h
42553	true	1	stdbool.h
42554	false	0	stdbool.h
42555	bool	bool	stdbool.h
42556	true	true	stdbool.h
42557	false	false	stdbool.h
42558	__bool_true_false_are_defined	1	stdbool.h
42559	INT8_MIN	(-128)	stdint.h
42560	INT16_MIN	(-32767-1)	stdint.h
42561	INT32_MIN	(-2147483647-1)	stdint.h
42562	INT64_MIN	(-9223372036854775807LL-1)	stdint.h
42563	INT8_MAX	(127)	stdint.h
42564	INT16_MAX	(32767)	stdint.h
42565	INT32_MAX	(2147483647)	stdint.h
42566	INT64_MAX	(9223372036854775807LL)	stdint.h
42567	UINT8_MAX	(255U)	stdint.h
42568	UINT16_MAX	(65535U)	stdint.h
42569	UINT32_MAX	(4294967295U)	stdint.h
42570	UINT64_MAX	(18446744073709551615ULL)	stdint.h
42571	INT_LEAST8_MIN	(-128)	stdint.h
42572	INT_LEAST16_MIN	(-32767-1)	stdint.h
42573	INT_LEAST32_MIN	(-2147483647-1)	stdint.h
42574	INT_LEAST64_MIN	(-9223372036854775807LL-1)	stdint.h
42575	INT_LEAST8_MAX	(127)	stdint.h
42576	INT_LEAST16_MAX	(32767)	stdint.h
42577	INT_LEAST32_MAX	(2147483647)	stdint.h
42578	INT_LEAST64_MAX	(9223372036854775807LL)	stdint.h
42579	UINT_LEAST8_MAX	(255U)	stdint.h
42580	UINT_LEAST16_MAX	(65535U)	stdint.h
42581	UINT_LEAST32_MAX	(4294967295U)	stdint.h
42582	UINT_LEAST64_MAX	(18446744073709551615ULL)	stdint.h
42583	INT_FAST8_MIN	(-128)	stdint.h
42584	INT_FAST16_MIN	(-32767-1)	stdint.h
42585	INT_FAST32_MIN	(-2147483647-1)	stdint.h
42586	INT_FAST64_MIN	(-9223372036854775807LL-1)	stdint.h
42587	INT_FAST8_MAX	(127)	stdint.h
42588	INT_FAST16_MAX	(32767)	stdint.h
42589	INT_FAST32_MAX	(2147483647)	stdint.h
42590	INT_FAST64_MAX	(9223372036854775807LL)	stdint.h
42591	UINT_FAST8_MAX	(255U)	stdint.h
42592	UINT_FAST16_MAX	(65535U)	stdint.h
42593	UINT_FAST32_MAX	(4294967295U)	stdint.h
42594	UINT_FAST64_MAX	(18446744073709551615ULL)	stdint.h
42595	INTPTR_MIN	(-2147483647-1)	stdint.h
42596	INTPTR_MAX	(2147483647)	stdint.h
42597	UINTPTR_MAX	(4294967295U)	stdint.h
42598	INTMAX_MIN	(-9223372036854775807LL-1)	stdint.h
42599	INTMAX_MAX	(9223372036854775807LL)	stdint.h
42600	UINTMAX_MAX	(18446744073709551615ULL)	stdint.h
42601	PTRDIFF_MIN	(-2147483647-1)	stdint.h
42602	PTRDIFF_MAX	(2147483647)	stdint.h
42603	SIG_ATOMIC_MIN	(-2147483647-1)	stdint.h
42604	SIG_ATOMIC_MAX	(2147483647)	stdint.h
42605	SIZE_MAX	(4294967295U)	stdint.h
42606	stdin	0	stdio.h
42607	stdout	1	stdio.h
42608	stderr	2	stdio.h
42609	NULL	((void *)0)	stdlib.h
42610	USBFLG_DELETED	1	devtree.h
42611	USBFLG_NEW	2	devtree.h
42612	USBFLG_DELETED	1	devtree.h
42613	USBFLG_NEW	2	devtree.h
42614	USBFLG_DELETED	1	devtree.h
42615	USBFLG_NEW	2	devtree.h
42616	USBFLG_DELETED	1	devtree.h
42617	USBFLG_NEW	2	devtree.h
42618	USBFLG_DELETED	1	devtree.h
42619	USBFLG_NEW	2	devtree.h
42620	USBFLG_DELETED	1	devtree.h
42621	USBFLG_NEW	2	devtree.h
42622	PT_NULL	0	elfcommon.h
42623	PT_LOAD	1	elfcommon.h
42624	PT_DYNAMIC	2	elfcommon.h
42625	PT_INTERP	3	elfcommon.h
42626	PT_NOTE	4	elfcommon.h
42627	PT_SHLIB	5	elfcommon.h
42628	PT_PHDR	6	elfcommon.h
42629	PT_LOOS	0x60000000	elfcommon.h
42630	PT_HIOS	0x6fffffff	elfcommon.h
42631	PT_LOPROC	0x70000000	elfcommon.h
42632	PT_HIPROC	0x7fffffff	elfcommon.h
42633	PT_GNU_EH_FRAME	0x6474e550	elfcommon.h	Extension, eh?
42634	ET_NONE	0	elfcommon.h
42635	ET_REL	1	elfcommon.h
42636	ET_EXEC	2	elfcommon.h
42637	ET_DYN	3	elfcommon.h
42638	ET_CORE	4	elfcommon.h
42639	ET_LOPROC	0xff00	elfcommon.h
42640	ET_HIPROC	0xffff	elfcommon.h
42641	EM_NONE	0	elfcommon.h
42642	EM_M32	1	elfcommon.h
42643	EM_SPARC	2	elfcommon.h
42644	EM_386	3	elfcommon.h
42645	EM_68K	4	elfcommon.h
42646	EM_88K	5	elfcommon.h
42647	EM_486	6	elfcommon.h	Not used in Linux at least
42648	EM_860	7	elfcommon.h
42649	EM_MIPS	8	elfcommon.h	R3k, bigendian(?)
42650	EM_MIPS_RS4_BE	10	elfcommon.h	R4k BE
42651	EM_PARISC	15	elfcommon.h
42652	EM_SPARC32PLUS	18	elfcommon.h
42653	EM_PPC	20	elfcommon.h
42654	EM_PPC64	21	elfcommon.h
42655	EM_S390	22	elfcommon.h
42656	EM_SH	42	elfcommon.h
42657	EM_SPARCV9	43	elfcommon.h	v9 = SPARC64
42658	EM_H8_300H	47	elfcommon.h
42659	EM_H8S	48	elfcommon.h
42660	EM_IA_64	50	elfcommon.h	Itanic
42661	EM_X86_64	62	elfcommon.h
42662	EM_CRIS	76	elfcommon.h
42663	EM_V850	87	elfcommon.h
42664	EM_ALPHA	0x9026	elfcommon.h	Interrim Alpha that stuck around
42665	EM_CYGNUS_V850	0x9080	elfcommon.h	Old v850 ID used by Cygnus
42666	EM_S390_OLD	0xA390	elfcommon.h	Obsolete interrim value for S/390
42667	DT_NULL	0	elfcommon.h
42668	DT_NEEDED	1	elfcommon.h
42669	DT_PLTRELSZ	2	elfcommon.h
42670	DT_PLTGOT	3	elfcommon.h
42671	DT_HASH	4	elfcommon.h
42672	DT_STRTAB	5	elfcommon.h
42673	DT_SYMTAB	6	elfcommon.h
42674	DT_RELA	7	elfcommon.h
42675	DT_RELASZ	8	elfcommon.h
42676	DT_RELAENT	9	elfcommon.h
42677	DT_STRSZ	10	elfcommon.h
42678	DT_SYMENT	11	elfcommon.h
42679	DT_INIT	12	elfcommon.h
42680	DT_FINI	13	elfcommon.h
42681	DT_SONAME	14	elfcommon.h
42682	DT_RPATH	15	elfcommon.h
42683	DT_SYMBOLIC	16	elfcommon.h
42684	DT_REL	17	elfcommon.h
42685	DT_RELSZ	18	elfcommon.h
42686	DT_RELENT	19	elfcommon.h
42687	DT_PLTREL	20	elfcommon.h
42688	DT_DEBUG	21	elfcommon.h
42689	DT_TEXTREL	22	elfcommon.h
42690	DT_JMPREL	23	elfcommon.h
42691	DT_LOPROC	0x70000000	elfcommon.h
42692	DT_HIPROC	0x7fffffff	elfcommon.h
42693	AT_NULL	0	elfcommon.h	end of vector
42694	AT_IGNORE	1	elfcommon.h	entry should be ignored
42695	AT_EXECFD	2	elfcommon.h	file descriptor of program
42696	AT_PHDR	3	elfcommon.h	program headers for program
42697	AT_PHENT	4	elfcommon.h	size of program header entry
42698	AT_PHNUM	5	elfcommon.h	number of program headers
42699	AT_PAGESZ	6	elfcommon.h	system page size
42700	AT_BASE	7	elfcommon.h	base address of interpreter
42701	AT_FLAGS	8	elfcommon.h	flags
42702	AT_ENTRY	9	elfcommon.h	entry point of program
42703	AT_NOTELF	10	elfcommon.h	program is not ELF
42704	AT_UID	11	elfcommon.h	real uid
42705	AT_EUID	12	elfcommon.h	effective uid
42706	AT_GID	13	elfcommon.h	real gid
42707	AT_EGID	14	elfcommon.h	effective gid
42708	AT_PLATFORM	15	elfcommon.h	string identifying CPU for optimizations
42709	AT_HWCAP	16	elfcommon.h	arch dependent hints at CPU capabilities
42710	AT_CLKTCK	17	elfcommon.h	frequency at which times() increments
42711	AT_SECURE	23	elfcommon.h	secure mode boolean
42712	PF_X	0x1	elfcommon.h
42713	PF_W	0x2	elfcommon.h
42714	PF_R	0x4	elfcommon.h
42715	SHT_NULL	0	elfcommon.h
42716	SHT_PROGBITS	1	elfcommon.h
42717	SHT_SYMTAB	2	elfcommon.h
42718	SHT_STRTAB	3	elfcommon.h
42719	SHT_RELA	4	elfcommon.h
42720	SHT_HASH	5	elfcommon.h
42721	SHT_DYNAMIC	6	elfcommon.h
42722	SHT_NOTE	7	elfcommon.h
42723	SHT_NOBITS	8	elfcommon.h
42724	SHT_REL	9	elfcommon.h
42725	SHT_SHLIB	10	elfcommon.h
42726	SHT_DYNSYM	11	elfcommon.h
42727	SHT_NUM	12	elfcommon.h
42728	SHT_LOPROC	0x70000000	elfcommon.h
42729	SHT_HIPROC	0x7fffffff	elfcommon.h
42730	SHT_LOUSER	0x80000000	elfcommon.h
42731	SHT_HIUSER	0xffffffff	elfcommon.h
42732	SHF_WRITE	0x1	elfcommon.h
42733	SHF_ALLOC	0x2	elfcommon.h
42734	SHF_EXECINSTR	0x4	elfcommon.h
42735	SHF_MASKPROC	0xf0000000	elfcommon.h
42736	SHN_UNDEF	0	elfcommon.h
42737	SHN_LORESERVE	0xff00	elfcommon.h
42738	SHN_LOPROC	0xff00	elfcommon.h
42739	SHN_HIPROC	0xff1f	elfcommon.h
42740	SHN_ABS	0xfff1	elfcommon.h
42741	SHN_COMMON	0xfff2	elfcommon.h
42742	SHN_HIRESERVE	0xffff	elfcommon.h
42743	EI_NIDENT	16	elfcommon.h
42744	EI_MAG0	0	elfcommon.h	e_ident[] indexes
42745	EI_MAG1	1	elfcommon.h
42746	EI_MAG2	2	elfcommon.h
42747	EI_MAG3	3	elfcommon.h
42748	EI_CLASS	4	elfcommon.h
42749	EI_DATA	5	elfcommon.h
42750	EI_VERSION	6	elfcommon.h
42751	EI_OSABI	7	elfcommon.h
42752	EI_PAD	8	elfcommon.h
42753	ELFMAG0	0x7f	elfcommon.h	EI_MAG
42754	ELFMAG1	'E'	elfcommon.h
42755	ELFMAG2	'L'	elfcommon.h
42756	ELFMAG3	'F'	elfcommon.h
42757	ELFMAG	"\177ELF"	elfcommon.h
42758	SELFMAG	4	elfcommon.h
42759	ELFCLASSNONE	0	elfcommon.h	EI_CLASS
42760	ELFCLASS32	1	elfcommon.h
42761	ELFCLASS64	2	elfcommon.h
42762	ELFCLASSNUM	3	elfcommon.h
42763	ELFDATANONE	0	elfcommon.h	e_ident[EI_DATA]
42764	ELFDATA2LSB	1	elfcommon.h
42765	ELFDATA2MSB	2	elfcommon.h
42766	EV_NONE	0	elfcommon.h	e_version, EI_VERSION
42767	EV_CURRENT	1	elfcommon.h
42768	EV_NUM	2	elfcommon.h
42769	ELFOSABI_NONE	0	elfcommon.h
42770	ELFOSABI_SYSV	0	elfcommon.h
42771	ELFOSABI_HPUX	1	elfcommon.h
42772	ELFOSABI_NETBSD	2	elfcommon.h
42773	ELFOSABI_LINUX	3	elfcommon.h
42774	ELFOSABI_SOLARIS	6	elfcommon.h
42775	ELFOSABI_AIX	7	elfcommon.h
42776	ELFOSABI_IRIX	8	elfcommon.h
42777	ELFOSABI_FREEBSD	9	elfcommon.h
42778	ELFOSABI_TRU64	10	elfcommon.h
42779	ELFOSABI_MODESTO	11	elfcommon.h
42780	ELFOSABI_OPENBSD	12	elfcommon.h
42781	ELFOSABI_ARM	97	elfcommon.h
42782	ELFOSABI_STANDALONE	255	elfcommon.h
42783	STB_LOCAL	0	elfcommon.h	Local symbol
42784	STB_GLOBAL	1	elfcommon.h	Global symbol
42785	STB_WEAK	2	elfcommon.h	Weak symbol
42786	STB_NUM	3	elfcommon.h	Number of defined types.
42787	STB_LOOS	10	elfcommon.h	Start of OS-specific
42788	STB_HIOS	12	elfcommon.h	End of OS-specific
42789	STB_LOPROC	13	elfcommon.h	Start of processor-specific
42790	STB_HIPROC	15	elfcommon.h	End of processor-specific
42791	NBI_MAGIC	0x1b031336	nbi.h
42792	NBI_HFLAG_RETURN	0x00000100	nbi.h
42793	NBI_HFLAG_PROTMODE	0x80000000	nbi.h
42794	NBI_IFLAG_ADDR_LAST	0x01	nbi.h
42795	NBI_IFLAG_ADDR_END	0x02	nbi.h
42796	NBI_IFLAG_LAST	0x04	nbi.h
42797	NBI_HEADER_SIZE	510	nbi.h
42798	LINUX_MAGIC	('H' + ('d' << 8) + ('r' << 16) + ('S' << 24))	setup.h
42799	OLD_CMDLINE_MAGIC	0xA33F	setup.h
42800	WRAPLINUX_PACKAGE	"wraplinux"	wraplinux.h
42801	EFLAGS_CF	0x00000001	reloc.h
42802	EFLAGS_PF	0x00000004	reloc.h
42803	EFLAGS_AF	0x00000010	reloc.h
42804	EFLAGS_ZF	0x00000040	reloc.h
42805	EFLAGS_SF	0x00000080	reloc.h
42806	EFLAGS_TF	0x00000100	reloc.h
42807	EFLAGS_IF	0x00000200	reloc.h
42808	EFLAGS_DF	0x00000400	reloc.h
42809	EFLAGS_OF	0x00000800	reloc.h
42810	EFLAGS_IOPL	0x00003000	reloc.h
42811	EFLAGS_NT	0x00004000	reloc.h
42812	EFLAGS_RF	0x00010000	reloc.h
42813	EFLAGS_VM	0x00020000	reloc.h
42814	EFLAGS_AC	0x00040000	reloc.h
42815	EFLAGS_VIF	0x00080000	reloc.h
42816	EFLAGS_VIP	0x00100000	reloc.h
42817	EFLAGS_ID	0x00200000	reloc.h

Csharp

See Also